183 files changed, 1030 insertions, 528 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index acd12efe6f3e..8928b21a2dba 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -7,7 +7,6 @@ config ARM
         select HAVE_IDE if PCI || ISA || PCMCIA
         select HAVE_DMA_ATTRS
         select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
-        select CMA if (CPU_V6 || CPU_V6K || CPU_V7)
         select HAVE_MEMBLOCK
         select RTC_LIB
         select SYS_SUPPORTS_APM_EMULATION
@@ -297,6 +296,7 @@ config ARCH_VERSATILE
         select ICST
         select GENERIC_CLOCKEVENTS
         select ARCH_WANT_OPTIONAL_GPIOLIB
+        select NEED_MACH_IO_H if PCI
         select PLAT_VERSATILE
         select PLAT_VERSATILE_CLCD
         select PLAT_VERSATILE_FPGA_IRQ
@@ -592,6 +592,7 @@ config ARCH_ORION5X
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the following Marvell Orion 5x series SoCs:
diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts
index 153a4b2d12b5..c9b4f27d191e 100644
--- a/arch/arm/boot/dts/mmp2-brownstone.dts
+++ b/arch/arm/boot/dts/mmp2-brownstone.dts
@@ -11,7 +11,7 @@
 /include/ "mmp2.dtsi"
 
 / {
-        model = "Marvell MMP2 Aspenite Development Board";
+        model = "Marvell MMP2 Brownstone Development Board";
         compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";
 
         chosen {
@@ -19,7 +19,7 @@
         };
 
         memory {
-                reg = <0x00000000 0x04000000>;
+                reg = <0x00000000 0x08000000>;
         };
 
         soc {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f2ab4ea7cc0e..581cb081cb0f 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -44,6 +44,8 @@
                         compatible = "ti,omap2-intc";
                         interrupt-controller;
                         #interrupt-cells = <1>;
+                        ti,intc-size = <96>;
+                        reg = <0x480FE000 0x1000>;
                 };
 
                 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
index 8314e4171884..dd4358bc26e2 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr1310 Evaluation Baord
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 9e61da404d57..419ea7413d23 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for all SPEAr1310 SoCs
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index 0d8472e5ab9f..c9a54e06fb68 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr1340 Evaluation Baord
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index a26fc47a55e8..d71fe2a68f09 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for all SPEAr1340 SoCs
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
index 1f8e1e1481df..f7b84aced654 100644
--- a/arch/arm/boot/dts/spear13xx.dtsi
+++ b/arch/arm/boot/dts/spear13xx.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for all SPEAr13xx SoCs
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -43,8 +43,8 @@
 
         pmu {
                 compatible = "arm,cortex-a9-pmu";
-                interrupts = <0 8 0x04
-                              0 9 0x04>;
+                interrupts = <0 6 0x04
+                              0 7 0x04>;
         };
 
         L2: l2-cache {
@@ -119,8 +119,8 @@
                 gmac0: eth@e2000000 {
                         compatible = "st,spear600-gmac";
                         reg = <0xe2000000 0x8000>;
-                        interrupts = <0 23 0x4
-                                      0 24 0x4>;
+                        interrupts = <0 33 0x4
+                                      0 34 0x4>;
                         interrupt-names = "macirq", "eth_wake_irq";
                         status = "disabled";
                 };
@@ -202,6 +202,7 @@
                         kbd@e0300000 {
                                 compatible = "st,spear300-kbd";
                                 reg = <0xe0300000 0x1000>;
+                                interrupts = <0 52 0x4>;
                                 status = "disabled";
                         };
 
@@ -224,7 +225,7 @@
                         serial@e0000000 {
                                 compatible = "arm,pl011", "arm,primecell";
                                 reg = <0xe0000000 0x1000>;
-                                interrupts = <0 36 0x4>;
+                                interrupts = <0 35 0x4>;
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
index fc82b1a26458..d71b8d581e3d 100644
--- a/arch/arm/boot/dts/spear300-evb.dts
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr300 Evaluation Baord
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi
index 01c5e358fdb2..ed3627c116cc 100644
--- a/arch/arm/boot/dts/spear300.dtsi
+++ b/arch/arm/boot/dts/spear300.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr300 SoC
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts
index dc5e2d445a93..b00544e0cd5d 100644
--- a/arch/arm/boot/dts/spear310-evb.dts
+++ b/arch/arm/boot/dts/spear310-evb.dts
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr310 Evaluation Baord
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index e47081c494d9..62fc4fb3e5f9 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr310 SoC
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index 6308fa3bec1e..e4e912f95024 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr320 Evaluation Baord
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -15,8 +15,8 @@
 /include/ "spear320.dtsi"
 
 / {
-        model = "ST SPEAr300 Evaluation Board";
-        compatible = "st,spear300-evb", "st,spear300";
+        model = "ST SPEAr320 Evaluation Board";
+        compatible = "st,spear320-evb", "st,spear320";
         #address-cells = <1>;
         #size-cells = <1>;
 
@@ -26,7 +26,7 @@
 
         ahb {
                 pinmux@b3000000 {
-                        st,pinmux-mode = <3>;
+                        st,pinmux-mode = <4>;
                         pinctrl-names = "default";
                         pinctrl-0 = <&state_default>;
 
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index 5372ca399b1f..1f49d69595a0 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for SPEAr320 SoC
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
index 91072553963f..3a8bb5736928 100644
--- a/arch/arm/boot/dts/spear3xx.dtsi
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -1,7 +1,7 @@
 /*
  * DTS file for all SPEAr3xx SoCs
  *
- * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
+ * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index 089f0a42c50e..a3c36e47d7ef 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -181,6 +181,7 @@
                         timer@f0000000 {
                                 compatible = "st,spear-timer";
                                 reg = <0xf0000000 0x400>;
+                                interrupt-parent = <&vic0>;
                                 interrupts = <16>;
                         };
                 };
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 9d7eb530f95f..aa07f5938f05 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -366,8 +366,8 @@ static int __dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
         struct safe_buffer *buf;
         unsigned long off;
 
-        dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",
-                __func__, addr, off, sz, dir);
+        dev_dbg(dev, "%s(dma=%#x,sz=%zx,dir=%x)\n",
+                __func__, addr, sz, dir);
 
         buf = find_safe_buffer_dev(dev, addr, __func__);
         if (!buf)
@@ -377,8 +377,8 @@ static int __dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
 
         BUG_ON(buf->direction != dir);
 
-        dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
-                __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
+        dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x off=%#lx) mapped to %p (dma=%#x)\n",
+                __func__, buf->ptr, virt_to_dma(dev, buf->ptr), off,
                 buf->safe, buf->safe_dma_addr);
 
         DO_STATS(dev->archdata.dmabounce->bounce_count++);
@@ -406,8 +406,8 @@ static int __dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
         struct safe_buffer *buf;
         unsigned long off;
 
-        dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",
-                __func__, addr, off, sz, dir);
+        dev_dbg(dev, "%s(dma=%#x,sz=%zx,dir=%x)\n",
+                __func__, addr, sz, dir);
 
         buf = find_safe_buffer_dev(dev, addr, __func__);
         if (!buf)
@@ -417,8 +417,8 @@ static int __dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
 
         BUG_ON(buf->direction != dir);
 
-        dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
-                __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
+        dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x off=%#lx) mapped to %p (dma=%#x)\n",
+                __func__, buf->ptr, virt_to_dma(dev, buf->ptr), off,
                 buf->safe, buf->safe_dma_addr);
 
         DO_STATS(dev->archdata.dmabounce->bounce_count++);
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 9854ff4279e0..11828e632532 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -176,7 +176,6 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_SUSPEND=y
 CONFIG_USB_MON=y
-CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_WDM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_LIBUSUAL=y
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index ed2e95d46e29..62e75475e57e 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -1,7 +1,10 @@
 #ifndef __ASMARM_ARCH_TIMER_H
 #define __ASMARM_ARCH_TIMER_H
 
+#include <asm/errno.h>
+
 #ifdef CONFIG_ARM_ARCH_TIMER
+#define ARCH_HAS_READ_CURRENT_TIMER
 int arch_timer_of_register(void);
 int arch_timer_sched_clock_init(void);
 #else
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 68374ba6a943..c79f61faa3a5 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -243,7 +243,7 @@ typedef struct {
 
 #define ATOMIC64_INIT(i) { (i) }
 
-static inline u64 atomic64_read(atomic64_t *v)
+static inline u64 atomic64_read(const atomic64_t *v)
 {
         u64 result;
 
diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h
index b2deda181549..dc6145120de3 100644
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
@@ -6,9 +6,22 @@
 #ifndef __ASM_ARM_DELAY_H
 #define __ASM_ARM_DELAY_H
 
+#include <asm/memory.h>
 #include <asm/param.h>  /* HZ */
 
-extern void __delay(int loops);
+#define MAX_UDELAY_MS   2
+#define UDELAY_MULT     ((UL(2199023) * HZ) >> 11)
+#define UDELAY_SHIFT    30
+
+#ifndef __ASSEMBLY__
+
+extern struct arm_delay_ops {
+        void (*delay)(unsigned long);
+        void (*const_udelay)(unsigned long);
+        void (*udelay)(unsigned long);
+} arm_delay_ops;
+
+#define __delay(n)              arm_delay_ops.delay(n)
 
 /*
  * This function intentionally does not exist; if you see references to
@@ -23,22 +36,27 @@ extern void __bad_udelay(void);
  * division by multiplication: you don't have to worry about
  * loss of precision.
  *
- * Use only for very small delays ( < 1 msec).  Should probably use a
+ * Use only for very small delays ( < 2 msec).  Should probably use a
  * lookup table, really, as the multiplications take much too long with
  * short delays.  This is a "reasonable" implementation, though (and the
  * first constant multiplications gets optimized away if the delay is
  * a constant)
  */
-extern void __udelay(unsigned long usecs);
-extern void __const_udelay(unsigned long);
-
-#define MAX_UDELAY_MS 2
+#define __udelay(n)             arm_delay_ops.udelay(n)
+#define __const_udelay(n)       arm_delay_ops.const_udelay(n)
 
 #define udelay(n)                                                       \
         (__builtin_constant_p(n) ?                                      \
           ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() :              \
-                        __const_udelay((n) * ((2199023U*HZ)>>11))) :    \
+                        __const_udelay((n) * UDELAY_MULT)) :            \
           __udelay(n))
 
+/* Loop-based definitions for assembly code. */
+extern void __loop_delay(unsigned long loops);
+extern void __loop_udelay(unsigned long usecs);
+extern void __loop_const_udelay(unsigned long);
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* defined(_ARM_DELAY_H) */
 
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index 3d2220498abc..6ddbe446425e 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -60,13 +60,13 @@
 #ifndef __ASSEMBLY__
 
 #ifdef CONFIG_CPU_USE_DOMAINS
-#define set_domain(x)                                   \
-        do {                                            \
-        __asm__ __volatile__(                           \
-        "mcr    p15, 0, %0, c3, c0      @ set domain"   \
-          : : "r" (x));                                 \
-        isb();                                          \
-        } while (0)
+static inline void set_domain(unsigned val)
+{
+        asm volatile(
+        "mcr    p15, 0, %0, c3, c0      @ set domain"
+          : : "r" (val));
+        isb();
+}
 
 #define modify_domain(dom,type)                                 \
         do {                                                    \
@@ -78,8 +78,8 @@
         } while (0)
 
 #else
-#define set_domain(x)           do { } while (0)
-#define modify_domain(dom,type) do { } while (0)
+static inline void set_domain(unsigned val) { }
+static inline void modify_domain(unsigned dom, unsigned type)   { }
 #endif
 
 /*
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 7be54690aeec..e42cf597f6e6 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -19,6 +19,7 @@
         "       .long   1b, 4f, 2b, 4f\n"                       \
         "       .popsection\n"                                  \
         "       .pushsection .fixup,\"ax\"\n"                   \
+        "       .align  2\n"                                    \
         "4:     mov     %0, " err_reg "\n"                      \
         "       b       3b\n"                                   \
         "       .popsection"
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index e0d1c0cfa548..6b9b077d86b3 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -4,7 +4,7 @@
  * ARM PrimeXsys System Controller SP810 header file
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index fcb575747e5e..e965f1b560f1 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -16,7 +16,7 @@
 #include <linux/compiler.h>
 #include <linux/const.h>
 #include <linux/types.h>
-#include <asm/sizes.h>
+#include <linux/sizes.h>
 
 #ifdef CONFIG_NEED_MACH_MEMORY_H
 #include <mach/memory.h>
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index b79f8e97f775..af7b0bda3355 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -148,7 +148,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define TIF_NOTIFY_RESUME       2       /* callback before returning to user */
 #define TIF_SYSCALL_TRACE       8
 #define TIF_SYSCALL_AUDIT       9
-#define TIF_SYSCALL_RESTARTSYS  10
 #define TIF_POLLING_NRFLAG      16
 #define TIF_USING_IWMMXT        17
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
@@ -164,11 +163,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_USING_IWMMXT       (1 << TIF_USING_IWMMXT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
-#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS)
 
 /* Checks for any syscall work in entry-common.S */
-#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
-                           _TIF_SYSCALL_RESTARTSYS)
+#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
 
 /*
  * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/include/asm/timex.h b/arch/arm/include/asm/timex.h
index 3be8de3adaba..ce119442277c 100644
--- a/arch/arm/include/asm/timex.h
+++ b/arch/arm/include/asm/timex.h
@@ -12,13 +12,15 @@
 #ifndef _ASMARM_TIMEX_H
 #define _ASMARM_TIMEX_H
 
+#include <asm/arch_timer.h>
 #include <mach/timex.h>
 
 typedef unsigned long cycles_t;
 
-static inline cycles_t get_cycles (void)
-{
-        return 0;
-}
+#ifdef ARCH_HAS_READ_CURRENT_TIMER
+#define get_cycles()    ({ cycles_t c; read_current_timer(&c) ? 0 : c; })
+#else
+#define get_cycles()    (0)
+#endif
 
 #endif
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index df44c8cf9e2e..cf258807160d 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -32,6 +32,8 @@ static int arch_timer_ppi2;
 
 static struct clock_event_device __percpu **arch_timer_evt;
 
+extern void init_current_timer_delay(unsigned long freq);
+
 /*
  * Architected system timer support.
  */
@@ -223,6 +225,14 @@ static cycle_t arch_counter_read(struct clocksource *cs)
         return arch_counter_get_cntpct();
 }
 
+int read_current_timer(unsigned long *timer_val)
+{
+        if (!arch_timer_rate)
+                return -ENXIO;
+        *timer_val = arch_counter_get_cntpct();
+        return 0;
+}
+
 static struct clocksource clocksource_counter = {
         .name   = "arch_sys_counter",
         .rating = 400,
@@ -296,6 +306,7 @@ static int __init arch_timer_register(void)
         if (err)
                 goto out_free_irq;
 
+        init_current_timer_delay(arch_timer_rate);
         return 0;
 
 out_free_irq:
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c3dff6abc89d..60d3b738d420 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -49,8 +49,7 @@ extern void __aeabi_ulcmp(void);
 extern void fpundefinstr(void);
 
         /* platform dependent support */
-EXPORT_SYMBOL(__udelay);
-EXPORT_SYMBOL(__const_udelay);
+EXPORT_SYMBOL(arm_delay_ops);
 
         /* networking */
 EXPORT_SYMBOL(csum_partial);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 437f0c426517..0d1851ca6eb9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -495,6 +495,7 @@ ENDPROC(__und_usr)
  * The out of line fixup for the ldrt above.
  */
         .pushsection .fixup, "ax"
+        .align  2
 4:      mov     pc, r9
         .popsection
         .pushsection __ex_table,"a"
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 4afed88d250a..49d9f9305247 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -95,13 +95,7 @@ ENDPROC(ret_to_user)
 ENTRY(ret_from_fork)
         bl      schedule_tail
         get_thread_info tsk
-        ldr     r1, [tsk, #TI_FLAGS]            @ check for syscall tracing
         mov     why, #1
-        tst     r1, #_TIF_SYSCALL_WORK          @ are we tracing syscalls?
-        beq     ret_slow_syscall
-        mov     r1, sp
-        mov     r0, #1                          @ trace exit [IP = 1]
-        bl      syscall_trace
         b       ret_slow_syscall
 ENDPROC(ret_from_fork)
 
@@ -448,10 +442,9 @@ ENDPROC(vector_swi)
          * context switches, and waiting for our parent to respond.
          */
 __sys_trace:
-        mov     r2, scno
-        add     r1, sp, #S_OFF
-        mov     r0, #0                          @ trace entry [IP = 0]
-        bl      syscall_trace
+        mov     r1, scno
+        add     r0, sp, #S_OFF
+        bl      syscall_trace_enter
 
         adr     lr, BSYM(__sys_trace_return)    @ return address
         mov     scno, r0                        @ syscall number (possibly new)
@@ -463,10 +456,9 @@ __sys_trace:
 
 __sys_trace_return:
         str     r0, [sp, #S_R0 + S_OFF]!        @ save returned r0
-        mov     r2, scno
-        mov     r1, sp
-        mov     r0, #1                          @ trace exit [IP = 1]
-        bl      syscall_trace
+        mov     r1, scno
+        mov     r0, sp
+        bl      syscall_trace_exit
         b       ret_slow_syscall
 
         .align  5
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index ba32b393b3f0..38c1a3b103a0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -187,8 +187,8 @@ void kprobe_arm_test_cases(void)
         TEST_BF_R ("mov pc, r",0,2f,"")
         TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"")
         TEST_BB(   "sub pc, pc, #1b-2b+8")
-#if __LINUX_ARM_ARCH__ >= 6
-        TEST_BB(   "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before ARMv6 */
+#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
+        TEST_BB(   "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
 #endif
         TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
         TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c
index 8f96ec778e8d..6123daf397a7 100644
--- a/arch/arm/kernel/kprobes-thumb.c
+++ b/arch/arm/kernel/kprobes-thumb.c
@@ -660,7 +660,7 @@ static const union decode_item t32_table_1111_100x[] = {
         /* LDRSB (literal)      1111 1001 x001 1111 xxxx xxxx xxxx xxxx */
         /* LDRH (literal)       1111 1000 x011 1111 xxxx xxxx xxxx xxxx */
         /* LDRSH (literal)      1111 1001 x011 1111 xxxx xxxx xxxx xxxx */
-        DECODE_EMULATEX (0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,
+        DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,
                                                  REGS(PC, NOSPPCX, 0, 0, 0)),
 
         /* STRB (immediate)     1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index df85eda3add3..ab243b87118d 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -500,7 +500,7 @@ __hw_perf_event_init(struct perf_event *event)
              event_requires_mode_exclusion(&event->attr)) {
                 pr_debug("ARM performance counters do not support "
                          "mode exclusion\n");
-                return -EPERM;
+                return -EOPNOTSUPP;
         }
 
         /*
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 5700a7ae7f0b..dab711e6e1ca 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -25,7 +25,6 @@
 #include <linux/regset.h>
 #include <linux/audit.h>
 #include <linux/tracehook.h>
-#include <linux/unistd.h>
 
 #include <asm/pgtable.h>
 #include <asm/traps.h>
@@ -908,18 +907,16 @@ long arch_ptrace(struct task_struct *child, long request,
         return ret;
 }
 
-asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
+enum ptrace_syscall_dir {
+        PTRACE_SYSCALL_ENTER = 0,
+        PTRACE_SYSCALL_EXIT,
+};
+
+static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
+                                enum ptrace_syscall_dir dir)
 {
         unsigned long ip;
 
-        if (why)
-                audit_syscall_exit(regs);
-        else
-                audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
-                                    regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
-
-        if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))
-                scno = __NR_restart_syscall - __NR_SYSCALL_BASE;
         if (!test_thread_flag(TIF_SYSCALL_TRACE))
                 return scno;
 
@@ -930,14 +927,28 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
          * IP = 0 -> entry, =1 -> exit
          */
         ip = regs->ARM_ip;
-        regs->ARM_ip = why;
+        regs->ARM_ip = dir;
 
-        if (why)
+        if (dir == PTRACE_SYSCALL_EXIT)
                 tracehook_report_syscall_exit(regs, 0);
         else if (tracehook_report_syscall_entry(regs))
                 current_thread_info()->syscall = -1;
 
         regs->ARM_ip = ip;
-
         return current_thread_info()->syscall;
 }
+
+asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
+{
+        int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER);
+        audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1,
+                            regs->ARM_r2, regs->ARM_r3);
+        return ret;
+}
+
+asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno)
+{
+        int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT);
+        audit_syscall_exit(regs);
+        return ret;
+}
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index fd2392a17ac1..536c5d6b340b 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -27,6 +27,7 @@
  */
 #define SWI_SYS_SIGRETURN       (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
 #define SWI_SYS_RT_SIGRETURN    (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
+#define SWI_SYS_RESTART         (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)
 
 /*
  * With EABI, the syscall number has to be loaded into r7.
@@ -47,6 +48,18 @@ const unsigned long sigreturn_codes[7] = {
 };
 
 /*
+ * Either we support OABI only, or we have EABI with the OABI
+ * compat layer enabled.  In the later case we don't know if
+ * user space is EABI or not, and if not we must not clobber r7.
+ * Always using the OABI syscall solves that issue and works for
+ * all those cases.
+ */
+const unsigned long syscall_restart_code[2] = {
+        SWI_SYS_RESTART,        /* swi  __NR_restart_syscall */
+        0xe49df004,             /* ldr  pc, [sp], #4 */
+};
+
+/*
  * atomically swap in the new signal mask, and wait for a signal.
  */
 asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
@@ -592,10 +605,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
                 case -ERESTARTNOHAND:
                 case -ERESTARTSYS:
                 case -ERESTARTNOINTR:
-                case -ERESTART_RESTARTBLOCK:
                         regs->ARM_r0 = regs->ARM_ORIG_r0;
                         regs->ARM_pc = restart_addr;
                         break;
+                case -ERESTART_RESTARTBLOCK:
+                        regs->ARM_r0 = -EINTR;
+                        break;
                 }
         }
 
@@ -611,14 +626,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
                  * debugger has chosen to restart at a different PC.
                  */
                 if (regs->ARM_pc == restart_addr) {
-                        if (retval == -ERESTARTNOHAND ||
-                            retval == -ERESTART_RESTARTBLOCK
+                        if (retval == -ERESTARTNOHAND
                             || (retval == -ERESTARTSYS
                                 && !(ka.sa.sa_flags & SA_RESTART))) {
                                 regs->ARM_r0 = -EINTR;
                                 regs->ARM_pc = continue_addr;
                         }
-                        clear_thread_flag(TIF_SYSCALL_RESTARTSYS);
                 }
 
                 handle_signal(signr, &ka, &info, regs);
@@ -632,8 +645,29 @@ static void do_signal(struct pt_regs *regs, int syscall)
                  * ignore the restart.
                  */
                 if (retval == -ERESTART_RESTARTBLOCK
-                    && regs->ARM_pc == restart_addr)
-                        set_thread_flag(TIF_SYSCALL_RESTARTSYS);
+                    && regs->ARM_pc == continue_addr) {
+                        if (thumb_mode(regs)) {
+                                regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
+                                regs->ARM_pc -= 2;
+                        } else {
+#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
+                                regs->ARM_r7 = __NR_restart_syscall;
+                                regs->ARM_pc -= 4;
+#else
+                                u32 __user *usp;
+
+                                regs->ARM_sp -= 4;
+                                usp = (u32 __user *)regs->ARM_sp;
+
+                                if (put_user(regs->ARM_pc, usp) == 0) {
+                                        regs->ARM_pc = KERN_RESTART_CODE;
+                                } else {
+                                        regs->ARM_sp += 4;
+                                        force_sigsegv(0, current);
+                                }
+#endif
+                        }
+                }
         }
 
         restore_saved_sigmask();
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 5ff067b7c752..6fcfe8398aa4 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -8,5 +8,7 @@
  * published by the Free Software Foundation.
  */
 #define KERN_SIGRETURN_CODE     (CONFIG_VECTORS_BASE + 0x00000500)
+#define KERN_RESTART_CODE       (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))
 
 extern const unsigned long sigreturn_codes[7];
+extern const unsigned long syscall_restart_code[2];
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 2c7217d971db..aea74f5bc34a 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -179,7 +179,7 @@ void __ref cpu_die(void)
         mb();
 
         /* Tell __cpu_die() that this CPU is now safe to dispose of */
-        complete(&cpu_died);
+        RCU_NONIDLE(complete(&cpu_died));
 
         /*
          * actual CPU shutdown procedure is at least platform (if not
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 2df8715c36c0..8b97d739b17b 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -852,6 +852,8 @@ void __init early_trap_init(void *vectors_base)
          */
         memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
                sigreturn_codes, sizeof(sigreturn_codes));
+        memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE),
+               syscall_restart_code, sizeof(syscall_restart_code));
 
         flush_icache_range(vectors, vectors + PAGE_SIZE);
         modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 43a31fb06318..36ff15bbfdd4 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -183,7 +183,9 @@ SECTIONS
         }
 #endif
 
+#ifdef CONFIG_SMP
         PERCPU_SECTION(L1_CACHE_BYTES)
+#endif
 
 #ifdef CONFIG_XIP_KERNEL
         __data_loc = ALIGN(4);          /* location in binary */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index d5060dab6e52..2473fd1fd51c 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -6,7 +6,7 @@
 
 lib-y           := backtrace.o changebit.o csumipv6.o csumpartial.o   \
                    csumpartialcopy.o csumpartialcopyuser.o clearbit.o \
-                   delay.o findbit.o memchr.o memcpy.o                \
+                   delay.o delay-loop.o findbit.o memchr.o memcpy.o   \
                    memmove.o memset.o memzero.o setbit.o              \
                    strchr.o strrchr.o                                 \
                    testchangebit.o testclearbit.o testsetbit.o        \
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay-loop.S
index 3c9a05c8d20b..36b668d8e121 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay-loop.S
@@ -9,11 +9,11 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
-#include <asm/param.h>
+#include <asm/delay.h>
                 .text
 
 .LC0:           .word   loops_per_jiffy
-.LC1:           .word   (2199023*HZ)>>11
+.LC1:           .word   UDELAY_MULT
 
 /*
  * r0  <= 2000
@@ -21,10 +21,10 @@
  * HZ  <= 1000
  */
 
-ENTRY(__udelay)
+ENTRY(__loop_udelay)
                 ldr     r2, .LC1
                 mul     r0, r2, r0
-ENTRY(__const_udelay)                           @ 0 <= r0 <= 0x7fffff06
+ENTRY(__loop_const_udelay)                      @ 0 <= r0 <= 0x7fffff06
                 mov     r1, #-1
                 ldr     r2, .LC0
                 ldr     r2, [r2]                @ max = 0x01ffffff
@@ -39,12 +39,10 @@ ENTRY(__const_udelay)				@ 0 <= r0 <= 0x7fffff06
 
 /*
  * loops = r0 * HZ * loops_per_jiffy / 1000000
- *
- * Oh, if only we had a cycle counter...
  */
 
 @ Delay routine
-ENTRY(__delay)
+ENTRY(__loop_delay)
                 subs    r0, r0, #1
 #if 0
                 movls   pc, lr
@@ -62,8 +60,8 @@ ENTRY(__delay)
                 movls   pc, lr
                 subs    r0, r0, #1
 #endif
-                bhi     __delay
+                bhi     __loop_delay
                 mov     pc, lr
-ENDPROC(__udelay)
-ENDPROC(__const_udelay)
-ENDPROC(__delay)
+ENDPROC(__loop_udelay)
+ENDPROC(__loop_const_udelay)
+ENDPROC(__loop_delay)
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
new file mode 100644
index 000000000000..d6dacc69254e
--- /dev/null
+++ b/arch/arm/lib/delay.c
@@ -0,0 +1,71 @@
+/*
+ * Delay loops based on the OpenRISC implementation.
+ *
+ * Copyright (C) 2012 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Author: Will Deacon <will.deacon@arm.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/timex.h>
+
+/*
+ * Default to the loop-based delay implementation.
+ */
+struct arm_delay_ops arm_delay_ops = {
+        .delay          = __loop_delay,
+        .const_udelay   = __loop_const_udelay,
+        .udelay         = __loop_udelay,
+};
+
+#ifdef ARCH_HAS_READ_CURRENT_TIMER
+static void __timer_delay(unsigned long cycles)
+{
+        cycles_t start = get_cycles();
+
+        while ((get_cycles() - start) < cycles)
+                cpu_relax();
+}
+
+static void __timer_const_udelay(unsigned long xloops)
+{
+        unsigned long long loops = xloops;
+        loops *= loops_per_jiffy;
+        __timer_delay(loops >> UDELAY_SHIFT);
+}
+
+static void __timer_udelay(unsigned long usecs)
+{
+        __timer_const_udelay(usecs * UDELAY_MULT);
+}
+
+void __init init_current_timer_delay(unsigned long freq)
+{
+        pr_info("Switching to timer-based delay loop\n");
+        lpj_fine                        = freq / HZ;
+        arm_delay_ops.delay             = __timer_delay;
+        arm_delay_ops.const_udelay      = __timer_const_udelay;
+        arm_delay_ops.udelay            = __timer_udelay;
+}
+
+unsigned long __cpuinit calibrate_delay_is_known(void)
+{
+        return lpj_fine;
+}
+#endif
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 226949dc4ac0..f953bb54aa9d 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -50,5 +50,6 @@
 #define POWER_MANAGEMENT        (BRIDGE_VIRT_BASE | 0x011c)
 
 #define TIMER_VIRT_BASE         (BRIDGE_VIRT_BASE | 0x0300)
+#define TIMER_PHYS_BASE         (BRIDGE_PHYS_BASE | 0x0300)
 
 #endif
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index ad1165d488c1..d52b0ef313b7 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -78,6 +78,7 @@
 
 /* North-South Bridge */
 #define BRIDGE_VIRT_BASE        (DOVE_SB_REGS_VIRT_BASE | 0x20000)
+#define BRIDGE_PHYS_BASE        (DOVE_SB_REGS_PHYS_BASE | 0x20000)
 
 /* Cryptographic Engine */
 #define DOVE_CRYPT_PHYS_BASE    (DOVE_SB_REGS_PHYS_BASE | 0x30000)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 573be57d3d28..6f6d13f91e4c 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -212,7 +212,7 @@ config MACH_SMDKV310
         select EXYNOS_DEV_SYSMMU
         select EXYNOS4_DEV_AHCI
         select SAMSUNG_DEV_KEYPAD
-        select EXYNOS4_DEV_DMA
+        select EXYNOS_DEV_DMA
         select SAMSUNG_DEV_PWM
         select EXYNOS4_DEV_USB_OHCI
         select EXYNOS4_SETUP_FIMD0
@@ -264,7 +264,7 @@ config MACH_UNIVERSAL_C210
         select S5P_DEV_ONENAND
         select S5P_DEV_TV
         select EXYNOS_DEV_SYSMMU
-        select EXYNOS4_DEV_DMA
+        select EXYNOS_DEV_DMA
         select EXYNOS_DEV_DRM
         select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_I2C1
@@ -303,7 +303,7 @@ config MACH_NURI
         select S5P_DEV_MFC
         select S5P_DEV_USB_EHCI
         select S5P_SETUP_MIPIPHY
-        select EXYNOS4_DEV_DMA
+        select EXYNOS_DEV_DMA
         select EXYNOS_DEV_DRM
         select EXYNOS4_SETUP_FIMC
         select EXYNOS4_SETUP_FIMD0
@@ -341,7 +341,7 @@ config MACH_ORIGEN
         select SAMSUNG_DEV_PWM
         select EXYNOS_DEV_DRM
         select EXYNOS_DEV_SYSMMU
-        select EXYNOS4_DEV_DMA
+        select EXYNOS_DEV_DMA
         select EXYNOS4_DEV_USB_OHCI
         select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index e9fafcf163de..373c3c00d24c 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -119,7 +119,9 @@ static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
                                                 struct exynos_pm_domain *pd)
 {
         if (pdev->dev.bus) {
-                if (pm_genpd_add_device(&pd->pd, &pdev->dev))
+                if (!pm_genpd_add_device(&pd->pd, &pdev->dev))
+                        pm_genpd_dev_need_restore(&pdev->dev, true);
+                else
                         pr_info("%s: error in adding %s device to %s power"
                                 "domain\n", __func__, dev_name(&pdev->dev),
                                 pd->name);
@@ -151,9 +153,12 @@ static __init int exynos4_pm_init_power_domain(void)
         if (of_have_populated_dt())
                 return exynos_pm_dt_parse_domains();
 
-        for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++)
-                pm_genpd_init(&exynos4_pm_domains[idx]->pd, NULL,
-                                exynos4_pm_domains[idx]->is_off);
+        for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) {
+                struct exynos_pm_domain *pd = exynos4_pm_domains[idx];
+                int on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
+
+                pm_genpd_init(&pd->pd, NULL, !on);
+        }
 
 #ifdef CONFIG_S5P_DEV_FIMD0
         exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0);
diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile
index f8437dd238c2..ded4652ada80 100644
--- a/arch/arm/mach-highbank/Makefile
+++ b/arch/arm/mach-highbank/Makefile
@@ -1,4 +1,8 @@
-obj-y                                   := clock.o highbank.o system.o
+obj-y                                   := clock.o highbank.o system.o smc.o
+
+plus_sec := $(call as-instr,.arch_extension sec,+sec)
+AFLAGS_smc.o                            :=-Wa,-march=armv7-a$(plus_sec)
+
 obj-$(CONFIG_DEBUG_HIGHBANK_UART)       += lluart.o
 obj-$(CONFIG_SMP)                       += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index d8e2d0be64ac..141ed5171826 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -8,3 +8,4 @@ extern void highbank_lluart_map_io(void);
 static inline void highbank_lluart_map_io(void) {}
 #endif
 
+extern void highbank_smc1(int fn, int arg);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 410a112bb52e..8777612b1a42 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -85,10 +85,24 @@ const static struct of_device_id irq_match[] = {
         {}
 };
 
+#ifdef CONFIG_CACHE_L2X0
+static void highbank_l2x0_disable(void)
+{
+        /* Disable PL310 L2 Cache controller */
+        highbank_smc1(0x102, 0x0);
+}
+#endif
+
 static void __init highbank_init_irq(void)
 {
         of_irq_init(irq_match);
+
+#ifdef CONFIG_CACHE_L2X0
+        /* Enable PL310 L2 Cache controller */
+        highbank_smc1(0x102, 0x1);
         l2x0_of_init(0, ~0UL);
+        outer_cache.disable = highbank_l2x0_disable;
+#endif
 }
 
 static void __init highbank_timer_init(void)
diff --git a/arch/arm/mach-highbank/smc.S b/arch/arm/mach-highbank/smc.S
new file mode 100644
index 000000000000..407d17baaaa9
--- /dev/null
+++ b/arch/arm/mach-highbank/smc.S
@@ -0,0 +1,27 @@
+/*
+ * Copied from omap44xx-smc.S Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright 2012 Calxeda, Inc.
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * This is common routine to manage secure monitor API
+ * used to modify the PL310 secure registers.
+ * 'r0' contains the value to be modified and 'r12' contains
+ * the monitor API number.
+ * Function signature : void highbank_smc1(u32 fn, u32 arg)
+ */
+
+ENTRY(highbank_smc1)
+        stmfd   sp!, {r4-r11, lr}
+        mov     r12, r0
+        mov     r0, r1
+        dsb
+        smc     #0
+        ldmfd   sp!, {r4-r11, pc}
+ENDPROC(highbank_smc1)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0021f726b153..eff4db5de0dd 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -477,6 +477,7 @@ config MACH_MX31_3DS
         select IMX_HAVE_PLATFORM_IMX2_WDT
         select IMX_HAVE_PLATFORM_IMX_I2C
         select IMX_HAVE_PLATFORM_IMX_KEYPAD
+        select IMX_HAVE_PLATFORM_IMX_SSI
         select IMX_HAVE_PLATFORM_IMX_UART
         select IMX_HAVE_PLATFORM_IPU_CORE
         select IMX_HAVE_PLATFORM_MXC_EHCI
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 0f0beb580b73..516ddee1948e 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -108,8 +108,7 @@ int __init mx1_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
         clk_register_clkdev(clk[clko], "clko", NULL);
 
-        mxc_timer_init(NULL, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR),
-                        MX1_TIM1_INT);
+        mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
 
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 4e4f384ee8dd..ea13e61bd5f3 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -180,7 +180,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
         clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL);
         clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL);
 
-        mxc_timer_init(NULL, MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR),
-                        MX21_INT_GPT1);
+        mxc_timer_init(MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), MX21_INT_GPT1);
+
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d9833bb5fd61..fdd8cc87c9fe 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -243,6 +243,6 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
         clk_register_clkdev(clk[iim_ipg], "iim", NULL);
 
-        mxc_timer_init(NULL, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
+        mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 50a7ebd8d1b2..295cbd7c08dc 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -263,8 +263,7 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
 
-        mxc_timer_init(NULL, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR),
-                        MX27_INT_GPT1);
+        mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
 
         clk_prepare_enable(clk[emi_ahb_gate]);
 
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index a854b9cae5ea..c9a06d800f8e 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -175,8 +175,7 @@ int __init mx31_clocks_init(unsigned long fref)
         mx31_revision();
         clk_disable_unprepare(clk[iim_gate]);
 
-        mxc_timer_init(NULL, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
-                        MX31_INT_GPT);
+        mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
 
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index a9e60bf7dd75..c6422fb10bae 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
                         pr_err("i.MX35 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
-
         clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
         clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
         clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,14 +263,20 @@ int __init mx35_clocks_init()
         clk_prepare_enable(clk[iim_gate]);
         clk_prepare_enable(clk[emi_gate]);
 
+        /*
+         * SCC is needed to boot via mmc after a watchdog reset. The clock code
+         * before conversion to common clk also enabled UART1 (which isn't
+         * handled here and not needed for mmc) and IIM (which is enabled
+         * unconditionally above).
+         */
+        clk_prepare_enable(clk[scc_gate]);
+
         imx_print_silicon_rev("i.MX35", mx35_revision());
 
 #ifdef CONFIG_MXC_USE_EPIT
-        epit_timer_init(&epit1_clk,
-                        MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
+        epit_timer_init(MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
 #else
-        mxc_timer_init(NULL, MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR),
-                        MX35_INT_GPT);
+        mxc_timer_init(MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
 #endif
 
         return 0;
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index fcd94f3b0f0e..a2200c77bf70 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -104,12 +104,12 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
                                 periph_apm_sel, ARRAY_SIZE(periph_apm_sel));
         clk[main_bus] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 1,
                                 main_bus_sel, ARRAY_SIZE(main_bus_sel));
-        clk[per_lp_apm] = imx_clk_mux("per_lp_apm", MXC_CCM_CBCDR, 1, 1,
+        clk[per_lp_apm] = imx_clk_mux("per_lp_apm", MXC_CCM_CBCMR, 1, 1,
                                 per_lp_apm_sel, ARRAY_SIZE(per_lp_apm_sel));
         clk[per_pred1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2);
         clk[per_pred2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3);
         clk[per_podf] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3);
-        clk[per_root] = imx_clk_mux("per_root", MXC_CCM_CBCDR, 1, 0,
+        clk[per_root] = imx_clk_mux("per_root", MXC_CCM_CBCMR, 0, 1,
                                 per_root_sel, ARRAY_SIZE(per_root_sel));
         clk[ahb] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3);
         clk[ahb_max] = imx_clk_gate2("ahb_max", "ahb", MXC_CCM_CCGR0, 28);
@@ -172,7 +172,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk[pwm1_hf_gate] = imx_clk_gate2("pwm1_hf_gate", "ipg", MXC_CCM_CCGR2, 12);
         clk[pwm2_ipg_gate] = imx_clk_gate2("pwm2_ipg_gate", "ipg", MXC_CCM_CCGR2, 14);
         clk[pwm2_hf_gate] = imx_clk_gate2("pwm2_hf_gate", "ipg", MXC_CCM_CCGR2, 16);
-        clk[gpt_gate] = imx_clk_gate2("gpt_gate", "ipg", MXC_CCM_CCGR2, 18);
+        clk[gpt_gate] = imx_clk_gate2("gpt_gate", "per_root", MXC_CCM_CCGR2, 18);
         clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", MXC_CCM_CCGR2, 24);
         clk[usboh3_gate] = imx_clk_gate2("usboh3_gate", "ipg", MXC_CCM_CCGR2, 26);
         clk[usboh3_per_gate] = imx_clk_gate2("usboh3_per_gate", "usboh3_podf", MXC_CCM_CCGR2, 28);
@@ -366,8 +366,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         clk_set_rate(clk[esdhc_b_podf], 166250000);
 
         /* System timer */
-        mxc_timer_init(NULL, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR),
-                MX51_INT_GPT);
+        mxc_timer_init(MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), MX51_INT_GPT);
 
         clk_prepare_enable(clk[iim_gate]);
         imx_print_silicon_rev("i.MX51", mx51_revision());
@@ -452,8 +451,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         clk_set_rate(clk[esdhc_b_podf], 200000000);
 
         /* System timer */
-        mxc_timer_init(NULL, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR),
-                MX53_INT_GPT);
+        mxc_timer_init(MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), MX53_INT_GPT);
 
         clk_prepare_enable(clk[iim_gate]);
         imx_print_silicon_rev("i.MX53", mx53_revision());
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index cab02d0a15d6..e1a17ac7b3b4 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -122,10 +122,6 @@ static const char *cko1_sels[]	= { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5
                                     "dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
                                     "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio", };
 
-static const char * const clks_init_on[] __initconst = {
-        "mmdc_ch0_axi", "mmdc_ch1_axi", "usboh3",
-};
-
 enum mx6q_clks {
         dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m,
         pll3_pfd0_720m, pll3_pfd1_540m, pll3_pfd2_508m, pll3_pfd3_454m,
@@ -156,16 +152,20 @@ enum mx6q_clks {
         ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
         usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
         pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
-        ssi2_ipg, ssi3_ipg, clk_max
+        ssi2_ipg, ssi3_ipg, rom,
+        clk_max
 };
 
 static struct clk *clk[clk_max];
 
+static enum mx6q_clks const clks_init_on[] __initconst = {
+        mmdc_ch0_axi, rom,
+};
+
 int __init mx6q_clocks_init(void)
 {
         struct device_node *np;
         void __iomem *base;
-        struct clk *c;
         int i, irq;
 
         clk[dummy] = imx_clk_fixed("dummy", 0);
@@ -365,6 +365,7 @@ int __init mx6q_clocks_init(void)
         clk[gpmi_bch]     = imx_clk_gate2("gpmi_bch",      "usdhc4",            base + 0x78, 26);
         clk[gpmi_io]      = imx_clk_gate2("gpmi_io",       "enfc",              base + 0x78, 28);
         clk[gpmi_apb]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);
+        clk[rom]          = imx_clk_gate2("rom",           "ahb",               base + 0x7c, 0);
         clk[sata]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);
         clk[sdma]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);
         clk[spba]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);
@@ -424,21 +425,14 @@ int __init mx6q_clocks_init(void)
         clk_register_clkdev(clk[ahb], "ahb", NULL);
         clk_register_clkdev(clk[cko1], "cko1", NULL);
 
-        for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) {
-                c = clk_get_sys(clks_init_on[i], NULL);
-                if (IS_ERR(c)) {
-                        pr_err("%s: failed to get clk %s", __func__,
-                               clks_init_on[i]);
-                        return PTR_ERR(c);
-                }
-                clk_prepare_enable(c);
-        }
+        for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
+                clk_prepare_enable(clk[clks_init_on[i]]);
 
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
         base = of_iomap(np, 0);
         WARN_ON(!base);
         irq = irq_of_parse_and_map(np, 0);
-        mxc_timer_init(NULL, base, irq);
+        mxc_timer_init(base, irq);
 
         return 0;
 }
diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c
index 4685919deb63..0440379e3628 100644
--- a/arch/arm/mach-imx/clk-pllv2.c
+++ b/arch/arm/mach-imx/clk-pllv2.c
@@ -74,30 +74,15 @@ struct clk_pllv2 {
         void __iomem    *base;
 };
 
-static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw,
-                unsigned long parent_rate)
+static unsigned long __clk_pllv2_recalc_rate(unsigned long parent_rate,
+                u32 dp_ctl, u32 dp_op, u32 dp_mfd, u32 dp_mfn)
 {
         long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
-        unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl;
-        void __iomem *pllbase;
+        unsigned long dbl;
         s64 temp;
-        struct clk_pllv2 *pll = to_clk_pllv2(hw);
-
-        pllbase = pll->base;
 
-        dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
-        pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
         dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN;
 
-        if (pll_hfsm == 0) {
-                dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
-                dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
-                dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
-        } else {
-                dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);
-                dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);
-                dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);
-        }
         pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK;
         mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET;
         mfi = (mfi <= 5) ? 5 : mfi;
@@ -123,18 +108,30 @@ static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw,
         return temp;
 }
 
-static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
+static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw,
                 unsigned long parent_rate)
 {
+        u32 dp_op, dp_mfd, dp_mfn, dp_ctl;
+        void __iomem *pllbase;
         struct clk_pllv2 *pll = to_clk_pllv2(hw);
+
+        pllbase = pll->base;
+
+        dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+        dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
+        dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
+        dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
+
+        return __clk_pllv2_recalc_rate(parent_rate, dp_ctl, dp_op, dp_mfd, dp_mfn);
+}
+
+static int __clk_pllv2_set_rate(unsigned long rate, unsigned long parent_rate,
+                u32 *dp_op, u32 *dp_mfd, u32 *dp_mfn)
+{
         u32 reg;
-        void __iomem *pllbase;
         long mfi, pdf, mfn, mfd = 999999;
         s64 temp64;
         unsigned long quad_parent_rate;
-        unsigned long pll_hfsm, dp_ctl;
-
-        pllbase = pll->base;
 
         quad_parent_rate = 4 * parent_rate;
         pdf = mfi = -1;
@@ -144,25 +141,41 @@ static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
                 return -EINVAL;
         pdf--;
 
-        temp64 = rate * (pdf+1) - quad_parent_rate * mfi;
-        do_div(temp64, quad_parent_rate/1000000);
+        temp64 = rate * (pdf + 1) - quad_parent_rate * mfi;
+        do_div(temp64, quad_parent_rate / 1000000);
         mfn = (long)temp64;
 
+        reg = mfi << 4 | pdf;
+
+        *dp_op = reg;
+        *dp_mfd = mfd;
+        *dp_mfn = mfn;
+
+        return 0;
+}
+
+static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
+                unsigned long parent_rate)
+{
+        struct clk_pllv2 *pll = to_clk_pllv2(hw);
+        void __iomem *pllbase;
+        u32 dp_ctl, dp_op, dp_mfd, dp_mfn;
+        int ret;
+
+        pllbase = pll->base;
+
+
+        ret = __clk_pllv2_set_rate(rate, parent_rate, &dp_op, &dp_mfd, &dp_mfn);
+        if (ret)
+                return ret;
+
         dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
         /* use dpdck0_2 */
         __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);
-        pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
-        if (pll_hfsm == 0) {
-                reg = mfi << 4 | pdf;
-                __raw_writel(reg, pllbase + MXC_PLL_DP_OP);
-                __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);
-                __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);
-        } else {
-                reg = mfi << 4 | pdf;
-                __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);
-                __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);
-                __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);
-        }
+
+        __raw_writel(dp_op, pllbase + MXC_PLL_DP_OP);
+        __raw_writel(dp_mfd, pllbase + MXC_PLL_DP_MFD);
+        __raw_writel(dp_mfn, pllbase + MXC_PLL_DP_MFN);
 
         return 0;
 }
@@ -170,7 +183,11 @@ static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
 static long clk_pllv2_round_rate(struct clk_hw *hw, unsigned long rate,
                 unsigned long *prate)
 {
-        return rate;
+        u32 dp_op, dp_mfd, dp_mfn;
+
+        __clk_pllv2_set_rate(rate, *prate, &dp_op, &dp_mfd, &dp_mfn);
+        return __clk_pllv2_recalc_rate(*prate, MXC_PLL_DP_CTL_DPDCK0_2_EN,
+                        dp_op, dp_mfd, dp_mfn);
 }
 
 static int clk_pllv2_prepare(struct clk_hw *hw)
diff --git a/arch/arm/mach-imx/crm-regs-imx5.h b/arch/arm/mach-imx/crm-regs-imx5.h
index 5e11ba7daee2..5e3f1f0f4cab 100644
--- a/arch/arm/mach-imx/crm-regs-imx5.h
+++ b/arch/arm/mach-imx/crm-regs-imx5.h
@@ -23,7 +23,7 @@
 #define MX53_DPLL1_BASE         MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
 #define MX53_DPLL2_BASE         MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
 #define MX53_DPLL3_BASE         MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
-#define MX53_DPLL4_BASE         MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
+#define MX53_DPLL4_BASE         MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR)
 
 /* PLL Register Offsets */
 #define MXC_PLL_DP_CTL                  0x00
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index 89493abd497c..20ed2d56c1af 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -12,6 +12,7 @@
 
 #include <linux/errno.h>
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <mach/common.h>
 
 int platform_cpu_kill(unsigned int cpu)
@@ -19,6 +20,44 @@ int platform_cpu_kill(unsigned int cpu)
         return 1;
 }
 
+static inline void cpu_enter_lowpower(void)
+{
+        unsigned int v;
+
+        flush_cache_all();
+        asm volatile(
+                "mcr    p15, 0, %1, c7, c5, 0\n"
+        "       mcr     p15, 0, %1, c7, c10, 4\n"
+        /*
+         * Turn off coherency
+         */
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       bic     %0, %0, %3\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+        "       mrc     p15, 0, %0, c1, c0, 0\n"
+        "       bic     %0, %0, %2\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+          : "=&r" (v)
+          : "r" (0), "Ir" (CR_C), "Ir" (0x40)
+          : "cc");
+}
+
+static inline void cpu_leave_lowpower(void)
+{
+        unsigned int v;
+
+        asm volatile(
+                "mrc    p15, 0, %0, c1, c0, 0\n"
+        "       orr     %0, %0, %1\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       orr     %0, %0, %2\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+          : "=&r" (v)
+          : "Ir" (CR_C), "Ir" (0x40)
+          : "cc");
+}
+
 /*
  * platform-specific code to shutdown a CPU
  *
@@ -26,9 +65,10 @@ int platform_cpu_kill(unsigned int cpu)
  */
 void platform_cpu_die(unsigned int cpu)
 {
-        flush_cache_all();
+        cpu_enter_lowpower();
         imx_enable_cpu(cpu, false);
         cpu_do_idle();
+        cpu_leave_lowpower();
 
         /* We should never return from idle */
         panic("cpu %d unexpectedly exit from shutdown\n", cpu);
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index c515f8ede1a1..6450303f1a7a 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -70,7 +70,6 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
                 I2C_BOARD_INFO("pcf8563", 0x51),
         }, {
                 I2C_BOARD_INFO("tsc2007", 0x48),
-                .type           = "tsc2007",
                 .platform_data  = &tsc2007_info,
                 .irq            = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
         },
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index ac50f1671e38..1e09de50cbcd 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -142,7 +142,6 @@ static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
                 I2C_BOARD_INFO("pcf8563", 0x51),
         }, {
                 I2C_BOARD_INFO("tsc2007", 0x49),
-                .type           = "tsc2007",
                 .platform_data  = &tsc2007_info,
         },
 };
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index dff82eb57cd9..ba09552fe5fe 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -38,7 +38,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <asm/system.h>
+#include <asm/system_info.h>
 #include <mach/common.h>
 #include <mach/iomux-mx27.h>
 
@@ -116,6 +116,8 @@ static const int visstrim_m10_pins[] __initconst = {
         PB23_PF_USB_PWR,
         PB24_PF_USB_OC,
         /* CSI */
+        TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
+        TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
         PB10_PF_CSI_D0,
         PB11_PF_CSI_D1,
         PB12_PF_CSI_D2,
@@ -147,6 +149,24 @@ static struct gpio visstrim_m10_version_gpios[] = {
         { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
 };
 
+static const struct gpio visstrim_m10_gpios[] __initconst = {
+        {
+                .gpio = TVP5150_RSTN,
+                .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
+                .label = "tvp5150_rstn",
+        },
+        {
+                .gpio = TVP5150_PWDN,
+                .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
+                .label = "tvp5150_pwdn",
+        },
+        {
+                .gpio = OTG_PHY_CS_GPIO,
+                .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
+                .label = "usbotg_cs",
+        },
+};
+
 /* Camera */
 static int visstrim_camera_power(struct device *dev, int on)
 {
@@ -190,13 +210,6 @@ static void __init visstrim_camera_init(void)
         struct platform_device *pdev;
         int dma;
 
-        /* Initialize tvp5150 gpios */
-        mxc_gpio_mode(TVP5150_RSTN | GPIO_GPIO | GPIO_OUT);
-        mxc_gpio_mode(TVP5150_PWDN | GPIO_GPIO | GPIO_OUT);
-        gpio_set_value(TVP5150_RSTN, 1);
-        gpio_set_value(TVP5150_PWDN, 0);
-        ndelay(1);
-
         gpio_set_value(TVP5150_PWDN, 1);
         ndelay(1);
         gpio_set_value(TVP5150_RSTN, 0);
@@ -377,10 +390,6 @@ static struct i2c_board_info visstrim_m10_i2c_devices[] = {
 /* USB OTG */
 static int otg_phy_init(struct platform_device *pdev)
 {
-        gpio_set_value(OTG_PHY_CS_GPIO, 0);
-
-        mdelay(10);
-
         return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
 }
 
@@ -435,6 +444,11 @@ static void __init visstrim_m10_board_init(void)
         if (ret)
                 pr_err("Failed to setup pins (%d)\n", ret);
 
+        ret = gpio_request_array(visstrim_m10_gpios,
+                                ARRAY_SIZE(visstrim_m10_gpios));
+        if (ret)
+                pr_err("Failed to request gpios (%d)\n", ret);
+
         imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
         imx27_add_imx_uart0(&uart_pdata);
 
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index d14bbe949a4f..3e7401fca76c 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -32,7 +32,7 @@
  * Memory-mapped I/O on MX21ADS base board
  */
 #define MX21ADS_MMIO_BASE_ADDR   0xf5000000
-#define MX21ADS_MMIO_SIZE        SZ_16M
+#define MX21ADS_MMIO_SIZE        0xc00000
 
 #define MX21ADS_REG_ADDR(offset)    (void __force __iomem *) \
                 (MX21ADS_MMIO_BASE_ADDR + (offset))
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 967ed5b35a45..a8983b9778d1 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -86,6 +86,7 @@ static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
 
 void __init imx3_init_l2x0(void)
 {
+#ifdef CONFIG_CACHE_L2X0
         void __iomem *l2x0_base;
         void __iomem *clkctl_base;
 
@@ -115,6 +116,7 @@ void __init imx3_init_l2x0(void)
         }
 
         l2x0_init(l2x0_base, 0x00030024, 0x00000000);
+#endif
 }
 
 #ifdef CONFIG_SOC_IMX31
@@ -179,6 +181,8 @@ void __init imx31_soc_init(void)
         mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
         mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
 
+        pinctrl_provide_dummies();
+
         if (to_version == 1) {
                 strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
                         strlen(imx31_sdma_pdata.fw_name));
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index feeee17da96b..1d003053d562 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -202,6 +202,8 @@ void __init imx51_soc_init(void)
         mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
         mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
 
+        pinctrl_provide_dummies();
+
         /* i.mx51 has the i.mx35 type sdma */
         imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
 
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index 2222c5739519..b0d3cc49269d 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -20,9 +20,6 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
 #include <linux/leds.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/orion_spi.h>
 #include <linux/i2c.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 25fb3fd418ef..f261cd242643 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -159,6 +159,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
         gate_fn->gate.flags = clk_gate_flags;
         gate_fn->gate.lock = lock;
         gate_fn->gate.hw.init = &init;
+        gate_fn->fn = fn;
 
         /* ops is the gate ops, but with our disable function */
         if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
@@ -193,9 +194,11 @@ static struct clk __init *kirkwood_register_gate_fn(const char *name,
                                     bit_idx, 0, &gating_lock, fn);
 }
 
+static struct clk *ge0, *ge1;
+
 void __init kirkwood_clk_init(void)
 {
-        struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
+        struct clk *runit, *sata0, *sata1, *usb0, *sdio;
         struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
 
         tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
@@ -257,6 +260,9 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
         orion_ge00_init(eth_data,
                         GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
                         IRQ_KIRKWOOD_GE00_ERR);
+        /* The interface forgets the MAC address assigned by u-boot if
+        the clock is turned off, so claim the clk now. */
+        clk_prepare_enable(ge0);
 }
 
 
@@ -268,6 +274,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
         orion_ge01_init(eth_data,
                         GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
                         IRQ_KIRKWOOD_GE01_ERR);
+        clk_prepare_enable(ge1);
 }
 
 
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 3eee37a3b501..a115142f8690 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -38,6 +38,7 @@
 #define IRQ_MASK_HIGH_OFF       0x0014
 
 #define TIMER_VIRT_BASE         (BRIDGE_VIRT_BASE | 0x0300)
+#define TIMER_PHYS_BASE         (BRIDGE_PHYS_BASE | 0x0300)
 
 #define L2_CONFIG_REG           (BRIDGE_VIRT_BASE | 0x0128)
 #define L2_WRITETHROUGH         0x00000010
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index fede3d503efa..c5b68510776b 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -80,6 +80,7 @@
 #define  UART1_VIRT_BASE        (DEV_BUS_VIRT_BASE | 0x2100)
 
 #define BRIDGE_VIRT_BASE        (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
+#define BRIDGE_PHYS_BASE        (KIRKWOOD_REGS_PHYS_BASE | 0x20000)
 
 #define CRYPTO_PHYS_BASE        (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
 
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
deleted file mode 100644
index 0e135a599f3e..000000000000
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __ASM_MACH_GPIO_PXA_H
-#define __ASM_MACH_GPIO_PXA_H
-
-#include <mach/addr-map.h>
-#include <mach/cputype.h>
-#include <mach/irqs.h>
-
-#define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
-
-#define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
-
-#define gpio_to_bank(gpio)      ((gpio) >> 5)
-
-/* NOTE: these macros are defined here to make optimization of
- * gpio_{get,set}_value() to work when 'gpio' is a constant.
- * Usage of these macros otherwise is no longer recommended,
- * use generic GPIO API whenever possible.
- */
-#define GPIO_bit(gpio)  (1 << ((gpio) & 0x1f))
-
-#define GPLR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
-#define GPDR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
-#define GPSR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
-#define GPCR(x)         GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
-
-#include <plat/gpio-pxa.h>
-
-#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
index fcfe0e3bd701..e60c7d98922b 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq.c
@@ -241,6 +241,7 @@ void __init mmp2_init_icu(void)
         icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE;
         icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE;
         icu_data[1].nr_irqs = 2;
+        icu_data[1].cascade_irq = 4;
         icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE;
         icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,
                                                    icu_data[1].virq_base, 0,
@@ -249,6 +250,7 @@ void __init mmp2_init_icu(void)
         icu_data[2].reg_status = mmp_icu_base + 0x154;
         icu_data[2].reg_mask = mmp_icu_base + 0x16c;
         icu_data[2].nr_irqs = 2;
+        icu_data[2].cascade_irq = 5;
         icu_data[2].virq_base = IRQ_MMP2_RTC_BASE;
         icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,
                                                    icu_data[2].virq_base, 0,
@@ -257,6 +259,7 @@ void __init mmp2_init_icu(void)
         icu_data[3].reg_status = mmp_icu_base + 0x180;
         icu_data[3].reg_mask = mmp_icu_base + 0x17c;
         icu_data[3].nr_irqs = 3;
+        icu_data[3].cascade_irq = 9;
         icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE;
         icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,
                                                    icu_data[3].virq_base, 0,
@@ -265,6 +268,7 @@ void __init mmp2_init_icu(void)
         icu_data[4].reg_status = mmp_icu_base + 0x158;
         icu_data[4].reg_mask = mmp_icu_base + 0x170;
         icu_data[4].nr_irqs = 5;
+        icu_data[4].cascade_irq = 17;
         icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE;
         icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,
                                                    icu_data[4].virq_base, 0,
@@ -273,6 +277,7 @@ void __init mmp2_init_icu(void)
         icu_data[5].reg_status = mmp_icu_base + 0x15c;
         icu_data[5].reg_mask = mmp_icu_base + 0x174;
         icu_data[5].nr_irqs = 15;
+        icu_data[5].cascade_irq = 35;
         icu_data[5].virq_base = IRQ_MMP2_MISC_BASE;
         icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,
                                                    icu_data[5].virq_base, 0,
@@ -281,6 +286,7 @@ void __init mmp2_init_icu(void)
         icu_data[6].reg_status = mmp_icu_base + 0x160;
         icu_data[6].reg_mask = mmp_icu_base + 0x178;
         icu_data[6].nr_irqs = 2;
+        icu_data[6].cascade_irq = 51;
         icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE;
         icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,
                                                    icu_data[6].virq_base, 0,
@@ -289,6 +295,7 @@ void __init mmp2_init_icu(void)
         icu_data[7].reg_status = mmp_icu_base + 0x188;
         icu_data[7].reg_mask = mmp_icu_base + 0x184;
         icu_data[7].nr_irqs = 2;
+        icu_data[7].cascade_irq = 55;
         icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE;
         icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,
                                                    icu_data[7].virq_base, 0,
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index c64dbb96dbad..eb187e0e059b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -31,5 +31,6 @@
 #define IRQ_MASK_HIGH_OFF       0x0014
 
 #define TIMER_VIRT_BASE         (BRIDGE_VIRT_BASE | 0x0300)
+#define TIMER_PHYS_BASE         (BRIDGE_PHYS_BASE | 0x0300)
 
 #endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 3674497162e3..e807c4c52a0b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -42,6 +42,7 @@
 #define MV78XX0_CORE0_REGS_PHYS_BASE    0xf1020000
 #define MV78XX0_CORE1_REGS_PHYS_BASE    0xf1024000
 #define MV78XX0_CORE_REGS_VIRT_BASE     0xfe400000
+#define MV78XX0_CORE_REGS_PHYS_BASE     0xfe400000
 #define MV78XX0_CORE_REGS_SIZE          SZ_16K
 
 #define MV78XX0_PCIE_IO_PHYS_BASE(i)    (0xf0800000 + ((i) << 20))
@@ -59,6 +60,7 @@
  * Core-specific peripheral registers.
  */
 #define BRIDGE_VIRT_BASE        (MV78XX0_CORE_REGS_VIRT_BASE)
+#define BRIDGE_PHYS_BASE        (MV78XX0_CORE_REGS_PHYS_BASE)
 
 /*
  * Register Map
diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c
index 5e90b9dcdef8..f5f061757deb 100644
--- a/arch/arm/mach-mxs/mach-apx4devkit.c
+++ b/arch/arm/mach-mxs/mach-apx4devkit.c
@@ -205,6 +205,16 @@ static int apx4devkit_phy_fixup(struct phy_device *phy)
         return 0;
 }
 
+static void __init apx4devkit_fec_phy_clk_enable(void)
+{
+        struct clk *clk;
+
+        /* Enable fec phy clock */
+        clk = clk_get_sys("enet_out", NULL);
+        if (!IS_ERR(clk))
+                clk_prepare_enable(clk);
+}
+
 static void __init apx4devkit_init(void)
 {
         mx28_soc_init();
@@ -225,6 +235,7 @@ static void __init apx4devkit_init(void)
         phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
                         apx4devkit_phy_fixup);
 
+        apx4devkit_fec_phy_clk_enable();
         mx28_add_fec(0, &mx28_fec_pdata);
 
         mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 70a81f900bb5..53c39d239d6e 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -97,11 +97,6 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
 
         gpmc_onenand_init(&board_onenand_data);
 }
-#else
-void
-__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
-{
-}
 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
 
 #if defined(CONFIG_MTD_NAND_OMAP2) || \
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 8ca14e88a31a..2c5d0ed75285 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -83,11 +83,9 @@ static struct musb_hdrc_config musb_config = {
 };
 
 static struct musb_hdrc_platform_data tusb_data = {
-#if defined(CONFIG_USB_MUSB_OTG)
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
         .mode           = MUSB_OTG,
-#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
-        .mode           = MUSB_PERIPHERAL,
-#else /* defined(CONFIG_USB_MUSB_HOST) */
+#else
         .mode           = MUSB_HOST,
 #endif
         .set_power      = tusb_set_power,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 79c6909eeb78..580fd17208da 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -81,13 +81,13 @@ static u8 omap3_beagle_version;
 static struct {
         int mmc1_gpio_wp;
         int usb_pwr_level;
-        int reset_gpio;
+        int dvi_pd_gpio;
         int usr_button_gpio;
         int mmc_caps;
 } beagle_config = {
         .mmc1_gpio_wp = -EINVAL,
         .usb_pwr_level = GPIOF_OUT_INIT_LOW,
-        .reset_gpio = 129,
+        .dvi_pd_gpio = -EINVAL,
         .usr_button_gpio = 4,
         .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
 };
@@ -126,21 +126,21 @@ static void __init omap3_beagle_init_rev(void)
                 printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");
                 omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;
                 beagle_config.mmc1_gpio_wp = 29;
-                beagle_config.reset_gpio = 170;
+                beagle_config.dvi_pd_gpio = 170;
                 beagle_config.usr_button_gpio = 7;
                 break;
         case 6:
                 printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n");
                 omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3;
                 beagle_config.mmc1_gpio_wp = 23;
-                beagle_config.reset_gpio = 170;
+                beagle_config.dvi_pd_gpio = 170;
                 beagle_config.usr_button_gpio = 7;
                 break;
         case 5:
                 printk(KERN_INFO "OMAP3 Beagle Rev: C4\n");
                 omap3_beagle_version = OMAP3BEAGLE_BOARD_C4;
                 beagle_config.mmc1_gpio_wp = 23;
-                beagle_config.reset_gpio = 170;
+                beagle_config.dvi_pd_gpio = 170;
                 beagle_config.usr_button_gpio = 7;
                 break;
         case 0:
@@ -274,11 +274,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
                 if (r)
                         pr_err("%s: unable to configure nDVI_PWR_EN\n",
                                 __func__);
-                r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
-                                     "DVI_LDO_EN");
-                if (r)
-                        pr_err("%s: unable to configure DVI_LDO_EN\n",
-                                __func__);
+
+                beagle_config.dvi_pd_gpio = gpio + 2;
+
         } else {
                 /*
                  * REVISIT: need ehci-omap hooks for external VBUS
@@ -287,7 +285,7 @@ static int beagle_twl_gpio_setup(struct device *dev,
                 if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))
                         pr_err("%s: unable to configure EHCI_nOC\n", __func__);
         }
-        dvi_panel.power_down_gpio = beagle_config.reset_gpio;
+        dvi_panel.power_down_gpio = beagle_config.dvi_pd_gpio;
 
         gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level,
                         "nEN_USB_PWR");
@@ -499,7 +497,7 @@ static void __init omap3_beagle_init(void)
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap3_beagle_init_rev();
 
-        if (beagle_config.mmc1_gpio_wp != -EINVAL)
+        if (gpio_is_valid(beagle_config.mmc1_gpio_wp))
                 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
         mmc[0].caps = beagle_config.mmc_caps;
         omap_hsmmc_init(mmc);
@@ -510,15 +508,13 @@ static void __init omap3_beagle_init(void)
 
         platform_add_devices(omap3_beagle_devices,
                         ARRAY_SIZE(omap3_beagle_devices));
+        if (gpio_is_valid(beagle_config.dvi_pd_gpio))
+                omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT);
         omap_display_init(&beagle_dss_data);
         omap_serial_init();
         omap_sdrc_init(mt46h32m32lf6_sdrc_params,
                                   mt46h32m32lf6_sdrc_params);
 
-        omap_mux_init_gpio(170, OMAP_PIN_INPUT);
-        /* REVISIT leave DVI powered down until it's needed ... */
-        gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD");
-
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 8fa2fc3a4c3c..779734d8ba37 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -494,8 +494,8 @@ static void __init overo_init(void)
 
         regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
-        omap_hsmmc_init(mmc);
         overo_i2c_init();
+        omap_hsmmc_init(mmc);
         omap_display_init(&overo_dss_data);
         omap_serial_init();
         omap_sdrc_init(mt46h32m32lf6_sdrc_params,
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ff53deccecab..df2534de3361 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -144,7 +144,6 @@ static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
         .release_resources = lis302_release,
         .st_min_limits = {-32, 3, 3},
         .st_max_limits = {-3, 32, 32},
-        .irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO),
 };
 #endif
 
@@ -1030,7 +1029,6 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
         {
                 I2C_BOARD_INFO("lis3lv02d", 0x1d),
                 .platform_data = &rx51_lis3lv02d_data,
-                .irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO),
         },
 #endif
 };
@@ -1056,6 +1054,10 @@ static int __init rx51_i2c_init(void)
         omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
         omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
                               ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
+#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
+        rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
+        rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
+#endif
         omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
                               ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
         return 0;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0e8cc8..1efdec236ae8 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3514,7 +3514,7 @@ int __init omap3xxx_clk_init(void)
         struct omap_clk *c;
         u32 cpu_clkflg = 0;
 
-        if (cpu_is_omap3517()) {
+        if (soc_is_am35xx()) {
                 cpu_mask = RATE_IN_34XX;
                 cpu_clkflg = CK_AM35XX;
         } else if (cpu_is_omap3630()) {
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f6603848..ba6f9a0a43e9 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -84,6 +84,7 @@ static struct clk slimbus_clk = {
 
 static struct clk sys_32k_ck = {
         .name           = "sys_32k_ck",
+        .clkdm_name     = "prm_clkdm",
         .rate           = 32768,
         .ops            = &clkops_null,
 };
@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = {
         .name           = "ddrphy_ck",
         .parent         = &dpll_core_m2_ck,
         .ops            = &clkops_null,
+        .clkdm_name     = "l3_emif_clkdm",
         .fixed_div      = 2,
         .recalc         = &omap_fixed_divisor_recalc,
 };
@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
 static struct clk dpll_mpu_m2_ck = {
         .name           = "dpll_mpu_m2_ck",
         .parent         = &dpll_mpu_ck,
+        .clkdm_name     = "cm_clkdm",
         .clksel         = dpll_mpu_m2_div,
         .clksel_reg     = OMAP4430_CM_DIV_M2_DPLL_MPU,
         .clksel_mask    = OMAP4430_DPLL_CLKOUT_DIV_MASK,
@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = {
 static struct clk l3_div_ck = {
         .name           = "l3_div_ck",
         .parent         = &div_core_ck,
+        .clkdm_name     = "cm_clkdm",
         .clksel         = l3_div_div,
         .clksel_reg     = OMAP4430_CM_CLKSEL_CORE,
         .clksel_mask    = OMAP4430_CLKSEL_L3_MASK,
@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = {
 static struct clk trace_clk_div_ck = {
         .name           = "trace_clk_div_ck",
         .parent         = &pmd_trace_clk_mux_ck,
+        .clkdm_name     = "emu_sys_clkdm",
         .clksel         = trace_clk_div_div,
         .clksel_reg     = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL,
         .clksel_mask    = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,
@@ -3412,9 +3417,12 @@ int __init omap4xxx_clk_init(void)
         if (cpu_is_omap443x()) {
                 cpu_mask = RATE_IN_4430;
                 cpu_clkflg = CK_443X;
-        } else if (cpu_is_omap446x()) {
+        } else if (cpu_is_omap446x() || cpu_is_omap447x()) {
                 cpu_mask = RATE_IN_4460 | RATE_IN_4430;
                 cpu_clkflg = CK_446X | CK_443X;
+
+                if (cpu_is_omap447x())
+                        pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
         } else {
                 return 0;
         }
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index f7b58609bad8..6227e9505c2d 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -31,12 +31,16 @@
  *
  * CLKDM_NO_AUTODEPS: Prevent "autodeps" from being added/removed from this
  *     clockdomain.  (Currently, this applies to OMAP3 clockdomains only.)
+ * CLKDM_ACTIVE_WITH_MPU: The PRCM guarantees that this clockdomain is
+ *     active whenever the MPU is active.  True for interconnects and
+ *     the WKUP clockdomains.
  */
 #define CLKDM_CAN_FORCE_SLEEP                   (1 << 0)
 #define CLKDM_CAN_FORCE_WAKEUP                  (1 << 1)
 #define CLKDM_CAN_ENABLE_AUTO                   (1 << 2)
 #define CLKDM_CAN_DISABLE_AUTO                  (1 << 3)
 #define CLKDM_NO_AUTODEPS                       (1 << 4)
+#define CLKDM_ACTIVE_WITH_MPU                   (1 << 5)
 
 #define CLKDM_CAN_HWSUP         (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
 #define CLKDM_CAN_SWSUP         (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 839145e1cfbe..4972219653ce 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -88,4 +88,5 @@ struct clockdomain wkup_common_clkdm = {
         .name           = "wkup_clkdm",
         .pwrdm          = { .name = "wkup_pwrdm" },
         .dep_bit        = OMAP_EN_WKUP_SHIFT,
+        .flags          = CLKDM_ACTIVE_WITH_MPU,
 };
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c53425847493..7f2133abe7d3 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -381,7 +381,7 @@ static struct clockdomain l4_wkup_44xx_clkdm = {
         .cm_inst          = OMAP4430_PRM_WKUP_CM_INST,
         .clkdm_offs       = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
         .dep_bit          = OMAP4430_L4WKUP_STATDEP_SHIFT,
-        .flags            = CLKDM_CAN_HWSUP,
+        .flags            = CLKDM_CAN_HWSUP | CLKDM_ACTIVE_WITH_MPU,
 };
 
 static struct clockdomain emu_sys_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index a7bc096bd407..f24e3f7a2bbc 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -22,4 +22,15 @@
  */
 #define MAX_MODULE_READY_TIME           2000
 
+/*
+ * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
+ * the PRCM to request that a module enter the inactive state in the
+ * case of OMAP2 & 3.  In the case of OMAP4 this is the max duration
+ * in microseconds for the module to reach the inactive state from
+ * a functional state.
+ * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
+ * kernel init.
+ */
+#define MAX_MODULE_DISABLE_TIME         5000
+
 #endif
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 8c86d294b1a3..1a39945d9ff8 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off
 
         omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
                            CLKCTRL_IDLEST_DISABLED),
-                          MAX_MODULE_READY_TIME, i);
+                          MAX_MODULE_DISABLE_TIME, i);
 
-        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+        return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 54d49ddb9b81..5fb47a14f4ba 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -271,9 +271,9 @@ static struct platform_device *create_simple_dss_pdev(const char *pdev_name,
                 goto err;
         }
 
-        r = omap_device_register(pdev);
+        r = platform_device_add(pdev);
         if (r) {
-                pr_err("Could not register omap_device for %s\n", pdev_name);
+                pr_err("Could not register platform_device for %s\n", pdev_name);
                 goto err;
         }
 
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 845309f146fe..88ffa1e645cd 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -20,6 +20,9 @@
 
 #include <linux/module.h>
 #include <linux/platform_device.h>
+
+#include <asm/memblock.h>
+
 #include "cm2xxx_3xxx.h"
 #include "prm2xxx_3xxx.h"
 #ifdef CONFIG_BRIDGE_DVFS
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 0389b3264abe..00486a8564fd 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -247,6 +247,17 @@ void __init omap3xxx_check_features(void)
         omap_features |= OMAP3_HAS_SDRC;
 
         /*
+         * am35x fixups:
+         * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as
+         *   reserved and therefore return 0 when read.  Unfortunately,
+         *   OMAP3_CHECK_FEATURE() will interpret some of those zeroes to
+         *   mean that a feature is present even though it isn't so clear
+         *   the incorrectly set feature bits.
+         */
+        if (soc_is_am35xx())
+                omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP);
+
+        /*
          * TODO: Get additional info (where applicable)
          *       e.g. Size of L2 cache.
          */
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index fdc4303be563..6038a8c84b74 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
         ct->chip.irq_ack = omap_mask_ack_irq;
         ct->chip.irq_mask = irq_gc_mask_disable_reg;
         ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
+        ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;
 
         ct->regs.enable = INTC_MIR_CLEAR0;
         ct->regs.disable = INTC_MIR_SET0;
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 80e55c5c9998..9fe6829f4c16 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -41,6 +41,7 @@
 #include "control.h"
 #include "mux.h"
 #include "prm.h"
+#include "common.h"
 
 #define OMAP_MUX_BASE_OFFSET            0x30    /* Offset from CTRL_BASE */
 #define OMAP_MUX_BASE_SZ                0x5ca
@@ -217,8 +218,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
         return -ENODEV;
 }
 
-static int __init
-omap_mux_get_by_name(const char *muxname,
+int __init omap_mux_get_by_name(const char *muxname,
                         struct omap_mux_partition **found_partition,
                         struct omap_mux **found_mux)
 {
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 69fe060a0b75..471e62a74a16 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -59,6 +59,7 @@
 #define OMAP_PIN_OFF_WAKEUPENABLE       OMAP_WAKEUP_EN
 
 #define OMAP_MODE_GPIO(x)       (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE4)
+#define OMAP_MODE_UART(x)       (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE0)
 
 /* Flags for omapX_mux_init */
 #define OMAP_PACKAGE_MASK               0xffff
@@ -225,8 +226,18 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads);
  */
 void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
 
+int omap_mux_get_by_name(const char *muxname,
+                struct omap_mux_partition **found_partition,
+                struct omap_mux **found_mux);
 #else
 
+static inline int omap_mux_get_by_name(const char *muxname,
+                struct omap_mux_partition **found_partition,
+                struct omap_mux **found_mux)
+{
+        return 0;
+}
+
 static inline int omap_mux_init_gpio(int gpio, int val)
 {
         return 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index bf86f7e8f91f..2d710f50fca2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
         if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
                 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
         if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
-                _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
+                _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
 
         /* XXX test pwrdm_get_wken for this hwmod's subsystem */
 
@@ -1124,15 +1124,18 @@ static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap
  * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  * @oh: struct omap_hwmod *
  *
- * If module is marked as SWSUP_SIDLE, force the module out of slave
- * idle; otherwise, configure it for smart-idle.  If module is marked
- * as SWSUP_MSUSPEND, force the module out of master standby;
- * otherwise, configure it for smart-standby.  No return value.
+ * Ensure that the OCP_SYSCONFIG register for the IP block represented
+ * by @oh is set to indicate to the PRCM that the IP block is active.
+ * Usually this means placing the module into smart-idle mode and
+ * smart-standby, but if there is a bug in the automatic idle handling
+ * for the IP block, it may need to be placed into the force-idle or
+ * no-idle variants of these modes.  No return value.
  */
 static void _enable_sysc(struct omap_hwmod *oh)
 {
         u8 idlemode, sf;
         u32 v;
+        bool clkdm_act;
 
         if (!oh->class->sysc)
                 return;
@@ -1141,8 +1144,16 @@ static void _enable_sysc(struct omap_hwmod *oh)
         sf = oh->class->sysc->sysc_flags;
 
         if (sf & SYSC_HAS_SIDLEMODE) {
-                idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
-                        HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+                clkdm_act = ((oh->clkdm &&
+                              oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
+                             (oh->_clk && oh->_clk->clkdm &&
+                              oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
+                if (clkdm_act && !(oh->class->sysc->idlemodes &
+                                   (SIDLE_SMART | SIDLE_SMART_WKUP)))
+                        idlemode = HWMOD_IDLEMODE_FORCE;
+                else
+                        idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
+                                HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
                 _set_slave_idlemode(oh, idlemode, &v);
         }
 
@@ -1208,8 +1219,13 @@ static void _idle_sysc(struct omap_hwmod *oh)
         sf = oh->class->sysc->sysc_flags;
 
         if (sf & SYSC_HAS_SIDLEMODE) {
-                idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
-                        HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
+                /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
+                if (oh->flags & HWMOD_SWSUP_SIDLE ||
+                    !(oh->class->sysc->idlemodes &
+                      (SIDLE_SMART | SIDLE_SMART_WKUP)))
+                        idlemode = HWMOD_IDLEMODE_FORCE;
+                else
+                        idlemode = HWMOD_IDLEMODE_SMART;
                 _set_slave_idlemode(oh, idlemode, &v);
         }
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 950454a3fa31..b7bcba5221ba 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
         .rev_offs       = 0x0000,
         .sysc_offs      = 0x0004,
         .sysc_flags     = SYSC_HAS_SIDLEMODE,
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                           SIDLE_SMART_WKUP),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO),
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
         .name           = "dss_hdmi",
         .class          = &omap44xx_hdmi_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
+        /*
+         * HDMI audio requires to use no-idle mode. Hence,
+         * set idle mode by software.
+         */
+        .flags          = HWMOD_SWSUP_SIDLE,
         .mpu_irqs       = omap44xx_dss_hdmi_irqs,
         .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
         .main_clk       = "dss_48mhz_clk",
@@ -1924,7 +1928,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
 
 static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
         { .role = "pad_fck", .clk = "pad_clks_ck" },
-        { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },
+        { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
 };
 
 static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
@@ -1959,7 +1963,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
 
 static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
         { .role = "pad_fck", .clk = "pad_clks_ck" },
-        { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },
+        { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
 };
 
 static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
@@ -1994,7 +1998,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
 
 static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
         { .role = "pad_fck", .clk = "pad_clks_ck" },
-        { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },
+        { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
 };
 
 static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
@@ -2029,7 +2033,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
 
 static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
         { .role = "pad_fck", .clk = "pad_clks_ck" },
-        { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },
+        { .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
 };
 
 static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
@@ -3860,7 +3864,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
 };
 
 /* usb_host_fs -> l3_main_2 */
-static struct omap_hwmod_ocp_if omap44xx_usb_host_fs__l3_main_2 = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_usb_host_fs__l3_main_2 = {
         .master         = &omap44xx_usb_host_fs_hwmod,
         .slave          = &omap44xx_l3_main_2_hwmod,
         .clk            = "l3_div_ck",
@@ -3918,7 +3922,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
 };
 
 /* aess -> l4_abe */
-static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_aess__l4_abe = {
         .master         = &omap44xx_aess_hwmod,
         .slave          = &omap44xx_l4_abe_hwmod,
         .clk            = "ocp_abe_iclk",
@@ -4009,7 +4013,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
 };
 
 /* l4_abe -> aess */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = {
         .master         = &omap44xx_l4_abe_hwmod,
         .slave          = &omap44xx_aess_hwmod,
         .clk            = "ocp_abe_iclk",
@@ -4027,7 +4031,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
 };
 
 /* l4_abe -> aess (dma) */
-static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess_dma = {
         .master         = &omap44xx_l4_abe_hwmod,
         .slave          = &omap44xx_aess_hwmod,
         .clk            = "ocp_abe_iclk",
@@ -5853,7 +5857,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = {
 };
 
 /* l4_cfg -> usb_host_fs */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_fs = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
         .master         = &omap44xx_l4_cfg_hwmod,
         .slave          = &omap44xx_usb_host_fs_hwmod,
         .clk            = "l4_div_ck",
@@ -6010,13 +6014,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
         &omap44xx_iva__l3_main_2,
         &omap44xx_l3_main_1__l3_main_2,
         &omap44xx_l4_cfg__l3_main_2,
-        &omap44xx_usb_host_fs__l3_main_2,
+        /* &omap44xx_usb_host_fs__l3_main_2, */
         &omap44xx_usb_host_hs__l3_main_2,
         &omap44xx_usb_otg_hs__l3_main_2,
         &omap44xx_l3_main_1__l3_main_3,
         &omap44xx_l3_main_2__l3_main_3,
         &omap44xx_l4_cfg__l3_main_3,
-        &omap44xx_aess__l4_abe,
+        /* &omap44xx_aess__l4_abe, */
         &omap44xx_dsp__l4_abe,
         &omap44xx_l3_main_1__l4_abe,
         &omap44xx_mpu__l4_abe,
@@ -6025,8 +6029,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
         &omap44xx_l4_cfg__l4_wkup,
         &omap44xx_mpu__mpu_private,
         &omap44xx_l4_cfg__ocp_wp_noc,
-        &omap44xx_l4_abe__aess,
-        &omap44xx_l4_abe__aess_dma,
+        /* &omap44xx_l4_abe__aess, */
+        /* &omap44xx_l4_abe__aess_dma, */
         &omap44xx_l3_main_2__c2c,
         &omap44xx_l4_wkup__counter_32k,
         &omap44xx_l4_cfg__ctrl_module_core,
@@ -6132,7 +6136,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
         &omap44xx_l4_per__uart2,
         &omap44xx_l4_per__uart3,
         &omap44xx_l4_per__uart4,
-        &omap44xx_l4_cfg__usb_host_fs,
+        /* &omap44xx_l4_cfg__usb_host_fs, */
         &omap44xx_l4_cfg__usb_host_hs,
         &omap44xx_l4_cfg__usb_otg_hs,
         &omap44xx_l4_cfg__usb_tll_hs,
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index a05a62f9ee5b..acc216491b8a 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -155,10 +155,11 @@ static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
         u8 multi = error & L3_ERROR_LOG_MULTI;
         u32 address = omap3_l3_decode_addr(error_addr);
 
-        WARN(true, "%s seen by %s %s at address %x\n",
+        pr_err("%s seen by %s %s at address %x\n",
                         omap3_l3_code_string(code),
                         omap3_l3_initiator_string(initid),
                         multi ? "Multiple Errors" : "", address);
+        WARN_ON(1);
 
         return IRQ_HANDLED;
 }
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477e6f82..d52651a05daa 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -239,21 +239,15 @@ void am35x_set_mode(u8 musb_mode)
 
         devconf2 &= ~CONF2_OTGMODE;
         switch (musb_mode) {
-#ifdef  CONFIG_USB_MUSB_HDRC_HCD
         case MUSB_HOST:         /* Force VBUS valid, ID = 0 */
                 devconf2 |= CONF2_FORCE_HOST;
                 break;
-#endif
-#ifdef  CONFIG_USB_GADGET_MUSB_HDRC
         case MUSB_PERIPHERAL:   /* Force VBUS valid, ID = 1 */
                 devconf2 |= CONF2_FORCE_DEVICE;
                 break;
-#endif
-#ifdef  CONFIG_USB_MUSB_OTG
         case MUSB_OTG:          /* Don't override the VBUS/ID comparators */
                 devconf2 |= CONF2_NO_OVERRIDE;
                 break;
-#endif
         default:
                 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
         }
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a34023d0ca7c..3a595e899724 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -724,6 +724,7 @@ int __init omap3_pm_init(void)
         ret = request_irq(omap_prcm_event_to_irq("io"),
                 _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io",
                 omap3_pm_init);
+        enable_irq(omap_prcm_event_to_irq("io"));
 
         if (ret) {
                 pr_err("pm: Failed to request pm_io irq\n");
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9ce765407ad5..21cb74003a56 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -15,6 +15,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/irq.h>
 
 #include "common.h"
 #include <plat/cpu.h>
@@ -303,8 +304,15 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask)
 
 static int __init omap3xxx_prcm_init(void)
 {
-        if (cpu_is_omap34xx())
-                return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
-        return 0;
+        int ret = 0;
+
+        if (cpu_is_omap34xx()) {
+                ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
+                if (!ret)
+                        irq_set_status_flags(omap_prcm_event_to_irq("io"),
+                                             IRQ_NOAUTOEN);
+        }
+
+        return ret;
 }
 subsys_initcall(omap3xxx_prcm_init);
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 292d4aaca068..c1b93c752d70 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -57,6 +57,7 @@ struct omap_uart_state {
 
         struct list_head node;
         struct omap_hwmod *oh;
+        struct omap_device_pad default_omap_uart_pads[2];
 };
 
 static LIST_HEAD(uart_list);
@@ -126,11 +127,70 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
 #endif /* CONFIG_PM */
 
 #ifdef CONFIG_OMAP_MUX
-static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
+
+#define OMAP_UART_DEFAULT_PAD_NAME_LEN  28
+static char rx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN],
+                tx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN] __initdata;
+
+static void  __init
+omap_serial_fill_uart_tx_rx_pads(struct omap_board_data *bdata,
+                                struct omap_uart_state *uart)
+{
+        uart->default_omap_uart_pads[0].name = rx_pad_name;
+        uart->default_omap_uart_pads[0].flags = OMAP_DEVICE_PAD_REMUX |
+                                                        OMAP_DEVICE_PAD_WAKEUP;
+        uart->default_omap_uart_pads[0].enable = OMAP_PIN_INPUT |
+                                                        OMAP_MUX_MODE0;
+        uart->default_omap_uart_pads[0].idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0;
+        uart->default_omap_uart_pads[1].name = tx_pad_name;
+        uart->default_omap_uart_pads[1].enable = OMAP_PIN_OUTPUT |
+                                                        OMAP_MUX_MODE0;
+        bdata->pads = uart->default_omap_uart_pads;
+        bdata->pads_cnt = ARRAY_SIZE(uart->default_omap_uart_pads);
+}
+
+static void  __init omap_serial_check_wakeup(struct omap_board_data *bdata,
+                                                struct omap_uart_state *uart)
 {
+        struct omap_mux_partition *tx_partition = NULL, *rx_partition = NULL;
+        struct omap_mux *rx_mux = NULL, *tx_mux = NULL;
+        char *rx_fmt, *tx_fmt;
+        int uart_nr = bdata->id + 1;
+
+        if (bdata->id != 2) {
+                rx_fmt = "uart%d_rx.uart%d_rx";
+                tx_fmt = "uart%d_tx.uart%d_tx";
+        } else {
+                rx_fmt = "uart%d_rx_irrx.uart%d_rx_irrx";
+                tx_fmt = "uart%d_tx_irtx.uart%d_tx_irtx";
+        }
+
+        snprintf(rx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, rx_fmt,
+                        uart_nr, uart_nr);
+        snprintf(tx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, tx_fmt,
+                        uart_nr, uart_nr);
+
+        if (omap_mux_get_by_name(rx_pad_name, &rx_partition, &rx_mux) >= 0 &&
+                        omap_mux_get_by_name
+                                (tx_pad_name, &tx_partition, &tx_mux) >= 0) {
+                u16 tx_mode, rx_mode;
+
+                tx_mode = omap_mux_read(tx_partition, tx_mux->reg_offset);
+                rx_mode = omap_mux_read(rx_partition, rx_mux->reg_offset);
+
+                /*
+                 * Check if uart is used in default tx/rx mode i.e. in mux mode0
+                 * if yes then configure rx pin for wake up capability
+                 */
+                if (OMAP_MODE_UART(rx_mode) && OMAP_MODE_UART(tx_mode))
+                        omap_serial_fill_uart_tx_rx_pads(bdata, uart);
+        }
 }
 #else
-static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
+static void __init omap_serial_check_wakeup(struct omap_board_data *bdata,
+                struct omap_uart_state *uart)
+{
+}
 #endif
 
 static char *cmdline_find_option(char *str)
@@ -287,8 +347,7 @@ void __init omap_serial_board_init(struct omap_uart_port_info *info)
                 bdata.pads = NULL;
                 bdata.pads_cnt = 0;
 
-                if (cpu_is_omap44xx() || cpu_is_omap34xx())
-                        omap_serial_fill_default_pads(&bdata);
+                omap_serial_check_wakeup(&bdata, uart);
 
                 if (!info)
                         omap_serial_init_port(&bdata, NULL);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 119d5a910f3a..43a979075338 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -32,6 +32,7 @@
 #include "twl-common.h"
 #include "pm.h"
 #include "voltage.h"
+#include "mux.h"
 
 static struct i2c_board_info __initdata pmic_i2c_board_info = {
         .addr           = 0x48,
@@ -77,6 +78,7 @@ void __init omap4_pmic_init(const char *pmic_type,
                     struct twl6040_platform_data *twl6040_data, int twl6040_irq)
 {
         /* PMIC part*/
+        omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
         strncpy(omap4_i2c1_board_info[0].type, pmic_type,
                 sizeof(omap4_i2c1_board_info[0].type));
         omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index b19d1b43c12e..c4a576856661 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -41,12 +41,10 @@ static struct musb_hdrc_config musb_config = {
 };
 
 static struct musb_hdrc_platform_data musb_plat = {
-#ifdef CONFIG_USB_MUSB_OTG
+#ifdef CONFIG_USB_GADGET_MUSB_HDRC
         .mode           = MUSB_OTG,
-#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
+#else
         .mode           = MUSB_HOST,
-#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
-        .mode           = MUSB_PERIPHERAL,
 #endif
         /* .clock is set dynamically */
         .config         = &musb_config,
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index db84a46ce7fd..805bea6edf17 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -300,7 +300,7 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
                 printk(error, 3, status);
                 return status;
         }
-        tusb_resources[2].start = irq + IH_GPIO_BASE;
+        tusb_resources[2].start = gpio_to_irq(irq);
 
         /* set up memory timings ... can speed them up later */
         if (!ps_refclk) {
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 96484bcd34ca..11a3c1e9801f 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -35,5 +35,5 @@
 #define MAIN_IRQ_MASK           (ORION5X_BRIDGE_VIRT_BASE | 0x204)
 
 #define TIMER_VIRT_BASE         (ORION5X_BRIDGE_VIRT_BASE | 0x300)
-
+#define TIMER_PHYS_BASE         (ORION5X_BRIDGE_PHYS_BASE | 0x300)
 #endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
new file mode 100644
index 000000000000..1aa5d0a50a0b
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-orion5x/include/mach/io.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_IO_H
+#define __ASM_ARCH_IO_H
+
+#include <mach/orion5x.h>
+#include <asm/sizes.h>
+
+#define IO_SPACE_LIMIT          SZ_2M
+static inline void __iomem *__io(unsigned long addr)
+{
+        return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE);
+}
+
+#define __io(a)                  __io(a)
+#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 2745f5d95b3f..683e085ce162 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -82,6 +82,7 @@
 #define  UART1_VIRT_BASE                (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
 
 #define ORION5X_BRIDGE_VIRT_BASE        (ORION5X_REGS_VIRT_BASE | 0x20000)
+#define ORION5X_BRIDGE_PHYS_BASE        (ORION5X_REGS_PHYS_BASE | 0x20000)
 
 #define ORION5X_PCI_VIRT_BASE           (ORION5X_REGS_VIRT_BASE | 0x30000)
 
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index d09da6a746b8..d3de84b0dcbe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -127,7 +127,11 @@ static unsigned long hx4700_pin_config[] __initdata = {
         GPIO19_SSP2_SCLK,
         GPIO86_SSP2_RXD,
         GPIO87_SSP2_TXD,
-        GPIO88_GPIO,
+        GPIO88_GPIO | MFP_LPM_DRIVE_HIGH,       /* TSC2046_CS */
+
+        /* BQ24022 Regulator */
+        GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT,      /* BQ24022_nCHARGE_EN */
+        GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT,      /* BQ24022_ISET2 */
 
         /* HX4700 specific input GPIOs */
         GPIO12_GPIO | WAKEUP_ON_EDGE_RISE,      /* ASIC3_IRQ */
@@ -135,6 +139,10 @@ static unsigned long hx4700_pin_config[] __initdata = {
         GPIO14_GPIO,    /* nWLAN_IRQ */
 
         /* HX4700 specific output GPIOs */
+        GPIO61_GPIO | MFP_LPM_DRIVE_HIGH,       /* W3220_nRESET */
+        GPIO71_GPIO | MFP_LPM_DRIVE_HIGH,       /* ASIC3_nRESET */
+        GPIO81_GPIO | MFP_LPM_DRIVE_HIGH,       /* CPU_GP_nRESET */
+        GPIO116_GPIO | MFP_LPM_DRIVE_HIGH,      /* CPU_HW_nRESET */
         GPIO102_GPIO | MFP_LPM_DRIVE_LOW,       /* SYNAPTICS_POWER_ON */
 
         GPIO10_GPIO,    /* GSM_IRQ */
@@ -872,14 +880,19 @@ static struct gpio global_gpios[] = {
         { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
         { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
         { GPIO32_HX4700_RS232_ON,         GPIOF_OUT_INIT_HIGH, "RS232_ON" },
+        { GPIO61_HX4700_W3220_nRESET,     GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
         { GPIO71_HX4700_ASIC3_nRESET,     GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
+        { GPIO81_HX4700_CPU_GP_nRESET,    GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
         { GPIO82_HX4700_EUART_RESET,      GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
+        { GPIO116_HX4700_CPU_HW_nRESET,   GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
 };
 
 static void __init hx4700_init(void)
 {
         int ret;
 
+        PCFR = PCFR_GPR_EN | PCFR_OPDE;
+
         pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
         gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
         ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 414364eb426c..cb2883d553b5 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -106,7 +106,7 @@ static struct clk s3c2440_clk_cam_upll = {
 static struct clk s3c2440_clk_ac97 = {
         .name           = "ac97",
         .enable         = s3c2410_clkcon_enable,
-        .ctrlbit        = S3C2440_CLKCON_CAMERA,
+        .ctrlbit        = S3C2440_CLKCON_AC97,
 };
 
 static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S
index 30cc6721665b..85863741ef8b 100644
--- a/arch/arm/mach-sa1100/sleep.S
+++ b/arch/arm/mach-sa1100/sleep.S
@@ -38,9 +38,9 @@ ENTRY(sa1100_finish_suspend)
         orr     r4, r4, #MDREFR_K1DB2
         ldr     r5, =PPCR
 
-        @ Pre-load __udelay into the I-cache
+        @ Pre-load __loop_udelay into the I-cache
         mov     r0, #1
-        bl      __udelay
+        bl      __loop_udelay
         mov     r0, r0
 
         @ The following must all exist in a single cache line to
@@ -53,11 +53,11 @@ ENTRY(sa1100_finish_suspend)
         @ delay 90us and set CPU PLL to lowest speed
         @ fixes resume problem on high speed SA1110
         mov     r0, #90
-        bl      __udelay
+        bl      __loop_udelay
         mov     r1, #0
         str     r1, [r5]
         mov     r0, #90
-        bl      __udelay
+        bl      __loop_udelay
 
         /*
          * SA1110 SDRAM controller workaround.  register values:
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index f31383c32f9c..df33909205e2 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -186,6 +186,12 @@ config SH_TIMER_TMU
         help
           This enables build of the TMU timer driver.
 
+config EM_TIMER_STI
+        bool "STI timer driver"
+        default y
+        help
+          This enables build of the STI timer driver.
+
 endmenu
 
 config SH_CLK_CPG
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 9e37026ef9dd..9bd135531d76 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -779,6 +779,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
         .init_irq       = r8a7740_init_irq,
         .handle_irq     = shmobile_handle_irq_intc,
         .init_machine   = eva_init,
+        .init_late      = shmobile_init_late,
         .timer          = &shmobile_timer,
         .dt_compat      = eva_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 7bc5e7d39f9b..6a33cf393428 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -80,6 +80,7 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
         .init_irq       = emev2_init_irq,
         .handle_irq     = gic_handle_irq,
         .init_machine   = kzm9d_add_standard_devices,
+        .init_late      = shmobile_init_late,
         .timer          = &shmobile_timer,
         .dt_compat      = kzm9d_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index d8e33b682832..c0ae815e7beb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -455,6 +455,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
         .init_irq       = sh73a0_init_irq,
         .handle_irq     = gic_handle_irq,
         .init_machine   = kzm_init,
+        .init_late      = shmobile_init_late,
         .timer          = &shmobile_timer,
         .dt_compat      = kzm9g_boards_compat_dt,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index b577f7c44678..150122a44630 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1512,6 +1512,9 @@ static void __init mackerel_init(void)
         gpio_request(GPIO_FN_SDHID0_1, NULL);
         gpio_request(GPIO_FN_SDHID0_0, NULL);
 
+        /* SDHI0 PORT172 card-detect IRQ26 */
+        gpio_request(GPIO_FN_IRQ26_172, NULL);
+
 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
         /* enable SDHI1 */
         gpio_request(GPIO_FN_SDHICMD1, NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 472d1f5361e5..3946c4ba2aa8 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = {
 
 enum { MSTP001,
         MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
-        MSTP219,
+        MSTP219, MSTP218,
         MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-        MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
+        MSTP331, MSTP329, MSTP325, MSTP323,
         MSTP314, MSTP313, MSTP312, MSTP311,
         MSTP303, MSTP302, MSTP301, MSTP300,
         MSTP411, MSTP410, MSTP403,
@@ -497,6 +497,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
         [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
         [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
+        [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
         [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
         [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
         [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
@@ -508,7 +509,6 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
         [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
         [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
-        [MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
         [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
         [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
         [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
@@ -552,6 +552,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
         CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
         CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
+        CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
@@ -563,7 +564,6 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
         CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
-        CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 550b23df4fd4..f04fad4ec4fb 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -35,6 +35,9 @@
 #define INT2SMSKCR3 0xfe7822ac
 #define INT2SMSKCR4 0xfe7822b0
 
+#define INT2NTSR0 0xfe700060
+#define INT2NTSR1 0xfe700064
+
 static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
 {
         return 0; /* always allow wakeup */
@@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
         gic_init(0, 29, gic_dist_base, gic_cpu_base);
         gic_arch_extn.irq_set_wake = r8a7779_set_wake;
 
+        /* route all interrupts to ARM */
+        __raw_writel(0xffffffff, INT2NTSR0);
+        __raw_writel(0x3fffffff, INT2NTSR1);
+
         /* unmask all known interrupts in INTCS2 */
         __raw_writel(0xfffffff0, INT2SMSKCR0);
         __raw_writel(0xfff7ffff, INT2SMSKCR1);
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index bacdd667e3b1..fde0d23121dc 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -22,10 +22,20 @@
 #include <mach/common.h>
 #include <mach/emev2.h>
 
+#ifdef CONFIG_ARCH_SH73A0
 #define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
                         of_machine_is_compatible("renesas,sh73a0"))
+#else
+#define is_sh73a0() (0)
+#endif
+
 #define is_r8a7779() machine_is_marzen()
+
+#ifdef CONFIG_ARCH_EMEV2
 #define is_emev2() of_machine_is_compatible("renesas,emev2")
+#else
+#define is_emev2() (0)
+#endif
 
 static unsigned int __init shmobile_smp_get_core_count(void)
 {
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 6a4bd582c028..fafce9ce8218 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -484,7 +484,7 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
         },
 };
 
-#define SH7372_CHCLR 0x220
+#define SH7372_CHCLR (0x220 - 0x20)
 
 static const struct sh_dmae_channel sh7372_dmae_channels[] = {
         {
diff --git a/arch/arm/mach-spear13xx/include/mach/debug-macro.S b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
index ea1564609bd4..9e3ae6bfe50d 100644
--- a/arch/arm/mach-spear13xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
@@ -4,7 +4,7 @@
  * Debugging macro include header spear13xx machine family
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/dma.h b/arch/arm/mach-spear13xx/include/mach/dma.h
index 383ab04dc6c9..d50bdb605925 100644
--- a/arch/arm/mach-spear13xx/include/mach/dma.h
+++ b/arch/arm/mach-spear13xx/include/mach/dma.h
@@ -4,7 +4,7 @@
  * DMA information for SPEAr13xx machine family
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear13xx/include/mach/generic.h
index 6d8c45b9f298..dac57fd0cdfd 100644
--- a/arch/arm/mach-spear13xx/include/mach/generic.h
+++ b/arch/arm/mach-spear13xx/include/mach/generic.h
@@ -4,7 +4,7 @@
  * spear13xx machine family generic header file
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/gpio.h b/arch/arm/mach-spear13xx/include/mach/gpio.h
index cd6f4f86a56b..85f176311f63 100644
--- a/arch/arm/mach-spear13xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear13xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
  * GPIO macros for SPEAr13xx machine family
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/irqs.h b/arch/arm/mach-spear13xx/include/mach/irqs.h
index f542a24aa5f2..271a62b4cd31 100644
--- a/arch/arm/mach-spear13xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear13xx/include/mach/irqs.h
@@ -4,7 +4,7 @@
  * IRQ helper macros for spear13xx machine family
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
index 30c57ef72686..65f27def239b 100644
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ b/arch/arm/mach-spear13xx/include/mach/spear.h
@@ -4,7 +4,7 @@
  * spear13xx Machine family specific definition
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/timex.h b/arch/arm/mach-spear13xx/include/mach/timex.h
index 31af3e8d976e..3a58b8284a6a 100644
--- a/arch/arm/mach-spear13xx/include/mach/timex.h
+++ b/arch/arm/mach-spear13xx/include/mach/timex.h
@@ -4,7 +4,7 @@
  * SPEAr3XX machine family specific timex definitions
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/uncompress.h b/arch/arm/mach-spear13xx/include/mach/uncompress.h
index c7840896ae6e..70fe72f05dea 100644
--- a/arch/arm/mach-spear13xx/include/mach/uncompress.h
+++ b/arch/arm/mach-spear13xx/include/mach/uncompress.h
@@ -4,7 +4,7 @@
  * Serial port stubs for kernel decompress status messages
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c
index fefd15b2f380..732d29bc7330 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear13xx/spear1310.c
@@ -4,7 +4,7 @@
  * SPEAr1310 machine source file
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c
index ee38cbc56869..81e4ed76ad06 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear13xx/spear1340.c
@@ -4,7 +4,7 @@
  * SPEAr1340 machine source file
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index 50b349ae863d..cf936b106e27 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -4,7 +4,7 @@
  * SPEAr13XX machines common source file
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/debug-macro.S b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
index 590519f10d6e..0a6381fad5d9 100644
--- a/arch/arm/mach-spear3xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
@@ -4,7 +4,7 @@
  * Debugging macro include header spear3xx machine family
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar<viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 4a95b9453c2a..ce19113ca791 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -4,7 +4,7 @@
  * SPEAr3XX machine family generic header file
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar<viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/gpio.h b/arch/arm/mach-spear3xx/include/mach/gpio.h
index 451b2081bfc9..2ac74c6db7f1 100644
--- a/arch/arm/mach-spear3xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear3xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
  * GPIO macros for SPEAr3xx machine family
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar<viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index 51bd62a0254c..803de76f5f36 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -4,7 +4,7 @@
  * IRQ helper macros for SPEAr3xx machine family
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
index 18e2ac576f25..6309bf68d6f8 100644
--- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
@@ -4,7 +4,7 @@
  * Miscellaneous registers definitions for SPEAr3xx machine family
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index 51eb953148a9..8cca95193d4d 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -4,7 +4,7 @@
  * SPEAr3xx Machine family specific definition
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/timex.h b/arch/arm/mach-spear3xx/include/mach/timex.h
index a38cc9de876f..9f5d08bd0c44 100644
--- a/arch/arm/mach-spear3xx/include/mach/timex.h
+++ b/arch/arm/mach-spear3xx/include/mach/timex.h
@@ -4,7 +4,7 @@
  * SPEAr3XX machine family specific timex definitions
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/uncompress.h b/arch/arm/mach-spear3xx/include/mach/uncompress.h
index 53ba8bbc0dfa..b909b011f7c8 100644
--- a/arch/arm/mach-spear3xx/include/mach/uncompress.h
+++ b/arch/arm/mach-spear3xx/include/mach/uncompress.h
@@ -4,7 +4,7 @@
  * Serial port stubs for kernel decompress status messages
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index f74a05bdb829..0f882ecb7d81 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -4,7 +4,7 @@
  * SPEAr300 machine source file
  *
  * Copyright (C) 2009-2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 84dfb0900747..bbcf4571d361 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -4,7 +4,7 @@
  * SPEAr310 machine source file
  *
  * Copyright (C) 2009-2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index a88fa841d29d..88d483bcd66a 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -4,7 +4,7 @@
  * SPEAr320 machine source file
  *
  * Copyright (C) 2009-2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index f22419ed74a8..66db5f13af84 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -4,7 +4,7 @@
  * SPEAr3XX machines common source file
  *
  * Copyright (C) 2009-2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
@@ -87,7 +87,7 @@ void __init spear3xx_map_io(void)
 
 static void __init spear3xx_timer_init(void)
 {
-        char pclk_name[] = "pll3_48m_clk";
+        char pclk_name[] = "pll3_clk";
         struct clk *gpt_clk, *pclk;
 
         spear3xx_clk_init();
diff --git a/arch/arm/mach-spear6xx/include/mach/gpio.h b/arch/arm/mach-spear6xx/include/mach/gpio.h
index 3a789dbb69f7..d42cefc0356d 100644
--- a/arch/arm/mach-spear6xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear6xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
  * GPIO macros for SPEAr6xx machine family
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
index 179e45774b3a..c34acc201d34 100644
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -4,7 +4,7 @@
  * Miscellaneous registers definitions for SPEAr6xx machine family
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 2e2e3596583e..9af67d003c62 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -423,7 +423,7 @@ void __init spear6xx_map_io(void)
 
 static void __init spear6xx_timer_init(void)
 {
-        char pclk_name[] = "pll3_48m_clk";
+        char pclk_name[] = "pll3_clk";
         struct clk *gpt_clk, *pclk;
 
         spear6xx_clk_init();
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 4d6a2ee99c3b..5beb7ebe2948 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -33,7 +33,7 @@
 
 static bool is_enabled;
 
-static void tegra_cpu_reset_handler_enable(void)
+static void __init tegra_cpu_reset_handler_enable(void)
 {
         void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
         void __iomem *evp_cpu_reset =
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 9c74ac545849..4fd93f5c49ec 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -580,43 +580,12 @@ static void ux500_uart0_reset(void)
         udelay(1);
 }
 
-/* This needs to be referenced by callbacks */
-struct pinctrl *u0_p;
-struct pinctrl_state *u0_def;
-struct pinctrl_state *u0_sleep;
-
-static void ux500_uart0_init(void)
-{
-        int ret;
-
-        if (IS_ERR(u0_p) || IS_ERR(u0_def))
-                return;
-
-        ret = pinctrl_select_state(u0_p, u0_def);
-        if (ret)
-                pr_err("could not set UART0 defstate\n");
-}
-
-static void ux500_uart0_exit(void)
-{
-        int ret;
-
-        if (IS_ERR(u0_p) || IS_ERR(u0_sleep))
-                return;
-
-        ret = pinctrl_select_state(u0_p, u0_sleep);
-        if (ret)
-                pr_err("could not set UART0 idlestate\n");
-}
-
 static struct amba_pl011_data uart0_plat = {
 #ifdef CONFIG_STE_DMA40
         .dma_filter = stedma40_filter,
         .dma_rx_param = &uart0_dma_cfg_rx,
         .dma_tx_param = &uart0_dma_cfg_tx,
 #endif
-        .init = ux500_uart0_init,
-        .exit = ux500_uart0_exit,
         .reset = ux500_uart0_reset,
 };
 
@@ -638,28 +607,7 @@ static struct amba_pl011_data uart2_plat = {
 
 static void __init mop500_uart_init(struct device *parent)
 {
-        struct amba_device *uart0_device;
-
-        uart0_device = db8500_add_uart0(parent, &uart0_plat);
-        if (uart0_device) {
-                u0_p = pinctrl_get(&uart0_device->dev);
-                if (IS_ERR(u0_p))
-                        dev_err(&uart0_device->dev,
-                                "could not get UART0 pinctrl\n");
-                else {
-                        u0_def = pinctrl_lookup_state(u0_p,
-                                                      PINCTRL_STATE_DEFAULT);
-                        if (IS_ERR(u0_def)) {
-                                dev_err(&uart0_device->dev,
-                                        "could not get UART0 defstate\n");
-                        }
-                        u0_sleep = pinctrl_lookup_state(u0_p,
-                                                        PINCTRL_STATE_SLEEP);
-                        if (IS_ERR(u0_sleep))
-                                dev_err(&uart0_device->dev,
-                                        "could not get UART0 idlestate\n");
-                }
-        }
+        db8500_add_uart0(parent, &uart0_plat);
         db8500_add_uart1(parent, &uart1_plat);
         db8500_add_uart2(parent, &uart2_plat);
 }
@@ -677,11 +625,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
         &ab8500_device,
 };
 
-static struct platform_device *snowball_of_platform_devs[] __initdata = {
-        &snowball_led_dev,
-        &snowball_key_dev,
-};
-
 static void __init mop500_init_machine(void)
 {
         struct device *parent = NULL;
@@ -821,6 +764,11 @@ MACHINE_END
 
 #ifdef CONFIG_MACH_UX500_DT
 
+static struct platform_device *snowball_of_platform_devs[] __initdata = {
+        &snowball_led_dev,
+        &snowball_key_dev,
+};
+
 struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
         /* Requires DMA and call-back bindings. */
         OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
@@ -838,6 +786,8 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
         OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
         OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
+        /* Requires device name bindings. */
+        OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
         {},
 };
 
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 741e71feca78..66e7f00884ab 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -63,8 +63,10 @@ static void __init ux500_timer_init(void)
 
         /* TODO: Once MTU has been DT:ed place code above into else. */
         if (of_have_populated_dt()) {
+#ifdef CONFIG_OF
                 np = of_find_matching_node(NULL, prcmu_timer_of_match);
                 if (!np)
+#endif
                         goto dt_fail;
 
                 tmp_base = of_iomap(np, 0);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index cf4687ee2a7b..cd8ea3588f93 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -169,26 +169,13 @@ static struct map_desc versatile_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
                 .length         = VERSATILE_PCI_CFG_BASE_SIZE,
                 .type           = MT_DEVICE
-        },
-#if 0
-        {
-                .virtual        =  VERSATILE_PCI_VIRT_MEM_BASE0,
-                .pfn            = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
-                .length         = SZ_16M,
-                .type           = MT_DEVICE
         }, {
-                .virtual        =  VERSATILE_PCI_VIRT_MEM_BASE1,
-                .pfn            = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1),
-                .length         = SZ_16M,
-                .type           = MT_DEVICE
-        }, {
-                .virtual        =  VERSATILE_PCI_VIRT_MEM_BASE2,
-                .pfn            = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2),
-                .length         = SZ_16M,
+                .virtual        =  (unsigned long)VERSATILE_PCI_VIRT_MEM_BASE0,
+                .pfn            = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
+                .length         = IO_SPACE_LIMIT,
                 .type           = MT_DEVICE
         },
 #endif
-#endif
 };
 
 void __init versatile_map_io(void)
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 4d4973dd8fba..408e58da46c6 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -29,8 +29,9 @@
  */
 #define VERSATILE_PCI_VIRT_BASE         (void __iomem *)0xe8000000ul
 #define VERSATILE_PCI_CFG_VIRT_BASE     (void __iomem *)0xe9000000ul
+#define VERSATILE_PCI_VIRT_MEM_BASE0    (void __iomem *)PCIO_BASE
 
-/* macro to get at IO space when running virtually */
+/* macro to get at MMIO space when running virtually */
 #define IO_ADDRESS(x)           (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
 
 #define __io_address(n)         ((void __iomem __force *)IO_ADDRESS(n))
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
new file mode 100644
index 000000000000..0406513be7d8
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/io.h
@@ -0,0 +1,27 @@
+/*
+ *  arch/arm/mach-versatile/include/mach/io.h
+ *
+ *  Copyright (C) 2003 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define PCIO_BASE       0xeb000000ul
+
+#define __io(a)         ((a) + PCIO_BASE)
+
+#endif
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 15c6a00000ec..e95bf84cc837 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -169,11 +169,18 @@ static struct pci_ops pci_versatile_ops = {
         .write  = versatile_write_config,
 };
 
+static struct resource io_port = {
+        .name   = "PCI",
+        .start  = 0,
+        .end    = IO_SPACE_LIMIT,
+        .flags  = IORESOURCE_IO,
+};
+
 static struct resource io_mem = {
         .name   = "PCI I/O space",
         .start  = VERSATILE_PCI_MEM_BASE0,
         .end    = VERSATILE_PCI_MEM_BASE0+VERSATILE_PCI_MEM_BASE0_SIZE-1,
-        .flags  = IORESOURCE_IO,
+        .flags  = IORESOURCE_MEM,
 };
 
 static struct resource non_mem = {
@@ -200,6 +207,12 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
                        "memory region (%d)\n", ret);
                 goto out;
         }
+        ret = request_resource(&ioport_resource, &io_port);
+        if (ret) {
+                printk(KERN_ERR "PCI: unable to allocate I/O "
+                       "port region (%d)\n", ret);
+                goto out;
+        }
         ret = request_resource(&iomem_resource, &non_mem);
         if (ret) {
                 printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
@@ -218,7 +231,7 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
          * the mem resource for this bus
          * the prefetch mem resource for this bus
          */
-        pci_add_resource_offset(&sys->resources, &io_mem, sys->io_offset);
+        pci_add_resource_offset(&sys->resources, &io_port, sys->io_offset);
         pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
         pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
 
@@ -249,6 +262,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
 
         if (nr == 0) {
                 sys->mem_offset = 0;
+                sys->io_offset = 0;
                 ret = pci_versatile_setup_resources(sys);
                 if (ret < 0) {
                         printk("pci_versatile_setup: resources... oops?\n");
@@ -325,7 +339,6 @@ void __init pci_versatile_preinit(void)
 static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
         int irq;
-        int devslot = PCI_SLOT(dev->devfn);
 
         /* slot,  pin,  irq
          *  24     1     27
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ea6b43154090..5cfc98994076 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -23,12 +23,12 @@
 #include <linux/slab.h>
 #include <linux/iommu.h>
 #include <linux/vmalloc.h>
+#include <linux/sizes.h>
 
 #include <asm/memory.h>
 #include <asm/highmem.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
-#include <asm/sizes.h>
 #include <asm/mach/arch.h>
 #include <asm/dma-iommu.h>
 #include <asm/mach/map.h>
@@ -228,7 +228,7 @@ static pte_t **consistent_pte;
 
 #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
 
-unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
+static unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
 
 void __init init_consistent_dma_size(unsigned long size)
 {
@@ -268,10 +268,8 @@ static int __init consistent_init(void)
         unsigned long base = consistent_base;
         unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
 
-#ifndef CONFIG_ARM_DMA_USE_IOMMU
-        if (cpu_architecture() >= CPU_ARCH_ARMv6)
+        if (IS_ENABLED(CONFIG_CMA) && !IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU))
                 return 0;
-#endif
 
         consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
         if (!consistent_pte) {
@@ -323,7 +321,7 @@ static struct arm_vmregion_head coherent_head = {
         .vm_list        = LIST_HEAD_INIT(coherent_head.vm_list),
 };
 
-size_t coherent_pool_size = DEFAULT_CONSISTENT_DMA_SIZE / 8;
+static size_t coherent_pool_size = DEFAULT_CONSISTENT_DMA_SIZE / 8;
 
 static int __init early_coherent_pool(char *p)
 {
@@ -342,7 +340,7 @@ static int __init coherent_init(void)
         struct page *page;
         void *ptr;
 
-        if (cpu_architecture() < CPU_ARCH_ARMv6)
+        if (!IS_ENABLED(CONFIG_CMA))
                 return 0;
 
         ptr = __alloc_from_contiguous(NULL, size, prot, &page);
@@ -704,7 +702,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
 
         if (arch_is_coherent() || nommu())
                 addr = __alloc_simple_buffer(dev, size, gfp, &page);
-        else if (cpu_architecture() < CPU_ARCH_ARMv6)
+        else if (!IS_ENABLED(CONFIG_CMA))
                 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
         else if (gfp & GFP_ATOMIC)
                 addr = __alloc_from_pool(dev, size, &page, caller);
@@ -773,7 +771,7 @@ void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
 
         if (arch_is_coherent() || nommu()) {
                 __dma_free_buffer(page, size);
-        } else if (cpu_architecture() < CPU_ARCH_ARMv6) {
+        } else if (!IS_ENABLED(CONFIG_CMA)) {
                 __dma_free_remap(cpu_addr, size);
                 __dma_free_buffer(page, size);
         } else {
@@ -1069,7 +1067,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t
                 return NULL;
 
         while (count) {
-                int j, order = __ffs(count);
+                int j, order = __fls(count);
 
                 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
                 while (!pages[i] && order)
@@ -1093,7 +1091,7 @@ error:
         while (--i)
                 if (pages[i])
                         __free_pages(pages[i], 0);
-        if (array_size < PAGE_SIZE)
+        if (array_size <= PAGE_SIZE)
                 kfree(pages);
         else
                 vfree(pages);
@@ -1108,7 +1106,7 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t s
         for (i = 0; i < count; i++)
                 if (pages[i])
                         __free_pages(pages[i], 0);
-        if (array_size < PAGE_SIZE)
+        if (array_size <= PAGE_SIZE)
                 kfree(pages);
         else
                 vfree(pages);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index c21d06c7dd7e..9aec41fa80ae 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -21,13 +21,13 @@
 #include <linux/gfp.h>
 #include <linux/memblock.h>
 #include <linux/dma-contiguous.h>
+#include <linux/sizes.h>
 
 #include <asm/mach-types.h>
 #include <asm/memblock.h>
 #include <asm/prom.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
-#include <asm/sizes.h>
 #include <asm/tlb.h>
 #include <asm/fixmap.h>
 
@@ -212,7 +212,7 @@ EXPORT_SYMBOL(arm_dma_zone_size);
  * allocations.  This must be the smallest DMA mask in the system,
  * so a successful GFP_DMA allocation will always satisfy this.
  */
-u32 arm_dma_limit;
+phys_addr_t arm_dma_limit;
 
 static void __init arm_adjust_dma_zone(unsigned long *size, unsigned long *hole,
         unsigned long dma_size)
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 4f55f5062ab7..566750fa57d4 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -25,6 +25,7 @@
 #include <linux/mm.h>
 #include <linux/vmalloc.h>
 #include <linux/io.h>
+#include <linux/sizes.h>
 
 #include <asm/cp15.h>
 #include <asm/cputype.h>
@@ -32,7 +33,6 @@
 #include <asm/mmu_context.h>
 #include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
-#include <asm/sizes.h>
 #include <asm/system_info.h>
 
 #include <asm/mach/map.h>
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 93dc0c17cdcb..2e8a1efdf7b8 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -62,9 +62,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
 #endif
 
 #ifdef CONFIG_ZONE_DMA
-extern u32 arm_dma_limit;
+extern phys_addr_t arm_dma_limit;
 #else
-#define arm_dma_limit ((u32)~0)
+#define arm_dma_limit ((phys_addr_t)~0)
 #endif
 
 extern phys_addr_t arm_lowmem_limit;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index f37dc1856a69..4c2d0451e84a 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -16,13 +16,13 @@
 #include <linux/memblock.h>
 #include <linux/fs.h>
 #include <linux/vmalloc.h>
+#include <linux/sizes.h>
 
 #include <asm/cp15.h>
 #include <asm/cputype.h>
 #include <asm/sections.h>
 #include <asm/cachetype.h>
 #include <asm/setup.h>
-#include <asm/sizes.h>
 #include <asm/smp_plat.h>
 #include <asm/tlb.h>
 #include <asm/highmem.h>
@@ -785,6 +785,79 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
         }
 }
 
+#ifndef CONFIG_ARM_LPAE
+
+/*
+ * The Linux PMD is made of two consecutive section entries covering 2MB
+ * (see definition in include/asm/pgtable-2level.h).  However a call to
+ * create_mapping() may optimize static mappings by using individual
+ * 1MB section mappings.  This leaves the actual PMD potentially half
+ * initialized if the top or bottom section entry isn't used, leaving it
+ * open to problems if a subsequent ioremap() or vmalloc() tries to use
+ * the virtual space left free by that unused section entry.
+ *
+ * Let's avoid the issue by inserting dummy vm entries covering the unused
+ * PMD halves once the static mappings are in place.
+ */
+
+static void __init pmd_empty_section_gap(unsigned long addr)
+{
+        struct vm_struct *vm;
+
+        vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
+        vm->addr = (void *)addr;
+        vm->size = SECTION_SIZE;
+        vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
+        vm->caller = pmd_empty_section_gap;
+        vm_area_add_early(vm);
+}
+
+static void __init fill_pmd_gaps(void)
+{
+        struct vm_struct *vm;
+        unsigned long addr, next = 0;
+        pmd_t *pmd;
+
+        /* we're still single threaded hence no lock needed here */
+        for (vm = vmlist; vm; vm = vm->next) {
+                if (!(vm->flags & VM_ARM_STATIC_MAPPING))
+                        continue;
+                addr = (unsigned long)vm->addr;
+                if (addr < next)
+                        continue;
+
+                /*
+                 * Check if this vm starts on an odd section boundary.
+                 * If so and the first section entry for this PMD is free
+                 * then we block the corresponding virtual address.
+                 */
+                if ((addr & ~PMD_MASK) == SECTION_SIZE) {
+                        pmd = pmd_off_k(addr);
+                        if (pmd_none(*pmd))
+                                pmd_empty_section_gap(addr & PMD_MASK);
+                }
+
+                /*
+                 * Then check if this vm ends on an odd section boundary.
+                 * If so and the second section entry for this PMD is empty
+                 * then we block the corresponding virtual address.
+                 */
+                addr += vm->size;
+                if ((addr & ~PMD_MASK) == SECTION_SIZE) {
+                        pmd = pmd_off_k(addr) + 1;
+                        if (pmd_none(*pmd))
+                                pmd_empty_section_gap(addr);
+                }
+
+                /* no need to look at any vm entry until we hit the next PMD */
+                next = (addr + PMD_SIZE - 1) & PMD_MASK;
+        }
+}
+
+#else
+#define fill_pmd_gaps() do { } while (0)
+#endif
+
 static void * __initdata vmalloc_min =
         (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
 
@@ -1066,6 +1139,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
          */
         if (mdesc->map_io)
                 mdesc->map_io();
+        fill_pmd_gaps();
 
         /*
          * Finally flush the caches and tlb to ensure that we're in a
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index 62135849f48b..c641fb685017 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -762,6 +762,11 @@ b_epilogue:
                         update_on_xread(ctx);
                         emit(ARM_MOV_R(r_A, r_X), ctx);
                         break;
+                case BPF_S_ANC_ALU_XOR_X:
+                        /* A ^= X */
+                        update_on_xread(ctx);
+                        emit(ARM_EOR_R(r_A, r_A, r_X), ctx);
+                        break;
                 case BPF_S_ANC_PROTOCOL:
                         /* A = ntohs(skb->protocol) */
                         ctx->seen |= SEEN_SKB;
diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h
index 99ae5e3f46d2..7fa2f7d3cb90 100644
--- a/arch/arm/net/bpf_jit_32.h
+++ b/arch/arm/net/bpf_jit_32.h
@@ -68,6 +68,8 @@
 #define ARM_INST_CMP_R          0x01500000
 #define ARM_INST_CMP_I          0x03500000
 
+#define ARM_INST_EOR_R          0x00200000
+
 #define ARM_INST_LDRB_I         0x05d00000
 #define ARM_INST_LDRB_R         0x07d00000
 #define ARM_INST_LDRH_I         0x01d000b0
@@ -132,6 +134,8 @@
 #define ARM_CMP_R(rn, rm)       _AL3_R(ARM_INST_CMP, 0, rn, rm)
 #define ARM_CMP_I(rn, imm)      _AL3_I(ARM_INST_CMP, 0, rn, imm)
 
+#define ARM_EOR_R(rd, rn, rm)   _AL3_R(ARM_INST_EOR, rd, rn, rm)
+
 #define ARM_LDR_I(rt, rn, off)  (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \
                                  | (off))
 #define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/plat-mxc/epit.c
index 9129c9e7d532..88726f4dbbfa 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/plat-mxc/epit.c
@@ -50,6 +50,7 @@
 #include <linux/irq.h>
 #include <linux/clockchips.h>
 #include <linux/clk.h>
+#include <linux/err.h>
 
 #include <mach/hardware.h>
 #include <asm/mach/time.h>
@@ -201,8 +202,16 @@ static int __init epit_clockevent_init(struct clk *timer_clk)
         return 0;
 }
 
-void __init epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
+void __init epit_timer_init(void __iomem *base, int irq)
 {
+        struct clk *timer_clk;
+
+        timer_clk = clk_get_sys("imx-epit.0", NULL);
+        if (IS_ERR(timer_clk)) {
+                pr_err("i.MX epit: unable to get clk\n");
+                return;
+        }
+
         clk_prepare_enable(timer_clk);
 
         timer_base = base;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index cf663d84e7c1..e429ca1b814a 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -54,8 +54,8 @@ extern void imx50_soc_init(void);
 extern void imx51_soc_init(void);
 extern void imx53_soc_init(void);
 extern void imx51_init_late(void);
-extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq);
-extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
+extern void epit_timer_init(void __iomem *base, int irq);
+extern void mxc_timer_init(void __iomem *, int);
 extern int mx1_clocks_init(unsigned long fref);
 extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
 extern int mx25_clocks_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/mx2_cam.h b/arch/arm/plat-mxc/include/mach/mx2_cam.h
index 7ded6f1f74bc..3c080a32dbf5 100644
--- a/arch/arm/plat-mxc/include/mach/mx2_cam.h
+++ b/arch/arm/plat-mxc/include/mach/mx2_cam.h
@@ -23,6 +23,7 @@
 #ifndef __MACH_MX2_CAM_H_
 #define __MACH_MX2_CAM_H_
 
+#define MX2_CAMERA_SWAP16               (1 << 0)
 #define MX2_CAMERA_EXT_VSYNC            (1 << 1)
 #define MX2_CAMERA_CCIR                 (1 << 2)
 #define MX2_CAMERA_CCIR_INTERLACE       (1 << 3)
@@ -30,6 +31,7 @@
 #define MX2_CAMERA_GATED_CLOCK          (1 << 5)
 #define MX2_CAMERA_INV_DATA             (1 << 6)
 #define MX2_CAMERA_PCLK_SAMPLE_RISING   (1 << 7)
+#define MX2_CAMERA_PACK_DIR_MSB         (1 << 8)
 
 /**
  * struct mx2_camera_platform_data - optional platform data for mx2_camera
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 99f958ca6cb8..00e8e659e667 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -58,6 +58,7 @@
 /* MX31, MX35, MX25, MX5 */
 #define V2_TCTL_WAITEN          (1 << 3) /* Wait enable mode */
 #define V2_TCTL_CLK_IPG         (1 << 6)
+#define V2_TCTL_CLK_PER         (2 << 6)
 #define V2_TCTL_FRR             (1 << 9)
 #define V2_IR                   0x0c
 #define V2_TSTAT                0x08
@@ -280,23 +281,22 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
         return 0;
 }
 
-void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
+void __init mxc_timer_init(void __iomem *base, int irq)
 {
         uint32_t tctl_val;
+        struct clk *timer_clk;
         struct clk *timer_ipg_clk;
 
-        if (!timer_clk) {
-                timer_clk = clk_get_sys("imx-gpt.0", "per");
-                if (IS_ERR(timer_clk)) {
-                        pr_err("i.MX timer: unable to get clk\n");
-                        return;
-                }
-
-                timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg");
-                if (!IS_ERR(timer_ipg_clk))
-                        clk_prepare_enable(timer_ipg_clk);
+        timer_clk = clk_get_sys("imx-gpt.0", "per");
+        if (IS_ERR(timer_clk)) {
+                pr_err("i.MX timer: unable to get clk\n");
+                return;
         }
 
+        timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg");
+        if (!IS_ERR(timer_ipg_clk))
+                clk_prepare_enable(timer_ipg_clk);
+
         clk_prepare_enable(timer_clk);
 
         timer_base = base;
@@ -309,7 +309,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
         __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
 
         if (timer_is_v2())
-                tctl_val = V2_TCTL_CLK_IPG | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
+                tctl_val = V2_TCTL_CLK_PER | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
         else
                 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
 
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 62ec5c452792..706b7e29397f 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
         struct clk *c;
         struct clk *pa;
 
+        mutex_lock(&clocks_mutex);
         seq_printf(s, "%-30s %-30s %-10s %s\n",
                 "clock-name", "parent-name", "rate", "use-count");
 
@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
                 seq_printf(s, "%-30s %-30s %-10lu %d\n",
                         c->name, pa ? pa->name : "none", c->rate, c->usecount);
         }
+        mutex_unlock(&clocks_mutex);
 
         return 0;
 }
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 297245dba66e..de6c0a08f461 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -252,8 +252,6 @@ IS_AM_SUBCLASS(335x, 0x335)
  * cpu_is_omap2423():   True for OMAP2423
  * cpu_is_omap2430():   True for OMAP2430
  * cpu_is_omap3430():   True for OMAP3430
- * cpu_is_omap3505():   True for OMAP3505
- * cpu_is_omap3517():   True for OMAP3517
  */
 #define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
 
@@ -277,8 +275,6 @@ IS_OMAP_TYPE(2422, 0x2422)
 IS_OMAP_TYPE(2423, 0x2423)
 IS_OMAP_TYPE(2430, 0x2430)
 IS_OMAP_TYPE(3430, 0x3430)
-IS_OMAP_TYPE(3505, 0x3517)
-IS_OMAP_TYPE(3517, 0x3517)
 
 #define cpu_is_omap310()                0
 #define cpu_is_omap730()                0
@@ -293,12 +289,6 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define cpu_is_omap2422()               0
 #define cpu_is_omap2423()               0
 #define cpu_is_omap2430()               0
-#define cpu_is_omap3503()               0
-#define cpu_is_omap3515()               0
-#define cpu_is_omap3525()               0
-#define cpu_is_omap3530()               0
-#define cpu_is_omap3505()               0
-#define cpu_is_omap3517()               0
 #define cpu_is_omap3430()               0
 #define cpu_is_omap3630()               0
 
@@ -350,12 +340,6 @@ IS_OMAP_TYPE(3517, 0x3517)
 
 #if defined(CONFIG_ARCH_OMAP3)
 # undef cpu_is_omap3430
-# undef cpu_is_omap3503
-# undef cpu_is_omap3515
-# undef cpu_is_omap3525
-# undef cpu_is_omap3530
-# undef cpu_is_omap3505
-# undef cpu_is_omap3517
 # undef cpu_is_ti81xx
 # undef cpu_is_ti816x
 # undef cpu_is_ti814x
@@ -363,19 +347,6 @@ IS_OMAP_TYPE(3517, 0x3517)
 # undef cpu_is_am33xx
 # undef cpu_is_am335x
 # define cpu_is_omap3430()              is_omap3430()
-# define cpu_is_omap3503()              (cpu_is_omap3430() &&           \
-                                                (!omap3_has_iva()) &&   \
-                                                (!omap3_has_sgx()))
-# define cpu_is_omap3515()              (cpu_is_omap3430() &&           \
-                                                (!omap3_has_iva()) &&   \
-                                                (omap3_has_sgx()))
-# define cpu_is_omap3525()              (cpu_is_omap3430() &&           \
-                                                (!omap3_has_sgx()) &&   \
-                                                (omap3_has_iva()))
-# define cpu_is_omap3530()              (cpu_is_omap3430())
-# define cpu_is_omap3517()              is_omap3517()
-# define cpu_is_omap3505()              (cpu_is_omap3517() &&           \
-                                                !omap3_has_sgx())
 # undef cpu_is_omap3630
 # define cpu_is_omap3630()              is_omap363x()
 # define cpu_is_ti81xx()                is_ti81xx()
@@ -424,10 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3630_REV_ES1_1      (OMAP363X_CLASS | (0x1 << 8))
 #define OMAP3630_REV_ES1_2      (OMAP363X_CLASS | (0x2 << 8))
 
-#define OMAP3517_CLASS          0x35170034
-#define OMAP3517_REV_ES1_0      OMAP3517_CLASS
-#define OMAP3517_REV_ES1_1      (OMAP3517_CLASS | (0x1 << 8))
-
 #define TI816X_CLASS            0x81600034
 #define TI8168_REV_ES1_0        TI816X_CLASS
 #define TI8168_REV_ES1_1        (TI816X_CLASS | (0x1 << 8))
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index a7754a886d42..5493bd95da5e 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -172,8 +172,7 @@ struct omap_mmc_platform_data {
 extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
                                         int is_closed);
 
-#if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
-        defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                 int nr_controllers);
 void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
@@ -185,7 +184,6 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
 {
 }
-
 #endif
 
 extern int omap_msdi_reset(struct omap_hwmod *oh);
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 61fd837624a8..c1793786aea9 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -582,7 +582,7 @@ void __init orion_spi_1_init(unsigned long mapbase)
  * Watchdog
  ****************************************************************************/
 static struct resource orion_wdt_resource =
-                DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28);
+                DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
 
 static struct platform_device orion_wdt_device = {
         .name           = "orion_wdt",
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index 58b79809d20c..584c9bf8ed2d 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -193,6 +193,7 @@ static const struct platform_device_id ssp_id_table[] = {
         { "pxa25x-nssp",        PXA25x_NSSP },
         { "pxa27x-ssp",         PXA27x_SSP },
         { "pxa168-ssp",         PXA168_SSP },
+        { "pxa910-ssp",         PXA910_SSP },
         { },
 };
 
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 33ecd0c9f0c3..b1e05ccff3ac 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -157,11 +157,13 @@ int s3c_adc_start(struct s3c_adc_client *client,
                 return -EINVAL;
         }
 
-        if (client->is_ts && adc->ts_pend)
-                return -EAGAIN;
-
         spin_lock_irqsave(&adc->lock, flags);
 
+        if (client->is_ts && adc->ts_pend) {
+                spin_unlock_irqrestore(&adc->lock, flags);
+                return -EAGAIN;
+        }
+
         client->channel = channel;
         client->nr_samples = nr_samples;
 
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 1d214cb9d770..6303974c2ee0 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -126,7 +126,8 @@ struct platform_device s3c_device_adc = {
 #ifdef CONFIG_CPU_S3C2440
 static struct resource s3c_camif_resource[] = {
         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
-        [1] = DEFINE_RES_IRQ(IRQ_CAM),
+        [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
+        [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
 };
 
 struct platform_device s3c_device_camif = {
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
index 7d048759b772..c0c70a895ca8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
 #define S3C24XX_VA_WATCHDOG     S3C_VA_WATCHDOG
 
 #define S3C2412_VA_SSMC         S3C_ADDR_CPU(0x00000000)
-#define S3C2412_VA_EBI          S3C_ADDR_CPU(0x00010000)
+#define S3C2412_VA_EBI          S3C_ADDR_CPU(0x00100000)
 
 #define S3C2410_PA_UART         (0x50000000)
 #define S3C24XX_PA_UART         S3C2410_PA_UART
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index f19aff19205c..bc4db9b04e36 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -25,7 +25,7 @@ static inline void arch_wdt_reset(void)
 
         __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
 
-        if (s3c2410_wdtclk)
+        if (!IS_ERR(s3c2410_wdtclk))
                 clk_enable(s3c2410_wdtclk);
 
         /* put initial values into count and data */
diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-samsung/s5p-clock.c
index 031a61899bef..48a159911037 100644
--- a/arch/arm/plat-samsung/s5p-clock.c
+++ b/arch/arm/plat-samsung/s5p-clock.c
@@ -37,6 +37,7 @@ struct clk clk_ext_xtal_mux = {
 struct clk clk_xusbxti = {
         .name           = "xusbxti",
         .id             = -1,
+        .rate           = 24000000,
 };
 
 struct clk s5p_clk_27m = {
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index ab3de721c5db..75b05ad0fbad 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -4,7 +4,7 @@
  * Debugging macro include header for spear platform
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h
index e14a3e4932f9..2bc6b54460a8 100644
--- a/arch/arm/plat-spear/include/plat/pl080.h
+++ b/arch/arm/plat-spear/include/plat/pl080.h
@@ -4,7 +4,7 @@
  * DMAC pl080 definitions for SPEAr platform
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/shirq.h b/arch/arm/plat-spear/include/plat/shirq.h
index 03ed8b585dcf..88a7fbd24793 100644
--- a/arch/arm/plat-spear/include/plat/shirq.h
+++ b/arch/arm/plat-spear/include/plat/shirq.h
@@ -4,7 +4,7 @@
  * SPEAr platform shared irq layer header file
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/timex.h b/arch/arm/plat-spear/include/plat/timex.h
index 914d09dd50fd..ef95e5b780bd 100644
--- a/arch/arm/plat-spear/include/plat/timex.h
+++ b/arch/arm/plat-spear/include/plat/timex.h
@@ -4,7 +4,7 @@
  * SPEAr platform specific timex definitions
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
index 6dd455bafdfd..2ce6cb17a98b 100644
--- a/arch/arm/plat-spear/include/plat/uncompress.h
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -4,7 +4,7 @@
  * Serial port stubs for kernel decompress status messages
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c
index a56a067717c1..12cf27f935f9 100644
--- a/arch/arm/plat-spear/pl080.c
+++ b/arch/arm/plat-spear/pl080.c
@@ -4,7 +4,7 @@
  * DMAC pl080 definitions for SPEAr platform
  *
  * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
index ea0a61302b7e..4f990115b1bd 100644
--- a/arch/arm/plat-spear/restart.c
+++ b/arch/arm/plat-spear/restart.c
@@ -4,7 +4,7 @@
  * SPEAr platform specific restart functions
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 961fb7261243..853e891e1184 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -4,7 +4,7 @@
  * SPEAr platform shared irq layer source file
  *
  * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any