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-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/mach-orion5x/Makefile2
-rw-r--r--arch/arm/mach-orion5x/addr-map.c155
-rw-r--r--arch/arm/mach-orion5x/board-dt.c2
-rw-r--r--arch/arm/mach-orion5x/common.c49
-rw-r--r--arch/arm/mach-orion5x/common.h13
-rw-r--r--arch/arm/mach-orion5x/d2net-setup.c4
-rw-r--r--arch/arm/mach-orion5x/db88f5281-setup.c13
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c3
-rw-r--r--arch/arm/mach-orion5x/edmini_v2-setup.c4
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h6
-rw-r--r--arch/arm/mach-orion5x/kurobox_pro-setup.c8
-rw-r--r--arch/arm/mach-orion5x/ls-chl-setup.c4
-rw-r--r--arch/arm/mach-orion5x/ls_hgl-setup.c4
-rw-r--r--arch/arm/mach-orion5x/lsmini-setup.c4
-rw-r--r--arch/arm/mach-orion5x/mss2-setup.c3
-rw-r--r--arch/arm/mach-orion5x/mv2120-setup.c3
-rw-r--r--arch/arm/mach-orion5x/net2big-setup.c4
-rw-r--r--arch/arm/mach-orion5x/pci.c7
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c4
-rw-r--r--arch/arm/mach-orion5x/rd88f5181l-ge-setup.c4
-rw-r--r--arch/arm/mach-orion5x/rd88f5182-setup.c7
-rw-r--r--arch/arm/mach-orion5x/terastation_pro2-setup.c4
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c4
-rw-r--r--arch/arm/mach-orion5x/ts409-setup.c4
-rw-r--r--arch/arm/mach-orion5x/wnr854t-setup.c4
-rw-r--r--arch/arm/mach-orion5x/wrt350n-v2-setup.c4
-rw-r--r--arch/arm/plat-orion/Makefile1
28 files changed, 108 insertions, 217 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6ee09663e929..b6f5f28ef007 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -600,6 +600,7 @@ config ARCH_ORION5X
600 select GENERIC_CLOCKEVENTS 600 select GENERIC_CLOCKEVENTS
601 select PCI 601 select PCI
602 select PLAT_ORION_LEGACY 602 select PLAT_ORION_LEGACY
603 select MVEBU_MBUS
603 help 604 help
604 Support for the following Marvell Orion 5x series SoCs: 605 Support for the following Marvell Orion 5x series SoCs:
605 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 606 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index 9e809a7c05c0..45da805fb236 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -1,4 +1,4 @@
1obj-y += common.o addr-map.o pci.o irq.o mpp.o 1obj-y += common.o pci.o irq.o mpp.o
2obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o 2obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o
3obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o 3obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o
4obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o 4obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
deleted file mode 100644
index b5efc0fd31cb..000000000000
--- a/arch/arm/mach-orion5x/addr-map.c
+++ /dev/null
@@ -1,155 +0,0 @@
1/*
2 * arch/arm/mach-orion5x/addr-map.c
3 *
4 * Address map functions for Marvell Orion 5x SoCs
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/mbus.h>
16#include <linux/io.h>
17#include <mach/hardware.h>
18#include <plat/addr-map.h>
19#include "common.h"
20
21/*
22 * The Orion has fully programmable address map. There's a separate address
23 * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB,
24 * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own
25 * address decode windows that allow it to access any of the Orion resources.
26 *
27 * CPU address decoding --
28 * Linux assumes that it is the boot loader that already setup the access to
29 * DDR and internal registers.
30 * Setup access to PCI and PCIe IO/MEM space is issued by this file.
31 * Setup access to various devices located on the device bus interface (e.g.
32 * flashes, RTC, etc) should be issued by machine-setup.c according to
33 * specific board population (by using orion5x_setup_*_win()).
34 *
35 * Non-CPU Masters address decoding --
36 * Unlike the CPU, we setup the access from Orion's master interfaces to DDR
37 * banks only (the typical use case).
38 * Setup access for each master to DDR is issued by platform device setup.
39 */
40
41/*
42 * Generic Address Decode Windows bit settings
43 */
44#define TARGET_DEV_BUS 1
45#define TARGET_PCI 3
46#define TARGET_PCIE 4
47#define TARGET_SRAM 9
48#define ATTR_PCIE_MEM 0x59
49#define ATTR_PCIE_IO 0x51
50#define ATTR_PCIE_WA 0x79
51#define ATTR_PCI_MEM 0x59
52#define ATTR_PCI_IO 0x51
53#define ATTR_DEV_CS0 0x1e
54#define ATTR_DEV_CS1 0x1d
55#define ATTR_DEV_CS2 0x1b
56#define ATTR_DEV_BOOT 0xf
57#define ATTR_SRAM 0x0
58
59static int __initdata win_alloc_count;
60
61static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
62 const int win)
63{
64 u32 dev, rev;
65
66 orion5x_pcie_id(&dev, &rev);
67 if ((dev == MV88F5281_DEV_ID && win < 4)
68 || (dev == MV88F5182_DEV_ID && win < 2)
69 || (dev == MV88F5181_DEV_ID && win < 2)
70 || (dev == MV88F6183_DEV_ID && win < 4))
71 return 1;
72
73 return 0;
74}
75
76/*
77 * Description of the windows needed by the platform code
78 */
79static struct orion_addr_map_cfg addr_map_cfg __initdata = {
80 .num_wins = 8,
81 .cpu_win_can_remap = cpu_win_can_remap,
82 .bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
83};
84
85static const struct __initdata orion_addr_map_info addr_map_info[] = {
86 /*
87 * Setup windows for PCI+PCIe IO+MEM space.
88 */
89 { 0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
90 TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE
91 },
92 { 1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
93 TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE
94 },
95 { 2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
96 TARGET_PCIE, ATTR_PCIE_MEM, -1
97 },
98 { 3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
99 TARGET_PCI, ATTR_PCI_MEM, -1
100 },
101 /* End marker */
102 { -1, 0, 0, 0, 0, 0 }
103};
104
105void __init orion5x_setup_cpu_mbus_bridge(void)
106{
107 /*
108 * Disable, clear and configure windows.
109 */
110 orion_config_wins(&addr_map_cfg, addr_map_info);
111 win_alloc_count = 4;
112
113 /*
114 * Setup MBUS dram target info.
115 */
116 orion_setup_cpu_mbus_target(&addr_map_cfg,
117 (void __iomem *) ORION5X_DDR_WINDOW_CPU_BASE);
118}
119
120void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
121{
122 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
123 TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
124}
125
126void __init orion5x_setup_dev0_win(u32 base, u32 size)
127{
128 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
129 TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
130}
131
132void __init orion5x_setup_dev1_win(u32 base, u32 size)
133{
134 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
135 TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
136}
137
138void __init orion5x_setup_dev2_win(u32 base, u32 size)
139{
140 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
141 TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
142}
143
144void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
145{
146 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
147 TARGET_PCIE, ATTR_PCIE_WA, -1);
148}
149
150void __init orion5x_setup_sram_win(void)
151{
152 orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++,
153 ORION5X_SRAM_PHYS_BASE, ORION5X_SRAM_SIZE,
154 TARGET_SRAM, ATTR_SRAM, -1);
155}
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 35a8014529ca..6bbc8786c1e3 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -41,7 +41,7 @@ static void __init orion5x_dt_init(void)
41 /* 41 /*
42 * Setup Orion address map 42 * Setup Orion address map
43 */ 43 */
44 orion5x_setup_cpu_mbus_bridge(); 44 orion5x_setup_wins();
45 45
46 /* Setup root of clk tree */ 46 /* Setup root of clk tree */
47 clk_init(); 47 clk_init();
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index d068f1431c40..8e468e3a6015 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -34,7 +34,6 @@
34#include <linux/platform_data/usb-ehci-orion.h> 34#include <linux/platform_data/usb-ehci-orion.h>
35#include <plat/time.h> 35#include <plat/time.h>
36#include <plat/common.h> 36#include <plat/common.h>
37#include <plat/addr-map.h>
38#include "common.h" 37#include "common.h"
39 38
40/***************************************************************************** 39/*****************************************************************************
@@ -174,7 +173,8 @@ void __init orion5x_xor_init(void)
174 ****************************************************************************/ 173 ****************************************************************************/
175static void __init orion5x_crypto_init(void) 174static void __init orion5x_crypto_init(void)
176{ 175{
177 orion5x_setup_sram_win(); 176 mvebu_mbus_add_window("sram", ORION5X_SRAM_PHYS_BASE,
177 ORION5X_SRAM_SIZE);
178 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE, 178 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
179 SZ_8K, IRQ_ORION5X_CESA); 179 SZ_8K, IRQ_ORION5X_CESA);
180} 180}
@@ -193,6 +193,9 @@ void __init orion5x_wdt_init(void)
193 ****************************************************************************/ 193 ****************************************************************************/
194void __init orion5x_init_early(void) 194void __init orion5x_init_early(void)
195{ 195{
196 u32 rev, dev;
197 const char *mbus_soc_name;
198
196 orion_time_set_base(TIMER_VIRT_BASE); 199 orion_time_set_base(TIMER_VIRT_BASE);
197 200
198 /* 201 /*
@@ -201,6 +204,46 @@ void __init orion5x_init_early(void)
201 * the allocations won't fail. 204 * the allocations won't fail.
202 */ 205 */
203 init_dma_coherent_pool_size(SZ_1M); 206 init_dma_coherent_pool_size(SZ_1M);
207
208 /* Initialize the MBUS driver */
209 orion5x_pcie_id(&dev, &rev);
210 if (dev == MV88F5281_DEV_ID)
211 mbus_soc_name = "marvell,orion5x-88f5281-mbus";
212 else if (dev == MV88F5182_DEV_ID)
213 mbus_soc_name = "marvell,orion5x-88f5182-mbus";
214 else if (dev == MV88F5181_DEV_ID)
215 mbus_soc_name = "marvell,orion5x-88f5181-mbus";
216 else if (dev == MV88F6183_DEV_ID)
217 mbus_soc_name = "marvell,orion5x-88f6183-mbus";
218 else
219 mbus_soc_name = NULL;
220 mvebu_mbus_init(mbus_soc_name, ORION5X_BRIDGE_WINS_BASE,
221 ORION5X_BRIDGE_WINS_SZ,
222 ORION5X_DDR_WINS_BASE, ORION5X_DDR_WINS_SZ);
223}
224
225void orion5x_setup_wins(void)
226{
227 /*
228 * The PCIe windows will no longer be statically allocated
229 * here once Orion5x is migrated to the pci-mvebu driver.
230 */
231 mvebu_mbus_add_window_remap_flags("pcie0.0", ORION5X_PCIE_IO_PHYS_BASE,
232 ORION5X_PCIE_IO_SIZE,
233 ORION5X_PCIE_IO_BUS_BASE,
234 MVEBU_MBUS_PCI_IO);
235 mvebu_mbus_add_window_remap_flags("pcie0.0", ORION5X_PCIE_MEM_PHYS_BASE,
236 ORION5X_PCIE_MEM_SIZE,
237 MVEBU_MBUS_NO_REMAP,
238 MVEBU_MBUS_PCI_MEM);
239 mvebu_mbus_add_window_remap_flags("pci0.0", ORION5X_PCI_IO_PHYS_BASE,
240 ORION5X_PCI_IO_SIZE,
241 ORION5X_PCI_IO_BUS_BASE,
242 MVEBU_MBUS_PCI_IO);
243 mvebu_mbus_add_window_remap_flags("pci0.0", ORION5X_PCI_MEM_PHYS_BASE,
244 ORION5X_PCI_MEM_SIZE,
245 MVEBU_MBUS_NO_REMAP,
246 MVEBU_MBUS_PCI_MEM);
204} 247}
205 248
206int orion5x_tclk; 249int orion5x_tclk;
@@ -282,7 +325,7 @@ void __init orion5x_init(void)
282 /* 325 /*
283 * Setup Orion address map 326 * Setup Orion address map
284 */ 327 */
285 orion5x_setup_cpu_mbus_bridge(); 328 orion5x_setup_wins();
286 329
287 /* Setup root of clk tree */ 330 /* Setup root of clk tree */
288 clk_init(); 331 clk_init();
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index e60345760283..cdaa01f3d186 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -17,18 +17,7 @@ void clk_init(void);
17extern int orion5x_tclk; 17extern int orion5x_tclk;
18extern void orion5x_timer_init(void); 18extern void orion5x_timer_init(void);
19 19
20/* 20void orion5x_setup_wins(void);
21 * Enumerations and functions for Orion windows mapping. Used by Orion core
22 * functions to map its interfaces and by the machine-setup to map its on-
23 * board devices. Details in /mach-orion/addr-map.c
24 */
25void orion5x_setup_cpu_mbus_bridge(void);
26void orion5x_setup_dev_boot_win(u32 base, u32 size);
27void orion5x_setup_dev0_win(u32 base, u32 size);
28void orion5x_setup_dev1_win(u32 base, u32 size);
29void orion5x_setup_dev2_win(u32 base, u32 size);
30void orion5x_setup_pcie_wa_win(u32 base, u32 size);
31void orion5x_setup_sram_win(void);
32 21
33void orion5x_ehci0_init(void); 22void orion5x_ehci0_init(void);
34void orion5x_ehci1_init(void); 23void orion5x_ehci1_init(void);
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 57d0af74874d..16c88bbabc98 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -317,8 +317,8 @@ static void __init d2net_init(void)
317 d2net_sata_power_init(); 317 d2net_sata_power_init();
318 orion5x_sata_init(&d2net_sata_data); 318 orion5x_sata_init(&d2net_sata_data);
319 319
320 orion5x_setup_dev_boot_win(D2NET_NOR_BOOT_BASE, 320 mvebu_mbus_add_window("devbus-boot", D2NET_NOR_BOOT_BASE,
321 D2NET_NOR_BOOT_SIZE); 321 D2NET_NOR_BOOT_SIZE);
322 platform_device_register(&d2net_nor_flash); 322 platform_device_register(&d2net_nor_flash);
323 323
324 platform_device_register(&d2net_gpio_buttons); 324 platform_device_register(&d2net_gpio_buttons);
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 76665640087b..4e1263da38bb 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -340,16 +340,19 @@ static void __init db88f5281_init(void)
340 orion5x_uart0_init(); 340 orion5x_uart0_init();
341 orion5x_uart1_init(); 341 orion5x_uart1_init();
342 342
343 orion5x_setup_dev_boot_win(DB88F5281_NOR_BOOT_BASE, 343 mvebu_mbus_add_window("devbus-boot", DB88F5281_NOR_BOOT_BASE,
344 DB88F5281_NOR_BOOT_SIZE); 344 DB88F5281_NOR_BOOT_SIZE);
345 platform_device_register(&db88f5281_boot_flash); 345 platform_device_register(&db88f5281_boot_flash);
346 346
347 orion5x_setup_dev0_win(DB88F5281_7SEG_BASE, DB88F5281_7SEG_SIZE); 347 mvebu_mbus_add_window("devbus-cs0", DB88F5281_7SEG_BASE,
348 DB88F5281_7SEG_SIZE);
348 349
349 orion5x_setup_dev1_win(DB88F5281_NOR_BASE, DB88F5281_NOR_SIZE); 350 mvebu_mbus_add_window("devbus-cs1", DB88F5281_NOR_BASE,
351 DB88F5281_NOR_SIZE);
350 platform_device_register(&db88f5281_nor_flash); 352 platform_device_register(&db88f5281_nor_flash);
351 353
352 orion5x_setup_dev2_win(DB88F5281_NAND_BASE, DB88F5281_NAND_SIZE); 354 mvebu_mbus_add_window("devbus-cs2", DB88F5281_NAND_BASE,
355 DB88F5281_NAND_SIZE);
353 platform_device_register(&db88f5281_nand_flash); 356 platform_device_register(&db88f5281_nand_flash);
354 357
355 i2c_register_board_info(0, &db88f5281_i2c_rtc, 1); 358 i2c_register_board_info(0, &db88f5281_i2c_rtc, 1);
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 6eb1732757fd..9e6baf581ed3 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -611,7 +611,8 @@ static void __init dns323_init(void)
611 /* setup flash mapping 611 /* setup flash mapping
612 * CS3 holds a 8 MB Spansion S29GL064M90TFIR4 612 * CS3 holds a 8 MB Spansion S29GL064M90TFIR4
613 */ 613 */
614 orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE); 614 mvebu_mbus_add_window("devbus-boot", DNS323_NOR_BOOT_BASE,
615 DNS323_NOR_BOOT_SIZE);
615 platform_device_register(&dns323_nor_flash); 616 platform_device_register(&dns323_nor_flash);
616 617
617 /* Sort out LEDs, Buttons and i2c devices */ 618 /* Sort out LEDs, Buttons and i2c devices */
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index d675e727803d..147615510dd0 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -154,8 +154,8 @@ void __init edmini_v2_init(void)
154 orion5x_ehci0_init(); 154 orion5x_ehci0_init();
155 orion5x_eth_init(&edmini_v2_eth_data); 155 orion5x_eth_init(&edmini_v2_eth_data);
156 156
157 orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE, 157 mvebu_mbus_add_window("devbus-boot", EDMINI_V2_NOR_BOOT_BASE,
158 EDMINI_V2_NOR_BOOT_SIZE); 158 EDMINI_V2_NOR_BOOT_SIZE);
159 platform_device_register(&edmini_v2_nor_flash); 159 platform_device_register(&edmini_v2_nor_flash);
160 160
161 pr_notice("edmini_v2: USB device port, flash write and power-off " 161 pr_notice("edmini_v2: USB device port, flash write and power-off "
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index d265f5484a8e..b78ff3248868 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -66,8 +66,10 @@
66 * Orion Registers Map 66 * Orion Registers Map
67 ******************************************************************************/ 67 ******************************************************************************/
68 68
69#define ORION5X_DDR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x00000)
70#define ORION5X_DDR_WINS_BASE (ORION5X_DDR_PHYS_BASE + 0x1500)
71#define ORION5X_DDR_WINS_SZ (0x10)
69#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000) 72#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000)
70#define ORION5X_DDR_WINDOW_CPU_BASE (ORION5X_DDR_VIRT_BASE + 0x1500)
71#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000) 73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000)
72#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000) 74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000)
73#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x)) 75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x))
@@ -81,6 +83,8 @@
81 83
82#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000) 84#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000)
83#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000) 85#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000)
86#define ORION5X_BRIDGE_WINS_BASE (ORION5X_BRIDGE_PHYS_BASE)
87#define ORION5X_BRIDGE_WINS_SZ (0x80)
84 88
85#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000) 89#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000)
86 90
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index b98403526218..aae10e4a917c 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -359,13 +359,13 @@ static void __init kurobox_pro_init(void)
359 orion5x_uart1_init(); 359 orion5x_uart1_init();
360 orion5x_xor_init(); 360 orion5x_xor_init();
361 361
362 orion5x_setup_dev_boot_win(KUROBOX_PRO_NOR_BOOT_BASE, 362 mvebu_mbus_add_window("devbus-boot", KUROBOX_PRO_NOR_BOOT_BASE,
363 KUROBOX_PRO_NOR_BOOT_SIZE); 363 KUROBOX_PRO_NOR_BOOT_SIZE);
364 platform_device_register(&kurobox_pro_nor_flash); 364 platform_device_register(&kurobox_pro_nor_flash);
365 365
366 if (machine_is_kurobox_pro()) { 366 if (machine_is_kurobox_pro()) {
367 orion5x_setup_dev0_win(KUROBOX_PRO_NAND_BASE, 367 mvebu_mbus_add_window("devbus-cs0", KUROBOX_PRO_NAND_BASE,
368 KUROBOX_PRO_NAND_SIZE); 368 KUROBOX_PRO_NAND_SIZE);
369 platform_device_register(&kurobox_pro_nand_flash); 369 platform_device_register(&kurobox_pro_nand_flash);
370 } 370 }
371 371
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 044da5b6a6ae..24f4e14e5893 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -294,8 +294,8 @@ static void __init lschl_init(void)
294 orion5x_uart0_init(); 294 orion5x_uart0_init();
295 orion5x_xor_init(); 295 orion5x_xor_init();
296 296
297 orion5x_setup_dev_boot_win(LSCHL_NOR_BOOT_BASE, 297 mvebu_mbus_add_window("devbus-boot", LSCHL_NOR_BOOT_BASE,
298 LSCHL_NOR_BOOT_SIZE); 298 LSCHL_NOR_BOOT_SIZE);
299 platform_device_register(&lschl_nor_flash); 299 platform_device_register(&lschl_nor_flash);
300 300
301 platform_device_register(&lschl_leds); 301 platform_device_register(&lschl_leds);
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index d49f93423f52..fc653bb41e78 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -243,8 +243,8 @@ static void __init ls_hgl_init(void)
243 orion5x_uart0_init(); 243 orion5x_uart0_init();
244 orion5x_xor_init(); 244 orion5x_xor_init();
245 245
246 orion5x_setup_dev_boot_win(LS_HGL_NOR_BOOT_BASE, 246 mvebu_mbus_add_window("devbus-boot", LS_HGL_NOR_BOOT_BASE,
247 LS_HGL_NOR_BOOT_SIZE); 247 LS_HGL_NOR_BOOT_SIZE);
248 platform_device_register(&ls_hgl_nor_flash); 248 platform_device_register(&ls_hgl_nor_flash);
249 249
250 platform_device_register(&ls_hgl_button_device); 250 platform_device_register(&ls_hgl_button_device);
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 8e3965c6c0fe..18e66e617dc2 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -244,8 +244,8 @@ static void __init lsmini_init(void)
244 orion5x_uart0_init(); 244 orion5x_uart0_init();
245 orion5x_xor_init(); 245 orion5x_xor_init();
246 246
247 orion5x_setup_dev_boot_win(LSMINI_NOR_BOOT_BASE, 247 mvebu_mbus_add_window("devbus-boot", LSMINI_NOR_BOOT_BASE,
248 LSMINI_NOR_BOOT_SIZE); 248 LSMINI_NOR_BOOT_SIZE);
249 platform_device_register(&lsmini_nor_flash); 249 platform_device_register(&lsmini_nor_flash);
250 250
251 platform_device_register(&lsmini_button_device); 251 platform_device_register(&lsmini_button_device);
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 0ec94a1f2b16..827acbafc9dc 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -241,7 +241,8 @@ static void __init mss2_init(void)
241 orion5x_uart0_init(); 241 orion5x_uart0_init();
242 orion5x_xor_init(); 242 orion5x_xor_init();
243 243
244 orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE); 244 mvebu_mbus_add_window("devbus-boot", MSS2_NOR_BOOT_BASE,
245 MSS2_NOR_BOOT_SIZE);
245 platform_device_register(&mss2_nor_flash); 246 platform_device_register(&mss2_nor_flash);
246 247
247 platform_device_register(&mss2_button_device); 248 platform_device_register(&mss2_button_device);
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 18143f2a9093..92600ae2b4b6 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -204,7 +204,8 @@ static void __init mv2120_init(void)
204 orion5x_uart0_init(); 204 orion5x_uart0_init();
205 orion5x_xor_init(); 205 orion5x_xor_init();
206 206
207 orion5x_setup_dev_boot_win(MV2120_NOR_BOOT_BASE, MV2120_NOR_BOOT_SIZE); 207 mvebu_mbus_add_window("devbus-boot", MV2120_NOR_BOOT_BASE,
208 MV2120_NOR_BOOT_SIZE);
208 platform_device_register(&mv2120_nor_flash); 209 platform_device_register(&mv2120_nor_flash);
209 210
210 platform_device_register(&mv2120_button_device); 211 platform_device_register(&mv2120_button_device);
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 282e503b003e..dd0641a0d074 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -397,8 +397,8 @@ static void __init net2big_init(void)
397 net2big_sata_power_init(); 397 net2big_sata_power_init();
398 orion5x_sata_init(&net2big_sata_data); 398 orion5x_sata_init(&net2big_sata_data);
399 399
400 orion5x_setup_dev_boot_win(NET2BIG_NOR_BOOT_BASE, 400 mvebu_mbus_add_window("devbus-boot", NET2BIG_NOR_BOOT_BASE,
401 NET2BIG_NOR_BOOT_SIZE); 401 NET2BIG_NOR_BOOT_SIZE);
402 platform_device_register(&net2big_nor_flash); 402 platform_device_register(&net2big_nor_flash);
403 403
404 platform_device_register(&net2big_gpio_buttons); 404 platform_device_register(&net2big_gpio_buttons);
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 973db98a3c27..503368023bb1 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -157,8 +157,11 @@ static int __init pcie_setup(struct pci_sys_data *sys)
157 if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) { 157 if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) {
158 printk(KERN_NOTICE "Applying Orion-1/Orion-NAS PCIe config " 158 printk(KERN_NOTICE "Applying Orion-1/Orion-NAS PCIe config "
159 "read transaction workaround\n"); 159 "read transaction workaround\n");
160 orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, 160 mvebu_mbus_add_window_remap_flags("pcie0.0",
161 ORION5X_PCIE_WA_SIZE); 161 ORION5X_PCIE_WA_PHYS_BASE,
162 ORION5X_PCIE_WA_SIZE,
163 MVEBU_MBUS_NO_REMAP,
164 MVEBU_MBUS_PCI_WA);
162 pcie_ops.read = pcie_rd_conf_wa; 165 pcie_ops.read = pcie_rd_conf_wa;
163 } 166 }
164 167
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index d6e72f672afb..1c4498bf650a 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -123,8 +123,8 @@ static void __init rd88f5181l_fxo_init(void)
123 orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ); 123 orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
124 orion5x_uart0_init(); 124 orion5x_uart0_init();
125 125
126 orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE, 126 mvebu_mbus_add_window("devbus-boot", RD88F5181L_FXO_NOR_BOOT_BASE,
127 RD88F5181L_FXO_NOR_BOOT_SIZE); 127 RD88F5181L_FXO_NOR_BOOT_SIZE);
128 platform_device_register(&rd88f5181l_fxo_nor_boot_flash); 128 platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
129} 129}
130 130
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index c8b7913310e5..adabe34c4fc6 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -130,8 +130,8 @@ static void __init rd88f5181l_ge_init(void)
130 orion5x_i2c_init(); 130 orion5x_i2c_init();
131 orion5x_uart0_init(); 131 orion5x_uart0_init();
132 132
133 orion5x_setup_dev_boot_win(RD88F5181L_GE_NOR_BOOT_BASE, 133 mvebu_mbus_add_window("devbus-boot", RD88F5181L_GE_NOR_BOOT_BASE,
134 RD88F5181L_GE_NOR_BOOT_SIZE); 134 RD88F5181L_GE_NOR_BOOT_SIZE);
135 platform_device_register(&rd88f5181l_ge_nor_boot_flash); 135 platform_device_register(&rd88f5181l_ge_nor_boot_flash);
136 136
137 i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1); 137 i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index f9e156725d7c..66e77ec91532 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -264,10 +264,11 @@ static void __init rd88f5182_init(void)
264 orion5x_uart0_init(); 264 orion5x_uart0_init();
265 orion5x_xor_init(); 265 orion5x_xor_init();
266 266
267 orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE, 267 mvebu_mbus_add_window("devbus-boot", RD88F5182_NOR_BOOT_BASE,
268 RD88F5182_NOR_BOOT_SIZE); 268 RD88F5182_NOR_BOOT_SIZE);
269 269
270 orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE); 270 mvebu_mbus_add_window("devbus-cs1", RD88F5182_NOR_BASE,
271 RD88F5182_NOR_SIZE);
271 platform_device_register(&rd88f5182_nor_flash); 272 platform_device_register(&rd88f5182_nor_flash);
272 platform_device_register(&rd88f5182_gpio_leds); 273 platform_device_register(&rd88f5182_gpio_leds);
273 274
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index acc0877ec1c9..a0bfa53e7556 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -329,8 +329,8 @@ static void __init tsp2_init(void)
329 /* 329 /*
330 * Configure peripherals. 330 * Configure peripherals.
331 */ 331 */
332 orion5x_setup_dev_boot_win(TSP2_NOR_BOOT_BASE, 332 mvebu_mbus_add_window("devbus-boot", TSP2_NOR_BOOT_BASE,
333 TSP2_NOR_BOOT_SIZE); 333 TSP2_NOR_BOOT_SIZE);
334 platform_device_register(&tsp2_nor_flash); 334 platform_device_register(&tsp2_nor_flash);
335 335
336 orion5x_ehci0_init(); 336 orion5x_ehci0_init();
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 9c17f0c2b488..80174f0f168e 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -286,8 +286,8 @@ static void __init qnap_ts209_init(void)
286 /* 286 /*
287 * Configure peripherals. 287 * Configure peripherals.
288 */ 288 */
289 orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE, 289 mvebu_mbus_add_window("devbus-boot", QNAP_TS209_NOR_BOOT_BASE,
290 QNAP_TS209_NOR_BOOT_SIZE); 290 QNAP_TS209_NOR_BOOT_SIZE);
291 platform_device_register(&qnap_ts209_nor_flash); 291 platform_device_register(&qnap_ts209_nor_flash);
292 292
293 orion5x_ehci0_init(); 293 orion5x_ehci0_init();
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 8cc5ab6c503e..92592790d6da 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -277,8 +277,8 @@ static void __init qnap_ts409_init(void)
277 /* 277 /*
278 * Configure peripherals. 278 * Configure peripherals.
279 */ 279 */
280 orion5x_setup_dev_boot_win(QNAP_TS409_NOR_BOOT_BASE, 280 mvebu_mbus_add_window("devbus-boot", QNAP_TS409_NOR_BOOT_BASE,
281 QNAP_TS409_NOR_BOOT_SIZE); 281 QNAP_TS409_NOR_BOOT_SIZE);
282 platform_device_register(&qnap_ts409_nor_flash); 282 platform_device_register(&qnap_ts409_nor_flash);
283 283
284 orion5x_ehci0_init(); 284 orion5x_ehci0_init();
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index 66552ca7e05d..6b84863c018d 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -127,8 +127,8 @@ static void __init wnr854t_init(void)
127 orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ); 127 orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
128 orion5x_uart0_init(); 128 orion5x_uart0_init();
129 129
130 orion5x_setup_dev_boot_win(WNR854T_NOR_BOOT_BASE, 130 mvebu_mbus_add_window("devbus-boot", WNR854T_NOR_BOOT_BASE,
131 WNR854T_NOR_BOOT_SIZE); 131 WNR854T_NOR_BOOT_SIZE);
132 platform_device_register(&wnr854t_nor_flash); 132 platform_device_register(&wnr854t_nor_flash);
133} 133}
134 134
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index 2c5408e2e689..fae684bc54f2 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -213,8 +213,8 @@ static void __init wrt350n_v2_init(void)
213 orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ); 213 orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ);
214 orion5x_uart0_init(); 214 orion5x_uart0_init();
215 215
216 orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE, 216 mvebu_mbus_add_window("devbus-boot", WRT350N_V2_NOR_BOOT_BASE,
217 WRT350N_V2_NOR_BOOT_SIZE); 217 WRT350N_V2_NOR_BOOT_SIZE);
218 platform_device_register(&wrt350n_v2_nor_flash); 218 platform_device_register(&wrt350n_v2_nor_flash);
219 platform_device_register(&wrt350n_v2_leds); 219 platform_device_register(&wrt350n_v2_leds);
220 platform_device_register(&wrt350n_v2_button_device); 220 platform_device_register(&wrt350n_v2_button_device);
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index 9fd843e1785b..09711cdc6817 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -3,7 +3,6 @@
3# 3#
4ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include 4ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
5 5
6obj-$(CONFIG_ARCH_ORION5X) += addr-map.o
7obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o 6obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o
8 7
9orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o 8orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o