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-rw-r--r--arch/arm/mach-davinci/Kconfig7
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c179
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c15
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c80
-rw-r--r--arch/arm/mach-davinci/da850.c152
-rw-r--r--arch/arm/mach-davinci/dm644x.c17
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h11
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h42
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h1
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c7
-rw-r--r--arch/arm/mach-exynos/mach-origen.c4
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c7
-rw-r--r--arch/arm/plat-samsung/setup-mipiphy.c20
13 files changed, 473 insertions, 69 deletions
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index ab99c3c3b752..026b4b277ae5 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -186,6 +186,13 @@ config DA850_UI_RMII
186 NOTE: Please take care while choosing this option, MII PHY will 186 NOTE: Please take care while choosing this option, MII PHY will
187 not be functional if RMII mode is selected. 187 not be functional if RMII mode is selected.
188 188
189config DA850_UI_SD_VIDEO_PORT
190 bool "Video Port Interface"
191 help
192 Say Y if you want to use Video Port Interface (VPIF) on the
193 DA850/OMAP-L138 EVM. The Video decoders/encoders are found on the
194 UI daughter card that is supplied with the EVM.
195
189endchoice 196endchoice
190 197
191config DA850_WL12XX 198config DA850_WL12XX
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1295e616ceee..32ee3f895967 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -45,6 +45,9 @@
45#include <linux/platform_data/mtd-davinci-aemif.h> 45#include <linux/platform_data/mtd-davinci-aemif.h>
46#include <linux/platform_data/spi-davinci.h> 46#include <linux/platform_data/spi-davinci.h>
47 47
48#include <media/tvp514x.h>
49#include <media/adv7343.h>
50
48#define DA850_EVM_PHY_ID "davinci_mdio-0:00" 51#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
49#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) 52#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
50#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) 53#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
@@ -452,6 +455,15 @@ static void da850_evm_ui_keys_init(unsigned gpio)
452 } 455 }
453} 456}
454 457
458#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
459static inline void da850_evm_setup_video_port(int video_sel)
460{
461 gpio_set_value_cansleep(video_sel, 0);
462}
463#else
464static inline void da850_evm_setup_video_port(int video_sel) { }
465#endif
466
455static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, 467static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
456 unsigned ngpio, void *c) 468 unsigned ngpio, void *c)
457{ 469{
@@ -497,6 +509,8 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
497 509
498 da850_evm_setup_emac_rmii(sel_a); 510 da850_evm_setup_emac_rmii(sel_a);
499 511
512 da850_evm_setup_video_port(sel_c);
513
500 return 0; 514 return 0;
501 515
502exp_setup_keys_fail: 516exp_setup_keys_fail:
@@ -1149,6 +1163,169 @@ static __init int da850_evm_init_cpufreq(void)
1149static __init int da850_evm_init_cpufreq(void) { return 0; } 1163static __init int da850_evm_init_cpufreq(void) { return 0; }
1150#endif 1164#endif
1151 1165
1166#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
1167
1168#define TVP5147_CH0 "tvp514x-0"
1169#define TVP5147_CH1 "tvp514x-1"
1170
1171/* VPIF capture configuration */
1172static struct tvp514x_platform_data tvp5146_pdata = {
1173 .clk_polarity = 0,
1174 .hs_polarity = 1,
1175 .vs_polarity = 1,
1176};
1177
1178#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
1179
1180static const struct vpif_input da850_ch0_inputs[] = {
1181 {
1182 .input = {
1183 .index = 0,
1184 .name = "Composite",
1185 .type = V4L2_INPUT_TYPE_CAMERA,
1186 .capabilities = V4L2_IN_CAP_STD,
1187 .std = TVP514X_STD_ALL,
1188 },
1189 .input_route = INPUT_CVBS_VI2B,
1190 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1191 .subdev_name = TVP5147_CH0,
1192 },
1193};
1194
1195static const struct vpif_input da850_ch1_inputs[] = {
1196 {
1197 .input = {
1198 .index = 0,
1199 .name = "S-Video",
1200 .type = V4L2_INPUT_TYPE_CAMERA,
1201 .capabilities = V4L2_IN_CAP_STD,
1202 .std = TVP514X_STD_ALL,
1203 },
1204 .input_route = INPUT_SVIDEO_VI2C_VI1C,
1205 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1206 .subdev_name = TVP5147_CH1,
1207 },
1208};
1209
1210static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
1211 {
1212 .name = TVP5147_CH0,
1213 .board_info = {
1214 I2C_BOARD_INFO("tvp5146", 0x5d),
1215 .platform_data = &tvp5146_pdata,
1216 },
1217 },
1218 {
1219 .name = TVP5147_CH1,
1220 .board_info = {
1221 I2C_BOARD_INFO("tvp5146", 0x5c),
1222 .platform_data = &tvp5146_pdata,
1223 },
1224 },
1225};
1226
1227static struct vpif_capture_config da850_vpif_capture_config = {
1228 .subdev_info = da850_vpif_capture_sdev_info,
1229 .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
1230 .chan_config[0] = {
1231 .inputs = da850_ch0_inputs,
1232 .input_count = ARRAY_SIZE(da850_ch0_inputs),
1233 .vpif_if = {
1234 .if_type = VPIF_IF_BT656,
1235 .hd_pol = 1,
1236 .vd_pol = 1,
1237 .fid_pol = 0,
1238 },
1239 },
1240 .chan_config[1] = {
1241 .inputs = da850_ch1_inputs,
1242 .input_count = ARRAY_SIZE(da850_ch1_inputs),
1243 .vpif_if = {
1244 .if_type = VPIF_IF_BT656,
1245 .hd_pol = 1,
1246 .vd_pol = 1,
1247 .fid_pol = 0,
1248 },
1249 },
1250 .card_name = "DA850/OMAP-L138 Video Capture",
1251};
1252
1253/* VPIF display configuration */
1254static struct vpif_subdev_info da850_vpif_subdev[] = {
1255 {
1256 .name = "adv7343",
1257 .board_info = {
1258 I2C_BOARD_INFO("adv7343", 0x2a),
1259 },
1260 },
1261};
1262
1263static const struct vpif_output da850_ch0_outputs[] = {
1264 {
1265 .output = {
1266 .index = 0,
1267 .name = "Composite",
1268 .type = V4L2_OUTPUT_TYPE_ANALOG,
1269 .capabilities = V4L2_OUT_CAP_STD,
1270 .std = V4L2_STD_ALL,
1271 },
1272 .subdev_name = "adv7343",
1273 .output_route = ADV7343_COMPOSITE_ID,
1274 },
1275 {
1276 .output = {
1277 .index = 1,
1278 .name = "S-Video",
1279 .type = V4L2_OUTPUT_TYPE_ANALOG,
1280 .capabilities = V4L2_OUT_CAP_STD,
1281 .std = V4L2_STD_ALL,
1282 },
1283 .subdev_name = "adv7343",
1284 .output_route = ADV7343_SVIDEO_ID,
1285 },
1286};
1287
1288static struct vpif_display_config da850_vpif_display_config = {
1289 .subdevinfo = da850_vpif_subdev,
1290 .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
1291 .chan_config[0] = {
1292 .outputs = da850_ch0_outputs,
1293 .output_count = ARRAY_SIZE(da850_ch0_outputs),
1294 },
1295 .card_name = "DA850/OMAP-L138 Video Display",
1296};
1297
1298static __init void da850_vpif_init(void)
1299{
1300 int ret;
1301
1302 ret = da850_register_vpif();
1303 if (ret)
1304 pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
1305
1306 ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
1307 if (ret)
1308 pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
1309 ret);
1310
1311 ret = da850_register_vpif_capture(&da850_vpif_capture_config);
1312 if (ret)
1313 pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
1314
1315 ret = davinci_cfg_reg_list(da850_vpif_display_pins);
1316 if (ret)
1317 pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
1318 ret);
1319
1320 ret = da850_register_vpif_display(&da850_vpif_display_config);
1321 if (ret)
1322 pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
1323}
1324
1325#else
1326static __init void da850_vpif_init(void) {}
1327#endif
1328
1152#ifdef CONFIG_DA850_WL12XX 1329#ifdef CONFIG_DA850_WL12XX
1153 1330
1154static void wl12xx_set_power(int index, bool power_on) 1331static void wl12xx_set_power(int index, bool power_on)
@@ -1375,6 +1552,8 @@ static __init void da850_evm_init(void)
1375 pr_warning("da850_evm_init: suspend registration failed: %d\n", 1552 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1376 ret); 1553 ret);
1377 1554
1555 da850_vpif_init();
1556
1378 ret = da8xx_register_spi(1, da850evm_spi_info, 1557 ret = da8xx_register_spi(1, da850evm_spi_info,
1379 ARRAY_SIZE(da850evm_spi_info)); 1558 ARRAY_SIZE(da850evm_spi_info));
1380 if (ret) 1559 if (ret)
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index ca72fc4b8cca..f22572cee49d 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -23,6 +23,7 @@
23#include <linux/phy.h> 23#include <linux/phy.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/videodev2.h> 25#include <linux/videodev2.h>
26#include <linux/v4l2-dv-timings.h>
26#include <linux/export.h> 27#include <linux/export.h>
27 28
28#include <media/tvp514x.h> 29#include <media/tvp514x.h>
@@ -620,7 +621,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
620 { 621 {
621 .name = "ntsc", 622 .name = "ntsc",
622 .timings_type = VPBE_ENC_STD, 623 .timings_type = VPBE_ENC_STD,
623 .timings = {V4L2_STD_525_60}, 624 .std_id = V4L2_STD_525_60,
624 .interlaced = 1, 625 .interlaced = 1,
625 .xres = 720, 626 .xres = 720,
626 .yres = 480, 627 .yres = 480,
@@ -632,7 +633,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
632 { 633 {
633 .name = "pal", 634 .name = "pal",
634 .timings_type = VPBE_ENC_STD, 635 .timings_type = VPBE_ENC_STD,
635 .timings = {V4L2_STD_625_50}, 636 .std_id = V4L2_STD_625_50,
636 .interlaced = 1, 637 .interlaced = 1,
637 .xres = 720, 638 .xres = 720,
638 .yres = 576, 639 .yres = 576,
@@ -647,8 +648,8 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
647static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = { 648static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
648 { 649 {
649 .name = "480p59_94", 650 .name = "480p59_94",
650 .timings_type = VPBE_ENC_DV_PRESET, 651 .timings_type = VPBE_ENC_CUSTOM_TIMINGS,
651 .timings = {V4L2_DV_480P59_94}, 652 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
652 .interlaced = 0, 653 .interlaced = 0,
653 .xres = 720, 654 .xres = 720,
654 .yres = 480, 655 .yres = 480,
@@ -659,8 +660,8 @@ static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
659 }, 660 },
660 { 661 {
661 .name = "576p50", 662 .name = "576p50",
662 .timings_type = VPBE_ENC_DV_PRESET, 663 .timings_type = VPBE_ENC_CUSTOM_TIMINGS,
663 .timings = {V4L2_DV_576P50}, 664 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
664 .interlaced = 0, 665 .interlaced = 0,
665 .xres = 720, 666 .xres = 720,
666 .yres = 576, 667 .yres = 576,
@@ -698,7 +699,7 @@ static struct vpbe_output dm644xevm_vpbe_outputs[] = {
698 .index = 1, 699 .index = 1,
699 .name = "Component", 700 .name = "Component",
700 .type = V4L2_OUTPUT_TYPE_ANALOG, 701 .type = V4L2_OUTPUT_TYPE_ANALOG,
701 .capabilities = V4L2_OUT_CAP_PRESETS, 702 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
702 }, 703 },
703 .subdev_name = VPBE_VENC_SUBDEV_NAME, 704 .subdev_name = VPBE_VENC_SUBDEV_NAME,
704 .default_mode = "480p59_94", 705 .default_mode = "480p59_94",
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 9944367b4931..1dbf85beed1b 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -26,6 +26,7 @@
26#include <linux/i2c/pcf857x.h> 26#include <linux/i2c/pcf857x.h>
27 27
28#include <media/tvp514x.h> 28#include <media/tvp514x.h>
29#include <media/adv7343.h>
29 30
30#include <linux/mtd/mtd.h> 31#include <linux/mtd/mtd.h>
31#include <linux/mtd/nand.h> 32#include <linux/mtd/nand.h>
@@ -496,18 +497,49 @@ static struct vpif_subdev_info dm646x_vpif_subdev[] = {
496 }, 497 },
497}; 498};
498 499
499static const char *output[] = { 500static const struct vpif_output dm6467_ch0_outputs[] = {
500 "Composite", 501 {
501 "Component", 502 .output = {
502 "S-Video", 503 .index = 0,
504 .name = "Composite",
505 .type = V4L2_OUTPUT_TYPE_ANALOG,
506 .capabilities = V4L2_OUT_CAP_STD,
507 .std = V4L2_STD_ALL,
508 },
509 .subdev_name = "adv7343",
510 .output_route = ADV7343_COMPOSITE_ID,
511 },
512 {
513 .output = {
514 .index = 1,
515 .name = "Component",
516 .type = V4L2_OUTPUT_TYPE_ANALOG,
517 .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS,
518 },
519 .subdev_name = "adv7343",
520 .output_route = ADV7343_COMPONENT_ID,
521 },
522 {
523 .output = {
524 .index = 2,
525 .name = "S-Video",
526 .type = V4L2_OUTPUT_TYPE_ANALOG,
527 .capabilities = V4L2_OUT_CAP_STD,
528 .std = V4L2_STD_ALL,
529 },
530 .subdev_name = "adv7343",
531 .output_route = ADV7343_SVIDEO_ID,
532 },
503}; 533};
504 534
505static struct vpif_display_config dm646x_vpif_display_config = { 535static struct vpif_display_config dm646x_vpif_display_config = {
506 .set_clock = set_vpif_clock, 536 .set_clock = set_vpif_clock,
507 .subdevinfo = dm646x_vpif_subdev, 537 .subdevinfo = dm646x_vpif_subdev,
508 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev), 538 .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
509 .output = output, 539 .chan_config[0] = {
510 .output_count = ARRAY_SIZE(output), 540 .outputs = dm6467_ch0_outputs,
541 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
542 },
511 .card_name = "DM646x EVM", 543 .card_name = "DM646x EVM",
512}; 544};
513 545
@@ -601,15 +633,6 @@ static struct vpif_subdev_info vpif_capture_sdev_info[] = {
601 I2C_BOARD_INFO("tvp5146", 0x5d), 633 I2C_BOARD_INFO("tvp5146", 0x5d),
602 .platform_data = &tvp5146_pdata, 634 .platform_data = &tvp5146_pdata,
603 }, 635 },
604 .input = INPUT_CVBS_VI2B,
605 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
606 .can_route = 1,
607 .vpif_if = {
608 .if_type = VPIF_IF_BT656,
609 .hd_pol = 1,
610 .vd_pol = 1,
611 .fid_pol = 0,
612 },
613 }, 636 },
614 { 637 {
615 .name = TVP5147_CH1, 638 .name = TVP5147_CH1,
@@ -617,15 +640,6 @@ static struct vpif_subdev_info vpif_capture_sdev_info[] = {
617 I2C_BOARD_INFO("tvp5146", 0x5c), 640 I2C_BOARD_INFO("tvp5146", 0x5c),
618 .platform_data = &tvp5146_pdata, 641 .platform_data = &tvp5146_pdata,
619 }, 642 },
620 .input = INPUT_SVIDEO_VI2C_VI1C,
621 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
622 .can_route = 1,
623 .vpif_if = {
624 .if_type = VPIF_IF_BT656,
625 .hd_pol = 1,
626 .vd_pol = 1,
627 .fid_pol = 0,
628 },
629 }, 643 },
630}; 644};
631 645
@@ -635,9 +649,12 @@ static const struct vpif_input dm6467_ch0_inputs[] = {
635 .index = 0, 649 .index = 0,
636 .name = "Composite", 650 .name = "Composite",
637 .type = V4L2_INPUT_TYPE_CAMERA, 651 .type = V4L2_INPUT_TYPE_CAMERA,
652 .capabilities = V4L2_IN_CAP_STD,
638 .std = TVP514X_STD_ALL, 653 .std = TVP514X_STD_ALL,
639 }, 654 },
640 .subdev_name = TVP5147_CH0, 655 .subdev_name = TVP5147_CH0,
656 .input_route = INPUT_CVBS_VI2B,
657 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
641 }, 658 },
642}; 659};
643 660
@@ -647,9 +664,12 @@ static const struct vpif_input dm6467_ch1_inputs[] = {
647 .index = 0, 664 .index = 0,
648 .name = "S-Video", 665 .name = "S-Video",
649 .type = V4L2_INPUT_TYPE_CAMERA, 666 .type = V4L2_INPUT_TYPE_CAMERA,
667 .capabilities = V4L2_IN_CAP_STD,
650 .std = TVP514X_STD_ALL, 668 .std = TVP514X_STD_ALL,
651 }, 669 },
652 .subdev_name = TVP5147_CH1, 670 .subdev_name = TVP5147_CH1,
671 .input_route = INPUT_SVIDEO_VI2C_VI1C,
672 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
653 }, 673 },
654}; 674};
655 675
@@ -661,10 +681,22 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = {
661 .chan_config[0] = { 681 .chan_config[0] = {
662 .inputs = dm6467_ch0_inputs, 682 .inputs = dm6467_ch0_inputs,
663 .input_count = ARRAY_SIZE(dm6467_ch0_inputs), 683 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
684 .vpif_if = {
685 .if_type = VPIF_IF_BT656,
686 .hd_pol = 1,
687 .vd_pol = 1,
688 .fid_pol = 0,
689 },
664 }, 690 },
665 .chan_config[1] = { 691 .chan_config[1] = {
666 .inputs = dm6467_ch1_inputs, 692 .inputs = dm6467_ch1_inputs,
667 .input_count = ARRAY_SIZE(dm6467_ch1_inputs), 693 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
694 .vpif_if = {
695 .if_type = VPIF_IF_BT656,
696 .hd_pol = 1,
697 .vd_pol = 1,
698 .fid_pol = 0,
699 },
668 }, 700 },
669}; 701};
670 702
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e517e1036b09..b90c172d5541 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -347,6 +347,13 @@ static struct clk spi1_clk = {
347 .flags = DA850_CLK_ASYNC3, 347 .flags = DA850_CLK_ASYNC3,
348}; 348};
349 349
350static struct clk vpif_clk = {
351 .name = "vpif",
352 .parent = &pll0_sysclk2,
353 .lpsc = DA850_LPSC1_VPIF,
354 .gpsc = 1,
355};
356
350static struct clk sata_clk = { 357static struct clk sata_clk = {
351 .name = "sata", 358 .name = "sata",
352 .parent = &pll0_sysclk2, 359 .parent = &pll0_sysclk2,
@@ -397,6 +404,7 @@ static struct clk_lookup da850_clks[] = {
397 CLK(NULL, "usb20", &usb20_clk), 404 CLK(NULL, "usb20", &usb20_clk),
398 CLK("spi_davinci.0", NULL, &spi0_clk), 405 CLK("spi_davinci.0", NULL, &spi0_clk),
399 CLK("spi_davinci.1", NULL, &spi1_clk), 406 CLK("spi_davinci.1", NULL, &spi1_clk),
407 CLK("vpif", NULL, &vpif_clk),
400 CLK("ahci", NULL, &sata_clk), 408 CLK("ahci", NULL, &sata_clk),
401 CLK(NULL, NULL, NULL), 409 CLK(NULL, NULL, NULL),
402}; 410};
@@ -573,6 +581,46 @@ static const struct mux_config da850_pins[] = {
573 MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false) 581 MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false)
574 MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false) 582 MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false)
575 MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) 583 MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
584 /* VPIF Capture */
585 MUX_CFG(DA850, VPIF_DIN0, 15, 4, 15, 1, false)
586 MUX_CFG(DA850, VPIF_DIN1, 15, 0, 15, 1, false)
587 MUX_CFG(DA850, VPIF_DIN2, 14, 28, 15, 1, false)
588 MUX_CFG(DA850, VPIF_DIN3, 14, 24, 15, 1, false)
589 MUX_CFG(DA850, VPIF_DIN4, 14, 20, 15, 1, false)
590 MUX_CFG(DA850, VPIF_DIN5, 14, 16, 15, 1, false)
591 MUX_CFG(DA850, VPIF_DIN6, 14, 12, 15, 1, false)
592 MUX_CFG(DA850, VPIF_DIN7, 14, 8, 15, 1, false)
593 MUX_CFG(DA850, VPIF_DIN8, 16, 4, 15, 1, false)
594 MUX_CFG(DA850, VPIF_DIN9, 16, 0, 15, 1, false)
595 MUX_CFG(DA850, VPIF_DIN10, 15, 28, 15, 1, false)
596 MUX_CFG(DA850, VPIF_DIN11, 15, 24, 15, 1, false)
597 MUX_CFG(DA850, VPIF_DIN12, 15, 20, 15, 1, false)
598 MUX_CFG(DA850, VPIF_DIN13, 15, 16, 15, 1, false)
599 MUX_CFG(DA850, VPIF_DIN14, 15, 12, 15, 1, false)
600 MUX_CFG(DA850, VPIF_DIN15, 15, 8, 15, 1, false)
601 MUX_CFG(DA850, VPIF_CLKIN0, 14, 0, 15, 1, false)
602 MUX_CFG(DA850, VPIF_CLKIN1, 14, 4, 15, 1, false)
603 MUX_CFG(DA850, VPIF_CLKIN2, 19, 8, 15, 1, false)
604 MUX_CFG(DA850, VPIF_CLKIN3, 19, 16, 15, 1, false)
605 /* VPIF Display */
606 MUX_CFG(DA850, VPIF_DOUT0, 17, 4, 15, 1, false)
607 MUX_CFG(DA850, VPIF_DOUT1, 17, 0, 15, 1, false)
608 MUX_CFG(DA850, VPIF_DOUT2, 16, 28, 15, 1, false)
609 MUX_CFG(DA850, VPIF_DOUT3, 16, 24, 15, 1, false)
610 MUX_CFG(DA850, VPIF_DOUT4, 16, 20, 15, 1, false)
611 MUX_CFG(DA850, VPIF_DOUT5, 16, 16, 15, 1, false)
612 MUX_CFG(DA850, VPIF_DOUT6, 16, 12, 15, 1, false)
613 MUX_CFG(DA850, VPIF_DOUT7, 16, 8, 15, 1, false)
614 MUX_CFG(DA850, VPIF_DOUT8, 18, 4, 15, 1, false)
615 MUX_CFG(DA850, VPIF_DOUT9, 18, 0, 15, 1, false)
616 MUX_CFG(DA850, VPIF_DOUT10, 17, 28, 15, 1, false)
617 MUX_CFG(DA850, VPIF_DOUT11, 17, 24, 15, 1, false)
618 MUX_CFG(DA850, VPIF_DOUT12, 17, 20, 15, 1, false)
619 MUX_CFG(DA850, VPIF_DOUT13, 17, 16, 15, 1, false)
620 MUX_CFG(DA850, VPIF_DOUT14, 17, 12, 15, 1, false)
621 MUX_CFG(DA850, VPIF_DOUT15, 17, 8, 15, 1, false)
622 MUX_CFG(DA850, VPIF_CLKO2, 19, 12, 15, 1, false)
623 MUX_CFG(DA850, VPIF_CLKO3, 19, 20, 15, 1, false)
576#endif 624#endif
577}; 625};
578 626
@@ -595,6 +643,26 @@ const short da850_lcdcntl_pins[] __initconst = {
595 -1 643 -1
596}; 644};
597 645
646const short da850_vpif_capture_pins[] __initdata = {
647 DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3,
648 DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7,
649 DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11,
650 DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15,
651 DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2,
652 DA850_VPIF_CLKIN3,
653 -1
654};
655
656const short da850_vpif_display_pins[] __initdata = {
657 DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3,
658 DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7,
659 DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10,
660 DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13,
661 DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2,
662 DA850_VPIF_CLKO3,
663 -1
664};
665
598/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ 666/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
599static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { 667static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
600 [IRQ_DA8XX_COMMTX] = 7, 668 [IRQ_DA8XX_COMMTX] = 7,
@@ -1064,6 +1132,90 @@ no_ddrpll_mem:
1064 return ret; 1132 return ret;
1065} 1133}
1066 1134
1135/* VPIF resource, platform data */
1136static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
1137
1138static struct resource da850_vpif_resource[] = {
1139 {
1140 .start = DA8XX_VPIF_BASE,
1141 .end = DA8XX_VPIF_BASE + 0xfff,
1142 .flags = IORESOURCE_MEM,
1143 }
1144};
1145
1146static struct platform_device da850_vpif_dev = {
1147 .name = "vpif",
1148 .id = -1,
1149 .dev = {
1150 .dma_mask = &da850_vpif_dma_mask,
1151 .coherent_dma_mask = DMA_BIT_MASK(32),
1152 },
1153 .resource = da850_vpif_resource,
1154 .num_resources = ARRAY_SIZE(da850_vpif_resource),
1155};
1156
1157static struct resource da850_vpif_display_resource[] = {
1158 {
1159 .start = IRQ_DA850_VPIFINT,
1160 .end = IRQ_DA850_VPIFINT,
1161 .flags = IORESOURCE_IRQ,
1162 },
1163};
1164
1165static struct platform_device da850_vpif_display_dev = {
1166 .name = "vpif_display",
1167 .id = -1,
1168 .dev = {
1169 .dma_mask = &da850_vpif_dma_mask,
1170 .coherent_dma_mask = DMA_BIT_MASK(32),
1171 },
1172 .resource = da850_vpif_display_resource,
1173 .num_resources = ARRAY_SIZE(da850_vpif_display_resource),
1174};
1175
1176static struct resource da850_vpif_capture_resource[] = {
1177 {
1178 .start = IRQ_DA850_VPIFINT,
1179 .end = IRQ_DA850_VPIFINT,
1180 .flags = IORESOURCE_IRQ,
1181 },
1182 {
1183 .start = IRQ_DA850_VPIFINT,
1184 .end = IRQ_DA850_VPIFINT,
1185 .flags = IORESOURCE_IRQ,
1186 },
1187};
1188
1189static struct platform_device da850_vpif_capture_dev = {
1190 .name = "vpif_capture",
1191 .id = -1,
1192 .dev = {
1193 .dma_mask = &da850_vpif_dma_mask,
1194 .coherent_dma_mask = DMA_BIT_MASK(32),
1195 },
1196 .resource = da850_vpif_capture_resource,
1197 .num_resources = ARRAY_SIZE(da850_vpif_capture_resource),
1198};
1199
1200int __init da850_register_vpif(void)
1201{
1202 return platform_device_register(&da850_vpif_dev);
1203}
1204
1205int __init da850_register_vpif_display(struct vpif_display_config
1206 *display_config)
1207{
1208 da850_vpif_display_dev.dev.platform_data = display_config;
1209 return platform_device_register(&da850_vpif_display_dev);
1210}
1211
1212int __init da850_register_vpif_capture(struct vpif_capture_config
1213 *capture_config)
1214{
1215 da850_vpif_capture_dev.dev.platform_data = capture_config;
1216 return platform_device_register(&da850_vpif_capture_dev);
1217}
1218
1067static struct davinci_soc_info davinci_soc_info_da850 = { 1219static struct davinci_soc_info davinci_soc_info_da850 = {
1068 .io_desc = da850_io_desc, 1220 .io_desc = da850_io_desc,
1069 .io_desc_num = ARRAY_SIZE(da850_io_desc), 1221 .io_desc_num = ARRAY_SIZE(da850_io_desc),
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 0755d466221a..cd0c8b1e1ecf 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -701,7 +701,7 @@ static struct resource dm644x_venc_resources[] = {
701#define DM644X_VPSS_DACCLKEN BIT(4) 701#define DM644X_VPSS_DACCLKEN BIT(4)
702 702
703static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type, 703static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
704 unsigned int mode) 704 unsigned int pclock)
705{ 705{
706 int ret = 0; 706 int ret = 0;
707 u32 v = DM644X_VPSS_VENCLKEN; 707 u32 v = DM644X_VPSS_VENCLKEN;
@@ -711,27 +711,18 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
711 v |= DM644X_VPSS_DACCLKEN; 711 v |= DM644X_VPSS_DACCLKEN;
712 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 712 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
713 break; 713 break;
714 case VPBE_ENC_DV_PRESET: 714 case VPBE_ENC_CUSTOM_TIMINGS:
715 switch (mode) { 715 if (pclock <= 27000000) {
716 case V4L2_DV_480P59_94:
717 case V4L2_DV_576P50:
718 v |= DM644X_VPSS_MUXSEL_PLL2_MODE | 716 v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
719 DM644X_VPSS_DACCLKEN; 717 DM644X_VPSS_DACCLKEN;
720 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 718 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
721 break; 719 } else {
722 case V4L2_DV_720P60:
723 case V4L2_DV_1080I60:
724 case V4L2_DV_1080P30:
725 /* 720 /*
726 * For HD, use external clock source since 721 * For HD, use external clock source since
727 * HD requires higher clock rate 722 * HD requires higher clock rate
728 */ 723 */
729 v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE; 724 v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE;
730 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 725 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
731 break;
732 default:
733 ret = -EINVAL;
734 break;
735 } 726 }
736 break; 727 break;
737 default: 728 default:
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index c9ee723c56f3..aaccdc4528fc 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -17,6 +17,7 @@
17#include <linux/davinci_emac.h> 17#include <linux/davinci_emac.h>
18#include <linux/spi/spi.h> 18#include <linux/spi/spi.h>
19#include <linux/platform_data/davinci_asp.h> 19#include <linux/platform_data/davinci_asp.h>
20#include <linux/videodev2.h>
20 21
21#include <mach/serial.h> 22#include <mach/serial.h>
22#include <mach/edma.h> 23#include <mach/edma.h>
@@ -26,6 +27,8 @@
26#include <linux/platform_data/usb-davinci.h> 27#include <linux/platform_data/usb-davinci.h>
27#include <linux/platform_data/spi-davinci.h> 28#include <linux/platform_data/spi-davinci.h>
28 29
30#include <media/davinci/vpif_types.h>
31
29extern void __iomem *da8xx_syscfg0_base; 32extern void __iomem *da8xx_syscfg0_base;
30extern void __iomem *da8xx_syscfg1_base; 33extern void __iomem *da8xx_syscfg1_base;
31 34
@@ -63,6 +66,7 @@ extern unsigned int da850_max_speed;
63#define DA8XX_PLL0_BASE 0x01c11000 66#define DA8XX_PLL0_BASE 0x01c11000
64#define DA8XX_TIMER64P0_BASE 0x01c20000 67#define DA8XX_TIMER64P0_BASE 0x01c20000
65#define DA8XX_TIMER64P1_BASE 0x01c21000 68#define DA8XX_TIMER64P1_BASE 0x01c21000
69#define DA8XX_VPIF_BASE 0x01e17000
66#define DA8XX_GPIO_BASE 0x01e26000 70#define DA8XX_GPIO_BASE 0x01e26000
67#define DA8XX_PSC1_BASE 0x01e27000 71#define DA8XX_PSC1_BASE 0x01e27000
68#define DA8XX_AEMIF_CS2_BASE 0x60000000 72#define DA8XX_AEMIF_CS2_BASE 0x60000000
@@ -92,6 +96,11 @@ int da8xx_register_cpuidle(void);
92void __iomem * __init da8xx_get_mem_ctlr(void); 96void __iomem * __init da8xx_get_mem_ctlr(void);
93int da850_register_pm(struct platform_device *pdev); 97int da850_register_pm(struct platform_device *pdev);
94int __init da850_register_sata(unsigned long refclkpn); 98int __init da850_register_sata(unsigned long refclkpn);
99int __init da850_register_vpif(void);
100int __init da850_register_vpif_display
101 (struct vpif_display_config *display_config);
102int __init da850_register_vpif_capture
103 (struct vpif_capture_config *capture_config);
95void da8xx_restart(char mode, const char *cmd); 104void da8xx_restart(char mode, const char *cmd);
96 105
97extern struct platform_device da8xx_serial_device; 106extern struct platform_device da8xx_serial_device;
@@ -126,6 +135,8 @@ extern const short da830_ecap1_pins[];
126extern const short da830_ecap2_pins[]; 135extern const short da830_ecap2_pins[];
127extern const short da830_eqep0_pins[]; 136extern const short da830_eqep0_pins[];
128extern const short da830_eqep1_pins[]; 137extern const short da830_eqep1_pins[];
138extern const short da850_vpif_capture_pins[];
139extern const short da850_vpif_display_pins[];
129 140
130extern const short da850_i2c0_pins[]; 141extern const short da850_i2c0_pins[];
131extern const short da850_i2c1_pins[]; 142extern const short da850_i2c1_pins[];
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index a7e92fca32e6..9e95b8a1edb6 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -928,6 +928,48 @@ enum davinci_da850_index {
928 DA850_GPIO6_10, 928 DA850_GPIO6_10,
929 DA850_GPIO6_13, 929 DA850_GPIO6_13,
930 DA850_RTC_ALARM, 930 DA850_RTC_ALARM,
931
932 /* VPIF Capture */
933 DA850_VPIF_DIN0,
934 DA850_VPIF_DIN1,
935 DA850_VPIF_DIN2,
936 DA850_VPIF_DIN3,
937 DA850_VPIF_DIN4,
938 DA850_VPIF_DIN5,
939 DA850_VPIF_DIN6,
940 DA850_VPIF_DIN7,
941 DA850_VPIF_DIN8,
942 DA850_VPIF_DIN9,
943 DA850_VPIF_DIN10,
944 DA850_VPIF_DIN11,
945 DA850_VPIF_DIN12,
946 DA850_VPIF_DIN13,
947 DA850_VPIF_DIN14,
948 DA850_VPIF_DIN15,
949 DA850_VPIF_CLKIN0,
950 DA850_VPIF_CLKIN1,
951 DA850_VPIF_CLKIN2,
952 DA850_VPIF_CLKIN3,
953
954 /* VPIF Display */
955 DA850_VPIF_DOUT0,
956 DA850_VPIF_DOUT1,
957 DA850_VPIF_DOUT2,
958 DA850_VPIF_DOUT3,
959 DA850_VPIF_DOUT4,
960 DA850_VPIF_DOUT5,
961 DA850_VPIF_DOUT6,
962 DA850_VPIF_DOUT7,
963 DA850_VPIF_DOUT8,
964 DA850_VPIF_DOUT9,
965 DA850_VPIF_DOUT10,
966 DA850_VPIF_DOUT11,
967 DA850_VPIF_DOUT12,
968 DA850_VPIF_DOUT13,
969 DA850_VPIF_DOUT14,
970 DA850_VPIF_DOUT15,
971 DA850_VPIF_CLKO2,
972 DA850_VPIF_CLKO3,
931}; 973};
932 974
933enum davinci_tnetv107x_index { 975enum davinci_tnetv107x_index {
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 405318e35bf6..40a0027838e8 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -166,6 +166,7 @@
166#define DA830_LPSC1_McASP1 8 166#define DA830_LPSC1_McASP1 8
167#define DA850_LPSC1_SATA 8 167#define DA850_LPSC1_SATA 8
168#define DA830_LPSC1_McASP2 9 168#define DA830_LPSC1_McASP2 9
169#define DA850_LPSC1_VPIF 9
169#define DA8XX_LPSC1_SPI1 10 170#define DA8XX_LPSC1_SPI1 10
170#define DA8XX_LPSC1_I2C 11 171#define DA8XX_LPSC1_I2C 11
171#define DA8XX_LPSC1_UART1 12 172#define DA8XX_LPSC1_UART1 12
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 85fc2feb0af0..c05d7aa84031 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -378,10 +378,10 @@ static struct regulator_consumer_supply __initdata max8997_ldo1_[] = {
378}; 378};
379static struct regulator_consumer_supply __initdata max8997_ldo3_[] = { 379static struct regulator_consumer_supply __initdata max8997_ldo3_[] = {
380 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */ 380 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */
381 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */ 381 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
382}; 382};
383static struct regulator_consumer_supply __initdata max8997_ldo4_[] = { 383static struct regulator_consumer_supply __initdata max8997_ldo4_[] = {
384 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */ 384 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
385}; 385};
386static struct regulator_consumer_supply __initdata max8997_ldo5_[] = { 386static struct regulator_consumer_supply __initdata max8997_ldo5_[] = {
387 REGULATOR_SUPPLY("vhsic", "modemctl"), /* MODEM */ 387 REGULATOR_SUPPLY("vhsic", "modemctl"), /* MODEM */
@@ -1180,9 +1180,7 @@ static struct platform_device cam_8m_12v_fixed_rdev = {
1180static struct s5p_platform_mipi_csis mipi_csis_platdata = { 1180static struct s5p_platform_mipi_csis mipi_csis_platdata = {
1181 .clk_rate = 166000000UL, 1181 .clk_rate = 166000000UL,
1182 .lanes = 2, 1182 .lanes = 2,
1183 .alignment = 32,
1184 .hs_settle = 12, 1183 .hs_settle = 12,
1185 .phy_enable = s5p_csis_phy_enable,
1186}; 1184};
1187 1185
1188#define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */ 1186#define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */
@@ -1226,7 +1224,6 @@ static struct s5p_fimc_isp_info nuri_camera_sensors[] = {
1226 .bus_type = FIMC_MIPI_CSI2, 1224 .bus_type = FIMC_MIPI_CSI2,
1227 .board_info = &m5mols_board_info, 1225 .board_info = &m5mols_board_info,
1228 .clk_frequency = 24000000UL, 1226 .clk_frequency = 24000000UL,
1229 .csi_data_align = 32,
1230 }, 1227 },
1231}; 1228};
1232 1229
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index c11a62e23dcc..9adf491674ea 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -97,12 +97,12 @@ static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
97}; 97};
98 98
99static struct regulator_consumer_supply __initdata ldo3_consumer[] = { 99static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
100 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */ 100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */ 101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */ 102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
103}; 103};
104static struct regulator_consumer_supply __initdata ldo6_consumer[] = { 104static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
105 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */ 105 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
106}; 106};
107static struct regulator_consumer_supply __initdata ldo7_consumer[] = { 107static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
108 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */ 108 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 08b81fd99505..ebc9dd339a38 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -209,7 +209,7 @@ static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
209 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), 209 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
210 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), 210 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
211 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), 211 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
212 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), 212 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
213}; 213};
214 214
215static struct regulator_init_data lp3974_ldo3_data = { 215static struct regulator_init_data lp3974_ldo3_data = {
@@ -273,7 +273,7 @@ static struct regulator_init_data lp3974_ldo6_data = {
273}; 273};
274 274
275static struct regulator_consumer_supply lp3974_ldo7_consumer[] = { 275static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
276 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), 276 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
277}; 277};
278 278
279static struct regulator_init_data lp3974_ldo7_data = { 279static struct regulator_init_data lp3974_ldo7_data = {
@@ -942,9 +942,7 @@ static struct platform_device cam_s_if_fixed_reg_dev = {
942static struct s5p_platform_mipi_csis mipi_csis_platdata = { 942static struct s5p_platform_mipi_csis mipi_csis_platdata = {
943 .clk_rate = 166000000UL, 943 .clk_rate = 166000000UL,
944 .lanes = 2, 944 .lanes = 2,
945 .alignment = 32,
946 .hs_settle = 12, 945 .hs_settle = 12,
947 .phy_enable = s5p_csis_phy_enable,
948}; 946};
949 947
950#define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3) 948#define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
@@ -1008,7 +1006,6 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = {
1008 .board_info = &m5mols_board_info, 1006 .board_info = &m5mols_board_info,
1009 .i2c_bus_num = 0, 1007 .i2c_bus_num = 0,
1010 .clk_frequency = 24000000UL, 1008 .clk_frequency = 24000000UL,
1011 .csi_data_align = 32,
1012 }, 1009 },
1013}; 1010};
1014 1011
diff --git a/arch/arm/plat-samsung/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c
index 683c466c0e6a..147459327601 100644
--- a/arch/arm/plat-samsung/setup-mipiphy.c
+++ b/arch/arm/plat-samsung/setup-mipiphy.c
@@ -14,24 +14,18 @@
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <mach/regs-clock.h> 15#include <mach/regs-clock.h>
16 16
17static int __s5p_mipi_phy_control(struct platform_device *pdev, 17static int __s5p_mipi_phy_control(int id, bool on, u32 reset)
18 bool on, u32 reset)
19{ 18{
20 static DEFINE_SPINLOCK(lock); 19 static DEFINE_SPINLOCK(lock);
21 void __iomem *addr; 20 void __iomem *addr;
22 unsigned long flags; 21 unsigned long flags;
23 int pid;
24 u32 cfg; 22 u32 cfg;
25 23
26 if (!pdev) 24 id = max(0, id);
25 if (id > 1)
27 return -EINVAL; 26 return -EINVAL;
28 27
29 pid = (pdev->id == -1) ? 0 : pdev->id; 28 addr = S5P_MIPI_DPHY_CONTROL(id);
30
31 if (pid != 0 && pid != 1)
32 return -EINVAL;
33
34 addr = S5P_MIPI_DPHY_CONTROL(pid);
35 29
36 spin_lock_irqsave(&lock, flags); 30 spin_lock_irqsave(&lock, flags);
37 31
@@ -52,12 +46,12 @@ static int __s5p_mipi_phy_control(struct platform_device *pdev,
52 return 0; 46 return 0;
53} 47}
54 48
55int s5p_csis_phy_enable(struct platform_device *pdev, bool on) 49int s5p_csis_phy_enable(int id, bool on)
56{ 50{
57 return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_SRESETN); 51 return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
58} 52}
59 53
60int s5p_dsim_phy_enable(struct platform_device *pdev, bool on) 54int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
61{ 55{
62 return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_MRESETN); 56 return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
63} 57}