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-rw-r--r--arch/arm/Kconfig26
-rw-r--r--arch/arm/boot/compressed/Makefile3
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi4
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts5
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts5
-rw-r--r--arch/arm/boot/dts/exynos5250-pinctrl.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi4
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi20
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts20
-rw-r--r--arch/arm/boot/dts/omap5.dtsi3
-rw-r--r--arch/arm/include/asm/cacheflush.h4
-rw-r--r--arch/arm/include/asm/cputype.h2
-rw-r--r--arch/arm/include/asm/glue-proc.h9
-rw-r--r--arch/arm/include/asm/smp_plat.h2
-rw-r--r--arch/arm/kernel/devtree.c10
-rw-r--r--arch/arm/kernel/machine_kexec.c4
-rw-r--r--arch/arm/kernel/process.c43
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/kernel/smp.c13
-rw-r--r--arch/arm/mach-kirkwood/mpp.c5
-rw-r--r--arch/arm/mach-omap2/clock36xx.c18
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c9
-rw-r--r--arch/arm/mach-omap2/pm34xx.c6
-rw-r--r--arch/arm/mach-prima2/pm.c6
-rw-r--r--arch/arm/mach-prima2/rstc.c6
-rw-r--r--arch/arm/mm/cache-v7.S8
-rw-r--r--arch/arm/mm/flush.c33
-rw-r--r--arch/arm/mm/mmu.c8
-rw-r--r--arch/arm/mm/nommu.c6
-rw-r--r--arch/arm/mm/proc-fa526.S1
-rw-r--r--arch/arm/mm/proc-macros.S5
-rw-r--r--arch/arm/mm/proc-v7.S38
-rw-r--r--arch/arm/plat-samsung/pm.c18
33 files changed, 278 insertions, 70 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 49d993cee512..136f263ed47b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1087,6 +1087,20 @@ if !MMU
1087source "arch/arm/Kconfig-nommu" 1087source "arch/arm/Kconfig-nommu"
1088endif 1088endif
1089 1089
1090config PJ4B_ERRATA_4742
1091 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1092 depends on CPU_PJ4B && MACH_ARMADA_370
1093 default y
1094 help
1095 When coming out of either a Wait for Interrupt (WFI) or a Wait for
1096 Event (WFE) IDLE states, a specific timing sensitivity exists between
1097 the retiring WFI/WFE instructions and the newly issued subsequent
1098 instructions. This sensitivity can result in a CPU hang scenario.
1099 Workaround:
1100 The software must insert either a Data Synchronization Barrier (DSB)
1101 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1102 instruction
1103
1090config ARM_ERRATA_326103 1104config ARM_ERRATA_326103
1091 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" 1105 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1092 depends on CPU_V6 1106 depends on CPU_V6
@@ -1189,6 +1203,16 @@ config PL310_ERRATA_588369
1189 is not correctly implemented in PL310 as clean lines are not 1203 is not correctly implemented in PL310 as clean lines are not
1190 invalidated as a result of these operations. 1204 invalidated as a result of these operations.
1191 1205
1206config ARM_ERRATA_643719
1207 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1208 depends on CPU_V7 && SMP
1209 help
1210 This option enables the workaround for the 643719 Cortex-A9 (prior to
1211 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1212 register returns zero when it should return one. The workaround
1213 corrects this value, ensuring cache maintenance operations which use
1214 it behave as intended and avoiding data corruption.
1215
1192config ARM_ERRATA_720789 1216config ARM_ERRATA_720789
1193 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1217 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1194 depends on CPU_V7 1218 depends on CPU_V7
@@ -2006,7 +2030,7 @@ config XIP_PHYS_ADDR
2006 2030
2007config KEXEC 2031config KEXEC
2008 bool "Kexec system call (EXPERIMENTAL)" 2032 bool "Kexec system call (EXPERIMENTAL)"
2009 depends on (!SMP || HOTPLUG_CPU) 2033 depends on (!SMP || PM_SLEEP_SMP)
2010 help 2034 help
2011 kexec is a system call that implements the ability to shutdown your 2035 kexec is a system call that implements the ability to shutdown your
2012 current kernel, and to start another kernel. It is like a reboot 2036 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 79e9bdbfc491..120b83bfde20 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -116,7 +116,8 @@ targets := vmlinux vmlinux.lds \
116 116
117# Make sure files are removed during clean 117# Make sure files are removed during clean
118extra-y += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \ 118extra-y += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
119 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) 119 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs) \
120 hyp-stub.S
120 121
121ifeq ($(CONFIG_FUNCTION_TRACER),y) 122ifeq ($(CONFIG_FUNCTION_TRACER),y)
122ORIG_CFLAGS := $(KBUILD_CFLAGS) 123ORIG_CFLAGS := $(KBUILD_CFLAGS)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 1460d9b88adf..8e1248f01fab 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -409,8 +409,8 @@
409 ti,hwmods = "gpmc"; 409 ti,hwmods = "gpmc";
410 reg = <0x50000000 0x2000>; 410 reg = <0x50000000 0x2000>;
411 interrupts = <100>; 411 interrupts = <100>;
412 num-cs = <7>; 412 gpmc,num-cs = <7>;
413 num-waitpins = <2>; 413 gpmc,num-waitpins = <2>;
414 #address-cells = <2>; 414 #address-cells = <2>;
415 #size-cells = <1>; 415 #size-cells = <1>;
416 status = "disabled"; 416 status = "disabled";
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 3ee63d128e27..76db557adbe7 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -39,8 +39,9 @@
39 }; 39 };
40 40
41 soc { 41 soc {
42 ranges = <0 0 0xd0000000 0x100000 42 ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
43 0xf0000000 0 0xf0000000 0x1000000>; 43 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
44 0xf0000000 0 0xf0000000 0x1000000 /* Device Bus, NOR 16MiB */>;
44 45
45 internal-regs { 46 internal-regs {
46 serial@12000 { 47 serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 46b785064dd8..fdea75c73411 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,8 +27,9 @@
27 }; 27 };
28 28
29 soc { 29 soc {
30 ranges = <0 0 0xd0000000 0x100000 30 ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */
31 0xf0000000 0 0xf0000000 0x8000000>; 31 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */
32 0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>;
32 33
33 internal-regs { 34 internal-regs {
34 serial@12000 { 35 serial@12000 {
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
index d1650fb34c0a..ded558bb0f3b 100644
--- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -763,7 +763,7 @@
763 }; 763 };
764 }; 764 };
765 765
766 pinctrl@03680000 { 766 pinctrl@03860000 {
767 gpz: gpz { 767 gpz: gpz {
768 gpio-controller; 768 gpio-controller;
769 #gpio-cells = <2>; 769 #gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 0673524238a6..fc9fb3d526e2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -161,9 +161,9 @@
161 interrupts = <0 50 0>; 161 interrupts = <0 50 0>;
162 }; 162 };
163 163
164 pinctrl_3: pinctrl@03680000 { 164 pinctrl_3: pinctrl@03860000 {
165 compatible = "samsung,exynos5250-pinctrl"; 165 compatible = "samsung,exynos5250-pinctrl";
166 reg = <0x0368000 0x1000>; 166 reg = <0x03860000 0x1000>;
167 interrupts = <0 47 0>; 167 interrupts = <0 47 0>;
168 }; 168 };
169 169
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 03bd60deb52b..eeb734e25709 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -56,9 +56,23 @@
56 }; 56 };
57}; 57};
58 58
59&omap4_pmx_wkup {
60 pinctrl-names = "default";
61 pinctrl-0 = <
62 &twl6030_wkup_pins
63 >;
64
65 twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
66 pinctrl-single,pins = <
67 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
68 >;
69 };
70};
71
59&omap4_pmx_core { 72&omap4_pmx_core {
60 pinctrl-names = "default"; 73 pinctrl-names = "default";
61 pinctrl-0 = < 74 pinctrl-0 = <
75 &twl6030_pins
62 &twl6040_pins 76 &twl6040_pins
63 &mcpdm_pins 77 &mcpdm_pins
64 &mcbsp1_pins 78 &mcbsp1_pins
@@ -66,6 +80,12 @@
66 &tpd12s015_pins 80 &tpd12s015_pins
67 >; 81 >;
68 82
83 twl6030_pins: pinmux_twl6030_pins {
84 pinctrl-single,pins = <
85 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
86 >;
87 };
88
69 twl6040_pins: pinmux_twl6040_pins { 89 twl6040_pins: pinmux_twl6040_pins {
70 pinctrl-single,pins = < 90 pinctrl-single,pins = <
71 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ 91 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index a35d9cd58063..98505a2ef162 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -142,9 +142,23 @@
142 }; 142 };
143}; 143};
144 144
145&omap4_pmx_wkup {
146 pinctrl-names = "default";
147 pinctrl-0 = <
148 &twl6030_wkup_pins
149 >;
150
151 twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
152 pinctrl-single,pins = <
153 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */
154 >;
155 };
156};
157
145&omap4_pmx_core { 158&omap4_pmx_core {
146 pinctrl-names = "default"; 159 pinctrl-names = "default";
147 pinctrl-0 = < 160 pinctrl-0 = <
161 &twl6030_pins
148 &twl6040_pins 162 &twl6040_pins
149 &mcpdm_pins 163 &mcpdm_pins
150 &dmic_pins 164 &dmic_pins
@@ -179,6 +193,12 @@
179 >; 193 >;
180 }; 194 };
181 195
196 twl6030_pins: pinmux_twl6030_pins {
197 pinctrl-single,pins = <
198 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */
199 >;
200 };
201
182 twl6040_pins: pinmux_twl6040_pins { 202 twl6040_pins: pinmux_twl6040_pins {
183 pinctrl-single,pins = < 203 pinctrl-single,pins = <
184 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ 204 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3dd7ff825828..635cae283011 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -538,6 +538,7 @@
538 interrupts = <0 41 0x4>; 538 interrupts = <0 41 0x4>;
539 ti,hwmods = "timer5"; 539 ti,hwmods = "timer5";
540 ti,timer-dsp; 540 ti,timer-dsp;
541 ti,timer-pwm;
541 }; 542 };
542 543
543 timer6: timer@4013a000 { 544 timer6: timer@4013a000 {
@@ -574,6 +575,7 @@
574 reg = <0x4803e000 0x80>; 575 reg = <0x4803e000 0x80>;
575 interrupts = <0 45 0x4>; 576 interrupts = <0 45 0x4>;
576 ti,hwmods = "timer9"; 577 ti,hwmods = "timer9";
578 ti,timer-pwm;
577 }; 579 };
578 580
579 timer10: timer@48086000 { 581 timer10: timer@48086000 {
@@ -581,6 +583,7 @@
581 reg = <0x48086000 0x80>; 583 reg = <0x48086000 0x80>;
582 interrupts = <0 46 0x4>; 584 interrupts = <0 46 0x4>;
583 ti,hwmods = "timer10"; 585 ti,hwmods = "timer10";
586 ti,timer-pwm;
584 }; 587 };
585 588
586 timer11: timer@48088000 { 589 timer11: timer@48088000 {
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index bff71388e72a..17d0ae8672fa 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -320,9 +320,7 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
320} 320}
321 321
322#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE 322#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
323static inline void flush_kernel_dcache_page(struct page *page) 323extern void flush_kernel_dcache_page(struct page *);
324{
325}
326 324
327#define flush_dcache_mmap_lock(mapping) \ 325#define flush_dcache_mmap_lock(mapping) \
328 spin_lock_irq(&(mapping)->tree_lock) 326 spin_lock_irq(&(mapping)->tree_lock)
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 7652712d1d14..dba62cb1ad08 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -32,6 +32,8 @@
32 32
33#define MPIDR_HWID_BITMASK 0xFFFFFF 33#define MPIDR_HWID_BITMASK 0xFFFFFF
34 34
35#define MPIDR_INVALID (~MPIDR_HWID_BITMASK)
36
35#define MPIDR_LEVEL_BITS 8 37#define MPIDR_LEVEL_BITS 8
36#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1) 38#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
37 39
diff --git a/arch/arm/include/asm/glue-proc.h b/arch/arm/include/asm/glue-proc.h
index ac1dd54724b6..8017e94acc5e 100644
--- a/arch/arm/include/asm/glue-proc.h
+++ b/arch/arm/include/asm/glue-proc.h
@@ -230,6 +230,15 @@
230# endif 230# endif
231#endif 231#endif
232 232
233#ifdef CONFIG_CPU_PJ4B
234# ifdef CPU_NAME
235# undef MULTI_CPU
236# define MULTI_CPU
237# else
238# define CPU_NAME cpu_pj4b
239# endif
240#endif
241
233#ifndef MULTI_CPU 242#ifndef MULTI_CPU
234#define cpu_proc_init __glue(CPU_NAME,_proc_init) 243#define cpu_proc_init __glue(CPU_NAME,_proc_init)
235#define cpu_proc_fin __glue(CPU_NAME,_proc_fin) 244#define cpu_proc_fin __glue(CPU_NAME,_proc_fin)
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index aaa61b6f50ff..e78983202737 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -49,7 +49,7 @@ static inline int cache_ops_need_broadcast(void)
49/* 49/*
50 * Logical CPU mapping. 50 * Logical CPU mapping.
51 */ 51 */
52extern int __cpu_logical_map[]; 52extern u32 __cpu_logical_map[];
53#define cpu_logical_map(cpu) __cpu_logical_map[cpu] 53#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
54/* 54/*
55 * Retrieve logical cpu index corresponding to a given MPIDR[23:0] 55 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 5af04f6daa33..5859c8bc727c 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -82,7 +82,7 @@ void __init arm_dt_init_cpu_maps(void)
82 u32 i, j, cpuidx = 1; 82 u32 i, j, cpuidx = 1;
83 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; 83 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
84 84
85 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = UINT_MAX }; 85 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
86 bool bootcpu_valid = false; 86 bool bootcpu_valid = false;
87 cpus = of_find_node_by_path("/cpus"); 87 cpus = of_find_node_by_path("/cpus");
88 88
@@ -92,6 +92,9 @@ void __init arm_dt_init_cpu_maps(void)
92 for_each_child_of_node(cpus, cpu) { 92 for_each_child_of_node(cpus, cpu) {
93 u32 hwid; 93 u32 hwid;
94 94
95 if (of_node_cmp(cpu->type, "cpu"))
96 continue;
97
95 pr_debug(" * %s...\n", cpu->full_name); 98 pr_debug(" * %s...\n", cpu->full_name);
96 /* 99 /*
97 * A device tree containing CPU nodes with missing "reg" 100 * A device tree containing CPU nodes with missing "reg"
@@ -149,9 +152,10 @@ void __init arm_dt_init_cpu_maps(void)
149 tmp_map[i] = hwid; 152 tmp_map[i] = hwid;
150 } 153 }
151 154
152 if (WARN(!bootcpu_valid, "DT missing boot CPU MPIDR[23:0], " 155 if (!bootcpu_valid) {
153 "fall back to default cpu_logical_map\n")) 156 pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n");
154 return; 157 return;
158 }
155 159
156 /* 160 /*
157 * Since the boot CPU node contains proper data, and all nodes have 161 * Since the boot CPU node contains proper data, and all nodes have
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 8ef8c9337809..4fb074c446bf 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -134,6 +134,10 @@ void machine_kexec(struct kimage *image)
134 unsigned long reboot_code_buffer_phys; 134 unsigned long reboot_code_buffer_phys;
135 void *reboot_code_buffer; 135 void *reboot_code_buffer;
136 136
137 if (num_online_cpus() > 1) {
138 pr_err("kexec: error: multiple CPUs still online\n");
139 return;
140 }
137 141
138 page_list = image->head & PAGE_MASK; 142 page_list = image->head & PAGE_MASK;
139 143
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 282de4826abb..6e8931ccf13e 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -184,30 +184,61 @@ int __init reboot_setup(char *str)
184 184
185__setup("reboot=", reboot_setup); 185__setup("reboot=", reboot_setup);
186 186
187/*
188 * Called by kexec, immediately prior to machine_kexec().
189 *
190 * This must completely disable all secondary CPUs; simply causing those CPUs
191 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
192 * kexec'd kernel to use any and all RAM as it sees fit, without having to
193 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
194 * functionality embodied in disable_nonboot_cpus() to achieve this.
195 */
187void machine_shutdown(void) 196void machine_shutdown(void)
188{ 197{
189#ifdef CONFIG_SMP 198 disable_nonboot_cpus();
190 smp_send_stop();
191#endif
192} 199}
193 200
201/*
202 * Halting simply requires that the secondary CPUs stop performing any
203 * activity (executing tasks, handling interrupts). smp_send_stop()
204 * achieves this.
205 */
194void machine_halt(void) 206void machine_halt(void)
195{ 207{
196 machine_shutdown(); 208 smp_send_stop();
209
197 local_irq_disable(); 210 local_irq_disable();
198 while (1); 211 while (1);
199} 212}
200 213
214/*
215 * Power-off simply requires that the secondary CPUs stop performing any
216 * activity (executing tasks, handling interrupts). smp_send_stop()
217 * achieves this. When the system power is turned off, it will take all CPUs
218 * with it.
219 */
201void machine_power_off(void) 220void machine_power_off(void)
202{ 221{
203 machine_shutdown(); 222 smp_send_stop();
223
204 if (pm_power_off) 224 if (pm_power_off)
205 pm_power_off(); 225 pm_power_off();
206} 226}
207 227
228/*
229 * Restart requires that the secondary CPUs stop performing any activity
230 * while the primary CPU resets the system. Systems with a single CPU can
231 * use soft_restart() as their machine descriptor's .restart hook, since that
232 * will cause the only available CPU to reset. Systems with multiple CPUs must
233 * provide a HW restart implementation, to ensure that all CPUs reset at once.
234 * This is required so that any code running after reset on the primary CPU
235 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
236 * executing pre-reset code, and using RAM that the primary CPU's code wishes
237 * to use. Implementing such co-ordination would be essentially impossible.
238 */
208void machine_restart(char *cmd) 239void machine_restart(char *cmd)
209{ 240{
210 machine_shutdown(); 241 smp_send_stop();
211 242
212 arm_pm_restart(reboot_mode, cmd); 243 arm_pm_restart(reboot_mode, cmd);
213 244
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 1522c7ae31b0..b4b1d397592b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -444,7 +444,7 @@ void notrace cpu_init(void)
444 : "r14"); 444 : "r14");
445} 445}
446 446
447int __cpu_logical_map[NR_CPUS]; 447u32 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
448 448
449void __init smp_setup_processor_id(void) 449void __init smp_setup_processor_id(void)
450{ 450{
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 550d63cef68e..5919eb451bb9 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -651,17 +651,6 @@ void smp_send_reschedule(int cpu)
651 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 651 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
652} 652}
653 653
654#ifdef CONFIG_HOTPLUG_CPU
655static void smp_kill_cpus(cpumask_t *mask)
656{
657 unsigned int cpu;
658 for_each_cpu(cpu, mask)
659 platform_cpu_kill(cpu);
660}
661#else
662static void smp_kill_cpus(cpumask_t *mask) { }
663#endif
664
665void smp_send_stop(void) 654void smp_send_stop(void)
666{ 655{
667 unsigned long timeout; 656 unsigned long timeout;
@@ -679,8 +668,6 @@ void smp_send_stop(void)
679 668
680 if (num_online_cpus() > 1) 669 if (num_online_cpus() > 1)
681 pr_warning("SMP: failed to stop secondary CPUs\n"); 670 pr_warning("SMP: failed to stop secondary CPUs\n");
682
683 smp_kill_cpus(&mask);
684} 671}
685 672
686/* 673/*
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 827cde42414f..e96fd71abd76 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -22,9 +22,10 @@ static unsigned int __init kirkwood_variant(void)
22 22
23 kirkwood_pcie_id(&dev, &rev); 23 kirkwood_pcie_id(&dev, &rev);
24 24
25 if ((dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) || 25 if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0)
26 (dev == MV88F6282_DEV_ID))
27 return MPP_F6281_MASK; 26 return MPP_F6281_MASK;
27 if (dev == MV88F6282_DEV_ID)
28 return MPP_F6282_MASK;
28 if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) 29 if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0)
29 return MPP_F6192_MASK; 30 return MPP_F6192_MASK;
30 if (dev == MV88F6180_DEV_ID) 31 if (dev == MV88F6180_DEV_ID)
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 8f3bf4e50908..bbd6a3f717e6 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -20,11 +20,12 @@
20 20
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/clk-provider.h>
23#include <linux/io.h> 24#include <linux/io.h>
24 25
25#include "clock.h" 26#include "clock.h"
26#include "clock36xx.h" 27#include "clock36xx.h"
27 28#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
28 29
29/** 30/**
30 * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering 31 * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
@@ -39,29 +40,28 @@
39 */ 40 */
40int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk) 41int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
41{ 42{
42 struct clk_hw_omap *parent; 43 struct clk_divider *parent;
43 struct clk_hw *parent_hw; 44 struct clk_hw *parent_hw;
44 u32 dummy_v, orig_v, clksel_shift; 45 u32 dummy_v, orig_v;
45 int ret; 46 int ret;
46 47
47 /* Clear PWRDN bit of HSDIVIDER */ 48 /* Clear PWRDN bit of HSDIVIDER */
48 ret = omap2_dflt_clk_enable(clk); 49 ret = omap2_dflt_clk_enable(clk);
49 50
50 parent_hw = __clk_get_hw(__clk_get_parent(clk->clk)); 51 parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
51 parent = to_clk_hw_omap(parent_hw); 52 parent = to_clk_divider(parent_hw);
52 53
53 /* Restore the dividers */ 54 /* Restore the dividers */
54 if (!ret) { 55 if (!ret) {
55 clksel_shift = __ffs(parent->clksel_mask); 56 orig_v = __raw_readl(parent->reg);
56 orig_v = __raw_readl(parent->clksel_reg);
57 dummy_v = orig_v; 57 dummy_v = orig_v;
58 58
59 /* Write any other value different from the Read value */ 59 /* Write any other value different from the Read value */
60 dummy_v ^= (1 << clksel_shift); 60 dummy_v ^= (1 << parent->shift);
61 __raw_writel(dummy_v, parent->clksel_reg); 61 __raw_writel(dummy_v, parent->reg);
62 62
63 /* Write the original divider */ 63 /* Write the original divider */
64 __raw_writel(orig_v, parent->clksel_reg); 64 __raw_writel(orig_v, parent->reg);
65 } 65 }
66 66
67 return ret; 67 return ret;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 075f7cc51026..69337af748cc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2007,6 +2007,13 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
2007 }, 2007 },
2008}; 2008};
2009 2009
2010/* uart2 */
2011static struct omap_hwmod_dma_info uart2_edma_reqs[] = {
2012 { .name = "tx", .dma_req = 28, },
2013 { .name = "rx", .dma_req = 29, },
2014 { .dma_req = -1 }
2015};
2016
2010static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = { 2017static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
2011 { .irq = 73 + OMAP_INTC_START, }, 2018 { .irq = 73 + OMAP_INTC_START, },
2012 { .irq = -1 }, 2019 { .irq = -1 },
@@ -2018,7 +2025,7 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
2018 .clkdm_name = "l4ls_clkdm", 2025 .clkdm_name = "l4ls_clkdm",
2019 .flags = HWMOD_SWSUP_SIDLE_ACT, 2026 .flags = HWMOD_SWSUP_SIDLE_ACT,
2020 .mpu_irqs = am33xx_uart2_irqs, 2027 .mpu_irqs = am33xx_uart2_irqs,
2021 .sdma_reqs = uart1_edma_reqs, 2028 .sdma_reqs = uart2_edma_reqs,
2022 .main_clk = "dpll_per_m2_div4_ck", 2029 .main_clk = "dpll_per_m2_div4_ck",
2023 .prcm = { 2030 .prcm = {
2024 .omap4 = { 2031 .omap4 = {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c01859398b54..5a2d8034c8de 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -546,8 +546,10 @@ static void __init prcm_setup_regs(void)
546 /* Clear any pending PRCM interrupts */ 546 /* Clear any pending PRCM interrupts */
547 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); 547 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
548 548
549 if (omap3_has_iva()) 549 /*
550 omap3_iva_idle(); 550 * We need to idle iva2_pwrdm even on am3703 with no iva2.
551 */
552 omap3_iva_idle();
551 553
552 omap3_d2d_idle(); 554 omap3_d2d_idle();
553} 555}
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index 9936c180bf01..8f595c0cc8d9 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -101,8 +101,10 @@ static int __init sirfsoc_of_pwrc_init(void)
101 struct device_node *np; 101 struct device_node *np;
102 102
103 np = of_find_matching_node(NULL, pwrc_ids); 103 np = of_find_matching_node(NULL, pwrc_ids);
104 if (!np) 104 if (!np) {
105 panic("unable to find compatible pwrc node in dtb\n"); 105 pr_err("unable to find compatible sirf pwrc node in dtb\n");
106 return -ENOENT;
107 }
106 108
107 /* 109 /*
108 * pwrc behind rtciobrg is not located in memory space 110 * pwrc behind rtciobrg is not located in memory space
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 435019ca0a48..d5e0cbc934c0 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -28,8 +28,10 @@ static int __init sirfsoc_of_rstc_init(void)
28 struct device_node *np; 28 struct device_node *np;
29 29
30 np = of_find_matching_node(NULL, rstc_ids); 30 np = of_find_matching_node(NULL, rstc_ids);
31 if (!np) 31 if (!np) {
32 panic("unable to find compatible rstc node in dtb\n"); 32 pr_err("unable to find compatible sirf rstc node in dtb\n");
33 return -ENOENT;
34 }
33 35
34 sirfsoc_rstc_base = of_iomap(np, 0); 36 sirfsoc_rstc_base = of_iomap(np, 0);
35 if (!sirfsoc_rstc_base) 37 if (!sirfsoc_rstc_base)
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 15451ee4acc8..515b00064da8 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -92,6 +92,14 @@ ENTRY(v7_flush_dcache_louis)
92 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr 92 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr
93 ALT_SMP(ands r3, r0, #(7 << 21)) @ extract LoUIS from clidr 93 ALT_SMP(ands r3, r0, #(7 << 21)) @ extract LoUIS from clidr
94 ALT_UP(ands r3, r0, #(7 << 27)) @ extract LoUU from clidr 94 ALT_UP(ands r3, r0, #(7 << 27)) @ extract LoUU from clidr
95#ifdef CONFIG_ARM_ERRATA_643719
96 ALT_SMP(mrceq p15, 0, r2, c0, c0, 0) @ read main ID register
97 ALT_UP(moveq pc, lr) @ LoUU is zero, so nothing to do
98 ldreq r1, =0x410fc090 @ ID of ARM Cortex A9 r0p?
99 biceq r2, r2, #0x0000000f @ clear minor revision number
100 teqeq r2, r1 @ test for errata affected core and if so...
101 orreqs r3, #(1 << 21) @ fix LoUIS value (and set flags state to 'ne')
102#endif
95 ALT_SMP(mov r3, r3, lsr #20) @ r3 = LoUIS * 2 103 ALT_SMP(mov r3, r3, lsr #20) @ r3 = LoUIS * 2
96 ALT_UP(mov r3, r3, lsr #26) @ r3 = LoUU * 2 104 ALT_UP(mov r3, r3, lsr #26) @ r3 = LoUU * 2
97 moveq pc, lr @ return if level == 0 105 moveq pc, lr @ return if level == 0
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 0d473cce501c..32aa5861119f 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -301,6 +301,39 @@ void flush_dcache_page(struct page *page)
301EXPORT_SYMBOL(flush_dcache_page); 301EXPORT_SYMBOL(flush_dcache_page);
302 302
303/* 303/*
304 * Ensure cache coherency for the kernel mapping of this page. We can
305 * assume that the page is pinned via kmap.
306 *
307 * If the page only exists in the page cache and there are no user
308 * space mappings, this is a no-op since the page was already marked
309 * dirty at creation. Otherwise, we need to flush the dirty kernel
310 * cache lines directly.
311 */
312void flush_kernel_dcache_page(struct page *page)
313{
314 if (cache_is_vivt() || cache_is_vipt_aliasing()) {
315 struct address_space *mapping;
316
317 mapping = page_mapping(page);
318
319 if (!mapping || mapping_mapped(mapping)) {
320 void *addr;
321
322 addr = page_address(page);
323 /*
324 * kmap_atomic() doesn't set the page virtual
325 * address for highmem pages, and
326 * kunmap_atomic() takes care of cache
327 * flushing already.
328 */
329 if (!IS_ENABLED(CONFIG_HIGHMEM) || addr)
330 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
331 }
332 }
333}
334EXPORT_SYMBOL(flush_kernel_dcache_page);
335
336/*
304 * Flush an anonymous page so that users of get_user_pages() 337 * Flush an anonymous page so that users of get_user_pages()
305 * can safely access the data. The expected sequence is: 338 * can safely access the data. The expected sequence is:
306 * 339 *
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e0d8565671a6..4d409e6a552d 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -616,10 +616,12 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr,
616 } while (pte++, addr += PAGE_SIZE, addr != end); 616 } while (pte++, addr += PAGE_SIZE, addr != end);
617} 617}
618 618
619static void __init map_init_section(pmd_t *pmd, unsigned long addr, 619static void __init __map_init_section(pmd_t *pmd, unsigned long addr,
620 unsigned long end, phys_addr_t phys, 620 unsigned long end, phys_addr_t phys,
621 const struct mem_type *type) 621 const struct mem_type *type)
622{ 622{
623 pmd_t *p = pmd;
624
623#ifndef CONFIG_ARM_LPAE 625#ifndef CONFIG_ARM_LPAE
624 /* 626 /*
625 * In classic MMU format, puds and pmds are folded in to 627 * In classic MMU format, puds and pmds are folded in to
@@ -638,7 +640,7 @@ static void __init map_init_section(pmd_t *pmd, unsigned long addr,
638 phys += SECTION_SIZE; 640 phys += SECTION_SIZE;
639 } while (pmd++, addr += SECTION_SIZE, addr != end); 641 } while (pmd++, addr += SECTION_SIZE, addr != end);
640 642
641 flush_pmd_entry(pmd); 643 flush_pmd_entry(p);
642} 644}
643 645
644static void __init alloc_init_pmd(pud_t *pud, unsigned long addr, 646static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
@@ -661,7 +663,7 @@ static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
661 */ 663 */
662 if (type->prot_sect && 664 if (type->prot_sect &&
663 ((addr | next | phys) & ~SECTION_MASK) == 0) { 665 ((addr | next | phys) & ~SECTION_MASK) == 0) {
664 map_init_section(pmd, addr, next, phys, type); 666 __map_init_section(pmd, addr, next, phys, type);
665 } else { 667 } else {
666 alloc_init_pte(pmd, addr, next, 668 alloc_init_pte(pmd, addr, next,
667 __phys_to_pfn(phys), type); 669 __phys_to_pfn(phys), type);
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index d51225f90ae2..eb5293a69a84 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -57,6 +57,12 @@ void flush_dcache_page(struct page *page)
57} 57}
58EXPORT_SYMBOL(flush_dcache_page); 58EXPORT_SYMBOL(flush_dcache_page);
59 59
60void flush_kernel_dcache_page(struct page *page)
61{
62 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
63}
64EXPORT_SYMBOL(flush_kernel_dcache_page);
65
60void copy_to_user_page(struct vm_area_struct *vma, struct page *page, 66void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
61 unsigned long uaddr, void *dst, const void *src, 67 unsigned long uaddr, void *dst, const void *src,
62 unsigned long len) 68 unsigned long len)
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index d217e9795d74..aaeb6c127c7a 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -81,7 +81,6 @@ ENDPROC(cpu_fa526_reset)
81 */ 81 */
82 .align 4 82 .align 4
83ENTRY(cpu_fa526_do_idle) 83ENTRY(cpu_fa526_do_idle)
84 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
85 mov pc, lr 84 mov pc, lr
86 85
87 86
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index f9a0aa725ea9..e3c48a3fe063 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -333,3 +333,8 @@ ENTRY(\name\()_tlb_fns)
333 .endif 333 .endif
334 .size \name\()_tlb_fns, . - \name\()_tlb_fns 334 .size \name\()_tlb_fns, . - \name\()_tlb_fns
335.endm 335.endm
336
337.macro globl_equ x, y
338 .globl \x
339 .equ \x, \y
340.endm
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 2c73a7301ff7..e35fec34453e 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -140,6 +140,29 @@ ENTRY(cpu_v7_do_resume)
140ENDPROC(cpu_v7_do_resume) 140ENDPROC(cpu_v7_do_resume)
141#endif 141#endif
142 142
143#ifdef CONFIG_CPU_PJ4B
144 globl_equ cpu_pj4b_switch_mm, cpu_v7_switch_mm
145 globl_equ cpu_pj4b_set_pte_ext, cpu_v7_set_pte_ext
146 globl_equ cpu_pj4b_proc_init, cpu_v7_proc_init
147 globl_equ cpu_pj4b_proc_fin, cpu_v7_proc_fin
148 globl_equ cpu_pj4b_reset, cpu_v7_reset
149#ifdef CONFIG_PJ4B_ERRATA_4742
150ENTRY(cpu_pj4b_do_idle)
151 dsb @ WFI may enter a low-power mode
152 wfi
153 dsb @barrier
154 mov pc, lr
155ENDPROC(cpu_pj4b_do_idle)
156#else
157 globl_equ cpu_pj4b_do_idle, cpu_v7_do_idle
158#endif
159 globl_equ cpu_pj4b_dcache_clean_area, cpu_v7_dcache_clean_area
160 globl_equ cpu_pj4b_do_suspend, cpu_v7_do_suspend
161 globl_equ cpu_pj4b_do_resume, cpu_v7_do_resume
162 globl_equ cpu_pj4b_suspend_size, cpu_v7_suspend_size
163
164#endif
165
143 __CPUINIT 166 __CPUINIT
144 167
145/* 168/*
@@ -350,6 +373,9 @@ __v7_setup_stack:
350 373
351 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S) 374 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
352 define_processor_functions v7, dabort=v7_early_abort, pabort=v7_pabort, suspend=1 375 define_processor_functions v7, dabort=v7_early_abort, pabort=v7_pabort, suspend=1
376#ifdef CONFIG_CPU_PJ4B
377 define_processor_functions pj4b, dabort=v7_early_abort, pabort=v7_pabort, suspend=1
378#endif
353 379
354 .section ".rodata" 380 .section ".rodata"
355 381
@@ -362,7 +388,7 @@ __v7_setup_stack:
362 /* 388 /*
363 * Standard v7 proc info content 389 * Standard v7 proc info content
364 */ 390 */
365.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0 391.macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0, proc_fns = v7_processor_functions
366 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 392 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
367 PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags) 393 PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags)
368 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 394 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
@@ -375,7 +401,7 @@ __v7_setup_stack:
375 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT | \ 401 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT | \
376 HWCAP_EDSP | HWCAP_TLS | \hwcaps 402 HWCAP_EDSP | HWCAP_TLS | \hwcaps
377 .long cpu_v7_name 403 .long cpu_v7_name
378 .long v7_processor_functions 404 .long \proc_fns
379 .long v7wbi_tlb_fns 405 .long v7wbi_tlb_fns
380 .long v6_user_fns 406 .long v6_user_fns
381 .long v7_cache_fns 407 .long v7_cache_fns
@@ -407,12 +433,14 @@ __v7_ca9mp_proc_info:
407 /* 433 /*
408 * Marvell PJ4B processor. 434 * Marvell PJ4B processor.
409 */ 435 */
436#ifdef CONFIG_CPU_PJ4B
410 .type __v7_pj4b_proc_info, #object 437 .type __v7_pj4b_proc_info, #object
411__v7_pj4b_proc_info: 438__v7_pj4b_proc_info:
412 .long 0x562f5840 439 .long 0x560f5800
413 .long 0xfffffff0 440 .long 0xff0fff00
414 __v7_proc __v7_pj4b_setup 441 __v7_proc __v7_pj4b_setup, proc_fns = pj4b_processor_functions
415 .size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info 442 .size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info
443#endif
416 444
417 /* 445 /*
418 * ARM Ltd. Cortex A7 processor. 446 * ARM Ltd. Cortex A7 processor.
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 53210ec4e8ec..bd7124c87fea 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -16,6 +16,7 @@
16#include <linux/suspend.h> 16#include <linux/suspend.h>
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/of.h>
19#include <linux/serial_core.h> 20#include <linux/serial_core.h>
20#include <linux/io.h> 21#include <linux/io.h>
21 22
@@ -261,7 +262,8 @@ static int s3c_pm_enter(suspend_state_t state)
261 * require a full power-cycle) 262 * require a full power-cycle)
262 */ 263 */
263 264
264 if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && 265 if (!of_have_populated_dt() &&
266 !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
265 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { 267 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
266 printk(KERN_ERR "%s: No wake-up sources!\n", __func__); 268 printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
267 printk(KERN_ERR "%s: Aborting sleep\n", __func__); 269 printk(KERN_ERR "%s: Aborting sleep\n", __func__);
@@ -270,8 +272,11 @@ static int s3c_pm_enter(suspend_state_t state)
270 272
271 /* save all necessary core registers not covered by the drivers */ 273 /* save all necessary core registers not covered by the drivers */
272 274
273 samsung_pm_save_gpios(); 275 if (!of_have_populated_dt()) {
274 samsung_pm_saved_gpios(); 276 samsung_pm_save_gpios();
277 samsung_pm_saved_gpios();
278 }
279
275 s3c_pm_save_uarts(); 280 s3c_pm_save_uarts();
276 s3c_pm_save_core(); 281 s3c_pm_save_core();
277 282
@@ -310,8 +315,11 @@ static int s3c_pm_enter(suspend_state_t state)
310 315
311 s3c_pm_restore_core(); 316 s3c_pm_restore_core();
312 s3c_pm_restore_uarts(); 317 s3c_pm_restore_uarts();
313 samsung_pm_restore_gpios(); 318
314 s3c_pm_restored_gpios(); 319 if (!of_have_populated_dt()) {
320 samsung_pm_restore_gpios();
321 s3c_pm_restored_gpios();
322 }
315 323
316 s3c_pm_debug_init(); 324 s3c_pm_debug_init();
317 325