5 files changed, 28 insertions, 7 deletions

diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 953a26c469cb..d56a05e8356b 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -285,6 +285,11 @@ static struct resource mv78xx0_ge00_shared_resources[] = {
                 .start  = GE00_PHYS_BASE + 0x2000,
                 .end    = GE00_PHYS_BASE + 0x3fff,
                 .flags  = IORESOURCE_MEM,
+        }, {
+                .name   = "ge err irq",
+                .start  = IRQ_MV78XX0_GE_ERR,
+                .end    = IRQ_MV78XX0_GE_ERR,
+                .flags  = IORESOURCE_IRQ,
         },
 };
 
@@ -294,7 +299,7 @@ static struct platform_device mv78xx0_ge00_shared = {
         .dev            = {
                 .platform_data  = &mv78xx0_ge00_shared_data,
         },
-        .num_resources  = 1,
+        .num_resources  = ARRAY_SIZE(mv78xx0_ge00_shared_resources),
         .resource       = mv78xx0_ge00_shared_resources,
 };
 
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index ed4a46bcd3b0..fbfb2693ce6c 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -26,14 +26,22 @@
         ldr     \tmp, [\base, #IRQ_MASK_LOW_OFF]
         mov     \irqnr, #31
         ands    \irqstat, \irqstat, \tmp
+        bne     1001f
 
         @ if no low interrupts set, check high interrupts
-        ldreq   \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
-        ldreq   \tmp, [\base, #IRQ_MASK_HIGH_OFF]
-        moveq   \irqnr, #63
-        andeqs  \irqstat, \irqstat, \tmp
+        ldr     \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
+        ldr     \tmp, [\base, #IRQ_MASK_HIGH_OFF]
+        mov     \irqnr, #63
+        ands    \irqstat, \irqstat, \tmp
+        bne     1001f
+
+        @ if no high interrupts set, check error interrupts
+        ldr     \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
+        ldr     \tmp, [\base, #IRQ_MASK_ERR_OFF]
+        mov     \irqnr, #95
+        ands    \irqstat, \irqstat, \tmp
 
         @ find first active interrupt source
-        clzne   \irqstat, \irqstat
+1001:   clzne   \irqstat, \irqstat
         subne   \irqnr, \irqnr, \irqstat
         .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h
index 995d7fb8d06f..bebc330281ec 100644
--- a/arch/arm/mach-mv78xx0/include/mach/irqs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h
@@ -80,9 +80,14 @@
 #define IRQ_MV78XX0_DB_OUT      61
 
 /*
+ * MV78xx0 Error Interrupt Controller
+ */
+#define IRQ_MV78XX0_GE_ERR      70
+
+/*
  * MV78XX0 General Purpose Pins
  */
-#define IRQ_MV78XX0_GPIO_START  64
+#define IRQ_MV78XX0_GPIO_START  96
 #define NR_GPIO_IRQS            GPIO_MAX
 
 #define NR_IRQS                 (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index ad664178d6e1..ee9c5593ee92 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,8 +71,10 @@
 #define   BRIDGE_INT_TIMER1     0x0004
 #define   BRIDGE_INT_TIMER1_CLR (~0x0004)
 #define  IRQ_VIRT_BASE          (BRIDGE_VIRT_BASE | 0x0200)
+#define   IRQ_CAUSE_ERR_OFF     0x0000
 #define   IRQ_CAUSE_LOW_OFF     0x0004
 #define   IRQ_CAUSE_HIGH_OFF    0x0008
+#define   IRQ_MASK_ERR_OFF      0x000c
 #define   IRQ_MASK_LOW_OFF      0x0010
 #define   IRQ_MASK_HIGH_OFF     0x0014
 #define  TIMER_VIRT_BASE        (BRIDGE_VIRT_BASE | 0x0300)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 28248d37b999..503e5d195ae5 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -19,4 +19,5 @@ void __init mv78xx0_init_irq(void)
 {
         orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
         orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
+        orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
 }