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-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/common/sa1111.c9
-rw-r--r--arch/arm/include/asm/mach/udc_pxa2xx.h4
-rw-r--r--arch/arm/include/asm/processor.h4
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/mach-msm/dma.c1
-rw-r--r--arch/arm/mach-mx3/mach-mx31lilly.c33
-rw-r--r--arch/arm/mach-nomadik/clock.c11
-rw-r--r--arch/arm/mach-nomadik/clock.h2
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c4
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c9
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-omap2/usb-ehci.c2
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/palmtc.c4
-rw-r--r--arch/arm/mach-pxa/spitz.c3
-rw-r--r--arch/arm/mach-pxa/z2.c26
-rw-r--r--arch/arm/mach-realview/Kconfig2
-rw-r--r--arch/arm/mach-realview/include/mach/barriers.h8
-rw-r--r--arch/arm/mach-realview/realview_eb.c3
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c3
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c3
-rw-r--r--arch/arm/mach-realview/realview_pba8.c3
-rw-r--r--arch/arm/mach-realview/realview_pbx.c3
-rw-r--r--arch/arm/mach-s5p6442/clock.c2
-rw-r--r--arch/arm/mach-s5pv210/clock.c115
-rw-r--r--arch/arm/mach-ux500/Makefile3
-rw-r--r--arch/arm/mach-ux500/clock.c104
-rw-r--r--arch/arm/mach-ux500/clock.h22
-rw-r--r--arch/arm/mach-ux500/cpu.c6
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c4
-rw-r--r--arch/arm/mm/Kconfig21
-rw-r--r--arch/arm/mm/cache-v6.S18
-rw-r--r--arch/arm/mm/copypage-feroceon.c4
-rw-r--r--arch/arm/mm/copypage-v4wb.c4
-rw-r--r--arch/arm/mm/copypage-v4wt.c4
-rw-r--r--arch/arm/mm/copypage-xsc3.c4
-rw-r--r--arch/arm/mm/dma-mapping.c18
-rw-r--r--arch/arm/mm/fault.c3
-rw-r--r--arch/arm/mm/highmem.c11
-rw-r--r--arch/arm/mm/init.c6
-rw-r--r--arch/arm/plat-nomadik/timer.c26
-rw-r--r--arch/arm/plat-omap/dmtimer.c6
-rw-r--r--arch/arm/plat-omap/gpio.c1
-rw-r--r--arch/arm/plat-omap/iovmm.c4
-rw-r--r--arch/arm/plat-pxa/Makefile3
-rw-r--r--arch/arm/plat-s5p/irq-eint.c2
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h4
-rw-r--r--arch/arm/vfp/vfphw.S2
51 files changed, 405 insertions, 150 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1f254bd6c937..98922f7d2d12 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -955,7 +955,8 @@ config XSCALE_PMU
955 default y 955 default y
956 956
957config CPU_HAS_PMU 957config CPU_HAS_PMU
958 depends on CPU_V6 || CPU_V7 || XSCALE_PMU 958 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
959 (!ARCH_OMAP3 || OMAP3_EMU)
959 default y 960 default y
960 bool 961 bool
961 962
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index a52a27c1d9be..6f80665f477e 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -951,8 +951,6 @@ static int sa1111_resume(struct platform_device *dev)
951 if (!save) 951 if (!save)
952 return 0; 952 return 0;
953 953
954 spin_lock_irqsave(&sachip->lock, flags);
955
956 /* 954 /*
957 * Ensure that the SA1111 is still here. 955 * Ensure that the SA1111 is still here.
958 * FIXME: shouldn't do this here. 956 * FIXME: shouldn't do this here.
@@ -969,6 +967,13 @@ static int sa1111_resume(struct platform_device *dev)
969 * First of all, wake up the chip. 967 * First of all, wake up the chip.
970 */ 968 */
971 sa1111_wake(sachip); 969 sa1111_wake(sachip);
970
971 /*
972 * Only lock for write ops. Also, sa1111_wake must be called with
973 * released spinlock!
974 */
975 spin_lock_irqsave(&sachip->lock, flags);
976
972 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 977 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
973 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 978 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
974 979
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h
index f3eabf1ecec3..833306ee9e7f 100644
--- a/arch/arm/include/asm/mach/udc_pxa2xx.h
+++ b/arch/arm/include/asm/mach/udc_pxa2xx.h
@@ -21,8 +21,8 @@ struct pxa2xx_udc_mach_info {
21 * here. Note that sometimes the signals go through inverters... 21 * here. Note that sometimes the signals go through inverters...
22 */ 22 */
23 bool gpio_vbus_inverted; 23 bool gpio_vbus_inverted;
24 u16 gpio_vbus; /* high == vbus present */ 24 int gpio_vbus; /* high == vbus present */
25 bool gpio_pullup_inverted; 25 bool gpio_pullup_inverted;
26 u16 gpio_pullup; /* high == pullup activated */ 26 int gpio_pullup; /* high == pullup activated */
27}; 27};
28 28
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 6a89567ffc5b..7bed3daf83b8 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -91,7 +91,11 @@ extern void release_thread(struct task_struct *);
91 91
92unsigned long get_wchan(struct task_struct *p); 92unsigned long get_wchan(struct task_struct *p);
93 93
94#if __LINUX_ARM_ARCH__ == 6
95#define cpu_relax() smp_mb()
96#else
94#define cpu_relax() barrier() 97#define cpu_relax() barrier()
98#endif
95 99
96/* 100/*
97 * Create a new kernel thread 101 * Create a new kernel thread
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index c45768614c8a..de12536d687f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -201,7 +201,7 @@ armpmu_event_update(struct perf_event *event,
201{ 201{
202 int shift = 64 - 32; 202 int shift = 64 - 32;
203 s64 prev_raw_count, new_raw_count; 203 s64 prev_raw_count, new_raw_count;
204 s64 delta; 204 u64 delta;
205 205
206again: 206again:
207 prev_raw_count = atomic64_read(&hwc->prev_count); 207 prev_raw_count = atomic64_read(&hwc->prev_count);
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index d029d1f5f9e2..02cae5e2951c 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -17,6 +17,7 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/completion.h>
20#include <mach/dma.h> 21#include <mach/dma.h>
21 22
22#define MSM_DMOV_CHANNEL_COUNT 16 23#define MSM_DMOV_CHANNEL_COUNT 16
diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c
index d3d5877c750e..b2c7f512070f 100644
--- a/arch/arm/mach-mx3/mach-mx31lilly.c
+++ b/arch/arm/mach-mx3/mach-mx31lilly.c
@@ -115,6 +115,8 @@ static struct platform_device physmap_flash_device = {
115 115
116/* USB */ 116/* USB */
117 117
118#if defined(CONFIG_USB_ULPI)
119
118#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 120#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
119 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 121 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
120 122
@@ -244,10 +246,20 @@ static struct mxc_usbh_platform_data usbh2_pdata = {
244 .flags = MXC_EHCI_POWER_PINS_ENABLED, 246 .flags = MXC_EHCI_POWER_PINS_ENABLED,
245}; 247};
246 248
247static struct platform_device *devices[] __initdata = { 249static void lilly1131_usb_init(void)
248 &smsc91x_device, 250{
249 &physmap_flash_device, 251 usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
250}; 252 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
253 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
254 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
255
256 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
257 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
258}
259
260#else
261static inline void lilly1131_usb_init(void) {}
262#endif /* CONFIG_USB_ULPI */
251 263
252/* SPI */ 264/* SPI */
253 265
@@ -279,6 +291,11 @@ static struct spi_board_info mc13783_dev __initdata = {
279 .platform_data = &mc13783_pdata, 291 .platform_data = &mc13783_pdata,
280}; 292};
281 293
294static struct platform_device *devices[] __initdata = {
295 &smsc91x_device,
296 &physmap_flash_device,
297};
298
282static int mx31lilly_baseboard; 299static int mx31lilly_baseboard;
283core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444); 300core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
284 301
@@ -321,13 +338,7 @@ static void __init mx31lilly_board_init(void)
321 platform_add_devices(devices, ARRAY_SIZE(devices)); 338 platform_add_devices(devices, ARRAY_SIZE(devices));
322 339
323 /* USB */ 340 /* USB */
324 usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 341 lilly1131_usb_init();
325 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
326 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
327 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
328
329 mxc_register_device(&mxc_usbh1, &usbh1_pdata);
330 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
331} 342}
332 343
333static void __init mx31lilly_timer_init(void) 344static void __init mx31lilly_timer_init(void)
diff --git a/arch/arm/mach-nomadik/clock.c b/arch/arm/mach-nomadik/clock.c
index 2c471fc451d7..f035f4185274 100644
--- a/arch/arm/mach-nomadik/clock.c
+++ b/arch/arm/mach-nomadik/clock.c
@@ -32,7 +32,10 @@ void clk_disable(struct clk *clk)
32} 32}
33EXPORT_SYMBOL(clk_disable); 33EXPORT_SYMBOL(clk_disable);
34 34
35/* We have a fixed clock alone, for now */ 35static struct clk clk_24 = {
36 .rate = 2400000,
37};
38
36static struct clk clk_48 = { 39static struct clk clk_48 = {
37 .rate = 48 * 1000 * 1000, 40 .rate = 48 * 1000 * 1000,
38}; 41};
@@ -50,6 +53,8 @@ static struct clk clk_default;
50 } 53 }
51 54
52static struct clk_lookup lookups[] = { 55static struct clk_lookup lookups[] = {
56 CLK(&clk_24, "mtu0"),
57 CLK(&clk_24, "mtu1"),
53 CLK(&clk_48, "uart0"), 58 CLK(&clk_48, "uart0"),
54 CLK(&clk_48, "uart1"), 59 CLK(&clk_48, "uart1"),
55 CLK(&clk_default, "gpio.0"), 60 CLK(&clk_default, "gpio.0"),
@@ -59,10 +64,8 @@ static struct clk_lookup lookups[] = {
59 CLK(&clk_default, "rng"), 64 CLK(&clk_default, "rng"),
60}; 65};
61 66
62static int __init clk_init(void) 67int __init clk_init(void)
63{ 68{
64 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 69 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
65 return 0; 70 return 0;
66} 71}
67
68arch_initcall(clk_init);
diff --git a/arch/arm/mach-nomadik/clock.h b/arch/arm/mach-nomadik/clock.h
index 5563985a2cc7..78da2e7c3985 100644
--- a/arch/arm/mach-nomadik/clock.h
+++ b/arch/arm/mach-nomadik/clock.h
@@ -11,3 +11,5 @@
11struct clk { 11struct clk {
12 unsigned long rate; 12 unsigned long rate;
13}; 13};
14
15int __init clk_init(void);
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 91c3c901b469..ac58e3b03b1a 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -31,6 +31,8 @@
31#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
32#include <asm/hardware/cache-l2x0.h> 32#include <asm/hardware/cache-l2x0.h>
33 33
34#include "clock.h"
35
34#define __MEM_4K_RESOURCE(x) \ 36#define __MEM_4K_RESOURCE(x) \
35 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} 37 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
36 38
@@ -143,6 +145,12 @@ void __init cpu8815_init_irq(void)
143 /* This modified VIC cell has two register blocks, at 0 and 0x20 */ 145 /* This modified VIC cell has two register blocks, at 0 and 0x20 */
144 vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); 146 vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0);
145 vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); 147 vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0);
148
149 /*
150 * Init clocks here so that they are available for system timer
151 * initialization.
152 */
153 clk_init();
146} 154}
147 155
148/* 156/*
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index f848ba8dbc16..a04cffd691c5 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -538,9 +538,7 @@ static void ads7846_dev_init(void)
538 printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); 538 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
539 539
540 gpio_direction_input(OMAP3_STALKER_TS_GPIO); 540 gpio_direction_input(OMAP3_STALKER_TS_GPIO);
541 541 gpio_set_debounce(OMAP3_STALKER_TS_GPIO, 310);
542 omap_set_gpio_debounce(OMAP3_STALKER_TS_GPIO, 1);
543 omap_set_gpio_debounce_time(OMAP3_STALKER_TS_GPIO, 0xa);
544} 542}
545 543
546static int ads7846_get_pendown_state(void) 544static int ads7846_get_pendown_state(void)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 02804224517b..e10db7a90cb2 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1369,6 +1369,7 @@ static struct clk emif1_ick = {
1369 .ops = &clkops_omap2_dflt, 1369 .ops = &clkops_omap2_dflt,
1370 .enable_reg = OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL, 1370 .enable_reg = OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL,
1371 .enable_bit = OMAP4430_MODULEMODE_HWCTRL, 1371 .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
1372 .flags = ENABLE_ON_INIT,
1372 .clkdm_name = "l3_emif_clkdm", 1373 .clkdm_name = "l3_emif_clkdm",
1373 .parent = &ddrphy_ck, 1374 .parent = &ddrphy_ck,
1374 .recalc = &followparent_recalc, 1375 .recalc = &followparent_recalc,
@@ -1379,6 +1380,7 @@ static struct clk emif2_ick = {
1379 .ops = &clkops_omap2_dflt, 1380 .ops = &clkops_omap2_dflt,
1380 .enable_reg = OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL, 1381 .enable_reg = OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL,
1381 .enable_bit = OMAP4430_MODULEMODE_HWCTRL, 1382 .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
1383 .flags = ENABLE_ON_INIT,
1382 .clkdm_name = "l3_emif_clkdm", 1384 .clkdm_name = "l3_emif_clkdm",
1383 .parent = &ddrphy_ck, 1385 .parent = &ddrphy_ck,
1384 .recalc = &followparent_recalc, 1386 .recalc = &followparent_recalc,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 95c9a5f774e1..b7a4133267d8 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -409,10 +409,11 @@ static int _init_main_clk(struct omap_hwmod *oh)
409 return 0; 409 return 0;
410 410
411 oh->_clk = omap_clk_get_by_name(oh->main_clk); 411 oh->_clk = omap_clk_get_by_name(oh->main_clk);
412 if (!oh->_clk) 412 if (!oh->_clk) {
413 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n", 413 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
414 oh->name, oh->main_clk); 414 oh->name, oh->main_clk);
415 return -EINVAL; 415 return -EINVAL;
416 }
416 417
417 if (!oh->_clk->clkdm) 418 if (!oh->_clk->clkdm)
418 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n", 419 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
@@ -444,10 +445,11 @@ static int _init_interface_clks(struct omap_hwmod *oh)
444 continue; 445 continue;
445 446
446 c = omap_clk_get_by_name(os->clk); 447 c = omap_clk_get_by_name(os->clk);
447 if (!c) 448 if (!c) {
448 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n", 449 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
449 oh->name, os->clk); 450 oh->name, os->clk);
450 ret = -EINVAL; 451 ret = -EINVAL;
452 }
451 os->_clk = c; 453 os->_clk = c;
452 } 454 }
453 455
@@ -470,10 +472,11 @@ static int _init_opt_clks(struct omap_hwmod *oh)
470 472
471 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { 473 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
472 c = omap_clk_get_by_name(oc->clk); 474 c = omap_clk_get_by_name(oc->clk);
473 if (!c) 475 if (!c) {
474 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n", 476 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
475 oh->name, oc->clk); 477 oh->name, oc->clk);
476 ret = -EINVAL; 478 ret = -EINVAL;
479 }
477 oc->_clk = c; 480 oc->_clk = c;
478 } 481 }
479 482
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 2e967716cc3f..b88737fd6cfe 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -99,7 +99,7 @@ static void omap3_enable_io_chain(void)
99 /* Do a readback to assure write has been done */ 99 /* Do a readback to assure write has been done */
100 prm_read_mod_reg(WKUP_MOD, PM_WKEN); 100 prm_read_mod_reg(WKUP_MOD, PM_WKEN);
101 101
102 while (!(prm_read_mod_reg(WKUP_MOD, PM_WKST) & 102 while (!(prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
103 OMAP3430_ST_IO_CHAIN_MASK)) { 103 OMAP3430_ST_IO_CHAIN_MASK)) {
104 timeout++; 104 timeout++;
105 if (timeout > 1000) { 105 if (timeout > 1000) {
@@ -108,7 +108,7 @@ static void omap3_enable_io_chain(void)
108 return; 108 return;
109 } 109 }
110 prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, 110 prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
111 WKUP_MOD, PM_WKST); 111 WKUP_MOD, PM_WKEN);
112 } 112 }
113 } 113 }
114} 114}
diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
index c68f799e83c5..d72d1ac30333 100644
--- a/arch/arm/mach-omap2/usb-ehci.c
+++ b/arch/arm/mach-omap2/usb-ehci.c
@@ -20,6 +20,8 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/dma-mapping.h>
24
23#include <asm/io.h> 25#include <asm/io.h>
24#include <plat/mux.h> 26#include <plat/mux.h>
25 27
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index d60db87dde08..fa6a708b4099 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -697,7 +697,7 @@ static struct i2c_board_info __initdata mioa701_pi2c_devices[] = {
697}; 697};
698 698
699/* Board I2C devices. */ 699/* Board I2C devices. */
700static struct i2c_board_info __initdata mioa701_i2c_devices[] = { 700static struct i2c_board_info mioa701_i2c_devices[] = {
701 { 701 {
702 I2C_BOARD_INFO("mt9m111", 0x5d), 702 I2C_BOARD_INFO("mt9m111", 0x5d),
703 }, 703 },
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 033b567e50bb..ce1104d1bc17 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -263,11 +263,11 @@ const struct matrix_keymap_data palmtc_keymap_data = {
263 .keymap_size = ARRAY_SIZE(palmtc_matrix_keys), 263 .keymap_size = ARRAY_SIZE(palmtc_matrix_keys),
264}; 264};
265 265
266const static unsigned int palmtc_keypad_row_gpios[] = { 266static const unsigned int palmtc_keypad_row_gpios[] = {
267 0, 9, 10, 11 267 0, 9, 10, 11
268}; 268};
269 269
270const static unsigned int palmtc_keypad_col_gpios[] = { 270static const unsigned int palmtc_keypad_col_gpios[] = {
271 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80 271 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80
272}; 272};
273 273
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 4d2413ed0ffa..c1048a35f187 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -818,6 +818,9 @@ static struct i2c_board_info akita_i2c_board_info[] = {
818 .type = "max7310", 818 .type = "max7310",
819 .addr = 0x18, 819 .addr = 0x18,
820 .platform_data = &akita_ioexp, 820 .platform_data = &akita_ioexp,
821 }, {
822 .type = "wm8750",
823 .addr = 0x1b,
821 }, 824 },
822}; 825};
823 826
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index f5d1ae3db3a4..d303c6929d32 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -3,8 +3,9 @@
3 * 3 *
4 * Support for the Zipit Z2 Handheld device. 4 * Support for the Zipit Z2 Handheld device.
5 * 5 *
6 * Author: Ken McGuire 6 * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
7 * Created: Jan 25, 2009 7 *
8 * Based on research and code by: Ken McGuire
8 * Based on mainstone.c as modified for the Zipit Z2. 9 * Based on mainstone.c as modified for the Zipit Z2.
9 * 10 *
10 * This program is free software; you can redistribute it and/or modify 11 * This program is free software; you can redistribute it and/or modify
@@ -157,21 +158,14 @@ static struct mtd_partition z2_flash_parts[] = {
157 { 158 {
158 .name = "U-Boot Bootloader", 159 .name = "U-Boot Bootloader",
159 .offset = 0x0, 160 .offset = 0x0,
160 .size = 0x20000, 161 .size = 0x40000,
161 }, 162 }, {
162 {
163 .name = "Linux Kernel",
164 .offset = 0x20000,
165 .size = 0x220000,
166 },
167 {
168 .name = "Filesystem",
169 .offset = 0x240000,
170 .size = 0x5b0000,
171 },
172 {
173 .name = "U-Boot Environment", 163 .name = "U-Boot Environment",
174 .offset = 0x7f0000, 164 .offset = 0x40000,
165 .size = 0x60000,
166 }, {
167 .name = "Flash",
168 .offset = 0x60000,
175 .size = MTDPART_SIZ_FULL, 169 .size = MTDPART_SIZ_FULL,
176 }, 170 },
177}; 171};
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index ee5e392430e8..b4575ae9648e 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -18,6 +18,7 @@ config REALVIEW_EB_ARM11MP
18 bool "Support ARM11MPCore tile" 18 bool "Support ARM11MPCore tile"
19 depends on MACH_REALVIEW_EB 19 depends on MACH_REALVIEW_EB
20 select CPU_V6 20 select CPU_V6
21 select ARCH_HAS_BARRIERS if SMP
21 help 22 help
22 Enable support for the ARM11MPCore tile on the Realview platform. 23 Enable support for the ARM11MPCore tile on the Realview platform.
23 24
@@ -35,6 +36,7 @@ config MACH_REALVIEW_PB11MP
35 select CPU_V6 36 select CPU_V6
36 select ARM_GIC 37 select ARM_GIC
37 select HAVE_PATA_PLATFORM 38 select HAVE_PATA_PLATFORM
39 select ARCH_HAS_BARRIERS if SMP
38 help 40 help
39 Include support for the ARM(R) RealView MPCore Platform Baseboard. 41 Include support for the ARM(R) RealView MPCore Platform Baseboard.
40 PB11MPCore is a platform with an on-board ARM11MPCore and has 42 PB11MPCore is a platform with an on-board ARM11MPCore and has
diff --git a/arch/arm/mach-realview/include/mach/barriers.h b/arch/arm/mach-realview/include/mach/barriers.h
new file mode 100644
index 000000000000..0c5d749d7b5f
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/barriers.h
@@ -0,0 +1,8 @@
1/*
2 * Barriers redefined for RealView ARM11MPCore platforms with L220 cache
3 * controller to work around hardware errata causing the outer_sync()
4 * operation to deadlock the system.
5 */
6#define mb() dsb()
7#define rmb() dmb()
8#define wmb() mb()
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 422ccd70d5f5..4425018fab82 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -32,6 +32,7 @@
32#include <asm/leds.h> 32#include <asm/leds.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/pmu.h> 34#include <asm/pmu.h>
35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h> 36#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
37#include <asm/localtimer.h> 38#include <asm/localtimer.h>
@@ -457,7 +458,7 @@ static void __init realview_eb_init(void)
457 458
458MACHINE_START(REALVIEW_EB, "ARM-RealView EB") 459MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
459 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 460 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
460 .phys_io = REALVIEW_EB_UART0_BASE, 461 .phys_io = REALVIEW_EB_UART0_BASE & SECTION_MASK,
461 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, 462 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
462 .boot_params = PHYS_OFFSET + 0x00000100, 463 .boot_params = PHYS_OFFSET + 0x00000100,
463 .fixup = realview_fixup, 464 .fixup = realview_fixup,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 96568ebfa2bb..099a1f125cf8 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -32,6 +32,7 @@
32#include <asm/leds.h> 32#include <asm/leds.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/pmu.h> 34#include <asm/pmu.h>
35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h> 36#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
37 38
@@ -351,7 +352,7 @@ static void __init realview_pb1176_init(void)
351 352
352MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") 353MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
353 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 354 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
354 .phys_io = REALVIEW_PB1176_UART0_BASE, 355 .phys_io = REALVIEW_PB1176_UART0_BASE & SECTION_MASK,
355 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, 356 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
356 .boot_params = PHYS_OFFSET + 0x00000100, 357 .boot_params = PHYS_OFFSET + 0x00000100,
357 .fixup = realview_pb1176_fixup, 358 .fixup = realview_pb1176_fixup,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 7fbefbbebaf0..0e07a5ccb75f 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -32,6 +32,7 @@
32#include <asm/leds.h> 32#include <asm/leds.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/pmu.h> 34#include <asm/pmu.h>
35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h> 36#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
37#include <asm/localtimer.h> 38#include <asm/localtimer.h>
@@ -373,7 +374,7 @@ static void __init realview_pb11mp_init(void)
373 374
374MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") 375MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
375 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 376 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
376 .phys_io = REALVIEW_PB11MP_UART0_BASE, 377 .phys_io = REALVIEW_PB11MP_UART0_BASE & SECTION_MASK,
377 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, 378 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
378 .boot_params = PHYS_OFFSET + 0x00000100, 379 .boot_params = PHYS_OFFSET + 0x00000100,
379 .fixup = realview_fixup, 380 .fixup = realview_fixup,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index d3c113b3dfce..ac2f06f1ca50 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -31,6 +31,7 @@
31#include <asm/leds.h> 31#include <asm/leds.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33#include <asm/pmu.h> 33#include <asm/pmu.h>
34#include <asm/pgtable.h>
34#include <asm/hardware/gic.h> 35#include <asm/hardware/gic.h>
35 36
36#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
@@ -323,7 +324,7 @@ static void __init realview_pba8_init(void)
323 324
324MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") 325MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
325 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 326 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
326 .phys_io = REALVIEW_PBA8_UART0_BASE, 327 .phys_io = REALVIEW_PBA8_UART0_BASE & SECTION_MASK,
327 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc, 328 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
328 .boot_params = PHYS_OFFSET + 0x00000100, 329 .boot_params = PHYS_OFFSET + 0x00000100,
329 .fixup = realview_fixup, 330 .fixup = realview_fixup,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index a235ba30996b..08fd683adc4c 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -31,6 +31,7 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/pmu.h> 32#include <asm/pmu.h>
33#include <asm/smp_twd.h> 33#include <asm/smp_twd.h>
34#include <asm/pgtable.h>
34#include <asm/hardware/gic.h> 35#include <asm/hardware/gic.h>
35#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
36 37
@@ -409,7 +410,7 @@ static void __init realview_pbx_init(void)
409 410
410MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") 411MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
411 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 412 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
412 .phys_io = REALVIEW_PBX_UART0_BASE, 413 .phys_io = REALVIEW_PBX_UART0_BASE & SECTION_MASK,
413 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc, 414 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc,
414 .boot_params = PHYS_OFFSET + 0x00000100, 415 .boot_params = PHYS_OFFSET + 0x00000100,
415 .fixup = realview_pbx_fixup, 416 .fixup = realview_pbx_fixup,
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
index 3aadbf42c112..087e57f20ad5 100644
--- a/arch/arm/mach-s5p6442/clock.c
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -294,7 +294,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); 294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); 295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
296 296
297 printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld", 297 printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld",
298 apll, mpll, epll); 298 apll, mpll, epll);
299 299
300 clk_fout_apll.rate = apll; 300 clk_fout_apll.rate = apll;
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 154bca4abc09..af91fefef2c6 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -183,6 +183,11 @@ static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable)
183 return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); 183 return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable);
184} 184}
185 185
186static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
187{
188 return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
189}
190
186static struct clk clk_sclk_hdmi27m = { 191static struct clk clk_sclk_hdmi27m = {
187 .name = "sclk_hdmi27m", 192 .name = "sclk_hdmi27m",
188 .id = -1, 193 .id = -1,
@@ -406,14 +411,14 @@ static struct clk init_clocks_disable[] = {
406 .id = 0, 411 .id = 0,
407 .parent = &clk_p, 412 .parent = &clk_p,
408 .enable = s5pv210_clk_ip3_ctrl, 413 .enable = s5pv210_clk_ip3_ctrl,
409 .ctrlbit = (1<<4), 414 .ctrlbit = (1 << 5),
410 }, { 415 }, {
411 .name = "i2s_v32", 416 .name = "i2s_v32",
412 .id = 1, 417 .id = 1,
413 .parent = &clk_p, 418 .parent = &clk_p,
414 .enable = s5pv210_clk_ip3_ctrl, 419 .enable = s5pv210_clk_ip3_ctrl,
415 .ctrlbit = (1<<4), 420 .ctrlbit = (1 << 6),
416 } 421 },
417}; 422};
418 423
419static struct clk init_clocks[] = { 424static struct clk init_clocks[] = {
@@ -429,25 +434,25 @@ static struct clk init_clocks[] = {
429 .id = 0, 434 .id = 0,
430 .parent = &clk_pclk_psys.clk, 435 .parent = &clk_pclk_psys.clk,
431 .enable = s5pv210_clk_ip3_ctrl, 436 .enable = s5pv210_clk_ip3_ctrl,
432 .ctrlbit = (1<<7), 437 .ctrlbit = (1 << 17),
433 }, { 438 }, {
434 .name = "uart", 439 .name = "uart",
435 .id = 1, 440 .id = 1,
436 .parent = &clk_pclk_psys.clk, 441 .parent = &clk_pclk_psys.clk,
437 .enable = s5pv210_clk_ip3_ctrl, 442 .enable = s5pv210_clk_ip3_ctrl,
438 .ctrlbit = (1<<8), 443 .ctrlbit = (1 << 18),
439 }, { 444 }, {
440 .name = "uart", 445 .name = "uart",
441 .id = 2, 446 .id = 2,
442 .parent = &clk_pclk_psys.clk, 447 .parent = &clk_pclk_psys.clk,
443 .enable = s5pv210_clk_ip3_ctrl, 448 .enable = s5pv210_clk_ip3_ctrl,
444 .ctrlbit = (1<<9), 449 .ctrlbit = (1 << 19),
445 }, { 450 }, {
446 .name = "uart", 451 .name = "uart",
447 .id = 3, 452 .id = 3,
448 .parent = &clk_pclk_psys.clk, 453 .parent = &clk_pclk_psys.clk,
449 .enable = s5pv210_clk_ip3_ctrl, 454 .enable = s5pv210_clk_ip3_ctrl,
450 .ctrlbit = (1<<10), 455 .ctrlbit = (1 << 20),
451 }, 456 },
452}; 457};
453 458
@@ -497,8 +502,8 @@ static struct clksrc_clk clk_sclk_dac = {
497 .clk = { 502 .clk = {
498 .name = "sclk_dac", 503 .name = "sclk_dac",
499 .id = -1, 504 .id = -1,
500 .ctrlbit = (1 << 10), 505 .enable = s5pv210_clk_mask0_ctrl,
501 .enable = s5pv210_clk_ip1_ctrl, 506 .ctrlbit = (1 << 2),
502 }, 507 },
503 .sources = &clkset_sclk_dac, 508 .sources = &clkset_sclk_dac,
504 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 }, 509 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 },
@@ -527,8 +532,8 @@ static struct clksrc_clk clk_sclk_hdmi = {
527 .clk = { 532 .clk = {
528 .name = "sclk_hdmi", 533 .name = "sclk_hdmi",
529 .id = -1, 534 .id = -1,
530 .enable = s5pv210_clk_ip1_ctrl, 535 .enable = s5pv210_clk_mask0_ctrl,
531 .ctrlbit = (1 << 11), 536 .ctrlbit = (1 << 0),
532 }, 537 },
533 .sources = &clkset_sclk_hdmi, 538 .sources = &clkset_sclk_hdmi,
534 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, 539 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
@@ -565,8 +570,8 @@ static struct clksrc_clk clk_sclk_audio0 = {
565 .clk = { 570 .clk = {
566 .name = "sclk_audio", 571 .name = "sclk_audio",
567 .id = 0, 572 .id = 0,
568 .enable = s5pv210_clk_ip3_ctrl, 573 .enable = s5pv210_clk_mask0_ctrl,
569 .ctrlbit = (1 << 4), 574 .ctrlbit = (1 << 24),
570 }, 575 },
571 .sources = &clkset_sclk_audio0, 576 .sources = &clkset_sclk_audio0,
572 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 0, .size = 4 }, 577 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 0, .size = 4 },
@@ -594,8 +599,8 @@ static struct clksrc_clk clk_sclk_audio1 = {
594 .clk = { 599 .clk = {
595 .name = "sclk_audio", 600 .name = "sclk_audio",
596 .id = 1, 601 .id = 1,
597 .enable = s5pv210_clk_ip3_ctrl, 602 .enable = s5pv210_clk_mask0_ctrl,
598 .ctrlbit = (1 << 5), 603 .ctrlbit = (1 << 25),
599 }, 604 },
600 .sources = &clkset_sclk_audio1, 605 .sources = &clkset_sclk_audio1,
601 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 4, .size = 4 }, 606 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 4, .size = 4 },
@@ -623,8 +628,8 @@ static struct clksrc_clk clk_sclk_audio2 = {
623 .clk = { 628 .clk = {
624 .name = "sclk_audio", 629 .name = "sclk_audio",
625 .id = 2, 630 .id = 2,
626 .enable = s5pv210_clk_ip3_ctrl, 631 .enable = s5pv210_clk_mask0_ctrl,
627 .ctrlbit = (1 << 6), 632 .ctrlbit = (1 << 26),
628 }, 633 },
629 .sources = &clkset_sclk_audio2, 634 .sources = &clkset_sclk_audio2,
630 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 8, .size = 4 }, 635 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 8, .size = 4 },
@@ -680,8 +685,8 @@ static struct clksrc_clk clksrcs[] = {
680 .clk = { 685 .clk = {
681 .name = "uclk1", 686 .name = "uclk1",
682 .id = 0, 687 .id = 0,
683 .ctrlbit = (1<<17), 688 .enable = s5pv210_clk_mask0_ctrl,
684 .enable = s5pv210_clk_ip3_ctrl, 689 .ctrlbit = (1 << 12),
685 }, 690 },
686 .sources = &clkset_uart, 691 .sources = &clkset_uart,
687 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, 692 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
@@ -690,8 +695,8 @@ static struct clksrc_clk clksrcs[] = {
690 .clk = { 695 .clk = {
691 .name = "uclk1", 696 .name = "uclk1",
692 .id = 1, 697 .id = 1,
693 .enable = s5pv210_clk_ip3_ctrl, 698 .enable = s5pv210_clk_mask0_ctrl,
694 .ctrlbit = (1 << 18), 699 .ctrlbit = (1 << 13),
695 }, 700 },
696 .sources = &clkset_uart, 701 .sources = &clkset_uart,
697 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, 702 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 },
@@ -700,8 +705,8 @@ static struct clksrc_clk clksrcs[] = {
700 .clk = { 705 .clk = {
701 .name = "uclk1", 706 .name = "uclk1",
702 .id = 2, 707 .id = 2,
703 .enable = s5pv210_clk_ip3_ctrl, 708 .enable = s5pv210_clk_mask0_ctrl,
704 .ctrlbit = (1 << 19), 709 .ctrlbit = (1 << 14),
705 }, 710 },
706 .sources = &clkset_uart, 711 .sources = &clkset_uart,
707 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, 712 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 },
@@ -710,8 +715,8 @@ static struct clksrc_clk clksrcs[] = {
710 .clk = { 715 .clk = {
711 .name = "uclk1", 716 .name = "uclk1",
712 .id = 3, 717 .id = 3,
713 .enable = s5pv210_clk_ip3_ctrl, 718 .enable = s5pv210_clk_mask0_ctrl,
714 .ctrlbit = (1 << 20), 719 .ctrlbit = (1 << 15),
715 }, 720 },
716 .sources = &clkset_uart, 721 .sources = &clkset_uart,
717 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, 722 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 },
@@ -720,8 +725,8 @@ static struct clksrc_clk clksrcs[] = {
720 .clk = { 725 .clk = {
721 .name = "sclk_mixer", 726 .name = "sclk_mixer",
722 .id = -1, 727 .id = -1,
723 .enable = s5pv210_clk_ip1_ctrl, 728 .enable = s5pv210_clk_mask0_ctrl,
724 .ctrlbit = (1 << 9), 729 .ctrlbit = (1 << 1),
725 }, 730 },
726 .sources = &clkset_sclk_mixer, 731 .sources = &clkset_sclk_mixer,
727 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 }, 732 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
@@ -738,8 +743,8 @@ static struct clksrc_clk clksrcs[] = {
738 .clk = { 743 .clk = {
739 .name = "sclk_fimc", 744 .name = "sclk_fimc",
740 .id = 0, 745 .id = 0,
741 .enable = s5pv210_clk_ip0_ctrl, 746 .enable = s5pv210_clk_mask1_ctrl,
742 .ctrlbit = (1 << 24), 747 .ctrlbit = (1 << 2),
743 }, 748 },
744 .sources = &clkset_group2, 749 .sources = &clkset_group2,
745 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 4 }, 750 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 4 },
@@ -748,8 +753,8 @@ static struct clksrc_clk clksrcs[] = {
748 .clk = { 753 .clk = {
749 .name = "sclk_fimc", 754 .name = "sclk_fimc",
750 .id = 1, 755 .id = 1,
751 .enable = s5pv210_clk_ip0_ctrl, 756 .enable = s5pv210_clk_mask1_ctrl,
752 .ctrlbit = (1 << 25), 757 .ctrlbit = (1 << 3),
753 }, 758 },
754 .sources = &clkset_group2, 759 .sources = &clkset_group2,
755 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 4 }, 760 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 4 },
@@ -758,8 +763,8 @@ static struct clksrc_clk clksrcs[] = {
758 .clk = { 763 .clk = {
759 .name = "sclk_fimc", 764 .name = "sclk_fimc",
760 .id = 2, 765 .id = 2,
761 .enable = s5pv210_clk_ip0_ctrl, 766 .enable = s5pv210_clk_mask1_ctrl,
762 .ctrlbit = (1 << 26), 767 .ctrlbit = (1 << 4),
763 }, 768 },
764 .sources = &clkset_group2, 769 .sources = &clkset_group2,
765 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 4 }, 770 .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 4 },
@@ -768,6 +773,8 @@ static struct clksrc_clk clksrcs[] = {
768 .clk = { 773 .clk = {
769 .name = "sclk_cam", 774 .name = "sclk_cam",
770 .id = 0, 775 .id = 0,
776 .enable = s5pv210_clk_mask0_ctrl,
777 .ctrlbit = (1 << 3),
771 }, 778 },
772 .sources = &clkset_group2, 779 .sources = &clkset_group2,
773 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 }, 780 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 },
@@ -776,6 +783,8 @@ static struct clksrc_clk clksrcs[] = {
776 .clk = { 783 .clk = {
777 .name = "sclk_cam", 784 .name = "sclk_cam",
778 .id = 1, 785 .id = 1,
786 .enable = s5pv210_clk_mask0_ctrl,
787 .ctrlbit = (1 << 4),
779 }, 788 },
780 .sources = &clkset_group2, 789 .sources = &clkset_group2,
781 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 }, 790 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 },
@@ -784,8 +793,8 @@ static struct clksrc_clk clksrcs[] = {
784 .clk = { 793 .clk = {
785 .name = "sclk_fimd", 794 .name = "sclk_fimd",
786 .id = -1, 795 .id = -1,
787 .enable = s5pv210_clk_ip1_ctrl, 796 .enable = s5pv210_clk_mask0_ctrl,
788 .ctrlbit = (1 << 0), 797 .ctrlbit = (1 << 5),
789 }, 798 },
790 .sources = &clkset_group2, 799 .sources = &clkset_group2,
791 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 }, 800 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 },
@@ -794,8 +803,8 @@ static struct clksrc_clk clksrcs[] = {
794 .clk = { 803 .clk = {
795 .name = "sclk_mmc", 804 .name = "sclk_mmc",
796 .id = 0, 805 .id = 0,
797 .enable = s5pv210_clk_ip2_ctrl, 806 .enable = s5pv210_clk_mask0_ctrl,
798 .ctrlbit = (1 << 16), 807 .ctrlbit = (1 << 8),
799 }, 808 },
800 .sources = &clkset_group2, 809 .sources = &clkset_group2,
801 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 }, 810 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
@@ -804,8 +813,8 @@ static struct clksrc_clk clksrcs[] = {
804 .clk = { 813 .clk = {
805 .name = "sclk_mmc", 814 .name = "sclk_mmc",
806 .id = 1, 815 .id = 1,
807 .enable = s5pv210_clk_ip2_ctrl, 816 .enable = s5pv210_clk_mask0_ctrl,
808 .ctrlbit = (1 << 17), 817 .ctrlbit = (1 << 9),
809 }, 818 },
810 .sources = &clkset_group2, 819 .sources = &clkset_group2,
811 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 }, 820 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
@@ -814,8 +823,8 @@ static struct clksrc_clk clksrcs[] = {
814 .clk = { 823 .clk = {
815 .name = "sclk_mmc", 824 .name = "sclk_mmc",
816 .id = 2, 825 .id = 2,
817 .enable = s5pv210_clk_ip2_ctrl, 826 .enable = s5pv210_clk_mask0_ctrl,
818 .ctrlbit = (1 << 18), 827 .ctrlbit = (1 << 10),
819 }, 828 },
820 .sources = &clkset_group2, 829 .sources = &clkset_group2,
821 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 }, 830 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
@@ -824,8 +833,8 @@ static struct clksrc_clk clksrcs[] = {
824 .clk = { 833 .clk = {
825 .name = "sclk_mmc", 834 .name = "sclk_mmc",
826 .id = 3, 835 .id = 3,
827 .enable = s5pv210_clk_ip2_ctrl, 836 .enable = s5pv210_clk_mask0_ctrl,
828 .ctrlbit = (1 << 19), 837 .ctrlbit = (1 << 11),
829 }, 838 },
830 .sources = &clkset_group2, 839 .sources = &clkset_group2,
831 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 }, 840 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
@@ -864,8 +873,8 @@ static struct clksrc_clk clksrcs[] = {
864 .clk = { 873 .clk = {
865 .name = "sclk_csis", 874 .name = "sclk_csis",
866 .id = -1, 875 .id = -1,
867 .enable = s5pv210_clk_ip0_ctrl, 876 .enable = s5pv210_clk_mask0_ctrl,
868 .ctrlbit = (1 << 31), 877 .ctrlbit = (1 << 6),
869 }, 878 },
870 .sources = &clkset_group2, 879 .sources = &clkset_group2,
871 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 }, 880 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 },
@@ -874,8 +883,8 @@ static struct clksrc_clk clksrcs[] = {
874 .clk = { 883 .clk = {
875 .name = "sclk_spi", 884 .name = "sclk_spi",
876 .id = 0, 885 .id = 0,
877 .enable = s5pv210_clk_ip3_ctrl, 886 .enable = s5pv210_clk_mask0_ctrl,
878 .ctrlbit = (1 << 12), 887 .ctrlbit = (1 << 16),
879 }, 888 },
880 .sources = &clkset_group2, 889 .sources = &clkset_group2,
881 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 }, 890 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
@@ -884,8 +893,8 @@ static struct clksrc_clk clksrcs[] = {
884 .clk = { 893 .clk = {
885 .name = "sclk_spi", 894 .name = "sclk_spi",
886 .id = 1, 895 .id = 1,
887 .enable = s5pv210_clk_ip3_ctrl, 896 .enable = s5pv210_clk_mask0_ctrl,
888 .ctrlbit = (1 << 13), 897 .ctrlbit = (1 << 17),
889 }, 898 },
890 .sources = &clkset_group2, 899 .sources = &clkset_group2,
891 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 }, 900 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
@@ -894,8 +903,8 @@ static struct clksrc_clk clksrcs[] = {
894 .clk = { 903 .clk = {
895 .name = "sclk_pwi", 904 .name = "sclk_pwi",
896 .id = -1, 905 .id = -1,
897 .enable = &s5pv210_clk_ip4_ctrl, 906 .enable = s5pv210_clk_mask0_ctrl,
898 .ctrlbit = (1 << 2), 907 .ctrlbit = (1 << 29),
899 }, 908 },
900 .sources = &clkset_group2, 909 .sources = &clkset_group2,
901 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 20, .size = 4 }, 910 .reg_src = { .reg = S5P_CLK_SRC6, .shift = 20, .size = 4 },
@@ -904,8 +913,8 @@ static struct clksrc_clk clksrcs[] = {
904 .clk = { 913 .clk = {
905 .name = "sclk_pwm", 914 .name = "sclk_pwm",
906 .id = -1, 915 .id = -1,
907 .enable = s5pv210_clk_ip3_ctrl, 916 .enable = s5pv210_clk_mask0_ctrl,
908 .ctrlbit = (1 << 23), 917 .ctrlbit = (1 << 19),
909 }, 918 },
910 .sources = &clkset_group2, 919 .sources = &clkset_group2,
911 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 }, 920 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 },
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index c7bc4199e3a8..4556aea9c3c5 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -7,4 +7,5 @@ obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o devices-db5500.o
7obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o 7obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
8obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o 8obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o
9obj-$(CONFIG_MACH_U5500) += board-u5500.o 9obj-$(CONFIG_MACH_U5500) += board-u5500.o
10obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o 10obj-$(CONFIG_SMP) += platsmp.o headsmp.o
11obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 6544855af2f1..fe84b9021c7a 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -16,6 +16,7 @@
16 16
17#include <asm/clkdev.h> 17#include <asm/clkdev.h>
18 18
19#include <plat/mtu.h>
19#include <mach/hardware.h> 20#include <mach/hardware.h>
20#include "clock.h" 21#include "clock.h"
21 22
@@ -59,6 +60,9 @@
59#define PRCM_DMACLK_MGT 0x074 60#define PRCM_DMACLK_MGT 0x074
60#define PRCM_B2R2CLK_MGT 0x078 61#define PRCM_B2R2CLK_MGT 0x078
61#define PRCM_TVCLK_MGT 0x07C 62#define PRCM_TVCLK_MGT 0x07C
63#define PRCM_TCR 0x1C8
64#define PRCM_TCR_STOPPED (1 << 16)
65#define PRCM_TCR_DOZE_MODE (1 << 17)
62#define PRCM_UNIPROCLK_MGT 0x278 66#define PRCM_UNIPROCLK_MGT 0x278
63#define PRCM_SSPCLK_MGT 0x280 67#define PRCM_SSPCLK_MGT 0x280
64#define PRCM_RNGCLK_MGT 0x284 68#define PRCM_RNGCLK_MGT 0x284
@@ -120,10 +124,95 @@ void clk_disable(struct clk *clk)
120} 124}
121EXPORT_SYMBOL(clk_disable); 125EXPORT_SYMBOL(clk_disable);
122 126
127/*
128 * The MTU has a separate, rather complex muxing setup
129 * with alternative parents (peripheral cluster or
130 * ULP or fixed 32768 Hz) depending on settings
131 */
132static unsigned long clk_mtu_get_rate(struct clk *clk)
133{
134 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
135 + PRCM_TCR;
136 u32 tcr = readl(addr);
137 int mtu = (int) clk->data;
138 /*
139 * One of these is selected eventually
140 * TODO: Replace the constant with a reference
141 * to the ULP source once this is modeled.
142 */
143 unsigned long clk32k = 32768;
144 unsigned long mturate;
145 unsigned long retclk;
146
147 /* Get the rate from the parent as a default */
148 if (clk->parent_periph)
149 mturate = clk_get_rate(clk->parent_periph);
150 else if (clk->parent_cluster)
151 mturate = clk_get_rate(clk->parent_cluster);
152 else
153 /* We need to be connected SOMEWHERE */
154 BUG();
155
156 /*
157 * Are we in doze mode?
158 * In this mode the parent peripheral or the fixed 32768 Hz
159 * clock is fed into the block.
160 */
161 if (!(tcr & PRCM_TCR_DOZE_MODE)) {
162 /*
163 * Here we're using the clock input from the APE ULP
164 * clock domain. But first: are the timers stopped?
165 */
166 if (tcr & PRCM_TCR_STOPPED) {
167 clk32k = 0;
168 mturate = 0;
169 } else {
170 /* Else default mode: 0 and 2.4 MHz */
171 clk32k = 0;
172 if (cpu_is_u5500())
173 /* DB5500 divides by 8 */
174 mturate /= 8;
175 else if (cpu_is_u8500ed()) {
176 /*
177 * This clocking setting must not be used
178 * in the ED chip, it is simply not
179 * connected anywhere!
180 */
181 mturate = 0;
182 BUG();
183 } else
184 /*
185 * In this mode the ulp38m4 clock is divided
186 * by a factor 16, on the DB8500 typically
187 * 38400000 / 16 ~ 2.4 MHz.
188 * TODO: Replace the constant with a reference
189 * to the ULP source once this is modeled.
190 */
191 mturate = 38400000 / 16;
192 }
193 }
194
195 /* Return the clock selected for this MTU */
196 if (tcr & (1 << mtu))
197 retclk = clk32k;
198 else
199 retclk = mturate;
200
201 pr_info("MTU%d clock rate: %lu Hz\n", mtu, retclk);
202 return retclk;
203}
204
123unsigned long clk_get_rate(struct clk *clk) 205unsigned long clk_get_rate(struct clk *clk)
124{ 206{
125 unsigned long rate; 207 unsigned long rate;
126 208
209 /*
210 * If there is a custom getrate callback for this clock,
211 * it will take precedence.
212 */
213 if (clk->get_rate)
214 return clk->get_rate(clk);
215
127 if (clk->ops && clk->ops->get_rate) 216 if (clk->ops && clk->ops->get_rate)
128 return clk->ops->get_rate(clk); 217 return clk->ops->get_rate(clk);
129 218
@@ -341,8 +430,9 @@ static DEFINE_PRCC_CLK(5, usb_v1, 0, 0, NULL);
341 430
342/* Peripheral Cluster #6 */ 431/* Peripheral Cluster #6 */
343 432
344static DEFINE_PRCC_CLK(6, mtu1_v1, 8, -1, NULL); 433/* MTU ID in data */
345static DEFINE_PRCC_CLK(6, mtu0_v1, 7, -1, NULL); 434static DEFINE_PRCC_CLK_CUSTOM(6, mtu1_v1, 8, -1, NULL, clk_mtu_get_rate, 1);
435static DEFINE_PRCC_CLK_CUSTOM(6, mtu0_v1, 7, -1, NULL, clk_mtu_get_rate, 0);
346static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL); 436static DEFINE_PRCC_CLK(6, cfgreg_v1, 6, 6, NULL);
347static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL); 437static DEFINE_PRCC_CLK(6, dmc_ed, 6, 6, NULL);
348static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL); 438static DEFINE_PRCC_CLK(6, hash1, 5, -1, NULL);
@@ -357,8 +447,9 @@ static DEFINE_PRCC_CLK(6, rng_v1, 0, 0, &clk_rngclk);
357/* Peripheral Cluster #7 */ 447/* Peripheral Cluster #7 */
358 448
359static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL); 449static DEFINE_PRCC_CLK(7, tzpc0_ed, 4, -1, NULL);
360static DEFINE_PRCC_CLK(7, mtu1_ed, 3, -1, NULL); 450/* MTU ID in data */
361static DEFINE_PRCC_CLK(7, mtu0_ed, 2, -1, NULL); 451static DEFINE_PRCC_CLK_CUSTOM(7, mtu1_ed, 3, -1, NULL, clk_mtu_get_rate, 1);
452static DEFINE_PRCC_CLK_CUSTOM(7, mtu0_ed, 2, -1, NULL, clk_mtu_get_rate, 0);
362static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL); 453static DEFINE_PRCC_CLK(7, wdg_ed, 1, -1, NULL);
363static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL); 454static DEFINE_PRCC_CLK(7, cfgreg_ed, 0, -1, NULL);
364 455
@@ -503,15 +594,17 @@ static struct clk_lookup u8500_v1_clks[] = {
503 CLK(uiccclk, "uicc", NULL), 594 CLK(uiccclk, "uicc", NULL),
504}; 595};
505 596
506static int __init clk_init(void) 597int __init clk_init(void)
507{ 598{
508 if (cpu_is_u8500ed()) { 599 if (cpu_is_u8500ed()) {
509 clk_prcmu_ops.enable = clk_prcmu_ed_enable; 600 clk_prcmu_ops.enable = clk_prcmu_ed_enable;
510 clk_prcmu_ops.disable = clk_prcmu_ed_disable; 601 clk_prcmu_ops.disable = clk_prcmu_ed_disable;
602 clk_per6clk.rate = 100000000;
511 } else if (cpu_is_u5500()) { 603 } else if (cpu_is_u5500()) {
512 /* Clock tree for U5500 not implemented yet */ 604 /* Clock tree for U5500 not implemented yet */
513 clk_prcc_ops.enable = clk_prcc_ops.disable = NULL; 605 clk_prcc_ops.enable = clk_prcc_ops.disable = NULL;
514 clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL; 606 clk_prcmu_ops.enable = clk_prcmu_ops.disable = NULL;
607 clk_per6clk.rate = 26000000;
515 } 608 }
516 609
517 clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks)); 610 clkdev_add_table(u8500_common_clks, ARRAY_SIZE(u8500_common_clks));
@@ -522,4 +615,3 @@ static int __init clk_init(void)
522 615
523 return 0; 616 return 0;
524} 617}
525arch_initcall(clk_init);
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
index e4f99b65026f..a05802501527 100644
--- a/arch/arm/mach-ux500/clock.h
+++ b/arch/arm/mach-ux500/clock.h
@@ -28,6 +28,9 @@ struct clkops {
28 * @ops: pointer to clkops struct used to control this clock 28 * @ops: pointer to clkops struct used to control this clock
29 * @name: name, for debugging 29 * @name: name, for debugging
30 * @enabled: refcount. positive if enabled, zero if disabled 30 * @enabled: refcount. positive if enabled, zero if disabled
31 * @get_rate: custom callback for getting the clock rate
32 * @data: custom per-clock data for example for the get_rate
33 * callback
31 * @rate: fixed rate for clocks which don't implement 34 * @rate: fixed rate for clocks which don't implement
32 * ops->getrate 35 * ops->getrate
33 * @prcmu_cg_off: address offset of the combined enable/disable register 36 * @prcmu_cg_off: address offset of the combined enable/disable register
@@ -67,6 +70,8 @@ struct clk {
67 const struct clkops *ops; 70 const struct clkops *ops;
68 const char *name; 71 const char *name;
69 unsigned int enabled; 72 unsigned int enabled;
73 unsigned long (*get_rate)(struct clk *);
74 void *data;
70 75
71 unsigned long rate; 76 unsigned long rate;
72 struct list_head list; 77 struct list_head list;
@@ -117,9 +122,26 @@ struct clk clk_##_name = { \
117 .parent_periph = _kernclk \ 122 .parent_periph = _kernclk \
118 } 123 }
119 124
125#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
126struct clk clk_##_name = { \
127 .name = #_name, \
128 .ops = &clk_prcc_ops, \
129 .cluster = _pclust, \
130 .prcc_bus = _bus_en, \
131 .prcc_kernel = _kernel_en, \
132 .parent_cluster = &clk_per##_pclust##clk, \
133 .parent_periph = _kernclk, \
134 .get_rate = _callback, \
135 .data = (void *) _data \
136 }
137
138
120#define CLK(_clk, _devname, _conname) \ 139#define CLK(_clk, _devname, _conname) \
121 { \ 140 { \
122 .clk = &clk_##_clk, \ 141 .clk = &clk_##_clk, \
123 .dev_id = _devname, \ 142 .dev_id = _devname, \
124 .con_id = _conname, \ 143 .con_id = _conname, \
125 } 144 }
145
146int __init clk_db8500_ed_fixup(void);
147int __init clk_init(void);
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index d81ad023963c..e0fd747e447a 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -62,6 +62,12 @@ void __init ux500_init_irq(void)
62{ 62{
63 gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); 63 gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
64 gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); 64 gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
65
66 /*
67 * Init clocks here so that they are available for system timer
68 * initialization.
69 */
70 clk_init();
65} 71}
66 72
67#ifdef CONFIG_CACHE_L2X0 73#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index e6f73030d5f0..6353459bb567 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -2,6 +2,7 @@
2 * Versatile Express Core Tile Cortex A9x4 Support 2 * Versatile Express Core Tile Cortex A9x4 Support
3 */ 3 */
4#include <linux/init.h> 4#include <linux/init.h>
5#include <linux/gfp.h>
5#include <linux/device.h> 6#include <linux/device.h>
6#include <linux/dma-mapping.h> 7#include <linux/dma-mapping.h>
7#include <linux/platform_device.h> 8#include <linux/platform_device.h>
@@ -9,6 +10,7 @@
9#include <linux/amba/clcd.h> 10#include <linux/amba/clcd.h>
10 11
11#include <asm/clkdev.h> 12#include <asm/clkdev.h>
13#include <asm/pgtable.h>
12#include <asm/hardware/arm_timer.h> 14#include <asm/hardware/arm_timer.h>
13#include <asm/hardware/cache-l2x0.h> 15#include <asm/hardware/cache-l2x0.h>
14#include <asm/hardware/gic.h> 16#include <asm/hardware/gic.h>
@@ -235,7 +237,7 @@ static void ct_ca9x4_init(void)
235} 237}
236 238
237MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") 239MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
238 .phys_io = V2M_UART0, 240 .phys_io = V2M_UART0 & SECTION_MASK,
239 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc, 241 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
240 .boot_params = PHYS_OFFSET + 0x00000100, 242 .boot_params = PHYS_OFFSET + 0x00000100,
241 .map_io = ct_ca9x4_map_io, 243 .map_io = ct_ca9x4_map_io,
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 346ae14824a5..101105e52610 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -735,6 +735,25 @@ config NEEDS_SYSCALL_FOR_CMPXCHG
735 Forget about fast user space cmpxchg support. 735 Forget about fast user space cmpxchg support.
736 It is just not possible. 736 It is just not possible.
737 737
738config DMA_CACHE_RWFO
739 bool "Enable read/write for ownership DMA cache maintenance"
740 depends on CPU_V6 && SMP
741 default y
742 help
743 The Snoop Control Unit on ARM11MPCore does not detect the
744 cache maintenance operations and the dma_{map,unmap}_area()
745 functions may leave stale cache entries on other CPUs. By
746 enabling this option, Read or Write For Ownership in the ARMv6
747 DMA cache maintenance functions is performed. These LDR/STR
748 instructions change the cache line state to shared or modified
749 so that the cache operation has the desired effect.
750
751 Note that the workaround is only valid on processors that do
752 not perform speculative loads into the D-cache. For such
753 processors, if cache maintenance operations are not broadcast
754 in hardware, other workarounds are needed (e.g. cache
755 maintenance broadcasting in software via FIQ).
756
738config OUTER_CACHE 757config OUTER_CACHE
739 bool 758 bool
740 759
@@ -794,6 +813,8 @@ config ARM_L1_CACHE_SHIFT
794 813
795config ARM_DMA_MEM_BUFFERABLE 814config ARM_DMA_MEM_BUFFERABLE
796 bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7 815 bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7
816 depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \
817 MACH_REALVIEW_PB11MP)
797 default y if CPU_V6 || CPU_V7 818 default y if CPU_V6 || CPU_V7
798 help 819 help
799 Historically, the kernel has used strongly ordered mappings to 820 Historically, the kernel has used strongly ordered mappings to
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index e46ecd847138..86aa689ef1aa 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -211,8 +211,9 @@ v6_dma_inv_range:
211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
212#endif 212#endif
2131: 2131:
214#ifdef CONFIG_SMP 214#ifdef CONFIG_DMA_CACHE_RWFO
215 str r0, [r0] @ write for ownership 215 ldr r2, [r0] @ read for ownership
216 str r2, [r0] @ write for ownership
216#endif 217#endif
217#ifdef HARVARD_CACHE 218#ifdef HARVARD_CACHE
218 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line 219 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
@@ -234,7 +235,7 @@ v6_dma_inv_range:
234v6_dma_clean_range: 235v6_dma_clean_range:
235 bic r0, r0, #D_CACHE_LINE_SIZE - 1 236 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2361: 2371:
237#ifdef CONFIG_SMP 238#ifdef CONFIG_DMA_CACHE_RWFO
238 ldr r2, [r0] @ read for ownership 239 ldr r2, [r0] @ read for ownership
239#endif 240#endif
240#ifdef HARVARD_CACHE 241#ifdef HARVARD_CACHE
@@ -257,7 +258,7 @@ v6_dma_clean_range:
257ENTRY(v6_dma_flush_range) 258ENTRY(v6_dma_flush_range)
258 bic r0, r0, #D_CACHE_LINE_SIZE - 1 259 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2591: 2601:
260#ifdef CONFIG_SMP 261#ifdef CONFIG_DMA_CACHE_RWFO
261 ldr r2, [r0] @ read for ownership 262 ldr r2, [r0] @ read for ownership
262 str r2, [r0] @ write for ownership 263 str r2, [r0] @ write for ownership
263#endif 264#endif
@@ -283,9 +284,13 @@ ENTRY(v6_dma_map_area)
283 add r1, r1, r0 284 add r1, r1, r0
284 teq r2, #DMA_FROM_DEVICE 285 teq r2, #DMA_FROM_DEVICE
285 beq v6_dma_inv_range 286 beq v6_dma_inv_range
287#ifndef CONFIG_DMA_CACHE_RWFO
288 b v6_dma_clean_range
289#else
286 teq r2, #DMA_TO_DEVICE 290 teq r2, #DMA_TO_DEVICE
287 beq v6_dma_clean_range 291 beq v6_dma_clean_range
288 b v6_dma_flush_range 292 b v6_dma_flush_range
293#endif
289ENDPROC(v6_dma_map_area) 294ENDPROC(v6_dma_map_area)
290 295
291/* 296/*
@@ -295,6 +300,11 @@ ENDPROC(v6_dma_map_area)
295 * - dir - DMA direction 300 * - dir - DMA direction
296 */ 301 */
297ENTRY(v6_dma_unmap_area) 302ENTRY(v6_dma_unmap_area)
303#ifndef CONFIG_DMA_CACHE_RWFO
304 add r1, r1, r0
305 teq r2, #DMA_TO_DEVICE
306 bne v6_dma_inv_range
307#endif
298 mov pc, lr 308 mov pc, lr
299ENDPROC(v6_dma_unmap_area) 309ENDPROC(v6_dma_unmap_area)
300 310
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
index 5eb4fd93893d..ac163de7dc01 100644
--- a/arch/arm/mm/copypage-feroceon.c
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -18,7 +18,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom)
18{ 18{
19 asm("\ 19 asm("\
20 stmfd sp!, {r4-r9, lr} \n\ 20 stmfd sp!, {r4-r9, lr} \n\
21 mov ip, %0 \n\ 21 mov ip, %2 \n\
221: mov lr, r1 \n\ 221: mov lr, r1 \n\
23 ldmia r1!, {r2 - r9} \n\ 23 ldmia r1!, {r2 - r9} \n\
24 pld [lr, #32] \n\ 24 pld [lr, #32] \n\
@@ -64,7 +64,7 @@ feroceon_copy_user_page(void *kto, const void *kfrom)
64 mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\ 64 mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\
65 ldmfd sp!, {r4-r9, pc}" 65 ldmfd sp!, {r4-r9, pc}"
66 : 66 :
67 : "I" (PAGE_SIZE)); 67 : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE));
68} 68}
69 69
70void feroceon_copy_user_highpage(struct page *to, struct page *from, 70void feroceon_copy_user_highpage(struct page *to, struct page *from,
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
index 7c2eb55cd4a9..cb589cbb2b6c 100644
--- a/arch/arm/mm/copypage-v4wb.c
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -27,7 +27,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom)
27{ 27{
28 asm("\ 28 asm("\
29 stmfd sp!, {r4, lr} @ 2\n\ 29 stmfd sp!, {r4, lr} @ 2\n\
30 mov r2, %0 @ 1\n\ 30 mov r2, %2 @ 1\n\
31 ldmia r1!, {r3, r4, ip, lr} @ 4\n\ 31 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
321: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ 321: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\
33 stmia r0!, {r3, r4, ip, lr} @ 4\n\ 33 stmia r0!, {r3, r4, ip, lr} @ 4\n\
@@ -44,7 +44,7 @@ v4wb_copy_user_page(void *kto, const void *kfrom)
44 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\ 44 mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\
45 ldmfd sp!, {r4, pc} @ 3" 45 ldmfd sp!, {r4, pc} @ 3"
46 : 46 :
47 : "I" (PAGE_SIZE / 64)); 47 : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
48} 48}
49 49
50void v4wb_copy_user_highpage(struct page *to, struct page *from, 50void v4wb_copy_user_highpage(struct page *to, struct page *from,
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
index 172e6a55458e..30c7d048a324 100644
--- a/arch/arm/mm/copypage-v4wt.c
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -25,7 +25,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom)
25{ 25{
26 asm("\ 26 asm("\
27 stmfd sp!, {r4, lr} @ 2\n\ 27 stmfd sp!, {r4, lr} @ 2\n\
28 mov r2, %0 @ 1\n\ 28 mov r2, %2 @ 1\n\
29 ldmia r1!, {r3, r4, ip, lr} @ 4\n\ 29 ldmia r1!, {r3, r4, ip, lr} @ 4\n\
301: stmia r0!, {r3, r4, ip, lr} @ 4\n\ 301: stmia r0!, {r3, r4, ip, lr} @ 4\n\
31 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ 31 ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
@@ -40,7 +40,7 @@ v4wt_copy_user_page(void *kto, const void *kfrom)
40 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ 40 mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
41 ldmfd sp!, {r4, pc} @ 3" 41 ldmfd sp!, {r4, pc} @ 3"
42 : 42 :
43 : "I" (PAGE_SIZE / 64)); 43 : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64));
44} 44}
45 45
46void v4wt_copy_user_highpage(struct page *to, struct page *from, 46void v4wt_copy_user_highpage(struct page *to, struct page *from,
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
index 747ad4140fc7..f9cde0702f1e 100644
--- a/arch/arm/mm/copypage-xsc3.c
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -34,7 +34,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom)
34{ 34{
35 asm("\ 35 asm("\
36 stmfd sp!, {r4, r5, lr} \n\ 36 stmfd sp!, {r4, r5, lr} \n\
37 mov lr, %0 \n\ 37 mov lr, %2 \n\
38 \n\ 38 \n\
39 pld [r1, #0] \n\ 39 pld [r1, #0] \n\
40 pld [r1, #32] \n\ 40 pld [r1, #32] \n\
@@ -67,7 +67,7 @@ xsc3_mc_copy_user_page(void *kto, const void *kfrom)
67 \n\ 67 \n\
68 ldmfd sp!, {r4, r5, pc}" 68 ldmfd sp!, {r4, r5, pc}"
69 : 69 :
70 : "I" (PAGE_SIZE / 64 - 1)); 70 : "r" (kto), "r" (kfrom), "I" (PAGE_SIZE / 64 - 1));
71} 71}
72 72
73void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, 73void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 13fa536d82e6..9e7742f0a102 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -24,15 +24,6 @@
24#include <asm/tlbflush.h> 24#include <asm/tlbflush.h>
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26 26
27/* Sanity check size */
28#if (CONSISTENT_DMA_SIZE % SZ_2M)
29#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
30#endif
31
32#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
33#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
34#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
35
36static u64 get_coherent_dma_mask(struct device *dev) 27static u64 get_coherent_dma_mask(struct device *dev)
37{ 28{
38 u64 mask = ISA_DMA_THRESHOLD; 29 u64 mask = ISA_DMA_THRESHOLD;
@@ -123,6 +114,15 @@ static void __dma_free_buffer(struct page *page, size_t size)
123} 114}
124 115
125#ifdef CONFIG_MMU 116#ifdef CONFIG_MMU
117/* Sanity check size */
118#if (CONSISTENT_DMA_SIZE % SZ_2M)
119#error "CONSISTENT_DMA_SIZE must be multiple of 2MiB"
120#endif
121
122#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
123#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
124#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
125
126/* 126/*
127 * These are the page tables (2MB each) covering uncached, DMA consistent allocations 127 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
128 */ 128 */
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 92f5801f99c1..cbfb2edcf7d1 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -393,6 +393,9 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
393 if (addr < TASK_SIZE) 393 if (addr < TASK_SIZE)
394 return do_page_fault(addr, fsr, regs); 394 return do_page_fault(addr, fsr, regs);
395 395
396 if (user_mode(regs))
397 goto bad_area;
398
396 index = pgd_index(addr); 399 index = pgd_index(addr);
397 400
398 /* 401 /*
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 77b030f5ec09..086816b205b8 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -48,7 +48,16 @@ void *kmap_atomic(struct page *page, enum km_type type)
48 48
49 debug_kmap_atomic(type); 49 debug_kmap_atomic(type);
50 50
51 kmap = kmap_high_get(page); 51#ifdef CONFIG_DEBUG_HIGHMEM
52 /*
53 * There is no cache coherency issue when non VIVT, so force the
54 * dedicated kmap usage for better debugging purposes in that case.
55 */
56 if (!cache_is_vivt())
57 kmap = NULL;
58 else
59#endif
60 kmap = kmap_high_get(page);
52 if (kmap) 61 if (kmap)
53 return kmap; 62 return kmap;
54 63
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 1ba6cf5a2c02..f6a999465323 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -678,10 +678,10 @@ void __init mem_init(void)
678void free_initmem(void) 678void free_initmem(void)
679{ 679{
680#ifdef CONFIG_HAVE_TCM 680#ifdef CONFIG_HAVE_TCM
681 extern char *__tcm_start, *__tcm_end; 681 extern char __tcm_start, __tcm_end;
682 682
683 totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)), 683 totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
684 __phys_to_pfn(__pa(__tcm_end)), 684 __phys_to_pfn(__pa(&__tcm_end)),
685 "TCM link"); 685 "TCM link");
686#endif 686#endif
687 687
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 0ff3798769ab..08aaa4a7f65f 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -13,7 +13,9 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clockchips.h> 15#include <linux/clockchips.h>
16#include <linux/clk.h>
16#include <linux/jiffies.h> 17#include <linux/jiffies.h>
18#include <linux/err.h>
17#include <asm/mach/time.h> 19#include <asm/mach/time.h>
18 20
19#include <plat/mtu.h> 21#include <plat/mtu.h>
@@ -124,13 +126,25 @@ static struct irqaction nmdk_timer_irq = {
124void __init nmdk_timer_init(void) 126void __init nmdk_timer_init(void)
125{ 127{
126 unsigned long rate; 128 unsigned long rate;
127 u32 cr = MTU_CRn_32BITS;; 129 struct clk *clk0;
130 struct clk *clk1;
131 u32 cr;
132
133 clk0 = clk_get_sys("mtu0", NULL);
134 BUG_ON(IS_ERR(clk0));
135
136 clk1 = clk_get_sys("mtu1", NULL);
137 BUG_ON(IS_ERR(clk1));
138
139 clk_enable(clk0);
140 clk_enable(clk1);
128 141
129 /* 142 /*
130 * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: 143 * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500:
131 * use a divide-by-16 counter if it's more than 16MHz 144 * use a divide-by-16 counter if it's more than 16MHz
132 */ 145 */
133 rate = CLOCK_TICK_RATE; 146 cr = MTU_CRn_32BITS;;
147 rate = clk_get_rate(clk0);
134 if (rate > 16 << 20) { 148 if (rate > 16 << 20) {
135 rate /= 16; 149 rate /= 16;
136 cr |= MTU_CRn_PRESCALE_16; 150 cr |= MTU_CRn_PRESCALE_16;
@@ -153,6 +167,14 @@ void __init nmdk_timer_init(void)
153 nmdk_clksrc.name); 167 nmdk_clksrc.name);
154 168
155 /* Timer 1 is used for events, fix according to rate */ 169 /* Timer 1 is used for events, fix according to rate */
170 cr = MTU_CRn_32BITS;
171 rate = clk_get_rate(clk1);
172 if (rate > 16 << 20) {
173 rate /= 16;
174 cr |= MTU_CRn_PRESCALE_16;
175 } else {
176 cr |= MTU_CRn_PRESCALE_1;
177 }
156 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ 178 writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
157 nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); 179 nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift);
158 nmdk_clkevt.max_delta_ns = 180 nmdk_clkevt.max_delta_ns =
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index c64875f11fac..44bafdab2dce 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -541,11 +541,11 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
541 * timer is stopped 541 * timer is stopped
542 */ 542 */
543 udelay(3500000 / clk_get_rate(timer->fclk) + 1); 543 udelay(3500000 / clk_get_rate(timer->fclk) + 1);
544 /* Ack possibly pending interrupt */
545 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
546 OMAP_TIMER_INT_OVERFLOW);
547#endif 544#endif
548 } 545 }
546 /* Ack possibly pending interrupt */
547 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
548 OMAP_TIMER_INT_OVERFLOW);
549} 549}
550EXPORT_SYMBOL_GPL(omap_dm_timer_stop); 550EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
551 551
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 393e9219a5b6..9b7e3545f325 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -673,6 +673,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
673 if (cpu_is_omap34xx() || cpu_is_omap44xx()) 673 if (cpu_is_omap34xx() || cpu_is_omap44xx())
674 clk_disable(bank->dbck); 674 clk_disable(bank->dbck);
675 } 675 }
676 bank->dbck_enable_mask = val;
676 677
677 __raw_writel(val, reg); 678 __raw_writel(val, reg);
678} 679}
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index e43983ba59c5..8ce0de247c71 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -140,8 +140,10 @@ static struct sg_table *sgtable_alloc(const size_t bytes, u32 flags)
140 return ERR_PTR(-ENOMEM); 140 return ERR_PTR(-ENOMEM);
141 141
142 err = sg_alloc_table(sgt, nr_entries, GFP_KERNEL); 142 err = sg_alloc_table(sgt, nr_entries, GFP_KERNEL);
143 if (err) 143 if (err) {
144 kfree(sgt);
144 return ERR_PTR(err); 145 return ERR_PTR(err);
146 }
145 147
146 pr_debug("%s: sgt:%p(%d entries)\n", __func__, sgt, nr_entries); 148 pr_debug("%s: sgt:%p(%d entries)\n", __func__, sgt, nr_entries);
147 149
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 6187edfbcb77..a17cc0c6a6b0 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -2,8 +2,9 @@
2# Makefile for code common across different PXA processor families 2# Makefile for code common across different PXA processor families
3# 3#
4 4
5obj-y := dma.o pmu.o 5obj-y := dma.o
6 6
7obj-$(CONFIG_ARCH_PXA) += pmu.o
7obj-$(CONFIG_GENERIC_GPIO) += gpio.o 8obj-$(CONFIG_GENERIC_GPIO) += gpio.o
8obj-$(CONFIG_PXA3xx) += mfp.o 9obj-$(CONFIG_PXA3xx) += mfp.o
9obj-$(CONFIG_ARCH_MMP) += mfp.o 10obj-$(CONFIG_ARCH_MMP) += mfp.o
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index e56c8075df97..f36cd3327025 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -71,7 +71,7 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type)
71 break; 71 break;
72 72
73 case IRQ_TYPE_EDGE_FALLING: 73 case IRQ_TYPE_EDGE_FALLING:
74 newvalue = S5P_EXTINT_RISEEDGE; 74 newvalue = S5P_EXTINT_FALLEDGE;
75 break; 75 break;
76 76
77 case IRQ_TYPE_EDGE_BOTH: 77 case IRQ_TYPE_EDGE_BOTH:
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 13f9fb20900a..016674fa20dd 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -166,8 +166,10 @@ static inline void s3c6410_default_sdhci2(void) { }
166#else 166#else
167static inline void s3c6410_default_sdhci0(void) { } 167static inline void s3c6410_default_sdhci0(void) { }
168static inline void s3c6410_default_sdhci1(void) { } 168static inline void s3c6410_default_sdhci1(void) { }
169static inline void s3c6410_default_sdhci2(void) { }
169static inline void s3c6400_default_sdhci0(void) { } 170static inline void s3c6400_default_sdhci0(void) { }
170static inline void s3c6400_default_sdhci1(void) { } 171static inline void s3c6400_default_sdhci1(void) { }
172static inline void s3c6400_default_sdhci2(void) { }
171 173
172#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ 174#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
173 175
@@ -239,7 +241,7 @@ static inline void s5pv210_default_sdhci0(void)
239 s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; 241 s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
240} 242}
241#else 243#else
242static inline void s5pc100_default_sdhci0(void) { } 244static inline void s5pv210_default_sdhci0(void) { }
243#endif /* CONFIG_S3C_DEV_HSMMC */ 245#endif /* CONFIG_S3C_DEV_HSMMC */
244 246
245#ifdef CONFIG_S3C_DEV_HSMMC1 247#ifdef CONFIG_S3C_DEV_HSMMC1
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 66dc2d03b7fc..d66cead97d28 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -277,7 +277,7 @@ ENTRY(vfp_put_double)
277#ifdef CONFIG_VFPv3 277#ifdef CONFIG_VFPv3
278 @ d16 - d31 registers 278 @ d16 - d31 registers
279 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 279 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
2801: mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr 2801: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr
281 mov pc, lr 281 mov pc, lr
282 .org 1b + 8 282 .org 1b + 8
283 .endr 283 .endr
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-14 19:16:15 -0500