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-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/Kconfig-nommu2
-rw-r--r--arch/arm/boot/compressed/head.S10
-rw-r--r--arch/arm/boot/compressed/misc.c12
-rw-r--r--arch/arm/common/pl330.c4
-rw-r--r--arch/arm/include/asm/fpstate.h2
-rw-r--r--arch/arm/include/asm/glue-cache.h2
-rw-r--r--arch/arm/include/asm/glue.h4
-rw-r--r--arch/arm/include/asm/hardware/pl080.h2
-rw-r--r--arch/arm/include/asm/mach/udc_pxa2xx.h2
-rw-r--r--arch/arm/include/asm/system.h2
-rw-r--r--arch/arm/include/asm/ucontext.h2
-rw-r--r--arch/arm/kernel/debug.S19
-rw-r--r--arch/arm/kernel/etm.c4
-rw-r--r--arch/arm/kernel/kprobes-decode.c10
-rw-r--r--arch/arm/kernel/perf_event.c33
-rw-r--r--arch/arm/kernel/perf_event_v6.c2
-rw-r--r--arch/arm/kernel/perf_event_v7.c26
-rw-r--r--arch/arm/kernel/perf_event_xscale.c4
-rw-r--r--arch/arm/kernel/sleep.S14
-rw-r--r--arch/arm/kernel/swp_emulate.c2
-rw-r--r--arch/arm/mach-at91/board-carmeva.c2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_mci.h2
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c6
-rw-r--r--arch/arm/mach-bcmring/dma.c4
-rw-r--r--arch/arm/mach-bcmring/include/csp/dmacHw.h6
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h2
-rw-r--r--arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h4
-rw-r--r--arch/arm/mach-bcmring/include/mach/reg_umi.h2
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c2
-rw-r--r--arch/arm/mach-davinci/cpufreq.c2
-rw-r--r--arch/arm/mach-davinci/da850.c2
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm644x.c2
-rw-r--r--arch/arm/mach-davinci/include/mach/cputype.h2
-rw-r--r--arch/arm/mach-ep93xx/gpio.c2
-rw-r--r--arch/arm/mach-exynos4/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-exynos4/mct.c2
-rw-r--r--arch/arm/mach-exynos4/setup-sdhci-gpio.c4
-rw-r--r--arch/arm/mach-exynos4/setup-sdhci.c2
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c8
-rw-r--r--arch/arm/mach-iop13xx/pci.c4
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c7
-rw-r--r--arch/arm/mach-kirkwood/tsx1x-common.c2
-rw-r--r--arch/arm/mach-lpc32xx/pm.c2
-rw-r--r--arch/arm/mach-mmp/time.c2
-rw-r--r--arch/arm/mach-msm/acpuclock-arm11.c2
-rw-r--r--arch/arm/mach-msm/scm.c2
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c14
-rw-r--r--arch/arm/mach-mx3/mach-pcm043.c12
-rw-r--r--arch/arm/mach-mx5/Kconfig1
-rw-r--r--arch/arm/mach-mx5/Makefile2
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c5
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c9
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c25
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c9
-rw-r--r--arch/arm/mach-mx5/cpu.c59
-rw-r--r--arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c4
-rw-r--r--arch/arm/mach-mx5/mx51_efika.c1
-rw-r--r--arch/arm/mach-mx5/system.c84
-rw-r--r--arch/arm/mach-mxs/Kconfig2
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c15
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c18
-rw-r--r--arch/arm/mach-mxs/devices-mx23.h4
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h4
-rw-r--r--arch/arm/mach-mxs/devices/Kconfig3
-rw-r--r--arch/arm/mach-mxs/devices/Makefile1
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-mmc.c73
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h13
-rw-r--r--arch/arm/mach-mxs/mach-mx23evk.c44
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c89
-rw-r--r--arch/arm/mach-mxs/module-tx28.c41
-rw-r--r--arch/arm/mach-mxs/module-tx28.h1
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq-handler.S2
-rw-r--r--arch/arm/mach-omap1/board-sx1.c2
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/include/mach/ams-delta-fiq.h2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0030.c2
-rw-r--r--arch/arm/mach-omap2/clockdomain.c2
-rw-r--r--arch/arm/mach-omap2/clockdomain.h2
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c4
-rw-r--r--arch/arm/mach-omap2/devices.c6
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/gpio.c2
-rw-r--r--arch/arm/mach-omap2/hsmmc.c2
-rw-r--r--arch/arm/mach-omap2/mcbsp.c2
-rw-r--r--arch/arm/mach-omap2/mux.c2
-rw-r--r--arch/arm/mach-omap2/mux2430.h2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c4
-rw-r--r--arch/arm/mach-omap2/omap_twl.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.h2
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/smartreflex.c2
-rw-r--r--arch/arm/mach-omap2/voltage.c4
-rw-r--r--arch/arm/mach-orion5x/addr-map.c2
-rw-r--r--arch/arm/mach-orion5x/net2big-setup.c2
-rw-r--r--arch/arm/mach-orion5x/ts209-setup.c2
-rw-r--r--arch/arm/mach-orion5x/ts409-setup.c2
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c18
-rw-r--r--arch/arm/mach-pxa/am200epd.c8
-rw-r--r--arch/arm/mach-pxa/am300epd.c13
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c2
-rw-r--r--arch/arm/mach-pxa/cm-x300.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270-income.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/corgi.c1
-rw-r--r--arch/arm/mach-pxa/devices.c9
-rw-r--r--arch/arm/mach-pxa/em-x270.c2
-rw-r--r--arch/arm/mach-pxa/eseries.c36
-rw-r--r--arch/arm/mach-pxa/ezx.c12
-rw-r--r--arch/arm/mach-pxa/gumstix.c13
-rw-r--r--arch/arm/mach-pxa/idp.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/z2.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/zeus.h2
-rw-r--r--arch/arm/mach-pxa/littleton.c2
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/magician.c2
-rw-r--r--arch/arm/mach-pxa/mainstone.c2
-rw-r--r--arch/arm/mach-pxa/mioa701.c4
-rw-r--r--arch/arm/mach-pxa/palm27x.c5
-rw-r--r--arch/arm/mach-pxa/palmtc.c2
-rw-r--r--arch/arm/mach-pxa/palmte2.c33
-rw-r--r--arch/arm/mach-pxa/palmz72.c127
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-pxa/poodle.c3
-rw-r--r--arch/arm/mach-pxa/raumfeld.c2
-rw-r--r--arch/arm/mach-pxa/saar.c2
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/tavorevb.c2
-rw-r--r--arch/arm/mach-pxa/time.c5
-rw-r--r--arch/arm/mach-pxa/tosa.c13
-rw-r--r--arch/arm/mach-pxa/trizeps4.c4
-rw-r--r--arch/arm/mach-pxa/viper.c2
-rw-r--r--arch/arm/mach-pxa/vpac270.c2
-rw-r--r--arch/arm/mach-pxa/z2.c77
-rw-r--r--arch/arm/mach-pxa/zeus.c2
-rw-r--r--arch/arm/mach-pxa/zylonite.c4
-rw-r--r--arch/arm/mach-realview/realview_eb.c2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/dma.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-mem.h2
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c64xx/dma.c2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-fb.h2
-rw-r--r--arch/arm/mach-s5pc100/setup-sdhci.c2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci-gpio.c4
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c2
-rw-r--r--arch/arm/mach-sa1100/Makefile2
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1100.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/SA-1100.h2
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c4
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c19
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c10
-rw-r--r--arch/arm/mach-shmobile/include/mach/mmc.h2
-rw-r--r--arch/arm/mach-shmobile/include/mach/zboot.h2
-rw-r--r--arch/arm/mach-tegra/dma.c4
-rw-r--r--arch/arm/mach-tegra/include/mach/dma.h4
-rw-r--r--arch/arm/mach-u300/clock.c6
-rw-r--r--arch/arm/mach-ux500/board-mop500.c2
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h10
-rw-r--r--arch/arm/mach-versatile/core.c2
-rw-r--r--arch/arm/mm/cache-v4wb.S2
-rw-r--r--arch/arm/mm/cache-v4wt.S2
-rw-r--r--arch/arm/mm/cache-v7.S2
-rw-r--r--arch/arm/mm/proc-arm1020.S2
-rw-r--r--arch/arm/mm/proc-arm1020e.S2
-rw-r--r--arch/arm/mm/proc-arm1022.S2
-rw-r--r--arch/arm/mm/proc-arm1026.S2
-rw-r--r--arch/arm/mm/proc-arm720.S2
-rw-r--r--arch/arm/mm/proc-arm920.S2
-rw-r--r--arch/arm/mm/proc-arm922.S2
-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-macros.S2
-rw-r--r--arch/arm/mm/proc-v6.S4
-rw-r--r--arch/arm/mm/proc-v7.S2
-rw-r--r--arch/arm/plat-mxc/cpufreq.c2
-rw-r--r--arch/arm/plat-mxc/devices/platform-fec.c2
-rw-r--r--arch/arm/plat-mxc/devices/platform-imxdi_rtc.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/audmux.h10
-rw-r--r--arch/arm/plat-mxc/include/mach/entry-macro.S4
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx2x.h12
-rw-r--r--arch/arm/plat-mxc/include/mach/mx50.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx51.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h23
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_nand.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/system.h6
-rw-r--r--arch/arm/plat-mxc/time.c25
-rw-r--r--arch/arm/plat-omap/devices.c2
-rw-r--r--arch/arm/plat-omap/dma.c4
-rw-r--r--arch/arm/plat-omap/include/plat/gpio.h2
-rw-r--r--arch/arm/plat-omap/include/plat/gpmc.h2
-rw-r--r--arch/arm/plat-omap/mcbsp.c2
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h2
-rw-r--r--arch/arm/plat-s3c24xx/Makefile2
-rw-r--r--arch/arm/plat-s3c24xx/cpu-freq.c2
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c2
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h4
-rw-r--r--arch/arm/plat-samsung/s3c-pl330.c2
-rw-r--r--arch/arm/plat-spear/include/plat/clock.h2
216 files changed, 1128 insertions, 421 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7c0effb69fc7..fdc9d4dbf85b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -366,6 +366,7 @@ config ARCH_MXC
366 select GENERIC_CLOCKEVENTS 366 select GENERIC_CLOCKEVENTS
367 select ARCH_REQUIRE_GPIOLIB 367 select ARCH_REQUIRE_GPIOLIB
368 select CLKDEV_LOOKUP 368 select CLKDEV_LOOKUP
369 select HAVE_SCHED_CLOCK
369 help 370 help
370 Support for Freescale MXC/iMX-based family of processors 371 Support for Freescale MXC/iMX-based family of processors
371 372
@@ -693,7 +694,7 @@ config ARCH_S3C2410
693 the Samsung SMDK2410 development board (and derivatives). 694 the Samsung SMDK2410 development board (and derivatives).
694 695
695 Note, the S3C2416 and the S3C2450 are so close that they even share 696 Note, the S3C2416 and the S3C2450 are so close that they even share
696 the same SoC ID code. This means that there is no seperate machine 697 the same SoC ID code. This means that there is no separate machine
697 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 698 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
698 699
699config ARCH_S3C64XX 700config ARCH_S3C64XX
diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu
index 901e6dff8437..2cef8e13f9f8 100644
--- a/arch/arm/Kconfig-nommu
+++ b/arch/arm/Kconfig-nommu
@@ -34,7 +34,7 @@ config PROCESSOR_ID
34 used instead of the auto-probing which utilizes the register. 34 used instead of the auto-probing which utilizes the register.
35 35
36config REMAP_VECTORS_TO_RAM 36config REMAP_VECTORS_TO_RAM
37 bool 'Install vectors to the begining of RAM' if DRAM_BASE 37 bool 'Install vectors to the beginning of RAM' if DRAM_BASE
38 depends on DRAM_BASE 38 depends on DRAM_BASE
39 help 39 help
40 The kernel needs to change the hardware exception vectors. 40 The kernel needs to change the hardware exception vectors.
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 84ac4d656310..adf583cd0c35 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -21,20 +21,12 @@
21 21
22#if defined(CONFIG_DEBUG_ICEDCC) 22#if defined(CONFIG_DEBUG_ICEDCC)
23 23
24#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 24#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
25 .macro loadsp, rb, tmp 25 .macro loadsp, rb, tmp
26 .endm 26 .endm
27 .macro writeb, ch, rb 27 .macro writeb, ch, rb
28 mcr p14, 0, \ch, c0, c5, 0 28 mcr p14, 0, \ch, c0, c5, 0
29 .endm 29 .endm
30#elif defined(CONFIG_CPU_V7)
31 .macro loadsp, rb, tmp
32 .endm
33 .macro writeb, ch, rb
34wait: mrc p14, 0, pc, c0, c1, 0
35 bcs wait
36 mcr p14, 0, \ch, c0, c5, 0
37 .endm
38#elif defined(CONFIG_CPU_XSCALE) 30#elif defined(CONFIG_CPU_XSCALE)
39 .macro loadsp, rb, tmp 31 .macro loadsp, rb, tmp
40 .endm 32 .endm
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 4657e877bf8f..2df38263124c 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -36,7 +36,7 @@ extern void error(char *x);
36 36
37#ifdef CONFIG_DEBUG_ICEDCC 37#ifdef CONFIG_DEBUG_ICEDCC
38 38
39#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 39#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
40 40
41static void icedcc_putc(int ch) 41static void icedcc_putc(int ch)
42{ 42{
@@ -52,16 +52,6 @@ static void icedcc_putc(int ch)
52 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); 52 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
53} 53}
54 54
55#elif defined(CONFIG_CPU_V7)
56
57static void icedcc_putc(int ch)
58{
59 asm(
60 "wait: mrc p14, 0, pc, c0, c1, 0 \n\
61 bcs wait \n\
62 mcr p14, 0, %0, c0, c5, 0 "
63 : : "r" (ch));
64}
65 55
66#elif defined(CONFIG_CPU_XSCALE) 56#elif defined(CONFIG_CPU_XSCALE)
67 57
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 8f0f86db3602..97912fa48782 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1045,7 +1045,7 @@ static inline int _loop(unsigned dry_run, u8 buf[],
1045 unsigned lcnt0, lcnt1, ljmp0, ljmp1; 1045 unsigned lcnt0, lcnt1, ljmp0, ljmp1;
1046 struct _arg_LPEND lpend; 1046 struct _arg_LPEND lpend;
1047 1047
1048 /* Max iterations possibile in DMALP is 256 */ 1048 /* Max iterations possible in DMALP is 256 */
1049 if (*bursts >= 256*256) { 1049 if (*bursts >= 256*256) {
1050 lcnt1 = 256; 1050 lcnt1 = 256;
1051 lcnt0 = 256; 1051 lcnt0 = 256;
@@ -1446,7 +1446,7 @@ int pl330_update(const struct pl330_info *pi)
1446 } 1446 }
1447 1447
1448 for (ev = 0; ev < pi->pcfg.num_events; ev++) { 1448 for (ev = 0; ev < pi->pcfg.num_events; ev++) {
1449 if (val & (1 << ev)) { /* Event occured */ 1449 if (val & (1 << ev)) { /* Event occurred */
1450 struct pl330_thread *thrd; 1450 struct pl330_thread *thrd;
1451 u32 inten = readl(regs + INTEN); 1451 u32 inten = readl(regs + INTEN);
1452 int active; 1452 int active;
diff --git a/arch/arm/include/asm/fpstate.h b/arch/arm/include/asm/fpstate.h
index ee5e03efc1bb..3ad4c10d0d84 100644
--- a/arch/arm/include/asm/fpstate.h
+++ b/arch/arm/include/asm/fpstate.h
@@ -18,7 +18,7 @@
18 * VFP storage area has: 18 * VFP storage area has:
19 * - FPEXC, FPSCR, FPINST and FPINST2. 19 * - FPEXC, FPSCR, FPINST and FPINST2.
20 * - 16 or 32 double precision data registers 20 * - 16 or 32 double precision data registers
21 * - an implementation-dependant word of state for FLDMX/FSTMX (pre-ARMv6) 21 * - an implementation-dependent word of state for FLDMX/FSTMX (pre-ARMv6)
22 * 22 *
23 * FPEXC will always be non-zero once the VFP has been used in this process. 23 * FPEXC will always be non-zero once the VFP has been used in this process.
24 */ 24 */
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index c7afbc552c7f..7e30874377e6 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -126,7 +126,7 @@
126#endif 126#endif
127 127
128#if !defined(_CACHE) && !defined(MULTI_CACHE) 128#if !defined(_CACHE) && !defined(MULTI_CACHE)
129#error Unknown cache maintainence model 129#error Unknown cache maintenance model
130#endif 130#endif
131 131
132#ifndef MULTI_CACHE 132#ifndef MULTI_CACHE
diff --git a/arch/arm/include/asm/glue.h b/arch/arm/include/asm/glue.h
index 0ec35d1698aa..fbf71d75ec83 100644
--- a/arch/arm/include/asm/glue.h
+++ b/arch/arm/include/asm/glue.h
@@ -10,8 +10,8 @@
10 * 10 *
11 * This file provides the glue to stick the processor-specific bits 11 * This file provides the glue to stick the processor-specific bits
12 * into the kernel in an efficient manner. The idea is to use branches 12 * into the kernel in an efficient manner. The idea is to use branches
13 * when we're only targetting one class of TLB, or indirect calls 13 * when we're only targeting one class of TLB, or indirect calls
14 * when we're targetting multiple classes of TLBs. 14 * when we're targeting multiple classes of TLBs.
15 */ 15 */
16#ifdef __KERNEL__ 16#ifdef __KERNEL__
17 17
diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h
index f35b86e68dd5..e4a04e4e5627 100644
--- a/arch/arm/include/asm/hardware/pl080.h
+++ b/arch/arm/include/asm/hardware/pl080.h
@@ -16,7 +16,7 @@
16 * make it not entierly compatible with the PL080 specification from 16 * make it not entierly compatible with the PL080 specification from
17 * ARM. When in doubt, check the Samsung documentation first. 17 * ARM. When in doubt, check the Samsung documentation first.
18 * 18 *
19 * The Samsung defines are PL080S, and add an extra controll register, 19 * The Samsung defines are PL080S, and add an extra control register,
20 * the ability to move more than 2^11 counts of data and some extra 20 * the ability to move more than 2^11 counts of data and some extra
21 * OneNAND features. 21 * OneNAND features.
22*/ 22*/
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h
index 833306ee9e7f..ea297ac70bc6 100644
--- a/arch/arm/include/asm/mach/udc_pxa2xx.h
+++ b/arch/arm/include/asm/mach/udc_pxa2xx.h
@@ -20,8 +20,6 @@ struct pxa2xx_udc_mach_info {
20 * VBUS IRQ and omit the methods above. Store the GPIO number 20 * VBUS IRQ and omit the methods above. Store the GPIO number
21 * here. Note that sometimes the signals go through inverters... 21 * here. Note that sometimes the signals go through inverters...
22 */ 22 */
23 bool gpio_vbus_inverted;
24 int gpio_vbus; /* high == vbus present */
25 bool gpio_pullup_inverted; 23 bool gpio_pullup_inverted;
26 int gpio_pullup; /* high == pullup activated */ 24 int gpio_pullup; /* high == pullup activated */
27}; 25};
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 9a87823642d0..885be097769d 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -249,7 +249,7 @@ do { \
249 * cache totally. This means that the cache becomes inconsistent, and, 249 * cache totally. This means that the cache becomes inconsistent, and,
250 * since we use normal loads/stores as well, this is really bad. 250 * since we use normal loads/stores as well, this is really bad.
251 * Typically, this causes oopsen in filp_close, but could have other, 251 * Typically, this causes oopsen in filp_close, but could have other,
252 * more disasterous effects. There are two work-arounds: 252 * more disastrous effects. There are two work-arounds:
253 * 1. Disable interrupts and emulate the atomic swap 253 * 1. Disable interrupts and emulate the atomic swap
254 * 2. Clean the cache, perform atomic swap, flush the cache 254 * 2. Clean the cache, perform atomic swap, flush the cache
255 * 255 *
diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h
index 47f023aa8495..14749aec94bf 100644
--- a/arch/arm/include/asm/ucontext.h
+++ b/arch/arm/include/asm/ucontext.h
@@ -47,7 +47,7 @@ struct crunch_sigframe {
47#endif 47#endif
48 48
49#ifdef CONFIG_IWMMXT 49#ifdef CONFIG_IWMMXT
50/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ 50/* iwmmxt_area is 0x98 bytes long, preceded by 8 bytes of signature */
51#define IWMMXT_MAGIC 0x12ef842a 51#define IWMMXT_MAGIC 0x12ef842a
52#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8) 52#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8)
53 53
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index d2d983be096d..bcd66e00bdbe 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -25,7 +25,7 @@
25 .macro addruart, rp, rv 25 .macro addruart, rp, rv
26 .endm 26 .endm
27 27
28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
29 29
30 .macro senduart, rd, rx 30 .macro senduart, rd, rx
31 mcr p14, 0, \rd, c0, c5, 0 31 mcr p14, 0, \rd, c0, c5, 0
@@ -49,23 +49,6 @@
491002: 491002:
50 .endm 50 .endm
51 51
52#elif defined(CONFIG_CPU_V7)
53
54 .macro senduart, rd, rx
55 mcr p14, 0, \rd, c0, c5, 0
56 .endm
57
58 .macro busyuart, rd, rx
59busy: mrc p14, 0, pc, c0, c1, 0
60 bcs busy
61 .endm
62
63 .macro waituart, rd, rx
64wait: mrc p14, 0, pc, c0, c1, 0
65 bcs wait
66
67 .endm
68
69#elif defined(CONFIG_CPU_XSCALE) 52#elif defined(CONFIG_CPU_XSCALE)
70 53
71 .macro senduart, rd, rx 54 .macro senduart, rd, rx
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 052b509e2d5f..1bec8b5f22f0 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -338,7 +338,7 @@ static struct miscdevice etb_miscdev = {
338 .fops = &etb_fops, 338 .fops = &etb_fops,
339}; 339};
340 340
341static int __init etb_probe(struct amba_device *dev, const struct amba_id *id) 341static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id)
342{ 342{
343 struct tracectx *t = &tracer; 343 struct tracectx *t = &tracer;
344 int ret = 0; 344 int ret = 0;
@@ -530,7 +530,7 @@ static ssize_t trace_mode_store(struct kobject *kobj,
530static struct kobj_attribute trace_mode_attr = 530static struct kobj_attribute trace_mode_attr =
531 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); 531 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
532 532
533static int __init etm_probe(struct amba_device *dev, const struct amba_id *id) 533static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id)
534{ 534{
535 struct tracectx *t = &tracer; 535 struct tracectx *t = &tracer;
536 int ret = 0; 536 int ret = 0;
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
index 8f6ed43861f1..23891317dc4b 100644
--- a/arch/arm/kernel/kprobes-decode.c
+++ b/arch/arm/kernel/kprobes-decode.c
@@ -594,7 +594,8 @@ static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs)
594 long cpsr = regs->ARM_cpsr; 594 long cpsr = regs->ARM_cpsr;
595 595
596 fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn); 596 fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn);
597 regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */ 597 if (rn != 15)
598 regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */
598 rdv = fnr.r1; 599 rdv = fnr.r1;
599 600
600 if (rd == 15) { 601 if (rd == 15) {
@@ -622,10 +623,11 @@ static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs)
622 long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd]; 623 long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd];
623 long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn]; 624 long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn];
624 long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ 625 long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */
626 long rnv_wb;
625 627
626 /* Save Rn in case of writeback. */ 628 rnv_wb = insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn);
627 regs->uregs[rn] = 629 if (rn != 15)
628 insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn); 630 regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */
629} 631}
630 632
631static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs) 633static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 22e194eb8536..69cfee0fe00f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -79,6 +79,7 @@ struct arm_pmu {
79 void (*write_counter)(int idx, u32 val); 79 void (*write_counter)(int idx, u32 val);
80 void (*start)(void); 80 void (*start)(void);
81 void (*stop)(void); 81 void (*stop)(void);
82 void (*reset)(void *);
82 const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX] 83 const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX]
83 [PERF_COUNT_HW_CACHE_OP_MAX] 84 [PERF_COUNT_HW_CACHE_OP_MAX]
84 [PERF_COUNT_HW_CACHE_RESULT_MAX]; 85 [PERF_COUNT_HW_CACHE_RESULT_MAX];
@@ -204,11 +205,9 @@ armpmu_event_set_period(struct perf_event *event,
204static u64 205static u64
205armpmu_event_update(struct perf_event *event, 206armpmu_event_update(struct perf_event *event,
206 struct hw_perf_event *hwc, 207 struct hw_perf_event *hwc,
207 int idx) 208 int idx, int overflow)
208{ 209{
209 int shift = 64 - 32; 210 u64 delta, prev_raw_count, new_raw_count;
210 s64 prev_raw_count, new_raw_count;
211 u64 delta;
212 211
213again: 212again:
214 prev_raw_count = local64_read(&hwc->prev_count); 213 prev_raw_count = local64_read(&hwc->prev_count);
@@ -218,8 +217,13 @@ again:
218 new_raw_count) != prev_raw_count) 217 new_raw_count) != prev_raw_count)
219 goto again; 218 goto again;
220 219
221 delta = (new_raw_count << shift) - (prev_raw_count << shift); 220 new_raw_count &= armpmu->max_period;
222 delta >>= shift; 221 prev_raw_count &= armpmu->max_period;
222
223 if (overflow)
224 delta = armpmu->max_period - prev_raw_count + new_raw_count;
225 else
226 delta = new_raw_count - prev_raw_count;
223 227
224 local64_add(delta, &event->count); 228 local64_add(delta, &event->count);
225 local64_sub(delta, &hwc->period_left); 229 local64_sub(delta, &hwc->period_left);
@@ -236,7 +240,7 @@ armpmu_read(struct perf_event *event)
236 if (hwc->idx < 0) 240 if (hwc->idx < 0)
237 return; 241 return;
238 242
239 armpmu_event_update(event, hwc, hwc->idx); 243 armpmu_event_update(event, hwc, hwc->idx, 0);
240} 244}
241 245
242static void 246static void
@@ -254,7 +258,7 @@ armpmu_stop(struct perf_event *event, int flags)
254 if (!(hwc->state & PERF_HES_STOPPED)) { 258 if (!(hwc->state & PERF_HES_STOPPED)) {
255 armpmu->disable(hwc, hwc->idx); 259 armpmu->disable(hwc, hwc->idx);
256 barrier(); /* why? */ 260 barrier(); /* why? */
257 armpmu_event_update(event, hwc, hwc->idx); 261 armpmu_event_update(event, hwc, hwc->idx, 0);
258 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; 262 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
259 } 263 }
260} 264}
@@ -624,6 +628,19 @@ static struct pmu pmu = {
624#include "perf_event_v6.c" 628#include "perf_event_v6.c"
625#include "perf_event_v7.c" 629#include "perf_event_v7.c"
626 630
631/*
632 * Ensure the PMU has sane values out of reset.
633 * This requires SMP to be available, so exists as a separate initcall.
634 */
635static int __init
636armpmu_reset(void)
637{
638 if (armpmu && armpmu->reset)
639 return on_each_cpu(armpmu->reset, NULL, 1);
640 return 0;
641}
642arch_initcall(armpmu_reset);
643
627static int __init 644static int __init
628init_hw_perf_events(void) 645init_hw_perf_events(void)
629{ 646{
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 6fc2d228db55..f1e8dd94afe8 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -474,7 +474,7 @@ armv6pmu_handle_irq(int irq_num,
474 continue; 474 continue;
475 475
476 hwc = &event->hw; 476 hwc = &event->hw;
477 armpmu_event_update(event, hwc, idx); 477 armpmu_event_update(event, hwc, idx, 1);
478 data.period = event->hw.last_period; 478 data.period = event->hw.last_period;
479 if (!armpmu_event_set_period(event, hwc, idx)) 479 if (!armpmu_event_set_period(event, hwc, idx))
480 continue; 480 continue;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 2e1402556fa0..4960686afb58 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -466,6 +466,7 @@ static inline unsigned long armv7_pmnc_read(void)
466static inline void armv7_pmnc_write(unsigned long val) 466static inline void armv7_pmnc_write(unsigned long val)
467{ 467{
468 val &= ARMV7_PMNC_MASK; 468 val &= ARMV7_PMNC_MASK;
469 isb();
469 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val)); 470 asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val));
470} 471}
471 472
@@ -502,6 +503,7 @@ static inline int armv7_pmnc_select_counter(unsigned int idx)
502 503
503 val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK; 504 val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK;
504 asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val)); 505 asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
506 isb();
505 507
506 return idx; 508 return idx;
507} 509}
@@ -780,7 +782,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
780 continue; 782 continue;
781 783
782 hwc = &event->hw; 784 hwc = &event->hw;
783 armpmu_event_update(event, hwc, idx); 785 armpmu_event_update(event, hwc, idx, 1);
784 data.period = event->hw.last_period; 786 data.period = event->hw.last_period;
785 if (!armpmu_event_set_period(event, hwc, idx)) 787 if (!armpmu_event_set_period(event, hwc, idx))
786 continue; 788 continue;
@@ -847,6 +849,18 @@ static int armv7pmu_get_event_idx(struct cpu_hw_events *cpuc,
847 } 849 }
848} 850}
849 851
852static void armv7pmu_reset(void *info)
853{
854 u32 idx, nb_cnt = armpmu->num_events;
855
856 /* The counter and interrupt enable registers are unknown at reset. */
857 for (idx = 1; idx < nb_cnt; ++idx)
858 armv7pmu_disable_event(NULL, idx);
859
860 /* Initialize & Reset PMNC: C and P bits */
861 armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C);
862}
863
850static struct arm_pmu armv7pmu = { 864static struct arm_pmu armv7pmu = {
851 .handle_irq = armv7pmu_handle_irq, 865 .handle_irq = armv7pmu_handle_irq,
852 .enable = armv7pmu_enable_event, 866 .enable = armv7pmu_enable_event,
@@ -856,17 +870,15 @@ static struct arm_pmu armv7pmu = {
856 .get_event_idx = armv7pmu_get_event_idx, 870 .get_event_idx = armv7pmu_get_event_idx,
857 .start = armv7pmu_start, 871 .start = armv7pmu_start,
858 .stop = armv7pmu_stop, 872 .stop = armv7pmu_stop,
873 .reset = armv7pmu_reset,
859 .raw_event_mask = 0xFF, 874 .raw_event_mask = 0xFF,
860 .max_period = (1LLU << 32) - 1, 875 .max_period = (1LLU << 32) - 1,
861}; 876};
862 877
863static u32 __init armv7_reset_read_pmnc(void) 878static u32 __init armv7_read_num_pmnc_events(void)
864{ 879{
865 u32 nb_cnt; 880 u32 nb_cnt;
866 881
867 /* Initialize & Reset PMNC: C and P bits */
868 armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C);
869
870 /* Read the nb of CNTx counters supported from PMNC */ 882 /* Read the nb of CNTx counters supported from PMNC */
871 nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK; 883 nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK;
872 884
@@ -880,7 +892,7 @@ static const struct arm_pmu *__init armv7_a8_pmu_init(void)
880 armv7pmu.name = "ARMv7 Cortex-A8"; 892 armv7pmu.name = "ARMv7 Cortex-A8";
881 armv7pmu.cache_map = &armv7_a8_perf_cache_map; 893 armv7pmu.cache_map = &armv7_a8_perf_cache_map;
882 armv7pmu.event_map = &armv7_a8_perf_map; 894 armv7pmu.event_map = &armv7_a8_perf_map;
883 armv7pmu.num_events = armv7_reset_read_pmnc(); 895 armv7pmu.num_events = armv7_read_num_pmnc_events();
884 return &armv7pmu; 896 return &armv7pmu;
885} 897}
886 898
@@ -890,7 +902,7 @@ static const struct arm_pmu *__init armv7_a9_pmu_init(void)
890 armv7pmu.name = "ARMv7 Cortex-A9"; 902 armv7pmu.name = "ARMv7 Cortex-A9";
891 armv7pmu.cache_map = &armv7_a9_perf_cache_map; 903 armv7pmu.cache_map = &armv7_a9_perf_cache_map;
892 armv7pmu.event_map = &armv7_a9_perf_map; 904 armv7pmu.event_map = &armv7_a9_perf_map;
893 armv7pmu.num_events = armv7_reset_read_pmnc(); 905 armv7pmu.num_events = armv7_read_num_pmnc_events();
894 return &armv7pmu; 906 return &armv7pmu;
895} 907}
896#else 908#else
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 28cd3b025bc3..39affbe4fdb2 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -246,7 +246,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
246 continue; 246 continue;
247 247
248 hwc = &event->hw; 248 hwc = &event->hw;
249 armpmu_event_update(event, hwc, idx); 249 armpmu_event_update(event, hwc, idx, 1);
250 data.period = event->hw.last_period; 250 data.period = event->hw.last_period;
251 if (!armpmu_event_set_period(event, hwc, idx)) 251 if (!armpmu_event_set_period(event, hwc, idx))
252 continue; 252 continue;
@@ -578,7 +578,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
578 continue; 578 continue;
579 579
580 hwc = &event->hw; 580 hwc = &event->hw;
581 armpmu_event_update(event, hwc, idx); 581 armpmu_event_update(event, hwc, idx, 1);
582 data.period = event->hw.last_period; 582 data.period = event->hw.last_period;
583 if (!armpmu_event_set_period(event, hwc, idx)) 583 if (!armpmu_event_set_period(event, hwc, idx))
584 continue; 584 continue;
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index bfad698a02e7..6398ead9d1c0 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -119,11 +119,19 @@ ENTRY(cpu_resume)
119#else 119#else
120 ldr r0, sleep_save_sp @ stack phys addr 120 ldr r0, sleep_save_sp @ stack phys addr
121#endif 121#endif
122 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off 122 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
123#ifdef MULTI_CPU 123#ifdef MULTI_CPU
124 ldmia r0!, {r1, sp, lr, pc} @ load v:p, stack, return fn, resume fn 124 @ load v:p, stack, return fn, resume fn
125 ARM( ldmia r0!, {r1, sp, lr, pc} )
126THUMB( ldmia r0!, {r1, r2, r3, r4} )
127THUMB( mov sp, r2 )
128THUMB( mov lr, r3 )
129THUMB( bx r4 )
125#else 130#else
126 ldmia r0!, {r1, sp, lr} @ load v:p, stack, return fn 131 @ load v:p, stack, return fn
132 ARM( ldmia r0!, {r1, sp, lr} )
133THUMB( ldmia r0!, {r1, r2, lr} )
134THUMB( mov sp, r2 )
127 b cpu_do_resume 135 b cpu_do_resume
128#endif 136#endif
129ENDPROC(cpu_resume) 137ENDPROC(cpu_resume)
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 7a5760922914..40ee7e5045e4 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -158,7 +158,7 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
158 158
159 if (res == 0) { 159 if (res == 0) {
160 /* 160 /*
161 * Barrier also required between aquiring a lock for a 161 * Barrier also required between acquiring a lock for a
162 * protected resource and accessing the resource. Inserted for 162 * protected resource and accessing the resource. Inserted for
163 * same reason as above. 163 * same reason as above.
164 */ 164 */
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 2e74a19874d1..295e1e77fa60 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -76,7 +76,7 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
76 .pullup_pin = AT91_PIN_PD9, 76 .pullup_pin = AT91_PIN_PD9,
77}; 77};
78 78
79/* FIXME: user dependant */ 79/* FIXME: user dependent */
80// static struct at91_cf_data __initdata carmeva_cf_data = { 80// static struct at91_cf_data __initdata carmeva_cf_data = {
81// .det_pin = AT91_PIN_PB0, 81// .det_pin = AT91_PIN_PB0,
82// .rst_pin = AT91_PIN_PC5, 82// .rst_pin = AT91_PIN_PC5,
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
index 27ac6f550fe3..02182c16a022 100644
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -102,7 +102,7 @@
102#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ 102#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */
103#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ 103#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */
104#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ 104#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */
105#define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ 105#define AT91_MCI_RTOE (1 << 20) /* Response Time-out Error */
106#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ 106#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */
107#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ 107#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */
108#define AT91_MCI_OVRE (1 << 30) /* Overrun */ 108#define AT91_MCI_OVRE (1 << 30) /* Overrun */
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index ddeb64536756..056dc6674b6b 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -208,7 +208,7 @@ extern void at91_gpio_resume(void);
208 208
209/*-------------------------------------------------------------------------*/ 209/*-------------------------------------------------------------------------*/
210 210
211/* wrappers for "new style" GPIO calls. the old AT91-specfic ones should 211/* wrappers for "new style" GPIO calls. the old AT91-specific ones should
212 * eventually be removed (along with this errno.h inclusion), and the 212 * eventually be removed (along with this errno.h inclusion), and the
213 * gpio request/free calls should probably be implemented. 213 * gpio request/free calls should probably be implemented.
214 */ 214 */
diff --git a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
index 77f84b40dda9..a1f328357aa4 100644
--- a/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
+++ b/arch/arm/mach-bcmring/csp/dmac/dmacHw_extra.c
@@ -551,7 +551,7 @@ int dmacHw_calculateDescriptorCount(dmacHw_CONFIG_t *pConfig, /* [ IN ] Config
551 551
552/****************************************************************************/ 552/****************************************************************************/
553/** 553/**
554* @brief Check the existance of pending descriptor 554* @brief Check the existence of pending descriptor
555* 555*
556* This function confirmes if there is any pending descriptor in the chain 556* This function confirmes if there is any pending descriptor in the chain
557* to program the channel 557* to program the channel
@@ -775,7 +775,7 @@ int dmacHw_setVariableDataDescriptor(dmacHw_HANDLE_t handle, /* [ IN ] DMA Cha
775/** 775/**
776* @brief Read data DMAed to memory 776* @brief Read data DMAed to memory
777* 777*
778* This function will read data that has been DMAed to memory while transfering from: 778* This function will read data that has been DMAed to memory while transferring from:
779* - Memory to memory 779* - Memory to memory
780* - Peripheral to memory 780* - Peripheral to memory
781* 781*
@@ -941,7 +941,7 @@ int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configurat
941/** 941/**
942* @brief Sets channel specific user data 942* @brief Sets channel specific user data
943* 943*
944* This function associates user data to a specif DMA channel 944* This function associates user data to a specific DMA channel
945* 945*
946*/ 946*/
947/****************************************************************************/ 947/****************************************************************************/
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index 8d1baf3f4683..d87ad30dda35 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -629,7 +629,7 @@ EXPORT_SYMBOL(dma_get_device_descriptor_ring);
629* Configures a DMA channel. 629* Configures a DMA channel.
630* 630*
631* @return 631* @return
632* >= 0 - Initialization was successfull. 632* >= 0 - Initialization was successful.
633* 633*
634* -EBUSY - Device is currently being used. 634* -EBUSY - Device is currently being used.
635* -ENODEV - Device handed in is invalid. 635* -ENODEV - Device handed in is invalid.
@@ -673,7 +673,7 @@ static int ConfigChannel(DMA_Handle_t handle)
673/** 673/**
674* Initializes all of the data structures associated with the DMA. 674* Initializes all of the data structures associated with the DMA.
675* @return 675* @return
676* >= 0 - Initialization was successfull. 676* >= 0 - Initialization was successful.
677* 677*
678* -EBUSY - Device is currently being used. 678* -EBUSY - Device is currently being used.
679* -ENODEV - Device handed in is invalid. 679* -ENODEV - Device handed in is invalid.
diff --git a/arch/arm/mach-bcmring/include/csp/dmacHw.h b/arch/arm/mach-bcmring/include/csp/dmacHw.h
index 6c8da2b9fc1f..e6a1dc484ca7 100644
--- a/arch/arm/mach-bcmring/include/csp/dmacHw.h
+++ b/arch/arm/mach-bcmring/include/csp/dmacHw.h
@@ -362,7 +362,7 @@ int dmacHw_setControlDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configurati
362/** 362/**
363* @brief Read data DMA transferred to memory 363* @brief Read data DMA transferred to memory
364* 364*
365* This function will read data that has been DMAed to memory while transfering from: 365* This function will read data that has been DMAed to memory while transferring from:
366* - Memory to memory 366* - Memory to memory
367* - Peripheral to memory 367* - Peripheral to memory
368* 368*
@@ -446,7 +446,7 @@ void dmacHw_stopTransfer(dmacHw_HANDLE_t handle /* [ IN ] DMA Channel handle *
446 446
447/****************************************************************************/ 447/****************************************************************************/
448/** 448/**
449* @brief Check the existance of pending descriptor 449* @brief Check the existence of pending descriptor
450* 450*
451* This function confirmes if there is any pending descriptor in the chain 451* This function confirmes if there is any pending descriptor in the chain
452* to program the channel 452* to program the channel
@@ -542,7 +542,7 @@ dmacHw_HANDLE_t dmacHw_getInterruptSource(void);
542/** 542/**
543* @brief Sets channel specific user data 543* @brief Sets channel specific user data
544* 544*
545* This function associates user data to a specif DMA channel 545* This function associates user data to a specific DMA channel
546* 546*
547*/ 547*/
548/****************************************************************************/ 548/****************************************************************************/
diff --git a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
index 70eaea866cfe..161973385faf 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_def.h
@@ -180,7 +180,7 @@ typedef enum {
180 180
181#define chipcHw_XTAL_FREQ_Hz 25000000 /* Reference clock frequency in Hz */ 181#define chipcHw_XTAL_FREQ_Hz 25000000 /* Reference clock frequency in Hz */
182 182
183/* Programable pin defines */ 183/* Programmable pin defines */
184#define chipcHw_PIN_GPIO(n) ((((n) >= 0) && ((n) < (chipcHw_GPIO_COUNT))) ? (n) : 0xFFFFFFFF) 184#define chipcHw_PIN_GPIO(n) ((((n) >= 0) && ((n) < (chipcHw_GPIO_COUNT))) ? (n) : 0xFFFFFFFF)
185 /* GPIO pin 0 - 60 */ 185 /* GPIO pin 0 - 60 */
186#define chipcHw_PIN_UARTTXD (chipcHw_GPIO_COUNT + 0) /* UART Transmit */ 186#define chipcHw_PIN_UARTTXD (chipcHw_GPIO_COUNT + 0) /* UART Transmit */
diff --git a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
index c78833acb37a..03238c299001 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/chipcHw_inline.h
@@ -832,7 +832,7 @@ static inline void chipcHw_setUsbDevice(void)
832 832
833/****************************************************************************/ 833/****************************************************************************/
834/** 834/**
835* @brief Lower layer funtion to enable/disable a clock of a certain device 835* @brief Lower layer function to enable/disable a clock of a certain device
836* 836*
837* This function enables/disables a core clock 837* This function enables/disables a core clock
838* 838*
diff --git a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
index e01fc4607c91..0aeb6a6fe7f8 100644
--- a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
+++ b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h
@@ -109,9 +109,9 @@
109#define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM) 109#define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM)
110 110
111/* INTC1 - interrupt controller 1 */ 111/* INTC1 - interrupt controller 1 */
112#define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interupt (Not for A0) */ 112#define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interrupt (Not for A0) */
113#define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */ 113#define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */
114#define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interupt (For A0 only)) */ 114#define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interrupt (For A0 only)) */
115#define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */ 115#define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */
116#define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */ 116#define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */
117/* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */ 117/* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */
diff --git a/arch/arm/mach-bcmring/include/mach/reg_umi.h b/arch/arm/mach-bcmring/include/mach/reg_umi.h
index 06a355481ea6..0992842caa77 100644
--- a/arch/arm/mach-bcmring/include/mach/reg_umi.h
+++ b/arch/arm/mach-bcmring/include/mach/reg_umi.h
@@ -88,7 +88,7 @@
88/* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */ 88/* REG_UMI_FLASH0/1/2_TCR, REG_UMI_SRAM0/1_TCR bits */
89/* Enable wait pin during burst write or read */ 89/* Enable wait pin during burst write or read */
90#define REG_UMI_TCR_WAITEN 0x80000000 90#define REG_UMI_TCR_WAITEN 0x80000000
91/* Enable mem ctrlr to work iwth ext mem of lower freq than AHB clk */ 91/* Enable mem ctrlr to work with ext mem of lower freq than AHB clk */
92#define REG_UMI_TCR_LOWFREQ 0x40000000 92#define REG_UMI_TCR_LOWFREQ 0x40000000
93/* 1=synch write, 0=async write */ 93/* 1=synch write, 0=async write */
94#define REG_UMI_TCR_MEMTYPE_SYNCWRITE 0x20000000 94#define REG_UMI_TCR_MEMTYPE_SYNCWRITE 0x20000000
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 6c389ff1020e..3e7be2de96de 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -11,7 +11,7 @@
11 * DM644X-EVM board. It has: 11 * DM644X-EVM board. It has:
12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC, 12 * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video. 13 * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
14 * Additionaly realtime clock, IR remote control receiver, 14 * Additionally realtime clock, IR remote control receiver,
15 * IR Blaster based on MSP430 (firmware although is different 15 * IR Blaster based on MSP430 (firmware although is different
16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive 16 * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17 * with PATA interface, two muxed red-green leds. 17 * with PATA interface, two muxed red-green leds.
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index 4a68c2b1ec11..0a95be1512bb 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -167,7 +167,7 @@ static int davinci_cpu_init(struct cpufreq_policy *policy)
167 /* 167 /*
168 * Time measurement across the target() function yields ~1500-1800us 168 * Time measurement across the target() function yields ~1500-1800us
169 * time taken with no drivers on notification list. 169 * time taken with no drivers on notification list.
170 * Setting the latency to 2000 us to accomodate addition of drivers 170 * Setting the latency to 2000 us to accommodate addition of drivers
171 * to pre/post change notification list. 171 * to pre/post change notification list.
172 */ 172 */
173 policy->cpuinfo.transition_latency = 2000 * 1000; 173 policy->cpuinfo.transition_latency = 2000 * 1000;
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68fe4c289d77..b95b9196deed 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1123,7 +1123,7 @@ void __init da850_init(void)
1123 * This helps keeping the peripherals on this domain insulated 1123 * This helps keeping the peripherals on this domain insulated
1124 * from CPU frequency changes caused by DVFS. The firmware sets 1124 * from CPU frequency changes caused by DVFS. The firmware sets
1125 * both PLL0 and PLL1 to the same frequency so, there should not 1125 * both PLL0 and PLL1 to the same frequency so, there should not
1126 * be any noticible change even in non-DVFS use cases. 1126 * be any noticeable change even in non-DVFS use cases.
1127 */ 1127 */
1128 da850_set_async3_src(1); 1128 da850_set_async3_src(1);
1129 1129
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 76364d1345df..f68012239641 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -314,7 +314,7 @@ static struct clk timer2_clk = {
314 .name = "timer2", 314 .name = "timer2",
315 .parent = &pll1_aux_clk, 315 .parent = &pll1_aux_clk,
316 .lpsc = DAVINCI_LPSC_TIMER2, 316 .lpsc = DAVINCI_LPSC_TIMER2,
317 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 317 .usecount = 1, /* REVISIT: why can't' this be disabled? */
318}; 318};
319 319
320static struct clk timer3_clk = { 320static struct clk timer3_clk = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 9a2376b3137c..5f8a65424184 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -274,7 +274,7 @@ static struct clk timer2_clk = {
274 .name = "timer2", 274 .name = "timer2",
275 .parent = &pll1_aux_clk, 275 .parent = &pll1_aux_clk,
276 .lpsc = DAVINCI_LPSC_TIMER2, 276 .lpsc = DAVINCI_LPSC_TIMER2,
277 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 277 .usecount = 1, /* REVISIT: why can't' this be disabled? */
278}; 278};
279 279
280static struct clk_lookup dm644x_clks[] = { 280static struct clk_lookup dm644x_clks[] = {
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h
index cea6b8972043..957fb87e832e 100644
--- a/arch/arm/mach-davinci/include/mach/cputype.h
+++ b/arch/arm/mach-davinci/include/mach/cputype.h
@@ -4,7 +4,7 @@
4 * Author: Kevin Hilman, Deep Root Systems, LLC 4 * Author: Kevin Hilman, Deep Root Systems, LLC
5 * 5 *
6 * Defines the cpu_is_*() macros for runtime detection of DaVinci 6 * Defines the cpu_is_*() macros for runtime detection of DaVinci
7 * device type. In addtion, if support for a given device is not 7 * device type. In addition, if support for a given device is not
8 * compiled in to the kernel, the macros return 0 so that 8 * compiled in to the kernel, the macros return 0 so that
9 * resulting code can be optimized out. 9 * resulting code can be optimized out.
10 * 10 *
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index 180b8a9d0d21..a5a9ff70b198 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -101,7 +101,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
101static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) 101static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
102{ 102{
103 /* 103 /*
104 * map discontiguous hw irq range to continous sw irq range: 104 * map discontiguous hw irq range to continuous sw irq range:
105 * 105 *
106 * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7}) 106 * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7})
107 */ 107 */
diff --git a/arch/arm/mach-exynos4/include/mach/gpio.h b/arch/arm/mach-exynos4/include/mach/gpio.h
index 939728b38d48..be9266b10fdb 100644
--- a/arch/arm/mach-exynos4/include/mach/gpio.h
+++ b/arch/arm/mach-exynos4/include/mach/gpio.h
@@ -18,7 +18,7 @@
18#define gpio_cansleep __gpio_cansleep 18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq 19#define gpio_to_irq __gpio_to_irq
20 20
21/* Practically, GPIO banks upto GPZ are the configurable gpio banks */ 21/* Practically, GPIO banks up to GPZ are the configurable gpio banks */
22 22
23/* GPIO bank sizes */ 23/* GPIO bank sizes */
24#define EXYNOS4_GPIO_A0_NR (8) 24#define EXYNOS4_GPIO_A0_NR (8)
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c
index af82a8fbb68b..14ac10b7ec02 100644
--- a/arch/arm/mach-exynos4/mct.c
+++ b/arch/arm/mach-exynos4/mct.c
@@ -276,7 +276,7 @@ static void exynos4_mct_tick_start(unsigned long cycles,
276 /* update interrupt count buffer */ 276 /* update interrupt count buffer */
277 exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET); 277 exynos4_mct_write(tmp, mevt->base + MCT_L_ICNTB_OFFSET);
278 278
279 /* enable MCT tick interupt */ 279 /* enable MCT tick interrupt */
280 exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET); 280 exynos4_mct_write(0x1, mevt->base + MCT_L_INT_ENB_OFFSET);
281 281
282 tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET); 282 tmp = __raw_readl(mevt->base + MCT_L_TCON_OFFSET);
diff --git a/arch/arm/mach-exynos4/setup-sdhci-gpio.c b/arch/arm/mach-exynos4/setup-sdhci-gpio.c
index 1b3d3a2de95c..e8d08bf8965a 100644
--- a/arch/arm/mach-exynos4/setup-sdhci-gpio.c
+++ b/arch/arm/mach-exynos4/setup-sdhci-gpio.c
@@ -38,14 +38,14 @@ void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
38 switch (width) { 38 switch (width) {
39 case 8: 39 case 8:
40 for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { 40 for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) {
41 /* Data pin GPK1[3:6] to special-funtion 3 */ 41 /* Data pin GPK1[3:6] to special-function 3 */
42 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); 42 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
43 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); 43 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
44 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); 44 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
45 } 45 }
46 case 4: 46 case 4:
47 for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { 47 for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) {
48 /* Data pin GPK0[3:6] to special-funtion 2 */ 48 /* Data pin GPK0[3:6] to special-function 2 */
49 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); 49 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
50 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); 50 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
51 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); 51 s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
diff --git a/arch/arm/mach-exynos4/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c
index 85f9433d4836..1e83f8cf236d 100644
--- a/arch/arm/mach-exynos4/setup-sdhci.c
+++ b/arch/arm/mach-exynos4/setup-sdhci.c
@@ -35,7 +35,7 @@ void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
35{ 35{
36 u32 ctrl2, ctrl3; 36 u32 ctrl2, ctrl3;
37 37
38 /* don't need to alter anything acording to card-type */ 38 /* don't need to alter anything according to card-type */
39 39
40 ctrl2 = readl(r + S3C_SDHCI_CONTROL2); 40 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
41 41
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5eec099e0c72..56b930a13443 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -255,6 +255,7 @@ config MACH_IMX27_VISSTRIM_M10
255 bool "Vista Silicon i.MX27 Visstrim_m10" 255 bool "Vista Silicon i.MX27 Visstrim_m10"
256 select SOC_IMX27 256 select SOC_IMX27
257 select IMX_HAVE_PLATFORM_IMX_I2C 257 select IMX_HAVE_PLATFORM_IMX_I2C
258 select IMX_HAVE_PLATFORM_IMX_SSI
258 select IMX_HAVE_PLATFORM_IMX_UART 259 select IMX_HAVE_PLATFORM_IMX_UART
259 select IMX_HAVE_PLATFORM_MXC_MMC 260 select IMX_HAVE_PLATFORM_MXC_MMC
260 select IMX_HAVE_PLATFORM_MXC_EHCI 261 select IMX_HAVE_PLATFORM_MXC_EHCI
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index cb705c28de02..6269053505f7 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -34,6 +34,7 @@
34#include <mach/mx25.h> 34#include <mach/mx25.h>
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/audmux.h> 36#include <mach/audmux.h>
37#include <mach/esdhc.h>
37 38
38#include "devices-imx25.h" 39#include "devices-imx25.h"
39 40
@@ -242,6 +243,11 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
242 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 243 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
243}; 244};
244 245
246static struct esdhc_platform_data sd1_pdata = {
247 .cd_gpio = GPIO_SD1CD,
248 .wp_gpio = -EINVAL,
249};
250
245/* 251/*
246 * system init for baseboard usage. Will be called by cpuimx25 init. 252 * system init for baseboard usage. Will be called by cpuimx25 init.
247 * 253 *
@@ -275,7 +281,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
275 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 281 imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
276 282
277 imx25_add_flexcan1(NULL); 283 imx25_add_flexcan1(NULL);
278 imx25_add_sdhci_esdhc_imx(0, NULL); 284 imx25_add_sdhci_esdhc_imx(0, &sd1_pdata);
279 285
280 gpio_request(GPIO_LED1, "LED1"); 286 gpio_request(GPIO_LED1, "LED1");
281 gpio_direction_output(GPIO_LED1, 1); 287 gpio_direction_output(GPIO_LED1, 1);
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 773ea0c95b9f..ba3dae352a2d 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -225,7 +225,7 @@ static u32 iop13xx_atue_cfg_address(struct pci_bus *bus, int devfn, int where)
225/* This routine checks the status of the last configuration cycle. If an error 225/* This routine checks the status of the last configuration cycle. If an error
226 * was detected it returns >0, else it returns a 0. The errors being checked 226 * was detected it returns >0, else it returns a 0. The errors being checked
227 * are parity, master abort, target abort (master and target). These types of 227 * are parity, master abort, target abort (master and target). These types of
228 * errors occure during a config cycle where there is no device, like during 228 * errors occur during a config cycle where there is no device, like during
229 * the discovery stage. 229 * the discovery stage.
230 */ 230 */
231static int iop13xx_atux_pci_status(int clear) 231static int iop13xx_atux_pci_status(int clear)
@@ -332,7 +332,7 @@ static struct pci_ops iop13xx_atux_ops = {
332/* This routine checks the status of the last configuration cycle. If an error 332/* This routine checks the status of the last configuration cycle. If an error
333 * was detected it returns >0, else it returns a 0. The errors being checked 333 * was detected it returns >0, else it returns a 0. The errors being checked
334 * are parity, master abort, target abort (master and target). These types of 334 * are parity, master abort, target abort (master and target). These types of
335 * errors occure during a config cycle where there is no device, like during 335 * errors occur during a config cycle where there is no device, like during
336 * the discovery stage. 336 * the discovery stage.
337 */ 337 */
338static int iop13xx_atue_pci_status(int clear) 338static int iop13xx_atue_pci_status(int clear)
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 0a95063f6d32..17de0bf53c08 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -58,6 +58,12 @@ static struct mvsdio_platform_data sheeva_esata_mvsdio_data = {
58 58
59static struct gpio_led sheevaplug_led_pins[] = { 59static struct gpio_led sheevaplug_led_pins[] = {
60 { 60 {
61 .name = "plug:red:misc",
62 .default_trigger = "none",
63 .gpio = 46,
64 .active_low = 1,
65 },
66 {
61 .name = "plug:green:health", 67 .name = "plug:green:health",
62 .default_trigger = "default-on", 68 .default_trigger = "default-on",
63 .gpio = 49, 69 .gpio = 49,
@@ -80,6 +86,7 @@ static struct platform_device sheevaplug_leds = {
80 86
81static unsigned int sheevaplug_mpp_config[] __initdata = { 87static unsigned int sheevaplug_mpp_config[] __initdata = {
82 MPP29_GPIO, /* USB Power Enable */ 88 MPP29_GPIO, /* USB Power Enable */
89 MPP46_GPIO, /* LED Red */
83 MPP49_GPIO, /* LED */ 90 MPP49_GPIO, /* LED */
84 0 91 0
85}; 92};
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c
index f781164e623f..24294b2bc469 100644
--- a/arch/arm/mach-kirkwood/tsx1x-common.c
+++ b/arch/arm/mach-kirkwood/tsx1x-common.c
@@ -15,7 +15,7 @@
15 15
16/**************************************************************************** 16/****************************************************************************
17 * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the 17 * 16 MiB NOR flash. The struct mtd_partition is not in the same order as the
18 * partitions on the device because we want to keep compatability with 18 * partitions on the device because we want to keep compatibility with
19 * the QNAP firmware. 19 * the QNAP firmware.
20 * Layout as used by QNAP: 20 * Layout as used by QNAP:
21 * 0x00000000-0x00080000 : "U-Boot" 21 * 0x00000000-0x00080000 : "U-Boot"
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c
index e76d41bb7056..b9c80597b7bf 100644
--- a/arch/arm/mach-lpc32xx/pm.c
+++ b/arch/arm/mach-lpc32xx/pm.c
@@ -41,7 +41,7 @@
41 * DRAM clocking and refresh are slightly different for systems with DDR 41 * DRAM clocking and refresh are slightly different for systems with DDR
42 * DRAM or regular SDRAM devices. If SDRAM is used in the system, the 42 * DRAM or regular SDRAM devices. If SDRAM is used in the system, the
43 * SDRAM will still be accessible in direct-run mode. In DDR based systems, 43 * SDRAM will still be accessible in direct-run mode. In DDR based systems,
44 * a transistion to direct-run mode will stop all DDR accesses (no clocks). 44 * a transition to direct-run mode will stop all DDR accesses (no clocks).
45 * Because of this, the code to switch power modes and the code to enter 45 * Because of this, the code to switch power modes and the code to enter
46 * and exit DRAM self-refresh modes must not be executed in DRAM. A small 46 * and exit DRAM self-refresh modes must not be executed in DRAM. A small
47 * section of IRAM is used instead for this. 47 * section of IRAM is used instead for this.
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index aeb9ae23e6ce..99833b9485cf 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -9,7 +9,7 @@
9 * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com> 9 * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com>
10 * 2008-10-08: Bin Yang <bin.yang@marvell.com> 10 * 2008-10-08: Bin Yang <bin.yang@marvell.com>
11 * 11 *
12 * The timers module actually includes three timers, each timer with upto 12 * The timers module actually includes three timers, each timer with up to
13 * three match comparators. Timer #0 is used here in free-running mode as 13 * three match comparators. Timer #0 is used here in free-running mode as
14 * the clock source, and match comparator #1 used as clock event device. 14 * the clock source, and match comparator #1 used as clock event device.
15 * 15 *
diff --git a/arch/arm/mach-msm/acpuclock-arm11.c b/arch/arm/mach-msm/acpuclock-arm11.c
index 7ffbd987eb5d..805d4ee53f7e 100644
--- a/arch/arm/mach-msm/acpuclock-arm11.c
+++ b/arch/arm/mach-msm/acpuclock-arm11.c
@@ -343,7 +343,7 @@ int acpuclk_set_rate(unsigned long rate, int for_power_collapse)
343 } 343 }
344 } 344 }
345 345
346 /* Set wait states for CPU inbetween frequency changes */ 346 /* Set wait states for CPU between frequency changes */
347 reg_clkctl = readl(A11S_CLK_CNTL_ADDR); 347 reg_clkctl = readl(A11S_CLK_CNTL_ADDR);
348 reg_clkctl |= (100 << 16); /* set WT_ST_CNT */ 348 reg_clkctl |= (100 << 16); /* set WT_ST_CNT */
349 writel(reg_clkctl, A11S_CLK_CNTL_ADDR); 349 writel(reg_clkctl, A11S_CLK_CNTL_ADDR);
diff --git a/arch/arm/mach-msm/scm.c b/arch/arm/mach-msm/scm.c
index cfa808dd4897..232f97a04504 100644
--- a/arch/arm/mach-msm/scm.c
+++ b/arch/arm/mach-msm/scm.c
@@ -46,7 +46,7 @@ static DEFINE_MUTEX(scm_lock);
46 * @id: command to be executed 46 * @id: command to be executed
47 * @buf: buffer returned from scm_get_command_buffer() 47 * @buf: buffer returned from scm_get_command_buffer()
48 * 48 *
49 * An SCM command is layed out in memory as follows: 49 * An SCM command is laid out in memory as follows:
50 * 50 *
51 * ------------------- <--- struct scm_command 51 * ------------------- <--- struct scm_command
52 * | command header | 52 * | command header |
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 80761474c0f8..2e288b38b4ad 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -43,6 +43,7 @@
43#include <mach/ipu.h> 43#include <mach/ipu.h>
44#include <mach/mx3fb.h> 44#include <mach/mx3fb.h>
45#include <mach/audmux.h> 45#include <mach/audmux.h>
46#include <mach/esdhc.h>
46 47
47#include "devices-imx35.h" 48#include "devices-imx35.h"
48#include "devices.h" 49#include "devices.h"
@@ -163,11 +164,14 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
163 MX35_PAD_SD1_DATA1__ESDHC1_DAT1, 164 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
164 MX35_PAD_SD1_DATA2__ESDHC1_DAT2, 165 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
165 MX35_PAD_SD1_DATA3__ESDHC1_DAT3, 166 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
167 /* SD1 CD */
168 MX35_PAD_LD18__GPIO3_24,
166}; 169};
167 170
168#define GPIO_LED1 IMX_GPIO_NR(3, 29) 171#define GPIO_LED1 IMX_GPIO_NR(3, 29)
169#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25) 172#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
170#define GPIO_LCDPWR (4) 173#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
174#define GPIO_SD1CD IMX_GPIO_NR(3, 24)
171 175
172static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd, 176static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
173 unsigned int power) 177 unsigned int power)
@@ -254,6 +258,11 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
254 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, 258 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
255}; 259};
256 260
261static struct esdhc_platform_data sd1_pdata = {
262 .cd_gpio = GPIO_SD1CD,
263 .wp_gpio = -EINVAL,
264};
265
257/* 266/*
258 * system init for baseboard usage. Will be called by cpuimx35 init. 267 * system init for baseboard usage. Will be called by cpuimx35 init.
259 * 268 *
@@ -289,7 +298,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
289 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); 298 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
290 299
291 imx35_add_flexcan1(NULL); 300 imx35_add_flexcan1(NULL);
292 imx35_add_sdhci_esdhc_imx(0, NULL); 301 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
293 302
294 gpio_request(GPIO_LED1, "LED1"); 303 gpio_request(GPIO_LED1, "LED1");
295 gpio_direction_output(GPIO_LED1, 1); 304 gpio_direction_output(GPIO_LED1, 1);
@@ -301,7 +310,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
301 310
302 gpio_request(GPIO_LCDPWR, "LCDPWR"); 311 gpio_request(GPIO_LCDPWR, "LCDPWR");
303 gpio_direction_output(GPIO_LCDPWR, 1); 312 gpio_direction_output(GPIO_LCDPWR, 1);
304 gpio_free(GPIO_LCDPWR);
305 313
306 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, 314 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
307 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); 315 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c
index b3ecfb22d241..036ba1a4704b 100644
--- a/arch/arm/mach-mx3/mach-pcm043.c
+++ b/arch/arm/mach-mx3/mach-pcm043.c
@@ -40,6 +40,7 @@
40#include <mach/mx3fb.h> 40#include <mach/mx3fb.h>
41#include <mach/ulpi.h> 41#include <mach/ulpi.h>
42#include <mach/audmux.h> 42#include <mach/audmux.h>
43#include <mach/esdhc.h>
43 44
44#include "devices-imx35.h" 45#include "devices-imx35.h"
45#include "devices.h" 46#include "devices.h"
@@ -217,11 +218,15 @@ static iomux_v3_cfg_t pcm043_pads[] = {
217 MX35_PAD_SD1_DATA1__ESDHC1_DAT1, 218 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
218 MX35_PAD_SD1_DATA2__ESDHC1_DAT2, 219 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
219 MX35_PAD_SD1_DATA3__ESDHC1_DAT3, 220 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
221 MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */
222 MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */
220}; 223};
221 224
222#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31) 225#define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31)
223#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28) 226#define AC97_GPIO_TXD IMX_GPIO_NR(2, 28)
224#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0) 227#define AC97_GPIO_RESET IMX_GPIO_NR(2, 0)
228#define SD1_GPIO_WP IMX_GPIO_NR(2, 23)
229#define SD1_GPIO_CD IMX_GPIO_NR(2, 24)
225 230
226static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97) 231static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
227{ 232{
@@ -346,6 +351,11 @@ static int __init pcm043_otg_mode(char *options)
346} 351}
347__setup("otg_mode=", pcm043_otg_mode); 352__setup("otg_mode=", pcm043_otg_mode);
348 353
354static struct esdhc_platform_data sd1_pdata = {
355 .wp_gpio = SD1_GPIO_WP,
356 .cd_gpio = SD1_GPIO_CD,
357};
358
349/* 359/*
350 * Board specific initialization. 360 * Board specific initialization.
351 */ 361 */
@@ -395,7 +405,7 @@ static void __init pcm043_init(void)
395 imx35_add_fsl_usb2_udc(&otg_device_pdata); 405 imx35_add_fsl_usb2_udc(&otg_device_pdata);
396 406
397 imx35_add_flexcan1(NULL); 407 imx35_add_flexcan1(NULL);
398 imx35_add_sdhci_esdhc_imx(0, NULL); 408 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
399} 409}
400 410
401static void __init pcm043_timer_init(void) 411static void __init pcm043_timer_init(void)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 83ee08847d4d..159340da9191 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -165,6 +165,7 @@ config MACH_MX53_LOCO
165 select IMX_HAVE_PLATFORM_IMX_I2C 165 select IMX_HAVE_PLATFORM_IMX_I2C
166 select IMX_HAVE_PLATFORM_IMX_UART 166 select IMX_HAVE_PLATFORM_IMX_UART
167 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX 167 select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
168 select IMX_HAVE_PLATFORM_GPIO_KEYS
168 help 169 help
169 Include support for MX53 LOCO platform. This includes specific 170 Include support for MX53 LOCO platform. This includes specific
170 configurations for the board and its peripherals. 171 configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 4f63048be3ca..0b9338cec516 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Object file lists. 5# Object file lists.
6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o 6obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o
7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o 7obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
8 8
9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o 9obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index b2ecd194e76d..bea4e4135f9d 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -228,13 +228,12 @@ static inline void babbage_fec_reset(void)
228 int ret; 228 int ret;
229 229
230 /* reset FEC PHY */ 230 /* reset FEC PHY */
231 ret = gpio_request(BABBAGE_FEC_PHY_RESET, "fec-phy-reset"); 231 ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
232 GPIOF_OUT_INIT_LOW, "fec-phy-reset");
232 if (ret) { 233 if (ret) {
233 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); 234 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
234 return; 235 return;
235 } 236 }
236 gpio_direction_output(BABBAGE_FEC_PHY_RESET, 0);
237 gpio_set_value(BABBAGE_FEC_PHY_RESET, 0);
238 msleep(1); 237 msleep(1);
239 gpio_set_value(BABBAGE_FEC_PHY_RESET, 1); 238 gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
240} 239}
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 7b5735c5ea59..2af3f43f74db 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -34,7 +34,7 @@
34#include <mach/imx-uart.h> 34#include <mach/imx-uart.h>
35#include <mach/iomux-mx53.h> 35#include <mach/iomux-mx53.h>
36 36
37#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) 37#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6)
38#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) 38#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30)
39#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) 39#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
40 40
@@ -82,15 +82,14 @@ static inline void mx53_evk_fec_reset(void)
82 int ret; 82 int ret;
83 83
84 /* reset FEC PHY */ 84 /* reset FEC PHY */
85 ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); 85 ret = gpio_request_one(MX53_EVK_FEC_PHY_RST, GPIOF_OUT_INIT_LOW,
86 "fec-phy-reset");
86 if (ret) { 87 if (ret) {
87 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); 88 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
88 return; 89 return;
89 } 90 }
90 gpio_direction_output(SMD_FEC_PHY_RST, 0);
91 gpio_set_value(SMD_FEC_PHY_RST, 0);
92 msleep(1); 91 msleep(1);
93 gpio_set_value(SMD_FEC_PHY_RST, 1); 92 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
94} 93}
95 94
96static struct fec_platform_data mx53_evk_fec_pdata = { 95static struct fec_platform_data mx53_evk_fec_pdata = {
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 0a18f8d23eb0..10a1bea10548 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -36,6 +36,9 @@
36#include "crm_regs.h" 36#include "crm_regs.h"
37#include "devices-imx53.h" 37#include "devices-imx53.h"
38 38
39#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8)
40#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14)
41#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15)
39#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) 42#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
40 43
41static iomux_v3_cfg_t mx53_loco_pads[] = { 44static iomux_v3_cfg_t mx53_loco_pads[] = {
@@ -180,6 +183,27 @@ static iomux_v3_cfg_t mx53_loco_pads[] = {
180 MX53_PAD_GPIO_8__GPIO1_8, 183 MX53_PAD_GPIO_8__GPIO1_8,
181}; 184};
182 185
186#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
187{ \
188 .gpio = gpio_num, \
189 .type = EV_KEY, \
190 .code = ev_code, \
191 .active_low = act_low, \
192 .desc = "btn " descr, \
193 .wakeup = wake, \
194}
195
196static const struct gpio_keys_button loco_buttons[] __initconst = {
197 GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0),
198 GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0),
199 GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0),
200};
201
202static const struct gpio_keys_platform_data loco_button_data __initconst = {
203 .buttons = loco_buttons,
204 .nbuttons = ARRAY_SIZE(loco_buttons),
205};
206
183static inline void mx53_loco_fec_reset(void) 207static inline void mx53_loco_fec_reset(void)
184{ 208{
185 int ret; 209 int ret;
@@ -215,6 +239,7 @@ static void __init mx53_loco_board_init(void)
215 imx53_add_imx_i2c(1, &mx53_loco_i2c_data); 239 imx53_add_imx_i2c(1, &mx53_loco_i2c_data);
216 imx53_add_sdhci_esdhc_imx(0, NULL); 240 imx53_add_sdhci_esdhc_imx(0, NULL);
217 imx53_add_sdhci_esdhc_imx(2, NULL); 241 imx53_add_sdhci_esdhc_imx(2, NULL);
242 imx_add_gpio_keys(&loco_button_data);
218} 243}
219 244
220static void __init mx53_loco_timer_init(void) 245static void __init mx53_loco_timer_init(void)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 652ace413825..fdbc05ed5513 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -865,6 +865,13 @@ static struct clk aips_tz2_clk = {
865 .disable = _clk_ccgr_disable_inwait, 865 .disable = _clk_ccgr_disable_inwait,
866}; 866};
867 867
868static struct clk gpc_dvfs_clk = {
869 .enable_reg = MXC_CCM_CCGR5,
870 .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET,
871 .enable = _clk_ccgr_enable,
872 .disable = _clk_ccgr_disable,
873};
874
868static struct clk gpt_32k_clk = { 875static struct clk gpt_32k_clk = {
869 .id = 0, 876 .id = 0,
870 .parent = &ckil_clk, 877 .parent = &ckil_clk,
@@ -1448,6 +1455,7 @@ static struct clk_lookup mx51_lookups[] = {
1448 _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk) 1455 _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk)
1449 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk) 1456 _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
1450 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk) 1457 _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
1458 _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
1451}; 1459};
1452 1460
1453static struct clk_lookup mx53_lookups[] = { 1461static struct clk_lookup mx53_lookups[] = {
@@ -1511,6 +1519,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
1511 clk_enable(&iim_clk); 1519 clk_enable(&iim_clk);
1512 mx51_revision(); 1520 mx51_revision();
1513 clk_disable(&iim_clk); 1521 clk_disable(&iim_clk);
1522 mx51_display_revision();
1514 1523
1515 /* move usb_phy_clk to 24MHz */ 1524 /* move usb_phy_clk to 24MHz */
1516 clk_set_parent(&usb_phy1_clk, &osc_clk); 1525 clk_set_parent(&usb_phy1_clk, &osc_clk);
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index df46b5e60857..472bdfab2e55 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -21,6 +21,7 @@
21static int cpu_silicon_rev = -1; 21static int cpu_silicon_rev = -1;
22 22
23#define IIM_SREV 0x24 23#define IIM_SREV 0x24
24#define MX50_HW_ADADIG_DIGPROG 0xB0
24 25
25static int get_mx51_srev(void) 26static int get_mx51_srev(void)
26{ 27{
@@ -51,6 +52,26 @@ int mx51_revision(void)
51} 52}
52EXPORT_SYMBOL(mx51_revision); 53EXPORT_SYMBOL(mx51_revision);
53 54
55void mx51_display_revision(void)
56{
57 int rev;
58 char *srev;
59 rev = mx51_revision();
60
61 switch (rev) {
62 case IMX_CHIP_REVISION_2_0:
63 srev = IMX_CHIP_REVISION_2_0_STRING;
64 break;
65 case IMX_CHIP_REVISION_3_0:
66 srev = IMX_CHIP_REVISION_3_0_STRING;
67 break;
68 default:
69 srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
70 }
71 printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
72}
73EXPORT_SYMBOL(mx51_display_revision);
74
54#ifdef CONFIG_NEON 75#ifdef CONFIG_NEON
55 76
56/* 77/*
@@ -107,6 +128,44 @@ int mx53_revision(void)
107} 128}
108EXPORT_SYMBOL(mx53_revision); 129EXPORT_SYMBOL(mx53_revision);
109 130
131static int get_mx50_srev(void)
132{
133 void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
134 u32 rev;
135
136 if (!anatop) {
137 cpu_silicon_rev = -EINVAL;
138 return 0;
139 }
140
141 rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
142 rev &= 0xff;
143
144 iounmap(anatop);
145 if (rev == 0x0)
146 return IMX_CHIP_REVISION_1_0;
147 else if (rev == 0x1)
148 return IMX_CHIP_REVISION_1_1;
149 return 0;
150}
151
152/*
153 * Returns:
154 * the silicon revision of the cpu
155 * -EINVAL - not a mx50
156 */
157int mx50_revision(void)
158{
159 if (!cpu_is_mx50())
160 return -EINVAL;
161
162 if (cpu_silicon_rev == -1)
163 cpu_silicon_rev = get_mx50_srev();
164
165 return cpu_silicon_rev;
166}
167EXPORT_SYMBOL(mx50_revision);
168
110static int __init post_cpu_init(void) 169static int __init post_cpu_init(void)
111{ 170{
112 unsigned int reg; 171 unsigned int reg;
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
index c372a4373691..e6c1119c20ae 100644
--- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c
@@ -67,6 +67,10 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
67 MX51_PAD_SD1_DATA1__SD1_DATA1, 67 MX51_PAD_SD1_DATA1__SD1_DATA1,
68 MX51_PAD_SD1_DATA2__SD1_DATA2, 68 MX51_PAD_SD1_DATA2__SD1_DATA2,
69 MX51_PAD_SD1_DATA3__SD1_DATA3, 69 MX51_PAD_SD1_DATA3__SD1_DATA3,
70 /* SD1 CD */
71 _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP |
72 PAD_CTL_PKE | PAD_CTL_SRE_FAST |
73 PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
70}; 74};
71 75
72#define GPIO_LED1 IMX_GPIO_NR(3, 30) 76#define GPIO_LED1 IMX_GPIO_NR(3, 30)
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 868af8f435fa..d0c7075937cf 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -42,7 +42,6 @@
42#include <asm/mach-types.h> 42#include <asm/mach-types.h>
43#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
44#include <asm/mach/time.h> 44#include <asm/mach/time.h>
45#include <asm/mach-types.h>
46 45
47#include "devices-imx51.h" 46#include "devices-imx51.h"
48#include "devices.h" 47#include "devices.h"
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
new file mode 100644
index 000000000000..76ae8dc33e00
--- /dev/null
+++ b/arch/arm/mach-mx5/system.c
@@ -0,0 +1,84 @@
1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <mach/hardware.h>
16#include "crm_regs.h"
17
18/* set cpu low power mode before WFI instruction. This function is called
19 * mx5 because it can be used for mx50, mx51, and mx53.*/
20void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
21{
22 u32 plat_lpc, arm_srpgcr, ccm_clpcr;
23 u32 empgc0, empgc1;
24 int stop_mode = 0;
25
26 /* always allow platform to issue a deep sleep mode request */
27 plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
28 ~(MXC_CORTEXA8_PLAT_LPC_DSM);
29 ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
30 arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
31 empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
32 empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
33
34 switch (mode) {
35 case WAIT_CLOCKED:
36 break;
37 case WAIT_UNCLOCKED:
38 ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
39 break;
40 case WAIT_UNCLOCKED_POWER_OFF:
41 case STOP_POWER_OFF:
42 plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
43 | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
44 if (mode == WAIT_UNCLOCKED_POWER_OFF) {
45 ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
46 ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
47 ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
48 stop_mode = 0;
49 } else {
50 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
51 ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET;
52 ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
53 ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
54 stop_mode = 1;
55 }
56 arm_srpgcr |= MXC_SRPGCR_PCR;
57
58 if (tzic_enable_wake(1) != 0)
59 return;
60 break;
61 case STOP_POWER_ON:
62 ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
63 break;
64 default:
65 printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
66 return;
67 }
68
69 __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
70 __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
71 __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
72
73 /* Enable NEON SRPG for all but MX50TO1.0. */
74 if (mx50_revision() != IMX_CHIP_REVISION_1_0)
75 __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
76
77 if (stop_mode) {
78 empgc0 |= MXC_SRPGCR_PCR;
79 empgc1 |= MXC_SRPGCR_PCR;
80
81 __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
82 __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
83 }
84}
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index 4f6f174af6c8..4522fbb235d5 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -22,6 +22,7 @@ config MACH_MX23EVK
22 select SOC_IMX23 22 select SOC_IMX23
23 select MXS_HAVE_AMBA_DUART 23 select MXS_HAVE_AMBA_DUART
24 select MXS_HAVE_PLATFORM_AUART 24 select MXS_HAVE_PLATFORM_AUART
25 select MXS_HAVE_PLATFORM_MXS_MMC
25 select MXS_HAVE_PLATFORM_MXSFB 26 select MXS_HAVE_PLATFORM_MXSFB
26 default y 27 default y
27 help 28 help
@@ -35,6 +36,7 @@ config MACH_MX28EVK
35 select MXS_HAVE_PLATFORM_AUART 36 select MXS_HAVE_PLATFORM_AUART
36 select MXS_HAVE_PLATFORM_FEC 37 select MXS_HAVE_PLATFORM_FEC
37 select MXS_HAVE_PLATFORM_FLEXCAN 38 select MXS_HAVE_PLATFORM_FLEXCAN
39 select MXS_HAVE_PLATFORM_MXS_MMC
38 select MXS_HAVE_PLATFORM_MXSFB 40 select MXS_HAVE_PLATFORM_MXSFB
39 select MXS_OCOTP 41 select MXS_OCOTP
40 default y 42 default y
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index d133c7f30940..c3577ea789ac 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -521,6 +521,15 @@ static int clk_misc_init(void)
521 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT, 521 __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,
522 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET); 522 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);
523 523
524 /*
525 * 480 MHz seems too high to be ssp clock source directly,
526 * so set frac to get a 288 MHz ref_io.
527 */
528 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);
529 reg &= ~BM_CLKCTRL_FRAC_IOFRAC;
530 reg |= 30 << BP_CLKCTRL_FRAC_IOFRAC;
531 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC);
532
524 return 0; 533 return 0;
525} 534}
526 535
@@ -528,6 +537,12 @@ int __init mx23_clocks_init(void)
528{ 537{
529 clk_misc_init(); 538 clk_misc_init();
530 539
540 /*
541 * source ssp clock from ref_io than ref_xtal,
542 * as ref_xtal only provides 24 MHz as maximum.
543 */
544 clk_set_parent(&ssp_clk, &ref_io_clk);
545
531 clk_enable(&cpu_clk); 546 clk_enable(&cpu_clk);
532 clk_enable(&hbus_clk); 547 clk_enable(&hbus_clk);
533 clk_enable(&xbus_clk); 548 clk_enable(&xbus_clk);
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 5e489a2b2023..1ad97fed1e94 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -618,6 +618,8 @@ static struct clk_lookup lookups[] = {
618 _REGISTER_CLOCK("pll2", NULL, pll2_clk) 618 _REGISTER_CLOCK("pll2", NULL, pll2_clk)
619 _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk) 619 _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk)
620 _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk) 620 _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk)
621 _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk)
622 _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk)
621 _REGISTER_CLOCK("flexcan.0", NULL, can0_clk) 623 _REGISTER_CLOCK("flexcan.0", NULL, can0_clk)
622 _REGISTER_CLOCK("flexcan.1", NULL, can1_clk) 624 _REGISTER_CLOCK("flexcan.1", NULL, can1_clk)
623 _REGISTER_CLOCK(NULL, "usb0", usb0_clk) 625 _REGISTER_CLOCK(NULL, "usb0", usb0_clk)
@@ -737,6 +739,15 @@ static int clk_misc_init(void)
737 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN; 739 reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
738 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); 740 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
739 741
742 /*
743 * 480 MHz seems too high to be ssp clock source directly,
744 * so set frac0 to get a 288 MHz ref_io0.
745 */
746 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);
747 reg &= ~BM_CLKCTRL_FRAC0_IO0FRAC;
748 reg |= 30 << BP_CLKCTRL_FRAC0_IO0FRAC;
749 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0);
750
740 return 0; 751 return 0;
741} 752}
742 753
@@ -744,6 +755,13 @@ int __init mx28_clocks_init(void)
744{ 755{
745 clk_misc_init(); 756 clk_misc_init();
746 757
758 /*
759 * source ssp clock from ref_io0 than ref_xtal,
760 * as ref_xtal only provides 24 MHz as maximum.
761 */
762 clk_set_parent(&ssp0_clk, &ref_io0_clk);
763 clk_set_parent(&ssp1_clk, &ref_io0_clk);
764
747 clk_enable(&cpu_clk); 765 clk_enable(&cpu_clk);
748 clk_enable(&hbus_clk); 766 clk_enable(&hbus_clk);
749 clk_enable(&xbus_clk); 767 clk_enable(&xbus_clk);
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h
index c7e14f4e3669..c6f345febd39 100644
--- a/arch/arm/mach-mxs/devices-mx23.h
+++ b/arch/arm/mach-mxs/devices-mx23.h
@@ -21,6 +21,10 @@ extern const struct mxs_auart_data mx23_auart_data[] __initconst;
21#define mx23_add_auart0() mx23_add_auart(0) 21#define mx23_add_auart0() mx23_add_auart(0)
22#define mx23_add_auart1() mx23_add_auart(1) 22#define mx23_add_auart1() mx23_add_auart(1)
23 23
24extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst;
25#define mx23_add_mxs_mmc(id, pdata) \
26 mxs_add_mxs_mmc(&mx23_mxs_mmc_data[id], pdata)
27
24#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id) 28#define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id)
25 29
26struct platform_device *__init mx23_add_mxsfb( 30struct platform_device *__init mx23_add_mxsfb(
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index 9d08555c4cf0..c473eddce8cf 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -37,6 +37,10 @@ extern const struct mxs_flexcan_data mx28_flexcan_data[] __initconst;
37extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst; 37extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst;
38#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id]) 38#define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id])
39 39
40extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst;
41#define mx28_add_mxs_mmc(id, pdata) \
42 mxs_add_mxs_mmc(&mx28_mxs_mmc_data[id], pdata)
43
40#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id) 44#define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id)
41 45
42struct platform_device *__init mx28_add_mxsfb( 46struct platform_device *__init mx28_add_mxsfb(
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig
index 1451ad060d82..acf9eea124c0 100644
--- a/arch/arm/mach-mxs/devices/Kconfig
+++ b/arch/arm/mach-mxs/devices/Kconfig
@@ -15,6 +15,9 @@ config MXS_HAVE_PLATFORM_FLEXCAN
15config MXS_HAVE_PLATFORM_MXS_I2C 15config MXS_HAVE_PLATFORM_MXS_I2C
16 bool 16 bool
17 17
18config MXS_HAVE_PLATFORM_MXS_MMC
19 bool
20
18config MXS_HAVE_PLATFORM_MXS_PWM 21config MXS_HAVE_PLATFORM_MXS_PWM
19 bool 22 bool
20 23
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
index 0d9bea30b0a2..324f2824d38d 100644
--- a/arch/arm/mach-mxs/devices/Makefile
+++ b/arch/arm/mach-mxs/devices/Makefile
@@ -4,5 +4,6 @@ obj-y += platform-dma.o
4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o 4obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o
5obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o 5obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o 6obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
7obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o 8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
8obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o 9obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
new file mode 100644
index 000000000000..382dacbeca21
--- /dev/null
+++ b/arch/arm/mach-mxs/devices/platform-mxs-mmc.c
@@ -0,0 +1,73 @@
1/*
2 * Copyright (C) 2010 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License version 2 as published by the
9 * Free Software Foundation.
10 */
11
12#include <linux/compiler.h>
13#include <linux/err.h>
14#include <linux/init.h>
15
16#include <mach/mx23.h>
17#include <mach/mx28.h>
18#include <mach/devices-common.h>
19
20#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid) \
21 { \
22 .id = _id, \
23 .iobase = soc ## _SSP ## hwid ## _BASE_ADDR, \
24 .dma = soc ## _DMA_SSP ## hwid, \
25 .irq_err = soc ## _INT_SSP ## hwid ## _ERROR, \
26 .irq_dma = soc ## _INT_SSP ## hwid ## _DMA, \
27 }
28
29#define mxs_mxs_mmc_data_entry(soc, _id, hwid) \
30 [_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid)
31
32
33#ifdef CONFIG_SOC_IMX23
34const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = {
35 mxs_mxs_mmc_data_entry(MX23, 0, 1),
36 mxs_mxs_mmc_data_entry(MX23, 1, 2),
37};
38#endif
39
40#ifdef CONFIG_SOC_IMX28
41const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = {
42 mxs_mxs_mmc_data_entry(MX28, 0, 0),
43 mxs_mxs_mmc_data_entry(MX28, 1, 1),
44};
45#endif
46
47struct platform_device *__init mxs_add_mxs_mmc(
48 const struct mxs_mxs_mmc_data *data,
49 const struct mxs_mmc_platform_data *pdata)
50{
51 struct resource res[] = {
52 {
53 .start = data->iobase,
54 .end = data->iobase + SZ_8K - 1,
55 .flags = IORESOURCE_MEM,
56 }, {
57 .start = data->dma,
58 .end = data->dma,
59 .flags = IORESOURCE_DMA,
60 }, {
61 .start = data->irq_err,
62 .end = data->irq_err,
63 .flags = IORESOURCE_IRQ,
64 }, {
65 .start = data->irq_dma,
66 .end = data->irq_dma,
67 .flags = IORESOURCE_IRQ,
68 },
69 };
70
71 return mxs_add_platform_device("mxs-mmc", data->id,
72 res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
73}
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index 71f24484b044..c5137f14c364 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -73,6 +73,19 @@ struct mxs_i2c_data {
73}; 73};
74struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data); 74struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data);
75 75
76/* mmc */
77#include <mach/mmc.h>
78struct mxs_mxs_mmc_data {
79 int id;
80 resource_size_t iobase;
81 resource_size_t dma;
82 resource_size_t irq_err;
83 resource_size_t irq_dma;
84};
85struct platform_device *__init mxs_add_mxs_mmc(
86 const struct mxs_mxs_mmc_data *data,
87 const struct mxs_mmc_platform_data *pdata);
88
76/* pwm */ 89/* pwm */
77struct platform_device *__init mxs_add_mxs_pwm( 90struct platform_device *__init mxs_add_mxs_pwm(
78 resource_size_t iobase, int id); 91 resource_size_t iobase, int id);
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index a66994f0518f..214e5b641bbc 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -28,6 +28,8 @@
28 28
29#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18) 29#define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18)
30#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28) 30#define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28)
31#define MX23EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(1, 30)
32#define MX23EVK_MMC0_SLOT_POWER MXS_GPIO_NR(1, 29)
31 33
32static const iomux_cfg_t mx23evk_pads[] __initconst = { 34static const iomux_cfg_t mx23evk_pads[] __initconst = {
33 /* duart */ 35 /* duart */
@@ -73,6 +75,36 @@ static const iomux_cfg_t mx23evk_pads[] __initconst = {
73 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL, 75 MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL,
74 /* backlight control */ 76 /* backlight control */
75 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL, 77 MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL,
78
79 /* mmc */
80 MX23_PAD_SSP1_DATA0__SSP1_DATA0 |
81 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
82 MX23_PAD_SSP1_DATA1__SSP1_DATA1 |
83 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
84 MX23_PAD_SSP1_DATA2__SSP1_DATA2 |
85 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
86 MX23_PAD_SSP1_DATA3__SSP1_DATA3 |
87 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
88 MX23_PAD_GPMI_D08__SSP1_DATA4 |
89 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
90 MX23_PAD_GPMI_D09__SSP1_DATA5 |
91 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
92 MX23_PAD_GPMI_D10__SSP1_DATA6 |
93 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
94 MX23_PAD_GPMI_D11__SSP1_DATA7 |
95 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
96 MX23_PAD_SSP1_CMD__SSP1_CMD |
97 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
98 MX23_PAD_SSP1_DETECT__SSP1_DETECT |
99 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
100 MX23_PAD_SSP1_SCK__SSP1_SCK |
101 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
102 /* write protect */
103 MX23_PAD_PWM4__GPIO_1_30 |
104 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
105 /* slot power enable */
106 MX23_PAD_PWM3__GPIO_1_29 |
107 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
76}; 108};
77 109
78/* mxsfb (lcdif) */ 110/* mxsfb (lcdif) */
@@ -101,6 +133,11 @@ static const struct mxsfb_platform_data mx23evk_mxsfb_pdata __initconst = {
101 .ld_intf_width = STMLCDIF_24BIT, 133 .ld_intf_width = STMLCDIF_24BIT,
102}; 134};
103 135
136static struct mxs_mmc_platform_data mx23evk_mmc_pdata __initdata = {
137 .wp_gpio = MX23EVK_MMC0_WRITE_PROTECT,
138 .flags = SLOTF_8_BIT_CAPABLE,
139};
140
104static void __init mx23evk_init(void) 141static void __init mx23evk_init(void)
105{ 142{
106 int ret; 143 int ret;
@@ -110,6 +147,13 @@ static void __init mx23evk_init(void)
110 mx23_add_duart(); 147 mx23_add_duart();
111 mx23_add_auart0(); 148 mx23_add_auart0();
112 149
150 /* power on mmc slot by writing 0 to the gpio */
151 ret = gpio_request_one(MX23EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT,
152 "mmc0-slot-power");
153 if (ret)
154 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
155 mx23_add_mxs_mmc(0, &mx23evk_mmc_pdata);
156
113 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); 157 ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
114 if (ret) 158 if (ret)
115 pr_warn("failed to request gpio lcd-enable: %d\n", ret); 159 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 08002d02267a..bb329b9a2608 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -34,6 +34,11 @@
34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) 34#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
35#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) 35#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
36 36
37#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
38#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
39#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
40#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
41
37static const iomux_cfg_t mx28evk_pads[] __initconst = { 42static const iomux_cfg_t mx28evk_pads[] __initconst = {
38 /* duart */ 43 /* duart */
39 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, 44 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
@@ -115,6 +120,65 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = {
115 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, 120 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
116 /* backlight control */ 121 /* backlight control */
117 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, 122 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
123 /* mmc0 */
124 MX28_PAD_SSP0_DATA0__SSP0_D0 |
125 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
126 MX28_PAD_SSP0_DATA1__SSP0_D1 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA2__SSP0_D2 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA3__SSP0_D3 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA4__SSP0_D4 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA5__SSP0_D5 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA6__SSP0_D6 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA7__SSP0_D7 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_CMD__SSP0_CMD |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
144 MX28_PAD_SSP0_SCK__SSP0_SCK |
145 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
146 /* write protect */
147 MX28_PAD_SSP1_SCK__GPIO_2_12 |
148 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
149 /* slot power enable */
150 MX28_PAD_PWM3__GPIO_3_28 |
151 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
152
153 /* mmc1 */
154 MX28_PAD_GPMI_D00__SSP1_D0 |
155 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
156 MX28_PAD_GPMI_D01__SSP1_D1 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D02__SSP1_D2 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D03__SSP1_D3 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D04__SSP1_D4 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D05__SSP1_D5 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D06__SSP1_D6 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D07__SSP1_D7 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_RDY1__SSP1_CMD |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
174 MX28_PAD_GPMI_WRN__SSP1_SCK |
175 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
176 /* write protect */
177 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
178 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
179 /* slot power enable */
180 MX28_PAD_PWM4__GPIO_3_29 |
181 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
118}; 182};
119 183
120/* fec */ 184/* fec */
@@ -258,6 +322,18 @@ static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
258 .ld_intf_width = STMLCDIF_24BIT, 322 .ld_intf_width = STMLCDIF_24BIT,
259}; 323};
260 324
325static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
326 {
327 /* mmc0 */
328 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
329 .flags = SLOTF_8_BIT_CAPABLE,
330 }, {
331 /* mmc1 */
332 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
333 .flags = SLOTF_8_BIT_CAPABLE,
334 },
335};
336
261static void __init mx28evk_init(void) 337static void __init mx28evk_init(void)
262{ 338{
263 int ret; 339 int ret;
@@ -297,6 +373,19 @@ static void __init mx28evk_init(void)
297 gpio_set_value(MX28EVK_BL_ENABLE, 1); 373 gpio_set_value(MX28EVK_BL_ENABLE, 1);
298 374
299 mx28_add_mxsfb(&mx28evk_mxsfb_pdata); 375 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
376
377 /* power on mmc slot by writing 0 to the gpio */
378 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT,
379 "mmc0-slot-power");
380 if (ret)
381 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
382 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
383
384 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_DIR_OUT,
385 "mmc1-slot-power");
386 if (ret)
387 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
388 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
300} 389}
301 390
302static void __init mx28evk_timer_init(void) 391static void __init mx28evk_timer_init(void)
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index fa0b154da67b..0fcff47009cf 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -45,7 +45,7 @@ static const iomux_cfg_t tx28_fec_gpio_pads[] __initconst = {
45}; 45};
46 46
47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3) 47#define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3)
48static const iomux_cfg_t tx28_fec_pads[] __initconst = { 48static const iomux_cfg_t tx28_fec0_pads[] __initconst = {
49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE, 49 MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE,
50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE, 50 MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE,
51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE, 51 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE,
@@ -57,7 +57,20 @@ static const iomux_cfg_t tx28_fec_pads[] __initconst = {
57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE, 57 MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE,
58}; 58};
59 59
60static const struct fec_platform_data tx28_fec_data __initconst = { 60static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
61 MX28_PAD_ENET0_RXD2__ENET1_RXD0,
62 MX28_PAD_ENET0_RXD3__ENET1_RXD1,
63 MX28_PAD_ENET0_TXD2__ENET1_TXD0,
64 MX28_PAD_ENET0_TXD3__ENET1_TXD1,
65 MX28_PAD_ENET0_COL__ENET1_TX_EN,
66 MX28_PAD_ENET0_CRS__ENET1_RX_EN,
67};
68
69static struct fec_platform_data tx28_fec0_data = {
70 .phy = PHY_INTERFACE_MODE_RMII,
71};
72
73static struct fec_platform_data tx28_fec1_data = {
61 .phy = PHY_INTERFACE_MODE_RMII, 74 .phy = PHY_INTERFACE_MODE_RMII,
62}; 75};
63 76
@@ -108,15 +121,15 @@ int __init tx28_add_fec0(void)
108 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__); 121 pr_debug("%s: Deasserting FEC PHY RESET\n", __func__);
109 gpio_set_value(TX28_FEC_PHY_RESET, 1); 122 gpio_set_value(TX28_FEC_PHY_RESET, 1);
110 123
111 ret = mxs_iomux_setup_multiple_pads(tx28_fec_pads, 124 ret = mxs_iomux_setup_multiple_pads(tx28_fec0_pads,
112 ARRAY_SIZE(tx28_fec_pads)); 125 ARRAY_SIZE(tx28_fec0_pads));
113 if (ret) { 126 if (ret) {
114 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n", 127 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
115 __func__, ret); 128 __func__, ret);
116 goto free_gpios; 129 goto free_gpios;
117 } 130 }
118 pr_debug("%s: Registering FEC device\n", __func__); 131 pr_debug("%s: Registering FEC0 device\n", __func__);
119 mx28_add_fec(0, &tx28_fec_data); 132 mx28_add_fec(0, &tx28_fec0_data);
120 return 0; 133 return 0;
121 134
122free_gpios: 135free_gpios:
@@ -129,3 +142,19 @@ free_gpios:
129 142
130 return ret; 143 return ret;
131} 144}
145
146int __init tx28_add_fec1(void)
147{
148 int ret;
149
150 ret = mxs_iomux_setup_multiple_pads(tx28_fec1_pads,
151 ARRAY_SIZE(tx28_fec1_pads));
152 if (ret) {
153 pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n",
154 __func__, ret);
155 return ret;
156 }
157 pr_debug("%s: Registering FEC1 device\n", __func__);
158 mx28_add_fec(1, &tx28_fec1_data);
159 return 0;
160}
diff --git a/arch/arm/mach-mxs/module-tx28.h b/arch/arm/mach-mxs/module-tx28.h
index df9e1b6e81bf..8ed425457d30 100644
--- a/arch/arm/mach-mxs/module-tx28.h
+++ b/arch/arm/mach-mxs/module-tx28.h
@@ -7,3 +7,4 @@
7 * Free Software Foundation. 7 * Free Software Foundation.
8 */ 8 */
9int __init tx28_add_fec0(void); 9int __init tx28_add_fec0(void);
10int __init tx28_add_fec1(void);
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index 927d5a181760..c1c5fb6a5b4c 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -79,7 +79,7 @@
79 79
80 80
81/* 81/*
82 * Register useage 82 * Register usage
83 * r8 - temporary 83 * r8 - temporary
84 * r9 - the driver buffer 84 * r9 - the driver buffer
85 * r10 - temporary 85 * r10 - temporary
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index d41fe2d0616a..0ad781db4e66 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -399,7 +399,7 @@ static void __init omap_sx1_init(void)
399 sx1_mmc_init(); 399 sx1_mmc_init();
400 400
401 /* turn on USB power */ 401 /* turn on USB power */
402 /* sx1_setusbpower(1); cant do it here because i2c is not ready */ 402 /* sx1_setusbpower(1); can't do it here because i2c is not ready */
403 gpio_request(1, "A_IRDA_OFF"); 403 gpio_request(1, "A_IRDA_OFF");
404 gpio_request(11, "A_SWITCH"); 404 gpio_request(11, "A_SWITCH");
405 gpio_request(15, "A_USB_ON"); 405 gpio_request(15, "A_USB_ON");
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index b0f4c231595f..36f26c3fa25e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -281,7 +281,7 @@ static inline void omap_init_audio(void) {}
281 * Claiming GPIOs, and setting their direction and initial values, is the 281 * Claiming GPIOs, and setting their direction and initial values, is the
282 * responsibility of the device drivers. So is responding to probe(). 282 * responsibility of the device drivers. So is responding to probe().
283 * 283 *
284 * Board-specific knowlege like creating devices or pin setup is to be 284 * Board-specific knowledge like creating devices or pin setup is to be
285 * kept out of drivers as much as possible. In particular, pin setup 285 * kept out of drivers as much as possible. In particular, pin setup
286 * may be handled by the boot loader, and drivers should expect it will 286 * may be handled by the boot loader, and drivers should expect it will
287 * normally have been done by the time they're probed. 287 * normally have been done by the time they're probed.
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
index 7a2df29400ca..23eed0035ed8 100644
--- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
+++ b/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
@@ -31,7 +31,7 @@
31#endif 31#endif
32 32
33/* 33/*
34 * These are the offsets from the begining of the fiq_buffer. They are put here 34 * These are the offsets from the beginning of the fiq_buffer. They are put here
35 * since the buffer and header need to be accessed by drivers servicing devices 35 * since the buffer and header need to be accessed by drivers servicing devices
36 * which generate GPIO interrupts - e.g. keyboard, modem, hook switch. 36 * which generate GPIO interrupts - e.g. keyboard, modem, hook switch.
37 */ 37 */
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 5f8a2fd06337..34cf982b9679 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -696,7 +696,7 @@ static void __init igep2_init(void)
696 igep2_init_smsc911x(); 696 igep2_init_smsc911x();
697 697
698 /* 698 /*
699 * WLAN-BT combo module from MuRata wich has a Marvell WLAN 699 * WLAN-BT combo module from MuRata which has a Marvell WLAN
700 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. 700 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
701 */ 701 */
702 igep2_wlan_bt_init(); 702 igep2_wlan_bt_init();
diff --git a/arch/arm/mach-omap2/board-igep0030.c b/arch/arm/mach-omap2/board-igep0030.c
index b10db0e6ee62..2cf86c3cb1a3 100644
--- a/arch/arm/mach-omap2/board-igep0030.c
+++ b/arch/arm/mach-omap2/board-igep0030.c
@@ -440,7 +440,7 @@ static void __init igep3_init(void)
440 igep3_leds_init(); 440 igep3_leds_init();
441 441
442 /* 442 /*
443 * WLAN-BT combo module from MuRata wich has a Marvell WLAN 443 * WLAN-BT combo module from MuRata which has a Marvell WLAN
444 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. 444 * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
445 */ 445 */
446 igep3_wifi_bt_init(); 446 igep3_wifi_bt_init();
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index ab878545bd9b..6cb6c03293df 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -258,7 +258,7 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm,
258 * clkdm_init - set up the clockdomain layer 258 * clkdm_init - set up the clockdomain layer
259 * @clkdms: optional pointer to an array of clockdomains to register 259 * @clkdms: optional pointer to an array of clockdomains to register
260 * @init_autodeps: optional pointer to an array of autodeps to register 260 * @init_autodeps: optional pointer to an array of autodeps to register
261 * @custom_funcs: func pointers for arch specfic implementations 261 * @custom_funcs: func pointers for arch specific implementations
262 * 262 *
263 * Set up internal state. If a pointer to an array of clockdomains 263 * Set up internal state. If a pointer to an array of clockdomains
264 * @clkdms was supplied, loop through the list of clockdomains, 264 * @clkdms was supplied, loop through the list of clockdomains,
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 85b3dce65640..5823584d9cd7 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -125,7 +125,7 @@ struct clockdomain {
125}; 125};
126 126
127/** 127/**
128 * struct clkdm_ops - Arch specfic function implementations 128 * struct clkdm_ops - Arch specific function implementations
129 * @clkdm_add_wkdep: Add a wakeup dependency between clk domains 129 * @clkdm_add_wkdep: Add a wakeup dependency between clk domains
130 * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains 130 * @clkdm_del_wkdep: Delete a wakeup dependency between clk domains
131 * @clkdm_read_wkdep: Read wakeup dependency state between clk domains 131 * @clkdm_read_wkdep: Read wakeup dependency state between clk domains
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index a44c52303405..1c240eff3918 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -297,8 +297,8 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
297 297
298/** 298/**
299 * omap3_cpuidle_update_states() - Update the cpuidle states 299 * omap3_cpuidle_update_states() - Update the cpuidle states
300 * @mpu_deepest_state: Enable states upto and including this for mpu domain 300 * @mpu_deepest_state: Enable states up to and including this for mpu domain
301 * @core_deepest_state: Enable states upto and including this for core domain 301 * @core_deepest_state: Enable states up to and including this for core domain
302 * 302 *
303 * This goes through the list of states available and enables and disables the 303 * This goes through the list of states available and enables and disables the
304 * validity of C states based on deepest state that can be achieved for the 304 * validity of C states based on deepest state that can be achieved for the
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 84d1b735fe80..7b8558564591 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -253,7 +253,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
253 ARRAY_SIZE(omap_keyboard_latency), 0); 253 ARRAY_SIZE(omap_keyboard_latency), 0);
254 254
255 if (IS_ERR(od)) { 255 if (IS_ERR(od)) {
256 WARN(1, "Cant build omap_device for %s:%s.\n", 256 WARN(1, "Can't build omap_device for %s:%s.\n",
257 name, oh->name); 257 name, oh->name);
258 return PTR_ERR(od); 258 return PTR_ERR(od);
259 } 259 }
@@ -373,7 +373,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
373 od = omap_device_build(name, spi_num, oh, pdata, 373 od = omap_device_build(name, spi_num, oh, pdata,
374 sizeof(*pdata), omap_mcspi_latency, 374 sizeof(*pdata), omap_mcspi_latency,
375 ARRAY_SIZE(omap_mcspi_latency), 0); 375 ARRAY_SIZE(omap_mcspi_latency), 0);
376 WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", 376 WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
377 name, oh->name); 377 name, oh->name);
378 kfree(pdata); 378 kfree(pdata);
379 return 0; 379 return 0;
@@ -725,7 +725,7 @@ static int __init omap_init_wdt(void)
725 od = omap_device_build(dev_name, id, oh, NULL, 0, 725 od = omap_device_build(dev_name, id, oh, NULL, 0,
726 omap_wdt_latency, 726 omap_wdt_latency,
727 ARRAY_SIZE(omap_wdt_latency), 0); 727 ARRAY_SIZE(omap_wdt_latency), 0);
728 WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", 728 WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
729 dev_name, oh->name); 729 dev_name, oh->name);
730 return 0; 730 return 0;
731} 731}
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 34922b2d2e3f..c9ff0e79703d 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -262,7 +262,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); 262 omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0);
263 kfree(p); 263 kfree(p);
264 if (IS_ERR(od)) { 264 if (IS_ERR(od)) {
265 pr_err("%s: Cant build omap_device for %s:%s.\n", 265 pr_err("%s: Can't build omap_device for %s:%s.\n",
266 __func__, name, oh->name); 266 __func__, name, oh->name);
267 return PTR_ERR(od); 267 return PTR_ERR(od);
268 } 268 }
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 413de18c1d2b..9529842ae054 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -82,7 +82,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
82 kfree(pdata); 82 kfree(pdata);
83 83
84 if (IS_ERR(od)) { 84 if (IS_ERR(od)) {
85 WARN(1, "Cant build omap_device for %s:%s.\n", 85 WARN(1, "Can't build omap_device for %s:%s.\n",
86 name, oh->name); 86 name, oh->name);
87 return PTR_ERR(od); 87 return PTR_ERR(od);
88 } 88 }
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 137e1a5f3d85..b2f30bed5a20 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -465,7 +465,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
465 od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, 465 od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data,
466 sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); 466 sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false);
467 if (IS_ERR(od)) { 467 if (IS_ERR(od)) {
468 WARN(1, "Cant build omap_device for %s:%s.\n", name, oh->name); 468 WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name);
469 kfree(mmc_data->slots[0].name); 469 kfree(mmc_data->slots[0].name);
470 goto done; 470 goto done;
471 } 471 }
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 565b9064a328..4a6ef6ab8458 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -149,7 +149,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
149 ARRAY_SIZE(omap2_mcbsp_latency), false); 149 ARRAY_SIZE(omap2_mcbsp_latency), false);
150 kfree(pdata); 150 kfree(pdata);
151 if (IS_ERR(od)) { 151 if (IS_ERR(od)) {
152 pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, 152 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
153 name, oh->name); 153 name, oh->name);
154 return PTR_ERR(od); 154 return PTR_ERR(od);
155 } 155 }
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index bb043cbb3886..a4ab1e364313 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -518,7 +518,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
518 seq_printf(s, "/* %s */\n", m->muxnames[mode]); 518 seq_printf(s, "/* %s */\n", m->muxnames[mode]);
519 519
520 /* 520 /*
521 * XXX: Might be revisited to support differences accross 521 * XXX: Might be revisited to support differences across
522 * same OMAP generation. 522 * same OMAP generation.
523 */ 523 */
524 seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); 524 seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def);
diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h
index adbea0d03e08..9fd93149ebd9 100644
--- a/arch/arm/mach-omap2/mux2430.h
+++ b/arch/arm/mach-omap2/mux2430.h
@@ -22,7 +22,7 @@
22 * absolute addresses. The name in the macro is the mode-0 name of 22 * absolute addresses. The name in the macro is the mode-0 name of
23 * the pin. NOTE: These registers are 8-bits wide. 23 * the pin. NOTE: These registers are 8-bits wide.
24 * 24 *
25 * Note that these defines use SDMMC instead of MMC for compability 25 * Note that these defines use SDMMC instead of MMC for compatibility
26 * with signal names used in 3630. 26 * with signal names used in 3630.
27 */ 27 */
28#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000 28#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index a860fb5024c2..e6e3810db77f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1559,7 +1559,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1559 * I2CHS IP's do not follow the usual pattern. 1559 * I2CHS IP's do not follow the usual pattern.
1560 * prcm_reg_id alone cannot be used to program 1560 * prcm_reg_id alone cannot be used to program
1561 * the iclk and fclk. Needs to be handled using 1561 * the iclk and fclk. Needs to be handled using
1562 * additonal flags when clk handling is moved 1562 * additional flags when clk handling is moved
1563 * to hwmod framework. 1563 * to hwmod framework.
1564 */ 1564 */
1565 .module_offs = CORE_MOD, 1565 .module_offs = CORE_MOD,
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index e2e605fe9138..05f6abc96b0d 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -112,12 +112,12 @@ int omap4430_phy_power(struct device *dev, int ID, int on)
112 else 112 else
113 /* 113 /*
114 * Enable VBUS Valid, AValid and IDDIG 114 * Enable VBUS Valid, AValid and IDDIG
115 * high impedence 115 * high impedance
116 */ 116 */
117 __raw_writel(IDDIG | AVALID | VBUSVALID, 117 __raw_writel(IDDIG | AVALID | VBUSVALID,
118 ctrl_base + USBOTGHS_CONTROL); 118 ctrl_base + USBOTGHS_CONTROL);
119 } else { 119 } else {
120 /* Enable session END and IDIG to high impedence. */ 120 /* Enable session END and IDIG to high impedance. */
121 __raw_writel(SESSEND | IDDIG, ctrl_base + 121 __raw_writel(SESSEND | IDDIG, ctrl_base +
122 USBOTGHS_CONTROL); 122 USBOTGHS_CONTROL);
123 } 123 }
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 0a8e74e3e811..07d6140baa9d 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -308,7 +308,7 @@ int __init omap3_twl_init(void)
308 * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages, 308 * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages,
309 * in those scenarios this bit is to be cleared (enable = false). 309 * in those scenarios this bit is to be cleared (enable = false).
310 * 310 *
311 * Returns 0 on sucess, error is returned if I2C read/write fails. 311 * Returns 0 on success, error is returned if I2C read/write fails.
312 */ 312 */
313int __init omap3_twl_set_sr_bit(bool enable) 313int __init omap3_twl_set_sr_bit(bool enable)
314{ 314{
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 49c6513e90d8..9af08473bf10 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -196,7 +196,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
196/** 196/**
197 * pwrdm_init - set up the powerdomain layer 197 * pwrdm_init - set up the powerdomain layer
198 * @pwrdm_list: array of struct powerdomain pointers to register 198 * @pwrdm_list: array of struct powerdomain pointers to register
199 * @custom_funcs: func pointers for arch specfic implementations 199 * @custom_funcs: func pointers for arch specific implementations
200 * 200 *
201 * Loop through the array of powerdomains @pwrdm_list, registering all 201 * Loop through the array of powerdomains @pwrdm_list, registering all
202 * that are available on the current CPU. If pwrdm_list is supplied 202 * that are available on the current CPU. If pwrdm_list is supplied
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 027f40bd235d..d23d979b9c34 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -121,7 +121,7 @@ struct powerdomain {
121}; 121};
122 122
123/** 123/**
124 * struct pwrdm_ops - Arch specfic function implementations 124 * struct pwrdm_ops - Arch specific function implementations
125 * @pwrdm_set_next_pwrst: Set the target power state for a pd 125 * @pwrdm_set_next_pwrst: Set the target power state for a pd
126 * @pwrdm_read_next_pwrst: Read the target power state set for a pd 126 * @pwrdm_read_next_pwrst: Read the target power state set for a pd
127 * @pwrdm_read_pwrst: Read the current power state of a pd 127 * @pwrdm_read_pwrst: Read the current power state of a pd
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 9c9c113788b9..469a920a74dc 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -72,7 +72,7 @@ static struct powerdomain mpu_3xxx_pwrdm = {
72 72
73/* 73/*
74 * The USBTLL Save-and-Restore mechanism is broken on 74 * The USBTLL Save-and-Restore mechanism is broken on
75 * 3430s upto ES3.0 and 3630ES1.0. Hence this feature 75 * 3430s up to ES3.0 and 3630ES1.0. Hence this feature
76 * needs to be disabled on these chips. 76 * needs to be disabled on these chips.
77 * Refer: 3430 errata ID i459 and 3630 errata ID i579 77 * Refer: 3430 errata ID i459 and 3630 errata ID i579
78 * 78 *
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 8f674c9442bf..13e24f913dd4 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
247 * driver register and sr device intializtion API's. Only one call 247 * driver register and sr device intializtion API's. Only one call
248 * will ultimately succeed. 248 * will ultimately succeed.
249 * 249 *
250 * Currenly this function registers interrrupt handler for a particular SR 250 * Currently this function registers interrrupt handler for a particular SR
251 * if smartreflex class driver is already registered and has 251 * if smartreflex class driver is already registered and has
252 * requested for interrupts and the SR interrupt line in present. 252 * requested for interrupts and the SR interrupt line in present.
253 */ 253 */
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index c6facf7becf8..6fb520999b6e 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -851,7 +851,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
851 * @voltdm: pointer to the VDD whose voltage is to be reset. 851 * @voltdm: pointer to the VDD whose voltage is to be reset.
852 * 852 *
853 * This API finds out the correct voltage the voltage domain is supposed 853 * This API finds out the correct voltage the voltage domain is supposed
854 * to be at and resets the voltage to that level. Should be used expecially 854 * to be at and resets the voltage to that level. Should be used especially
855 * while disabling any voltage compensation modules. 855 * while disabling any voltage compensation modules.
856 */ 856 */
857void omap_voltage_reset(struct voltagedomain *voltdm) 857void omap_voltage_reset(struct voltagedomain *voltdm)
@@ -912,7 +912,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm,
912 * This API searches only through the non-compensated voltages int the 912 * This API searches only through the non-compensated voltages int the
913 * voltage table. 913 * voltage table.
914 * Returns pointer to the voltage table entry corresponding to volt on 914 * Returns pointer to the voltage table entry corresponding to volt on
915 * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage 915 * success. Returns -ENODATA if no voltage table exisits for the passed voltage
916 * domain or if there is no matching entry. 916 * domain or if there is no matching entry.
917 */ 917 */
918struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, 918struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 1a5d6a0e2602..5ceafdccc456 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -19,7 +19,7 @@
19#include "common.h" 19#include "common.h"
20 20
21/* 21/*
22 * The Orion has fully programable address map. There's a separate address 22 * The Orion has fully programmable address map. There's a separate address
23 * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, 23 * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB,
24 * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own 24 * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own
25 * address decode windows that allow it to access any of the Orion resources. 25 * address decode windows that allow it to access any of the Orion resources.
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 429ecafe9fdd..a5930f83958b 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -190,7 +190,7 @@ err_free_1:
190 * The power front LEDs (blue and red) and SATA red LEDs are controlled via a 190 * The power front LEDs (blue and red) and SATA red LEDs are controlled via a
191 * single GPIO line and are compatible with the leds-gpio driver. 191 * single GPIO line and are compatible with the leds-gpio driver.
192 * 192 *
193 * The SATA blue LEDs have some hardware blink capabilities which are detailled 193 * The SATA blue LEDs have some hardware blink capabilities which are detailed
194 * in the following array: 194 * in the following array:
195 * 195 *
196 * SATAx blue LED | SATAx activity | LED state 196 * SATAx blue LED | SATAx activity | LED state
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index f0f43e13ac87..e6d64494d3de 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -36,7 +36,7 @@
36 36
37/**************************************************************************** 37/****************************************************************************
38 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the 38 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the
39 * partitions on the device because we want to keep compatability with 39 * partitions on the device because we want to keep compatibility with
40 * existing QNAP firmware. 40 * existing QNAP firmware.
41 * 41 *
42 * Layout as used by QNAP: 42 * Layout as used by QNAP:
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 92f393f08fa4..9eac8192d923 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -56,7 +56,7 @@
56 56
57/**************************************************************************** 57/****************************************************************************
58 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the 58 * 8MiB NOR flash. The struct mtd_partition is not in the same order as the
59 * partitions on the device because we want to keep compatability with 59 * partitions on the device because we want to keep compatibility with
60 * existing QNAP firmware. 60 * existing QNAP firmware.
61 * 61 *
62 * Layout as used by QNAP: 62 * Layout as used by QNAP:
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 8554707d20a9..edb1dd2d1611 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -402,7 +402,7 @@ static void ts78xx_fpga_supports(void)
402 /* enable devices if magic matches */ 402 /* enable devices if magic matches */
403 switch ((ts78xx_fpga.id >> 8) & 0xffffff) { 403 switch ((ts78xx_fpga.id >> 8) & 0xffffff) {
404 case TS7800_FPGA_MAGIC: 404 case TS7800_FPGA_MAGIC:
405 printk(KERN_WARNING "TS-7800 FPGA: unrecognized revision 0x%.2x\n", 405 pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n",
406 ts78xx_fpga.id & 0xff); 406 ts78xx_fpga.id & 0xff);
407 ts78xx_fpga.supports.ts_rtc.present = 1; 407 ts78xx_fpga.supports.ts_rtc.present = 1;
408 ts78xx_fpga.supports.ts_nand.present = 1; 408 ts78xx_fpga.supports.ts_nand.present = 1;
@@ -423,7 +423,7 @@ static int ts78xx_fpga_load_devices(void)
423 if (ts78xx_fpga.supports.ts_rtc.present == 1) { 423 if (ts78xx_fpga.supports.ts_rtc.present == 1) {
424 tmp = ts78xx_ts_rtc_load(); 424 tmp = ts78xx_ts_rtc_load();
425 if (tmp) { 425 if (tmp) {
426 printk(KERN_INFO "TS-78xx: RTC not registered\n"); 426 pr_info("TS-78xx: RTC not registered\n");
427 ts78xx_fpga.supports.ts_rtc.present = 0; 427 ts78xx_fpga.supports.ts_rtc.present = 0;
428 } 428 }
429 ret |= tmp; 429 ret |= tmp;
@@ -431,7 +431,7 @@ static int ts78xx_fpga_load_devices(void)
431 if (ts78xx_fpga.supports.ts_nand.present == 1) { 431 if (ts78xx_fpga.supports.ts_nand.present == 1) {
432 tmp = ts78xx_ts_nand_load(); 432 tmp = ts78xx_ts_nand_load();
433 if (tmp) { 433 if (tmp) {
434 printk(KERN_INFO "TS-78xx: NAND not registered\n"); 434 pr_info("TS-78xx: NAND not registered\n");
435 ts78xx_fpga.supports.ts_nand.present = 0; 435 ts78xx_fpga.supports.ts_nand.present = 0;
436 } 436 }
437 ret |= tmp; 437 ret |= tmp;
@@ -439,7 +439,7 @@ static int ts78xx_fpga_load_devices(void)
439 if (ts78xx_fpga.supports.ts_rng.present == 1) { 439 if (ts78xx_fpga.supports.ts_rng.present == 1) {
440 tmp = ts78xx_ts_rng_load(); 440 tmp = ts78xx_ts_rng_load();
441 if (tmp) { 441 if (tmp) {
442 printk(KERN_INFO "TS-78xx: RNG not registered\n"); 442 pr_info("TS-78xx: RNG not registered\n");
443 ts78xx_fpga.supports.ts_rng.present = 0; 443 ts78xx_fpga.supports.ts_rng.present = 0;
444 } 444 }
445 ret |= tmp; 445 ret |= tmp;
@@ -466,7 +466,7 @@ static int ts78xx_fpga_load(void)
466{ 466{
467 ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE); 467 ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
468 468
469 printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", 469 pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",
470 (ts78xx_fpga.id >> 8) & 0xffffff, 470 (ts78xx_fpga.id >> 8) & 0xffffff,
471 ts78xx_fpga.id & 0xff); 471 ts78xx_fpga.id & 0xff);
472 472
@@ -494,7 +494,7 @@ static int ts78xx_fpga_unload(void)
494 * UrJTAG SVN since r1381 can be used to reprogram the FPGA 494 * UrJTAG SVN since r1381 can be used to reprogram the FPGA
495 */ 495 */
496 if (ts78xx_fpga.id != fpga_id) { 496 if (ts78xx_fpga.id != fpga_id) {
497 printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n" 497 pr_err("TS-78xx FPGA: magic/rev mismatch\n"
498 "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n", 498 "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
499 (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff, 499 (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
500 (fpga_id >> 8) & 0xffffff, fpga_id & 0xff); 500 (fpga_id >> 8) & 0xffffff, fpga_id & 0xff);
@@ -525,7 +525,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
525 int value, ret; 525 int value, ret;
526 526
527 if (ts78xx_fpga.state < 0) { 527 if (ts78xx_fpga.state < 0) {
528 printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n"); 528 pr_err("TS-78xx FPGA: borked, you must powercycle asap\n");
529 return -EBUSY; 529 return -EBUSY;
530 } 530 }
531 531
@@ -534,7 +534,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
534 else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0) 534 else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)
535 value = 0; 535 value = 0;
536 else { 536 else {
537 printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n"); 537 pr_err("ts78xx_fpga_store: Invalid value\n");
538 return -EINVAL; 538 return -EINVAL;
539 } 539 }
540 540
@@ -616,7 +616,7 @@ static void __init ts78xx_init(void)
616 ret = ts78xx_fpga_load(); 616 ret = ts78xx_fpga_load();
617 ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr); 617 ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr);
618 if (ret) 618 if (ret)
619 printk(KERN_ERR "sysfs_create_file failed: %d\n", ret); 619 pr_err("sysfs_create_file failed: %d\n", ret);
620} 620}
621 621
622MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") 622MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 3499fada73ae..4cb069fd9af2 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -128,8 +128,8 @@ static int am200_init_gpio_regs(struct metronomefb_par *par)
128 return 0; 128 return 0;
129 129
130err_req_gpio: 130err_req_gpio:
131 while (i > 0) 131 while (--i >= 0)
132 gpio_free(gpios[i--]); 132 gpio_free(gpios[i]);
133 133
134 return err; 134 return err;
135} 135}
@@ -194,7 +194,7 @@ static struct notifier_block am200_fb_notif = {
194}; 194};
195 195
196/* this gets called as part of our init. these steps must be done now so 196/* this gets called as part of our init. these steps must be done now so
197 * that we can use set_pxa_fb_info */ 197 * that we can use pxa_set_fb_info */
198static void __init am200_presetup_fb(void) 198static void __init am200_presetup_fb(void)
199{ 199{
200 int fw; 200 int fw;
@@ -249,7 +249,7 @@ static void __init am200_presetup_fb(void)
249 /* we divide since we told the LCD controller we're 16bpp */ 249 /* we divide since we told the LCD controller we're 16bpp */
250 am200_fb_info.modes->xres /= 2; 250 am200_fb_info.modes->xres /= 2;
251 251
252 set_pxa_fb_info(&am200_fb_info); 252 pxa_set_fb_info(NULL, &am200_fb_info);
253 253
254} 254}
255 255
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index 993d75e66390..fa8bad235d9f 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -125,10 +125,7 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
125 if (err) { 125 if (err) {
126 dev_err(&am300_device->dev, "failed requesting " 126 dev_err(&am300_device->dev, "failed requesting "
127 "gpio %d, err=%d\n", i, err); 127 "gpio %d, err=%d\n", i, err);
128 while (i >= DB0_GPIO_PIN) 128 goto err_req_gpio2;
129 gpio_free(i--);
130 i = ARRAY_SIZE(gpios) - 1;
131 goto err_req_gpio;
132 } 129 }
133 } 130 }
134 131
@@ -159,9 +156,13 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par)
159 156
160 return 0; 157 return 0;
161 158
159err_req_gpio2:
160 while (--i >= DB0_GPIO_PIN)
161 gpio_free(i);
162 i = ARRAY_SIZE(gpios);
162err_req_gpio: 163err_req_gpio:
163 while (i > 0) 164 while (--i >= 0)
164 gpio_free(gpios[i--]); 165 gpio_free(gpios[i]);
165 166
166 return err; 167 return err;
167} 168}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 38dea05df7f8..bfbecec6d05f 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -263,7 +263,7 @@ static void __init balloon3_lcd_init(void)
263 } 263 }
264 264
265 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; 265 balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
266 set_pxa_fb_info(&balloon3_lcd_screen); 266 pxa_set_fb_info(NULL, &balloon3_lcd_screen);
267 return; 267 return;
268 268
269err2: 269err2:
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index b734d8468168..8225e2e58c6e 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -379,7 +379,7 @@ __setup("monitor=", cmx2xx_set_display);
379 379
380static void __init cmx2xx_init_display(void) 380static void __init cmx2xx_init_display(void)
381{ 381{
382 set_pxa_fb_info(cmx2xx_display); 382 pxa_set_fb_info(NULL, cmx2xx_display);
383} 383}
384#else 384#else
385static inline void cmx2xx_init_display(void) {} 385static inline void cmx2xx_init_display(void) {}
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 06d0a03f462d..b2248e76ec8b 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -296,7 +296,7 @@ static struct pxafb_mach_info cm_x300_lcd = {
296 296
297static void __init cm_x300_init_lcd(void) 297static void __init cm_x300_init_lcd(void)
298{ 298{
299 set_pxa_fb_info(&cm_x300_lcd); 299 pxa_set_fb_info(NULL, &cm_x300_lcd);
300} 300}
301#else 301#else
302static inline void cm_x300_init_lcd(void) {} 302static inline void cm_x300_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index ee797397dc5b..44c1b77ece67 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -175,7 +175,7 @@ static struct pxafb_mach_info income_lcd_screen = {
175 175
176static void __init income_lcd_init(void) 176static void __init income_lcd_init(void)
177{ 177{
178 set_pxa_fb_info(&income_lcd_screen); 178 pxa_set_fb_info(NULL, &income_lcd_screen);
179} 179}
180#else 180#else
181static inline void income_lcd_init(void) {} 181static inline void income_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 96b2d9fbfef0..3f9be419959d 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -105,7 +105,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
105 lcd_bl_pin = bl_pin; 105 lcd_bl_pin = bl_pin;
106 gpio_request(bl_pin, "lcd backlight"); 106 gpio_request(bl_pin, "lcd backlight");
107 gpio_direction_output(bl_pin, 0); 107 gpio_direction_output(bl_pin, 0);
108 set_pxa_fb_info(&sharp_lq43_info); 108 pxa_set_fb_info(NULL, &sharp_lq43_info);
109} 109}
110#endif 110#endif
111 111
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index d4e705caefea..3a5507e31919 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -462,7 +462,6 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
462 * USB Device Controller 462 * USB Device Controller
463 */ 463 */
464static struct pxa2xx_udc_mach_info udc_info __initdata = { 464static struct pxa2xx_udc_mach_info udc_info __initdata = {
465 .gpio_vbus = -1,
466 /* no connect GPIO; corgi can't tell connection status */ 465 /* no connect GPIO; corgi can't tell connection status */
467 .gpio_pullup = CORGI_GPIO_USB_PULLUP, 466 .gpio_pullup = CORGI_GPIO_USB_PULLUP,
468}; 467};
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index c4bf08b3eb61..2e0425404de5 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -90,7 +90,6 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
90 90
91static struct pxa2xx_udc_mach_info pxa_udc_info = { 91static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1, 92 .gpio_pullup = -1,
93 .gpio_vbus = -1,
94}; 93};
95 94
96void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
@@ -188,16 +187,12 @@ struct platform_device pxa_device_fb = {
188 .resource = pxafb_resources, 187 .resource = pxafb_resources,
189}; 188};
190 189
191void __init set_pxa_fb_info(struct pxafb_mach_info *info) 190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192{ 191{
192 pxa_device_fb.dev.parent = parent;
193 pxa_register_device(&pxa_device_fb, info); 193 pxa_register_device(&pxa_device_fb, info);
194} 194}
195 195
196void __init set_pxa_fb_parent(struct device *parent_dev)
197{
198 pxa_device_fb.dev.parent = parent_dev;
199}
200
201static struct resource pxa_resource_ffuart[] = { 196static struct resource pxa_resource_ffuart[] = {
202 { 197 {
203 .start = 0x40100000, 198 .start = 0x40100000,
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index b411d7cbf5a1..f8a6e9d79a3a 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -689,7 +689,7 @@ static struct pxafb_mach_info em_x270_lcd = {
689 689
690static void __init em_x270_init_lcd(void) 690static void __init em_x270_init_lcd(void)
691{ 691{
692 set_pxa_fb_info(&em_x270_lcd); 692 pxa_set_fb_info(NULL, &em_x270_lcd);
693} 693}
694#else 694#else
695static inline void em_x270_init_lcd(void) {} 695static inline void em_x270_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index edca0a043293..2e3970fdde0b 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/t7l66xb.h> 20#include <linux/mfd/t7l66xb.h>
21#include <linux/mtd/nand.h> 21#include <linux/mtd/nand.h>
22#include <linux/mtd/partitions.h> 22#include <linux/mtd/partitions.h>
23#include <linux/usb/gpio_vbus.h>
23 24
24#include <video/w100fb.h> 25#include <video/w100fb.h>
25 26
@@ -51,12 +52,20 @@ void __init eseries_fixup(struct machine_desc *desc,
51 mi->bank[0].size = (64*1024*1024); 52 mi->bank[0].size = (64*1024*1024);
52} 53}
53 54
54struct pxa2xx_udc_mach_info e7xx_udc_mach_info = { 55struct gpio_vbus_mach_info e7xx_udc_info = {
55 .gpio_vbus = GPIO_E7XX_USB_DISC, 56 .gpio_vbus = GPIO_E7XX_USB_DISC,
56 .gpio_pullup = GPIO_E7XX_USB_PULLUP, 57 .gpio_pullup = GPIO_E7XX_USB_PULLUP,
57 .gpio_pullup_inverted = 1 58 .gpio_pullup_inverted = 1
58}; 59};
59 60
61static struct platform_device e7xx_gpio_vbus = {
62 .name = "gpio-vbus",
63 .id = -1,
64 .dev = {
65 .platform_data = &e7xx_udc_info,
66 },
67};
68
60struct pxaficp_platform_data e7xx_ficp_platform_data = { 69struct pxaficp_platform_data e7xx_ficp_platform_data = {
61 .gpio_pwdown = GPIO_E7XX_IR_OFF, 70 .gpio_pwdown = GPIO_E7XX_IR_OFF,
62 .transceiver_cap = IR_SIRMODE | IR_OFF, 71 .transceiver_cap = IR_SIRMODE | IR_OFF,
@@ -165,6 +174,7 @@ static struct platform_device e330_tc6387xb_device = {
165 174
166static struct platform_device *e330_devices[] __initdata = { 175static struct platform_device *e330_devices[] __initdata = {
167 &e330_tc6387xb_device, 176 &e330_tc6387xb_device,
177 &e7xx_gpio_vbus,
168}; 178};
169 179
170static void __init e330_init(void) 180static void __init e330_init(void)
@@ -175,7 +185,6 @@ static void __init e330_init(void)
175 eseries_register_clks(); 185 eseries_register_clks();
176 eseries_get_tmio_gpios(); 186 eseries_get_tmio_gpios();
177 platform_add_devices(ARRAY_AND_SIZE(e330_devices)); 187 platform_add_devices(ARRAY_AND_SIZE(e330_devices));
178 pxa_set_udc_info(&e7xx_udc_mach_info);
179} 188}
180 189
181MACHINE_START(E330, "Toshiba e330") 190MACHINE_START(E330, "Toshiba e330")
@@ -214,6 +223,7 @@ static struct platform_device e350_t7l66xb_device = {
214 223
215static struct platform_device *e350_devices[] __initdata = { 224static struct platform_device *e350_devices[] __initdata = {
216 &e350_t7l66xb_device, 225 &e350_t7l66xb_device,
226 &e7xx_gpio_vbus,
217}; 227};
218 228
219static void __init e350_init(void) 229static void __init e350_init(void)
@@ -224,7 +234,6 @@ static void __init e350_init(void)
224 eseries_register_clks(); 234 eseries_register_clks();
225 eseries_get_tmio_gpios(); 235 eseries_get_tmio_gpios();
226 platform_add_devices(ARRAY_AND_SIZE(e350_devices)); 236 platform_add_devices(ARRAY_AND_SIZE(e350_devices));
227 pxa_set_udc_info(&e7xx_udc_mach_info);
228} 237}
229 238
230MACHINE_START(E350, "Toshiba e350") 239MACHINE_START(E350, "Toshiba e350")
@@ -333,6 +342,7 @@ static struct platform_device e400_t7l66xb_device = {
333 342
334static struct platform_device *e400_devices[] __initdata = { 343static struct platform_device *e400_devices[] __initdata = {
335 &e400_t7l66xb_device, 344 &e400_t7l66xb_device,
345 &e7xx_gpio_vbus,
336}; 346};
337 347
338static void __init e400_init(void) 348static void __init e400_init(void)
@@ -344,9 +354,8 @@ static void __init e400_init(void)
344 /* Fixme - e400 may have a switched clock */ 354 /* Fixme - e400 may have a switched clock */
345 eseries_register_clks(); 355 eseries_register_clks();
346 eseries_get_tmio_gpios(); 356 eseries_get_tmio_gpios();
347 set_pxa_fb_info(&e400_pxafb_mach_info); 357 pxa_set_fb_info(NULL, &e400_pxafb_mach_info);
348 platform_add_devices(ARRAY_AND_SIZE(e400_devices)); 358 platform_add_devices(ARRAY_AND_SIZE(e400_devices));
349 pxa_set_udc_info(&e7xx_udc_mach_info);
350} 359}
351 360
352MACHINE_START(E400, "Toshiba e400") 361MACHINE_START(E400, "Toshiba e400")
@@ -519,6 +528,7 @@ static struct platform_device e740_t7l66xb_device = {
519static struct platform_device *e740_devices[] __initdata = { 528static struct platform_device *e740_devices[] __initdata = {
520 &e740_fb_device, 529 &e740_fb_device,
521 &e740_t7l66xb_device, 530 &e740_t7l66xb_device,
531 &e7xx_gpio_vbus,
522}; 532};
523 533
524static void __init e740_init(void) 534static void __init e740_init(void)
@@ -532,7 +542,6 @@ static void __init e740_init(void)
532 "UDCCLK", &pxa25x_device_udc.dev), 542 "UDCCLK", &pxa25x_device_udc.dev),
533 eseries_get_tmio_gpios(); 543 eseries_get_tmio_gpios();
534 platform_add_devices(ARRAY_AND_SIZE(e740_devices)); 544 platform_add_devices(ARRAY_AND_SIZE(e740_devices));
535 pxa_set_udc_info(&e7xx_udc_mach_info);
536 pxa_set_ac97_info(NULL); 545 pxa_set_ac97_info(NULL);
537 pxa_set_ficp_info(&e7xx_ficp_platform_data); 546 pxa_set_ficp_info(&e7xx_ficp_platform_data);
538} 547}
@@ -711,6 +720,7 @@ static struct platform_device e750_tc6393xb_device = {
711static struct platform_device *e750_devices[] __initdata = { 720static struct platform_device *e750_devices[] __initdata = {
712 &e750_fb_device, 721 &e750_fb_device,
713 &e750_tc6393xb_device, 722 &e750_tc6393xb_device,
723 &e7xx_gpio_vbus,
714}; 724};
715 725
716static void __init e750_init(void) 726static void __init e750_init(void)
@@ -723,7 +733,6 @@ static void __init e750_init(void)
723 "GPIO11_CLK", NULL), 733 "GPIO11_CLK", NULL),
724 eseries_get_tmio_gpios(); 734 eseries_get_tmio_gpios();
725 platform_add_devices(ARRAY_AND_SIZE(e750_devices)); 735 platform_add_devices(ARRAY_AND_SIZE(e750_devices));
726 pxa_set_udc_info(&e7xx_udc_mach_info);
727 pxa_set_ac97_info(NULL); 736 pxa_set_ac97_info(NULL);
728 pxa_set_ficp_info(&e7xx_ficp_platform_data); 737 pxa_set_ficp_info(&e7xx_ficp_platform_data);
729} 738}
@@ -873,12 +882,21 @@ static struct platform_device e800_fb_device = {
873 882
874/* --------------------------- UDC definitions --------------------------- */ 883/* --------------------------- UDC definitions --------------------------- */
875 884
876static struct pxa2xx_udc_mach_info e800_udc_mach_info = { 885static struct gpio_vbus_mach_info e800_udc_info = {
877 .gpio_vbus = GPIO_E800_USB_DISC, 886 .gpio_vbus = GPIO_E800_USB_DISC,
878 .gpio_pullup = GPIO_E800_USB_PULLUP, 887 .gpio_pullup = GPIO_E800_USB_PULLUP,
879 .gpio_pullup_inverted = 1 888 .gpio_pullup_inverted = 1
880}; 889};
881 890
891static struct platform_device e800_gpio_vbus = {
892 .name = "gpio-vbus",
893 .id = -1,
894 .dev = {
895 .platform_data = &e800_udc_info,
896 },
897};
898
899
882/* ----------------- e800 tc6393xb parameters ------------------ */ 900/* ----------------- e800 tc6393xb parameters ------------------ */
883 901
884static struct tc6393xb_platform_data e800_tc6393xb_info = { 902static struct tc6393xb_platform_data e800_tc6393xb_info = {
@@ -907,6 +925,7 @@ static struct platform_device e800_tc6393xb_device = {
907static struct platform_device *e800_devices[] __initdata = { 925static struct platform_device *e800_devices[] __initdata = {
908 &e800_fb_device, 926 &e800_fb_device,
909 &e800_tc6393xb_device, 927 &e800_tc6393xb_device,
928 &e800_gpio_vbus,
910}; 929};
911 930
912static void __init e800_init(void) 931static void __init e800_init(void)
@@ -919,7 +938,6 @@ static void __init e800_init(void)
919 "GPIO11_CLK", NULL), 938 "GPIO11_CLK", NULL),
920 eseries_get_tmio_gpios(); 939 eseries_get_tmio_gpios();
921 platform_add_devices(ARRAY_AND_SIZE(e800_devices)); 940 platform_add_devices(ARRAY_AND_SIZE(e800_devices));
922 pxa_set_udc_info(&e800_udc_mach_info);
923 pxa_set_ac97_info(NULL); 941 pxa_set_ac97_info(NULL);
924} 942}
925 943
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 93f05e024313..d88aed8fbe15 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -783,7 +783,7 @@ static void __init a780_init(void)
783 783
784 pxa_set_i2c_info(NULL); 784 pxa_set_i2c_info(NULL);
785 785
786 set_pxa_fb_info(&ezx_fb_info_1); 786 pxa_set_fb_info(NULL, &ezx_fb_info_1);
787 787
788 pxa_set_keypad_info(&a780_keypad_platform_data); 788 pxa_set_keypad_info(&a780_keypad_platform_data);
789 789
@@ -853,7 +853,7 @@ static void __init e680_init(void)
853 pxa_set_i2c_info(NULL); 853 pxa_set_i2c_info(NULL);
854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info)); 854 i2c_register_board_info(0, ARRAY_AND_SIZE(e680_i2c_board_info));
855 855
856 set_pxa_fb_info(&ezx_fb_info_1); 856 pxa_set_fb_info(NULL, &ezx_fb_info_1);
857 857
858 pxa_set_keypad_info(&e680_keypad_platform_data); 858 pxa_set_keypad_info(&e680_keypad_platform_data);
859 859
@@ -918,7 +918,7 @@ static void __init a1200_init(void)
918 pxa_set_i2c_info(NULL); 918 pxa_set_i2c_info(NULL);
919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info)); 919 i2c_register_board_info(0, ARRAY_AND_SIZE(a1200_i2c_board_info));
920 920
921 set_pxa_fb_info(&ezx_fb_info_2); 921 pxa_set_fb_info(NULL, &ezx_fb_info_2);
922 922
923 pxa_set_keypad_info(&a1200_keypad_platform_data); 923 pxa_set_keypad_info(&a1200_keypad_platform_data);
924 924
@@ -1103,7 +1103,7 @@ static void __init a910_init(void)
1103 pxa_set_i2c_info(NULL); 1103 pxa_set_i2c_info(NULL);
1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info)); 1104 i2c_register_board_info(0, ARRAY_AND_SIZE(a910_i2c_board_info));
1105 1105
1106 set_pxa_fb_info(&ezx_fb_info_2); 1106 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1107 1107
1108 pxa_set_keypad_info(&a910_keypad_platform_data); 1108 pxa_set_keypad_info(&a910_keypad_platform_data);
1109 1109
@@ -1173,7 +1173,7 @@ static void __init e6_init(void)
1173 pxa_set_i2c_info(NULL); 1173 pxa_set_i2c_info(NULL);
1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info)); 1174 i2c_register_board_info(0, ARRAY_AND_SIZE(e6_i2c_board_info));
1175 1175
1176 set_pxa_fb_info(&ezx_fb_info_2); 1176 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1177 1177
1178 pxa_set_keypad_info(&e6_keypad_platform_data); 1178 pxa_set_keypad_info(&e6_keypad_platform_data);
1179 1179
@@ -1212,7 +1212,7 @@ static void __init e2_init(void)
1212 pxa_set_i2c_info(NULL); 1212 pxa_set_i2c_info(NULL);
1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info)); 1213 i2c_register_board_info(0, ARRAY_AND_SIZE(e2_i2c_board_info));
1214 1214
1215 set_pxa_fb_info(&ezx_fb_info_2); 1215 pxa_set_fb_info(NULL, &ezx_fb_info_2);
1216 1216
1217 pxa_set_keypad_info(&e2_keypad_platform_data); 1217 pxa_set_keypad_info(&e2_keypad_platform_data);
1218 1218
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 6fd319ea5284..d65e4bde9b91 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -26,6 +26,7 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/err.h> 27#include <linux/err.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/usb/gpio_vbus.h>
29 30
30#include <asm/setup.h> 31#include <asm/setup.h>
31#include <asm/memory.h> 32#include <asm/memory.h>
@@ -106,14 +107,22 @@ static void __init gumstix_mmc_init(void)
106#endif 107#endif
107 108
108#ifdef CONFIG_USB_GADGET_PXA25X 109#ifdef CONFIG_USB_GADGET_PXA25X
109static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = { 110static struct gpio_vbus_mach_info gumstix_udc_info = {
110 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn, 111 .gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
111 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx, 112 .gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,
112}; 113};
113 114
115static struct platform_device gumstix_gpio_vbus = {
116 .name = "gpio-vbus",
117 .id = -1,
118 .dev = {
119 .platform_data = &gumstix_udc_info,
120 },
121};
122
114static void __init gumstix_udc_init(void) 123static void __init gumstix_udc_init(void)
115{ 124{
116 pxa_set_udc_info(&gumstix_udc_info); 125 platform_device_register(&gumstix_gpio_vbus);
117} 126}
118#else 127#else
119static void gumstix_udc_init(void) 128static void gumstix_udc_init(void)
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index dd40e4a9291c..f7fb64f11a7d 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -167,7 +167,7 @@ static void __init idp_init(void)
167 167
168 platform_device_register(&smc91x_device); 168 platform_device_register(&smc91x_device);
169 //platform_device_register(&mst_audio_device); 169 //platform_device_register(&mst_audio_device);
170 set_pxa_fb_info(&sharp_lm8v31); 170 pxa_set_fb_info(NULL, &sharp_lm8v31);
171 pxa_set_mci_info(&idp_mci_platform_data); 171 pxa_set_mci_info(&idp_mci_platform_data);
172} 172}
173 173
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 2bbcf70dd935..0d4700a79612 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -44,6 +44,11 @@
44#define GPIO_NR_PALMZ72_BT_POWER 17 44#define GPIO_NR_PALMZ72_BT_POWER 17
45#define GPIO_NR_PALMZ72_BT_RESET 83 45#define GPIO_NR_PALMZ72_BT_RESET 83
46 46
47/* Camera */
48#define GPIO_NR_PALMZ72_CAM_PWDN 56
49#define GPIO_NR_PALMZ72_CAM_RESET 57
50#define GPIO_NR_PALMZ72_CAM_POWER 91
51
47/** Initial values **/ 52/** Initial values **/
48 53
49/* Battery */ 54/* Battery */
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index e4fb4668c26e..207ecb49a61b 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -38,7 +38,7 @@
38#define PCMD(x) __REG(0x40F50110 + ((x) << 2)) 38#define PCMD(x) __REG(0x40F50110 + ((x) << 2))
39 39
40/* 40/*
41 * Slave Power Managment Unit 41 * Slave Power Management Unit
42 */ 42 */
43#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */ 43#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */
44#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */ 44#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 160ec83f51a6..01a45ac48114 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -154,8 +154,8 @@ struct pxafb_mach_info {
154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); 154 void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
155 void (*smart_update)(struct fb_info *); 155 void (*smart_update)(struct fb_info *);
156}; 156};
157void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); 157
158void set_pxa_fb_parent(struct device *parent_dev); 158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev); 159unsigned long pxafb_get_hsync_time(struct device *dev);
160 160
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); 161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
diff --git a/arch/arm/mach-pxa/include/mach/z2.h b/arch/arm/mach-pxa/include/mach/z2.h
index 8835c16bc82f..7b0f71ef3167 100644
--- a/arch/arm/mach-pxa/include/mach/z2.h
+++ b/arch/arm/mach-pxa/include/mach/z2.h
@@ -25,8 +25,7 @@
25#define GPIO98_ZIPITZ2_LID_BUTTON 98 25#define GPIO98_ZIPITZ2_LID_BUTTON 98
26 26
27/* Libertas GSPI8686 WiFi */ 27/* Libertas GSPI8686 WiFi */
28#define GPIO14_ZIPITZ2_WIFI_RESET 14 28#define GPIO14_ZIPITZ2_WIFI_POWER 14
29#define GPIO15_ZIPITZ2_WIFI_POWER 15
30#define GPIO24_ZIPITZ2_WIFI_CS 24 29#define GPIO24_ZIPITZ2_WIFI_CS 24
31#define GPIO36_ZIPITZ2_WIFI_IRQ 36 30#define GPIO36_ZIPITZ2_WIFI_IRQ 36
32 31
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index faa408ab7ad7..0641f31a56b7 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -64,7 +64,7 @@
64 64
65/* 65/*
66 * CPLD registers: 66 * CPLD registers:
67 * Only 4 registers, but spreaded over a 32MB address space. 67 * Only 4 registers, but spread over a 32MB address space.
68 * Be gentle, and remap that over 32kB... 68 * Be gentle, and remap that over 32kB...
69 */ 69 */
70 70
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 87c1ed9ccd2f..e5e326d2cdc9 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -185,7 +185,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
185 185
186static void littleton_init_lcd(void) 186static void littleton_init_lcd(void)
187{ 187{
188 set_pxa_fb_info(&littleton_lcd_info); 188 pxa_set_fb_info(NULL, &littleton_lcd_info);
189} 189}
190#else 190#else
191static inline void littleton_init_lcd(void) {}; 191static inline void littleton_init_lcd(void) {};
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 6307f70ae22a..f5de541725b1 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -480,7 +480,7 @@ static void __init lpd270_init(void)
480 pxa_set_ac97_info(NULL); 480 pxa_set_ac97_info(NULL);
481 481
482 if (lpd270_lcd_to_use != NULL) 482 if (lpd270_lcd_to_use != NULL)
483 set_pxa_fb_info(lpd270_lcd_to_use); 483 pxa_set_fb_info(NULL, lpd270_lcd_to_use);
484 484
485 pxa_set_ohci_info(&lpd270_ohci_platform_data); 485 pxa_set_ohci_info(&lpd270_ohci_platform_data);
486} 486}
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 0fea945dd6f2..3ede978c83d9 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -521,7 +521,7 @@ static void __init lubbock_init(void)
521 521
522 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL); 522 clk_add_alias("SA1111_CLK", NULL, "GPIO11_CLK", NULL);
523 pxa_set_udc_info(&udc_info); 523 pxa_set_udc_info(&udc_info);
524 set_pxa_fb_info(&sharp_lm8v31); 524 pxa_set_fb_info(NULL, &sharp_lm8v31);
525 pxa_set_mci_info(&lubbock_mci_platform_data); 525 pxa_set_mci_info(&lubbock_mci_platform_data);
526 pxa_set_ficp_info(&lubbock_ficp_platform_data); 526 pxa_set_ficp_info(&lubbock_ficp_platform_data);
527 pxa_set_ac97_info(NULL); 527 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 5535991c4a3c..a72993dde2b3 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -757,7 +757,7 @@ static void __init magician_init(void)
757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0); 757 gpio_direction_output(GPIO104_MAGICIAN_LCD_POWER_1, 0);
758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0); 758 gpio_direction_output(GPIO105_MAGICIAN_LCD_POWER_2, 0);
759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0); 759 gpio_direction_output(GPIO106_MAGICIAN_LCD_POWER_3, 0);
760 set_pxa_fb_info(lcd_select ? &samsung_info : &toppoly_info); 760 pxa_set_fb_info(NULL, lcd_select ? &samsung_info : &toppoly_info);
761 } else 761 } else
762 pr_err("LCD detection: CPLD mapping failed\n"); 762 pr_err("LCD detection: CPLD mapping failed\n");
763} 763}
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 29b6e7a94e11..95163baca29e 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -592,7 +592,7 @@ static void __init mainstone_init(void)
592 else 592 else
593 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; 593 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
594 594
595 set_pxa_fb_info(&mainstone_pxafb_info); 595 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
596 mainstone_backlight_register(); 596 mainstone_backlight_register();
597 597
598 pxa_set_mci_info(&mainstone_mci_platform_data); 598 pxa_set_mci_info(&mainstone_mci_platform_data);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 78d98a8607ec..23925db8ff74 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -458,7 +458,7 @@ static struct platform_device strataflash = {
458/* 458/*
459 * Suspend/Resume bootstrap management 459 * Suspend/Resume bootstrap management
460 * 460 *
461 * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled, 461 * MIO A701 reboot sequence is highly ROM dependent. From the one dissassembled,
462 * this sequence is as follows : 462 * this sequence is as follows :
463 * - disables interrupts 463 * - disables interrupts
464 * - initialize SDRAM (self refresh RAM into active RAM) 464 * - initialize SDRAM (self refresh RAM into active RAM)
@@ -795,7 +795,7 @@ static void __init mioa701_machine_init(void)
795 pxa_set_stuart_info(NULL); 795 pxa_set_stuart_info(NULL);
796 mio_gpio_request(ARRAY_AND_SIZE(global_gpios)); 796 mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
797 bootstrap_init(); 797 bootstrap_init();
798 set_pxa_fb_info(&mioa701_pxafb_info); 798 pxa_set_fb_info(NULL, &mioa701_pxafb_info);
799 pxa_set_mci_info(&mioa701_mci_info); 799 pxa_set_mci_info(&mioa701_mci_info);
800 pxa_set_keypad_info(&mioa701_keypad_info); 800 pxa_set_keypad_info(&mioa701_keypad_info);
801 pxa_set_udc_info(&mioa701_udc_info); 801 pxa_set_udc_info(&mioa701_udc_info);
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 72adb3ae2b43..325c245c0a0d 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -1,8 +1,7 @@
1/* 1/*
2 * Common code for Palm LD, T5, TX, Z72 2 * Common code for Palm LD, T5, TX, Z72
3 * 3 *
4 * Copyright (C) 2010 4 * Copyright (C) 2010-2011 Marek Vasut <marek.vasut@gmail.com>
5 * Marek Vasut <marek.vasut@gmail.com>
6 * 5 *
7 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -158,7 +157,7 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
158 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl; 157 palm27x_lcd_screen.pxafb_lcd_power = palm27x_lcd_ctl;
159 } 158 }
160 159
161 set_pxa_fb_info(&palm27x_lcd_screen); 160 pxa_set_fb_info(NULL, &palm27x_lcd_screen);
162} 161}
163#endif 162#endif
164 163
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index a09a2374697b..fb06bd047272 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -507,7 +507,7 @@ static struct pxafb_mach_info palmtc_lcd_screen = {
507 507
508static void __init palmtc_lcd_init(void) 508static void __init palmtc_lcd_init(void)
509{ 509{
510 set_pxa_fb_info(&palmtc_lcd_screen); 510 pxa_set_fb_info(NULL, &palmtc_lcd_screen);
511} 511}
512#else 512#else
513static inline void palmtc_lcd_init(void) {} 513static inline void palmtc_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 3f25014a136c..726f5b98dcd3 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -136,30 +136,14 @@ static struct platform_device palmte2_pxa_keys = {
136/****************************************************************************** 136/******************************************************************************
137 * Backlight 137 * Backlight
138 ******************************************************************************/ 138 ******************************************************************************/
139static struct gpio palmte_bl_gpios[] = {
140 { GPIO_NR_PALMTE2_BL_POWER, GPIOF_INIT_LOW, "Backlight power" },
141 { GPIO_NR_PALMTE2_LCD_POWER, GPIOF_INIT_LOW, "LCD power" },
142};
143
139static int palmte2_backlight_init(struct device *dev) 144static int palmte2_backlight_init(struct device *dev)
140{ 145{
141 int ret; 146 return gpio_request_array(ARRAY_AND_SIZE(palmte_bl_gpios));
142
143 ret = gpio_request(GPIO_NR_PALMTE2_BL_POWER, "BL POWER");
144 if (ret)
145 goto err;
146 ret = gpio_direction_output(GPIO_NR_PALMTE2_BL_POWER, 0);
147 if (ret)
148 goto err2;
149 ret = gpio_request(GPIO_NR_PALMTE2_LCD_POWER, "LCD POWER");
150 if (ret)
151 goto err2;
152 ret = gpio_direction_output(GPIO_NR_PALMTE2_LCD_POWER, 0);
153 if (ret)
154 goto err3;
155
156 return 0;
157err3:
158 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
159err2:
160 gpio_free(GPIO_NR_PALMTE2_BL_POWER);
161err:
162 return ret;
163} 147}
164 148
165static int palmte2_backlight_notify(struct device *dev, int brightness) 149static int palmte2_backlight_notify(struct device *dev, int brightness)
@@ -171,8 +155,7 @@ static int palmte2_backlight_notify(struct device *dev, int brightness)
171 155
172static void palmte2_backlight_exit(struct device *dev) 156static void palmte2_backlight_exit(struct device *dev)
173{ 157{
174 gpio_free(GPIO_NR_PALMTE2_BL_POWER); 158 gpio_free_array(ARRAY_AND_SIZE(palmte_bl_gpios));
175 gpio_free(GPIO_NR_PALMTE2_LCD_POWER);
176} 159}
177 160
178static struct platform_pwm_backlight_data palmte2_backlight_data = { 161static struct platform_pwm_backlight_data palmte2_backlight_data = {
@@ -363,7 +346,7 @@ static void __init palmte2_init(void)
363 pxa_set_btuart_info(NULL); 346 pxa_set_btuart_info(NULL);
364 pxa_set_stuart_info(NULL); 347 pxa_set_stuart_info(NULL);
365 348
366 set_pxa_fb_info(&palmte2_lcd_screen); 349 pxa_set_fb_info(NULL, &palmte2_lcd_screen);
367 pxa_set_mci_info(&palmte2_mci_platform_data); 350 pxa_set_mci_info(&palmte2_mci_platform_data);
368 palmte2_udc_init(); 351 palmte2_udc_init();
369 pxa_set_ac97_info(&palmte2_ac97_pdata); 352 pxa_set_ac97_info(&palmte2_ac97_pdata);
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 3010193b081e..3b8a4f37dbbe 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -30,6 +30,7 @@
30#include <linux/wm97xx.h> 30#include <linux/wm97xx.h>
31#include <linux/power_supply.h> 31#include <linux/power_supply.h>
32#include <linux/usb/gpio_vbus.h> 32#include <linux/usb/gpio_vbus.h>
33#include <linux/i2c-gpio.h>
33 34
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -47,6 +48,9 @@
47#include <mach/palm27x.h> 48#include <mach/palm27x.h>
48 49
49#include <mach/pm.h> 50#include <mach/pm.h>
51#include <mach/camera.h>
52
53#include <media/soc_camera.h>
50 54
51#include "generic.h" 55#include "generic.h"
52#include "devices.h" 56#include "devices.h"
@@ -103,6 +107,28 @@ static unsigned long palmz72_pin_config[] __initdata = {
103 GPIO22_GPIO, /* LCD border color */ 107 GPIO22_GPIO, /* LCD border color */
104 GPIO96_GPIO, /* lcd power */ 108 GPIO96_GPIO, /* lcd power */
105 109
110 /* PXA Camera */
111 GPIO81_CIF_DD_0,
112 GPIO48_CIF_DD_5,
113 GPIO50_CIF_DD_3,
114 GPIO51_CIF_DD_2,
115 GPIO52_CIF_DD_4,
116 GPIO53_CIF_MCLK,
117 GPIO54_CIF_PCLK,
118 GPIO55_CIF_DD_1,
119 GPIO84_CIF_FV,
120 GPIO85_CIF_LV,
121 GPIO93_CIF_DD_6,
122 GPIO108_CIF_DD_7,
123
124 GPIO56_GPIO, /* OV9640 Powerdown */
125 GPIO57_GPIO, /* OV9640 Reset */
126 GPIO91_GPIO, /* OV9640 Power */
127
128 /* I2C */
129 GPIO117_GPIO, /* I2C_SCL */
130 GPIO118_GPIO, /* I2C_SDA */
131
106 /* Misc. */ 132 /* Misc. */
107 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */ 133 GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* power detect */
108 GPIO88_GPIO, /* green led */ 134 GPIO88_GPIO, /* green led */
@@ -254,6 +280,106 @@ device_initcall(palmz72_pm_init);
254#endif 280#endif
255 281
256/****************************************************************************** 282/******************************************************************************
283 * SoC Camera
284 ******************************************************************************/
285#if defined(CONFIG_SOC_CAMERA_OV9640) || \
286 defined(CONFIG_SOC_CAMERA_OV9640_MODULE)
287static struct pxacamera_platform_data palmz72_pxacamera_platform_data = {
288 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
289 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
290 .mclk_10khz = 2600,
291};
292
293/* Board I2C devices. */
294static struct i2c_board_info palmz72_i2c_device[] = {
295 {
296 I2C_BOARD_INFO("ov9640", 0x30),
297 }
298};
299
300static int palmz72_camera_power(struct device *dev, int power)
301{
302 gpio_set_value(GPIO_NR_PALMZ72_CAM_PWDN, !power);
303 mdelay(50);
304 return 0;
305}
306
307static int palmz72_camera_reset(struct device *dev)
308{
309 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 1);
310 mdelay(50);
311 gpio_set_value(GPIO_NR_PALMZ72_CAM_RESET, 0);
312 mdelay(50);
313 return 0;
314}
315
316static struct soc_camera_link palmz72_iclink = {
317 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
318 .board_info = &palmz72_i2c_device[0],
319 .i2c_adapter_id = 0,
320 .module_name = "ov96xx",
321 .power = &palmz72_camera_power,
322 .reset = &palmz72_camera_reset,
323 .flags = SOCAM_DATAWIDTH_8,
324};
325
326static struct i2c_gpio_platform_data palmz72_i2c_bus_data = {
327 .sda_pin = 118,
328 .scl_pin = 117,
329 .udelay = 10,
330 .timeout = 100,
331};
332
333static struct platform_device palmz72_i2c_bus_device = {
334 .name = "i2c-gpio",
335 .id = 0, /* we use this as a replacement for i2c-pxa */
336 .dev = {
337 .platform_data = &palmz72_i2c_bus_data,
338 }
339};
340
341static struct platform_device palmz72_camera = {
342 .name = "soc-camera-pdrv",
343 .id = -1,
344 .dev = {
345 .platform_data = &palmz72_iclink,
346 },
347};
348
349/* Here we request the camera GPIOs and configure them. We power up the camera
350 * module, deassert the reset pin, but put it into powerdown (low to no power
351 * consumption) mode. This allows us to later bring the module up fast. */
352static struct gpio palmz72_camera_gpios[] = {
353 { GPIO_NR_PALMZ72_CAM_POWER, GPIOF_INIT_HIGH,"Camera DVDD" },
354 { GPIO_NR_PALMZ72_CAM_RESET, GPIOF_INIT_LOW, "Camera RESET" },
355 { GPIO_NR_PALMZ72_CAM_PWDN, GPIOF_INIT_LOW, "Camera PWDN" },
356};
357
358static inline void __init palmz72_cam_gpio_init(void)
359{
360 int ret;
361
362 ret = gpio_request_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
363 if (!ret)
364 gpio_free_array(ARRAY_AND_SIZE(palmz72_camera_gpios));
365 else
366 printk(KERN_ERR "Camera GPIO init failed!\n");
367
368 return;
369}
370
371static void __init palmz72_camera_init(void)
372{
373 palmz72_cam_gpio_init();
374 pxa_set_camera_info(&palmz72_pxacamera_platform_data);
375 platform_device_register(&palmz72_i2c_bus_device);
376 platform_device_register(&palmz72_camera);
377}
378#else
379static inline void palmz72_camera_init(void) {}
380#endif
381
382/******************************************************************************
257 * Machine init 383 * Machine init
258 ******************************************************************************/ 384 ******************************************************************************/
259static void __init palmz72_init(void) 385static void __init palmz72_init(void)
@@ -276,6 +402,7 @@ static void __init palmz72_init(void)
276 palm27x_pmic_init(); 402 palm27x_pmic_init();
277 palmz72_kpc_init(); 403 palmz72_kpc_init();
278 palmz72_leds_init(); 404 palmz72_leds_init();
405 palmz72_camera_init();
279} 406}
280 407
281MACHINE_START(PALMZ72, "Palm Zire72") 408MACHINE_START(PALMZ72, "Palm Zire72")
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 4d0120540124..6d5b7e062124 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -515,7 +515,7 @@ void __init pcm990_baseboard_init(void)
515 pcm990_init_irq(); 515 pcm990_init_irq();
516 516
517#ifndef CONFIG_PCM990_DISPLAY_NONE 517#ifndef CONFIG_PCM990_DISPLAY_NONE
518 set_pxa_fb_info(&pcm990_fbinfo); 518 pxa_set_fb_info(NULL, &pcm990_fbinfo);
519#endif 519#endif
520 platform_device_register(&pcm990_backlight_device); 520 platform_device_register(&pcm990_backlight_device);
521 521
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 35353af345d5..16d14fd79b4b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -445,8 +445,7 @@ static void __init poodle_init(void)
445 if (ret) 445 if (ret)
446 pr_warning("poodle: Unable to register LoCoMo device\n"); 446 pr_warning("poodle: Unable to register LoCoMo device\n");
447 447
448 set_pxa_fb_parent(&poodle_locomo_device.dev); 448 pxa_set_fb_info(&poodle_locomo_device.dev, &poodle_fb_info);
449 set_pxa_fb_info(&poodle_fb_info);
450 pxa_set_udc_info(&udc_info); 449 pxa_set_udc_info(&udc_info);
451 pxa_set_mci_info(&poodle_mci_platform_data); 450 pxa_set_mci_info(&poodle_mci_platform_data);
452 pxa_set_ficp_info(&poodle_ficp_platform_data); 451 pxa_set_ficp_info(&poodle_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 47094188e029..cd1861351f75 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -597,7 +597,7 @@ static void __init raumfeld_lcd_init(void)
597{ 597{
598 int ret; 598 int ret;
599 599
600 set_pxa_fb_info(&raumfeld_sharp_lcd_info); 600 pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
601 601
602 /* Earlier devices had the backlight regulator controlled 602 /* Earlier devices had the backlight regulator controlled
603 * via PWM, later versions use another controller for that */ 603 * via PWM, later versions use another controller for that */
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index eb83c89428ef..fee97a935122 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -473,7 +473,7 @@ static struct pxafb_mach_info saar_lcd_info = {
473 473
474static void __init saar_init_lcd(void) 474static void __init saar_init_lcd(void)
475{ 475{
476 set_pxa_fb_info(&saar_lcd_info); 476 pxa_set_fb_info(NULL, &saar_lcd_info);
477} 477}
478#else 478#else
479static inline void saar_init_lcd(void) {} 479static inline void saar_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 38e2c0912b9a..01c576963e94 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -724,7 +724,7 @@ static struct pxafb_mach_info spitz_pxafb_info = {
724 724
725static void __init spitz_lcd_init(void) 725static void __init spitz_lcd_init(void)
726{ 726{
727 set_pxa_fb_info(&spitz_pxafb_info); 727 pxa_set_fb_info(NULL, &spitz_pxafb_info);
728} 728}
729#else 729#else
730static inline void spitz_lcd_init(void) {} 730static inline void spitz_lcd_init(void) {}
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 9cecf8366db8..53d4a472b699 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -466,7 +466,7 @@ static void __init tavorevb_init_lcd(void)
466{ 466{
467 platform_device_register(&tavorevb_backlight_devices[0]); 467 platform_device_register(&tavorevb_backlight_devices[0]);
468 platform_device_register(&tavorevb_backlight_devices[1]); 468 platform_device_register(&tavorevb_backlight_devices[1]);
469 set_pxa_fb_info(&tavorevb_lcd_info); 469 pxa_set_fb_info(NULL, &tavorevb_lcd_info);
470} 470}
471#else 471#else
472static inline void tavorevb_init_lcd(void) {} 472static inline void tavorevb_init_lcd(void) {}
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index e7f64d9b4f2d..428da3ff33a5 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -100,7 +100,6 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
100static struct clock_event_device ckevt_pxa_osmr0 = { 100static struct clock_event_device ckevt_pxa_osmr0 = {
101 .name = "osmr0", 101 .name = "osmr0",
102 .features = CLOCK_EVT_FEAT_ONESHOT, 102 .features = CLOCK_EVT_FEAT_ONESHOT,
103 .shift = 32,
104 .rating = 200, 103 .rating = 200,
105 .set_next_event = pxa_osmr0_set_next_event, 104 .set_next_event = pxa_osmr0_set_next_event,
106 .set_mode = pxa_osmr0_set_mode, 105 .set_mode = pxa_osmr0_set_mode,
@@ -135,8 +134,8 @@ static void __init pxa_timer_init(void)
135 134
136 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate); 135 init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
137 136
138 ckevt_pxa_osmr0.mult = 137 clocksource_calc_mult_shift(&cksrc_pxa_oscr0, clock_tick_rate, 4);
139 div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift); 138 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
140 ckevt_pxa_osmr0.max_delta_ns = 139 ckevt_pxa_osmr0.max_delta_ns =
141 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); 140 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
142 ckevt_pxa_osmr0.min_delta_ns = 141 ckevt_pxa_osmr0.min_delta_ns =
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 5ad3807af334..5fa145778e7d 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -35,6 +35,7 @@
35#include <linux/spi/pxa2xx_spi.h> 35#include <linux/spi/pxa2xx_spi.h>
36#include <linux/input/matrix_keypad.h> 36#include <linux/input/matrix_keypad.h>
37#include <linux/i2c/pxa-i2c.h> 37#include <linux/i2c/pxa-i2c.h>
38#include <linux/usb/gpio_vbus.h>
38 39
39#include <asm/setup.h> 40#include <asm/setup.h>
40#include <asm/mach-types.h> 41#include <asm/mach-types.h>
@@ -240,12 +241,20 @@ static struct scoop_pcmcia_config tosa_pcmcia_config = {
240/* 241/*
241 * USB Device Controller 242 * USB Device Controller
242 */ 243 */
243static struct pxa2xx_udc_mach_info udc_info __initdata = { 244static struct gpio_vbus_mach_info tosa_udc_info = {
244 .gpio_pullup = TOSA_GPIO_USB_PULLUP, 245 .gpio_pullup = TOSA_GPIO_USB_PULLUP,
245 .gpio_vbus = TOSA_GPIO_USB_IN, 246 .gpio_vbus = TOSA_GPIO_USB_IN,
246 .gpio_vbus_inverted = 1, 247 .gpio_vbus_inverted = 1,
247}; 248};
248 249
250static struct platform_device tosa_gpio_vbus = {
251 .name = "gpio-vbus",
252 .id = -1,
253 .dev = {
254 .platform_data = &tosa_udc_info,
255 },
256};
257
249/* 258/*
250 * MMC/SD Device 259 * MMC/SD Device
251 */ 260 */
@@ -891,6 +900,7 @@ static struct platform_device *devices[] __initdata = {
891 &tosa_bt_device, 900 &tosa_bt_device,
892 &sharpsl_rom_device, 901 &sharpsl_rom_device,
893 &wm9712_device, 902 &wm9712_device,
903 &tosa_gpio_vbus,
894}; 904};
895 905
896static void tosa_poweroff(void) 906static void tosa_poweroff(void)
@@ -937,7 +947,6 @@ static void __init tosa_init(void)
937 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16); 947 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
938 948
939 pxa_set_mci_info(&tosa_mci_platform_data); 949 pxa_set_mci_info(&tosa_mci_platform_data);
940 pxa_set_udc_info(&udc_info);
941 pxa_set_ficp_info(&tosa_ficp_platform_data); 950 pxa_set_ficp_info(&tosa_ficp_platform_data);
942 pxa_set_i2c_info(NULL); 951 pxa_set_i2c_info(NULL);
943 pxa_set_ac97_info(NULL); 952 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 857bb2e63486..b9cfbebdfe9c 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -516,9 +516,9 @@ static void __init trizeps4_init(void)
516 pxa_set_stuart_info(NULL); 516 pxa_set_stuart_info(NULL);
517 517
518 if (0) /* dont know how to determine LCD */ 518 if (0) /* dont know how to determine LCD */
519 set_pxa_fb_info(&sharp_lcd); 519 pxa_set_fb_info(NULL, &sharp_lcd);
520 else 520 else
521 set_pxa_fb_info(&toshiba_lcd); 521 pxa_set_fb_info(NULL, &toshiba_lcd);
522 522
523 pxa_set_mci_info(&trizeps4_mci_platform_data); 523 pxa_set_mci_info(&trizeps4_mci_platform_data);
524#ifndef STATUS_LEDS_ON_STUART_PINS 524#ifndef STATUS_LEDS_ON_STUART_PINS
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index aa70331c0805..b523f119e0f0 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -932,7 +932,7 @@ static void __init viper_init(void)
932 /* Wake-up serial console */ 932 /* Wake-up serial console */
933 viper_init_serial_gpio(); 933 viper_init_serial_gpio();
934 934
935 set_pxa_fb_info(&fb_info); 935 pxa_set_fb_info(NULL, &fb_info);
936 936
937 /* v1 hardware cannot use the datacs line */ 937 /* v1 hardware cannot use the datacs line */
938 version = viper_hw_version(); 938 version = viper_hw_version();
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index e709fd459268..f71d377c8640 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -572,7 +572,7 @@ static void __init vpac270_lcd_init(void)
572 } 572 }
573 573
574 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power; 574 vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
575 set_pxa_fb_info(&vpac270_lcd_screen); 575 pxa_set_fb_info(NULL, &vpac270_lcd_screen);
576 return; 576 return;
577 577
578err2: 578err2:
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index aaf883754ef4..fbe9e02e2f9f 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -91,13 +91,13 @@ static unsigned long z2_pin_config[] = {
91 GPIO47_STUART_TXD, 91 GPIO47_STUART_TXD,
92 92
93 /* Keypad */ 93 /* Keypad */
94 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 94 GPIO100_KP_MKIN_0,
95 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, 95 GPIO101_KP_MKIN_1,
96 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, 96 GPIO102_KP_MKIN_2,
97 GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, 97 GPIO34_KP_MKIN_3,
98 GPIO38_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, 98 GPIO38_KP_MKIN_4,
99 GPIO16_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, 99 GPIO16_KP_MKIN_5,
100 GPIO17_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH, 100 GPIO17_KP_MKIN_6,
101 GPIO103_KP_MKOUT_0, 101 GPIO103_KP_MKOUT_0,
102 GPIO104_KP_MKOUT_1, 102 GPIO104_KP_MKOUT_1,
103 GPIO105_KP_MKOUT_2, 103 GPIO105_KP_MKOUT_2,
@@ -138,8 +138,7 @@ static unsigned long z2_pin_config[] = {
138 GPIO1_GPIO, /* Power button */ 138 GPIO1_GPIO, /* Power button */
139 GPIO37_GPIO, /* Headphone detect */ 139 GPIO37_GPIO, /* Headphone detect */
140 GPIO98_GPIO, /* Lid switch */ 140 GPIO98_GPIO, /* Lid switch */
141 GPIO14_GPIO, /* WiFi Reset */ 141 GPIO14_GPIO, /* WiFi Power */
142 GPIO15_GPIO, /* WiFi Power */
143 GPIO24_GPIO, /* WiFi CS */ 142 GPIO24_GPIO, /* WiFi CS */
144 GPIO36_GPIO, /* WiFi IRQ */ 143 GPIO36_GPIO, /* WiFi IRQ */
145 GPIO88_GPIO, /* LCD CS */ 144 GPIO88_GPIO, /* LCD CS */
@@ -204,7 +203,7 @@ static struct platform_pwm_backlight_data z2_backlight_data[] = {
204 /* Keypad Backlight */ 203 /* Keypad Backlight */
205 .pwm_id = 1, 204 .pwm_id = 1,
206 .max_brightness = 1023, 205 .max_brightness = 1023,
207 .dft_brightness = 512, 206 .dft_brightness = 0,
208 .pwm_period_ns = 1260320, 207 .pwm_period_ns = 1260320,
209 }, 208 },
210 [1] = { 209 [1] = {
@@ -271,7 +270,7 @@ static struct pxafb_mach_info z2_lcd_screen = {
271 270
272static void __init z2_lcd_init(void) 271static void __init z2_lcd_init(void)
273{ 272{
274 set_pxa_fb_info(&z2_lcd_screen); 273 pxa_set_fb_info(NULL, &z2_lcd_screen);
275} 274}
276#else 275#else
277static inline void z2_lcd_init(void) {} 276static inline void z2_lcd_init(void) {}
@@ -309,12 +308,12 @@ struct gpio_led z2_gpio_leds[] = {
309 .active_low = 1, 308 .active_low = 1,
310}, { 309}, {
311 .name = "z2:green:charged", 310 .name = "z2:green:charged",
312 .default_trigger = "none", 311 .default_trigger = "mmc0",
313 .gpio = GPIO85_ZIPITZ2_LED_CHARGED, 312 .gpio = GPIO85_ZIPITZ2_LED_CHARGED,
314 .active_low = 1, 313 .active_low = 1,
315}, { 314}, {
316 .name = "z2:amber:charging", 315 .name = "z2:amber:charging",
317 .default_trigger = "none", 316 .default_trigger = "Z2-charging-or-full",
318 .gpio = GPIO83_ZIPITZ2_LED_CHARGING, 317 .gpio = GPIO83_ZIPITZ2_LED_CHARGING,
319 .active_low = 1, 318 .active_low = 1,
320}, 319},
@@ -427,8 +426,22 @@ static inline void z2_mkp_init(void) {}
427 ******************************************************************************/ 426 ******************************************************************************/
428#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 427#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
429static struct gpio_keys_button z2_pxa_buttons[] = { 428static struct gpio_keys_button z2_pxa_buttons[] = {
430 {KEY_POWER, GPIO1_ZIPITZ2_POWER_BUTTON, 0, "Power Button" }, 429 {
431 {KEY_CLOSE, GPIO98_ZIPITZ2_LID_BUTTON, 0, "Lid Button" }, 430 .code = KEY_POWER,
431 .gpio = GPIO1_ZIPITZ2_POWER_BUTTON,
432 .active_low = 0,
433 .desc = "Power Button",
434 .wakeup = 1,
435 .type = EV_KEY,
436 },
437 {
438 .code = SW_LID,
439 .gpio = GPIO98_ZIPITZ2_LID_BUTTON,
440 .active_low = 1,
441 .desc = "Lid Switch",
442 .wakeup = 0,
443 .type = EV_SW,
444 },
432}; 445};
433 446
434static struct gpio_keys_platform_data z2_pxa_keys_data = { 447static struct gpio_keys_platform_data z2_pxa_keys_data = {
@@ -461,9 +474,9 @@ static struct z2_battery_info batt_chip_info = {
461 .batt_I2C_addr = 0x55, 474 .batt_I2C_addr = 0x55,
462 .batt_I2C_reg = 2, 475 .batt_I2C_reg = 2,
463 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT, 476 .charge_gpio = GPIO0_ZIPITZ2_AC_DETECT,
464 .min_voltage = 2400000, 477 .min_voltage = 3475000,
465 .max_voltage = 3700000, 478 .max_voltage = 4190000,
466 .batt_div = 69, 479 .batt_div = 59,
467 .batt_mult = 1000000, 480 .batt_mult = 1000000,
468 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION, 481 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LION,
469 .batt_name = "Z2", 482 .batt_name = "Z2",
@@ -497,26 +510,16 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
497{ 510{
498 int ret = 0; 511 int ret = 0;
499 512
500 ret = gpio_request(GPIO15_ZIPITZ2_WIFI_POWER, "WiFi Power"); 513 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_POWER, "WiFi Power");
501 if (ret) 514 if (ret)
502 goto err; 515 goto err;
503 516
504 ret = gpio_direction_output(GPIO15_ZIPITZ2_WIFI_POWER, 1); 517 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_POWER, 1);
505 if (ret) 518 if (ret)
506 goto err2; 519 goto err2;
507 520
508 ret = gpio_request(GPIO14_ZIPITZ2_WIFI_RESET, "WiFi Reset"); 521 /* Wait until card is powered on */
509 if (ret)
510 goto err2;
511
512 ret = gpio_direction_output(GPIO14_ZIPITZ2_WIFI_RESET, 0);
513 if (ret)
514 goto err3;
515
516 /* Reset the card */
517 mdelay(180); 522 mdelay(180);
518 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 1);
519 mdelay(20);
520 523
521 spi->bits_per_word = 16; 524 spi->bits_per_word = 16;
522 spi->mode = SPI_MODE_2, 525 spi->mode = SPI_MODE_2,
@@ -525,22 +528,18 @@ static int z2_lbs_spi_setup(struct spi_device *spi)
525 528
526 return 0; 529 return 0;
527 530
528err3:
529 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
530err2: 531err2:
531 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER); 532 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
532err: 533err:
533 return ret; 534 return ret;
534}; 535};
535 536
536static int z2_lbs_spi_teardown(struct spi_device *spi) 537static int z2_lbs_spi_teardown(struct spi_device *spi)
537{ 538{
538 gpio_set_value(GPIO14_ZIPITZ2_WIFI_RESET, 0); 539 gpio_set_value(GPIO14_ZIPITZ2_WIFI_POWER, 0);
539 gpio_set_value(GPIO15_ZIPITZ2_WIFI_POWER, 0); 540 gpio_free(GPIO14_ZIPITZ2_WIFI_POWER);
540 gpio_free(GPIO14_ZIPITZ2_WIFI_RESET);
541 gpio_free(GPIO15_ZIPITZ2_WIFI_POWER);
542 return 0;
543 541
542 return 0;
544}; 543};
545 544
546static struct pxa2xx_spi_chip z2_lbs_chip_info = { 545static struct pxa2xx_spi_chip z2_lbs_chip_info = {
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 139aa7f2ed90..00363c7ac182 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -847,7 +847,7 @@ static void __init zeus_init(void)
847 if (zeus_setup_fb_gpios()) 847 if (zeus_setup_fb_gpios())
848 pr_err("Failed to setup fb gpios\n"); 848 pr_err("Failed to setup fb gpios\n");
849 else 849 else
850 set_pxa_fb_info(&zeus_fb_info); 850 pxa_set_fb_info(NULL, &zeus_fb_info);
851 851
852 pxa_set_mci_info(&zeus_mci_platform_data); 852 pxa_set_mci_info(&zeus_mci_platform_data);
853 pxa_set_udc_info(&zeus_udc_info); 853 pxa_set_udc_info(&zeus_udc_info);
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index a4c784aab764..5821185f77ab 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -208,7 +208,7 @@ static void __init zylonite_init_lcd(void)
208 platform_device_register(&zylonite_backlight_device); 208 platform_device_register(&zylonite_backlight_device);
209 209
210 if (lcd_id & 0x20) { 210 if (lcd_id & 0x20) {
211 set_pxa_fb_info(&zylonite_sharp_lcd_info); 211 pxa_set_fb_info(NULL, &zylonite_sharp_lcd_info);
212 return; 212 return;
213 } 213 }
214 214
@@ -220,7 +220,7 @@ static void __init zylonite_init_lcd(void)
220 else 220 else
221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode; 221 zylonite_toshiba_lcd_info.modes = &toshiba_ltm04c380k_mode;
222 222
223 set_pxa_fb_info(&zylonite_toshiba_lcd_info); 223 pxa_set_fb_info(NULL, &zylonite_toshiba_lcd_info);
224} 224}
225#else 225#else
226static inline void zylonite_init_lcd(void) {} 226static inline void zylonite_init_lcd(void) {}
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 2ecc1d94284e..10e75faba4c9 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -348,7 +348,7 @@ static void __init gic_init_irq(void)
348 348
349#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB 349#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
350 /* board GIC, secondary */ 350 /* board GIC, secondary */
351 gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE), 351 gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
352 __io_address(REALVIEW_EB_GIC_CPU_BASE)); 352 __io_address(REALVIEW_EB_GIC_CPU_BASE));
353 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); 353 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
354#endif 354#endif
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index cf68136cc668..b2b2a5bb275e 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -19,7 +19,7 @@
19#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ 19#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */
20 20
21/* We use `virtual` dma channels to hide the fact we have only a limited 21/* We use `virtual` dma channels to hide the fact we have only a limited
22 * number of DMA channels, and not of all of them (dependant on the device) 22 * number of DMA channels, and not of all of them (dependent on the device)
23 * can be attached to any DMA source. We therefore let the DMA core handle 23 * can be attached to any DMA source. We therefore let the DMA core handle
24 * the allocation of hardware channels to clients. 24 * the allocation of hardware channels to clients.
25*/ 25*/
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
index 7f7c52947963..988a6863e54b 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-mem.h
@@ -101,7 +101,7 @@
101#define S3C2410_BANKCON_PMC16 (0x03) 101#define S3C2410_BANKCON_PMC16 (0x03)
102 102
103/* bank configurations for banks 0..7, note banks 103/* bank configurations for banks 0..7, note banks
104 * 6 and 7 have differnt configurations depending on 104 * 6 and 7 have different configurations depending on
105 * the memory type bits */ 105 * the memory type bits */
106 106
107#define S3C2410_BANKCON_Tacp2 (0x0 << 2) 107#define S3C2410_BANKCON_Tacp2 (0x0 << 2)
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 66f44440d5d3..079dcaa602d3 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -252,7 +252,7 @@ static struct s3c24xx_led_platdata n30_blue_led_pdata = {
252 .def_trigger = "", 252 .def_trigger = "",
253}; 253};
254 254
255/* This is the blue LED on the device. Originaly used to indicate GPS activity 255/* This is the blue LED on the device. Originally used to indicate GPS activity
256 * by flashing. */ 256 * by flashing. */
257static struct s3c24xx_led_platdata n35_blue_led_pdata = { 257static struct s3c24xx_led_platdata n35_blue_led_pdata = {
258 .name = "blue_led", 258 .name = "blue_led",
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index dfedc9c9e005..dd3120df09fe 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -155,7 +155,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
155 * the same timings, however, anything smaller than 1024x768 155 * the same timings, however, anything smaller than 1024x768
156 * will only be displayed in the top left corner of a 1024x768 156 * will only be displayed in the top left corner of a 1024x768
157 * XGA output unless you add optional dip switches to the shield. 157 * XGA output unless you add optional dip switches to the shield.
158 * Therefore timings for other resolutions have been ommited here. 158 * Therefore timings for other resolutions have been omitted here.
159 */ 159 */
160 [2] = { 160 [2] = {
161 _LCD_DECLARE( 161 _LCD_DECLARE(
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index c35585cf8c4f..b197171e7d03 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -315,7 +315,7 @@ int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op)
315 case S3C2410_DMAOP_FLUSH: 315 case S3C2410_DMAOP_FLUSH:
316 return s3c64xx_dma_flush(chan); 316 return s3c64xx_dma_flush(chan);
317 317
318 /* belive PAUSE/RESUME are no-ops */ 318 /* believe PAUSE/RESUME are no-ops */
319 case S3C2410_DMAOP_PAUSE: 319 case S3C2410_DMAOP_PAUSE:
320 case S3C2410_DMAOP_RESUME: 320 case S3C2410_DMAOP_RESUME:
321 case S3C2410_DMAOP_STARTED: 321 case S3C2410_DMAOP_STARTED:
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
index 4be4cc9abf75..07aa4d6054fe 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h
@@ -29,7 +29,7 @@
29#define WPALCON_H (0x19c) 29#define WPALCON_H (0x19c)
30#define WPALCON_L (0x1a0) 30#define WPALCON_L (0x1a0)
31 31
32/* Pallete contro for WPAL0 and WPAL1 is the same as in S3C64xx, but 32/* Palette control for WPAL0 and WPAL1 is the same as in S3C64xx, but
33 * different for WPAL2-4 33 * different for WPAL2-4
34 */ 34 */
35/* In WPALCON_L (aka WPALCON) */ 35/* In WPALCON_L (aka WPALCON) */
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index f16946e456e9..be25879bb2ee 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -40,7 +40,7 @@ void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
40{ 40{
41 u32 ctrl2, ctrl3; 41 u32 ctrl2, ctrl3;
42 42
43 /* don't need to alter anything acording to card-type */ 43 /* don't need to alter anything according to card-type */
44 44
45 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); 45 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
46 46
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
index 1f4b595534c2..a5a1e331f8ed 100644
--- a/arch/arm/mach-s5pv210/include/mach/gpio.h
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -18,7 +18,7 @@
18#define gpio_cansleep __gpio_cansleep 18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq 19#define gpio_to_irq __gpio_to_irq
20 20
21/* Practically, GPIO banks upto MP03 are the configurable gpio banks */ 21/* Practically, GPIO banks up to MP03 are the configurable gpio banks */
22 22
23/* GPIO bank sizes */ 23/* GPIO bank sizes */
24#define S5PV210_GPIO_A0_NR (8) 24#define S5PV210_GPIO_A0_NR (8)
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index 746777d56df9..3e3ac05bb7b1 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -32,10 +32,10 @@ void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
32 32
33 switch (width) { 33 switch (width) {
34 case 8: 34 case 8:
35 /* GPG1[3:6] special-funtion 3 */ 35 /* GPG1[3:6] special-function 3 */
36 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); 36 s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3));
37 case 4: 37 case 4:
38 /* GPG0[3:6] special-funtion 2 */ 38 /* GPG0[3:6] special-function 2 */
39 s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); 39 s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2));
40 default: 40 default:
41 break; 41 break;
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index c32e202731c1..a83b6c909f6b 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -38,7 +38,7 @@ void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
38{ 38{
39 u32 ctrl2, ctrl3; 39 u32 ctrl2, ctrl3;
40 40
41 /* don't need to alter anything acording to card-type */ 41 /* don't need to alter anything according to card-type */
42 42
43 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); 43 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
44 44
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index e697691eed28..41252d22e659 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -50,7 +50,7 @@ led-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o
50# LEDs support 50# LEDs support
51obj-$(CONFIG_LEDS) += $(led-y) 51obj-$(CONFIG_LEDS) += $(led-y)
52 52
53# Miscelaneous functions 53# Miscellaneous functions
54obj-$(CONFIG_PM) += pm.o sleep.o 54obj-$(CONFIG_PM) += pm.o sleep.o
55obj-$(CONFIG_SA1100_SSP) += ssp.o 55obj-$(CONFIG_SA1100_SSP) += ssp.o
56 56
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index 07d4e8ba3719..aaa8acf76b7b 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -68,7 +68,7 @@
68 * clock change in ROM and jump to that code from the kernel. The main 68 * clock change in ROM and jump to that code from the kernel. The main
69 * disadvantage is that the ROM has to be modified, which is not 69 * disadvantage is that the ROM has to be modified, which is not
70 * possible on all SA-1100 platforms. Another disadvantage is that 70 * possible on all SA-1100 platforms. Another disadvantage is that
71 * jumping to ROM makes clock switching unecessary complicated. 71 * jumping to ROM makes clock switching unnecessary complicated.
72 * 72 *
73 * The idea behind this driver is that the memory configuration can be 73 * The idea behind this driver is that the memory configuration can be
74 * changed while running from DRAM (even with interrupts turned on!) 74 * changed while running from DRAM (even with interrupts turned on!)
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h
index 4f7ea012e1e5..bae8296f5dbf 100644
--- a/arch/arm/mach-sa1100/include/mach/SA-1100.h
+++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h
@@ -1794,7 +1794,7 @@
1794 (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ 1794 (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \
1795 DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR))) 1795 DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR)))
1796 1796
1797#define DCSR_RUN 0x00000001 /* DMA RUNing */ 1797#define DCSR_RUN 0x00000001 /* DMA running */
1798#define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ 1798#define DCSR_IE 0x00000002 /* DMA Interrupt Enable */
1799#define DCSR_ERROR 0x00000004 /* DMA ERROR */ 1799#define DCSR_ERROR 0x00000004 /* DMA ERROR */
1800#define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */ 1800#define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 9d490c66891c..f50b00bd18a0 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -29,7 +29,7 @@ static unsigned long jornada_ssp_flags;
29/** 29/**
30 * jornada_ssp_reverse - reverses input byte 30 * jornada_ssp_reverse - reverses input byte
31 * 31 *
32 * we need to reverse all data we recieve from the mcu due to its physical location 32 * we need to reverse all data we receive from the mcu due to its physical location
33 * returns : 01110111 -> 11101110 33 * returns : 01110111 -> 11101110
34 */ 34 */
35u8 inline jornada_ssp_reverse(u8 byte) 35u8 inline jornada_ssp_reverse(u8 byte)
@@ -179,7 +179,7 @@ static int __devinit jornada_ssp_probe(struct platform_device *dev)
179 179
180static int jornada_ssp_remove(struct platform_device *dev) 180static int jornada_ssp_remove(struct platform_device *dev)
181{ 181{
182 /* Note that this doesnt actually remove the driver, since theres nothing to remove 182 /* Note that this doesn't actually remove the driver, since theres nothing to remove
183 * It just makes sure everything is turned off */ 183 * It just makes sure everything is turned off */
184 GPSR = GPIO_GPIO25; 184 GPSR = GPIO_GPIO25;
185 ssp_exit(); 185 ssp_exit();
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 783b66fa95fb..1e35fa976d64 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -947,7 +947,7 @@ static struct platform_device *ap4evb_devices[] __initdata = {
947 &ap4evb_camera, 947 &ap4evb_camera,
948}; 948};
949 949
950static int __init hdmi_init_pm_clock(void) 950static void __init hdmi_init_pm_clock(void)
951{ 951{
952 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); 952 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
953 int ret; 953 int ret;
@@ -988,20 +988,15 @@ static int __init hdmi_init_pm_clock(void)
988 pr_debug("PLLC2 set frequency %lu\n", rate); 988 pr_debug("PLLC2 set frequency %lu\n", rate);
989 989
990 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); 990 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
991 if (ret < 0) { 991 if (ret < 0)
992 pr_err("Cannot set HDMI parent: %d\n", ret); 992 pr_err("Cannot set HDMI parent: %d\n", ret);
993 goto out;
994 }
995 993
996out: 994out:
997 if (!IS_ERR(hdmi_ick)) 995 if (!IS_ERR(hdmi_ick))
998 clk_put(hdmi_ick); 996 clk_put(hdmi_ick);
999 return ret;
1000} 997}
1001 998
1002device_initcall(hdmi_init_pm_clock); 999static void __init fsi_init_pm_clock(void)
1003
1004static int __init fsi_init_pm_clock(void)
1005{ 1000{
1006 struct clk *fsia_ick; 1001 struct clk *fsia_ick;
1007 int ret; 1002 int ret;
@@ -1010,7 +1005,7 @@ static int __init fsi_init_pm_clock(void)
1010 if (IS_ERR(fsia_ick)) { 1005 if (IS_ERR(fsia_ick)) {
1011 ret = PTR_ERR(fsia_ick); 1006 ret = PTR_ERR(fsia_ick);
1012 pr_err("Cannot get FSI ICK: %d\n", ret); 1007 pr_err("Cannot get FSI ICK: %d\n", ret);
1013 return ret; 1008 return;
1014 } 1009 }
1015 1010
1016 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); 1011 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
@@ -1018,10 +1013,7 @@ static int __init fsi_init_pm_clock(void)
1018 pr_err("Cannot set FSI-A parent: %d\n", ret); 1013 pr_err("Cannot set FSI-A parent: %d\n", ret);
1019 1014
1020 clk_put(fsia_ick); 1015 clk_put(fsia_ick);
1021
1022 return ret;
1023} 1016}
1024device_initcall(fsi_init_pm_clock);
1025 1017
1026/* 1018/*
1027 * FIXME !! 1019 * FIXME !!
@@ -1348,6 +1340,9 @@ static void __init ap4evb_init(void)
1348 __raw_writel(srcr4 & ~(1 << 13), SRCR4); 1340 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1349 1341
1350 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); 1342 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1343
1344 hdmi_init_pm_clock();
1345 fsi_init_pm_clock();
1351} 1346}
1352 1347
1353static void __init ap4evb_timer_init(void) 1348static void __init ap4evb_timer_init(void)
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 8184d4d4f234..7da2ca24229d 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -423,7 +423,7 @@ static struct platform_device fsi_hdmi_device = {
423 .name = "sh_fsi2_b_hdmi", 423 .name = "sh_fsi2_b_hdmi",
424}; 424};
425 425
426static int __init hdmi_init_pm_clock(void) 426static void __init hdmi_init_pm_clock(void)
427{ 427{
428 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick"); 428 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
429 int ret; 429 int ret;
@@ -467,17 +467,13 @@ static int __init hdmi_init_pm_clock(void)
467 pr_debug("PLLC2 set frequency %lu\n", rate); 467 pr_debug("PLLC2 set frequency %lu\n", rate);
468 468
469 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); 469 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
470 if (ret < 0) { 470 if (ret < 0)
471 pr_err("Cannot set HDMI parent: %d\n", ret); 471 pr_err("Cannot set HDMI parent: %d\n", ret);
472 goto out;
473 }
474 472
475out: 473out:
476 if (!IS_ERR(hdmi_ick)) 474 if (!IS_ERR(hdmi_ick))
477 clk_put(hdmi_ick); 475 clk_put(hdmi_ick);
478 return ret;
479} 476}
480device_initcall(hdmi_init_pm_clock);
481 477
482/* USB1 (Host) */ 478/* USB1 (Host) */
483static void usb1_host_port_power(int port, int power) 479static void usb1_host_port_power(int port, int power)
@@ -1218,6 +1214,8 @@ static void __init mackerel_init(void)
1218 sh7372_add_standard_devices(); 1214 sh7372_add_standard_devices();
1219 1215
1220 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices)); 1216 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
1217
1218 hdmi_init_pm_clock();
1221} 1219}
1222 1220
1223static void __init mackerel_timer_init(void) 1221static void __init mackerel_timer_init(void)
diff --git a/arch/arm/mach-shmobile/include/mach/mmc.h b/arch/arm/mach-shmobile/include/mach/mmc.h
index e11560a525a1..21a59db638bb 100644
--- a/arch/arm/mach-shmobile/include/mach/mmc.h
+++ b/arch/arm/mach-shmobile/include/mach/mmc.h
@@ -9,7 +9,7 @@
9 9
10#ifdef CONFIG_MACH_AP4EVB 10#ifdef CONFIG_MACH_AP4EVB
11#include "mach/mmc-ap4eb.h" 11#include "mach/mmc-ap4eb.h"
12#elif CONFIG_MACH_MACKEREL 12#elif defined(CONFIG_MACH_MACKEREL)
13#include "mach/mmc-mackerel.h" 13#include "mach/mmc-mackerel.h"
14#else 14#else
15#error "unsupported board." 15#error "unsupported board."
diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h
index 6d6a205bcf90..9320aff0a20f 100644
--- a/arch/arm/mach-shmobile/include/mach/zboot.h
+++ b/arch/arm/mach-shmobile/include/mach/zboot.h
@@ -13,7 +13,7 @@
13#ifdef CONFIG_MACH_AP4EVB 13#ifdef CONFIG_MACH_AP4EVB
14#define MACH_TYPE MACH_TYPE_AP4EVB 14#define MACH_TYPE MACH_TYPE_AP4EVB
15#include "mach/head-ap4evb.txt" 15#include "mach/head-ap4evb.txt"
16#elif CONFIG_MACH_MACKEREL 16#elif defined(CONFIG_MACH_MACKEREL)
17#define MACH_TYPE MACH_TYPE_MACKEREL 17#define MACH_TYPE MACH_TYPE_MACKEREL
18#include "mach/head-mackerel.txt" 18#include "mach/head-mackerel.txt"
19#else 19#else
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index e945ae28ee77..f4ef5eb317bd 100644
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -223,7 +223,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
223 * - Change the source selector to invalid to stop the DMA from 223 * - Change the source selector to invalid to stop the DMA from
224 * FIFO to memory. 224 * FIFO to memory.
225 * - Read the status register to know the number of pending 225 * - Read the status register to know the number of pending
226 * bytes to be transfered. 226 * bytes to be transferred.
227 * - Finally stop or program the DMA to the next buffer in the 227 * - Finally stop or program the DMA to the next buffer in the
228 * list. 228 * list.
229 */ 229 */
@@ -244,7 +244,7 @@ int tegra_dma_dequeue_req(struct tegra_dma_channel *ch,
244 if (status & STA_BUSY) 244 if (status & STA_BUSY)
245 req->bytes_transferred -= to_transfer; 245 req->bytes_transferred -= to_transfer;
246 246
247 /* In continous transfer mode, DMA only tracks the count of the 247 /* In continuous transfer mode, DMA only tracks the count of the
248 * half DMA buffer. So, if the DMA already finished half the DMA 248 * half DMA buffer. So, if the DMA already finished half the DMA
249 * then add the half buffer to the completed count. 249 * then add the half buffer to the completed count.
250 * 250 *
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
index 39011bd9a925..d0132e8031a1 100644
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ b/arch/arm/mach-tegra/include/mach/dma.h
@@ -92,11 +92,11 @@ struct tegra_dma_req {
92 /* This is a called from the DMA ISR context when the DMA is still in 92 /* This is a called from the DMA ISR context when the DMA is still in
93 * progress and is actively filling same buffer. 93 * progress and is actively filling same buffer.
94 * 94 *
95 * In case of continous mode receive, this threshold is 1/2 the buffer 95 * In case of continuous mode receive, this threshold is 1/2 the buffer
96 * size. In other cases, this will not even be called as there is no 96 * size. In other cases, this will not even be called as there is no
97 * hardware support for it. 97 * hardware support for it.
98 * 98 *
99 * In the case of continous mode receive, if there is next req already 99 * In the case of continuous mode receive, if there is next req already
100 * queued, DMA programs the HW to use that req when this req is 100 * queued, DMA programs the HW to use that req when this req is
101 * completed. If there is no "next req" queued, then DMA ISR doesn't do 101 * completed. If there is no "next req" queued, then DMA ISR doesn't do
102 * anything before calling this callback. 102 * anything before calling this callback.
diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c
index fabcc49abe80..5535dd0a78c9 100644
--- a/arch/arm/mach-u300/clock.c
+++ b/arch/arm/mach-u300/clock.c
@@ -263,7 +263,7 @@ static void disable_i2s0_vcxo(void)
263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); 263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
264 val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO; 264 val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO;
265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
266 /* Deactivate VCXO if noone else is using VCXO */ 266 /* Deactivate VCXO if no one else is using VCXO */
267 if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO)) 267 if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO))
268 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; 268 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON;
269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
@@ -283,7 +283,7 @@ static void disable_i2s1_vcxo(void)
283 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); 283 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
284 val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO; 284 val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO;
285 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 285 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
286 /* Deactivate VCXO if noone else is using VCXO */ 286 /* Deactivate VCXO if no one else is using VCXO */
287 if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO)) 287 if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO))
288 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; 288 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON;
289 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 289 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
@@ -649,7 +649,7 @@ static unsigned long clk_round_rate_cpuclk(struct clk *clk, unsigned long rate)
649 */ 649 */
650long clk_round_rate(struct clk *clk, unsigned long rate) 650long clk_round_rate(struct clk *clk, unsigned long rate)
651{ 651{
652 /* TODO: get apropriate switches for EMIFCLK, AHBCLK and MCLK */ 652 /* TODO: get appropriate switches for EMIFCLK, AHBCLK and MCLK */
653 /* Else default to fixed value */ 653 /* Else default to fixed value */
654 654
655 if (clk->round_rate) { 655 if (clk->round_rate) {
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index dc8746d7826e..af913741e6ec 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -52,7 +52,7 @@ static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
52 * on value present in GpioSel1 to GpioSel6 and AlternatFunction 52 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
53 * register. This is the array of 7 configuration settings. 53 * register. This is the array of 7 configuration settings.
54 * One has to compile time decide these settings. Below is the 54 * One has to compile time decide these settings. Below is the
55 * explaination of these setting 55 * explanation of these setting
56 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO 56 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
57 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO 57 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
58 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO 58 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 0fefb34c11e4..16647b255378 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -58,7 +58,7 @@
58#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000) 58#define U8500_GPIO2_BASE (U8500_PER2_BASE + 0xE000)
59#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000) 59#define U8500_GPIO3_BASE (U8500_PER5_BASE + 0x1E000)
60 60
61/* per7 base addressess */ 61/* per7 base addresses */
62#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000) 62#define U8500_CR_BASE_ED (U8500_PER7_BASE_ED + 0x8000)
63#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000) 63#define U8500_MTU0_BASE_ED (U8500_PER7_BASE_ED + 0xa000)
64#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000) 64#define U8500_MTU1_BASE_ED (U8500_PER7_BASE_ED + 0xb000)
@@ -68,7 +68,7 @@
68#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) 68#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000)
69#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) 69#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000)
70 70
71/* per6 base addressess */ 71/* per6 base addresses */
72#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) 72#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
73#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) 73#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
74#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) 74#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
@@ -79,11 +79,11 @@
79#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) 79#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
80#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) 80#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
81 81
82/* per5 base addressess */ 82/* per5 base addresses */
83#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) 83#define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000)
84#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) 84#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000)
85 85
86/* per4 base addressess */ 86/* per4 base addresses */
87#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000) 87#define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x00000)
88#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000) 88#define U8500_BACKUPRAM1_BASE (U8500_PER4_BASE + 0x01000)
89#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000) 89#define U8500_RTT0_BASE (U8500_PER4_BASE + 0x02000)
@@ -106,7 +106,7 @@
106#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) 106#define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000)
107#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) 107#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000)
108 108
109/* per2 base addressess */ 109/* per2 base addresses */
110#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) 110#define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000)
111#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) 111#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000)
112#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) 112#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000)
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 96e59e3ee4f5..eb7ffa0ee8b5 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -314,7 +314,7 @@ static struct mmci_platform_data mmc0_plat_data = {
314 .gpio_cd = -1, 314 .gpio_cd = -1,
315}; 315};
316 316
317static struct resource chalcd_resources[] = { 317static struct resource char_lcd_resources[] = {
318 { 318 {
319 .start = VERSATILE_CHAR_LCD_BASE, 319 .start = VERSATILE_CHAR_LCD_BASE,
320 .end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1), 320 .end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1),
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S
index d3644db467b7..f40c69656d8d 100644
--- a/arch/arm/mm/cache-v4wb.S
+++ b/arch/arm/mm/cache-v4wb.S
@@ -32,7 +32,7 @@
32/* 32/*
33 * This is the size at which it becomes more efficient to 33 * This is the size at which it becomes more efficient to
34 * clean the whole cache, rather than using the individual 34 * clean the whole cache, rather than using the individual
35 * cache line maintainence instructions. 35 * cache line maintenance instructions.
36 * 36 *
37 * Size Clean (ticks) Dirty (ticks) 37 * Size Clean (ticks) Dirty (ticks)
38 * 4096 21 20 21 53 55 54 38 * 4096 21 20 21 53 55 54
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index 49c2b66cf3dd..a7b276dbda11 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -34,7 +34,7 @@
34/* 34/*
35 * This is the size at which it becomes more efficient to 35 * This is the size at which it becomes more efficient to
36 * clean the whole cache, rather than using the individual 36 * clean the whole cache, rather than using the individual
37 * cache line maintainence instructions. 37 * cache line maintenance instructions.
38 * 38 *
39 * *** This needs benchmarking 39 * *** This needs benchmarking
40 */ 40 */
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 6136e68ce953..dc18d81ef8ce 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -96,7 +96,7 @@ ENDPROC(v7_flush_dcache_all)
96 * Flush the entire cache system. 96 * Flush the entire cache system.
97 * The data cache flush is now achieved using atomic clean / invalidates 97 * The data cache flush is now achieved using atomic clean / invalidates
98 * working outwards from L1 cache. This is done using Set/Way based cache 98 * working outwards from L1 cache. This is done using Set/Way based cache
99 * maintainance instructions. 99 * maintenance instructions.
100 * The instruction cache can still be invalidated back to the point of 100 * The instruction cache can still be invalidated back to the point of
101 * unification in a single instruction. 101 * unification in a single instruction.
102 * 102 *
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 226e3d8351c2..6c4e7fd6c8af 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -64,7 +64,7 @@
64/* 64/*
65 * This is the size at which it becomes more efficient to 65 * This is the size at which it becomes more efficient to
66 * clean the whole cache, rather than using the individual 66 * clean the whole cache, rather than using the individual
67 * cache line maintainence instructions. 67 * cache line maintenance instructions.
68 */ 68 */
69#define CACHE_DLIMIT 32768 69#define CACHE_DLIMIT 32768
70 70
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 86d9c2cf0bce..4ce947c19623 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -64,7 +64,7 @@
64/* 64/*
65 * This is the size at which it becomes more efficient to 65 * This is the size at which it becomes more efficient to
66 * clean the whole cache, rather than using the individual 66 * clean the whole cache, rather than using the individual
67 * cache line maintainence instructions. 67 * cache line maintenance instructions.
68 */ 68 */
69#define CACHE_DLIMIT 32768 69#define CACHE_DLIMIT 32768
70 70
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 83d3dd34f846..c8884c5413a2 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -53,7 +53,7 @@
53/* 53/*
54 * This is the size at which it becomes more efficient to 54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual 55 * clean the whole cache, rather than using the individual
56 * cache line maintainence instructions. 56 * cache line maintenance instructions.
57 */ 57 */
58#define CACHE_DLIMIT 32768 58#define CACHE_DLIMIT 32768
59 59
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 686043ee7281..413684660aad 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -53,7 +53,7 @@
53/* 53/*
54 * This is the size at which it becomes more efficient to 54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual 55 * clean the whole cache, rather than using the individual
56 * cache line maintainence instructions. 56 * cache line maintenance instructions.
57 */ 57 */
58#define CACHE_DLIMIT 32768 58#define CACHE_DLIMIT 32768
59 59
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 665266da143c..7a06e5964f59 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -63,7 +63,7 @@ ENTRY(cpu_arm720_proc_fin)
63/* 63/*
64 * Function: arm720_proc_do_idle(void) 64 * Function: arm720_proc_do_idle(void)
65 * Params : r0 = unused 65 * Params : r0 = unused
66 * Purpose : put the processer in proper idle mode 66 * Purpose : put the processor in proper idle mode
67 */ 67 */
68ENTRY(cpu_arm720_do_idle) 68ENTRY(cpu_arm720_do_idle)
69 mov pc, lr 69 mov pc, lr
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 219980ec8b6e..b46eb21f05c7 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -53,7 +53,7 @@
53/* 53/*
54 * This is the size at which it becomes more efficient to 54 * This is the size at which it becomes more efficient to
55 * clean the whole cache, rather than using the individual 55 * clean the whole cache, rather than using the individual
56 * cache line maintainence instructions. 56 * cache line maintenance instructions.
57 */ 57 */
58#define CACHE_DLIMIT 65536 58#define CACHE_DLIMIT 65536
59 59
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 36154b1e792a..95ba1fc56e4d 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -54,7 +54,7 @@
54/* 54/*
55 * This is the size at which it becomes more efficient to 55 * This is the size at which it becomes more efficient to
56 * clean the whole cache, rather than using the individual 56 * clean the whole cache, rather than using the individual
57 * cache line maintainence instructions. (I think this should 57 * cache line maintenance instructions. (I think this should
58 * be 32768). 58 * be 32768).
59 */ 59 */
60#define CACHE_DLIMIT 8192 60#define CACHE_DLIMIT 8192
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 89c5e0009c4c..541e4774eea1 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -77,7 +77,7 @@
77/* 77/*
78 * This is the size at which it becomes more efficient to 78 * This is the size at which it becomes more efficient to
79 * clean the whole cache, rather than using the individual 79 * clean the whole cache, rather than using the individual
80 * cache line maintainence instructions. 80 * cache line maintenance instructions.
81 */ 81 */
82#define CACHE_DLIMIT 8192 82#define CACHE_DLIMIT 8192
83 83
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index e32fa499194c..34261f9486b9 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -85,7 +85,7 @@
85 85
86/* 86/*
87 * Sanity check the PTE configuration for the code below - which makes 87 * Sanity check the PTE configuration for the code below - which makes
88 * certain assumptions about how these bits are layed out. 88 * certain assumptions about how these bits are laid out.
89 */ 89 */
90#ifdef CONFIG_MMU 90#ifdef CONFIG_MMU
91#if L_PTE_SHARED != PTE_EXT_SHARED 91#if L_PTE_SHARED != PTE_EXT_SHARED
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 832b6bdc192c..bfa0c9f611c5 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -132,7 +132,7 @@ ENTRY(cpu_v6_do_suspend)
132 mrc p15, 0, r6, c3, c0, 0 @ Domain ID 132 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
133 mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 133 mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0
134 mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 134 mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1
135 mrc p15, 0, r9, c1, c0, 1 @ auxillary control register 135 mrc p15, 0, r9, c1, c0, 1 @ auxiliary control register
136 mrc p15, 0, r10, c1, c0, 2 @ co-processor access control 136 mrc p15, 0, r10, c1, c0, 2 @ co-processor access control
137 mrc p15, 0, r11, c1, c0, 0 @ control register 137 mrc p15, 0, r11, c1, c0, 0 @ control register
138 stmia r0, {r4 - r11} 138 stmia r0, {r4 - r11}
@@ -151,7 +151,7 @@ ENTRY(cpu_v6_do_resume)
151 mcr p15, 0, r6, c3, c0, 0 @ Domain ID 151 mcr p15, 0, r6, c3, c0, 0 @ Domain ID
152 mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 152 mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0
153 mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 153 mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1
154 mcr p15, 0, r9, c1, c0, 1 @ auxillary control register 154 mcr p15, 0, r9, c1, c0, 1 @ auxiliary control register
155 mcr p15, 0, r10, c1, c0, 2 @ co-processor access control 155 mcr p15, 0, r10, c1, c0, 2 @ co-processor access control
156 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 156 mcr p15, 0, ip, c2, c0, 2 @ TTB control register
157 mcr p15, 0, ip, c7, c5, 4 @ ISB 157 mcr p15, 0, ip, c7, c5, 4 @ ISB
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 262fa88a7439..c35618e42f6f 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -237,7 +237,7 @@ ENTRY(cpu_v7_do_resume)
237 mcr p15, 0, r7, c2, c0, 0 @ TTB 0 237 mcr p15, 0, r7, c2, c0, 0 @ TTB 0
238 mcr p15, 0, r8, c2, c0, 1 @ TTB 1 238 mcr p15, 0, r8, c2, c0, 1 @ TTB 1
239 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 239 mcr p15, 0, ip, c2, c0, 2 @ TTB control register
240 mcr p15, 0, r10, c1, c0, 1 @ Auxillary control register 240 mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register
241 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control 241 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control
242 ldr r4, =PRRR @ PRRR 242 ldr r4, =PRRR @ PRRR
243 ldr r5, =NMRR @ NMRR 243 ldr r5, =NMRR @ NMRR
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index ce81481becf1..4268a2bdf145 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -13,7 +13,7 @@
13 13
14/* 14/*
15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module. 15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module.
16 * The CPUFREQ driver is for controling CPU frequency. It allows you to change 16 * The CPUFREQ driver is for controlling CPU frequency. It allows you to change
17 * the CPU clock speed on the fly. 17 * the CPU clock speed on the fly.
18 */ 18 */
19 19
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c
index 6561c9df5f0d..ccc789e21daa 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/plat-mxc/devices/platform-fec.c
@@ -53,7 +53,7 @@ struct platform_device *__init imx_add_fec(
53 struct resource res[] = { 53 struct resource res[] = {
54 { 54 {
55 .start = data->iobase, 55 .start = data->iobase,
56 .end = data->iobase + SZ_4K, 56 .end = data->iobase + SZ_4K - 1,
57 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
58 }, { 58 }, {
59 .start = data->irq, 59 .start = data->irq,
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
index 10653cc8d1fa..805336fdc252 100644
--- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
+++ b/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
@@ -27,7 +27,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
27 struct resource res[] = { 27 struct resource res[] = {
28 { 28 {
29 .start = data->iobase, 29 .start = data->iobase,
30 .end = data->iobase + SZ_16K, 30 .end = data->iobase + SZ_16K - 1,
31 .flags = IORESOURCE_MEM, 31 .flags = IORESOURCE_MEM,
32 }, { 32 }, {
33 .start = data->irq, 33 .start = data->irq,
diff --git a/arch/arm/plat-mxc/include/mach/audmux.h b/arch/arm/plat-mxc/include/mach/audmux.h
index 5cd6466964af..6fda788ed0e9 100644
--- a/arch/arm/plat-mxc/include/mach/audmux.h
+++ b/arch/arm/plat-mxc/include/mach/audmux.h
@@ -15,6 +15,14 @@
15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4 15#define MX31_AUDMUX_PORT5_SSI_PINS_5 4
16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5 16#define MX31_AUDMUX_PORT6_SSI_PINS_6 5
17 17
18#define MX51_AUDMUX_PORT1_SSI0 0
19#define MX51_AUDMUX_PORT2_SSI1 1
20#define MX51_AUDMUX_PORT3 2
21#define MX51_AUDMUX_PORT4 3
22#define MX51_AUDMUX_PORT5 4
23#define MX51_AUDMUX_PORT6 5
24#define MX51_AUDMUX_PORT7 6
25
18/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ 26/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
19#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) 27#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
20#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8) 28#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8)
@@ -28,7 +36,7 @@
28#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30) 36#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
29#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31) 37#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31)
30 38
31/* Register definitions for the i.MX25/31/35 Digital Audio Multiplexer */ 39/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
32#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31) 40#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
33#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) 41#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
34#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) 42#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index bd9bb9799141..2e49e71b1b98 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -33,9 +33,9 @@
33 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
34 .endm 34 .endm
35 35
36 @ this macro checks which interrupt occured 36 @ this macro checks which interrupt occurred
37 @ and returns its number in irqnr 37 @ and returns its number in irqnr
38 @ and returns if an interrupt occured in irqstat 38 @ and returns if an interrupt occurred in irqstat
39 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 39 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
40#ifndef CONFIG_MXC_TZIC 40#ifndef CONFIG_MXC_TZIC
41 @ Load offset & priority of the highest priority 41 @ Load offset & priority of the highest priority
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
index c4f116d214f2..7a9b20abda09 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
@@ -90,12 +90,12 @@
90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31) 90#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17) 91#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18) 92#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19) 93#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 19)
94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20) 94#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 20)
95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21) 95#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 21)
96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22) 96#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 22)
97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23) 97#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 23)
98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24) 98#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 24)
99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25) 99#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26) 100#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27) 101#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h
index aaec2a6e7b3a..5f2da75a47f4 100644
--- a/arch/arm/plat-mxc/include/mach/mx50.h
+++ b/arch/arm/plat-mxc/include/mach/mx50.h
@@ -282,4 +282,8 @@
282#define MX50_INT_APBHDMA_CHAN6 116 282#define MX50_INT_APBHDMA_CHAN6 116
283#define MX50_INT_APBHDMA_CHAN7 117 283#define MX50_INT_APBHDMA_CHAN7 117
284 284
285#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
286extern int mx50_revision(void);
287#endif
288
285#endif /* ifndef __MACH_MX50_H__ */ 289#endif /* ifndef __MACH_MX50_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
index 1eb339e6c857..dede19a766ff 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/plat-mxc/include/mach/mx51.h
@@ -347,6 +347,7 @@
347 347
348#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) 348#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
349extern int mx51_revision(void); 349extern int mx51_revision(void);
350extern void mx51_display_revision(void);
350#endif 351#endif
351 352
352/* tape-out 1 defines */ 353/* tape-out 1 defines */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 7e072637eefa..1aea818d9d31 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -51,6 +51,20 @@
51#define IMX_CHIP_REVISION_3_3 0x33 51#define IMX_CHIP_REVISION_3_3 0x33
52#define IMX_CHIP_REVISION_UNKNOWN 0xff 52#define IMX_CHIP_REVISION_UNKNOWN 0xff
53 53
54#define IMX_CHIP_REVISION_1_0_STRING "1.0"
55#define IMX_CHIP_REVISION_1_1_STRING "1.1"
56#define IMX_CHIP_REVISION_1_2_STRING "1.2"
57#define IMX_CHIP_REVISION_1_3_STRING "1.3"
58#define IMX_CHIP_REVISION_2_0_STRING "2.0"
59#define IMX_CHIP_REVISION_2_1_STRING "2.1"
60#define IMX_CHIP_REVISION_2_2_STRING "2.2"
61#define IMX_CHIP_REVISION_2_3_STRING "2.3"
62#define IMX_CHIP_REVISION_3_0_STRING "3.0"
63#define IMX_CHIP_REVISION_3_1_STRING "3.1"
64#define IMX_CHIP_REVISION_3_2_STRING "3.2"
65#define IMX_CHIP_REVISION_3_3_STRING "3.3"
66#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
67
54#ifndef __ASSEMBLY__ 68#ifndef __ASSEMBLY__
55extern unsigned int __mxc_cpu_type; 69extern unsigned int __mxc_cpu_type;
56#endif 70#endif
@@ -181,6 +195,15 @@ struct cpu_op {
181 u32 cpu_rate; 195 u32 cpu_rate;
182}; 196};
183 197
198int tzic_enable_wake(int is_idle);
199enum mxc_cpu_pwr_mode {
200 WAIT_CLOCKED, /* wfi only */
201 WAIT_UNCLOCKED, /* WAIT */
202 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
203 STOP_POWER_ON, /* just STOP */
204 STOP_POWER_OFF, /* STOP + SRPG */
205};
206
184extern struct cpu_op *(*get_cpu_op)(int *op); 207extern struct cpu_op *(*get_cpu_op)(int *op);
185#endif 208#endif
186 209
diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h
index 04c0d060d814..6bb96ef1600b 100644
--- a/arch/arm/plat-mxc/include/mach/mxc_nand.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h
@@ -24,7 +24,7 @@
24 24
25struct mxc_nand_platform_data { 25struct mxc_nand_platform_data {
26 unsigned int width; /* data bus width in bytes */ 26 unsigned int width; /* data bus width in bytes */
27 unsigned int hw_ecc:1; /* 0 if supress hardware ECC */ 27 unsigned int hw_ecc:1; /* 0 if suppress hardware ECC */
28 unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */ 28 unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */
29 struct mtd_partition *parts; /* partition table */ 29 struct mtd_partition *parts; /* partition table */
30 int nr_parts; /* size of parts */ 30 int nr_parts; /* size of parts */
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 95be51bfe9a9..0417da9f710d 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -20,6 +20,8 @@
20#include <mach/hardware.h> 20#include <mach/hardware.h>
21#include <mach/common.h> 21#include <mach/common.h>
22 22
23extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
24
23static inline void arch_idle(void) 25static inline void arch_idle(void)
24{ 26{
25#ifdef CONFIG_ARCH_MXC91231 27#ifdef CONFIG_ARCH_MXC91231
@@ -54,7 +56,9 @@ static inline void arch_idle(void)
54 "orr %0, %0, #0x00000004\n" 56 "orr %0, %0, #0x00000004\n"
55 "mcr p15, 0, %0, c1, c0, 0\n" 57 "mcr p15, 0, %0, c1, c0, 0\n"
56 : "=r" (reg)); 58 : "=r" (reg));
57 } else 59 } else if (cpu_is_mx51())
60 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
61 else
58 cpu_do_idle(); 62 cpu_do_idle();
59} 63}
60 64
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 9f0c2610595e..2237ff8b434f 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -27,6 +27,7 @@
27#include <linux/clk.h> 27#include <linux/clk.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/sched_clock.h>
30#include <asm/mach/time.h> 31#include <asm/mach/time.h>
31#include <mach/common.h> 32#include <mach/common.h>
32 33
@@ -105,6 +106,11 @@ static void gpt_irq_acknowledge(void)
105 __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); 106 __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT);
106} 107}
107 108
109static cycle_t dummy_get_cycles(struct clocksource *cs)
110{
111 return 0;
112}
113
108static cycle_t mx1_2_get_cycles(struct clocksource *cs) 114static cycle_t mx1_2_get_cycles(struct clocksource *cs)
109{ 115{
110 return __raw_readl(timer_base + MX1_2_TCN); 116 return __raw_readl(timer_base + MX1_2_TCN);
@@ -118,18 +124,35 @@ static cycle_t v2_get_cycles(struct clocksource *cs)
118static struct clocksource clocksource_mxc = { 124static struct clocksource clocksource_mxc = {
119 .name = "mxc_timer1", 125 .name = "mxc_timer1",
120 .rating = 200, 126 .rating = 200,
121 .read = mx1_2_get_cycles, 127 .read = dummy_get_cycles,
122 .mask = CLOCKSOURCE_MASK(32), 128 .mask = CLOCKSOURCE_MASK(32),
123 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 129 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
124}; 130};
125 131
132static DEFINE_CLOCK_DATA(cd);
133unsigned long long notrace sched_clock(void)
134{
135 cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
136
137 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
138}
139
140static void notrace mxc_update_sched_clock(void)
141{
142 cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
143 update_sched_clock(&cd, cyc, (u32)~0);
144}
145
126static int __init mxc_clocksource_init(struct clk *timer_clk) 146static int __init mxc_clocksource_init(struct clk *timer_clk)
127{ 147{
128 unsigned int c = clk_get_rate(timer_clk); 148 unsigned int c = clk_get_rate(timer_clk);
129 149
130 if (timer_is_v2()) 150 if (timer_is_v2())
131 clocksource_mxc.read = v2_get_cycles; 151 clocksource_mxc.read = v2_get_cycles;
152 else
153 clocksource_mxc.read = mx1_2_get_cycles;
132 154
155 init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
133 clocksource_register_hz(&clocksource_mxc, c); 156 clocksource_register_hz(&clocksource_mxc, c);
134 157
135 return 0; 158 return 0;
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 7d9f815cedec..ea28f98d5d6a 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -280,7 +280,7 @@ EXPORT_SYMBOL(omap_dsp_get_mempool_base);
280 * Claiming GPIOs, and setting their direction and initial values, is the 280 * Claiming GPIOs, and setting their direction and initial values, is the
281 * responsibility of the device drivers. So is responding to probe(). 281 * responsibility of the device drivers. So is responding to probe().
282 * 282 *
283 * Board-specific knowlege like creating devices or pin setup is to be 283 * Board-specific knowledge like creating devices or pin setup is to be
284 * kept out of drivers as much as possible. In particular, pin setup 284 * kept out of drivers as much as possible. In particular, pin setup
285 * may be handled by the boot loader, and drivers should expect it will 285 * may be handled by the boot loader, and drivers should expect it will
286 * normally have been done by the time they're probed. 286 * normally have been done by the time they're probed.
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 2ec3b5d9f214..c22217c2ee5f 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1019,7 +1019,7 @@ EXPORT_SYMBOL(omap_set_dma_callback);
1019 * If the channel is running the caller must disable interrupts prior calling 1019 * If the channel is running the caller must disable interrupts prior calling
1020 * this function and process the returned value before re-enabling interrupt to 1020 * this function and process the returned value before re-enabling interrupt to
1021 * prevent races with the interrupt handler. Note that in continuous mode there 1021 * prevent races with the interrupt handler. Note that in continuous mode there
1022 * is a chance for CSSA_L register overflow inbetween the two reads resulting 1022 * is a chance for CSSA_L register overflow between the two reads resulting
1023 * in incorrect return value. 1023 * in incorrect return value.
1024 */ 1024 */
1025dma_addr_t omap_get_dma_src_pos(int lch) 1025dma_addr_t omap_get_dma_src_pos(int lch)
@@ -1046,7 +1046,7 @@ EXPORT_SYMBOL(omap_get_dma_src_pos);
1046 * If the channel is running the caller must disable interrupts prior calling 1046 * If the channel is running the caller must disable interrupts prior calling
1047 * this function and process the returned value before re-enabling interrupt to 1047 * this function and process the returned value before re-enabling interrupt to
1048 * prevent races with the interrupt handler. Note that in continuous mode there 1048 * prevent races with the interrupt handler. Note that in continuous mode there
1049 * is a chance for CDSA_L register overflow inbetween the two reads resulting 1049 * is a chance for CDSA_L register overflow between the two reads resulting
1050 * in incorrect return value. 1050 * in incorrect return value.
1051 */ 1051 */
1052dma_addr_t omap_get_dma_dst_pos(int lch) 1052dma_addr_t omap_get_dma_dst_pos(int lch)
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index d6f9fa0f62af..cac2e8ac6968 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -93,7 +93,7 @@ extern void omap_gpio_restore_context(void);
93/* Wrappers for "new style" GPIO calls, using the new infrastructure 93/* Wrappers for "new style" GPIO calls, using the new infrastructure
94 * which lets us plug in FPGA, I2C, and other implementations. 94 * which lets us plug in FPGA, I2C, and other implementations.
95 * * 95 * *
96 * The original OMAP-specfic calls should eventually be removed. 96 * The original OMAP-specific calls should eventually be removed.
97 */ 97 */
98 98
99#include <linux/errno.h> 99#include <linux/errno.h>
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 12b316165037..1527929b445a 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -90,7 +90,7 @@ enum omap_ecc {
90 /* 1-bit ecc: stored at end of spare area */ 90 /* 1-bit ecc: stored at end of spare area */
91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */ 91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */ 92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
93 /* 1-bit ecc: stored at begining of spare area as romcode */ 93 /* 1-bit ecc: stored at beginning of spare area as romcode */
94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */ 94 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
95}; 95};
96 96
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index d598d9fd65ac..5587acf0eb2c 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -1103,7 +1103,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
1103 /* resend */ 1103 /* resend */
1104 return -1; 1104 return -1;
1105 } else { 1105 } else {
1106 /* wait for recieve confirmation */ 1106 /* wait for receive confirmation */
1107 int attemps = 0; 1107 int attemps = 0;
1108 while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { 1108 while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
1109 if (attemps++ > 1000) { 1109 if (attemps++ > 1000) {
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 75f656471240..89e68e07b0a8 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -434,7 +434,7 @@ typedef unsigned long mfp_cfg_t;
434 * 434 *
435 * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which 435 * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which
436 * represents a range of MFP pins from "start" to "end", with the offset 436 * represents a range of MFP pins from "start" to "end", with the offset
437 * begining at "offset", to define a single pin, let "end" = -1. 437 * beginning at "offset", to define a single pin, let "end" = -1.
438 * 438 *
439 * use 439 * use
440 * 440 *
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index c2064c308719..0291bd6e236e 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o
23obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o 23obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o
24obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o 24obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
25 25
26# Architecture dependant builds 26# Architecture dependent builds
27 27
28obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 28obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
29obj-$(CONFIG_PM) += pm.o 29obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/plat-s3c24xx/cpu-freq.c b/arch/arm/plat-s3c24xx/cpu-freq.c
index eea75ff81d15..b3d3d0278997 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq.c
@@ -455,7 +455,7 @@ static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
455 455
456 /* whilst we will be called later on, we try and re-set the 456 /* whilst we will be called later on, we try and re-set the
457 * cpu frequencies as soon as possible so that we do not end 457 * cpu frequencies as soon as possible so that we do not end
458 * up resuming devices and then immediatley having to re-set 458 * up resuming devices and then immediately having to re-set
459 * a number of settings once these devices have restarted. 459 * a number of settings once these devices have restarted.
460 * 460 *
461 * as a note, it is expected devices are not used until they 461 * as a note, it is expected devices are not used until they
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 6ad274e7593d..27ea852e3370 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -557,7 +557,7 @@ s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan)
557 break; 557 break;
558 558
559 case S3C2410_DMALOAD_1LOADED_1RUNNING: 559 case S3C2410_DMALOAD_1LOADED_1RUNNING:
560 /* I belive in this case we do not have anything to do 560 /* I believe in this case we do not have anything to do
561 * until the next buffer comes along, and we turn off the 561 * until the next buffer comes along, and we turn off the
562 * reload */ 562 * reload */
563 return; 563 return;
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index 46dd078147d8..cd6d67c8382a 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -208,7 +208,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
208 } 208 }
209 209
210 /* 210 /*
211 * chained GPIO irq has been sucessfully registered, allocate new gpio 211 * chained GPIO irq has been successfully registered, allocate new gpio
212 * int group and assign irq nubmers 212 * int group and assign irq nubmers
213 */ 213 */
214 214
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 9a82b8874918..983c578b8276 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -21,7 +21,7 @@ struct clk;
21 * @set_parent: set the clock's parent, see clk_set_parent(). 21 * @set_parent: set the clock's parent, see clk_set_parent().
22 * 22 *
23 * Group the common clock implementations together so that we 23 * Group the common clock implementations together so that we
24 * don't have to keep setting the same fiels again. We leave 24 * don't have to keep setting the same fields again. We leave
25 * enable in struct clk. 25 * enable in struct clk.
26 * 26 *
27 * Adding an extra layer of indirection into the process should 27 * Adding an extra layer of indirection into the process should
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 5603db0b79bc..3ad8386599c3 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -114,7 +114,7 @@ extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
114 * of control per GPIO, generally in the form of: 114 * of control per GPIO, generally in the form of:
115 * 0000 = Input 115 * 0000 = Input
116 * 0001 = Output 116 * 0001 = Output
117 * others = Special functions (dependant on bank) 117 * others = Special functions (dependent on bank)
118 * 118 *
119 * Note, since the code to deal with the case where there are two control 119 * Note, since the code to deal with the case where there are two control
120 * registers instead of one, we do not have a separate set of functions for 120 * registers instead of one, we do not have a separate set of functions for
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 5e04fa6eda74..1762dcb4cb9e 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -125,7 +125,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
125 * 125 *
126 * These values control the state of the weak pull-{up,down} resistors 126 * These values control the state of the weak pull-{up,down} resistors
127 * available on most pins on the S3C series. Not all chips support both 127 * available on most pins on the S3C series. Not all chips support both
128 * up or down settings, and it may be dependant on the chip that is being 128 * up or down settings, and it may be dependent on the chip that is being
129 * used to whether the particular mode is available. 129 * used to whether the particular mode is available.
130 */ 130 */
131#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) 131#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00)
@@ -138,7 +138,7 @@ extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
138 * @pull: The configuration for the pull resistor. 138 * @pull: The configuration for the pull resistor.
139 * 139 *
140 * This function sets the state of the pull-{up,down} resistor for the 140 * This function sets the state of the pull-{up,down} resistor for the
141 * specified pin. It will return 0 if successfull, or a negative error 141 * specified pin. It will return 0 if successful, or a negative error
142 * code if the pin cannot support the requested pull setting. 142 * code if the pin cannot support the requested pull setting.
143 * 143 *
144 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. 144 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
@@ -202,7 +202,7 @@ extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
202 * @drvstr: The new value of the driver strength 202 * @drvstr: The new value of the driver strength
203 * 203 *
204 * This function sets the driver strength value for the specified pin. 204 * This function sets the driver strength value for the specified pin.
205 * It will return 0 if successfull, or a negative error code if the pin 205 * It will return 0 if successful, or a negative error code if the pin
206 * cannot support the requested setting. 206 * cannot support the requested setting.
207*/ 207*/
208extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); 208extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index dac35d0a711d..8cad4cf19c3c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -108,7 +108,7 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
108 * of control per GPIO, generally in the form of: 108 * of control per GPIO, generally in the form of:
109 * 0000 = Input 109 * 0000 = Input
110 * 0001 = Output 110 * 0001 = Output
111 * others = Special functions (dependant on bank) 111 * others = Special functions (dependent on bank)
112 * 112 *
113 * Note, since the code to deal with the case where there are two control 113 * Note, since the code to deal with the case where there are two control
114 * registers instead of one, we do not have a separate set of function 114 * registers instead of one, we do not have a separate set of function
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index b0bdf16549d5..058e09654fe8 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -57,7 +57,7 @@ enum clk_types {
57 * @cfg_gpio: Configure the GPIO for a specific card bit-width 57 * @cfg_gpio: Configure the GPIO for a specific card bit-width
58 * @cfg_card: Configure the interface for a specific card and speed. This 58 * @cfg_card: Configure the interface for a specific card and speed. This
59 * is necessary the controllers and/or GPIO blocks require the 59 * is necessary the controllers and/or GPIO blocks require the
60 * changing of driver-strength and other controls dependant on 60 * changing of driver-strength and other controls dependent on
61 * the card and speed of operation. 61 * the card and speed of operation.
62 * 62 *
63 * Initialisation data specific to either the machine or the platform 63 * Initialisation data specific to either the machine or the platform
@@ -108,7 +108,7 @@ extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
108extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; 108extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
109extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; 109extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata;
110 110
111/* Helper function availablity */ 111/* Helper function availability */
112 112
113extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 113extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
114extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 114extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c
index b4ff8d74ac40..f85638c6f5ae 100644
--- a/arch/arm/plat-samsung/s3c-pl330.c
+++ b/arch/arm/plat-samsung/s3c-pl330.c
@@ -68,7 +68,7 @@ struct s3c_pl330_xfer {
68 * @req: Two requests to communicate with the PL330 engine. 68 * @req: Two requests to communicate with the PL330 engine.
69 * @callback_fn: Callback function to the client. 69 * @callback_fn: Callback function to the client.
70 * @rqcfg: Channel configuration for the xfers. 70 * @rqcfg: Channel configuration for the xfers.
71 * @xfer_head: Pointer to the xfer to be next excecuted. 71 * @xfer_head: Pointer to the xfer to be next executed.
72 * @dmac: Pointer to the DMAC that manages this channel, NULL if the 72 * @dmac: Pointer to the DMAC that manages this channel, NULL if the
73 * channel is available to be acquired. 73 * channel is available to be acquired.
74 * @client: Client of this channel. NULL if the 74 * @client: Client of this channel. NULL if the
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
index 2ae6606930a6..fcc0d0ad4a1f 100644
--- a/arch/arm/plat-spear/include/plat/clock.h
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -89,7 +89,7 @@ struct rate_config {
89 * @sibling: node for list of clocks having same parents 89 * @sibling: node for list of clocks having same parents
90 * @private_data: clock specific private data 90 * @private_data: clock specific private data
91 * @node: list to maintain clocks linearly 91 * @node: list to maintain clocks linearly
92 * @cl: clocklook up assoicated with this clock 92 * @cl: clocklook up associated with this clock
93 * @dent: object for debugfs 93 * @dent: object for debugfs
94 */ 94 */
95struct clk { 95struct clk {