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-rw-r--r--arch/arm/boot/compressed/head-sa1100.S2
-rw-r--r--arch/arm/include/asm/atomic.h26
-rw-r--r--arch/arm/include/asm/pci.h2
-rw-r--r--arch/arm/include/asm/unified.h4
-rw-r--r--arch/arm/kernel/entry-armv.S19
-rw-r--r--arch/arm/kernel/entry-header.S14
-rw-r--r--arch/arm/kernel/vmlinux.lds.S1
-rw-r--r--arch/arm/lib/lib1funcs.S2
-rw-r--r--arch/arm/lib/sha1.S2
-rw-r--r--arch/arm/mach-sa1100/include/mach/assabet.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/memory.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/neponset.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/system.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-sa1100/pm.c2
-rw-r--r--arch/arm/mach-sa1100/time.c2
-rw-r--r--arch/arm/mm/proc-xscale.S2
-rw-r--r--arch/arm/plat-iop/setup.c2
-rw-r--r--arch/arm/plat-omap/include/mach/system.h2
20 files changed, 51 insertions, 43 deletions
diff --git a/arch/arm/boot/compressed/head-sa1100.S b/arch/arm/boot/compressed/head-sa1100.S
index 4c8c0e46027d..6179d94dd5c6 100644
--- a/arch/arm/boot/compressed/head-sa1100.S
+++ b/arch/arm/boot/compressed/head-sa1100.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/boot/compressed/head-sa1100.S 2 * linux/arch/arm/boot/compressed/head-sa1100.S
3 * 3 *
4 * Copyright (C) 1999 Nicolas Pitre <nico@cam.org> 4 * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net>
5 * 5 *
6 * SA1100 specific tweaks. This is merged into head.S by the linker. 6 * SA1100 specific tweaks. This is merged into head.S by the linker.
7 * 7 *
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 9ed2377fe8e5..d0daeab2234e 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -19,31 +19,21 @@
19 19
20#ifdef __KERNEL__ 20#ifdef __KERNEL__
21 21
22/*
23 * On ARM, ordinary assignment (str instruction) doesn't clear the local
24 * strex/ldrex monitor on some implementations. The reason we can use it for
25 * atomic_set() is the clrex or dummy strex done on every exception return.
26 */
22#define atomic_read(v) ((v)->counter) 27#define atomic_read(v) ((v)->counter)
28#define atomic_set(v,i) (((v)->counter) = (i))
23 29
24#if __LINUX_ARM_ARCH__ >= 6 30#if __LINUX_ARM_ARCH__ >= 6
25 31
26/* 32/*
27 * ARMv6 UP and SMP safe atomic ops. We use load exclusive and 33 * ARMv6 UP and SMP safe atomic ops. We use load exclusive and
28 * store exclusive to ensure that these are atomic. We may loop 34 * store exclusive to ensure that these are atomic. We may loop
29 * to ensure that the update happens. Writing to 'v->counter' 35 * to ensure that the update happens.
30 * without using the following operations WILL break the atomic
31 * nature of these ops.
32 */ 36 */
33static inline void atomic_set(atomic_t *v, int i)
34{
35 unsigned long tmp;
36
37 __asm__ __volatile__("@ atomic_set\n"
38"1: ldrex %0, [%1]\n"
39" strex %0, %2, [%1]\n"
40" teq %0, #0\n"
41" bne 1b"
42 : "=&r" (tmp)
43 : "r" (&v->counter), "r" (i)
44 : "cc");
45}
46
47static inline void atomic_add(int i, atomic_t *v) 37static inline void atomic_add(int i, atomic_t *v)
48{ 38{
49 unsigned long tmp; 39 unsigned long tmp;
@@ -163,8 +153,6 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
163#error SMP not supported on pre-ARMv6 CPUs 153#error SMP not supported on pre-ARMv6 CPUs
164#endif 154#endif
165 155
166#define atomic_set(v,i) (((v)->counter) = (i))
167
168static inline int atomic_add_return(int i, atomic_t *v) 156static inline int atomic_add_return(int i, atomic_t *v)
169{ 157{
170 unsigned long flags; 158 unsigned long flags;
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 0abf386ba3d3..226cddd2fb65 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -6,8 +6,6 @@
6 6
7#include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 7#include <mach/hardware.h> /* for PCIBIOS_MIN_* */
8 8
9#define pcibios_scan_all_fns(a, b) 0
10
11#ifdef CONFIG_PCI_HOST_ITE8152 9#ifdef CONFIG_PCI_HOST_ITE8152
12/* ITE bridge requires setting latency timer to avoid early bus access 10/* ITE bridge requires setting latency timer to avoid early bus access
13 termination by PIC bus mater devices 11 termination by PIC bus mater devices
diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h
index 073e85b9b961..bc631161e9c6 100644
--- a/arch/arm/include/asm/unified.h
+++ b/arch/arm/include/asm/unified.h
@@ -35,7 +35,9 @@
35 35
36#define ARM(x...) 36#define ARM(x...)
37#define THUMB(x...) x 37#define THUMB(x...) x
38#ifdef __ASSEMBLY__
38#define W(instr) instr.w 39#define W(instr) instr.w
40#endif
39#define BSYM(sym) sym + 1 41#define BSYM(sym) sym + 1
40 42
41#else /* !CONFIG_THUMB2_KERNEL */ 43#else /* !CONFIG_THUMB2_KERNEL */
@@ -45,7 +47,9 @@
45 47
46#define ARM(x...) x 48#define ARM(x...) x
47#define THUMB(x...) 49#define THUMB(x...)
50#ifdef __ASSEMBLY__
48#define W(instr) instr 51#define W(instr) instr
52#endif
49#define BSYM(sym) sym 53#define BSYM(sym) sym
50 54
51#endif /* CONFIG_THUMB2_KERNEL */ 55#endif /* CONFIG_THUMB2_KERNEL */
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 3d727a8a23bc..0a2ba51cf35d 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -272,7 +272,15 @@ __und_svc:
272 @ 272 @
273 @ r0 - instruction 273 @ r0 - instruction
274 @ 274 @
275#ifndef CONFIG_THUMB2_KERNEL
275 ldr r0, [r2, #-4] 276 ldr r0, [r2, #-4]
277#else
278 ldrh r0, [r2, #-2] @ Thumb instruction at LR - 2
279 and r9, r0, #0xf800
280 cmp r9, #0xe800 @ 32-bit instruction if xx >= 0
281 ldrhhs r9, [r2] @ bottom 16 bits
282 orrhs r0, r9, r0, lsl #16
283#endif
276 adr r9, BSYM(1f) 284 adr r9, BSYM(1f)
277 bl call_fpe 285 bl call_fpe
278 286
@@ -678,7 +686,9 @@ ENTRY(fp_enter)
678 .word no_fp 686 .word no_fp
679 .previous 687 .previous
680 688
681no_fp: mov pc, lr 689ENTRY(no_fp)
690 mov pc, lr
691ENDPROC(no_fp)
682 692
683__und_usr_unknown: 693__und_usr_unknown:
684 enable_irq 694 enable_irq
@@ -734,13 +744,6 @@ ENTRY(__switch_to)
734#ifdef CONFIG_MMU 744#ifdef CONFIG_MMU
735 ldr r6, [r2, #TI_CPU_DOMAIN] 745 ldr r6, [r2, #TI_CPU_DOMAIN]
736#endif 746#endif
737#if __LINUX_ARM_ARCH__ >= 6
738#ifdef CONFIG_CPU_32v6K
739 clrex
740#else
741 strex r5, r4, [ip] @ Clear exclusive monitor
742#endif
743#endif
744#if defined(CONFIG_HAS_TLS_REG) 747#if defined(CONFIG_HAS_TLS_REG)
745 mcr p15, 0, r3, c13, c0, 3 @ set TLS register 748 mcr p15, 0, r3, c13, c0, 3 @ set TLS register
746#elif !defined(CONFIG_TLS_REG_EMUL) 749#elif !defined(CONFIG_TLS_REG_EMUL)
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index a4eaf4f920c5..e17e3c30d957 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -76,13 +76,25 @@
76#ifndef CONFIG_THUMB2_KERNEL 76#ifndef CONFIG_THUMB2_KERNEL
77 .macro svc_exit, rpsr 77 .macro svc_exit, rpsr
78 msr spsr_cxsf, \rpsr 78 msr spsr_cxsf, \rpsr
79#if defined(CONFIG_CPU_32v6K)
80 clrex @ clear the exclusive monitor
79 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr 81 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
82#elif defined (CONFIG_CPU_V6)
83 ldr r0, [sp]
84 strex r1, r2, [sp] @ clear the exclusive monitor
85 ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
86#endif
80 .endm 87 .endm
81 88
82 .macro restore_user_regs, fast = 0, offset = 0 89 .macro restore_user_regs, fast = 0, offset = 0
83 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 90 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
84 ldr lr, [sp, #\offset + S_PC]! @ get pc 91 ldr lr, [sp, #\offset + S_PC]! @ get pc
85 msr spsr_cxsf, r1 @ save in spsr_svc 92 msr spsr_cxsf, r1 @ save in spsr_svc
93#if defined(CONFIG_CPU_32v6K)
94 clrex @ clear the exclusive monitor
95#elif defined (CONFIG_CPU_V6)
96 strex r1, r2, [sp] @ clear the exclusive monitor
97#endif
86 .if \fast 98 .if \fast
87 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr 99 ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
88 .else 100 .else
@@ -98,6 +110,7 @@
98 .endm 110 .endm
99#else /* CONFIG_THUMB2_KERNEL */ 111#else /* CONFIG_THUMB2_KERNEL */
100 .macro svc_exit, rpsr 112 .macro svc_exit, rpsr
113 clrex @ clear the exclusive monitor
101 ldr r0, [sp, #S_SP] @ top of the stack 114 ldr r0, [sp, #S_SP] @ top of the stack
102 ldr r1, [sp, #S_PC] @ return address 115 ldr r1, [sp, #S_PC] @ return address
103 tst r0, #4 @ orig stack 8-byte aligned? 116 tst r0, #4 @ orig stack 8-byte aligned?
@@ -110,6 +123,7 @@
110 .endm 123 .endm
111 124
112 .macro restore_user_regs, fast = 0, offset = 0 125 .macro restore_user_regs, fast = 0, offset = 0
126 clrex @ clear the exclusive monitor
113 mov r2, sp 127 mov r2, sp
114 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr 128 load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
115 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr 129 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 69371028a202..5cc4812c9763 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -83,6 +83,7 @@ SECTIONS
83 EXIT_TEXT 83 EXIT_TEXT
84 EXIT_DATA 84 EXIT_DATA
85 *(.exitcall.exit) 85 *(.exitcall.exit)
86 *(.discard)
86 *(.ARM.exidx.exit.text) 87 *(.ARM.exidx.exit.text)
87 *(.ARM.extab.exit.text) 88 *(.ARM.extab.exit.text)
88#ifndef CONFIG_HOTPLUG_CPU 89#ifndef CONFIG_HOTPLUG_CPU
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 67964bcfc854..6dc06487f3c3 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines 2 * linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines
3 * 3 *
4 * Author: Nicolas Pitre <nico@cam.org> 4 * Author: Nicolas Pitre <nico@fluxnic.net>
5 * - contributed to gcc-3.4 on Sep 30, 2003 5 * - contributed to gcc-3.4 on Sep 30, 2003
6 * - adapted for the Linux kernel on Oct 2, 2003 6 * - adapted for the Linux kernel on Oct 2, 2003
7 */ 7 */
diff --git a/arch/arm/lib/sha1.S b/arch/arm/lib/sha1.S
index 09b548cac1a4..eb0edb80d7b8 100644
--- a/arch/arm/lib/sha1.S
+++ b/arch/arm/lib/sha1.S
@@ -3,7 +3,7 @@
3 * 3 *
4 * SHA transform optimized for ARM 4 * SHA transform optimized for ARM
5 * 5 *
6 * Copyright: (C) 2005 by Nicolas Pitre <nico@cam.org> 6 * Copyright: (C) 2005 by Nicolas Pitre <nico@fluxnic.net>
7 * Created: September 17, 2005 7 * Created: September 17, 2005
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h
index 3959b20d5d1c..28c2cf50c259 100644
--- a/arch/arm/mach-sa1100/include/mach/assabet.h
+++ b/arch/arm/mach-sa1100/include/mach/assabet.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/assabet.h 2 * arch/arm/mach-sa1100/include/mach/assabet.h
3 * 3 *
4 * Created 2000/06/05 by Nicolas Pitre <nico@cam.org> 4 * Created 2000/06/05 by Nicolas Pitre <nico@fluxnic.net>
5 * 5 *
6 * This file contains the hardware specific definitions for Assabet 6 * This file contains the hardware specific definitions for Assabet
7 * Only include this file from SA1100-specific files. 7 * Only include this file from SA1100-specific files.
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h
index 60711822b125..99f5856d8de4 100644
--- a/arch/arm/mach-sa1100/include/mach/hardware.h
+++ b/arch/arm/mach-sa1100/include/mach/hardware.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/hardware.h 2 * arch/arm/mach-sa1100/include/mach/hardware.h
3 * 3 *
4 * Copyright (C) 1998 Nicolas Pitre <nico@cam.org> 4 * Copyright (C) 1998 Nicolas Pitre <nico@fluxnic.net>
5 * 5 *
6 * This file contains the hardware definitions for SA1100 architecture 6 * This file contains the hardware definitions for SA1100 architecture
7 * 7 *
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h
index e9f8eed900f5..d5277f9bee77 100644
--- a/arch/arm/mach-sa1100/include/mach/memory.h
+++ b/arch/arm/mach-sa1100/include/mach/memory.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/memory.h 2 * arch/arm/mach-sa1100/include/mach/memory.h
3 * 3 *
4 * Copyright (C) 1999-2000 Nicolas Pitre <nico@cam.org> 4 * Copyright (C) 1999-2000 Nicolas Pitre <nico@fluxnic.net>
5 */ 5 */
6 6
7#ifndef __ASM_ARCH_MEMORY_H 7#ifndef __ASM_ARCH_MEMORY_H
diff --git a/arch/arm/mach-sa1100/include/mach/neponset.h b/arch/arm/mach-sa1100/include/mach/neponset.h
index d3f044f92c00..ffe2bc45eed0 100644
--- a/arch/arm/mach-sa1100/include/mach/neponset.h
+++ b/arch/arm/mach-sa1100/include/mach/neponset.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/neponset.h 2 * arch/arm/mach-sa1100/include/mach/neponset.h
3 * 3 *
4 * Created 2000/06/05 by Nicolas Pitre <nico@cam.org> 4 * Created 2000/06/05 by Nicolas Pitre <nico@fluxnic.net>
5 * 5 *
6 * This file contains the hardware specific definitions for Assabet 6 * This file contains the hardware specific definitions for Assabet
7 * Only include this file from SA1100-specific files. 7 * Only include this file from SA1100-specific files.
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index 942b153e251d..ba9da9f7f183 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/system.h 2 * arch/arm/mach-sa1100/include/mach/system.h
3 * 3 *
4 * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> 4 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
5 */ 5 */
6#include <mach/hardware.h> 6#include <mach/hardware.h>
7 7
diff --git a/arch/arm/mach-sa1100/include/mach/uncompress.h b/arch/arm/mach-sa1100/include/mach/uncompress.h
index 714160b03d7a..6cb39ddde656 100644
--- a/arch/arm/mach-sa1100/include/mach/uncompress.h
+++ b/arch/arm/mach-sa1100/include/mach/uncompress.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/uncompress.h 2 * arch/arm/mach-sa1100/include/mach/uncompress.h
3 * 3 *
4 * (C) 1999 Nicolas Pitre <nico@cam.org> 4 * (C) 1999 Nicolas Pitre <nico@fluxnic.net>
5 * 5 *
6 * Reorganised to be machine independent. 6 * Reorganised to be machine independent.
7 */ 7 */
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index 111cce67ad2f..c83fdc80edfd 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -15,7 +15,7 @@
15 * Save more value for the resume function! Support 15 * Save more value for the resume function! Support
16 * Bitsy/Assabet/Freebird board 16 * Bitsy/Assabet/Freebird board
17 * 17 *
18 * 2001-08-29: Nicolas Pitre <nico@cam.org> 18 * 2001-08-29: Nicolas Pitre <nico@fluxnic.net>
19 * Cleaned up, pushed platform dependent stuff 19 * Cleaned up, pushed platform dependent stuff
20 * in the platform specific files. 20 * in the platform specific files.
21 * 21 *
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 711c0295c66f..95d92e8e56a8 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -4,7 +4,7 @@
4 * Copyright (C) 1998 Deborah Wallach. 4 * Copyright (C) 1998 Deborah Wallach.
5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> 5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
6 * 6 *
7 * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> 7 * 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net>
8 * Rewritten: big cleanup, much simpler, better HZ accuracy. 8 * Rewritten: big cleanup, much simpler, better HZ accuracy.
9 * 9 *
10 */ 10 */
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 0cce37b93937..423394260bcb 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -17,7 +17,7 @@
17 * 17 *
18 * 2001 Sep 08: 18 * 2001 Sep 08:
19 * Completely revisited, many important fixes 19 * Completely revisited, many important fixes
20 * Nicolas Pitre <nico@cam.org> 20 * Nicolas Pitre <nico@fluxnic.net>
21 */ 21 */
22 22
23#include <linux/linkage.h> 23#include <linux/linkage.h>
diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c
index 9e573e78176a..bade586fed0f 100644
--- a/arch/arm/plat-iop/setup.c
+++ b/arch/arm/plat-iop/setup.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/plat-iop/setup.c 2 * arch/arm/plat-iop/setup.c
3 * 3 *
4 * Author: Nicolas Pitre <nico@cam.org> 4 * Author: Nicolas Pitre <nico@fluxnic.net>
5 * Copyright (C) 2001 MontaVista Software, Inc. 5 * Copyright (C) 2001 MontaVista Software, Inc.
6 * Copyright (C) 2004 Intel Corporation. 6 * Copyright (C) 2004 Intel Corporation.
7 * 7 *
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
index 1060e345423b..ed8ec7477261 100644
--- a/arch/arm/plat-omap/include/mach/system.h
+++ b/arch/arm/plat-omap/include/mach/system.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copied from arch/arm/mach-sa1100/include/mach/system.h 2 * Copied from arch/arm/mach-sa1100/include/mach/system.h
3 * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> 3 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
4 */ 4 */
5#ifndef __ASM_ARCH_SYSTEM_H 5#ifndef __ASM_ARCH_SYSTEM_H
6#define __ASM_ARCH_SYSTEM_H 6#define __ASM_ARCH_SYSTEM_H
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 13:54:50 -0500