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-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c4
-rw-r--r--arch/arm/mach-omap1/board-fsample.c4
-rw-r--r--arch/arm/mach-omap1/board-generic.c4
-rw-r--r--arch/arm/mach-omap1/board-h2.c4
-rw-r--r--arch/arm/mach-omap1/board-h3.c4
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c4
-rw-r--r--arch/arm/mach-omap1/board-innovator.c4
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c4
-rw-r--r--arch/arm/mach-omap1/board-osk.c4
-rw-r--r--arch/arm/mach-omap1/board-palmte.c4
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c4
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c4
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c4
-rw-r--r--arch/arm/mach-omap1/board-sx1.c4
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c4
-rw-r--r--arch/arm/mach-omap1/irq.c2
-rw-r--r--arch/arm/mach-omap1/time.c6
-rw-r--r--arch/arm/mach-omap1/timer32k.c4
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c6
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c4
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c4
-rw-r--r--arch/arm/mach-omap2/board-apollon.c4
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c4
-rw-r--r--arch/arm/mach-omap2/board-cm-t3517.c4
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c8
-rw-r--r--arch/arm/mach-omap2/board-generic.c4
-rw-r--r--arch/arm/mach-omap2/board-h4.c4
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c8
-rw-r--r--arch/arm/mach-omap2/board-ldp.c4
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c12
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c9
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c4
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c8
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c3
-rw-r--r--arch/arm/mach-omap2/board-overo.c4
-rw-r--r--arch/arm/mach-omap2/board-rm680.c4
-rw-r--r--arch/arm/mach-omap2/board-rx51.c4
-rw-r--r--arch/arm/mach-omap2/board-ti8168evm.c9
-rw-r--r--arch/arm/mach-omap2/board-zoom.c8
-rw-r--r--arch/arm/mach-omap2/io.c17
-rw-r--r--arch/arm/mach-omap2/irq.c32
-rw-r--r--arch/arm/mach-omap2/omap4-common.c10
-rw-r--r--arch/arm/mach-omap2/pm-debug.c28
-rw-r--r--arch/arm/mach-omap2/pm.h6
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-omap2/timer-gp.c266
-rw-r--r--arch/arm/mach-omap2/timer-gp.h16
-rw-r--r--arch/arm/mach-omap2/timer.c342
-rw-r--r--arch/arm/plat-omap/counter_32k.c2
-rw-r--r--arch/arm/plat-omap/dmtimer.c209
-rw-r--r--arch/arm/plat-omap/include/plat/common.h6
-rw-r--r--arch/arm/plat-omap/include/plat/dmtimer.h250
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h6
60 files changed, 749 insertions, 670 deletions
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index de88c9297b68..f1ac7fbf54a9 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value)
138static void __init ams_delta_init_irq(void) 138static void __init ams_delta_init_irq(void)
139{ 139{
140 omap1_init_common_hw(); 140 omap1_init_common_hw();
141 omap_init_irq(); 141 omap1_init_irq();
142} 142}
143 143
144static struct map_desc ams_delta_io_desc[] __initdata = { 144static struct map_desc ams_delta_io_desc[] __initdata = {
@@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
391 .reserve = omap_reserve, 391 .reserve = omap_reserve,
392 .init_irq = ams_delta_init_irq, 392 .init_irq = ams_delta_init_irq,
393 .init_machine = ams_delta_init, 393 .init_machine = ams_delta_init,
394 .timer = &omap_timer, 394 .timer = &omap1_timer,
395MACHINE_END 395MACHINE_END
396 396
397EXPORT_SYMBOL(ams_delta_latch1_write); 397EXPORT_SYMBOL(ams_delta_latch1_write);
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 87f173d93557..a6b1bea50371 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -329,7 +329,7 @@ static void __init omap_fsample_init(void)
329static void __init omap_fsample_init_irq(void) 329static void __init omap_fsample_init_irq(void)
330{ 330{
331 omap1_init_common_hw(); 331 omap1_init_common_hw();
332 omap_init_irq(); 332 omap1_init_irq();
333} 333}
334 334
335/* Only FPGA needs to be mapped here. All others are done with ioremap */ 335/* Only FPGA needs to be mapped here. All others are done with ioremap */
@@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
394 .reserve = omap_reserve, 394 .reserve = omap_reserve,
395 .init_irq = omap_fsample_init_irq, 395 .init_irq = omap_fsample_init_irq,
396 .init_machine = omap_fsample_init, 396 .init_machine = omap_fsample_init,
397 .timer = &omap_timer, 397 .timer = &omap1_timer,
398MACHINE_END 398MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 23f4ab9e2651..04fc356c40fa 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -31,7 +31,7 @@
31static void __init omap_generic_init_irq(void) 31static void __init omap_generic_init_irq(void)
32{ 32{
33 omap1_init_common_hw(); 33 omap1_init_common_hw();
34 omap_init_irq(); 34 omap1_init_irq();
35} 35}
36 36
37/* assume no Mini-AB port */ 37/* assume no Mini-AB port */
@@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
99 .reserve = omap_reserve, 99 .reserve = omap_reserve,
100 .init_irq = omap_generic_init_irq, 100 .init_irq = omap_generic_init_irq,
101 .init_machine = omap_generic_init, 101 .init_machine = omap_generic_init,
102 .timer = &omap_timer, 102 .timer = &omap1_timer,
103MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index ba3bd09c4754..cb7fb1aa3dca 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = {
376static void __init h2_init_irq(void) 376static void __init h2_init_irq(void)
377{ 377{
378 omap1_init_common_hw(); 378 omap1_init_common_hw();
379 omap_init_irq(); 379 omap1_init_irq();
380} 380}
381 381
382static struct omap_usb_config h2_usb_config __initdata = { 382static struct omap_usb_config h2_usb_config __initdata = {
@@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
466 .reserve = omap_reserve, 466 .reserve = omap_reserve,
467 .init_irq = h2_init_irq, 467 .init_irq = h2_init_irq,
468 .init_machine = h2_init, 468 .init_machine = h2_init,
469 .timer = &omap_timer, 469 .timer = &omap1_timer,
470MACHINE_END 470MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index ac48677672ee..31f34875ffad 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -439,7 +439,7 @@ static void __init h3_init(void)
439static void __init h3_init_irq(void) 439static void __init h3_init_irq(void)
440{ 440{
441 omap1_init_common_hw(); 441 omap1_init_common_hw();
442 omap_init_irq(); 442 omap1_init_irq();
443} 443}
444 444
445static void __init h3_map_io(void) 445static void __init h3_map_io(void)
@@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
454 .reserve = omap_reserve, 454 .reserve = omap_reserve,
455 .init_irq = h3_init_irq, 455 .init_irq = h3_init_irq,
456 .init_machine = h3_init, 456 .init_machine = h3_init,
457 .timer = &omap_timer, 457 .timer = &omap1_timer,
458MACHINE_END 458MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index ba05a51f9408..36e06ea7ec65 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void)
605{ 605{
606 printk(KERN_INFO "htcherald_init_irq.\n"); 606 printk(KERN_INFO "htcherald_init_irq.\n");
607 omap1_init_common_hw(); 607 omap1_init_common_hw();
608 omap_init_irq(); 608 omap1_init_irq();
609} 609}
610 610
611MACHINE_START(HERALD, "HTC Herald") 611MACHINE_START(HERALD, "HTC Herald")
@@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald")
616 .reserve = omap_reserve, 616 .reserve = omap_reserve,
617 .init_irq = htcherald_init_irq, 617 .init_irq = htcherald_init_irq,
618 .init_machine = htcherald_init, 618 .init_machine = htcherald_init,
619 .timer = &omap_timer, 619 .timer = &omap1_timer,
620MACHINE_END 620MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 2d9b8cbd7a14..0b1ba462d388 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void)
292static void __init innovator_init_irq(void) 292static void __init innovator_init_irq(void)
293{ 293{
294 omap1_init_common_hw(); 294 omap1_init_common_hw();
295 omap_init_irq(); 295 omap1_init_irq();
296} 296}
297 297
298#ifdef CONFIG_ARCH_OMAP15XX 298#ifdef CONFIG_ARCH_OMAP15XX
@@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
464 .reserve = omap_reserve, 464 .reserve = omap_reserve,
465 .init_irq = innovator_init_irq, 465 .init_irq = innovator_init_irq,
466 .init_machine = innovator_init, 466 .init_machine = innovator_init,
467 .timer = &omap_timer, 467 .timer = &omap1_timer,
468MACHINE_END 468MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index cfd084926146..5469ce247ffe 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void)
51 omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); 51 omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
52 52
53 omap1_init_common_hw(); 53 omap1_init_common_hw();
54 omap_init_irq(); 54 omap1_init_irq();
55} 55}
56 56
57static const unsigned int nokia770_keymap[] = { 57static const unsigned int nokia770_keymap[] = {
@@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
269 .reserve = omap_reserve, 269 .reserve = omap_reserve,
270 .init_irq = omap_nokia770_init_irq, 270 .init_irq = omap_nokia770_init_irq,
271 .init_machine = omap_nokia770_init, 271 .init_machine = omap_nokia770_init,
272 .timer = &omap_timer, 272 .timer = &omap1_timer,
273MACHINE_END 273MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index e68dfde1918e..b08a21380772 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -282,7 +282,7 @@ static void __init osk_init_cf(void)
282static void __init osk_init_irq(void) 282static void __init osk_init_irq(void)
283{ 283{
284 omap1_init_common_hw(); 284 omap1_init_common_hw();
285 omap_init_irq(); 285 omap1_init_irq();
286} 286}
287 287
288static struct omap_usb_config osk_usb_config __initdata = { 288static struct omap_usb_config osk_usb_config __initdata = {
@@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
588 .reserve = omap_reserve, 588 .reserve = omap_reserve,
589 .init_irq = osk_init_irq, 589 .init_irq = osk_init_irq,
590 .init_machine = osk_init, 590 .init_machine = osk_init,
591 .timer = &omap_timer, 591 .timer = &omap1_timer,
592MACHINE_END 592MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index c9d38f47845f..459cb6bfed55 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -62,7 +62,7 @@
62static void __init omap_palmte_init_irq(void) 62static void __init omap_palmte_init_irq(void)
63{ 63{
64 omap1_init_common_hw(); 64 omap1_init_common_hw();
65 omap_init_irq(); 65 omap1_init_irq();
66} 66}
67 67
68static const unsigned int palmte_keymap[] = { 68static const unsigned int palmte_keymap[] = {
@@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
280 .reserve = omap_reserve, 280 .reserve = omap_reserve,
281 .init_irq = omap_palmte_init_irq, 281 .init_irq = omap_palmte_init_irq,
282 .init_machine = omap_palmte_init, 282 .init_machine = omap_palmte_init,
283 .timer = &omap_timer, 283 .timer = &omap1_timer,
284MACHINE_END 284MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index f04f2d36e7d3..b214f45f646c 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = {
266static void __init omap_palmtt_init_irq(void) 266static void __init omap_palmtt_init_irq(void)
267{ 267{
268 omap1_init_common_hw(); 268 omap1_init_common_hw();
269 omap_init_irq(); 269 omap1_init_irq();
270} 270}
271 271
272static struct omap_usb_config palmtt_usb_config __initdata = { 272static struct omap_usb_config palmtt_usb_config __initdata = {
@@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
326 .reserve = omap_reserve, 326 .reserve = omap_reserve,
327 .init_irq = omap_palmtt_init_irq, 327 .init_irq = omap_palmtt_init_irq,
328 .init_machine = omap_palmtt_init, 328 .init_machine = omap_palmtt_init,
329 .timer = &omap_timer, 329 .timer = &omap1_timer,
330MACHINE_END 330MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 45f01d2c3a7a..9b0ea48d35fd 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -61,7 +61,7 @@ static void __init
61omap_palmz71_init_irq(void) 61omap_palmz71_init_irq(void)
62{ 62{
63 omap1_init_common_hw(); 63 omap1_init_common_hw();
64 omap_init_irq(); 64 omap1_init_irq();
65} 65}
66 66
67static const unsigned int palmz71_keymap[] = { 67static const unsigned int palmz71_keymap[] = {
@@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
346 .reserve = omap_reserve, 346 .reserve = omap_reserve,
347 .init_irq = omap_palmz71_init_irq, 347 .init_irq = omap_palmz71_init_irq,
348 .init_machine = omap_palmz71_init, 348 .init_machine = omap_palmz71_init,
349 .timer = &omap_timer, 349 .timer = &omap1_timer,
350MACHINE_END 350MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 3c8ee8489458..67acd4142639 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void)
297static void __init omap_perseus2_init_irq(void) 297static void __init omap_perseus2_init_irq(void)
298{ 298{
299 omap1_init_common_hw(); 299 omap1_init_common_hw();
300 omap_init_irq(); 300 omap1_init_irq();
301} 301}
302/* Only FPGA needs to be mapped here. All others are done with ioremap */ 302/* Only FPGA needs to be mapped here. All others are done with ioremap */
303static struct map_desc omap_perseus2_io_desc[] __initdata = { 303static struct map_desc omap_perseus2_io_desc[] __initdata = {
@@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
355 .reserve = omap_reserve, 355 .reserve = omap_reserve,
356 .init_irq = omap_perseus2_init_irq, 356 .init_irq = omap_perseus2_init_irq,
357 .init_machine = omap_perseus2_init, 357 .init_machine = omap_perseus2_init,
358 .timer = &omap_timer, 358 .timer = &omap1_timer,
359MACHINE_END 359MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 0ad781db4e66..9c3b7c52d9cf 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -411,7 +411,7 @@ static void __init omap_sx1_init(void)
411static void __init omap_sx1_init_irq(void) 411static void __init omap_sx1_init_irq(void)
412{ 412{
413 omap1_init_common_hw(); 413 omap1_init_common_hw();
414 omap_init_irq(); 414 omap1_init_irq();
415} 415}
416/*----------------------------------------*/ 416/*----------------------------------------*/
417 417
@@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
426 .reserve = omap_reserve, 426 .reserve = omap_reserve,
427 .init_irq = omap_sx1_init_irq, 427 .init_irq = omap_sx1_init_irq,
428 .init_machine = omap_sx1_init, 428 .init_machine = omap_sx1_init,
429 .timer = &omap_timer, 429 .timer = &omap1_timer,
430MACHINE_END 430MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 65d24204937a..036edc0ee9b6 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = {
162static void __init voiceblue_init_irq(void) 162static void __init voiceblue_init_irq(void)
163{ 163{
164 omap1_init_common_hw(); 164 omap1_init_common_hw();
165 omap_init_irq(); 165 omap1_init_irq();
166} 166}
167 167
168static void __init voiceblue_map_io(void) 168static void __init voiceblue_map_io(void)
@@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
306 .reserve = omap_reserve, 306 .reserve = omap_reserve,
307 .init_irq = voiceblue_init_irq, 307 .init_irq = voiceblue_init_irq,
308 .init_machine = voiceblue_init, 308 .init_machine = voiceblue_init,
309 .timer = &omap_timer, 309 .timer = &omap1_timer,
310MACHINE_END 310MACHINE_END
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 5d3da7a63af3..e2b9c901ab67 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = {
175 .irq_set_wake = omap_wake_irq, 175 .irq_set_wake = omap_wake_irq,
176}; 176};
177 177
178void __init omap_init_irq(void) 178void __init omap1_init_irq(void)
179{ 179{
180 int i, j; 180 int i, j;
181 181
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 03e1e1062ad4..a1837771e031 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void)
297 * Timer initialization 297 * Timer initialization
298 * --------------------------------------------------------------------------- 298 * ---------------------------------------------------------------------------
299 */ 299 */
300static void __init omap_timer_init(void) 300static void __init omap1_timer_init(void)
301{ 301{
302 if (omap_32k_timer_usable()) { 302 if (omap_32k_timer_usable()) {
303 preferred_sched_clock_init(1); 303 preferred_sched_clock_init(1);
@@ -307,6 +307,6 @@ static void __init omap_timer_init(void)
307 } 307 }
308} 308}
309 309
310struct sys_timer omap_timer = { 310struct sys_timer omap1_timer = {
311 .init = omap_timer_init, 311 .init = omap1_timer_init,
312}; 312};
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 13d7b8f145bd..96604a50c4fe 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void)
183bool __init omap_32k_timer_init(void) 183bool __init omap_32k_timer_init(void)
184{ 184{
185 omap_init_clocksource_32k(); 185 omap_init_clocksource_32k();
186
187#ifdef CONFIG_OMAP_DM_TIMER
188 omap_dm_timer_init();
189#endif
190 omap_init_32k_timer(); 186 omap_init_32k_timer();
191 187
192 return true; 188 return true;
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b14807794401..adbe82d72d4e 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o 7 common.o gpio.o dma.o wd_timer.o
8 8
9omap-2-3-common = irq.o sdrc.o 9omap-2-3-common = irq.o sdrc.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 5de6eac0a725..2028464cf5b9 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
260 .reserve = omap_reserve, 260 .reserve = omap_reserve,
261 .map_io = omap_2430sdp_map_io, 261 .map_io = omap_2430sdp_map_io,
262 .init_early = omap_2430sdp_init_early, 262 .init_early = omap_2430sdp_init_early,
263 .init_irq = omap_init_irq, 263 .init_irq = omap2_init_irq,
264 .init_machine = omap_2430sdp_init, 264 .init_machine = omap_2430sdp_init,
265 .timer = &omap_timer, 265 .timer = &omap2_timer,
266MACHINE_END 266MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 5dac974be625..12fae21346cf 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -804,7 +804,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
804 .reserve = omap_reserve, 804 .reserve = omap_reserve,
805 .map_io = omap3_map_io, 805 .map_io = omap3_map_io,
806 .init_early = omap_3430sdp_init_early, 806 .init_early = omap_3430sdp_init_early,
807 .init_irq = omap_init_irq, 807 .init_irq = omap3_init_irq,
808 .init_machine = omap_3430sdp_init, 808 .init_machine = omap_3430sdp_init,
809 .timer = &omap_timer, 809 .timer = &omap3_timer,
810MACHINE_END 810MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index a5933cc15caa..e4f37b57a0c4 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
219 .reserve = omap_reserve, 219 .reserve = omap_reserve,
220 .map_io = omap3_map_io, 220 .map_io = omap3_map_io,
221 .init_early = omap_sdp_init_early, 221 .init_early = omap_sdp_init_early,
222 .init_irq = omap_init_irq, 222 .init_irq = omap3_init_irq,
223 .init_machine = omap_sdp_init, 223 .init_machine = omap_sdp_init,
224 .timer = &omap_timer, 224 .timer = &omap3_timer,
225MACHINE_END 225MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 39a80624177b..d7df07ef2cea 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -40,7 +40,6 @@
40 40
41#include "mux.h" 41#include "mux.h"
42#include "hsmmc.h" 42#include "hsmmc.h"
43#include "timer-gp.h"
44#include "control.h" 43#include "control.h"
45#include "common-board-devices.h" 44#include "common-board-devices.h"
46 45
@@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void)
295{ 294{
296 omap2_init_common_infrastructure(); 295 omap2_init_common_infrastructure();
297 omap2_init_common_devices(NULL, NULL); 296 omap2_init_common_devices(NULL, NULL);
298#ifdef CONFIG_OMAP_32K_TIMER
299 omap2_gp_clockevent_set_gptimer(1);
300#endif
301} 297}
302 298
303static struct omap_musb_board_data musb_board_data = { 299static struct omap_musb_board_data musb_board_data = {
@@ -768,5 +764,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
768 .init_early = omap_4430sdp_init_early, 764 .init_early = omap_4430sdp_init_early,
769 .init_irq = gic_init_irq, 765 .init_irq = gic_init_irq,
770 .init_machine = omap_4430sdp_init, 766 .init_machine = omap_4430sdp_init,
771 .timer = &omap_timer, 767 .timer = &omap4_timer,
772MACHINE_END 768MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 5e438a77cd72..5f2b55ff04ff 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
104 .reserve = omap_reserve, 104 .reserve = omap_reserve,
105 .map_io = omap3_map_io, 105 .map_io = omap3_map_io,
106 .init_early = am3517_crane_init_early, 106 .init_early = am3517_crane_init_early,
107 .init_irq = omap_init_irq, 107 .init_irq = omap3_init_irq,
108 .init_machine = am3517_crane_init, 108 .init_machine = am3517_crane_init,
109 .timer = &omap_timer, 109 .timer = &omap3_timer,
110MACHINE_END 110MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 63af4171c043..f3006c304150 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
494 .reserve = omap_reserve, 494 .reserve = omap_reserve,
495 .map_io = omap3_map_io, 495 .map_io = omap3_map_io,
496 .init_early = am3517_evm_init_early, 496 .init_early = am3517_evm_init_early,
497 .init_irq = omap_init_irq, 497 .init_irq = omap3_init_irq,
498 .init_machine = am3517_evm_init, 498 .init_machine = am3517_evm_init,
499 .timer = &omap_timer, 499 .timer = &omap3_timer,
500MACHINE_END 500MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index b124bdfb4239..70211703ff9f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
354 .reserve = omap_reserve, 354 .reserve = omap_reserve,
355 .map_io = omap_apollon_map_io, 355 .map_io = omap_apollon_map_io,
356 .init_early = omap_apollon_init_early, 356 .init_early = omap_apollon_init_early,
357 .init_irq = omap_init_irq, 357 .init_irq = omap2_init_irq,
358 .init_machine = omap_apollon_init, 358 .init_machine = omap_apollon_init,
359 .timer = &omap_timer, 359 .timer = &omap2_timer,
360MACHINE_END 360MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index c938984480ed..d76dca788540 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -642,7 +642,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
642 .reserve = omap_reserve, 642 .reserve = omap_reserve,
643 .map_io = omap3_map_io, 643 .map_io = omap3_map_io,
644 .init_early = cm_t35_init_early, 644 .init_early = cm_t35_init_early,
645 .init_irq = omap_init_irq, 645 .init_irq = omap3_init_irq,
646 .init_machine = cm_t35_init, 646 .init_machine = cm_t35_init,
647 .timer = &omap_timer, 647 .timer = &omap3_timer,
648MACHINE_END 648MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index a617a72ef781..05c72f4c1b57 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -303,7 +303,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
303 .reserve = omap_reserve, 303 .reserve = omap_reserve,
304 .map_io = omap3_map_io, 304 .map_io = omap3_map_io,
305 .init_early = cm_t3517_init_early, 305 .init_early = cm_t3517_init_early,
306 .init_irq = omap_init_irq, 306 .init_irq = omap3_init_irq,
307 .init_machine = cm_t3517_init, 307 .init_machine = cm_t3517_init,
308 .timer = &omap_timer, 308 .timer = &omap3_timer,
309MACHINE_END 309MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index ead9c1d1940a..949dbeabab26 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -58,7 +58,6 @@
58 58
59#include "mux.h" 59#include "mux.h"
60#include "hsmmc.h" 60#include "hsmmc.h"
61#include "timer-gp.h"
62#include "common-board-devices.h" 61#include "common-board-devices.h"
63 62
64#define OMAP_DM9000_GPIO_IRQ 25 63#define OMAP_DM9000_GPIO_IRQ 25
@@ -440,10 +439,7 @@ static void __init devkit8000_init_early(void)
440 439
441static void __init devkit8000_init_irq(void) 440static void __init devkit8000_init_irq(void)
442{ 441{
443 omap_init_irq(); 442 omap3_init_irq();
444#ifdef CONFIG_OMAP_32K_TIMER
445 omap2_gp_clockevent_set_gptimer(12);
446#endif
447} 443}
448 444
449#define OMAP_DM9000_BASE 0x2c000000 445#define OMAP_DM9000_BASE 0x2c000000
@@ -709,5 +705,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
709 .init_early = devkit8000_init_early, 705 .init_early = devkit8000_init_early,
710 .init_irq = devkit8000_init_irq, 706 .init_irq = devkit8000_init_irq,
711 .init_machine = devkit8000_init, 707 .init_machine = devkit8000_init,
712 .timer = &omap_timer, 708 .timer = &omap3_secure_timer,
713MACHINE_END 709MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 73e3c31e8508..c6ecf607ebd6 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
70 .reserve = omap_reserve, 70 .reserve = omap_reserve,
71 .map_io = omap_generic_map_io, 71 .map_io = omap_generic_map_io,
72 .init_early = omap_generic_init_early, 72 .init_early = omap_generic_init_early,
73 .init_irq = omap_init_irq, 73 .init_irq = omap2_init_irq,
74 .init_machine = omap_generic_init, 74 .init_machine = omap_generic_init,
75 .timer = &omap_timer, 75 .timer = &omap3_timer,
76MACHINE_END 76MACHINE_END
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index bac7933b8cbb..45de2b319ec9 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void)
298 298
299static void __init omap_h4_init_irq(void) 299static void __init omap_h4_init_irq(void)
300{ 300{
301 omap_init_irq(); 301 omap2_init_irq();
302} 302}
303 303
304static struct at24_platform_data m24c01 = { 304static struct at24_platform_data m24c01 = {
@@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
388 .init_early = omap_h4_init_early, 388 .init_early = omap_h4_init_early,
389 .init_irq = omap_h4_init_irq, 389 .init_irq = omap_h4_init_irq,
390 .init_machine = omap_h4_init, 390 .init_machine = omap_h4_init,
391 .timer = &omap_timer, 391 .timer = &omap2_timer,
392MACHINE_END 392MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 84d284608333..f683835f936c 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -706,9 +706,9 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
706 .reserve = omap_reserve, 706 .reserve = omap_reserve,
707 .map_io = omap3_map_io, 707 .map_io = omap3_map_io,
708 .init_early = igep_init_early, 708 .init_early = igep_init_early,
709 .init_irq = omap_init_irq, 709 .init_irq = omap3_init_irq,
710 .init_machine = igep_init, 710 .init_machine = igep_init,
711 .timer = &omap_timer, 711 .timer = &omap3_timer,
712MACHINE_END 712MACHINE_END
713 713
714MACHINE_START(IGEP0030, "IGEP OMAP3 module") 714MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -716,7 +716,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
716 .reserve = omap_reserve, 716 .reserve = omap_reserve,
717 .map_io = omap3_map_io, 717 .map_io = omap3_map_io,
718 .init_early = igep_init_early, 718 .init_early = igep_init_early,
719 .init_irq = omap_init_irq, 719 .init_irq = omap3_init_irq,
720 .init_machine = igep_init, 720 .init_machine = igep_init,
721 .timer = &omap_timer, 721 .timer = &omap3_timer,
722MACHINE_END 722MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 2d7e0aed605e..5d4328f19c0f 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -348,7 +348,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
348 .reserve = omap_reserve, 348 .reserve = omap_reserve,
349 .map_io = omap3_map_io, 349 .map_io = omap3_map_io,
350 .init_early = omap_ldp_init_early, 350 .init_early = omap_ldp_init_early,
351 .init_irq = omap_init_irq, 351 .init_irq = omap3_init_irq,
352 .init_machine = omap_ldp_init, 352 .init_machine = omap_ldp_init,
353 .timer = &omap_timer, 353 .timer = &omap3_timer,
354MACHINE_END 354MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 8d74318ed495..e11f0c5d608a 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -699,9 +699,9 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
699 .reserve = omap_reserve, 699 .reserve = omap_reserve,
700 .map_io = n8x0_map_io, 700 .map_io = n8x0_map_io,
701 .init_early = n8x0_init_early, 701 .init_early = n8x0_init_early,
702 .init_irq = omap_init_irq, 702 .init_irq = omap2_init_irq,
703 .init_machine = n8x0_init_machine, 703 .init_machine = n8x0_init_machine,
704 .timer = &omap_timer, 704 .timer = &omap2_timer,
705MACHINE_END 705MACHINE_END
706 706
707MACHINE_START(NOKIA_N810, "Nokia N810") 707MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -709,9 +709,9 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
709 .reserve = omap_reserve, 709 .reserve = omap_reserve,
710 .map_io = n8x0_map_io, 710 .map_io = n8x0_map_io,
711 .init_early = n8x0_init_early, 711 .init_early = n8x0_init_early,
712 .init_irq = omap_init_irq, 712 .init_irq = omap2_init_irq,
713 .init_machine = n8x0_init_machine, 713 .init_machine = n8x0_init_machine,
714 .timer = &omap_timer, 714 .timer = &omap2_timer,
715MACHINE_END 715MACHINE_END
716 716
717MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") 717MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
719 .reserve = omap_reserve, 719 .reserve = omap_reserve,
720 .map_io = n8x0_map_io, 720 .map_io = n8x0_map_io,
721 .init_early = n8x0_init_early, 721 .init_early = n8x0_init_early,
722 .init_irq = omap_init_irq, 722 .init_irq = omap2_init_irq,
723 .init_machine = n8x0_init_machine, 723 .init_machine = n8x0_init_machine,
724 .timer = &omap_timer, 724 .timer = &omap2_timer,
725MACHINE_END 725MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 8ef0e19127ad..2d8dfb3213bf 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -50,7 +50,6 @@
50 50
51#include "mux.h" 51#include "mux.h"
52#include "hsmmc.h" 52#include "hsmmc.h"
53#include "timer-gp.h"
54#include "pm.h" 53#include "pm.h"
55#include "common-board-devices.h" 54#include "common-board-devices.h"
56 55
@@ -483,10 +482,7 @@ static void __init omap3_beagle_init_early(void)
483 482
484static void __init omap3_beagle_init_irq(void) 483static void __init omap3_beagle_init_irq(void)
485{ 484{
486 omap_init_irq(); 485 omap3_init_irq();
487#ifdef CONFIG_OMAP_32K_TIMER
488 omap2_gp_clockevent_set_gptimer(12);
489#endif
490} 486}
491 487
492static struct platform_device *omap3_beagle_devices[] __initdata = { 488static struct platform_device *omap3_beagle_devices[] __initdata = {
@@ -596,5 +592,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
596 .init_early = omap3_beagle_init_early, 592 .init_early = omap3_beagle_init_early,
597 .init_irq = omap3_beagle_init_irq, 593 .init_irq = omap3_beagle_init_irq,
598 .init_machine = omap3_beagle_init, 594 .init_machine = omap3_beagle_init,
599 .timer = &omap_timer, 595 .timer = &omap3_secure_timer,
600MACHINE_END 596MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c2ea437065c3..57bce0f2e195 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -739,7 +739,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
739 .reserve = omap_reserve, 739 .reserve = omap_reserve,
740 .map_io = omap3_map_io, 740 .map_io = omap3_map_io,
741 .init_early = omap3_evm_init_early, 741 .init_early = omap3_evm_init_early,
742 .init_irq = omap_init_irq, 742 .init_irq = omap3_init_irq,
743 .init_machine = omap3_evm_init, 743 .init_machine = omap3_evm_init,
744 .timer = &omap_timer, 744 .timer = &omap3_timer,
745MACHINE_END 745MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index eaefb5916595..703aeb5b8fd4 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -35,7 +35,6 @@
35 35
36#include "mux.h" 36#include "mux.h"
37#include "hsmmc.h" 37#include "hsmmc.h"
38#include "timer-gp.h"
39#include "control.h" 38#include "control.h"
40#include "common-board-devices.h" 39#include "common-board-devices.h"
41 40
@@ -213,16 +212,16 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
213 .boot_params = 0x80000100, 212 .boot_params = 0x80000100,
214 .map_io = omap3_map_io, 213 .map_io = omap3_map_io,
215 .init_early = omap3logic_init_early, 214 .init_early = omap3logic_init_early,
216 .init_irq = omap_init_irq, 215 .init_irq = omap3_init_irq,
217 .init_machine = omap3logic_init, 216 .init_machine = omap3logic_init,
218 .timer = &omap_timer, 217 .timer = &omap3_timer,
219MACHINE_END 218MACHINE_END
220 219
221MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") 220MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
222 .boot_params = 0x80000100, 221 .boot_params = 0x80000100,
223 .map_io = omap3_map_io, 222 .map_io = omap3_map_io,
224 .init_early = omap3logic_init_early, 223 .init_early = omap3logic_init_early,
225 .init_irq = omap_init_irq, 224 .init_irq = omap3_init_irq,
226 .init_machine = omap3logic_init, 225 .init_machine = omap3logic_init,
227 .timer = &omap_timer, 226 .timer = &omap3_timer,
228MACHINE_END 227MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index e95bba281a06..47c426e8420a 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -649,7 +649,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
649 .reserve = omap_reserve, 649 .reserve = omap_reserve,
650 .map_io = omap3_map_io, 650 .map_io = omap3_map_io,
651 .init_early = omap3pandora_init_early, 651 .init_early = omap3pandora_init_early,
652 .init_irq = omap_init_irq, 652 .init_irq = omap3_init_irq,
653 .init_machine = omap3pandora_init, 653 .init_machine = omap3pandora_init,
654 .timer = &omap_timer, 654 .timer = &omap3_timer,
655MACHINE_END 655MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 63d12a3df30a..b8ad4dd5bbbf 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -52,7 +52,6 @@
52#include "sdram-micron-mt46h32m32lf-6.h" 52#include "sdram-micron-mt46h32m32lf-6.h"
53#include "mux.h" 53#include "mux.h"
54#include "hsmmc.h" 54#include "hsmmc.h"
55#include "timer-gp.h"
56#include "common-board-devices.h" 55#include "common-board-devices.h"
57 56
58#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 57#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
@@ -491,10 +490,7 @@ static void __init omap3_stalker_init_early(void)
491 490
492static void __init omap3_stalker_init_irq(void) 491static void __init omap3_stalker_init_irq(void)
493{ 492{
494 omap_init_irq(); 493 omap3_init_irq();
495#ifdef CONFIG_OMAP_32K_TIMER
496 omap2_gp_clockevent_set_gptimer(12);
497#endif
498} 494}
499 495
500static struct platform_device *omap3_stalker_devices[] __initdata = { 496static struct platform_device *omap3_stalker_devices[] __initdata = {
@@ -557,5 +553,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
557 .init_early = omap3_stalker_init_early, 553 .init_early = omap3_stalker_init_early,
558 .init_irq = omap3_stalker_init_irq, 554 .init_irq = omap3_stalker_init_irq,
559 .init_machine = omap3_stalker_init, 555 .init_machine = omap3_stalker_init,
560 .timer = &omap_timer, 556 .timer = &omap3_secure_timer,
561MACHINE_END 557MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index c80e2c3a919b..57e6ed34ebbc 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -51,7 +51,6 @@
51 51
52#include "mux.h" 52#include "mux.h"
53#include "hsmmc.h" 53#include "hsmmc.h"
54#include "timer-gp.h"
55#include "common-board-devices.h" 54#include "common-board-devices.h"
56 55
57#include <asm/setup.h> 56#include <asm/setup.h>
@@ -371,10 +370,7 @@ static void __init omap3_touchbook_init_early(void)
371 370
372static void __init omap3_touchbook_init_irq(void) 371static void __init omap3_touchbook_init_irq(void)
373{ 372{
374 omap_init_irq(); 373 omap3_init_irq();
375#ifdef CONFIG_OMAP_32K_TIMER
376 omap2_gp_clockevent_set_gptimer(12);
377#endif
378} 374}
379 375
380static struct platform_device *omap3_touchbook_devices[] __initdata = { 376static struct platform_device *omap3_touchbook_devices[] __initdata = {
@@ -449,5 +445,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
449 .init_early = omap3_touchbook_init_early, 445 .init_early = omap3_touchbook_init_early,
450 .init_irq = omap3_touchbook_init_irq, 446 .init_irq = omap3_touchbook_init_irq,
451 .init_machine = omap3_touchbook_init, 447 .init_machine = omap3_touchbook_init,
452 .timer = &omap_timer, 448 .timer = &omap3_secure_timer,
453MACHINE_END 449MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 6d2372b98e46..ee2034e37468 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -41,7 +41,6 @@
41#include <plat/usb.h> 41#include <plat/usb.h>
42#include <plat/mmc.h> 42#include <plat/mmc.h>
43#include <video/omap-panel-generic-dpi.h> 43#include <video/omap-panel-generic-dpi.h>
44#include "timer-gp.h"
45 44
46#include "hsmmc.h" 45#include "hsmmc.h"
47#include "control.h" 46#include "control.h"
@@ -712,5 +711,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
712 .init_early = omap4_panda_init_early, 711 .init_early = omap4_panda_init_early,
713 .init_irq = gic_init_irq, 712 .init_irq = gic_init_irq,
714 .init_machine = omap4_panda_init, 713 .init_machine = omap4_panda_init,
715 .timer = &omap_timer, 714 .timer = &omap4_timer,
716MACHINE_END 715MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 031a9a68156c..1bf2f39b9d0e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -615,7 +615,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
615 .reserve = omap_reserve, 615 .reserve = omap_reserve,
616 .map_io = omap3_map_io, 616 .map_io = omap3_map_io,
617 .init_early = overo_init_early, 617 .init_early = overo_init_early,
618 .init_irq = omap_init_irq, 618 .init_irq = omap3_init_irq,
619 .init_machine = overo_init, 619 .init_machine = overo_init,
620 .timer = &omap_timer, 620 .timer = &omap3_timer,
621MACHINE_END 621MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 42d10b12da3c..54dceb163415 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -163,7 +163,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
163 .reserve = omap_reserve, 163 .reserve = omap_reserve,
164 .map_io = rm680_map_io, 164 .map_io = rm680_map_io,
165 .init_early = rm680_init_early, 165 .init_early = rm680_init_early,
166 .init_irq = omap_init_irq, 166 .init_irq = omap3_init_irq,
167 .init_machine = rm680_init, 167 .init_machine = rm680_init,
168 .timer = &omap_timer, 168 .timer = &omap3_timer,
169MACHINE_END 169MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index fec4cac8fa0a..5ea142f9bc97 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
160 .reserve = rx51_reserve, 160 .reserve = rx51_reserve,
161 .map_io = rx51_map_io, 161 .map_io = rx51_map_io,
162 .init_early = rx51_init_early, 162 .init_early = rx51_init_early,
163 .init_irq = omap_init_irq, 163 .init_irq = omap3_init_irq,
164 .init_machine = rx51_init, 164 .init_machine = rx51_init,
165 .timer = &omap_timer, 165 .timer = &omap3_timer,
166MACHINE_END 166MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 09fa7bfff8d6..a85d5b0b11da 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -33,11 +33,6 @@ static void __init ti8168_init_early(void)
33 omap2_init_common_devices(NULL, NULL); 33 omap2_init_common_devices(NULL, NULL);
34} 34}
35 35
36static void __init ti8168_evm_init_irq(void)
37{
38 omap_init_irq();
39}
40
41static void __init ti8168_evm_init(void) 36static void __init ti8168_evm_init(void)
42{ 37{
43 omap_serial_init(); 38 omap_serial_init();
@@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
56 .boot_params = 0x80000100, 51 .boot_params = 0x80000100,
57 .map_io = ti8168_evm_map_io, 52 .map_io = ti8168_evm_map_io,
58 .init_early = ti8168_init_early, 53 .init_early = ti8168_init_early,
59 .init_irq = ti8168_evm_init_irq, 54 .init_irq = ti816x_init_irq,
60 .timer = &omap_timer, 55 .timer = &omap3_timer,
61 .init_machine = ti8168_evm_init, 56 .init_machine = ti8168_evm_init,
62MACHINE_END 57MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4b133d75c935..8a98c3c303fc 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -137,9 +137,9 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
137 .reserve = omap_reserve, 137 .reserve = omap_reserve,
138 .map_io = omap3_map_io, 138 .map_io = omap3_map_io,
139 .init_early = omap_zoom_init_early, 139 .init_early = omap_zoom_init_early,
140 .init_irq = omap_init_irq, 140 .init_irq = omap3_init_irq,
141 .init_machine = omap_zoom_init, 141 .init_machine = omap_zoom_init,
142 .timer = &omap_timer, 142 .timer = &omap3_timer,
143MACHINE_END 143MACHINE_END
144 144
145MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") 145MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
147 .reserve = omap_reserve, 147 .reserve = omap_reserve,
148 .map_io = omap3_map_io, 148 .map_io = omap3_map_io,
149 .init_early = omap_zoom_init_early, 149 .init_early = omap_zoom_init_early,
150 .init_irq = omap_init_irq, 150 .init_irq = omap3_init_irq,
151 .init_machine = omap_zoom_init, 151 .init_machine = omap_zoom_init,
152 .timer = &omap_timer, 152 .timer = &omap3_timer,
153MACHINE_END 153MACHINE_END
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 441e79d043a7..2ce1ce6fb4db 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
333 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 333 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
334} 334}
335 335
336/* See irq.c, omap4-common.c and entry-macro.S */
336void __iomem *omap_irq_base; 337void __iomem *omap_irq_base;
337 338
338/*
339 * Initialize asm_irq_base for entry-macro.S
340 */
341static inline void omap_irq_base_init(void)
342{
343 if (cpu_is_omap24xx())
344 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
345 else if (cpu_is_omap34xx())
346 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
347 else if (cpu_is_omap44xx())
348 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
349 else
350 pr_err("Could not initialize omap_irq_base\n");
351}
352
353void __init omap2_init_common_infrastructure(void) 339void __init omap2_init_common_infrastructure(void)
354{ 340{
355 u8 postsetup_state; 341 u8 postsetup_state;
@@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
422 _omap2_init_reprogram_sdrc(); 408 _omap2_init_reprogram_sdrc();
423 } 409 }
424 410
425 omap_irq_base_init();
426} 411}
427 412
428/* 413/*
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 3af2b7a1045e..3a12f7586a4c 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
141 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 141 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
142} 142}
143 143
144void __init omap_init_irq(void) 144static void __init omap_init_irq(u32 base, int nr_irqs)
145{ 145{
146 unsigned long nr_of_irqs = 0; 146 unsigned long nr_of_irqs = 0;
147 unsigned int nr_banks = 0; 147 unsigned int nr_banks = 0;
148 int i, j; 148 int i, j;
149 149
150 omap_irq_base = ioremap(base, SZ_4K);
151 if (WARN_ON(!omap_irq_base))
152 return;
153
150 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { 154 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
151 unsigned long base = 0;
152 struct omap_irq_bank *bank = irq_banks + i; 155 struct omap_irq_bank *bank = irq_banks + i;
153 156
154 if (cpu_is_omap24xx()) 157 bank->nr_irqs = nr_irqs;
155 base = OMAP24XX_IC_BASE;
156 else if (cpu_is_omap34xx())
157 base = OMAP34XX_IC_BASE;
158
159 BUG_ON(!base);
160
161 if (cpu_is_ti816x())
162 bank->nr_irqs = 128;
163 158
164 /* Static mapping, never released */ 159 /* Static mapping, never released */
165 bank->base_reg = ioremap(base, SZ_4K); 160 bank->base_reg = ioremap(base, SZ_4K);
@@ -181,6 +176,21 @@ void __init omap_init_irq(void)
181 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); 176 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
182} 177}
183 178
179void __init omap2_init_irq(void)
180{
181 omap_init_irq(OMAP24XX_IC_BASE, 96);
182}
183
184void __init omap3_init_irq(void)
185{
186 omap_init_irq(OMAP34XX_IC_BASE, 96);
187}
188
189void __init ti816x_init_irq(void)
190{
191 omap_init_irq(OMAP34XX_IC_BASE, 128);
192}
193
184#ifdef CONFIG_ARCH_OMAP3 194#ifdef CONFIG_ARCH_OMAP3
185static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; 195static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
186 196
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 9ef8c29dd817..35ac3e5f6e94 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -19,6 +19,8 @@
19#include <asm/hardware/gic.h> 19#include <asm/hardware/gic.h>
20#include <asm/hardware/cache-l2x0.h> 20#include <asm/hardware/cache-l2x0.h>
21 21
22#include <plat/irqs.h>
23
22#include <mach/hardware.h> 24#include <mach/hardware.h>
23#include <mach/omap4-common.h> 25#include <mach/omap4-common.h>
24 26
@@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr;
31 33
32void __init gic_init_irq(void) 34void __init gic_init_irq(void)
33{ 35{
34 void __iomem *gic_cpu_base;
35
36 /* Static mapping, never released */ 36 /* Static mapping, never released */
37 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); 37 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
38 BUG_ON(!gic_dist_base_addr); 38 BUG_ON(!gic_dist_base_addr);
39 39
40 /* Static mapping, never released */ 40 /* Static mapping, never released */
41 gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); 41 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
42 BUG_ON(!gic_cpu_base); 42 BUG_ON(!omap_irq_base);
43 43
44 gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); 44 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
45} 45}
46 46
47#ifdef CONFIG_CACHE_L2X0 47#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index a5a83b358ddd..c56d1d47fec4 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -31,7 +31,6 @@
31#include <plat/board.h> 31#include <plat/board.h>
32#include "powerdomain.h" 32#include "powerdomain.h"
33#include "clockdomain.h" 33#include "clockdomain.h"
34#include <plat/dmtimer.h>
35#include <plat/omap-pm.h> 34#include <plat/omap-pm.h>
36 35
37#include "cm2xxx_3xxx.h" 36#include "cm2xxx_3xxx.h"
@@ -41,8 +40,6 @@
41int omap2_pm_debug; 40int omap2_pm_debug;
42u32 enable_off_mode; 41u32 enable_off_mode;
43u32 sleep_while_idle; 42u32 sleep_while_idle;
44u32 wakeup_timer_seconds;
45u32 wakeup_timer_milliseconds;
46 43
47#define DUMP_PRM_MOD_REG(mod, reg) \ 44#define DUMP_PRM_MOD_REG(mod, reg) \
48 regs[reg_count].name = #mod "." #reg; \ 45 regs[reg_count].name = #mod "." #reg; \
@@ -162,23 +159,6 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
162 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); 159 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
163} 160}
164 161
165void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
166{
167 u32 tick_rate, cycles;
168
169 if (!seconds && !milliseconds)
170 return;
171
172 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
173 cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
174 omap_dm_timer_stop(gptimer_wakeup);
175 omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
176
177 pr_info("PM: Resume timer in %u.%03u secs"
178 " (%d ticks at %d ticks/sec.)\n",
179 seconds, milliseconds, cycles, tick_rate);
180}
181
182#ifdef CONFIG_DEBUG_FS 162#ifdef CONFIG_DEBUG_FS
183#include <linux/debugfs.h> 163#include <linux/debugfs.h>
184#include <linux/seq_file.h> 164#include <linux/seq_file.h>
@@ -576,9 +556,6 @@ static int option_set(void *data, u64 val)
576{ 556{
577 u32 *option = data; 557 u32 *option = data;
578 558
579 if (option == &wakeup_timer_milliseconds && val >= 1000)
580 return -EINVAL;
581
582 *option = val; 559 *option = val;
583 560
584 if (option == &enable_off_mode) { 561 if (option == &enable_off_mode) {
@@ -641,11 +618,6 @@ static int __init pm_dbg_init(void)
641 &enable_off_mode, &pm_dbg_option_fops); 618 &enable_off_mode, &pm_dbg_option_fops);
642 (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, 619 (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d,
643 &sleep_while_idle, &pm_dbg_option_fops); 620 &sleep_while_idle, &pm_dbg_option_fops);
644 (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d,
645 &wakeup_timer_seconds, &pm_dbg_option_fops);
646 (void) debugfs_create_file("wakeup_timer_milliseconds",
647 S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds,
648 &pm_dbg_option_fops);
649 pm_dbg_init_done = 1; 621 pm_dbg_init_done = 1;
650 622
651 return 0; 623 return 0;
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 45bcfce77352..c3a367e3d010 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -60,19 +60,13 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
60extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); 60extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
61extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); 61extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
62 62
63extern u32 wakeup_timer_seconds;
64extern u32 wakeup_timer_milliseconds;
65extern struct omap_dm_timer *gptimer_wakeup;
66
67#ifdef CONFIG_PM_DEBUG 63#ifdef CONFIG_PM_DEBUG
68extern void omap2_pm_dump(int mode, int resume, unsigned int us); 64extern void omap2_pm_dump(int mode, int resume, unsigned int us);
69extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
70extern int omap2_pm_debug; 65extern int omap2_pm_debug;
71extern u32 enable_off_mode; 66extern u32 enable_off_mode;
72extern u32 sleep_while_idle; 67extern u32 sleep_while_idle;
73#else 68#else
74#define omap2_pm_dump(mode, resume, us) do {} while (0); 69#define omap2_pm_dump(mode, resume, us) do {} while (0);
75#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
76#define omap2_pm_debug 0 70#define omap2_pm_debug 0
77#define enable_off_mode 0 71#define enable_off_mode 0
78#define sleep_while_idle 0 72#define sleep_while_idle 0
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c155c9d1c82c..4cb636af7045 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -534,10 +534,6 @@ static int omap3_pm_suspend(void)
534 struct power_state *pwrst; 534 struct power_state *pwrst;
535 int state, ret = 0; 535 int state, ret = 0;
536 536
537 if (wakeup_timer_seconds || wakeup_timer_milliseconds)
538 omap2_pm_wakeup_on_timer(wakeup_timer_seconds,
539 wakeup_timer_milliseconds);
540
541 /* Read current next_pwrsts */ 537 /* Read current next_pwrsts */
542 list_for_each_entry(pwrst, &pwrst_list, node) 538 list_for_each_entry(pwrst, &pwrst_list, node)
543 pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); 539 pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm);
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
deleted file mode 100644
index 3b9cf85f4bb9..000000000000
--- a/arch/arm/mach-omap2/timer-gp.c
+++ /dev/null
@@ -1,266 +0,0 @@
1/*
2 * linux/arch/arm/mach-omap2/timer-gp.c
3 *
4 * OMAP2 GP timer support.
5 *
6 * Copyright (C) 2009 Nokia Corporation
7 *
8 * Update to use new clocksource/clockevent layers
9 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
10 * Copyright (C) 2007 MontaVista Software, Inc.
11 *
12 * Original driver:
13 * Copyright (C) 2005 Nokia Corporation
14 * Author: Paul Mundt <paul.mundt@nokia.com>
15 * Juha Yrjölä <juha.yrjola@nokia.com>
16 * OMAP Dual-mode timer framework support by Timo Teras
17 *
18 * Some parts based off of TI's 24xx code:
19 *
20 * Copyright (C) 2004-2009 Texas Instruments, Inc.
21 *
22 * Roughly modelled after the OMAP1 MPU timer code.
23 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
24 *
25 * This file is subject to the terms and conditions of the GNU General Public
26 * License. See the file "COPYING" in the main directory of this archive
27 * for more details.
28 */
29#include <linux/init.h>
30#include <linux/time.h>
31#include <linux/interrupt.h>
32#include <linux/err.h>
33#include <linux/clk.h>
34#include <linux/delay.h>
35#include <linux/irq.h>
36#include <linux/clocksource.h>
37#include <linux/clockchips.h>
38
39#include <asm/mach/time.h>
40#include <plat/dmtimer.h>
41#include <asm/localtimer.h>
42#include <asm/sched_clock.h>
43#include <plat/common.h>
44#include <plat/omap_hwmod.h>
45
46#include "timer-gp.h"
47
48
49/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
50#define MAX_GPTIMER_ID 12
51
52static struct omap_dm_timer *gptimer;
53static struct clock_event_device clockevent_gpt;
54static u8 __initdata gptimer_id = 1;
55static u8 __initdata inited;
56struct omap_dm_timer *gptimer_wakeup;
57
58static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
59{
60 struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id;
61 struct clock_event_device *evt = &clockevent_gpt;
62
63 omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW);
64
65 evt->event_handler(evt);
66 return IRQ_HANDLED;
67}
68
69static struct irqaction omap2_gp_timer_irq = {
70 .name = "gp timer",
71 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
72 .handler = omap2_gp_timer_interrupt,
73};
74
75static int omap2_gp_timer_set_next_event(unsigned long cycles,
76 struct clock_event_device *evt)
77{
78 omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
79
80 return 0;
81}
82
83static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
84 struct clock_event_device *evt)
85{
86 u32 period;
87
88 omap_dm_timer_stop(gptimer);
89
90 switch (mode) {
91 case CLOCK_EVT_MODE_PERIODIC:
92 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
93 period -= 1;
94 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
95 break;
96 case CLOCK_EVT_MODE_ONESHOT:
97 break;
98 case CLOCK_EVT_MODE_UNUSED:
99 case CLOCK_EVT_MODE_SHUTDOWN:
100 case CLOCK_EVT_MODE_RESUME:
101 break;
102 }
103}
104
105static struct clock_event_device clockevent_gpt = {
106 .name = "gp timer",
107 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
108 .shift = 32,
109 .set_next_event = omap2_gp_timer_set_next_event,
110 .set_mode = omap2_gp_timer_set_mode,
111};
112
113/**
114 * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents
115 * @id: GPTIMER to use (1..MAX_GPTIMER_ID)
116 *
117 * Define the GPTIMER that the system should use for the tick timer.
118 * Meant to be called from board-*.c files in the event that GPTIMER1, the
119 * default, is unsuitable. Returns -EINVAL on error or 0 on success.
120 */
121int __init omap2_gp_clockevent_set_gptimer(u8 id)
122{
123 if (id < 1 || id > MAX_GPTIMER_ID)
124 return -EINVAL;
125
126 BUG_ON(inited);
127
128 gptimer_id = id;
129
130 return 0;
131}
132
133static void __init omap2_gp_clockevent_init(void)
134{
135 u32 tick_rate;
136 int src;
137 char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */
138
139 inited = 1;
140
141 sprintf(clockevent_hwmod_name, "timer%d", gptimer_id);
142 omap_hwmod_setup_one(clockevent_hwmod_name);
143
144 gptimer = omap_dm_timer_request_specific(gptimer_id);
145 BUG_ON(gptimer == NULL);
146 gptimer_wakeup = gptimer;
147
148#if defined(CONFIG_OMAP_32K_TIMER)
149 src = OMAP_TIMER_SRC_32_KHZ;
150#else
151 src = OMAP_TIMER_SRC_SYS_CLK;
152 WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the "
153 "secure 32KiHz clock source\n");
154#endif
155
156 if (gptimer_id != 12)
157 WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)),
158 "timer-gp: omap_dm_timer_set_source() failed\n");
159
160 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
161
162 pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
163 gptimer_id, tick_rate);
164
165 omap2_gp_timer_irq.dev_id = (void *)gptimer;
166 setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
167 omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
168
169 clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC,
170 clockevent_gpt.shift);
171 clockevent_gpt.max_delta_ns =
172 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
173 clockevent_gpt.min_delta_ns =
174 clockevent_delta2ns(3, &clockevent_gpt);
175 /* Timer internal resynch latency. */
176
177 clockevent_gpt.cpumask = cpumask_of(0);
178 clockevents_register_device(&clockevent_gpt);
179}
180
181/* Clocksource code */
182
183#ifdef CONFIG_OMAP_32K_TIMER
184/*
185 * When 32k-timer is enabled, don't use GPTimer for clocksource
186 * instead, just leave default clocksource which uses the 32k
187 * sync counter. See clocksource setup in plat-omap/counter_32k.c
188 */
189
190static void __init omap2_gp_clocksource_init(void)
191{
192 omap_init_clocksource_32k();
193}
194
195#else
196/*
197 * clocksource
198 */
199static DEFINE_CLOCK_DATA(cd);
200static struct omap_dm_timer *gpt_clocksource;
201static cycle_t clocksource_read_cycles(struct clocksource *cs)
202{
203 return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
204}
205
206static struct clocksource clocksource_gpt = {
207 .name = "gp timer",
208 .rating = 300,
209 .read = clocksource_read_cycles,
210 .mask = CLOCKSOURCE_MASK(32),
211 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
212};
213
214static void notrace dmtimer_update_sched_clock(void)
215{
216 u32 cyc;
217
218 cyc = omap_dm_timer_read_counter(gpt_clocksource);
219
220 update_sched_clock(&cd, cyc, (u32)~0);
221}
222
223/* Setup free-running counter for clocksource */
224static void __init omap2_gp_clocksource_init(void)
225{
226 static struct omap_dm_timer *gpt;
227 u32 tick_rate;
228 static char err1[] __initdata = KERN_ERR
229 "%s: failed to request dm-timer\n";
230 static char err2[] __initdata = KERN_ERR
231 "%s: can't register clocksource!\n";
232
233 gpt = omap_dm_timer_request();
234 if (!gpt)
235 printk(err1, clocksource_gpt.name);
236 gpt_clocksource = gpt;
237
238 omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK);
239 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
240
241 omap_dm_timer_set_load_start(gpt, 1, 0);
242
243 init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate);
244
245 if (clocksource_register_hz(&clocksource_gpt, tick_rate))
246 printk(err2, clocksource_gpt.name);
247}
248#endif
249
250static void __init omap2_gp_timer_init(void)
251{
252#ifdef CONFIG_LOCAL_TIMERS
253 if (cpu_is_omap44xx()) {
254 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
255 BUG_ON(!twd_base);
256 }
257#endif
258 omap_dm_timer_init();
259
260 omap2_gp_clockevent_init();
261 omap2_gp_clocksource_init();
262}
263
264struct sys_timer omap_timer = {
265 .init = omap2_gp_timer_init,
266};
diff --git a/arch/arm/mach-omap2/timer-gp.h b/arch/arm/mach-omap2/timer-gp.h
deleted file mode 100644
index 5c1072c6783b..000000000000
--- a/arch/arm/mach-omap2/timer-gp.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * OMAP2/3 GPTIMER support.headers
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
12#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
13
14extern int __init omap2_gp_clockevent_set_gptimer(u8 id);
15
16#endif
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
new file mode 100644
index 000000000000..e9640728239b
--- /dev/null
+++ b/arch/arm/mach-omap2/timer.c
@@ -0,0 +1,342 @@
1/*
2 * linux/arch/arm/mach-omap2/timer.c
3 *
4 * OMAP2 GP timer support.
5 *
6 * Copyright (C) 2009 Nokia Corporation
7 *
8 * Update to use new clocksource/clockevent layers
9 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
10 * Copyright (C) 2007 MontaVista Software, Inc.
11 *
12 * Original driver:
13 * Copyright (C) 2005 Nokia Corporation
14 * Author: Paul Mundt <paul.mundt@nokia.com>
15 * Juha Yrjölä <juha.yrjola@nokia.com>
16 * OMAP Dual-mode timer framework support by Timo Teras
17 *
18 * Some parts based off of TI's 24xx code:
19 *
20 * Copyright (C) 2004-2009 Texas Instruments, Inc.
21 *
22 * Roughly modelled after the OMAP1 MPU timer code.
23 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
24 *
25 * This file is subject to the terms and conditions of the GNU General Public
26 * License. See the file "COPYING" in the main directory of this archive
27 * for more details.
28 */
29#include <linux/init.h>
30#include <linux/time.h>
31#include <linux/interrupt.h>
32#include <linux/err.h>
33#include <linux/clk.h>
34#include <linux/delay.h>
35#include <linux/irq.h>
36#include <linux/clocksource.h>
37#include <linux/clockchips.h>
38
39#include <asm/mach/time.h>
40#include <plat/dmtimer.h>
41#include <asm/localtimer.h>
42#include <asm/sched_clock.h>
43#include <plat/common.h>
44#include <plat/omap_hwmod.h>
45
46/* Parent clocks, eventually these will come from the clock framework */
47
48#define OMAP2_MPU_SOURCE "sys_ck"
49#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
50#define OMAP4_MPU_SOURCE "sys_clkin_ck"
51#define OMAP2_32K_SOURCE "func_32k_ck"
52#define OMAP3_32K_SOURCE "omap_32k_fck"
53#define OMAP4_32K_SOURCE "sys_32k_ck"
54
55#ifdef CONFIG_OMAP_32K_TIMER
56#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE
57#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE
58#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE
59#define OMAP3_SECURE_TIMER 12
60#else
61#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE
62#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE
63#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE
64#define OMAP3_SECURE_TIMER 1
65#endif
66
67/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
68#define MAX_GPTIMER_ID 12
69
70u32 sys_timer_reserved;
71
72/* Clockevent code */
73
74static struct omap_dm_timer clkev;
75static struct clock_event_device clockevent_gpt;
76
77static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
78{
79 struct clock_event_device *evt = &clockevent_gpt;
80
81 __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
82
83 evt->event_handler(evt);
84 return IRQ_HANDLED;
85}
86
87static struct irqaction omap2_gp_timer_irq = {
88 .name = "gp timer",
89 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
90 .handler = omap2_gp_timer_interrupt,
91};
92
93static int omap2_gp_timer_set_next_event(unsigned long cycles,
94 struct clock_event_device *evt)
95{
96 __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
97 0xffffffff - cycles, 1);
98
99 return 0;
100}
101
102static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
103 struct clock_event_device *evt)
104{
105 u32 period;
106
107 __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
108
109 switch (mode) {
110 case CLOCK_EVT_MODE_PERIODIC:
111 period = clkev.rate / HZ;
112 period -= 1;
113 /* Looks like we need to first set the load value separately */
114 __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
115 0xffffffff - period, 1);
116 __omap_dm_timer_load_start(clkev.io_base,
117 OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
118 0xffffffff - period, 1);
119 break;
120 case CLOCK_EVT_MODE_ONESHOT:
121 break;
122 case CLOCK_EVT_MODE_UNUSED:
123 case CLOCK_EVT_MODE_SHUTDOWN:
124 case CLOCK_EVT_MODE_RESUME:
125 break;
126 }
127}
128
129static struct clock_event_device clockevent_gpt = {
130 .name = "gp timer",
131 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
132 .shift = 32,
133 .set_next_event = omap2_gp_timer_set_next_event,
134 .set_mode = omap2_gp_timer_set_mode,
135};
136
137static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
138 int gptimer_id,
139 const char *fck_source)
140{
141 char name[10]; /* 10 = sizeof("gptXX_Xck0") */
142 struct omap_hwmod *oh;
143 size_t size;
144 int res = 0;
145
146 sprintf(name, "timer%d", gptimer_id);
147 omap_hwmod_setup_one(name);
148 oh = omap_hwmod_lookup(name);
149 if (!oh)
150 return -ENODEV;
151
152 timer->irq = oh->mpu_irqs[0].irq;
153 timer->phys_base = oh->slaves[0]->addr->pa_start;
154 size = oh->slaves[0]->addr->pa_end - timer->phys_base;
155
156 /* Static mapping, never released */
157 timer->io_base = ioremap(timer->phys_base, size);
158 if (!timer->io_base)
159 return -ENXIO;
160
161 /* After the dmtimer is using hwmod these clocks won't be needed */
162 sprintf(name, "gpt%d_fck", gptimer_id);
163 timer->fclk = clk_get(NULL, name);
164 if (IS_ERR(timer->fclk))
165 return -ENODEV;
166
167 sprintf(name, "gpt%d_ick", gptimer_id);
168 timer->iclk = clk_get(NULL, name);
169 if (IS_ERR(timer->iclk)) {
170 clk_put(timer->fclk);
171 return -ENODEV;
172 }
173
174 omap_hwmod_enable(oh);
175
176 sys_timer_reserved |= (1 << (gptimer_id - 1));
177
178 if (gptimer_id != 12) {
179 struct clk *src;
180
181 src = clk_get(NULL, fck_source);
182 if (IS_ERR(src)) {
183 res = -EINVAL;
184 } else {
185 res = __omap_dm_timer_set_source(timer->fclk, src);
186 if (IS_ERR_VALUE(res))
187 pr_warning("%s: timer%i cannot set source\n",
188 __func__, gptimer_id);
189 clk_put(src);
190 }
191 }
192 __omap_dm_timer_reset(timer->io_base, 1, 1);
193 timer->posted = 1;
194
195 timer->rate = clk_get_rate(timer->fclk);
196
197 timer->reserved = 1;
198
199 return res;
200}
201
202static void __init omap2_gp_clockevent_init(int gptimer_id,
203 const char *fck_source)
204{
205 int res;
206
207 res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
208 BUG_ON(res);
209
210 omap2_gp_timer_irq.dev_id = (void *)&clkev;
211 setup_irq(clkev.irq, &omap2_gp_timer_irq);
212
213 __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
214
215 clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
216 clockevent_gpt.shift);
217 clockevent_gpt.max_delta_ns =
218 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
219 clockevent_gpt.min_delta_ns =
220 clockevent_delta2ns(3, &clockevent_gpt);
221 /* Timer internal resynch latency. */
222
223 clockevent_gpt.cpumask = cpumask_of(0);
224 clockevents_register_device(&clockevent_gpt);
225
226 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
227 gptimer_id, clkev.rate);
228}
229
230/* Clocksource code */
231
232#ifdef CONFIG_OMAP_32K_TIMER
233/*
234 * When 32k-timer is enabled, don't use GPTimer for clocksource
235 * instead, just leave default clocksource which uses the 32k
236 * sync counter. See clocksource setup in plat-omap/counter_32k.c
237 */
238
239static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
240{
241 omap_init_clocksource_32k();
242}
243
244#else
245
246static struct omap_dm_timer clksrc;
247
248/*
249 * clocksource
250 */
251static DEFINE_CLOCK_DATA(cd);
252static cycle_t clocksource_read_cycles(struct clocksource *cs)
253{
254 return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
255}
256
257static struct clocksource clocksource_gpt = {
258 .name = "gp timer",
259 .rating = 300,
260 .read = clocksource_read_cycles,
261 .mask = CLOCKSOURCE_MASK(32),
262 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
263};
264
265static void notrace dmtimer_update_sched_clock(void)
266{
267 u32 cyc;
268
269 cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
270
271 update_sched_clock(&cd, cyc, (u32)~0);
272}
273
274unsigned long long notrace sched_clock(void)
275{
276 u32 cyc = 0;
277
278 if (clksrc.reserved)
279 cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
280
281 return cyc_to_sched_clock(&cd, cyc, (u32)~0);
282}
283
284/* Setup free-running counter for clocksource */
285static void __init omap2_gp_clocksource_init(int gptimer_id,
286 const char *fck_source)
287{
288 int res;
289
290 res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
291 BUG_ON(res);
292
293 pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
294 gptimer_id, clksrc.rate);
295
296 __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
297 init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
298
299 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
300 pr_err("Could not register clocksource %s\n",
301 clocksource_gpt.name);
302}
303#endif
304
305#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
306 clksrc_nr, clksrc_src) \
307static void __init omap##name##_timer_init(void) \
308{ \
309 omap2_gp_clockevent_init((clkev_nr), clkev_src); \
310 omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \
311}
312
313#define OMAP_SYS_TIMER(name) \
314struct sys_timer omap##name##_timer = { \
315 .init = omap##name##_timer_init, \
316};
317
318#ifdef CONFIG_ARCH_OMAP2
319OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
320OMAP_SYS_TIMER(2)
321#endif
322
323#ifdef CONFIG_ARCH_OMAP3
324OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
325OMAP_SYS_TIMER(3)
326OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
327 2, OMAP3_MPU_SOURCE)
328OMAP_SYS_TIMER(3_secure)
329#endif
330
331#ifdef CONFIG_ARCH_OMAP4
332static void __init omap4_timer_init(void)
333{
334#ifdef CONFIG_LOCAL_TIMERS
335 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
336 BUG_ON(!twd_base);
337#endif
338 omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
339 omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE);
340}
341OMAP_SYS_TIMER(4)
342#endif
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f7fed6080190..c13bc3d3eb2c 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -126,7 +126,7 @@ static inline unsigned long long notrace _omap_32k_sched_clock(void)
126 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); 126 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
127} 127}
128 128
129#ifndef CONFIG_OMAP_MPU_TIMER 129#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
130unsigned long long notrace sched_clock(void) 130unsigned long long notrace sched_clock(void)
131{ 131{
132 return _omap_32k_sched_clock(); 132 return _omap_32k_sched_clock();
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index ee9f6ebba29b..8dfb8186b2c2 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -41,127 +41,6 @@
41#include <plat/dmtimer.h> 41#include <plat/dmtimer.h>
42#include <mach/irqs.h> 42#include <mach/irqs.h>
43 43
44/* register offsets */
45#define _OMAP_TIMER_ID_OFFSET 0x00
46#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10
47#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14
48#define _OMAP_TIMER_STAT_OFFSET 0x18
49#define _OMAP_TIMER_INT_EN_OFFSET 0x1c
50#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20
51#define _OMAP_TIMER_CTRL_OFFSET 0x24
52#define OMAP_TIMER_CTRL_GPOCFG (1 << 14)
53#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
54#define OMAP_TIMER_CTRL_PT (1 << 12)
55#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
56#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
57#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
58#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
59#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
60#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
61#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */
62#define OMAP_TIMER_CTRL_POSTED (1 << 2)
63#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
64#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
65#define _OMAP_TIMER_COUNTER_OFFSET 0x28
66#define _OMAP_TIMER_LOAD_OFFSET 0x2c
67#define _OMAP_TIMER_TRIGGER_OFFSET 0x30
68#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34
69#define WP_NONE 0 /* no write pending bit */
70#define WP_TCLR (1 << 0)
71#define WP_TCRR (1 << 1)
72#define WP_TLDR (1 << 2)
73#define WP_TTGR (1 << 3)
74#define WP_TMAR (1 << 4)
75#define WP_TPIR (1 << 5)
76#define WP_TNIR (1 << 6)
77#define WP_TCVR (1 << 7)
78#define WP_TOCR (1 << 8)
79#define WP_TOWR (1 << 9)
80#define _OMAP_TIMER_MATCH_OFFSET 0x38
81#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c
82#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40
83#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */
84#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */
85#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */
86#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */
87#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */
88#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */
89
90/* register offsets with the write pending bit encoded */
91#define WPSHIFT 16
92
93#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \
94 | (WP_NONE << WPSHIFT))
95
96#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \
97 | (WP_NONE << WPSHIFT))
98
99#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \
100 | (WP_NONE << WPSHIFT))
101
102#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \
103 | (WP_NONE << WPSHIFT))
104
105#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \
106 | (WP_NONE << WPSHIFT))
107
108#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \
109 | (WP_NONE << WPSHIFT))
110
111#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \
112 | (WP_TCLR << WPSHIFT))
113
114#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \
115 | (WP_TCRR << WPSHIFT))
116
117#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \
118 | (WP_TLDR << WPSHIFT))
119
120#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \
121 | (WP_TTGR << WPSHIFT))
122
123#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \
124 | (WP_NONE << WPSHIFT))
125
126#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \
127 | (WP_TMAR << WPSHIFT))
128
129#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \
130 | (WP_NONE << WPSHIFT))
131
132#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \
133 | (WP_NONE << WPSHIFT))
134
135#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \
136 | (WP_NONE << WPSHIFT))
137
138#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \
139 | (WP_TPIR << WPSHIFT))
140
141#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \
142 | (WP_TNIR << WPSHIFT))
143
144#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \
145 | (WP_TCVR << WPSHIFT))
146
147#define OMAP_TIMER_TICK_INT_MASK_SET_REG \
148 (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
149
150#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
151 (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
152
153struct omap_dm_timer {
154 unsigned long phys_base;
155 int irq;
156#ifdef CONFIG_ARCH_OMAP2PLUS
157 struct clk *iclk, *fclk;
158#endif
159 void __iomem *io_base;
160 unsigned reserved:1;
161 unsigned enabled:1;
162 unsigned posted:1;
163};
164
165static int dm_timer_count; 44static int dm_timer_count;
166 45
167#ifdef CONFIG_ARCH_OMAP1 46#ifdef CONFIG_ARCH_OMAP1
@@ -291,11 +170,7 @@ static spinlock_t dm_timer_lock;
291 */ 170 */
292static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) 171static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
293{ 172{
294 if (timer->posted) 173 return __omap_dm_timer_read(timer->io_base, reg, timer->posted);
295 while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
296 & (reg >> WPSHIFT))
297 cpu_relax();
298 return readl(timer->io_base + (reg & 0xff));
299} 174}
300 175
301/* 176/*
@@ -307,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
307static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, 182static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
308 u32 value) 183 u32 value)
309{ 184{
310 if (timer->posted) 185 __omap_dm_timer_write(timer->io_base, reg, value, timer->posted);
311 while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
312 & (reg >> WPSHIFT))
313 cpu_relax();
314 writel(value, timer->io_base + (reg & 0xff));
315} 186}
316 187
317static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) 188static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
@@ -330,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
330 201
331static void omap_dm_timer_reset(struct omap_dm_timer *timer) 202static void omap_dm_timer_reset(struct omap_dm_timer *timer)
332{ 203{
333 u32 l; 204 int autoidle = 0, wakeup = 0;
334 205
335 if (!cpu_class_is_omap2() || timer != &dm_timers[0]) { 206 if (!cpu_class_is_omap2() || timer != &dm_timers[0]) {
336 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); 207 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
@@ -338,28 +209,21 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
338 } 209 }
339 omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); 210 omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
340 211
341 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
342 l |= 0x02 << 3; /* Set to smart-idle mode */
343 l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
344
345 /* Enable autoidle on OMAP2 / OMAP3 */ 212 /* Enable autoidle on OMAP2 / OMAP3 */
346 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 213 if (cpu_is_omap24xx() || cpu_is_omap34xx())
347 l |= 0x1 << 0; 214 autoidle = 1;
348 215
349 /* 216 /*
350 * Enable wake-up on OMAP2 CPUs. 217 * Enable wake-up on OMAP2 CPUs.
351 */ 218 */
352 if (cpu_class_is_omap2()) 219 if (cpu_class_is_omap2())
353 l |= 1 << 2; 220 wakeup = 1;
354 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
355 221
356 /* Match hardware reset default of posted mode */ 222 __omap_dm_timer_reset(timer->io_base, autoidle, wakeup);
357 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
358 OMAP_TIMER_CTRL_POSTED);
359 timer->posted = 1; 223 timer->posted = 1;
360} 224}
361 225
362static void omap_dm_timer_prepare(struct omap_dm_timer *timer) 226void omap_dm_timer_prepare(struct omap_dm_timer *timer)
363{ 227{
364 omap_dm_timer_enable(timer); 228 omap_dm_timer_enable(timer);
365 omap_dm_timer_reset(timer); 229 omap_dm_timer_reset(timer);
@@ -531,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);
531 395
532void omap_dm_timer_stop(struct omap_dm_timer *timer) 396void omap_dm_timer_stop(struct omap_dm_timer *timer)
533{ 397{
534 u32 l; 398 unsigned long rate = 0;
535 399
536 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
537 if (l & OMAP_TIMER_CTRL_ST) {
538 l &= ~0x1;
539 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
540#ifdef CONFIG_ARCH_OMAP2PLUS 400#ifdef CONFIG_ARCH_OMAP2PLUS
541 /* Readback to make sure write has completed */ 401 rate = clk_get_rate(timer->fclk);
542 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
543 /*
544 * Wait for functional clock period x 3.5 to make sure that
545 * timer is stopped
546 */
547 udelay(3500000 / clk_get_rate(timer->fclk) + 1);
548#endif 402#endif
549 } 403
550 /* Ack possibly pending interrupt */ 404 __omap_dm_timer_stop(timer->io_base, timer->posted, rate);
551 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
552 OMAP_TIMER_INT_OVERFLOW);
553} 405}
554EXPORT_SYMBOL_GPL(omap_dm_timer_stop); 406EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
555 407
@@ -572,22 +424,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
572 424
573int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) 425int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
574{ 426{
575 int ret = -EINVAL;
576
577 if (source < 0 || source >= 3) 427 if (source < 0 || source >= 3)
578 return -EINVAL; 428 return -EINVAL;
579 429
580 clk_disable(timer->fclk); 430 return __omap_dm_timer_set_source(timer->fclk,
581 ret = clk_set_parent(timer->fclk, dm_source_clocks[source]); 431 dm_source_clocks[source]);
582 clk_enable(timer->fclk);
583
584 /*
585 * When the functional clock disappears, too quick writes seem
586 * to cause an abort. XXX Is this still necessary?
587 */
588 __delay(300000);
589
590 return ret;
591} 432}
592EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); 433EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
593 434
@@ -625,8 +466,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
625 } 466 }
626 l |= OMAP_TIMER_CTRL_ST; 467 l |= OMAP_TIMER_CTRL_ST;
627 468
628 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load); 469 __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted);
629 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
630} 470}
631EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); 471EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
632 472
@@ -679,8 +519,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
679void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, 519void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
680 unsigned int value) 520 unsigned int value)
681{ 521{
682 omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); 522 __omap_dm_timer_int_enable(timer->io_base, value);
683 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
684} 523}
685EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); 524EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
686 525
@@ -696,17 +535,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
696 535
697void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) 536void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
698{ 537{
699 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); 538 __omap_dm_timer_write_status(timer->io_base, value);
700} 539}
701EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); 540EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
702 541
703unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) 542unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
704{ 543{
705 unsigned int l; 544 return __omap_dm_timer_read_counter(timer->io_base, timer->posted);
706
707 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG);
708
709 return l;
710} 545}
711EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); 546EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
712 547
@@ -737,7 +572,7 @@ int omap_dm_timers_active(void)
737} 572}
738EXPORT_SYMBOL_GPL(omap_dm_timers_active); 573EXPORT_SYMBOL_GPL(omap_dm_timers_active);
739 574
740int __init omap_dm_timer_init(void) 575static int __init omap_dm_timer_init(void)
741{ 576{
742 struct omap_dm_timer *timer; 577 struct omap_dm_timer *timer;
743 int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ 578 int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */
@@ -790,8 +625,16 @@ int __init omap_dm_timer_init(void)
790 sprintf(clk_name, "gpt%d_fck", i + 1); 625 sprintf(clk_name, "gpt%d_fck", i + 1);
791 timer->fclk = clk_get(NULL, clk_name); 626 timer->fclk = clk_get(NULL, clk_name);
792 } 627 }
628
629 /* One or two timers may be set up early for sys_timer */
630 if (sys_timer_reserved & (1 << i)) {
631 timer->reserved = 1;
632 timer->posted = 1;
633 }
793#endif 634#endif
794 } 635 }
795 636
796 return 0; 637 return 0;
797} 638}
639
640arch_initcall(omap_dm_timer_init);
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 5288130be96e..4564cc697d7f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -34,7 +34,11 @@
34struct sys_timer; 34struct sys_timer;
35 35
36extern void omap_map_common_io(void); 36extern void omap_map_common_io(void);
37extern struct sys_timer omap_timer; 37extern struct sys_timer omap1_timer;
38extern struct sys_timer omap2_timer;
39extern struct sys_timer omap3_timer;
40extern struct sys_timer omap3_secure_timer;
41extern struct sys_timer omap4_timer;
38extern bool omap_32k_timer_init(void); 42extern bool omap_32k_timer_init(void);
39extern int __init omap_init_clocksource_32k(void); 43extern int __init omap_init_clocksource_32k(void);
40extern unsigned long long notrace omap_32k_sched_clock(void); 44extern unsigned long long notrace omap_32k_sched_clock(void);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index d6c70d2f4030..d0f3a2d22fd3 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -32,6 +32,9 @@
32 * 675 Mass Ave, Cambridge, MA 02139, USA. 32 * 675 Mass Ave, Cambridge, MA 02139, USA.
33 */ 33 */
34 34
35#include <linux/clk.h>
36#include <linux/delay.h>
37
35#ifndef __ASM_ARCH_DMTIMER_H 38#ifndef __ASM_ARCH_DMTIMER_H
36#define __ASM_ARCH_DMTIMER_H 39#define __ASM_ARCH_DMTIMER_H
37 40
@@ -56,12 +59,8 @@
56 */ 59 */
57#define OMAP_TIMER_IP_VERSION_1 0x1 60#define OMAP_TIMER_IP_VERSION_1 0x1
58struct omap_dm_timer; 61struct omap_dm_timer;
59extern struct omap_dm_timer *gptimer_wakeup;
60extern struct sys_timer omap_timer;
61struct clk; 62struct clk;
62 63
63int omap_dm_timer_init(void);
64
65struct omap_dm_timer *omap_dm_timer_request(void); 64struct omap_dm_timer *omap_dm_timer_request(void);
66struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); 65struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
67void omap_dm_timer_free(struct omap_dm_timer *timer); 66void omap_dm_timer_free(struct omap_dm_timer *timer);
@@ -93,5 +92,248 @@ void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value
93 92
94int omap_dm_timers_active(void); 93int omap_dm_timers_active(void);
95 94
95/*
96 * Do not use the defines below, they are not needed. They should be only
97 * used by dmtimer.c and sys_timer related code.
98 */
99
100/* register offsets */
101#define _OMAP_TIMER_ID_OFFSET 0x00
102#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10
103#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14
104#define _OMAP_TIMER_STAT_OFFSET 0x18
105#define _OMAP_TIMER_INT_EN_OFFSET 0x1c
106#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20
107#define _OMAP_TIMER_CTRL_OFFSET 0x24
108#define OMAP_TIMER_CTRL_GPOCFG (1 << 14)
109#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
110#define OMAP_TIMER_CTRL_PT (1 << 12)
111#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
112#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
113#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
114#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
115#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
116#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
117#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */
118#define OMAP_TIMER_CTRL_POSTED (1 << 2)
119#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
120#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
121#define _OMAP_TIMER_COUNTER_OFFSET 0x28
122#define _OMAP_TIMER_LOAD_OFFSET 0x2c
123#define _OMAP_TIMER_TRIGGER_OFFSET 0x30
124#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34
125#define WP_NONE 0 /* no write pending bit */
126#define WP_TCLR (1 << 0)
127#define WP_TCRR (1 << 1)
128#define WP_TLDR (1 << 2)
129#define WP_TTGR (1 << 3)
130#define WP_TMAR (1 << 4)
131#define WP_TPIR (1 << 5)
132#define WP_TNIR (1 << 6)
133#define WP_TCVR (1 << 7)
134#define WP_TOCR (1 << 8)
135#define WP_TOWR (1 << 9)
136#define _OMAP_TIMER_MATCH_OFFSET 0x38
137#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c
138#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40
139#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */
140#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */
141#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */
142#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */
143#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */
144#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */
145
146/* register offsets with the write pending bit encoded */
147#define WPSHIFT 16
148
149#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \
150 | (WP_NONE << WPSHIFT))
151
152#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \
153 | (WP_NONE << WPSHIFT))
154
155#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \
156 | (WP_NONE << WPSHIFT))
157
158#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \
159 | (WP_NONE << WPSHIFT))
160
161#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \
162 | (WP_NONE << WPSHIFT))
163
164#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \
165 | (WP_NONE << WPSHIFT))
166
167#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \
168 | (WP_TCLR << WPSHIFT))
169
170#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \
171 | (WP_TCRR << WPSHIFT))
172
173#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \
174 | (WP_TLDR << WPSHIFT))
175
176#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \
177 | (WP_TTGR << WPSHIFT))
178
179#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \
180 | (WP_NONE << WPSHIFT))
181
182#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \
183 | (WP_TMAR << WPSHIFT))
184
185#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \
186 | (WP_NONE << WPSHIFT))
187
188#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \
189 | (WP_NONE << WPSHIFT))
190
191#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \
192 | (WP_NONE << WPSHIFT))
193
194#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \
195 | (WP_TPIR << WPSHIFT))
196
197#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \
198 | (WP_TNIR << WPSHIFT))
199
200#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \
201 | (WP_TCVR << WPSHIFT))
202
203#define OMAP_TIMER_TICK_INT_MASK_SET_REG \
204 (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT))
205
206#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
207 (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
208
209struct omap_dm_timer {
210 unsigned long phys_base;
211 int irq;
212#ifdef CONFIG_ARCH_OMAP2PLUS
213 struct clk *iclk, *fclk;
214#endif
215 void __iomem *io_base;
216 unsigned long rate;
217 unsigned reserved:1;
218 unsigned enabled:1;
219 unsigned posted:1;
220};
221
222extern u32 sys_timer_reserved;
223void omap_dm_timer_prepare(struct omap_dm_timer *timer);
224
225static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg,
226 int posted)
227{
228 if (posted)
229 while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
230 & (reg >> WPSHIFT))
231 cpu_relax();
232
233 return __raw_readl(base + (reg & 0xff));
234}
235
236static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val,
237 int posted)
238{
239 if (posted)
240 while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
241 & (reg >> WPSHIFT))
242 cpu_relax();
243
244 __raw_writel(val, base + (reg & 0xff));
245}
246
247/* Assumes the source clock has been set by caller */
248static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle,
249 int wakeup)
250{
251 u32 l;
252
253 l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0);
254 l |= 0x02 << 3; /* Set to smart-idle mode */
255 l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
256
257 if (autoidle)
258 l |= 0x1 << 0;
259
260 if (wakeup)
261 l |= 1 << 2;
262
263 __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0);
264
265 /* Match hardware reset default of posted mode */
266 __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG,
267 OMAP_TIMER_CTRL_POSTED, 0);
268}
269
270static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
271 struct clk *parent)
272{
273 int ret;
274
275 clk_disable(timer_fck);
276 ret = clk_set_parent(timer_fck, parent);
277 clk_enable(timer_fck);
278
279 /*
280 * When the functional clock disappears, too quick writes seem
281 * to cause an abort. XXX Is this still necessary?
282 */
283 __delay(300000);
284
285 return ret;
286}
287
288static inline void __omap_dm_timer_stop(void __iomem *base, int posted,
289 unsigned long rate)
290{
291 u32 l;
292
293 l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
294 if (l & OMAP_TIMER_CTRL_ST) {
295 l &= ~0x1;
296 __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted);
297#ifdef CONFIG_ARCH_OMAP2PLUS
298 /* Readback to make sure write has completed */
299 __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
300 /*
301 * Wait for functional clock period x 3.5 to make sure that
302 * timer is stopped
303 */
304 udelay(3500000 / rate + 1);
305#endif
306 }
307
308 /* Ack possibly pending interrupt */
309 __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG,
310 OMAP_TIMER_INT_OVERFLOW, 0);
311}
312
313static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl,
314 unsigned int load, int posted)
315{
316 __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted);
317 __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted);
318}
319
320static inline void __omap_dm_timer_int_enable(void __iomem *base,
321 unsigned int value)
322{
323 __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0);
324 __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0);
325}
326
327static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base,
328 int posted)
329{
330 return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted);
331}
332
333static inline void __omap_dm_timer_write_status(void __iomem *base,
334 unsigned int value)
335{
336 __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0);
337}
96 338
97#endif /* __ASM_ARCH_DMTIMER_H */ 339#endif /* __ASM_ARCH_DMTIMER_H */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 5a25098ea7ea..c88432005665 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,7 +428,11 @@
428#define INTCPS_NR_IRQS 96 428#define INTCPS_NR_IRQS 96
429 429
430#ifndef __ASSEMBLY__ 430#ifndef __ASSEMBLY__
431extern void omap_init_irq(void); 431extern void __iomem *omap_irq_base;
432void omap1_init_irq(void);
433void omap2_init_irq(void);
434void omap3_init_irq(void);
435void ti816x_init_irq(void);
432extern int omap_irq_pending(void); 436extern int omap_irq_pending(void);
433void omap_intc_save_context(void); 437void omap_intc_save_context(void);
434void omap_intc_restore_context(void); 438void omap_intc_restore_context(void);
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