diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/common/sharpsl_pm.c | 2 | ||||
-rw-r--r-- | arch/arm/kernel/entry-armv.S | 1 | ||||
-rw-r--r-- | arch/arm/kernel/entry-common.S | 7 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/iq81340mc.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/iq81340sc.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/irq.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/setup.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-iop13xx/time.c | 102 | ||||
-rw-r--r-- | arch/arm/mach-iop32x/glantank.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-iop32x/iq31244.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-iop32x/iq80321.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-iop32x/irq.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-iop32x/n2100.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-iop33x/iq80331.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-iop33x/iq80332.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-iop33x/irq.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/jornada720.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-iop/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/plat-iop/time.c | 66 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/Kconfig | 1 |
21 files changed, 74 insertions, 196 deletions
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index a3b450f8ef17..a9bc5b52218f 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c | |||
@@ -23,11 +23,11 @@ | |||
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/leds.h> | 25 | #include <linux/leds.h> |
26 | #include <linux/apm-emulation.h> | ||
26 | 27 | ||
27 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
28 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
29 | #include <asm/irq.h> | 30 | #include <asm/irq.h> |
30 | #include <asm/apm-emulation.h> | ||
31 | #include <asm/arch/pm.h> | 31 | #include <asm/arch/pm.h> |
32 | #include <asm/arch/pxa-regs.h> | 32 | #include <asm/arch/pxa-regs.h> |
33 | #include <asm/arch/sharpsl.h> | 33 | #include <asm/arch/sharpsl.h> |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index cc10a093a545..d645897652c2 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -27,6 +27,7 @@ | |||
27 | * Interrupt handling. Preserves r7, r8, r9 | 27 | * Interrupt handling. Preserves r7, r8, r9 |
28 | */ | 28 | */ |
29 | .macro irq_handler | 29 | .macro irq_handler |
30 | get_irqnr_preamble r5, lr | ||
30 | 1: get_irqnr_and_base r0, r6, r5, lr | 31 | 1: get_irqnr_and_base r0, r6, r5, lr |
31 | movne r1, sp | 32 | movne r1, sp |
32 | @ | 33 | @ |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 6f5e7c50d42f..c589dc3ecd1a 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -9,6 +9,7 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <asm/unistd.h> | 11 | #include <asm/unistd.h> |
12 | #include <asm/arch/entry-macro.S> | ||
12 | 13 | ||
13 | #include "entry-header.S" | 14 | #include "entry-header.S" |
14 | 15 | ||
@@ -25,6 +26,9 @@ ret_fast_syscall: | |||
25 | tst r1, #_TIF_WORK_MASK | 26 | tst r1, #_TIF_WORK_MASK |
26 | bne fast_work_pending | 27 | bne fast_work_pending |
27 | 28 | ||
29 | /* perform architecture specific actions before user return */ | ||
30 | arch_ret_to_user r1, lr | ||
31 | |||
28 | @ fast_restore_user_regs | 32 | @ fast_restore_user_regs |
29 | ldr r1, [sp, #S_OFF + S_PSR] @ get calling cpsr | 33 | ldr r1, [sp, #S_OFF + S_PSR] @ get calling cpsr |
30 | ldr lr, [sp, #S_OFF + S_PC]! @ get pc | 34 | ldr lr, [sp, #S_OFF + S_PC]! @ get pc |
@@ -61,6 +65,9 @@ ret_slow_syscall: | |||
61 | tst r1, #_TIF_WORK_MASK | 65 | tst r1, #_TIF_WORK_MASK |
62 | bne work_pending | 66 | bne work_pending |
63 | no_work_pending: | 67 | no_work_pending: |
68 | /* perform architecture specific actions before user return */ | ||
69 | arch_ret_to_user r1, lr | ||
70 | |||
64 | @ slow_restore_user_regs | 71 | @ slow_restore_user_regs |
65 | ldr r1, [sp, #S_PSR] @ get calling cpsr | 72 | ldr r1, [sp, #S_PSR] @ get calling cpsr |
66 | ldr lr, [sp, #S_PC]! @ get pc | 73 | ldr lr, [sp, #S_PC]! @ get pc |
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile index c3d6c08f2d4c..4185e0586c33 100644 --- a/arch/arm/mach-iop13xx/Makefile +++ b/arch/arm/mach-iop13xx/Makefile | |||
@@ -5,7 +5,6 @@ obj- := | |||
5 | 5 | ||
6 | obj-$(CONFIG_ARCH_IOP13XX) += setup.o | 6 | obj-$(CONFIG_ARCH_IOP13XX) += setup.o |
7 | obj-$(CONFIG_ARCH_IOP13XX) += irq.o | 7 | obj-$(CONFIG_ARCH_IOP13XX) += irq.o |
8 | obj-$(CONFIG_ARCH_IOP13XX) += time.o | ||
9 | obj-$(CONFIG_ARCH_IOP13XX) += pci.o | 8 | obj-$(CONFIG_ARCH_IOP13XX) += pci.o |
10 | obj-$(CONFIG_ARCH_IOP13XX) += io.o | 9 | obj-$(CONFIG_ARCH_IOP13XX) += io.o |
11 | obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o | 10 | obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o |
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 2a1bbfe9896f..a519d707571c 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
26 | #include <asm/arch/pci.h> | 26 | #include <asm/arch/pci.h> |
27 | #include <asm/mach/time.h> | 27 | #include <asm/mach/time.h> |
28 | #include <asm/arch/time.h> | ||
28 | 29 | ||
29 | extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */ | 30 | extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */ |
30 | 31 | ||
@@ -78,12 +79,12 @@ static void __init iq81340mc_init(void) | |||
78 | 79 | ||
79 | static void __init iq81340mc_timer_init(void) | 80 | static void __init iq81340mc_timer_init(void) |
80 | { | 81 | { |
81 | iop13xx_init_time(400000000); | 82 | iop_init_time(400000000); |
82 | } | 83 | } |
83 | 84 | ||
84 | static struct sys_timer iq81340mc_timer = { | 85 | static struct sys_timer iq81340mc_timer = { |
85 | .init = iq81340mc_timer_init, | 86 | .init = iq81340mc_timer_init, |
86 | .offset = iop13xx_gettimeoffset, | 87 | .offset = iop_gettimeoffset, |
87 | }; | 88 | }; |
88 | 89 | ||
89 | MACHINE_START(IQ81340MC, "Intel IQ81340MC") | 90 | MACHINE_START(IQ81340MC, "Intel IQ81340MC") |
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 5ad2b62c9bfd..0e71fbcabe00 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
26 | #include <asm/arch/pci.h> | 26 | #include <asm/arch/pci.h> |
27 | #include <asm/mach/time.h> | 27 | #include <asm/mach/time.h> |
28 | #include <asm/arch/time.h> | ||
28 | 29 | ||
29 | extern int init_atu; | 30 | extern int init_atu; |
30 | 31 | ||
@@ -80,12 +81,12 @@ static void __init iq81340sc_init(void) | |||
80 | 81 | ||
81 | static void __init iq81340sc_timer_init(void) | 82 | static void __init iq81340sc_timer_init(void) |
82 | { | 83 | { |
83 | iop13xx_init_time(400000000); | 84 | iop_init_time(400000000); |
84 | } | 85 | } |
85 | 86 | ||
86 | static struct sys_timer iq81340sc_timer = { | 87 | static struct sys_timer iq81340sc_timer = { |
87 | .init = iq81340sc_timer_init, | 88 | .init = iq81340sc_timer_init, |
88 | .offset = iop13xx_gettimeoffset, | 89 | .offset = iop_gettimeoffset, |
89 | }; | 90 | }; |
90 | 91 | ||
91 | MACHINE_START(IQ81340SC, "Intel IQ81340SC") | 92 | MACHINE_START(IQ81340SC, "Intel IQ81340SC") |
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index 162b93214965..b2eb0b961031 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c | |||
@@ -161,65 +161,49 @@ static void write_intsize(u32 val) | |||
161 | static void | 161 | static void |
162 | iop13xx_irq_mask0 (unsigned int irq) | 162 | iop13xx_irq_mask0 (unsigned int irq) |
163 | { | 163 | { |
164 | u32 cp_flags = iop13xx_cp6_save(); | ||
165 | write_intctl_0(read_intctl_0() & ~(1 << (irq - 0))); | 164 | write_intctl_0(read_intctl_0() & ~(1 << (irq - 0))); |
166 | iop13xx_cp6_restore(cp_flags); | ||
167 | } | 165 | } |
168 | 166 | ||
169 | static void | 167 | static void |
170 | iop13xx_irq_mask1 (unsigned int irq) | 168 | iop13xx_irq_mask1 (unsigned int irq) |
171 | { | 169 | { |
172 | u32 cp_flags = iop13xx_cp6_save(); | ||
173 | write_intctl_1(read_intctl_1() & ~(1 << (irq - 32))); | 170 | write_intctl_1(read_intctl_1() & ~(1 << (irq - 32))); |
174 | iop13xx_cp6_restore(cp_flags); | ||
175 | } | 171 | } |
176 | 172 | ||
177 | static void | 173 | static void |
178 | iop13xx_irq_mask2 (unsigned int irq) | 174 | iop13xx_irq_mask2 (unsigned int irq) |
179 | { | 175 | { |
180 | u32 cp_flags = iop13xx_cp6_save(); | ||
181 | write_intctl_2(read_intctl_2() & ~(1 << (irq - 64))); | 176 | write_intctl_2(read_intctl_2() & ~(1 << (irq - 64))); |
182 | iop13xx_cp6_restore(cp_flags); | ||
183 | } | 177 | } |
184 | 178 | ||
185 | static void | 179 | static void |
186 | iop13xx_irq_mask3 (unsigned int irq) | 180 | iop13xx_irq_mask3 (unsigned int irq) |
187 | { | 181 | { |
188 | u32 cp_flags = iop13xx_cp6_save(); | ||
189 | write_intctl_3(read_intctl_3() & ~(1 << (irq - 96))); | 182 | write_intctl_3(read_intctl_3() & ~(1 << (irq - 96))); |
190 | iop13xx_cp6_restore(cp_flags); | ||
191 | } | 183 | } |
192 | 184 | ||
193 | static void | 185 | static void |
194 | iop13xx_irq_unmask0(unsigned int irq) | 186 | iop13xx_irq_unmask0(unsigned int irq) |
195 | { | 187 | { |
196 | u32 cp_flags = iop13xx_cp6_save(); | ||
197 | write_intctl_0(read_intctl_0() | (1 << (irq - 0))); | 188 | write_intctl_0(read_intctl_0() | (1 << (irq - 0))); |
198 | iop13xx_cp6_restore(cp_flags); | ||
199 | } | 189 | } |
200 | 190 | ||
201 | static void | 191 | static void |
202 | iop13xx_irq_unmask1(unsigned int irq) | 192 | iop13xx_irq_unmask1(unsigned int irq) |
203 | { | 193 | { |
204 | u32 cp_flags = iop13xx_cp6_save(); | ||
205 | write_intctl_1(read_intctl_1() | (1 << (irq - 32))); | 194 | write_intctl_1(read_intctl_1() | (1 << (irq - 32))); |
206 | iop13xx_cp6_restore(cp_flags); | ||
207 | } | 195 | } |
208 | 196 | ||
209 | static void | 197 | static void |
210 | iop13xx_irq_unmask2(unsigned int irq) | 198 | iop13xx_irq_unmask2(unsigned int irq) |
211 | { | 199 | { |
212 | u32 cp_flags = iop13xx_cp6_save(); | ||
213 | write_intctl_2(read_intctl_2() | (1 << (irq - 64))); | 200 | write_intctl_2(read_intctl_2() | (1 << (irq - 64))); |
214 | iop13xx_cp6_restore(cp_flags); | ||
215 | } | 201 | } |
216 | 202 | ||
217 | static void | 203 | static void |
218 | iop13xx_irq_unmask3(unsigned int irq) | 204 | iop13xx_irq_unmask3(unsigned int irq) |
219 | { | 205 | { |
220 | u32 cp_flags = iop13xx_cp6_save(); | ||
221 | write_intctl_3(read_intctl_3() | (1 << (irq - 96))); | 206 | write_intctl_3(read_intctl_3() | (1 << (irq - 96))); |
222 | iop13xx_cp6_restore(cp_flags); | ||
223 | } | 207 | } |
224 | 208 | ||
225 | static struct irq_chip iop13xx_irqchip1 = { | 209 | static struct irq_chip iop13xx_irqchip1 = { |
@@ -256,7 +240,6 @@ void __init iop13xx_init_irq(void) | |||
256 | { | 240 | { |
257 | unsigned int i; | 241 | unsigned int i; |
258 | 242 | ||
259 | u32 cp_flags = iop13xx_cp6_save(); | ||
260 | iop_init_cp6_handler(); | 243 | iop_init_cp6_handler(); |
261 | 244 | ||
262 | /* disable all interrupts */ | 245 | /* disable all interrupts */ |
@@ -288,6 +271,4 @@ void __init iop13xx_init_irq(void) | |||
288 | set_irq_handler(i, handle_level_irq); | 271 | set_irq_handler(i, handle_level_irq); |
289 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 272 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
290 | } | 273 | } |
291 | |||
292 | iop13xx_cp6_restore(cp_flags); | ||
293 | } | 274 | } |
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index 5fbeb28d04bb..9a46bcd5f18e 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
25 | #include <asm/hardware.h> | 25 | #include <asm/hardware.h> |
26 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
27 | #include <asm/io.h> | ||
27 | 28 | ||
28 | #define IOP13XX_UART_XTAL 33334000 | 29 | #define IOP13XX_UART_XTAL 33334000 |
29 | #define IOP13XX_SETUP_DEBUG 0 | 30 | #define IOP13XX_SETUP_DEBUG 0 |
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c deleted file mode 100644 index 8b21365f653f..000000000000 --- a/arch/arm/mach-iop13xx/time.c +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop13xx/time.c | ||
3 | * | ||
4 | * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation) | ||
5 | * | ||
6 | * Author: Deepak Saxena <dsaxena@mvista.com> | ||
7 | * | ||
8 | * Copyright 2002-2003 MontaVista Software Inc. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/time.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/timex.h> | ||
21 | #include <asm/io.h> | ||
22 | #include <asm/irq.h> | ||
23 | #include <asm/uaccess.h> | ||
24 | #include <asm/mach/irq.h> | ||
25 | #include <asm/mach/time.h> | ||
26 | |||
27 | static unsigned long ticks_per_jiffy; | ||
28 | static unsigned long ticks_per_usec; | ||
29 | static unsigned long next_jiffy_time; | ||
30 | |||
31 | static inline u32 read_tcr1(void) | ||
32 | { | ||
33 | u32 val; | ||
34 | asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val)); | ||
35 | return val; | ||
36 | } | ||
37 | |||
38 | unsigned long iop13xx_gettimeoffset(void) | ||
39 | { | ||
40 | unsigned long offset; | ||
41 | u32 cp_flags; | ||
42 | |||
43 | cp_flags = iop13xx_cp6_save(); | ||
44 | offset = next_jiffy_time - read_tcr1(); | ||
45 | iop13xx_cp6_restore(cp_flags); | ||
46 | |||
47 | return offset / ticks_per_usec; | ||
48 | } | ||
49 | |||
50 | static irqreturn_t | ||
51 | iop13xx_timer_interrupt(int irq, void *dev_id) | ||
52 | { | ||
53 | u32 cp_flags = iop13xx_cp6_save(); | ||
54 | |||
55 | write_seqlock(&xtime_lock); | ||
56 | |||
57 | asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1)); | ||
58 | |||
59 | while ((signed long)(next_jiffy_time - read_tcr1()) | ||
60 | >= ticks_per_jiffy) { | ||
61 | timer_tick(); | ||
62 | next_jiffy_time -= ticks_per_jiffy; | ||
63 | } | ||
64 | |||
65 | write_sequnlock(&xtime_lock); | ||
66 | |||
67 | iop13xx_cp6_restore(cp_flags); | ||
68 | |||
69 | return IRQ_HANDLED; | ||
70 | } | ||
71 | |||
72 | static struct irqaction iop13xx_timer_irq = { | ||
73 | .name = "IOP13XX Timer Tick", | ||
74 | .handler = iop13xx_timer_interrupt, | ||
75 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
76 | }; | ||
77 | |||
78 | void __init iop13xx_init_time(unsigned long tick_rate) | ||
79 | { | ||
80 | u32 timer_ctl; | ||
81 | u32 cp_flags; | ||
82 | |||
83 | ticks_per_jiffy = (tick_rate + HZ/2) / HZ; | ||
84 | ticks_per_usec = tick_rate / 1000000; | ||
85 | next_jiffy_time = 0xffffffff; | ||
86 | |||
87 | timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED | | ||
88 | IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1; | ||
89 | |||
90 | /* | ||
91 | * We use timer 0 for our timer interrupt, and timer 1 as | ||
92 | * monotonic counter for tracking missed jiffies. | ||
93 | */ | ||
94 | cp_flags = iop13xx_cp6_save(); | ||
95 | asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1)); | ||
96 | asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl)); | ||
97 | asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff)); | ||
98 | asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl)); | ||
99 | iop13xx_cp6_restore(cp_flags); | ||
100 | |||
101 | setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq); | ||
102 | } | ||
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index b9b765057dbe..45f4f13ae11b 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/mach/time.h> | 31 | #include <asm/mach/time.h> |
32 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
33 | #include <asm/page.h> | 33 | #include <asm/page.h> |
34 | #include <asm/arch/time.h> | ||
34 | 35 | ||
35 | /* | 36 | /* |
36 | * GLAN Tank timer tick configuration. | 37 | * GLAN Tank timer tick configuration. |
@@ -38,12 +39,12 @@ | |||
38 | static void __init glantank_timer_init(void) | 39 | static void __init glantank_timer_init(void) |
39 | { | 40 | { |
40 | /* 33.333 MHz crystal. */ | 41 | /* 33.333 MHz crystal. */ |
41 | iop3xx_init_time(200000000); | 42 | iop_init_time(200000000); |
42 | } | 43 | } |
43 | 44 | ||
44 | static struct sys_timer glantank_timer = { | 45 | static struct sys_timer glantank_timer = { |
45 | .init = glantank_timer_init, | 46 | .init = glantank_timer_init, |
46 | .offset = iop3xx_gettimeoffset, | 47 | .offset = iop_gettimeoffset, |
47 | }; | 48 | }; |
48 | 49 | ||
49 | 50 | ||
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index be4aedfa0de6..571ac35bc2c7 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c | |||
@@ -36,7 +36,7 @@ | |||
36 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
37 | #include <asm/page.h> | 37 | #include <asm/page.h> |
38 | #include <asm/pgtable.h> | 38 | #include <asm/pgtable.h> |
39 | 39 | #include <asm/arch/time.h> | |
40 | 40 | ||
41 | /* | 41 | /* |
42 | * The EP80219 and IQ31244 use the same machine ID. To find out | 42 | * The EP80219 and IQ31244 use the same machine ID. To find out |
@@ -56,16 +56,16 @@ static void __init iq31244_timer_init(void) | |||
56 | { | 56 | { |
57 | if (is_80219()) { | 57 | if (is_80219()) { |
58 | /* 33.333 MHz crystal. */ | 58 | /* 33.333 MHz crystal. */ |
59 | iop3xx_init_time(200000000); | 59 | iop_init_time(200000000); |
60 | } else { | 60 | } else { |
61 | /* 33.000 MHz crystal. */ | 61 | /* 33.000 MHz crystal. */ |
62 | iop3xx_init_time(198000000); | 62 | iop_init_time(198000000); |
63 | } | 63 | } |
64 | } | 64 | } |
65 | 65 | ||
66 | static struct sys_timer iq31244_timer = { | 66 | static struct sys_timer iq31244_timer = { |
67 | .init = iq31244_timer_init, | 67 | .init = iq31244_timer_init, |
68 | .offset = iop3xx_gettimeoffset, | 68 | .offset = iop_gettimeoffset, |
69 | }; | 69 | }; |
70 | 70 | ||
71 | 71 | ||
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 1f37b5501888..361c70c0f64c 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
34 | #include <asm/page.h> | 34 | #include <asm/page.h> |
35 | #include <asm/pgtable.h> | 35 | #include <asm/pgtable.h> |
36 | #include <asm/arch/time.h> | ||
36 | 37 | ||
37 | /* | 38 | /* |
38 | * IQ80321 timer tick configuration. | 39 | * IQ80321 timer tick configuration. |
@@ -40,12 +41,12 @@ | |||
40 | static void __init iq80321_timer_init(void) | 41 | static void __init iq80321_timer_init(void) |
41 | { | 42 | { |
42 | /* 33.333 MHz crystal. */ | 43 | /* 33.333 MHz crystal. */ |
43 | iop3xx_init_time(200000000); | 44 | iop_init_time(200000000); |
44 | } | 45 | } |
45 | 46 | ||
46 | static struct sys_timer iq80321_timer = { | 47 | static struct sys_timer iq80321_timer = { |
47 | .init = iq80321_timer_init, | 48 | .init = iq80321_timer_init, |
48 | .offset = iop3xx_gettimeoffset, | 49 | .offset = iop_gettimeoffset, |
49 | }; | 50 | }; |
50 | 51 | ||
51 | 52 | ||
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index 8b0ac5590ae4..82598dc18d80 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c | |||
@@ -23,16 +23,12 @@ static u32 iop32x_mask; | |||
23 | 23 | ||
24 | static inline void intctl_write(u32 val) | 24 | static inline void intctl_write(u32 val) |
25 | { | 25 | { |
26 | iop3xx_cp6_enable(); | ||
27 | asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); | 26 | asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); |
28 | iop3xx_cp6_disable(); | ||
29 | } | 27 | } |
30 | 28 | ||
31 | static inline void intstr_write(u32 val) | 29 | static inline void intstr_write(u32 val) |
32 | { | 30 | { |
33 | iop3xx_cp6_enable(); | ||
34 | asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); | 31 | asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); |
35 | iop3xx_cp6_disable(); | ||
36 | } | 32 | } |
37 | 33 | ||
38 | static void | 34 | static void |
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index 966aa51aee09..5f07344d96f3 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <asm/mach-types.h> | 37 | #include <asm/mach-types.h> |
38 | #include <asm/page.h> | 38 | #include <asm/page.h> |
39 | #include <asm/pgtable.h> | 39 | #include <asm/pgtable.h> |
40 | #include <asm/arch/time.h> | ||
40 | 41 | ||
41 | /* | 42 | /* |
42 | * N2100 timer tick configuration. | 43 | * N2100 timer tick configuration. |
@@ -44,12 +45,12 @@ | |||
44 | static void __init n2100_timer_init(void) | 45 | static void __init n2100_timer_init(void) |
45 | { | 46 | { |
46 | /* 33.000 MHz crystal. */ | 47 | /* 33.000 MHz crystal. */ |
47 | iop3xx_init_time(198000000); | 48 | iop_init_time(198000000); |
48 | } | 49 | } |
49 | 50 | ||
50 | static struct sys_timer n2100_timer = { | 51 | static struct sys_timer n2100_timer = { |
51 | .init = n2100_timer_init, | 52 | .init = n2100_timer_init, |
52 | .offset = iop3xx_gettimeoffset, | 53 | .offset = iop_gettimeoffset, |
53 | }; | 54 | }; |
54 | 55 | ||
55 | 56 | ||
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 97a7b7488264..1a9e36138d80 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
33 | #include <asm/page.h> | 33 | #include <asm/page.h> |
34 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
35 | #include <asm/arch/time.h> | ||
35 | 36 | ||
36 | /* | 37 | /* |
37 | * IQ80331 timer tick configuration. | 38 | * IQ80331 timer tick configuration. |
@@ -40,14 +41,14 @@ static void __init iq80331_timer_init(void) | |||
40 | { | 41 | { |
41 | /* D-Step parts run at a higher internal bus frequency */ | 42 | /* D-Step parts run at a higher internal bus frequency */ |
42 | if (*IOP3XX_ATURID >= 0xa) | 43 | if (*IOP3XX_ATURID >= 0xa) |
43 | iop3xx_init_time(333000000); | 44 | iop_init_time(333000000); |
44 | else | 45 | else |
45 | iop3xx_init_time(266000000); | 46 | iop_init_time(266000000); |
46 | } | 47 | } |
47 | 48 | ||
48 | static struct sys_timer iq80331_timer = { | 49 | static struct sys_timer iq80331_timer = { |
49 | .init = iq80331_timer_init, | 50 | .init = iq80331_timer_init, |
50 | .offset = iop3xx_gettimeoffset, | 51 | .offset = iop_gettimeoffset, |
51 | }; | 52 | }; |
52 | 53 | ||
53 | 54 | ||
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 9887bfc1c078..96d6f0f3cd21 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
33 | #include <asm/page.h> | 33 | #include <asm/page.h> |
34 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
35 | #include <asm/arch/time.h> | ||
35 | 36 | ||
36 | /* | 37 | /* |
37 | * IQ80332 timer tick configuration. | 38 | * IQ80332 timer tick configuration. |
@@ -40,14 +41,14 @@ static void __init iq80332_timer_init(void) | |||
40 | { | 41 | { |
41 | /* D-Step parts and the iop333 run at a higher internal bus frequency */ | 42 | /* D-Step parts and the iop333 run at a higher internal bus frequency */ |
42 | if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374) | 43 | if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374) |
43 | iop3xx_init_time(333000000); | 44 | iop_init_time(333000000); |
44 | else | 45 | else |
45 | iop3xx_init_time(266000000); | 46 | iop_init_time(266000000); |
46 | } | 47 | } |
47 | 48 | ||
48 | static struct sys_timer iq80332_timer = { | 49 | static struct sys_timer iq80332_timer = { |
49 | .init = iq80332_timer_init, | 50 | .init = iq80332_timer_init, |
50 | .offset = iop3xx_gettimeoffset, | 51 | .offset = iop_gettimeoffset, |
51 | }; | 52 | }; |
52 | 53 | ||
53 | 54 | ||
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index effbe6b782d0..c65ea78a2427 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c | |||
@@ -24,44 +24,32 @@ static u32 iop33x_mask1; | |||
24 | 24 | ||
25 | static inline void intctl0_write(u32 val) | 25 | static inline void intctl0_write(u32 val) |
26 | { | 26 | { |
27 | iop3xx_cp6_enable(); | ||
28 | asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); | 27 | asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); |
29 | iop3xx_cp6_disable(); | ||
30 | } | 28 | } |
31 | 29 | ||
32 | static inline void intctl1_write(u32 val) | 30 | static inline void intctl1_write(u32 val) |
33 | { | 31 | { |
34 | iop3xx_cp6_enable(); | ||
35 | asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); | 32 | asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); |
36 | iop3xx_cp6_disable(); | ||
37 | } | 33 | } |
38 | 34 | ||
39 | static inline void intstr0_write(u32 val) | 35 | static inline void intstr0_write(u32 val) |
40 | { | 36 | { |
41 | iop3xx_cp6_enable(); | ||
42 | asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); | 37 | asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); |
43 | iop3xx_cp6_disable(); | ||
44 | } | 38 | } |
45 | 39 | ||
46 | static inline void intstr1_write(u32 val) | 40 | static inline void intstr1_write(u32 val) |
47 | { | 41 | { |
48 | iop3xx_cp6_enable(); | ||
49 | asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); | 42 | asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); |
50 | iop3xx_cp6_disable(); | ||
51 | } | 43 | } |
52 | 44 | ||
53 | static inline void intbase_write(u32 val) | 45 | static inline void intbase_write(u32 val) |
54 | { | 46 | { |
55 | iop3xx_cp6_enable(); | ||
56 | asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); | 47 | asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); |
57 | iop3xx_cp6_disable(); | ||
58 | } | 48 | } |
59 | 49 | ||
60 | static inline void intsize_write(u32 val) | 50 | static inline void intsize_write(u32 val) |
61 | { | 51 | { |
62 | iop3xx_cp6_enable(); | ||
63 | asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); | 52 | asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); |
64 | iop3xx_cp6_disable(); | ||
65 | } | 53 | } |
66 | 54 | ||
67 | static void | 55 | static void |
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 54ecdaa373d6..64067cd58d36 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c | |||
@@ -231,12 +231,6 @@ static struct platform_device *devices[] __initdata = { | |||
231 | &s1d13xxxfb_device, | 231 | &s1d13xxxfb_device, |
232 | }; | 232 | }; |
233 | 233 | ||
234 | /* a stub for now, we theoretically cannot suspend without a flashboard */ | ||
235 | int pm_suspend(suspend_state_t state) | ||
236 | { | ||
237 | return -1; | ||
238 | } | ||
239 | |||
240 | static int __init jornada720_init(void) | 234 | static int __init jornada720_init(void) |
241 | { | 235 | { |
242 | int ret = -ENODEV; | 236 | int ret = -ENODEV; |
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index 3250d732a171..4d2b1da3cd82 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile | |||
@@ -24,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += cp6.o | |||
24 | 24 | ||
25 | # IOP13XX | 25 | # IOP13XX |
26 | obj-$(CONFIG_ARCH_IOP13XX) += cp6.o | 26 | obj-$(CONFIG_ARCH_IOP13XX) += cp6.o |
27 | obj-$(CONFIG_ARCH_IOP13XX) += time.o | ||
27 | 28 | ||
28 | obj-m := | 29 | obj-m := |
29 | obj-n := | 30 | obj-n := |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index f530abdaa7a1..16300adfb4de 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -24,39 +24,45 @@ | |||
24 | #include <asm/uaccess.h> | 24 | #include <asm/uaccess.h> |
25 | #include <asm/mach/irq.h> | 25 | #include <asm/mach/irq.h> |
26 | #include <asm/mach/time.h> | 26 | #include <asm/mach/time.h> |
27 | 27 | #include <asm/arch/time.h> | |
28 | #ifdef CONFIG_ARCH_IOP32X | ||
29 | #define IRQ_IOP3XX_TIMER0 IRQ_IOP32X_TIMER0 | ||
30 | #else | ||
31 | #ifdef CONFIG_ARCH_IOP33X | ||
32 | #define IRQ_IOP3XX_TIMER0 IRQ_IOP33X_TIMER0 | ||
33 | #endif | ||
34 | #endif | ||
35 | 28 | ||
36 | static unsigned long ticks_per_jiffy; | 29 | static unsigned long ticks_per_jiffy; |
37 | static unsigned long ticks_per_usec; | 30 | static unsigned long ticks_per_usec; |
38 | static unsigned long next_jiffy_time; | 31 | static unsigned long next_jiffy_time; |
39 | 32 | ||
40 | unsigned long iop3xx_gettimeoffset(void) | 33 | unsigned long iop_gettimeoffset(void) |
41 | { | 34 | { |
42 | unsigned long offset; | 35 | unsigned long offset, temp1, temp2; |
43 | 36 | ||
44 | offset = next_jiffy_time - *IOP3XX_TU_TCR1; | 37 | /* enable cp6, if necessary, to avoid taking the overhead of an |
38 | * undefined instruction trap | ||
39 | */ | ||
40 | asm volatile ( | ||
41 | "mrc p15, 0, %0, c15, c1, 0\n\t" | ||
42 | "ands %1, %0, #(1 << 6)\n\t" | ||
43 | "orreq %0, %0, #(1 << 6)\n\t" | ||
44 | "mcreq p15, 0, %0, c15, c1, 0\n\t" | ||
45 | #ifdef CONFIG_XSCALE | ||
46 | "mrceq p15, 0, %0, c15, c1, 0\n\t" | ||
47 | "moveq %0, %0\n\t" | ||
48 | "subeq pc, pc, #4\n\t" | ||
49 | #endif | ||
50 | : "=r"(temp1), "=r"(temp2) : : "cc"); | ||
51 | |||
52 | offset = next_jiffy_time - read_tcr1(); | ||
45 | 53 | ||
46 | return offset / ticks_per_usec; | 54 | return offset / ticks_per_usec; |
47 | } | 55 | } |
48 | 56 | ||
49 | static irqreturn_t | 57 | static irqreturn_t |
50 | iop3xx_timer_interrupt(int irq, void *dev_id) | 58 | iop_timer_interrupt(int irq, void *dev_id) |
51 | { | 59 | { |
52 | write_seqlock(&xtime_lock); | 60 | write_seqlock(&xtime_lock); |
53 | 61 | ||
54 | iop3xx_cp6_enable(); | 62 | write_tisr(1); |
55 | asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); | ||
56 | iop3xx_cp6_disable(); | ||
57 | 63 | ||
58 | while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) | 64 | while ((signed long)(next_jiffy_time - read_tcr1()) |
59 | >= ticks_per_jiffy) { | 65 | >= ticks_per_jiffy) { |
60 | timer_tick(); | 66 | timer_tick(); |
61 | next_jiffy_time -= ticks_per_jiffy; | 67 | next_jiffy_time -= ticks_per_jiffy; |
62 | } | 68 | } |
@@ -66,13 +72,13 @@ iop3xx_timer_interrupt(int irq, void *dev_id) | |||
66 | return IRQ_HANDLED; | 72 | return IRQ_HANDLED; |
67 | } | 73 | } |
68 | 74 | ||
69 | static struct irqaction iop3xx_timer_irq = { | 75 | static struct irqaction iop_timer_irq = { |
70 | .name = "IOP3XX Timer Tick", | 76 | .name = "IOP Timer Tick", |
71 | .handler = iop3xx_timer_interrupt, | 77 | .handler = iop_timer_interrupt, |
72 | .flags = IRQF_DISABLED | IRQF_TIMER, | 78 | .flags = IRQF_DISABLED | IRQF_TIMER, |
73 | }; | 79 | }; |
74 | 80 | ||
75 | void __init iop3xx_init_time(unsigned long tick_rate) | 81 | void __init iop_init_time(unsigned long tick_rate) |
76 | { | 82 | { |
77 | u32 timer_ctl; | 83 | u32 timer_ctl; |
78 | 84 | ||
@@ -80,19 +86,17 @@ void __init iop3xx_init_time(unsigned long tick_rate) | |||
80 | ticks_per_usec = tick_rate / 1000000; | 86 | ticks_per_usec = tick_rate / 1000000; |
81 | next_jiffy_time = 0xffffffff; | 87 | next_jiffy_time = 0xffffffff; |
82 | 88 | ||
83 | timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED | | 89 | timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED | |
84 | IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1; | 90 | IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1; |
85 | 91 | ||
86 | /* | 92 | /* |
87 | * We use timer 0 for our timer interrupt, and timer 1 as | 93 | * We use timer 0 for our timer interrupt, and timer 1 as |
88 | * monotonic counter for tracking missed jiffies. | 94 | * monotonic counter for tracking missed jiffies. |
89 | */ | 95 | */ |
90 | iop3xx_cp6_enable(); | 96 | write_trr0(ticks_per_jiffy - 1); |
91 | asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); | 97 | write_tmr0(timer_ctl); |
92 | asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); | 98 | write_trr1(0xffffffff); |
93 | asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); | 99 | write_tmr1(timer_ctl); |
94 | asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); | 100 | |
95 | iop3xx_cp6_disable(); | 101 | setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); |
96 | |||
97 | setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); | ||
98 | } | 102 | } |
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index e22343160634..860869528f4c 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig | |||
@@ -8,6 +8,7 @@ config PLAT_S3C24XX | |||
8 | bool | 8 | bool |
9 | depends on ARCH_S3C2410 | 9 | depends on ARCH_S3C2410 |
10 | default y if ARCH_S3C2410 | 10 | default y if ARCH_S3C2410 |
11 | select NO_IOPORT | ||
11 | help | 12 | help |
12 | Base platform code for any Samsung S3C device | 13 | Base platform code for any Samsung S3C device |
13 | 14 | ||