aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/common/sa1111.c2
-rw-r--r--arch/arm/configs/corgi_defconfig2
-rw-r--r--arch/arm/include/asm/bitops.h16
-rw-r--r--arch/arm/include/asm/dma-mapping.h13
-rw-r--r--arch/arm/include/asm/hardware/iop3xx-adma.h5
-rw-r--r--arch/arm/include/asm/hardware/iop_adma.h6
-rw-r--r--arch/arm/include/asm/mach/map.h13
-rw-r--r--arch/arm/include/asm/memory.h12
-rw-r--r--arch/arm/include/asm/processor.h2
-rw-r--r--arch/arm/include/asm/system.h4
-rw-r--r--arch/arm/kernel/armksyms.c4
-rw-r--r--arch/arm/kernel/elf.c6
-rw-r--r--arch/arm/kernel/module.c8
-rw-r--r--arch/arm/kernel/traps.c1
-rw-r--r--arch/arm/mach-clps711x/include/mach/hardware.h22
-rw-r--r--arch/arm/mach-clps7500/core.c6
-rw-r--r--arch/arm/mach-clps7500/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-h720x/include/mach/boards.h6
-rw-r--r--arch/arm/mach-integrator/include/mach/platform.h19
-rw-r--r--arch/arm/mach-iop13xx/include/mach/adma.h3
-rw-r--r--arch/arm/mach-omap1/io.c2
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/reset.h5
-rw-r--r--arch/arm/mach-pxa/mioa701.c2
-rw-r--r--arch/arm/mach-pxa/mioa701_bootresume.S1
-rw-r--r--arch/arm/mach-pxa/palmtx.c150
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c1
-rw-r--r--arch/arm/mach-pxa/reset.c7
-rw-r--r--arch/arm/mach-pxa/spitz.c4
-rw-r--r--arch/arm/mach-realview/clock.c2
-rw-r--r--arch/arm/mach-realview/include/mach/platform.h19
-rw-r--r--arch/arm/mach-s3c2410/include/mach/spi-gpio.h1
-rw-r--r--arch/arm/mach-versatile/clock.c2
-rw-r--r--arch/arm/mach-versatile/include/mach/platform.h18
-rw-r--r--arch/arm/mm/alignment.c26
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c4
-rw-r--r--arch/arm/mm/cache-xsc3l2.c4
-rw-r--r--arch/arm/mm/fault.c1
-rw-r--r--arch/arm/mm/mmu.c117
-rw-r--r--arch/arm/mm/proc-v7.S12
-rw-r--r--arch/arm/plat-iop/setup.c5
-rw-r--r--arch/arm/plat-omap/clock.c20
-rw-r--r--arch/arm/plat-omap/gpio.c5
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S4
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/mach/omapfb.h4
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h2
-rw-r--r--arch/arm/plat-omap/sram.c8
-rw-r--r--arch/arm/plat-orion/pcie.c2
50 files changed, 359 insertions, 234 deletions
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 47ccec95f3e8..ef12794c3c68 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -630,7 +630,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
630 return -ENOMEM; 630 return -ENOMEM;
631 631
632 sachip->clk = clk_get(me, "SA1111_CLK"); 632 sachip->clk = clk_get(me, "SA1111_CLK");
633 if (!sachip->clk) { 633 if (IS_ERR(sachip->clk)) {
634 ret = PTR_ERR(sachip->clk); 634 ret = PTR_ERR(sachip->clk);
635 goto err_free; 635 goto err_free;
636 } 636 }
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
index f3af0b593eb0..98765438048d 100644
--- a/arch/arm/configs/corgi_defconfig
+++ b/arch/arm/configs/corgi_defconfig
@@ -179,7 +179,7 @@ CONFIG_MACH_HUSKY=y
179# CONFIG_MACH_AKITA is not set 179# CONFIG_MACH_AKITA is not set
180# CONFIG_MACH_SPITZ is not set 180# CONFIG_MACH_SPITZ is not set
181# CONFIG_MACH_BORZOI is not set 181# CONFIG_MACH_BORZOI is not set
182CONFIG_MACH_TOSA=y 182# CONFIG_MACH_TOSA is not set
183# CONFIG_ARCH_VIPER is not set 183# CONFIG_ARCH_VIPER is not set
184# CONFIG_ARCH_PXA_ESERIES is not set 184# CONFIG_ARCH_PXA_ESERIES is not set
185# CONFIG_TRIZEPS_PXA is not set 185# CONFIG_TRIZEPS_PXA is not set
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 9a1db20e032a..63a481fbbed4 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -237,6 +237,7 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
237#if __LINUX_ARM_ARCH__ < 5 237#if __LINUX_ARM_ARCH__ < 5
238 238
239#include <asm-generic/bitops/ffz.h> 239#include <asm-generic/bitops/ffz.h>
240#include <asm-generic/bitops/__fls.h>
240#include <asm-generic/bitops/__ffs.h> 241#include <asm-generic/bitops/__ffs.h>
241#include <asm-generic/bitops/fls.h> 242#include <asm-generic/bitops/fls.h>
242#include <asm-generic/bitops/ffs.h> 243#include <asm-generic/bitops/ffs.h>
@@ -277,16 +278,19 @@ static inline int constant_fls(int x)
277 * the clz instruction for much better code efficiency. 278 * the clz instruction for much better code efficiency.
278 */ 279 */
279 280
280#define __fls(x) \
281 ( __builtin_constant_p(x) ? constant_fls(x) : \
282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
283
284/* Implement fls() in C so that 64-bit args are suitably truncated */
285static inline int fls(int x) 281static inline int fls(int x)
286{ 282{
287 return __fls(x); 283 int ret;
284
285 if (__builtin_constant_p(x))
286 return constant_fls(x);
287
288 asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
289 ret = 32 - ret;
290 return ret;
288} 291}
289 292
293#define __fls(x) (fls(x) - 1)
290#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) 294#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
291#define __ffs(x) (ffs(x) - 1) 295#define __ffs(x) (ffs(x) - 1)
292#define ffz(x) __ffs( ~(x) ) 296#define ffz(x) __ffs( ~(x) )
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 1cb8602dd9d5..4ed149cbb32a 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -256,8 +256,17 @@ int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
256int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long, 256int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
257 size_t, enum dma_data_direction); 257 size_t, enum dma_data_direction);
258#else 258#else
259#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1) 259static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
260#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1) 260 unsigned long offset, size_t size, enum dma_data_direction dir)
261{
262 return 1;
263}
264
265static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
266 unsigned long offset, size_t size, enum dma_data_direction dir)
267{
268 return 1;
269}
261 270
262 271
263/** 272/**
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h
index 87bff09633aa..83e6ba338e2c 100644
--- a/arch/arm/include/asm/hardware/iop3xx-adma.h
+++ b/arch/arm/include/asm/hardware/iop3xx-adma.h
@@ -730,7 +730,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
730{ 730{
731 /* hw_desc->next_desc is the same location for all channels */ 731 /* hw_desc->next_desc is the same location for all channels */
732 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; 732 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
733 BUG_ON(hw_desc.dma->next_desc); 733
734 iop_paranoia(hw_desc.dma->next_desc);
734 hw_desc.dma->next_desc = next_desc_addr; 735 hw_desc.dma->next_desc = next_desc_addr;
735} 736}
736 737
@@ -760,7 +761,7 @@ static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
760 struct iop3xx_desc_aau *hw_desc = desc->hw_desc; 761 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
761 struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field; 762 struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;
762 763
763 BUG_ON(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en)); 764 iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));
764 return desc_ctrl.zero_result_err; 765 return desc_ctrl.zero_result_err;
765} 766}
766 767
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index cb7e3611bcba..385c6e8cbbd2 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -23,6 +23,12 @@
23 23
24#define IOP_ADMA_SLOT_SIZE 32 24#define IOP_ADMA_SLOT_SIZE 32
25#define IOP_ADMA_THRESHOLD 4 25#define IOP_ADMA_THRESHOLD 4
26#ifdef DEBUG
27#define IOP_PARANOIA 1
28#else
29#define IOP_PARANOIA 0
30#endif
31#define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x))
26 32
27/** 33/**
28 * struct iop_adma_device - internal representation of an ADMA device 34 * struct iop_adma_device - internal representation of an ADMA device
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index cb1139ac1943..39d949b63e80 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -19,12 +19,13 @@ struct map_desc {
19}; 19};
20 20
21/* types 0-3 are defined in asm/io.h */ 21/* types 0-3 are defined in asm/io.h */
22#define MT_CACHECLEAN 4 22#define MT_UNCACHED 4
23#define MT_MINICLEAN 5 23#define MT_CACHECLEAN 5
24#define MT_LOW_VECTORS 6 24#define MT_MINICLEAN 6
25#define MT_HIGH_VECTORS 7 25#define MT_LOW_VECTORS 7
26#define MT_MEMORY 8 26#define MT_HIGH_VECTORS 8
27#define MT_ROM 9 27#define MT_MEMORY 9
28#define MT_ROM 10
28 29
29#ifdef CONFIG_MMU 30#ifdef CONFIG_MMU
30extern void iotable_init(struct map_desc *, int); 31extern void iotable_init(struct map_desc *, int);
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 809ff9ab853a..77764301844b 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -44,10 +44,10 @@
44 * The module space lives between the addresses given by TASK_SIZE 44 * The module space lives between the addresses given by TASK_SIZE
45 * and PAGE_OFFSET - it must be within 32MB of the kernel text. 45 * and PAGE_OFFSET - it must be within 32MB of the kernel text.
46 */ 46 */
47#define MODULE_END (PAGE_OFFSET) 47#define MODULES_END (PAGE_OFFSET)
48#define MODULE_START (MODULE_END - 16*1048576) 48#define MODULES_VADDR (MODULES_END - 16*1048576)
49 49
50#if TASK_SIZE > MODULE_START 50#if TASK_SIZE > MODULES_VADDR
51#error Top of user space clashes with start of module space 51#error Top of user space clashes with start of module space
52#endif 52#endif
53 53
@@ -56,7 +56,7 @@
56 * Since we use sections to map it, this macro replaces the physical address 56 * Since we use sections to map it, this macro replaces the physical address
57 * with its virtual address while keeping offset from the base section. 57 * with its virtual address while keeping offset from the base section.
58 */ 58 */
59#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) 59#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
60 60
61/* 61/*
62 * Allow 16MB-aligned ioremap pages 62 * Allow 16MB-aligned ioremap pages
@@ -94,8 +94,8 @@
94/* 94/*
95 * The module can be at any place in ram in nommu mode. 95 * The module can be at any place in ram in nommu mode.
96 */ 96 */
97#define MODULE_END (END_MEM) 97#define MODULES_END (END_MEM)
98#define MODULE_START (PHYS_OFFSET) 98#define MODULES_VADDR (PHYS_OFFSET)
99 99
100#endif /* !CONFIG_MMU */ 100#endif /* !CONFIG_MMU */
101 101
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 517a4d6ffc74..6ff33790f47b 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -23,7 +23,7 @@
23#include <asm/types.h> 23#include <asm/types.h>
24 24
25#ifdef __KERNEL__ 25#ifdef __KERNEL__
26#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \ 26#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
27 TASK_SIZE : TASK_SIZE_26) 27 TASK_SIZE : TASK_SIZE_26)
28#define STACK_TOP_MAX TASK_SIZE 28#define STACK_TOP_MAX TASK_SIZE
29#endif 29#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 7aad78420f18..568020b34e3e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -42,6 +42,10 @@
42#define CR_U (1 << 22) /* Unaligned access operation */ 42#define CR_U (1 << 22) /* Unaligned access operation */
43#define CR_XP (1 << 23) /* Extended page tables */ 43#define CR_XP (1 << 23) /* Extended page tables */
44#define CR_VE (1 << 24) /* Vectored interrupts */ 44#define CR_VE (1 << 24) /* Vectored interrupts */
45#define CR_EE (1 << 25) /* Exception (Big) Endian */
46#define CR_TRE (1 << 28) /* TEX remap enable */
47#define CR_AFE (1 << 29) /* Access flag enable */
48#define CR_TE (1 << 30) /* Thumb exception enable */
45 49
46/* 50/*
47 * This is used to ensure the compiler did actually allocate the register we 51 * This is used to ensure the compiler did actually allocate the register we
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c74f766ffc12..23af3c972c9a 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -115,6 +115,8 @@ EXPORT_SYMBOL(__strnlen_user);
115EXPORT_SYMBOL(__strncpy_from_user); 115EXPORT_SYMBOL(__strncpy_from_user);
116 116
117#ifdef CONFIG_MMU 117#ifdef CONFIG_MMU
118EXPORT_SYMBOL(copy_page);
119
118EXPORT_SYMBOL(__copy_from_user); 120EXPORT_SYMBOL(__copy_from_user);
119EXPORT_SYMBOL(__copy_to_user); 121EXPORT_SYMBOL(__copy_to_user);
120EXPORT_SYMBOL(__clear_user); 122EXPORT_SYMBOL(__clear_user);
@@ -181,8 +183,6 @@ EXPORT_SYMBOL(_find_first_bit_be);
181EXPORT_SYMBOL(_find_next_bit_be); 183EXPORT_SYMBOL(_find_next_bit_be);
182#endif 184#endif
183 185
184EXPORT_SYMBOL(copy_page);
185
186#ifdef CONFIG_FUNCTION_TRACER 186#ifdef CONFIG_FUNCTION_TRACER
187EXPORT_SYMBOL(mcount); 187EXPORT_SYMBOL(mcount);
188#endif 188#endif
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index 513f332f040d..84849098c8e8 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -21,12 +21,16 @@ int elf_check_arch(const struct elf32_hdr *x)
21 21
22 eflags = x->e_flags; 22 eflags = x->e_flags;
23 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { 23 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
24 unsigned int flt_fmt;
25
24 /* APCS26 is only allowed if the CPU supports it */ 26 /* APCS26 is only allowed if the CPU supports it */
25 if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT)) 27 if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT))
26 return 0; 28 return 0;
27 29
30 flt_fmt = eflags & (EF_ARM_VFP_FLOAT | EF_ARM_SOFT_FLOAT);
31
28 /* VFP requires the supporting code */ 32 /* VFP requires the supporting code */
29 if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP)) 33 if (flt_fmt == EF_ARM_VFP_FLOAT && !(elf_hwcap & HWCAP_VFP))
30 return 0; 34 return 0;
31 } 35 }
32 return 1; 36 return 1;
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 9203ba7d58ee..b8d965dcd6fd 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -26,12 +26,12 @@
26/* 26/*
27 * The XIP kernel text is mapped in the module area for modules and 27 * The XIP kernel text is mapped in the module area for modules and
28 * some other stuff to work without any indirect relocations. 28 * some other stuff to work without any indirect relocations.
29 * MODULE_START is redefined here and not in asm/memory.h to avoid 29 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
30 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. 30 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
31 */ 31 */
32extern void _etext; 32extern void _etext;
33#undef MODULE_START 33#undef MODULES_VADDR
34#define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) 34#define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
35#endif 35#endif
36 36
37#ifdef CONFIG_MMU 37#ifdef CONFIG_MMU
@@ -43,7 +43,7 @@ void *module_alloc(unsigned long size)
43 if (!size) 43 if (!size)
44 return NULL; 44 return NULL;
45 45
46 area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END); 46 area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
47 if (!area) 47 if (!area)
48 return NULL; 48 return NULL;
49 49
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 57e6874d0b80..79abc4ddc0cf 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -18,6 +18,7 @@
18#include <linux/personality.h> 18#include <linux/personality.h>
19#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/hardirq.h>
21#include <linux/init.h> 22#include <linux/init.h>
22#include <linux/uaccess.h> 23#include <linux/uaccess.h>
23 24
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 4c3e101b96c9..b3ebe9e4871f 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -94,20 +94,6 @@
94#include <asm/hardware/ep7212.h> 94#include <asm/hardware/ep7212.h>
95#include <asm/hardware/cs89712.h> 95#include <asm/hardware/cs89712.h>
96 96
97/* dynamic ioremap() areas */
98#define FLASH_START 0x00000000
99#define FLASH_SIZE 0x800000
100#define FLASH_WIDTH 4
101
102#define SRAM_START 0x60000000
103#define SRAM_SIZE 0xc000
104#define SRAM_WIDTH 4
105
106#define BOOTROM_START 0x70000000
107#define BOOTROM_SIZE 0x80
108#define BOOTROM_WIDTH 4
109
110
111/* static cdb89712_map_io() areas */ 97/* static cdb89712_map_io() areas */
112#define REGISTER_START 0x80000000 98#define REGISTER_START 0x80000000
113#define REGISTER_SIZE 0x4000 99#define REGISTER_SIZE 0x4000
@@ -198,14 +184,6 @@
198#define CEIVA_FLASH_SIZE 0x100000 184#define CEIVA_FLASH_SIZE 0x100000
199#define CEIVA_FLASH_WIDTH 2 185#define CEIVA_FLASH_WIDTH 2
200 186
201#define SRAM_START 0x60000000
202#define SRAM_SIZE 0xc000
203#define SRAM_WIDTH 4
204
205#define BOOTROM_START 0x70000000
206#define BOOTROM_SIZE 0x80
207#define BOOTROM_WIDTH 4
208
209/* 187/*
210 * SED1355 LCD controller 188 * SED1355 LCD controller
211 */ 189 */
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index c3a33b8a5aac..7e247c04d41c 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -275,9 +275,9 @@ static struct map_desc cl7500_io_desc[] __initdata = {
275 .length = ISA_SIZE, 275 .length = ISA_SIZE,
276 .type = MT_DEVICE 276 .type = MT_DEVICE
277 }, { /* Flash */ 277 }, { /* Flash */
278 .virtual = FLASH_BASE, 278 .virtual = CLPS7500_FLASH_BASE,
279 .pfn = __phys_to_pfn(FLASH_START), 279 .pfn = __phys_to_pfn(CLPS7500_FLASH_START),
280 .length = FLASH_SIZE, 280 .length = CLPS7500_FLASH_SIZE,
281 .type = MT_DEVICE 281 .type = MT_DEVICE
282 }, { /* LED */ 282 }, { /* LED */
283 .virtual = LED_BASE, 283 .virtual = LED_BASE,
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
index d66578a3371c..a6ad1d44badf 100644
--- a/arch/arm/mach-clps7500/include/mach/hardware.h
+++ b/arch/arm/mach-clps7500/include/mach/hardware.h
@@ -39,9 +39,9 @@
39#define ISA_SIZE 0x00010000 39#define ISA_SIZE 0x00010000
40#define ISA_BASE 0xe1000000 40#define ISA_BASE 0xe1000000
41 41
42#define FLASH_START 0x01000000 /* XXX */ 42#define CLPS7500_FLASH_START 0x01000000 /* XXX */
43#define FLASH_SIZE 0x01000000 43#define CLPS7500_FLASH_SIZE 0x01000000
44#define FLASH_BASE 0xe2000000 44#define CLPS7500_FLASH_BASE 0xe2000000
45 45
46#define LED_START 0x0302B000 46#define LED_START 0x0302B000
47#define LED_SIZE 0x00001000 47#define LED_SIZE 0x00001000
diff --git a/arch/arm/mach-h720x/include/mach/boards.h b/arch/arm/mach-h720x/include/mach/boards.h
index 079b279e1242..38b8e0d61fbf 100644
--- a/arch/arm/mach-h720x/include/mach/boards.h
+++ b/arch/arm/mach-h720x/include/mach/boards.h
@@ -19,9 +19,9 @@
19#ifdef CONFIG_ARCH_H7202 19#ifdef CONFIG_ARCH_H7202
20 20
21/* FLASH */ 21/* FLASH */
22#define FLASH_VIRT 0xd0000000 22#define H720X_FLASH_VIRT 0xd0000000
23#define FLASH_PHYS 0x00000000 23#define H720X_FLASH_PHYS 0x00000000
24#define FLASH_SIZE 0x02000000 24#define H720X_FLASH_SIZE 0x02000000
25 25
26/* onboard LAN controller */ 26/* onboard LAN controller */
27# define ETH0_PHYS 0x08000000 27# define ETH0_PHYS 0x08000000
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index 028b87839c0f..e00a2624f269 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -408,27 +408,10 @@
408#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE 408#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE
409 409
410/* 410/*
411 * Application Flash
412 *
413 */
414#define FLASH_BASE INTEGRATOR_FLASH_BASE
415#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
416#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
417#define FLASH_BLOCK_SIZE SZ_128K
418
419/*
420 * Boot Flash
421 *
422 */
423#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI
424#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE
425#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
426
427/*
428 * Clean base - dummy 411 * Clean base - dummy
429 * 412 *
430 */ 413 */
431#define CLEAN_BASE EPROM_BASE 414#define CLEAN_BASE INTEGRATOR_BOOT_ROM_HI
432 415
433/* 416/*
434 * Timer definitions 417 * Timer definitions
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h
index 60019c8e6465..5722e86f2174 100644
--- a/arch/arm/mach-iop13xx/include/mach/adma.h
+++ b/arch/arm/mach-iop13xx/include/mach/adma.h
@@ -404,7 +404,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
404 u32 next_desc_addr) 404 u32 next_desc_addr)
405{ 405{
406 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; 406 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
407 BUG_ON(hw_desc->next_desc); 407
408 iop_paranoia(hw_desc->next_desc);
408 hw_desc->next_desc = next_desc_addr; 409 hw_desc->next_desc = next_desc_addr;
409} 410}
410 411
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index b3bd8ca85118..4c3e582f3d3c 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -128,7 +128,7 @@ void __init omap1_map_common_io(void)
128 * Common low-level hardware init for omap1. This should only get called from 128 * Common low-level hardware init for omap1. This should only get called from
129 * board specific init. 129 * board specific init.
130 */ 130 */
131void __init omap1_init_common_hw() 131void __init omap1_init_common_hw(void)
132{ 132{
133 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort 133 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
134 * on a Posted Write in the TIPB Bridge". 134 * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 763bdbeaf681..2249049c1d5a 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -429,18 +429,16 @@ void __init gpmc_init(void)
429 gpmc_l3_clk = clk_get(NULL, ck); 429 gpmc_l3_clk = clk_get(NULL, ck);
430 if (IS_ERR(gpmc_l3_clk)) { 430 if (IS_ERR(gpmc_l3_clk)) {
431 printk(KERN_ERR "Could not get GPMC clock %s\n", ck); 431 printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
432 return -ENODEV; 432 BUG();
433 } 433 }
434 434
435 gpmc_base = ioremap(l, SZ_4K); 435 gpmc_base = ioremap(l, SZ_4K);
436 if (!gpmc_base) { 436 if (!gpmc_base) {
437 clk_put(gpmc_l3_clk); 437 clk_put(gpmc_l3_clk);
438 printk(KERN_ERR "Could not get GPMC register memory\n"); 438 printk(KERN_ERR "Could not get GPMC register memory\n");
439 return -ENOMEM; 439 BUG();
440 } 440 }
441 441
442 BUG_ON(IS_ERR(gpmc_l3_clk));
443
444 l = gpmc_read_reg(GPMC_REVISION); 442 l = gpmc_read_reg(GPMC_REVISION);
445 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); 443 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
446 /* Set smart idle mode and automatic L3 clock gating */ 444 /* Set smart idle mode and automatic L3 clock gating */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 8e591118371e..cbda4d35c421 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -33,6 +33,7 @@
33#define LCD_CONN_TYPE(_x) ((_x) & 0x0f) 33#define LCD_CONN_TYPE(_x) ((_x) & 0x0f)
34#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) 34#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f)
35 35
36#define LCD_TYPE_MASK 0xf
36#define LCD_TYPE_UNKNOWN 0 37#define LCD_TYPE_UNKNOWN 0
37#define LCD_TYPE_MONO_STN 1 38#define LCD_TYPE_MONO_STN 1
38#define LCD_TYPE_MONO_DSTN 2 39#define LCD_TYPE_MONO_DSTN 2
diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h
index 7b8842cfa5fc..31e6a7b6ad80 100644
--- a/arch/arm/mach-pxa/include/mach/reset.h
+++ b/arch/arm/mach-pxa/include/mach/reset.h
@@ -12,9 +12,8 @@ extern void clear_reset_status(unsigned int mask);
12 12
13/** 13/**
14 * init_gpio_reset() - register GPIO as reset generator 14 * init_gpio_reset() - register GPIO as reset generator
15 * 15 * @gpio: gpio nr
16 * @gpio - gpio nr 16 * @output: set gpio as out/low instead of input during normal work
17 * @output - set gpio as out/low instead of input during normal work
18 */ 17 */
19extern int init_gpio_reset(int gpio, int output); 18extern int init_gpio_reset(int gpio, int output);
20 19
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 0842c531ee4d..782903fe9c6c 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -565,7 +565,7 @@ static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
565 u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); 565 u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
566 566
567 /* Devices prepare suspend */ 567 /* Devices prepare suspend */
568 is_bt_on = gpio_get_value(GPIO83_BT_ON); 568 is_bt_on = !!gpio_get_value(GPIO83_BT_ON);
569 pxa2xx_mfp_set_lpm(GPIO83_BT_ON, 569 pxa2xx_mfp_set_lpm(GPIO83_BT_ON,
570 is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW); 570 is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW);
571 571
diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S
index a647693d9856..324d25a48c85 100644
--- a/arch/arm/mach-pxa/mioa701_bootresume.S
+++ b/arch/arm/mach-pxa/mioa701_bootresume.S
@@ -24,6 +24,7 @@ ENTRY(mioa701_jumpaddr)
241: 241:
25 mov r0, #0xa0000000 @ Don't suppose memory access works 25 mov r0, #0xa0000000 @ Don't suppose memory access works
26 orr r0, r0, #0x00200000 @ even if it's supposed to 26 orr r0, r0, #0x00200000 @ even if it's supposed to
27 orr r0, r0, #0x0000b000
27 mov r1, #0 28 mov r1, #0
28 str r1, [r0] @ Early disable resume for next boot 29 str r1, [r0] @ Early disable resume for next boot
29 ldr r0, mioa701_jumpaddr @ (Murphy's Law) 30 ldr r0, mioa701_jumpaddr @ (Murphy's Law)
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 4447711c9fc6..a9d94f5dbec4 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -56,6 +56,9 @@ static unsigned long palmtx_pin_config[] __initdata = {
56 GPIO110_MMC_DAT_2, 56 GPIO110_MMC_DAT_2,
57 GPIO111_MMC_DAT_3, 57 GPIO111_MMC_DAT_3,
58 GPIO112_MMC_CMD, 58 GPIO112_MMC_CMD,
59 GPIO14_GPIO, /* SD detect */
60 GPIO114_GPIO, /* SD power */
61 GPIO115_GPIO, /* SD r/o switch */
59 62
60 /* AC97 */ 63 /* AC97 */
61 GPIO28_AC97_BITCLK, 64 GPIO28_AC97_BITCLK,
@@ -64,6 +67,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
64 GPIO31_AC97_SYNC, 67 GPIO31_AC97_SYNC,
65 68
66 /* IrDA */ 69 /* IrDA */
70 GPIO40_GPIO, /* ir disable */
67 GPIO46_FICP_RXD, 71 GPIO46_FICP_RXD,
68 GPIO47_FICP_TXD, 72 GPIO47_FICP_TXD,
69 73
@@ -71,7 +75,8 @@ static unsigned long palmtx_pin_config[] __initdata = {
71 GPIO16_PWM0_OUT, 75 GPIO16_PWM0_OUT,
72 76
73 /* USB */ 77 /* USB */
74 GPIO13_GPIO, 78 GPIO13_GPIO, /* usb detect */
79 GPIO95_GPIO, /* usb power */
75 80
76 /* PCMCIA */ 81 /* PCMCIA */
77 GPIO48_nPOE, 82 GPIO48_nPOE,
@@ -84,6 +89,45 @@ static unsigned long palmtx_pin_config[] __initdata = {
84 GPIO55_nPREG, 89 GPIO55_nPREG,
85 GPIO56_nPWAIT, 90 GPIO56_nPWAIT,
86 GPIO57_nIOIS16, 91 GPIO57_nIOIS16,
92 GPIO94_GPIO, /* wifi power 1 */
93 GPIO108_GPIO, /* wifi power 2 */
94 GPIO116_GPIO, /* wifi ready */
95
96 /* MATRIX KEYPAD */
97 GPIO100_KP_MKIN_0,
98 GPIO101_KP_MKIN_1,
99 GPIO102_KP_MKIN_2,
100 GPIO97_KP_MKIN_3,
101 GPIO103_KP_MKOUT_0,
102 GPIO104_KP_MKOUT_1,
103 GPIO105_KP_MKOUT_2,
104
105 /* LCD */
106 GPIO58_LCD_LDD_0,
107 GPIO59_LCD_LDD_1,
108 GPIO60_LCD_LDD_2,
109 GPIO61_LCD_LDD_3,
110 GPIO62_LCD_LDD_4,
111 GPIO63_LCD_LDD_5,
112 GPIO64_LCD_LDD_6,
113 GPIO65_LCD_LDD_7,
114 GPIO66_LCD_LDD_8,
115 GPIO67_LCD_LDD_9,
116 GPIO68_LCD_LDD_10,
117 GPIO69_LCD_LDD_11,
118 GPIO70_LCD_LDD_12,
119 GPIO71_LCD_LDD_13,
120 GPIO72_LCD_LDD_14,
121 GPIO73_LCD_LDD_15,
122 GPIO74_LCD_FCLK,
123 GPIO75_LCD_LCLK,
124 GPIO76_LCD_PCLK,
125 GPIO77_LCD_BIAS,
126
127 /* MISC. */
128 GPIO10_GPIO, /* hotsync button */
129 GPIO12_GPIO, /* power detect */
130 GPIO107_GPIO, /* earphone detect */
87}; 131};
88 132
89/****************************************************************************** 133/******************************************************************************
@@ -95,32 +139,49 @@ static int palmtx_mci_init(struct device *dev, irq_handler_t palmtx_detect_int,
95 int err = 0; 139 int err = 0;
96 140
97 /* Setup an interrupt for detecting card insert/remove events */ 141 /* Setup an interrupt for detecting card insert/remove events */
98 err = request_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, palmtx_detect_int, 142 err = gpio_request(GPIO_NR_PALMTX_SD_DETECT_N, "SD IRQ");
99 IRQF_DISABLED | IRQF_SAMPLE_RANDOM | 143 if (err)
144 goto err;
145 err = gpio_direction_input(GPIO_NR_PALMTX_SD_DETECT_N);
146 if (err)
147 goto err2;
148 err = request_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N),
149 palmtx_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
100 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 150 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
101 "SD/MMC card detect", data); 151 "SD/MMC card detect", data);
102 if (err) { 152 if (err) {
103 printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n", 153 printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
104 __func__); 154 __func__);
105 return err; 155 goto err2;
106 } 156 }
107 157
108 err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER"); 158 err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER");
109 if (err) 159 if (err)
110 goto pwr_err; 160 goto err3;
161 err = gpio_direction_output(GPIO_NR_PALMTX_SD_POWER, 0);
162 if (err)
163 goto err4;
111 164
112 err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY"); 165 err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY");
113 if (err) 166 if (err)
114 goto ro_err; 167 goto err4;
168 err = gpio_direction_input(GPIO_NR_PALMTX_SD_READONLY);
169 if (err)
170 goto err5;
115 171
116 printk(KERN_DEBUG "%s: irq registered\n", __func__); 172 printk(KERN_DEBUG "%s: irq registered\n", __func__);
117 173
118 return 0; 174 return 0;
119 175
120ro_err: 176err5:
177 gpio_free(GPIO_NR_PALMTX_SD_READONLY);
178err4:
121 gpio_free(GPIO_NR_PALMTX_SD_POWER); 179 gpio_free(GPIO_NR_PALMTX_SD_POWER);
122pwr_err: 180err3:
123 free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data); 181 free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data);
182err2:
183 gpio_free(GPIO_NR_PALMTX_SD_DETECT_N);
184err:
124 return err; 185 return err;
125} 186}
126 187
@@ -128,7 +189,8 @@ static void palmtx_mci_exit(struct device *dev, void *data)
128{ 189{
129 gpio_free(GPIO_NR_PALMTX_SD_READONLY); 190 gpio_free(GPIO_NR_PALMTX_SD_READONLY);
130 gpio_free(GPIO_NR_PALMTX_SD_POWER); 191 gpio_free(GPIO_NR_PALMTX_SD_POWER);
131 free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data); 192 free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data);
193 gpio_free(GPIO_NR_PALMTX_SD_DETECT_N);
132} 194}
133 195
134static void palmtx_mci_power(struct device *dev, unsigned int vdd) 196static void palmtx_mci_power(struct device *dev, unsigned int vdd)
@@ -167,7 +229,6 @@ static unsigned int palmtx_matrix_keys[] = {
167 229
168 KEY(3, 0, KEY_RIGHT), 230 KEY(3, 0, KEY_RIGHT),
169 KEY(3, 2, KEY_LEFT), 231 KEY(3, 2, KEY_LEFT),
170
171}; 232};
172 233
173static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = { 234static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = {
@@ -209,11 +270,19 @@ static int palmtx_backlight_init(struct device *dev)
209 ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER"); 270 ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER");
210 if (ret) 271 if (ret)
211 goto err; 272 goto err;
273 ret = gpio_direction_output(GPIO_NR_PALMTX_BL_POWER, 0);
274 if (ret)
275 goto err2;
212 ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER"); 276 ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER");
213 if (ret) 277 if (ret)
214 goto err2; 278 goto err2;
279 ret = gpio_direction_output(GPIO_NR_PALMTX_LCD_POWER, 0);
280 if (ret)
281 goto err3;
215 282
216 return 0; 283 return 0;
284err3:
285 gpio_free(GPIO_NR_PALMTX_LCD_POWER);
217err2: 286err2:
218 gpio_free(GPIO_NR_PALMTX_BL_POWER); 287 gpio_free(GPIO_NR_PALMTX_BL_POWER);
219err: 288err:
@@ -254,6 +323,24 @@ static struct platform_device palmtx_backlight = {
254/****************************************************************************** 323/******************************************************************************
255 * IrDA 324 * IrDA
256 ******************************************************************************/ 325 ******************************************************************************/
326static int palmtx_irda_startup(struct device *dev)
327{
328 int err;
329 err = gpio_request(GPIO_NR_PALMTX_IR_DISABLE, "IR DISABLE");
330 if (err)
331 goto err;
332 err = gpio_direction_output(GPIO_NR_PALMTX_IR_DISABLE, 1);
333 if (err)
334 gpio_free(GPIO_NR_PALMTX_IR_DISABLE);
335err:
336 return err;
337}
338
339static void palmtx_irda_shutdown(struct device *dev)
340{
341 gpio_free(GPIO_NR_PALMTX_IR_DISABLE);
342}
343
257static void palmtx_irda_transceiver_mode(struct device *dev, int mode) 344static void palmtx_irda_transceiver_mode(struct device *dev, int mode)
258{ 345{
259 gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF); 346 gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF);
@@ -261,6 +348,8 @@ static void palmtx_irda_transceiver_mode(struct device *dev, int mode)
261} 348}
262 349
263static struct pxaficp_platform_data palmtx_ficp_platform_data = { 350static struct pxaficp_platform_data palmtx_ficp_platform_data = {
351 .startup = palmtx_irda_startup,
352 .shutdown = palmtx_irda_shutdown,
264 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, 353 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
265 .transceiver_mode = palmtx_irda_transceiver_mode, 354 .transceiver_mode = palmtx_irda_transceiver_mode,
266}; 355};
@@ -268,17 +357,11 @@ static struct pxaficp_platform_data palmtx_ficp_platform_data = {
268/****************************************************************************** 357/******************************************************************************
269 * UDC 358 * UDC
270 ******************************************************************************/ 359 ******************************************************************************/
271static void palmtx_udc_command(int cmd)
272{
273 gpio_set_value(GPIO_NR_PALMTX_USB_POWER, !cmd);
274 udelay(50);
275 gpio_set_value(GPIO_NR_PALMTX_USB_PULLUP, !cmd);
276}
277
278static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = { 360static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = {
279 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N, 361 .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N,
280 .gpio_vbus_inverted = 1, 362 .gpio_vbus_inverted = 1,
281 .udc_command = palmtx_udc_command, 363 .gpio_pullup = GPIO_NR_PALMTX_USB_POWER,
364 .gpio_pullup_inverted = 0,
282}; 365};
283 366
284/****************************************************************************** 367/******************************************************************************
@@ -290,17 +373,16 @@ static int power_supply_init(struct device *dev)
290 373
291 ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC"); 374 ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC");
292 if (ret) 375 if (ret)
293 goto err_cs_ac; 376 goto err1;
294 377 ret = gpio_direction_input(GPIO_NR_PALMTX_POWER_DETECT);
295 ret = gpio_request(GPIO_NR_PALMTX_USB_DETECT_N, "CABLE_STATE_USB");
296 if (ret) 378 if (ret)
297 goto err_cs_usb; 379 goto err2;
298 380
299 return 0; 381 return 0;
300 382
301err_cs_usb: 383err2:
302 gpio_free(GPIO_NR_PALMTX_POWER_DETECT); 384 gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
303err_cs_ac: 385err1:
304 return ret; 386 return ret;
305} 387}
306 388
@@ -309,14 +391,8 @@ static int palmtx_is_ac_online(void)
309 return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT); 391 return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT);
310} 392}
311 393
312static int palmtx_is_usb_online(void)
313{
314 return !gpio_get_value(GPIO_NR_PALMTX_USB_DETECT_N);
315}
316
317static void power_supply_exit(struct device *dev) 394static void power_supply_exit(struct device *dev)
318{ 395{
319 gpio_free(GPIO_NR_PALMTX_USB_DETECT_N);
320 gpio_free(GPIO_NR_PALMTX_POWER_DETECT); 396 gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
321} 397}
322 398
@@ -327,7 +403,6 @@ static char *palmtx_supplicants[] = {
327static struct pda_power_pdata power_supply_info = { 403static struct pda_power_pdata power_supply_info = {
328 .init = power_supply_init, 404 .init = power_supply_init,
329 .is_ac_online = palmtx_is_ac_online, 405 .is_ac_online = palmtx_is_ac_online,
330 .is_usb_online = palmtx_is_usb_online,
331 .exit = power_supply_exit, 406 .exit = power_supply_exit,
332 .supplied_to = palmtx_supplicants, 407 .supplied_to = palmtx_supplicants,
333 .num_supplicants = ARRAY_SIZE(palmtx_supplicants), 408 .num_supplicants = ARRAY_SIZE(palmtx_supplicants),
@@ -410,12 +485,23 @@ static void __init palmtx_map_io(void)
410 iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); 485 iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
411} 486}
412 487
488/* setup udc GPIOs initial state */
489static void __init palmtx_udc_init(void)
490{
491 if (!gpio_request(GPIO_NR_PALMTX_USB_POWER, "UDC Vbus")) {
492 gpio_direction_output(GPIO_NR_PALMTX_USB_POWER, 1);
493 gpio_free(GPIO_NR_PALMTX_USB_POWER);
494 }
495}
496
497
413static void __init palmtx_init(void) 498static void __init palmtx_init(void)
414{ 499{
415 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); 500 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
416 501
417 set_pxa_fb_info(&palmtx_lcd_screen); 502 set_pxa_fb_info(&palmtx_lcd_screen);
418 pxa_set_mci_info(&palmtx_mci_platform_data); 503 pxa_set_mci_info(&palmtx_mci_platform_data);
504 palmtx_udc_init();
419 pxa_set_udc_info(&palmtx_udc_info); 505 pxa_set_udc_info(&palmtx_udc_info);
420 pxa_set_ac97_info(NULL); 506 pxa_set_ac97_info(NULL);
421 pxa_set_ficp_info(&palmtx_ficp_platform_data); 507 pxa_set_ficp_info(&palmtx_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f601425f1b1e..b36cec5c9eed 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -385,6 +385,7 @@ static struct soc_camera_link iclink[] = {
385 .gpio = NR_BUILTIN_GPIO + 1, 385 .gpio = NR_BUILTIN_GPIO + 1,
386 }, { 386 }, {
387 .bus_id = 0, /* Must match with the camera ID above */ 387 .bus_id = 0, /* Must match with the camera ID above */
388 .gpio = -ENXIO,
388 } 389 }
389}; 390};
390 391
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 1b2af575c40f..00b2dc2a1074 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -90,12 +90,13 @@ void arch_reset(char mode)
90 /* Jump into ROM at address 0 */ 90 /* Jump into ROM at address 0 */
91 cpu_reset(0); 91 cpu_reset(0);
92 break; 92 break;
93 case 'h':
94 do_hw_reset();
95 break;
96 case 'g': 93 case 'g':
97 do_gpio_reset(); 94 do_gpio_reset();
98 break; 95 break;
96 case 'h':
97 default:
98 do_hw_reset();
99 break;
99 } 100 }
100} 101}
101 102
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index f0a5bbae0b45..3be76ee2bdbf 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -67,6 +67,7 @@
67static unsigned long spitz_pin_config[] __initdata = { 67static unsigned long spitz_pin_config[] __initdata = {
68 /* Chip Selects */ 68 /* Chip Selects */
69 GPIO78_nCS_2, /* SCOOP #2 */ 69 GPIO78_nCS_2, /* SCOOP #2 */
70 GPIO79_nCS_3, /* NAND */
70 GPIO80_nCS_4, /* SCOOP #1 */ 71 GPIO80_nCS_4, /* SCOOP #1 */
71 72
72 /* LCD - 16bpp Active TFT */ 73 /* LCD - 16bpp Active TFT */
@@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = {
97 GPIO51_nPIOW, 98 GPIO51_nPIOW,
98 GPIO85_nPCE_1, 99 GPIO85_nPCE_1,
99 GPIO54_nPCE_2, 100 GPIO54_nPCE_2,
100 GPIO79_PSKTSEL,
101 GPIO55_nPREG, 101 GPIO55_nPREG,
102 GPIO56_nPWAIT, 102 GPIO56_nPWAIT,
103 GPIO57_nIOIS16, 103 GPIO57_nIOIS16,
104 GPIO104_PSKTSEL,
104 105
105 /* MMC */ 106 /* MMC */
106 GPIO32_MMC_CLK, 107 GPIO32_MMC_CLK,
@@ -686,7 +687,6 @@ static void __init akita_init(void)
686 spitz_pcmcia_config.num_devs = 1; 687 spitz_pcmcia_config.num_devs = 1;
687 platform_scoop_config = &spitz_pcmcia_config; 688 platform_scoop_config = &spitz_pcmcia_config;
688 689
689 pxa_set_i2c_info(NULL);
690 i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); 690 i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info));
691 691
692 common_init(); 692 common_init();
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
index 3e706c57833a..3347c4236a60 100644
--- a/arch/arm/mach-realview/clock.c
+++ b/arch/arm/mach-realview/clock.c
@@ -104,7 +104,7 @@ static struct clk uart_clk = {
104 104
105static struct clk mmci_clk = { 105static struct clk mmci_clk = {
106 .name = "MCLK", 106 .name = "MCLK",
107 .rate = 33000000, 107 .rate = 24000000,
108}; 108};
109 109
110int clk_register(struct clk *clk) 110int clk_register(struct clk *clk)
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h
index 4034b54950c2..793a3a332712 100644
--- a/arch/arm/mach-realview/include/mach/platform.h
+++ b/arch/arm/mach-realview/include/mach/platform.h
@@ -239,27 +239,10 @@
239#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ 239#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
240 240
241/* 241/*
242 * Application Flash
243 *
244 */
245#define FLASH_BASE REALVIEW_FLASH_BASE
246#define FLASH_SIZE REALVIEW_FLASH_SIZE
247#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
248#define FLASH_BLOCK_SIZE SZ_128K
249
250/*
251 * Boot Flash
252 *
253 */
254#define EPROM_BASE REALVIEW_BOOT_ROM_HI
255#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
256#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
257
258/*
259 * Clean base - dummy 242 * Clean base - dummy
260 * 243 *
261 */ 244 */
262#define CLEAN_BASE EPROM_BASE 245#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
263 246
264/* 247/*
265 * System controller bit assignment 248 * System controller bit assignment
diff --git a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
index 3fe8be9ca110..980a099e209c 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h
@@ -18,6 +18,7 @@ struct s3c2410_spigpio_info {
18 unsigned long pin_mosi; 18 unsigned long pin_mosi;
19 unsigned long pin_miso; 19 unsigned long pin_miso;
20 20
21 int num_chipselect;
21 int bus_num; 22 int bus_num;
22 23
23 void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs); 24 void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs);
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 9336508ec0b2..58937f1fb38c 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -105,7 +105,7 @@ static struct clk uart_clk = {
105 105
106static struct clk mmci_clk = { 106static struct clk mmci_clk = {
107 .name = "MCLK", 107 .name = "MCLK",
108 .rate = 33000000, 108 .rate = 24000000,
109}; 109};
110 110
111int clk_register(struct clk *clk) 111int clk_register(struct clk *clk)
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index 27cbe6a3f220..f91ba930ca8a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -436,28 +436,12 @@
436#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1) 436#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1)
437#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2) 437#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2)
438#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3) 438#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3)
439/*
440 * Application Flash
441 *
442 */
443#define FLASH_BASE VERSATILE_FLASH_BASE
444#define FLASH_SIZE VERSATILE_FLASH_SIZE
445#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
446#define FLASH_BLOCK_SIZE SZ_128K
447
448/*
449 * Boot Flash
450 *
451 */
452#define EPROM_BASE VERSATILE_BOOT_ROM_HI
453#define EPROM_SIZE VERSATILE_BOOT_ROM_SIZE
454#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
455 439
456/* 440/*
457 * Clean base - dummy 441 * Clean base - dummy
458 * 442 *
459 */ 443 */
460#define CLEAN_BASE EPROM_BASE 444#define CLEAN_BASE VERSATILE_BOOT_ROM_HI
461 445
462/* 446/*
463 * System controller bit assignment 447 * System controller bit assignment
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 133e65d166b3..2d5884ce0435 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -70,6 +70,10 @@ static unsigned long ai_dword;
70static unsigned long ai_multi; 70static unsigned long ai_multi;
71static int ai_usermode; 71static int ai_usermode;
72 72
73#define UM_WARN (1 << 0)
74#define UM_FIXUP (1 << 1)
75#define UM_SIGNAL (1 << 2)
76
73#ifdef CONFIG_PROC_FS 77#ifdef CONFIG_PROC_FS
74static const char *usermode_action[] = { 78static const char *usermode_action[] = {
75 "ignored", 79 "ignored",
@@ -754,7 +758,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
754 user: 758 user:
755 ai_user += 1; 759 ai_user += 1;
756 760
757 if (ai_usermode & 1) 761 if (ai_usermode & UM_WARN)
758 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " 762 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "
759 "Address=0x%08lx FSR 0x%03x\n", current->comm, 763 "Address=0x%08lx FSR 0x%03x\n", current->comm,
760 task_pid_nr(current), instrptr, 764 task_pid_nr(current), instrptr,
@@ -762,10 +766,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
762 thumb_mode(regs) ? tinstr : instr, 766 thumb_mode(regs) ? tinstr : instr,
763 addr, fsr); 767 addr, fsr);
764 768
765 if (ai_usermode & 2) 769 if (ai_usermode & UM_FIXUP)
766 goto fixup; 770 goto fixup;
767 771
768 if (ai_usermode & 4) 772 if (ai_usermode & UM_SIGNAL)
769 force_sig(SIGBUS, current); 773 force_sig(SIGBUS, current);
770 else 774 else
771 set_cr(cr_no_alignment); 775 set_cr(cr_no_alignment);
@@ -796,6 +800,22 @@ static int __init alignment_init(void)
796 res->write_proc = proc_alignment_write; 800 res->write_proc = proc_alignment_write;
797#endif 801#endif
798 802
803 /*
804 * ARMv6 and later CPUs can perform unaligned accesses for
805 * most single load and store instructions up to word size.
806 * LDM, STM, LDRD and STRD still need to be handled.
807 *
808 * Ignoring the alignment fault is not an option on these
809 * CPUs since we spin re-faulting the instruction without
810 * making any progress.
811 */
812 if (cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U)) {
813 cr_alignment &= ~CR_A;
814 cr_no_alignment &= ~CR_A;
815 set_cr(cr_alignment);
816 ai_usermode = UM_FIXUP;
817 }
818
799 hook_fault_code(1, do_alignment, SIGILL, "alignment exception"); 819 hook_fault_code(1, do_alignment, SIGILL, "alignment exception");
800 hook_fault_code(3, do_alignment, SIGILL, "alignment exception"); 820 hook_fault_code(3, do_alignment, SIGILL, "alignment exception");
801 821
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 13cdae8b0d44..80cd207cbaea 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -150,7 +150,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
150 /* 150 /*
151 * Clean and invalidate partial last cache line. 151 * Clean and invalidate partial last cache line.
152 */ 152 */
153 if (end & (CACHE_LINE_SIZE - 1)) { 153 if (start < end && end & (CACHE_LINE_SIZE - 1)) {
154 l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); 154 l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
155 end &= ~(CACHE_LINE_SIZE - 1); 155 end &= ~(CACHE_LINE_SIZE - 1);
156 } 156 }
@@ -158,7 +158,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
158 /* 158 /*
159 * Invalidate all full cache lines between 'start' and 'end'. 159 * Invalidate all full cache lines between 'start' and 'end'.
160 */ 160 */
161 while (start != end) { 161 while (start < end) {
162 unsigned long range_end = calc_range_end(start, end); 162 unsigned long range_end = calc_range_end(start, end);
163 l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE); 163 l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE);
164 start = range_end; 164 start = range_end;
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c
index 10b1bae1a258..464de893a988 100644
--- a/arch/arm/mm/cache-xsc3l2.c
+++ b/arch/arm/mm/cache-xsc3l2.c
@@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
98 /* 98 /*
99 * Clean and invalidate partial last cache line. 99 * Clean and invalidate partial last cache line.
100 */ 100 */
101 if (end & (CACHE_LINE_SIZE - 1)) { 101 if (start < end && (end & (CACHE_LINE_SIZE - 1))) {
102 xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); 102 xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1));
103 xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); 103 xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
104 end &= ~(CACHE_LINE_SIZE - 1); 104 end &= ~(CACHE_LINE_SIZE - 1);
@@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
107 /* 107 /*
108 * Invalidate all full cache lines between 'start' and 'end'. 108 * Invalidate all full cache lines between 'start' and 'end'.
109 */ 109 */
110 while (start != end) { 110 while (start < end) {
111 xsc3_l2_inv_pa(start); 111 xsc3_l2_inv_pa(start);
112 start += CACHE_LINE_SIZE; 112 start += CACHE_LINE_SIZE;
113 } 113 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 2df8d9facf57..22c9530e91e2 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -11,6 +11,7 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/signal.h> 12#include <linux/signal.h>
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/hardirq.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/kprobes.h> 16#include <linux/kprobes.h>
16#include <linux/uaccess.h> 17#include <linux/uaccess.h>
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 8ba754064559..7f36c825718d 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -180,20 +180,20 @@ void adjust_cr(unsigned long mask, unsigned long set)
180#endif 180#endif
181 181
182#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE 182#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
183#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE 183#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
184 184
185static struct mem_type mem_types[] = { 185static struct mem_type mem_types[] = {
186 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ 186 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
187 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | 187 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
188 L_PTE_SHARED, 188 L_PTE_SHARED,
189 .prot_l1 = PMD_TYPE_TABLE, 189 .prot_l1 = PMD_TYPE_TABLE,
190 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, 190 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_S,
191 .domain = DOMAIN_IO, 191 .domain = DOMAIN_IO,
192 }, 192 },
193 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ 193 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
194 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED, 194 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED,
195 .prot_l1 = PMD_TYPE_TABLE, 195 .prot_l1 = PMD_TYPE_TABLE,
196 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), 196 .prot_sect = PROT_SECT_DEVICE,
197 .domain = DOMAIN_IO, 197 .domain = DOMAIN_IO,
198 }, 198 },
199 [MT_DEVICE_CACHED] = { /* ioremap_cached */ 199 [MT_DEVICE_CACHED] = { /* ioremap_cached */
@@ -205,7 +205,13 @@ static struct mem_type mem_types[] = {
205 [MT_DEVICE_WC] = { /* ioremap_wc */ 205 [MT_DEVICE_WC] = { /* ioremap_wc */
206 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, 206 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
207 .prot_l1 = PMD_TYPE_TABLE, 207 .prot_l1 = PMD_TYPE_TABLE,
208 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE, 208 .prot_sect = PROT_SECT_DEVICE,
209 .domain = DOMAIN_IO,
210 },
211 [MT_UNCACHED] = {
212 .prot_pte = PROT_PTE_DEVICE,
213 .prot_l1 = PMD_TYPE_TABLE,
214 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
209 .domain = DOMAIN_IO, 215 .domain = DOMAIN_IO,
210 }, 216 },
211 [MT_CACHECLEAN] = { 217 [MT_CACHECLEAN] = {
@@ -273,22 +279,23 @@ static void __init build_mem_type_table(void)
273#endif 279#endif
274 280
275 /* 281 /*
276 * On non-Xscale3 ARMv5-and-older systems, use CB=01 282 * Strip out features not present on earlier architectures.
277 * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3 283 * Pre-ARMv5 CPUs don't have TEX bits. Pre-ARMv6 CPUs or those
278 * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable 284 * without extended page tables don't have the 'Shared' bit.
279 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).
280 */ 285 */
281 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { 286 if (cpu_arch < CPU_ARCH_ARMv5)
282 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); 287 for (i = 0; i < ARRAY_SIZE(mem_types); i++)
283 mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE; 288 mem_types[i].prot_sect &= ~PMD_SECT_TEX(7);
284 } 289 if ((cpu_arch < CPU_ARCH_ARMv6 || !(cr & CR_XP)) && !cpu_is_xsc3())
290 for (i = 0; i < ARRAY_SIZE(mem_types); i++)
291 mem_types[i].prot_sect &= ~PMD_SECT_S;
285 292
286 /* 293 /*
287 * ARMv5 and lower, bit 4 must be set for page tables. 294 * ARMv5 and lower, bit 4 must be set for page tables (was: cache
288 * (was: cache "update-able on write" bit on ARM610) 295 * "update-able on write" bit on ARM610). However, Xscale and
289 * However, Xscale cores require this bit to be cleared. 296 * Xscale3 require this bit to be cleared.
290 */ 297 */
291 if (cpu_is_xscale()) { 298 if (cpu_is_xscale() || cpu_is_xsc3()) {
292 for (i = 0; i < ARRAY_SIZE(mem_types); i++) { 299 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
293 mem_types[i].prot_sect &= ~PMD_BIT4; 300 mem_types[i].prot_sect &= ~PMD_BIT4;
294 mem_types[i].prot_l1 &= ~PMD_BIT4; 301 mem_types[i].prot_l1 &= ~PMD_BIT4;
@@ -302,6 +309,64 @@ static void __init build_mem_type_table(void)
302 } 309 }
303 } 310 }
304 311
312 /*
313 * Mark the device areas according to the CPU/architecture.
314 */
315 if (cpu_is_xsc3() || (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP))) {
316 if (!cpu_is_xsc3()) {
317 /*
318 * Mark device regions on ARMv6+ as execute-never
319 * to prevent speculative instruction fetches.
320 */
321 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_XN;
322 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN;
323 mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN;
324 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN;
325 }
326 if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
327 /*
328 * For ARMv7 with TEX remapping,
329 * - shared device is SXCB=1100
330 * - nonshared device is SXCB=0100
331 * - write combine device mem is SXCB=0001
332 * (Uncached Normal memory)
333 */
334 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1);
335 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(1);
336 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
337 } else if (cpu_is_xsc3()) {
338 /*
339 * For Xscale3,
340 * - shared device is TEXCB=00101
341 * - nonshared device is TEXCB=01000
342 * - write combine device mem is TEXCB=00100
343 * (Inner/Outer Uncacheable in xsc3 parlance)
344 */
345 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1) | PMD_SECT_BUFFERED;
346 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
347 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
348 } else {
349 /*
350 * For ARMv6 and ARMv7 without TEX remapping,
351 * - shared device is TEXCB=00001
352 * - nonshared device is TEXCB=01000
353 * - write combine device mem is TEXCB=00100
354 * (Uncached Normal in ARMv6 parlance).
355 */
356 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
357 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
358 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
359 }
360 } else {
361 /*
362 * On others, write combining is "Uncached/Buffered"
363 */
364 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
365 }
366
367 /*
368 * Now deal with the memory-type mappings
369 */
305 cp = &cache_policies[cachepolicy]; 370 cp = &cache_policies[cachepolicy];
306 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; 371 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
307 372
@@ -317,12 +382,8 @@ static void __init build_mem_type_table(void)
317 * Enable CPU-specific coherency if supported. 382 * Enable CPU-specific coherency if supported.
318 * (Only available on XSC3 at the moment.) 383 * (Only available on XSC3 at the moment.)
319 */ 384 */
320 if (arch_is_coherent()) { 385 if (arch_is_coherent() && cpu_is_xsc3())
321 if (cpu_is_xsc3()) { 386 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
322 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
323 mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
324 }
325 }
326 387
327 /* 388 /*
328 * ARMv6 and above have extended page tables. 389 * ARMv6 and above have extended page tables.
@@ -336,11 +397,6 @@ static void __init build_mem_type_table(void)
336 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 397 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
337 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 398 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
338 399
339 /*
340 * Mark the device area as "shared device"
341 */
342 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
343
344#ifdef CONFIG_SMP 400#ifdef CONFIG_SMP
345 /* 401 /*
346 * Mark memory with the "shared" attribute for SMP systems 402 * Mark memory with the "shared" attribute for SMP systems
@@ -360,9 +416,6 @@ static void __init build_mem_type_table(void)
360 mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot; 416 mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot;
361 mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot; 417 mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot;
362 418
363 if (cpu_arch < CPU_ARCH_ARMv5)
364 mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
365
366 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); 419 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
367 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | 420 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
368 L_PTE_DIRTY | L_PTE_WRITE | 421 L_PTE_DIRTY | L_PTE_WRITE |
@@ -654,7 +707,7 @@ static inline void prepare_page_table(struct meminfo *mi)
654 /* 707 /*
655 * Clear out all the mappings below the kernel image. 708 * Clear out all the mappings below the kernel image.
656 */ 709 */
657 for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE) 710 for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE)
658 pmd_clear(pmd_off_k(addr)); 711 pmd_clear(pmd_off_k(addr));
659 712
660#ifdef CONFIG_XIP_KERNEL 713#ifdef CONFIG_XIP_KERNEL
@@ -766,7 +819,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
766 */ 819 */
767#ifdef CONFIG_XIP_KERNEL 820#ifdef CONFIG_XIP_KERNEL
768 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); 821 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
769 map.virtual = MODULE_START; 822 map.virtual = MODULES_VADDR;
770 map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK; 823 map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
771 map.type = MT_ROM; 824 map.type = MT_ROM;
772 create_mapping(&map); 825 create_mapping(&map);
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 07f82db70945..4d3c0a73e7fb 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -115,7 +115,7 @@ ENTRY(cpu_v7_set_pte_ext)
115 orr r3, r3, r2 115 orr r3, r3, r2
116 orr r3, r3, #PTE_EXT_AP0 | 2 116 orr r3, r3, #PTE_EXT_AP0 | 2
117 117
118 tst r2, #1 << 4 118 tst r1, #1 << 4
119 orrne r3, r3, #PTE_EXT_TEX(1) 119 orrne r3, r3, #PTE_EXT_TEX(1)
120 120
121 tst r1, #L_PTE_WRITE 121 tst r1, #L_PTE_WRITE
@@ -192,11 +192,11 @@ __v7_setup:
192 mov pc, lr @ return to head.S:__ret 192 mov pc, lr @ return to head.S:__ret
193ENDPROC(__v7_setup) 193ENDPROC(__v7_setup)
194 194
195 /* 195 /* AT
196 * V X F I D LR 196 * TFR EV X F I D LR
197 * .... ...E PUI. .T.T 4RVI ZFRS BLDP WCAM 197 * .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM
198 * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced 198 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
199 * 0 110 0011 1.00 .111 1101 < we want 199 * 1 0 110 0011 1.00 .111 1101 < we want
200 */ 200 */
201 .type v7_crval, #object 201 .type v7_crval, #object
202v7_crval: 202v7_crval:
diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c
index 4689db638e95..9e573e78176a 100644
--- a/arch/arm/plat-iop/setup.c
+++ b/arch/arm/plat-iop/setup.c
@@ -16,14 +16,15 @@
16#include <asm/hardware/iop3xx.h> 16#include <asm/hardware/iop3xx.h>
17 17
18/* 18/*
19 * Standard IO mapping for all IOP3xx based systems 19 * Standard IO mapping for all IOP3xx based systems. Note that
20 * the IOP3xx OCCDR must be mapped uncached and unbuffered.
20 */ 21 */
21static struct map_desc iop3xx_std_desc[] __initdata = { 22static struct map_desc iop3xx_std_desc[] __initdata = {
22 { /* mem mapped registers */ 23 { /* mem mapped registers */
23 .virtual = IOP3XX_PERIPHERAL_VIRT_BASE, 24 .virtual = IOP3XX_PERIPHERAL_VIRT_BASE,
24 .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE), 25 .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE),
25 .length = IOP3XX_PERIPHERAL_SIZE, 26 .length = IOP3XX_PERIPHERAL_SIZE,
26 .type = MT_DEVICE, 27 .type = MT_UNCACHED,
27 }, { /* PCI IO space */ 28 }, { /* PCI IO space */
28 .virtual = IOP3XX_PCI_LOWER_IO_VA, 29 .virtual = IOP3XX_PCI_LOWER_IO_VA,
29 .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA), 30 .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA),
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index bf6a10c5fc4f..be6aab9c6834 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c)
428 if (c->id != 0) 428 if (c->id != 0)
429 sprintf(p, ":%d", c->id); 429 sprintf(p, ":%d", c->id);
430 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); 430 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
431 if (IS_ERR(d)) 431 if (!d)
432 return PTR_ERR(d); 432 return -ENOMEM;
433 c->dent = d; 433 c->dent = d;
434 434
435 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); 435 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
436 if (IS_ERR(d)) { 436 if (!d) {
437 err = PTR_ERR(d); 437 err = -ENOMEM;
438 goto err_out; 438 goto err_out;
439 } 439 }
440 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); 440 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
441 if (IS_ERR(d)) { 441 if (!d) {
442 err = PTR_ERR(d); 442 err = -ENOMEM;
443 goto err_out; 443 goto err_out;
444 } 444 }
445 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); 445 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
446 if (IS_ERR(d)) { 446 if (!d) {
447 err = PTR_ERR(d); 447 err = -ENOMEM;
448 goto err_out; 448 goto err_out;
449 } 449 }
450 return 0; 450 return 0;
@@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void)
483 int err; 483 int err;
484 484
485 d = debugfs_create_dir("clock", NULL); 485 d = debugfs_create_dir("clock", NULL);
486 if (IS_ERR(d)) 486 if (!d)
487 return PTR_ERR(d); 487 return -ENOMEM;
488 clk_debugfs_root = d; 488 clk_debugfs_root = d;
489 489
490 list_for_each_entry(c, &clocks, node) { 490 list_for_each_entry(c, &clocks, node) {
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8679fbca6bbe..424049d83fbe 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -101,6 +101,7 @@
101#define OMAP24XX_GPIO_IRQSTATUS2 0x0028 101#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
102#define OMAP24XX_GPIO_IRQENABLE2 0x002c 102#define OMAP24XX_GPIO_IRQENABLE2 0x002c
103#define OMAP24XX_GPIO_IRQENABLE1 0x001c 103#define OMAP24XX_GPIO_IRQENABLE1 0x001c
104#define OMAP24XX_GPIO_WAKE_EN 0x0020
104#define OMAP24XX_GPIO_CTRL 0x0030 105#define OMAP24XX_GPIO_CTRL 0x0030
105#define OMAP24XX_GPIO_OE 0x0034 106#define OMAP24XX_GPIO_OE 0x0034
106#define OMAP24XX_GPIO_DATAIN 0x0038 107#define OMAP24XX_GPIO_DATAIN 0x0038
@@ -1551,7 +1552,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1551#endif 1552#endif
1552#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1553#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1553 case METHOD_GPIO_24XX: 1554 case METHOD_GPIO_24XX:
1554 wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; 1555 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
1555 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1556 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1556 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; 1557 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1557 break; 1558 break;
@@ -1574,7 +1575,7 @@ static int omap_gpio_resume(struct sys_device *dev)
1574{ 1575{
1575 int i; 1576 int i;
1576 1577
1577 if (!cpu_is_omap24xx() && !cpu_is_omap16xx()) 1578 if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
1578 return 0; 1579 return 0;
1579 1580
1580 for (i = 0; i < gpio_bank_count; i++) { 1581 for (i = 0; i < gpio_bank_count; i++) {
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 030118ee204a..2276f89671d8 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -65,7 +65,8 @@
65#include <mach/omap34xx.h> 65#include <mach/omap34xx.h>
66#endif 66#endif
67 67
68#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ 68#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
69#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
69 70
70 .macro disable_fiq 71 .macro disable_fiq
71 .endm 72 .endm
@@ -88,6 +89,7 @@
88 cmp \irqnr, #0x0 89 cmp \irqnr, #0x0
892222: 902222:
90 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] 91 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
92 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
91 93
92 .endm 94 .endm
93 95
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index a2929ac8c687..bed5274c910a 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -372,7 +372,7 @@
372 372
373/* External TWL4030 gpio interrupts are optional */ 373/* External TWL4030 gpio interrupts are optional */
374#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END 374#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
375#ifdef CONFIG_TWL4030_GPIO 375#ifdef CONFIG_GPIO_TWL4030
376#define TWL4030_GPIO_NR_IRQS 18 376#define TWL4030_GPIO_NR_IRQS 18
377#else 377#else
378#define TWL4030_GPIO_NR_IRQS 0 378#define TWL4030_GPIO_NR_IRQS 0
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
index ec67fb428607..7b74d1255e0b 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -353,8 +353,8 @@ struct omapfb_device {
353 u32 pseudo_palette[17]; 353 u32 pseudo_palette[17];
354 354
355 struct lcd_panel *panel; /* LCD panel */ 355 struct lcd_panel *panel; /* LCD panel */
356 struct lcd_ctrl *ctrl; /* LCD controller */ 356 const struct lcd_ctrl *ctrl; /* LCD controller */
357 struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ 357 const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */
358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external 358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external
359 interface */ 359 interface */
360 struct device *dev; 360 struct device *dev;
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index 768eb6e7abcf..2a9c27ad4c37 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -128,7 +128,7 @@ void clk_deny_idle(struct clk *clk);
128 * clk_allow_idle - Counters previous clk_deny_idle 128 * clk_allow_idle - Counters previous clk_deny_idle
129 * @clk: clock signal handle 129 * @clk: clock signal handle
130 */ 130 */
131void clk_deny_idle(struct clk *clk); 131void clk_allow_idle(struct clk *clk);
132 132
133extern void omap_pm_idle(void); 133extern void omap_pm_idle(void);
134extern void omap_pm_suspend(void); 134extern void omap_pm_suspend(void);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 9f9a921829c0..dcd9d16da2e9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -255,7 +255,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
255 if (!_omap_sram_reprogram_clock) 255 if (!_omap_sram_reprogram_clock)
256 omap_sram_error(); 256 omap_sram_error();
257 257
258 return _omap_sram_reprogram_clock(dpllctl, ckctl); 258 _omap_sram_reprogram_clock(dpllctl, ckctl);
259} 259}
260 260
261int __init omap1_sram_init(void) 261int __init omap1_sram_init(void)
@@ -282,8 +282,8 @@ void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
282 if (!_omap2_sram_ddr_init) 282 if (!_omap2_sram_ddr_init)
283 omap_sram_error(); 283 omap_sram_error();
284 284
285 return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, 285 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
286 base_cs, force_unlock); 286 base_cs, force_unlock);
287} 287}
288 288
289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, 289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
@@ -294,7 +294,7 @@ void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
294 if (!_omap2_sram_reprogram_sdrc) 294 if (!_omap2_sram_reprogram_sdrc)
295 omap_sram_error(); 295 omap_sram_error();
296 296
297 return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); 297 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
298} 298}
299 299
300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 883902fead89..d41d41d78ad9 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -35,7 +35,7 @@
35#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) 35#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc))
36#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) 36#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16)
37#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) 37#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11)
38#define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) 38#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8)
39#define PCIE_CONF_DATA_OFF 0x18fc 39#define PCIE_CONF_DATA_OFF 0x18fc
40#define PCIE_MASK_OFF 0x1910 40#define PCIE_MASK_OFF 0x1910
41#define PCIE_CTRL_OFF 0x1a00 41#define PCIE_CTRL_OFF 0x1a00
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-13 17:18:03 -0500