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-rw-r--r--arch/arm/Kconfig7
-rw-r--r--arch/arm/include/asm/kgdb.h5
-rw-r--r--arch/arm/kernel/kgdb.c2
-rw-r--r--arch/arm/kernel/ptrace.c28
-rw-r--r--arch/arm/mach-imx/include/mach/dma-v1.h8
-rw-r--r--arch/arm/mach-msm/Kconfig9
-rw-r--r--arch/arm/mach-msm/board-halibut.c1
-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S15
-rw-r--r--arch/arm/mach-msm/iommu_dev.c22
-rw-r--r--arch/arm/mach-msm/timer.c2
-rw-r--r--arch/arm/mach-mx3/mach-pcm037.c2
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c1
-rw-r--r--arch/arm/mach-mx3/mx31moboard-smartbot.c1
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c7
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c15
-rw-r--r--arch/arm/mach-omap2/dsp.c85
-rw-r--r--arch/arm/mach-pxa/em-x270.c1
-rw-r--r--arch/arm/mach-pxa/ezx.c2
-rw-r--r--arch/arm/mach-pxa/mioa701.c1
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c2
-rw-r--r--arch/arm/mach-s3c2410/h1940-bluetooth.c13
-rw-r--r--arch/arm/mach-s3c2410/include/mach/h1940-latch.h57
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c169
-rw-r--r--arch/arm/mach-s3c2440/Kconfig7
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c218
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig1
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c19
-rw-r--r--arch/arm/mach-tegra/timer.c1
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c13
-rw-r--r--arch/arm/mm/highmem.c3
-rw-r--r--arch/arm/plat-mxc/include/mach/dma.h67
-rw-r--r--arch/arm/plat-mxc/include/mach/sdma.h17
-rw-r--r--arch/arm/plat-nomadik/include/plat/ste_dma40.h135
-rw-r--r--arch/arm/plat-omap/common.c2
-rw-r--r--arch/arm/plat-omap/devices.c70
-rw-r--r--arch/arm/plat-omap/include/plat/dsp.h31
-rw-r--r--arch/arm/plat-pxa/include/plat/sdhci.h32
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig1
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
40 files changed, 861 insertions, 217 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c0d6bdae263a..a19a5266d5fc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,10 +1,3 @@
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux Kernel Configuration"
7
8config ARM 1config ARM
9 bool 2 bool
10 default y 3 default y
diff --git a/arch/arm/include/asm/kgdb.h b/arch/arm/include/asm/kgdb.h
index 08265993227f..48066ce9ea34 100644
--- a/arch/arm/include/asm/kgdb.h
+++ b/arch/arm/include/asm/kgdb.h
@@ -70,7 +70,8 @@ extern int kgdb_fault_expected;
70#define _GP_REGS 16 70#define _GP_REGS 16
71#define _FP_REGS 8 71#define _FP_REGS 8
72#define _EXTRA_REGS 2 72#define _EXTRA_REGS 2
73#define DBG_MAX_REG_NUM (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) 73#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS)
74#define DBG_MAX_REG_NUM (_GP_REGS + _FP_REGS + _EXTRA_REGS)
74 75
75#define KGDB_MAX_NO_CPUS 1 76#define KGDB_MAX_NO_CPUS 1
76#define BUFMAX 400 77#define BUFMAX 400
@@ -93,7 +94,7 @@ extern int kgdb_fault_expected;
93#define _SPT 13 94#define _SPT 13
94#define _LR 14 95#define _LR 14
95#define _PC 15 96#define _PC 15
96#define _CPSR (DBG_MAX_REG_NUM - 1) 97#define _CPSR (GDB_MAX_REGS - 1)
97 98
98/* 99/*
99 * So that we can denote the end of a frame for tracing, 100 * So that we can denote the end of a frame for tracing,
diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c
index d6e8b4d2e60d..778c2f7024ff 100644
--- a/arch/arm/kernel/kgdb.c
+++ b/arch/arm/kernel/kgdb.c
@@ -79,7 +79,7 @@ sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task)
79 return; 79 return;
80 80
81 /* Initialize to zero */ 81 /* Initialize to zero */
82 for (regno = 0; regno < DBG_MAX_REG_NUM; regno++) 82 for (regno = 0; regno < GDB_MAX_REGS; regno++)
83 gdb_regs[regno] = 0; 83 gdb_regs[regno] = 0;
84 84
85 /* Otherwise, we have only some registers from switch_to() */ 85 /* Otherwise, we have only some registers from switch_to() */
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index e0cb6370ed14..3e97483abcf0 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -1075,13 +1075,15 @@ out:
1075} 1075}
1076#endif 1076#endif
1077 1077
1078long arch_ptrace(struct task_struct *child, long request, long addr, long data) 1078long arch_ptrace(struct task_struct *child, long request,
1079 unsigned long addr, unsigned long data)
1079{ 1080{
1080 int ret; 1081 int ret;
1082 unsigned long __user *datap = (unsigned long __user *) data;
1081 1083
1082 switch (request) { 1084 switch (request) {
1083 case PTRACE_PEEKUSR: 1085 case PTRACE_PEEKUSR:
1084 ret = ptrace_read_user(child, addr, (unsigned long __user *)data); 1086 ret = ptrace_read_user(child, addr, datap);
1085 break; 1087 break;
1086 1088
1087 case PTRACE_POKEUSR: 1089 case PTRACE_POKEUSR:
@@ -1089,34 +1091,34 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1089 break; 1091 break;
1090 1092
1091 case PTRACE_GETREGS: 1093 case PTRACE_GETREGS:
1092 ret = ptrace_getregs(child, (void __user *)data); 1094 ret = ptrace_getregs(child, datap);
1093 break; 1095 break;
1094 1096
1095 case PTRACE_SETREGS: 1097 case PTRACE_SETREGS:
1096 ret = ptrace_setregs(child, (void __user *)data); 1098 ret = ptrace_setregs(child, datap);
1097 break; 1099 break;
1098 1100
1099 case PTRACE_GETFPREGS: 1101 case PTRACE_GETFPREGS:
1100 ret = ptrace_getfpregs(child, (void __user *)data); 1102 ret = ptrace_getfpregs(child, datap);
1101 break; 1103 break;
1102 1104
1103 case PTRACE_SETFPREGS: 1105 case PTRACE_SETFPREGS:
1104 ret = ptrace_setfpregs(child, (void __user *)data); 1106 ret = ptrace_setfpregs(child, datap);
1105 break; 1107 break;
1106 1108
1107#ifdef CONFIG_IWMMXT 1109#ifdef CONFIG_IWMMXT
1108 case PTRACE_GETWMMXREGS: 1110 case PTRACE_GETWMMXREGS:
1109 ret = ptrace_getwmmxregs(child, (void __user *)data); 1111 ret = ptrace_getwmmxregs(child, datap);
1110 break; 1112 break;
1111 1113
1112 case PTRACE_SETWMMXREGS: 1114 case PTRACE_SETWMMXREGS:
1113 ret = ptrace_setwmmxregs(child, (void __user *)data); 1115 ret = ptrace_setwmmxregs(child, datap);
1114 break; 1116 break;
1115#endif 1117#endif
1116 1118
1117 case PTRACE_GET_THREAD_AREA: 1119 case PTRACE_GET_THREAD_AREA:
1118 ret = put_user(task_thread_info(child)->tp_value, 1120 ret = put_user(task_thread_info(child)->tp_value,
1119 (unsigned long __user *) data); 1121 datap);
1120 break; 1122 break;
1121 1123
1122 case PTRACE_SET_SYSCALL: 1124 case PTRACE_SET_SYSCALL:
@@ -1126,21 +1128,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1126 1128
1127#ifdef CONFIG_CRUNCH 1129#ifdef CONFIG_CRUNCH
1128 case PTRACE_GETCRUNCHREGS: 1130 case PTRACE_GETCRUNCHREGS:
1129 ret = ptrace_getcrunchregs(child, (void __user *)data); 1131 ret = ptrace_getcrunchregs(child, datap);
1130 break; 1132 break;
1131 1133
1132 case PTRACE_SETCRUNCHREGS: 1134 case PTRACE_SETCRUNCHREGS:
1133 ret = ptrace_setcrunchregs(child, (void __user *)data); 1135 ret = ptrace_setcrunchregs(child, datap);
1134 break; 1136 break;
1135#endif 1137#endif
1136 1138
1137#ifdef CONFIG_VFP 1139#ifdef CONFIG_VFP
1138 case PTRACE_GETVFPREGS: 1140 case PTRACE_GETVFPREGS:
1139 ret = ptrace_getvfpregs(child, (void __user *)data); 1141 ret = ptrace_getvfpregs(child, datap);
1140 break; 1142 break;
1141 1143
1142 case PTRACE_SETVFPREGS: 1144 case PTRACE_SETVFPREGS:
1143 ret = ptrace_setvfpregs(child, (void __user *)data); 1145 ret = ptrace_setvfpregs(child, datap);
1144 break; 1146 break;
1145#endif 1147#endif
1146 1148
diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h
index 287431cc13e5..ac6fd713828a 100644
--- a/arch/arm/mach-imx/include/mach/dma-v1.h
+++ b/arch/arm/mach-imx/include/mach/dma-v1.h
@@ -27,6 +27,8 @@
27 27
28#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) 28#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
29 29
30#include <mach/dma.h>
31
30#define IMX_DMA_CHANNELS 16 32#define IMX_DMA_CHANNELS 16
31 33
32#define DMA_MODE_READ 0 34#define DMA_MODE_READ 0
@@ -96,12 +98,6 @@ int imx_dma_request(int channel, const char *name);
96 98
97void imx_dma_free(int channel); 99void imx_dma_free(int channel);
98 100
99enum imx_dma_prio {
100 DMA_PRIO_HIGH = 0,
101 DMA_PRIO_MEDIUM = 1,
102 DMA_PRIO_LOW = 2
103};
104
105int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); 101int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
106 102
107#endif /* __MACH_DMA_V1_H__ */ 103#endif /* __MACH_DMA_V1_H__ */
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 3115a29dec4e..dbbcfeb919db 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -6,6 +6,7 @@ choice
6 6
7config ARCH_MSM7X00A 7config ARCH_MSM7X00A
8 bool "MSM7x00A / MSM7x01A" 8 bool "MSM7x00A / MSM7x01A"
9 select MACH_TROUT if !MACH_HALIBUT
9 select ARCH_MSM_ARM11 10 select ARCH_MSM_ARM11
10 select MSM_SMD 11 select MSM_SMD
11 select MSM_SMD_PKG3 12 select MSM_SMD_PKG3
@@ -15,34 +16,34 @@ config ARCH_MSM7X00A
15 16
16config ARCH_MSM7X30 17config ARCH_MSM7X30
17 bool "MSM7x30" 18 bool "MSM7x30"
19 select MACH_MSM7X30_SURF # if !
18 select ARCH_MSM_SCORPION 20 select ARCH_MSM_SCORPION
19 select MSM_SMD 21 select MSM_SMD
20 select MSM_VIC 22 select MSM_VIC
21 select CPU_V7 23 select CPU_V7
22 select MSM_REMOTE_SPINLOCK_DEKKERS
23 select MSM_GPIOMUX 24 select MSM_GPIOMUX
24 select MSM_PROC_COMM 25 select MSM_PROC_COMM
25 select HAS_MSM_DEBUG_UART_PHYS 26 select HAS_MSM_DEBUG_UART_PHYS
26 27
27config ARCH_QSD8X50 28config ARCH_QSD8X50
28 bool "QSD8X50" 29 bool "QSD8X50"
30 select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5
29 select ARCH_MSM_SCORPION 31 select ARCH_MSM_SCORPION
30 select MSM_SMD 32 select MSM_SMD
31 select MSM_VIC 33 select MSM_VIC
32 select CPU_V7 34 select CPU_V7
33 select MSM_REMOTE_SPINLOCK_LDREX
34 select MSM_GPIOMUX 35 select MSM_GPIOMUX
35 select MSM_PROC_COMM 36 select MSM_PROC_COMM
36 select HAS_MSM_DEBUG_UART_PHYS 37 select HAS_MSM_DEBUG_UART_PHYS
37 38
38config ARCH_MSM8X60 39config ARCH_MSM8X60
39 bool "MSM8X60" 40 bool "MSM8X60"
41 select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \
42 && !MACH_MSM8X60_FFA)
40 select ARM_GIC 43 select ARM_GIC
41 select CPU_V7 44 select CPU_V7
42 select MSM_V2_TLMM 45 select MSM_V2_TLMM
43 select MSM_GPIOMUX 46 select MSM_GPIOMUX
44 select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \
45 && !MACH_MSM8X60_FFA)
46 47
47endchoice 48endchoice
48 49
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 59edecbe126c..75dabb16c802 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -83,7 +83,6 @@ static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags,
83{ 83{
84 mi->nr_banks=1; 84 mi->nr_banks=1;
85 mi->bank[0].start = PHYS_OFFSET; 85 mi->bank[0].start = PHYS_OFFSET;
86 mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
87 mi->bank[0].size = (101*1024*1024); 86 mi->bank[0].size = (101*1024*1024);
88} 87}
89 88
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index fbd5d90dcc8c..646b99ebc773 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -19,7 +19,7 @@
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20#include <mach/msm_iomap.h> 20#include <mach/msm_iomap.h>
21 21
22#ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS 22#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
23 .macro addruart, rp, rv 23 .macro addruart, rp, rv
24 ldr \rp, =MSM_DEBUG_UART_PHYS 24 ldr \rp, =MSM_DEBUG_UART_PHYS
25 ldr \rv, =MSM_DEBUG_UART_BASE 25 ldr \rv, =MSM_DEBUG_UART_BASE
@@ -36,7 +36,18 @@
36 tst \rd, #0x04 36 tst \rd, #0x04
37 beq 1001b 37 beq 1001b
38 .endm 38 .endm
39#else
40 .macro addruart, rp, rv
41 mov \rv, #0xff000000
42 orr \rv, \rv, #0x00f00000
43 .endm
39 44
40 .macro busyuart,rd,rx 45 .macro senduart,rd,rx
46 .endm
47
48 .macro waituart,rd,rx
41 .endm 49 .endm
42#endif 50#endif
51
52 .macro busyuart,rd,rx
53 .endm
diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c
index c33ae786c41f..9019cee2907b 100644
--- a/arch/arm/mach-msm/iommu_dev.c
+++ b/arch/arm/mach-msm/iommu_dev.c
@@ -128,7 +128,7 @@ static void msm_iommu_reset(void __iomem *base)
128 128
129static int msm_iommu_probe(struct platform_device *pdev) 129static int msm_iommu_probe(struct platform_device *pdev)
130{ 130{
131 struct resource *r; 131 struct resource *r, *r2;
132 struct clk *iommu_clk; 132 struct clk *iommu_clk;
133 struct msm_iommu_drvdata *drvdata; 133 struct msm_iommu_drvdata *drvdata;
134 struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data; 134 struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data;
@@ -183,27 +183,27 @@ static int msm_iommu_probe(struct platform_device *pdev)
183 183
184 len = r->end - r->start + 1; 184 len = r->end - r->start + 1;
185 185
186 r = request_mem_region(r->start, len, r->name); 186 r2 = request_mem_region(r->start, len, r->name);
187 if (!r) { 187 if (!r2) {
188 pr_err("Could not request memory region: " 188 pr_err("Could not request memory region: "
189 "start=%p, len=%d\n", (void *) r->start, len); 189 "start=%p, len=%d\n", (void *) r->start, len);
190 ret = -EBUSY; 190 ret = -EBUSY;
191 goto fail; 191 goto fail;
192 } 192 }
193 193
194 regs_base = ioremap(r->start, len); 194 regs_base = ioremap(r2->start, len);
195 195
196 if (!regs_base) { 196 if (!regs_base) {
197 pr_err("Could not ioremap: start=%p, len=%d\n", 197 pr_err("Could not ioremap: start=%p, len=%d\n",
198 (void *) r->start, len); 198 (void *) r2->start, len);
199 ret = -EBUSY; 199 ret = -EBUSY;
200 goto fail; 200 goto fail_mem;
201 } 201 }
202 202
203 irq = platform_get_irq_byname(pdev, "secure_irq"); 203 irq = platform_get_irq_byname(pdev, "secure_irq");
204 if (irq < 0) { 204 if (irq < 0) {
205 ret = -ENODEV; 205 ret = -ENODEV;
206 goto fail; 206 goto fail_io;
207 } 207 }
208 208
209 mb(); 209 mb();
@@ -211,14 +211,14 @@ static int msm_iommu_probe(struct platform_device *pdev)
211 if (GET_IDR(regs_base) == 0) { 211 if (GET_IDR(regs_base) == 0) {
212 pr_err("Invalid IDR value detected\n"); 212 pr_err("Invalid IDR value detected\n");
213 ret = -ENODEV; 213 ret = -ENODEV;
214 goto fail; 214 goto fail_io;
215 } 215 }
216 216
217 ret = request_irq(irq, msm_iommu_fault_handler, 0, 217 ret = request_irq(irq, msm_iommu_fault_handler, 0,
218 "msm_iommu_secure_irpt_handler", drvdata); 218 "msm_iommu_secure_irpt_handler", drvdata);
219 if (ret) { 219 if (ret) {
220 pr_err("Request IRQ %d failed with ret=%d\n", irq, ret); 220 pr_err("Request IRQ %d failed with ret=%d\n", irq, ret);
221 goto fail; 221 goto fail_io;
222 } 222 }
223 223
224 msm_iommu_reset(regs_base); 224 msm_iommu_reset(regs_base);
@@ -237,6 +237,10 @@ static int msm_iommu_probe(struct platform_device *pdev)
237 237
238 return 0; 238 return 0;
239 239
240fail_io:
241 iounmap(regs_base);
242fail_mem:
243 release_mem_region(r->start, len);
240fail: 244fail:
241 kfree(drvdata); 245 kfree(drvdata);
242 return ret; 246 return ret;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 7689848ec680..950100f19d07 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -137,7 +137,7 @@ static struct msm_clock msm_clocks[] = {
137 .rating = 200, 137 .rating = 200,
138 .read = msm_gpt_read, 138 .read = msm_gpt_read,
139 .mask = CLOCKSOURCE_MASK(32), 139 .mask = CLOCKSOURCE_MASK(32),
140 .shift = 24, 140 .shift = 17,
141 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 141 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
142 }, 142 },
143 .irq = { 143 .irq = {
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c
index 86e86c1300d5..2ff3f661a48e 100644
--- a/arch/arm/mach-mx3/mach-pcm037.c
+++ b/arch/arm/mach-mx3/mach-pcm037.c
@@ -311,7 +311,6 @@ static struct soc_camera_link iclink_mt9v022 = {
311 .bus_id = 0, /* Must match with the camera ID */ 311 .bus_id = 0, /* Must match with the camera ID */
312 .board_info = &pcm037_i2c_camera[1], 312 .board_info = &pcm037_i2c_camera[1],
313 .i2c_adapter_id = 2, 313 .i2c_adapter_id = 2,
314 .module_name = "mt9v022",
315}; 314};
316 315
317static struct soc_camera_link iclink_mt9t031 = { 316static struct soc_camera_link iclink_mt9t031 = {
@@ -319,7 +318,6 @@ static struct soc_camera_link iclink_mt9t031 = {
319 .power = pcm037_camera_power, 318 .power = pcm037_camera_power,
320 .board_info = &pcm037_i2c_camera[0], 319 .board_info = &pcm037_i2c_camera[0],
321 .i2c_adapter_id = 2, 320 .i2c_adapter_id = 2,
322 .module_name = "mt9t031",
323}; 321};
324 322
325static struct i2c_board_info pcm037_i2c_devices[] = { 323static struct i2c_board_info pcm037_i2c_devices[] = {
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 0551eb39d97e..18069cb7d068 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -179,7 +179,6 @@ static struct soc_camera_link base_iclink = {
179 .reset = marxbot_basecam_reset, 179 .reset = marxbot_basecam_reset,
180 .board_info = &marxbot_i2c_devices[0], 180 .board_info = &marxbot_i2c_devices[0],
181 .i2c_adapter_id = 0, 181 .i2c_adapter_id = 0,
182 .module_name = "mt9t031",
183}; 182};
184 183
185static struct platform_device marxbot_camera[] = { 184static struct platform_device marxbot_camera[] = {
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c
index 417757e78c65..04760a53005a 100644
--- a/arch/arm/mach-mx3/mx31moboard-smartbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c
@@ -88,7 +88,6 @@ static struct soc_camera_link base_iclink = {
88 .reset = smartbot_cam_reset, 88 .reset = smartbot_cam_reset,
89 .board_info = &smartbot_i2c_devices[0], 89 .board_info = &smartbot_i2c_devices[0],
90 .i2c_adapter_id = 0, 90 .i2c_adapter_id = 0,
91 .module_name = "mt9t031",
92}; 91};
93 92
94static struct platform_device smartbot_camera[] = { 93static struct platform_device smartbot_camera[] = {
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7352412e4917..60e51bcf53bd 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -108,6 +108,10 @@ obj-y += $(iommu-m) $(iommu-y)
108i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o 108i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
109obj-y += $(i2c-omap-m) $(i2c-omap-y) 109obj-y += $(i2c-omap-m) $(i2c-omap-y)
110 110
111ifneq ($(CONFIG_TIDSPBRIDGE),)
112obj-y += dsp.o
113endif
114
111# Specific board support 115# Specific board support
112obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o 116obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
113obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o 117obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 69a4ae971e41..df5a425a49d1 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -269,9 +269,14 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
269 struct omap_mmc_platform_data *pdata = dev->platform_data; 269 struct omap_mmc_platform_data *pdata = dev->platform_data;
270 270
271 /* Setting MMC1 Card detect Irq */ 271 /* Setting MMC1 Card detect Irq */
272 if (pdev->id == 0) 272 if (pdev->id == 0) {
273 ret = twl6030_mmc_card_detect_config();
274 if (ret)
275 pr_err("Failed configuring MMC1 card detect\n");
273 pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE + 276 pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE +
274 MMCDETECT_INTR_OFFSET; 277 MMCDETECT_INTR_OFFSET;
278 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
279 }
275 return ret; 280 return ret;
276} 281}
277 282
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 702f2a63f2c1..1ecd0a6cefb7 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -160,10 +160,19 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
160 struct platform_device, dev); 160 struct platform_device, dev);
161 struct omap_mmc_platform_data *pdata = dev->platform_data; 161 struct omap_mmc_platform_data *pdata = dev->platform_data;
162 162
163 if (!pdata) {
164 dev_err(dev, "%s: NULL platform data\n", __func__);
165 return -EINVAL;
166 }
163 /* Setting MMC1 Card detect Irq */ 167 /* Setting MMC1 Card detect Irq */
164 if (pdev->id == 0) 168 if (pdev->id == 0) {
165 pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE + 169 ret = twl6030_mmc_card_detect_config();
166 MMCDETECT_INTR_OFFSET; 170 if (ret)
171 dev_err(dev, "%s: Error card detect config(%d)\n",
172 __func__, ret);
173 else
174 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
175 }
167 return ret; 176 return ret;
168} 177}
169 178
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
new file mode 100644
index 000000000000..6feeeae6c21b
--- /dev/null
+++ b/arch/arm/mach-omap2/dsp.c
@@ -0,0 +1,85 @@
1/*
2 * TI's OMAP DSP platform device registration
3 *
4 * Copyright (C) 2005-2006 Texas Instruments, Inc.
5 * Copyright (C) 2009 Nokia Corporation
6 *
7 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/platform_device.h>
15#include "prm.h"
16#include "cm.h"
17#ifdef CONFIG_BRIDGE_DVFS
18#include <plat/omap-pm.h>
19#endif
20
21#include <plat/dsp.h>
22
23extern phys_addr_t omap_dsp_get_mempool_base(void);
24
25static struct platform_device *omap_dsp_pdev;
26
27static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
28#ifdef CONFIG_BRIDGE_DVFS
29 .dsp_set_min_opp = omap_pm_dsp_set_min_opp,
30 .dsp_get_opp = omap_pm_dsp_get_opp,
31 .cpu_set_freq = omap_pm_cpu_set_freq,
32 .cpu_get_freq = omap_pm_cpu_get_freq,
33#endif
34 .dsp_prm_read = prm_read_mod_reg,
35 .dsp_prm_write = prm_write_mod_reg,
36 .dsp_prm_rmw_bits = prm_rmw_mod_reg_bits,
37 .dsp_cm_read = cm_read_mod_reg,
38 .dsp_cm_write = cm_write_mod_reg,
39 .dsp_cm_rmw_bits = cm_rmw_mod_reg_bits,
40};
41
42static int __init omap_dsp_init(void)
43{
44 struct platform_device *pdev;
45 int err = -ENOMEM;
46 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata;
47
48 pdata->phys_mempool_base = omap_dsp_get_mempool_base();
49
50 if (pdata->phys_mempool_base) {
51 pdata->phys_mempool_size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
52 pr_info("%s: %x bytes @ %x\n", __func__,
53 pdata->phys_mempool_size, pdata->phys_mempool_base);
54 }
55
56 pdev = platform_device_alloc("omap-dsp", -1);
57 if (!pdev)
58 goto err_out;
59
60 err = platform_device_add_data(pdev, pdata, sizeof(*pdata));
61 if (err)
62 goto err_out;
63
64 err = platform_device_add(pdev);
65 if (err)
66 goto err_out;
67
68 omap_dsp_pdev = pdev;
69 return 0;
70
71err_out:
72 platform_device_put(pdev);
73 return err;
74}
75module_init(omap_dsp_init);
76
77static void __exit omap_dsp_exit(void)
78{
79 platform_device_unregister(omap_dsp_pdev);
80}
81module_exit(omap_dsp_exit);
82
83MODULE_AUTHOR("Hiroshi DOYU");
84MODULE_DESCRIPTION("TI's OMAP DSP platform device registration");
85MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index ab48bb81b570..ed0dbfdb22ed 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1015,7 +1015,6 @@ static struct soc_camera_link iclink = {
1015 .power = em_x270_sensor_power, 1015 .power = em_x270_sensor_power,
1016 .board_info = &em_x270_i2c_cam_info[0], 1016 .board_info = &em_x270_i2c_cam_info[0],
1017 .i2c_adapter_id = 0, 1017 .i2c_adapter_id = 0,
1018 .module_name = "mt9m111",
1019}; 1018};
1020 1019
1021static struct platform_device em_x270_camera = { 1020static struct platform_device em_x270_camera = {
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 80a9352d43f3..142c711f4cda 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -755,7 +755,6 @@ static struct soc_camera_link a780_iclink = {
755 .flags = SOCAM_SENSOR_INVERT_PCLK, 755 .flags = SOCAM_SENSOR_INVERT_PCLK,
756 .i2c_adapter_id = 0, 756 .i2c_adapter_id = 0,
757 .board_info = &a780_camera_i2c_board_info, 757 .board_info = &a780_camera_i2c_board_info,
758 .module_name = "mt9m111",
759 .power = a780_camera_power, 758 .power = a780_camera_power,
760 .reset = a780_camera_reset, 759 .reset = a780_camera_reset,
761}; 760};
@@ -1024,7 +1023,6 @@ static struct soc_camera_link a910_iclink = {
1024 .bus_id = 0, 1023 .bus_id = 0,
1025 .i2c_adapter_id = 0, 1024 .i2c_adapter_id = 0,
1026 .board_info = &a910_camera_i2c_board_info, 1025 .board_info = &a910_camera_i2c_board_info,
1027 .module_name = "mt9m111",
1028 .power = a910_camera_power, 1026 .power = a910_camera_power,
1029 .reset = a910_camera_reset, 1027 .reset = a910_camera_reset,
1030}; 1028};
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 0c31fabfc7fd..f5fb915e1315 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -711,7 +711,6 @@ static struct soc_camera_link iclink = {
711 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */ 711 .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */
712 .board_info = &mioa701_i2c_devices[0], 712 .board_info = &mioa701_i2c_devices[0],
713 .i2c_adapter_id = 0, 713 .i2c_adapter_id = 0,
714 .module_name = "mt9m111",
715}; 714};
716 715
717struct i2c_pxa_platform_data i2c_pdata = { 716struct i2c_pxa_platform_data i2c_pdata = {
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f56ae1008759..f33647a8e0b7 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -453,7 +453,6 @@ static struct soc_camera_link iclink[] = {
453 .query_bus_param = pcm990_camera_query_bus_param, 453 .query_bus_param = pcm990_camera_query_bus_param,
454 .set_bus_param = pcm990_camera_set_bus_param, 454 .set_bus_param = pcm990_camera_set_bus_param,
455 .free_bus = pcm990_camera_free_bus, 455 .free_bus = pcm990_camera_free_bus,
456 .module_name = "mt9v022",
457 }, { 456 }, {
458 .bus_id = 0, /* Must match with the camera ID */ 457 .bus_id = 0, /* Must match with the camera ID */
459 .board_info = &pcm990_camera_i2c[1], 458 .board_info = &pcm990_camera_i2c[1],
@@ -461,7 +460,6 @@ static struct soc_camera_link iclink[] = {
461 .query_bus_param = pcm990_camera_query_bus_param, 460 .query_bus_param = pcm990_camera_query_bus_param,
462 .set_bus_param = pcm990_camera_set_bus_param, 461 .set_bus_param = pcm990_camera_set_bus_param,
463 .free_bus = pcm990_camera_free_bus, 462 .free_bus = pcm990_camera_free_bus,
464 .module_name = "mt9m001",
465 }, 463 },
466}; 464};
467 465
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
index 8cdeb14af592..8aa2f1902a94 100644
--- a/arch/arm/mach-s3c2410/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -30,7 +30,7 @@ static void h1940bt_enable(int on)
30{ 30{
31 if (on) { 31 if (on) {
32 /* Power on the chip */ 32 /* Power on the chip */
33 h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); 33 gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 1);
34 /* Reset the chip */ 34 /* Reset the chip */
35 mdelay(10); 35 mdelay(10);
36 36
@@ -43,7 +43,7 @@ static void h1940bt_enable(int on)
43 mdelay(10); 43 mdelay(10);
44 gpio_set_value(S3C2410_GPH(1), 0); 44 gpio_set_value(S3C2410_GPH(1), 0);
45 mdelay(10); 45 mdelay(10);
46 h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); 46 gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0);
47 } 47 }
48} 48}
49 49
@@ -64,7 +64,14 @@ static int __devinit h1940bt_probe(struct platform_device *pdev)
64 64
65 ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev)); 65 ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev));
66 if (ret) { 66 if (ret) {
67 dev_err(&pdev->dev, "could not get GPH1\n");\ 67 dev_err(&pdev->dev, "could not get GPH1\n");
68 return ret;
69 }
70
71 ret = gpio_request(H1940_LATCH_BLUETOOTH_POWER, dev_name(&pdev->dev));
72 if (ret) {
73 gpio_free(S3C2410_GPH(1));
74 dev_err(&pdev->dev, "could not get BT_POWER\n");
68 return ret; 75 return ret;
69 } 76 }
70 77
diff --git a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h
index d8a832729a8a..97e42bfce81e 100644
--- a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h
+++ b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h
@@ -14,51 +14,30 @@
14#ifndef __ASM_ARCH_H1940_LATCH_H 14#ifndef __ASM_ARCH_H1940_LATCH_H
15#define __ASM_ARCH_H1940_LATCH_H 15#define __ASM_ARCH_H1940_LATCH_H
16 16
17#include <mach/gpio.h>
17 18
18#ifndef __ASSEMBLY__ 19#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x))
19#define H1940_LATCH ((void __force __iomem *)0xF8000000)
20#else
21#define H1940_LATCH 0xF8000000
22#endif
23
24#define H1940_PA_LATCH (S3C2410_CS2)
25 20
26/* SD layer latch */ 21/* SD layer latch */
27 22
28#define H1940_LATCH_SDQ1 (1<<16) 23#define H1940_LATCH_LCD_P0 H1940_LATCH_GPIO(0)
29#define H1940_LATCH_LCD_P1 (1<<17) 24#define H1940_LATCH_LCD_P1 H1940_LATCH_GPIO(1)
30#define H1940_LATCH_LCD_P2 (1<<18) 25#define H1940_LATCH_LCD_P2 H1940_LATCH_GPIO(2)
31#define H1940_LATCH_LCD_P3 (1<<19) 26#define H1940_LATCH_LCD_P3 H1940_LATCH_GPIO(3)
32#define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */ 27#define H1940_LATCH_MAX1698_nSHUTDOWN H1940_LATCH_GPIO(4)
33#define H1940_LATCH_LED_RED (1<<21) 28#define H1940_LATCH_LED_RED H1940_LATCH_GPIO(5)
34#define H1940_LATCH_SDQ7 (1<<22) 29#define H1940_LATCH_SDQ7 H1940_LATCH_GPIO(6)
35#define H1940_LATCH_USB_DP (1<<23) 30#define H1940_LATCH_USB_DP H1940_LATCH_GPIO(7)
36 31
37/* CPU layer latch */ 32/* CPU layer latch */
38 33
39#define H1940_LATCH_UDA_POWER (1<<24) 34#define H1940_LATCH_UDA_POWER H1940_LATCH_GPIO(8)
40#define H1940_LATCH_AUDIO_POWER (1<<25) 35#define H1940_LATCH_AUDIO_POWER H1940_LATCH_GPIO(9)
41#define H1940_LATCH_SM803_ENABLE (1<<26) 36#define H1940_LATCH_SM803_ENABLE H1940_LATCH_GPIO(10)
42#define H1940_LATCH_LCD_P4 (1<<27) 37#define H1940_LATCH_LCD_P4 H1940_LATCH_GPIO(11)
43#define H1940_LATCH_CPUQ5 (1<<28) /* untraced */ 38#define H1940_LATCH_SD_POWER H1940_LATCH_GPIO(12)
44#define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */ 39#define H1940_LATCH_BLUETOOTH_POWER H1940_LATCH_GPIO(13)
45#define H1940_LATCH_LED_GREEN (1<<30) 40#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14)
46#define H1940_LATCH_LED_FLASH (1<<31) 41#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15)
47
48/* default settings */
49
50#define H1940_LATCH_DEFAULT \
51 H1940_LATCH_LCD_P4 | \
52 H1940_LATCH_SM803_ENABLE | \
53 H1940_LATCH_SDQ1 | \
54 H1940_LATCH_LCD_P1 | \
55 H1940_LATCH_LCD_P2 | \
56 H1940_LATCH_LCD_P3 | \
57 H1940_LATCH_MAX1698_nSHUTDOWN | \
58 H1940_LATCH_CPUQ5
59
60/* control functions */
61
62extern void h1940_latch_control(unsigned int clear, unsigned int set);
63 42
64#endif /* __ASM_ARCH_H1940_LATCH_H */ 43#endif /* __ASM_ARCH_H1940_LATCH_H */
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 98c5c9e81ee9..d7ada8c7e41f 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -24,6 +24,7 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27#include <linux/i2c.h>
27#include <video/platform_lcd.h> 28#include <video/platform_lcd.h>
28 29
29#include <linux/mmc/host.h> 30#include <linux/mmc/host.h>
@@ -59,6 +60,14 @@
59#include <plat/mci.h> 60#include <plat/mci.h>
60#include <plat/ts.h> 61#include <plat/ts.h>
61 62
63#include <sound/uda1380.h>
64
65#define H1940_LATCH ((void __force __iomem *)0xF8000000)
66
67#define H1940_PA_LATCH S3C2410_CS2
68
69#define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END))
70
62static struct map_desc h1940_iodesc[] __initdata = { 71static struct map_desc h1940_iodesc[] __initdata = {
63 [0] = { 72 [0] = {
64 .virtual = (unsigned long)H1940_LATCH, 73 .virtual = (unsigned long)H1940_LATCH,
@@ -100,9 +109,9 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
100 109
101/* Board control latch control */ 110/* Board control latch control */
102 111
103static unsigned int latch_state = H1940_LATCH_DEFAULT; 112static unsigned int latch_state;
104 113
105void h1940_latch_control(unsigned int clear, unsigned int set) 114static void h1940_latch_control(unsigned int clear, unsigned int set)
106{ 115{
107 unsigned long flags; 116 unsigned long flags;
108 117
@@ -116,7 +125,42 @@ void h1940_latch_control(unsigned int clear, unsigned int set)
116 local_irq_restore(flags); 125 local_irq_restore(flags);
117} 126}
118 127
119EXPORT_SYMBOL_GPL(h1940_latch_control); 128static inline int h1940_gpiolib_to_latch(int offset)
129{
130 return 1 << (offset + 16);
131}
132
133static void h1940_gpiolib_latch_set(struct gpio_chip *chip,
134 unsigned offset, int value)
135{
136 int latch_bit = h1940_gpiolib_to_latch(offset);
137
138 h1940_latch_control(value ? 0 : latch_bit,
139 value ? latch_bit : 0);
140}
141
142static int h1940_gpiolib_latch_output(struct gpio_chip *chip,
143 unsigned offset, int value)
144{
145 h1940_gpiolib_latch_set(chip, offset, value);
146 return 0;
147}
148
149static int h1940_gpiolib_latch_get(struct gpio_chip *chip,
150 unsigned offset)
151{
152 return (latch_state >> (offset + 16)) & 1;
153}
154
155struct gpio_chip h1940_latch_gpiochip = {
156 .base = H1940_LATCH_GPIO(0),
157 .owner = THIS_MODULE,
158 .label = "H1940_LATCH",
159 .ngpio = 16,
160 .direction_output = h1940_gpiolib_latch_output,
161 .set = h1940_gpiolib_latch_set,
162 .get = h1940_gpiolib_latch_get,
163};
120 164
121static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) 165static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd)
122{ 166{
@@ -125,10 +169,10 @@ static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd)
125 switch (cmd) 169 switch (cmd)
126 { 170 {
127 case S3C2410_UDC_P_ENABLE : 171 case S3C2410_UDC_P_ENABLE :
128 h1940_latch_control(0, H1940_LATCH_USB_DP); 172 gpio_set_value(H1940_LATCH_USB_DP, 1);
129 break; 173 break;
130 case S3C2410_UDC_P_DISABLE : 174 case S3C2410_UDC_P_DISABLE :
131 h1940_latch_control(H1940_LATCH_USB_DP, 0); 175 gpio_set_value(H1940_LATCH_USB_DP, 0);
132 break; 176 break;
133 case S3C2410_UDC_P_RESET : 177 case S3C2410_UDC_P_RESET :
134 break; 178 break;
@@ -199,10 +243,25 @@ static struct platform_device h1940_device_bluetooth = {
199 .id = -1, 243 .id = -1,
200}; 244};
201 245
246static void h1940_set_mmc_power(unsigned char power_mode, unsigned short vdd)
247{
248 switch (power_mode) {
249 case MMC_POWER_OFF:
250 gpio_set_value(H1940_LATCH_SD_POWER, 0);
251 break;
252 case MMC_POWER_UP:
253 case MMC_POWER_ON:
254 gpio_set_value(H1940_LATCH_SD_POWER, 1);
255 break;
256 default:
257 break;
258 };
259}
260
202static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = { 261static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = {
203 .gpio_detect = S3C2410_GPF(5), 262 .gpio_detect = S3C2410_GPF(5),
204 .gpio_wprotect = S3C2410_GPH(8), 263 .gpio_wprotect = S3C2410_GPH(8),
205 .set_power = NULL, 264 .set_power = h1940_set_mmc_power,
206 .ocr_avail = MMC_VDD_32_33, 265 .ocr_avail = MMC_VDD_32_33,
207}; 266};
208 267
@@ -213,15 +272,32 @@ static int h1940_backlight_init(struct device *dev)
213 gpio_direction_output(S3C2410_GPB(0), 0); 272 gpio_direction_output(S3C2410_GPB(0), 0);
214 s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); 273 s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE);
215 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); 274 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
275 gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1);
216 276
217 return 0; 277 return 0;
218} 278}
219 279
280static int h1940_backlight_notify(struct device *dev, int brightness)
281{
282 if (!brightness) {
283 gpio_direction_output(S3C2410_GPB(0), 1);
284 gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0);
285 } else {
286 gpio_direction_output(S3C2410_GPB(0), 0);
287 s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE);
288 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
289 gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1);
290 }
291 return brightness;
292}
293
220static void h1940_backlight_exit(struct device *dev) 294static void h1940_backlight_exit(struct device *dev)
221{ 295{
222 gpio_direction_output(S3C2410_GPB(0), 1); 296 gpio_direction_output(S3C2410_GPB(0), 1);
297 gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0);
223} 298}
224 299
300
225static struct platform_pwm_backlight_data backlight_data = { 301static struct platform_pwm_backlight_data backlight_data = {
226 .pwm_id = 0, 302 .pwm_id = 0,
227 .max_brightness = 100, 303 .max_brightness = 100,
@@ -229,6 +305,7 @@ static struct platform_pwm_backlight_data backlight_data = {
229 /* tcnt = 0x31 */ 305 /* tcnt = 0x31 */
230 .pwm_period_ns = 36296, 306 .pwm_period_ns = 36296,
231 .init = h1940_backlight_init, 307 .init = h1940_backlight_init,
308 .notify = h1940_backlight_notify,
232 .exit = h1940_backlight_exit, 309 .exit = h1940_backlight_exit,
233}; 310};
234 311
@@ -247,19 +324,37 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd,
247 int value; 324 int value;
248 325
249 if (!power) { 326 if (!power) {
250 /* set to 3ec */ 327 gpio_set_value(S3C2410_GPC(0), 0);
251 gpio_direction_output(S3C2410_GPC(0), 0);
252 /* wait for 3ac */ 328 /* wait for 3ac */
253 do { 329 do {
254 value = gpio_get_value(S3C2410_GPC(6)); 330 value = gpio_get_value(S3C2410_GPC(6));
255 } while (value); 331 } while (value);
256 /* set to 38c */ 332
257 gpio_direction_output(S3C2410_GPC(5), 0); 333 gpio_set_value(H1940_LATCH_LCD_P2, 0);
334 gpio_set_value(H1940_LATCH_LCD_P3, 0);
335 gpio_set_value(H1940_LATCH_LCD_P4, 0);
336
337 gpio_direction_output(S3C2410_GPC(1), 0);
338 gpio_direction_output(S3C2410_GPC(4), 0);
339
340 gpio_set_value(H1940_LATCH_LCD_P1, 0);
341 gpio_set_value(H1940_LATCH_LCD_P0, 0);
342
343 gpio_set_value(S3C2410_GPC(5), 0);
344
258 } else { 345 } else {
259 /* Set to 3ac */ 346 gpio_set_value(H1940_LATCH_LCD_P0, 1);
260 gpio_direction_output(S3C2410_GPC(5), 1); 347 gpio_set_value(H1940_LATCH_LCD_P1, 1);
261 /* Set to 3ad */ 348
262 gpio_direction_output(S3C2410_GPC(0), 1); 349 s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2));
350 s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2));
351
352 gpio_set_value(S3C2410_GPC(5), 1);
353 gpio_set_value(S3C2410_GPC(0), 1);
354
355 gpio_set_value(H1940_LATCH_LCD_P3, 1);
356 gpio_set_value(H1940_LATCH_LCD_P2, 1);
357 gpio_set_value(H1940_LATCH_LCD_P4, 1);
263 } 358 }
264} 359}
265 360
@@ -273,12 +368,26 @@ static struct platform_device h1940_lcd_powerdev = {
273 .dev.platform_data = &h1940_lcd_power_data, 368 .dev.platform_data = &h1940_lcd_power_data,
274}; 369};
275 370
371static struct uda1380_platform_data uda1380_info = {
372 .gpio_power = H1940_LATCH_UDA_POWER,
373 .gpio_reset = S3C2410_GPA(12),
374 .dac_clk = UDA1380_DAC_CLK_SYSCLK,
375};
376
377static struct i2c_board_info h1940_i2c_devices[] = {
378 {
379 I2C_BOARD_INFO("uda1380", 0x1a),
380 .platform_data = &uda1380_info,
381 },
382};
383
276static struct platform_device *h1940_devices[] __initdata = { 384static struct platform_device *h1940_devices[] __initdata = {
277 &s3c_device_ohci, 385 &s3c_device_ohci,
278 &s3c_device_lcd, 386 &s3c_device_lcd,
279 &s3c_device_wdt, 387 &s3c_device_wdt,
280 &s3c_device_i2c0, 388 &s3c_device_i2c0,
281 &s3c_device_iis, 389 &s3c_device_iis,
390 &s3c_device_pcm,
282 &s3c_device_usbgadget, 391 &s3c_device_usbgadget,
283 &h1940_device_leds, 392 &h1940_device_leds,
284 &h1940_device_bluetooth, 393 &h1940_device_bluetooth,
@@ -303,6 +412,10 @@ static void __init h1940_map_io(void)
303 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); 412 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
304#endif 413#endif
305 s3c_pm_init(); 414 s3c_pm_init();
415
416 /* Add latch gpio chip, set latch initial value */
417 h1940_latch_control(0, 0);
418 WARN_ON(gpiochip_add(&h1940_latch_gpiochip));
306} 419}
307 420
308/* H1940 and RX3715 need to reserve this for suspend */ 421/* H1940 and RX3715 need to reserve this for suspend */
@@ -340,12 +453,38 @@ static void __init h1940_init(void)
340 writel(tmp, S3C2410_UPLLCON); 453 writel(tmp, S3C2410_UPLLCON);
341 454
342 gpio_request(S3C2410_GPC(0), "LCD power"); 455 gpio_request(S3C2410_GPC(0), "LCD power");
456 gpio_request(S3C2410_GPC(1), "LCD power");
457 gpio_request(S3C2410_GPC(4), "LCD power");
343 gpio_request(S3C2410_GPC(5), "LCD power"); 458 gpio_request(S3C2410_GPC(5), "LCD power");
344 gpio_request(S3C2410_GPC(6), "LCD power"); 459 gpio_request(S3C2410_GPC(6), "LCD power");
345 460 gpio_request(H1940_LATCH_LCD_P0, "LCD power");
461 gpio_request(H1940_LATCH_LCD_P1, "LCD power");
462 gpio_request(H1940_LATCH_LCD_P2, "LCD power");
463 gpio_request(H1940_LATCH_LCD_P3, "LCD power");
464 gpio_request(H1940_LATCH_LCD_P4, "LCD power");
465 gpio_request(H1940_LATCH_MAX1698_nSHUTDOWN, "LCD power");
466 gpio_direction_output(S3C2410_GPC(0), 0);
467 gpio_direction_output(S3C2410_GPC(1), 0);
468 gpio_direction_output(S3C2410_GPC(4), 0);
469 gpio_direction_output(S3C2410_GPC(5), 0);
346 gpio_direction_input(S3C2410_GPC(6)); 470 gpio_direction_input(S3C2410_GPC(6));
471 gpio_direction_output(H1940_LATCH_LCD_P0, 0);
472 gpio_direction_output(H1940_LATCH_LCD_P1, 0);
473 gpio_direction_output(H1940_LATCH_LCD_P2, 0);
474 gpio_direction_output(H1940_LATCH_LCD_P3, 0);
475 gpio_direction_output(H1940_LATCH_LCD_P4, 0);
476 gpio_direction_output(H1940_LATCH_MAX1698_nSHUTDOWN, 0);
477
478 gpio_request(H1940_LATCH_USB_DP, "USB pullup");
479 gpio_direction_output(H1940_LATCH_USB_DP, 0);
480
481 gpio_request(H1940_LATCH_SD_POWER, "SD power");
482 gpio_direction_output(H1940_LATCH_SD_POWER, 0);
347 483
348 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); 484 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
485
486 i2c_register_board_info(0, h1940_i2c_devices,
487 ARRAY_SIZE(h1940_i2c_devices));
349} 488}
350 489
351MACHINE_START(H1940, "IPAQ-H1940") 490MACHINE_START(H1940, "IPAQ-H1940")
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index cd8e7de388f0..ff024a6c0f85 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -4,7 +4,6 @@
4 4
5config CPU_S3C2440 5config CPU_S3C2440
6 bool 6 bool
7 depends on ARCH_S3C2410
8 select CPU_ARM920T 7 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP 8 select S3C_GPIO_PULL_UP
10 select S3C2410_CLOCK 9 select S3C2410_CLOCK
@@ -18,7 +17,6 @@ config CPU_S3C2440
18 17
19config CPU_S3C2442 18config CPU_S3C2442
20 bool 19 bool
21 depends on ARCH_S3C2410
22 select CPU_ARM920T 20 select CPU_ARM920T
23 select S3C2410_CLOCK 21 select S3C2410_CLOCK
24 select S3C2410_GPIO 22 select S3C2410_GPIO
@@ -30,7 +28,7 @@ config CPU_S3C2442
30 28
31config CPU_S3C244X 29config CPU_S3C244X
32 bool 30 bool
33 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) 31 depends on CPU_S3C2440 || CPU_S3C2442
34 help 32 help
35 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. 33 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
36 34
@@ -72,7 +70,7 @@ config S3C2440_PLL_16934400
72 70
73config S3C2440_DMA 71config S3C2440_DMA
74 bool 72 bool
75 depends on ARCH_S3C2410 && CPU_S3C24405B 73 depends on CPU_S3C2440
76 help 74 help
77 Support for S3C2440 specific DMA code5A 75 Support for S3C2440 specific DMA code5A
78 76
@@ -181,7 +179,6 @@ config MACH_MINI2440
181 select CPU_S3C2440 179 select CPU_S3C2440
182 select EEPROM_AT24 180 select EEPROM_AT24
183 select LEDS_TRIGGER_BACKLIGHT 181 select LEDS_TRIGGER_BACKLIGHT
184 select SND_S3C24XX_SOC_S3C24XX_UDA134X
185 select S3C_DEV_NAND 182 select S3C_DEV_NAND
186 select S3C_DEV_USB_HOST 183 select S3C_DEV_USB_HOST
187 help 184 help
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 32019bd9db3b..e0622bbb6dfa 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -25,8 +25,12 @@
25#include <linux/input.h> 25#include <linux/input.h>
26#include <linux/gpio_keys.h> 26#include <linux/gpio_keys.h>
27#include <linux/sysdev.h> 27#include <linux/sysdev.h>
28#include <linux/pda_power.h>
28#include <linux/pwm_backlight.h> 29#include <linux/pwm_backlight.h>
29#include <linux/pwm.h> 30#include <linux/pwm.h>
31#include <linux/s3c_adc_battery.h>
32#include <linux/leds.h>
33#include <linux/i2c.h>
30 34
31#include <linux/mtd/mtd.h> 35#include <linux/mtd/mtd.h>
32#include <linux/mtd/partitions.h> 36#include <linux/mtd/partitions.h>
@@ -55,6 +59,8 @@
55#include <plat/irq.h> 59#include <plat/irq.h>
56#include <plat/ts.h> 60#include <plat/ts.h>
57 61
62#include <sound/uda1380.h>
63
58#define LCD_PWM_PERIOD 192960 64#define LCD_PWM_PERIOD 192960
59#define LCD_PWM_DUTY 127353 65#define LCD_PWM_DUTY 127353
60 66
@@ -127,6 +133,193 @@ static struct s3c2410fb_display rx1950_display = {
127 133
128}; 134};
129 135
136static int power_supply_init(struct device *dev)
137{
138 return gpio_request(S3C2410_GPF(2), "cable plugged");
139}
140
141static int rx1950_is_ac_online(void)
142{
143 return !gpio_get_value(S3C2410_GPF(2));
144}
145
146static void power_supply_exit(struct device *dev)
147{
148 gpio_free(S3C2410_GPF(2));
149}
150
151static char *rx1950_supplicants[] = {
152 "main-battery"
153};
154
155static struct pda_power_pdata power_supply_info = {
156 .init = power_supply_init,
157 .is_ac_online = rx1950_is_ac_online,
158 .exit = power_supply_exit,
159 .supplied_to = rx1950_supplicants,
160 .num_supplicants = ARRAY_SIZE(rx1950_supplicants),
161};
162
163static struct resource power_supply_resources[] = {
164 [0] = {
165 .name = "ac",
166 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |
167 IORESOURCE_IRQ_HIGHEDGE,
168 .start = IRQ_EINT2,
169 .end = IRQ_EINT2,
170 },
171};
172
173static struct platform_device power_supply = {
174 .name = "pda-power",
175 .id = -1,
176 .dev = {
177 .platform_data =
178 &power_supply_info,
179 },
180 .resource = power_supply_resources,
181 .num_resources = ARRAY_SIZE(power_supply_resources),
182};
183
184static const struct s3c_adc_bat_thresh bat_lut_noac[] = {
185 { .volt = 4100, .cur = 156, .level = 100},
186 { .volt = 4050, .cur = 156, .level = 95},
187 { .volt = 4025, .cur = 141, .level = 90},
188 { .volt = 3995, .cur = 144, .level = 85},
189 { .volt = 3957, .cur = 162, .level = 80},
190 { .volt = 3931, .cur = 147, .level = 75},
191 { .volt = 3902, .cur = 147, .level = 70},
192 { .volt = 3863, .cur = 153, .level = 65},
193 { .volt = 3838, .cur = 150, .level = 60},
194 { .volt = 3800, .cur = 153, .level = 55},
195 { .volt = 3765, .cur = 153, .level = 50},
196 { .volt = 3748, .cur = 172, .level = 45},
197 { .volt = 3740, .cur = 153, .level = 40},
198 { .volt = 3714, .cur = 175, .level = 35},
199 { .volt = 3710, .cur = 156, .level = 30},
200 { .volt = 3963, .cur = 156, .level = 25},
201 { .volt = 3672, .cur = 178, .level = 20},
202 { .volt = 3651, .cur = 178, .level = 15},
203 { .volt = 3629, .cur = 178, .level = 10},
204 { .volt = 3612, .cur = 162, .level = 5},
205 { .volt = 3605, .cur = 162, .level = 0},
206};
207
208static const struct s3c_adc_bat_thresh bat_lut_acin[] = {
209 { .volt = 4200, .cur = 0, .level = 100},
210 { .volt = 4190, .cur = 0, .level = 99},
211 { .volt = 4178, .cur = 0, .level = 95},
212 { .volt = 4110, .cur = 0, .level = 70},
213 { .volt = 4076, .cur = 0, .level = 65},
214 { .volt = 4046, .cur = 0, .level = 60},
215 { .volt = 4021, .cur = 0, .level = 55},
216 { .volt = 3999, .cur = 0, .level = 50},
217 { .volt = 3982, .cur = 0, .level = 45},
218 { .volt = 3965, .cur = 0, .level = 40},
219 { .volt = 3957, .cur = 0, .level = 35},
220 { .volt = 3948, .cur = 0, .level = 30},
221 { .volt = 3936, .cur = 0, .level = 25},
222 { .volt = 3927, .cur = 0, .level = 20},
223 { .volt = 3906, .cur = 0, .level = 15},
224 { .volt = 3880, .cur = 0, .level = 10},
225 { .volt = 3829, .cur = 0, .level = 5},
226 { .volt = 3820, .cur = 0, .level = 0},
227};
228
229int rx1950_bat_init(void)
230{
231 int ret;
232
233 ret = gpio_request(S3C2410_GPJ(2), "rx1950-charger-enable-1");
234 if (ret)
235 goto err_gpio1;
236 ret = gpio_request(S3C2410_GPJ(3), "rx1950-charger-enable-2");
237 if (ret)
238 goto err_gpio2;
239
240 return 0;
241
242err_gpio2:
243 gpio_free(S3C2410_GPJ(2));
244err_gpio1:
245 return ret;
246}
247
248void rx1950_bat_exit(void)
249{
250 gpio_free(S3C2410_GPJ(2));
251 gpio_free(S3C2410_GPJ(3));
252}
253
254void rx1950_enable_charger(void)
255{
256 gpio_direction_output(S3C2410_GPJ(2), 1);
257 gpio_direction_output(S3C2410_GPJ(3), 1);
258}
259
260void rx1950_disable_charger(void)
261{
262 gpio_direction_output(S3C2410_GPJ(2), 0);
263 gpio_direction_output(S3C2410_GPJ(3), 0);
264}
265
266static struct gpio_led rx1950_leds_desc[] = {
267 {
268 .name = "Green",
269 .default_trigger = "main-battery-charging-or-full",
270 .gpio = S3C2410_GPA(6),
271 },
272 {
273 .name = "Red",
274 .default_trigger = "main-battery-full",
275 .gpio = S3C2410_GPA(7),
276 },
277 {
278 .name = "Blue",
279 .default_trigger = "rx1950-acx-mem",
280 .gpio = S3C2410_GPA(11),
281 },
282};
283
284static struct gpio_led_platform_data rx1950_leds_pdata = {
285 .num_leds = ARRAY_SIZE(rx1950_leds_desc),
286 .leds = rx1950_leds_desc,
287};
288
289static struct platform_device rx1950_leds = {
290 .name = "leds-gpio",
291 .id = -1,
292 .dev = {
293 .platform_data = &rx1950_leds_pdata,
294 },
295};
296
297static struct s3c_adc_bat_pdata rx1950_bat_cfg = {
298 .init = rx1950_bat_init,
299 .exit = rx1950_bat_exit,
300 .enable_charger = rx1950_enable_charger,
301 .disable_charger = rx1950_disable_charger,
302 .gpio_charge_finished = S3C2410_GPF(3),
303 .lut_noac = bat_lut_noac,
304 .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac),
305 .lut_acin = bat_lut_acin,
306 .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin),
307 .volt_channel = 0,
308 .current_channel = 1,
309 .volt_mult = 4235,
310 .current_mult = 2900,
311 .internal_impedance = 200,
312};
313
314static struct platform_device rx1950_battery = {
315 .name = "s3c-adc-battery",
316 .id = -1,
317 .dev = {
318 .parent = &s3c_device_adc.dev,
319 .platform_data = &rx1950_bat_cfg,
320 },
321};
322
130static struct s3c2410fb_mach_info rx1950_lcd_cfg = { 323static struct s3c2410fb_mach_info rx1950_lcd_cfg = {
131 .displays = &rx1950_display, 324 .displays = &rx1950_display,
132 .num_displays = 1, 325 .num_displays = 1,
@@ -481,11 +674,17 @@ static struct platform_device rx1950_device_gpiokeys = {
481 .dev.platform_data = &rx1950_gpio_keys_data, 674 .dev.platform_data = &rx1950_gpio_keys_data,
482}; 675};
483 676
484static struct s3c2410_platform_i2c rx1950_i2c_data = { 677static struct uda1380_platform_data uda1380_info = {
485 .flags = 0, 678 .gpio_power = S3C2410_GPJ(0),
486 .slave_addr = 0x42, 679 .gpio_reset = S3C2410_GPD(0),
487 .frequency = 400 * 1000, 680 .dac_clk = UDA1380_DAC_CLK_SYSCLK,
488 .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON, 681};
682
683static struct i2c_board_info rx1950_i2c_devices[] = {
684 {
685 I2C_BOARD_INFO("uda1380", 0x1a),
686 .platform_data = &uda1380_info,
687 },
489}; 688};
490 689
491static struct platform_device *rx1950_devices[] __initdata = { 690static struct platform_device *rx1950_devices[] __initdata = {
@@ -493,6 +692,7 @@ static struct platform_device *rx1950_devices[] __initdata = {
493 &s3c_device_wdt, 692 &s3c_device_wdt,
494 &s3c_device_i2c0, 693 &s3c_device_i2c0,
495 &s3c_device_iis, 694 &s3c_device_iis,
695 &s3c_device_pcm,
496 &s3c_device_usbgadget, 696 &s3c_device_usbgadget,
497 &s3c_device_rtc, 697 &s3c_device_rtc,
498 &s3c_device_nand, 698 &s3c_device_nand,
@@ -503,6 +703,9 @@ static struct platform_device *rx1950_devices[] __initdata = {
503 &s3c_device_timer[1], 703 &s3c_device_timer[1],
504 &rx1950_backlight, 704 &rx1950_backlight,
505 &rx1950_device_gpiokeys, 705 &rx1950_device_gpiokeys,
706 &power_supply,
707 &rx1950_battery,
708 &rx1950_leds,
506}; 709};
507 710
508static struct clk *rx1950_clocks[] __initdata = { 711static struct clk *rx1950_clocks[] __initdata = {
@@ -538,7 +741,7 @@ static void __init rx1950_init_machine(void)
538 s3c24xx_udc_set_platdata(&rx1950_udc_cfg); 741 s3c24xx_udc_set_platdata(&rx1950_udc_cfg);
539 s3c24xx_ts_set_platdata(&rx1950_ts_cfg); 742 s3c24xx_ts_set_platdata(&rx1950_ts_cfg);
540 s3c24xx_mci_set_platdata(&rx1950_mmc_cfg); 743 s3c24xx_mci_set_platdata(&rx1950_mmc_cfg);
541 s3c_i2c0_set_platdata(&rx1950_i2c_data); 744 s3c_i2c0_set_platdata(NULL);
542 s3c_nand_set_platdata(&rx1950_nand_info); 745 s3c_nand_set_platdata(&rx1950_nand_info);
543 746
544 /* Turn off suspend on both USB ports, and switch the 747 /* Turn off suspend on both USB ports, and switch the
@@ -569,6 +772,9 @@ static void __init rx1950_init_machine(void)
569 WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power")); 772 WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power"));
570 773
571 platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); 774 platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices));
775
776 i2c_register_board_info(0, rx1950_i2c_devices,
777 ARRAY_SIZE(rx1950_i2c_devices));
572} 778}
573 779
574/* H1940 and RX3715 need to reserve this for suspend */ 780/* H1940 and RX3715 need to reserve this for suspend */
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index fe1fd3007ae4..1ca7bdc6485c 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -206,6 +206,7 @@ config SMDK6410_WM1192_EV1
206 select REGULATOR_WM831X 206 select REGULATOR_WM831X
207 select S3C24XX_GPIO_EXTRA64 207 select S3C24XX_GPIO_EXTRA64
208 select MFD_WM831X 208 select MFD_WM831X
209 select MFD_WM831X_I2C
209 help 210 help
210 The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC 211 The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
211 daughtercard for the Samsung SMDK6410 reference platform. 212 daughtercard for the Samsung SMDK6410 reference platform.
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index f5d55efda386..46ca4d4abf91 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -238,6 +238,18 @@ static struct platform_device smc911x_device = {
238 }, 238 },
239}; 239};
240 240
241/*
242 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
243 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
244 */
245static int slot_cn7_get_cd(struct platform_device *pdev)
246{
247 if (gpio_is_valid(GPIO_PORT41))
248 return !gpio_get_value(GPIO_PORT41);
249 else
250 return -ENXIO;
251}
252
241/* SH_MMCIF */ 253/* SH_MMCIF */
242static struct resource sh_mmcif_resources[] = { 254static struct resource sh_mmcif_resources[] = {
243 [0] = { 255 [0] = {
@@ -264,6 +276,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
264 .caps = MMC_CAP_4_BIT_DATA | 276 .caps = MMC_CAP_4_BIT_DATA |
265 MMC_CAP_8_BIT_DATA | 277 MMC_CAP_8_BIT_DATA |
266 MMC_CAP_NEEDS_POLL, 278 MMC_CAP_NEEDS_POLL,
279 .get_cd = slot_cn7_get_cd,
267}; 280};
268 281
269static struct platform_device sh_mmcif_device = { 282static struct platform_device sh_mmcif_device = {
@@ -313,6 +326,8 @@ static struct sh_mobile_sdhi_info sdhi1_info = {
313 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 326 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
314 .tmio_ocr_mask = MMC_VDD_165_195, 327 .tmio_ocr_mask = MMC_VDD_165_195,
315 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, 328 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
329 .tmio_caps = MMC_CAP_NEEDS_POLL,
330 .get_cd = slot_cn7_get_cd,
316}; 331};
317 332
318static struct resource sdhi1_resources[] = { 333static struct resource sdhi1_resources[] = {
@@ -1060,6 +1075,10 @@ static void __init ap4evb_init(void)
1060 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ 1075 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1061 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ 1076 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1062 1077
1078 /* card detect pin for MMC slot (CN7) */
1079 gpio_request(GPIO_PORT41, NULL);
1080 gpio_direction_input(GPIO_PORT41);
1081
1063 /* set SPU2 clock to 119.6 MHz */ 1082 /* set SPU2 clock to 119.6 MHz */
1064 clk = clk_get(NULL, "spu_clk"); 1083 clk = clk_get(NULL, "spu_clk");
1065 if (!IS_ERR(clk)) { 1084 if (!IS_ERR(clk)) {
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 2f420210d406..9057d6fd1d31 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -28,7 +28,6 @@
28#include <linux/cnt32_to_63.h> 28#include <linux/cnt32_to_63.h>
29 29
30#include <asm/mach/time.h> 30#include <asm/mach/time.h>
31#include <asm/mach/time.h>
32#include <asm/localtimer.h> 31#include <asm/localtimer.h>
33 32
34#include <mach/iomap.h> 33#include <mach/iomap.h>
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index cbbe69a76a7c..4a94be3304b9 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -208,35 +208,25 @@ static struct resource dma40_resources[] = {
208 208
209/* Default configuration for physcial memcpy */ 209/* Default configuration for physcial memcpy */
210struct stedma40_chan_cfg dma40_memcpy_conf_phy = { 210struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
211 .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE | 211 .mode = STEDMA40_MODE_PHYSICAL,
212 STEDMA40_LOW_PRIORITY_CHANNEL |
213 STEDMA40_PCHAN_BASIC_MODE),
214 .dir = STEDMA40_MEM_TO_MEM, 212 .dir = STEDMA40_MEM_TO_MEM,
215 213
216 .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
217 .src_info.data_width = STEDMA40_BYTE_WIDTH, 214 .src_info.data_width = STEDMA40_BYTE_WIDTH,
218 .src_info.psize = STEDMA40_PSIZE_PHY_1, 215 .src_info.psize = STEDMA40_PSIZE_PHY_1,
219 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 216 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
220 217
221 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
222 .dst_info.data_width = STEDMA40_BYTE_WIDTH, 218 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
223 .dst_info.psize = STEDMA40_PSIZE_PHY_1, 219 .dst_info.psize = STEDMA40_PSIZE_PHY_1,
224 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 220 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
225}; 221};
226/* Default configuration for logical memcpy */ 222/* Default configuration for logical memcpy */
227struct stedma40_chan_cfg dma40_memcpy_conf_log = { 223struct stedma40_chan_cfg dma40_memcpy_conf_log = {
228 .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
229 STEDMA40_LOW_PRIORITY_CHANNEL |
230 STEDMA40_LCHAN_SRC_LOG_DST_LOG |
231 STEDMA40_NO_TIM_FOR_LINK),
232 .dir = STEDMA40_MEM_TO_MEM, 224 .dir = STEDMA40_MEM_TO_MEM,
233 225
234 .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
235 .src_info.data_width = STEDMA40_BYTE_WIDTH, 226 .src_info.data_width = STEDMA40_BYTE_WIDTH,
236 .src_info.psize = STEDMA40_PSIZE_LOG_1, 227 .src_info.psize = STEDMA40_PSIZE_LOG_1,
237 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 228 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
238 229
239 .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
240 .dst_info.data_width = STEDMA40_BYTE_WIDTH, 230 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
241 .dst_info.psize = STEDMA40_PSIZE_LOG_1, 231 .dst_info.psize = STEDMA40_PSIZE_LOG_1,
242 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, 232 .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
@@ -269,7 +259,6 @@ static struct stedma40_platform_data dma40_plat_data = {
269 .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), 259 .memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
270 .memcpy_conf_phy = &dma40_memcpy_conf_phy, 260 .memcpy_conf_phy = &dma40_memcpy_conf_phy,
271 .memcpy_conf_log = &dma40_memcpy_conf_log, 261 .memcpy_conf_log = &dma40_memcpy_conf_log,
272 .llis_per_log = 8,
273 .disabled_channels = {-1}, 262 .disabled_channels = {-1},
274}; 263};
275 264
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index c00f119babbf..c435fd9e1da9 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -89,7 +89,7 @@ void __kunmap_atomic(void *kvaddr)
89 int idx, type; 89 int idx, type;
90 90
91 if (kvaddr >= (void *)FIXADDR_START) { 91 if (kvaddr >= (void *)FIXADDR_START) {
92 type = kmap_atomic_idx_pop(); 92 type = kmap_atomic_idx();
93 idx = type + KM_TYPE_NR * smp_processor_id(); 93 idx = type + KM_TYPE_NR * smp_processor_id();
94 94
95 if (cache_is_vivt()) 95 if (cache_is_vivt())
@@ -101,6 +101,7 @@ void __kunmap_atomic(void *kvaddr)
101#else 101#else
102 (void) idx; /* to kill a warning */ 102 (void) idx; /* to kill a warning */
103#endif 103#endif
104 kmap_atomic_idx_pop();
104 } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { 105 } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) {
105 /* this address was obtained through kmap_high_get() */ 106 /* this address was obtained through kmap_high_get() */
106 kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); 107 kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)]));
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h
new file mode 100644
index 000000000000..ef7751546f5f
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/dma.h
@@ -0,0 +1,67 @@
1/*
2 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_ARCH_MXC_DMA_H__
10#define __ASM_ARCH_MXC_DMA_H__
11
12#include <linux/scatterlist.h>
13#include <linux/device.h>
14#include <linux/dmaengine.h>
15
16/*
17 * This enumerates peripheral types. Used for SDMA.
18 */
19enum sdma_peripheral_type {
20 IMX_DMATYPE_SSI, /* MCU domain SSI */
21 IMX_DMATYPE_SSI_SP, /* Shared SSI */
22 IMX_DMATYPE_MMC, /* MMC */
23 IMX_DMATYPE_SDHC, /* SDHC */
24 IMX_DMATYPE_UART, /* MCU domain UART */
25 IMX_DMATYPE_UART_SP, /* Shared UART */
26 IMX_DMATYPE_FIRI, /* FIRI */
27 IMX_DMATYPE_CSPI, /* MCU domain CSPI */
28 IMX_DMATYPE_CSPI_SP, /* Shared CSPI */
29 IMX_DMATYPE_SIM, /* SIM */
30 IMX_DMATYPE_ATA, /* ATA */
31 IMX_DMATYPE_CCM, /* CCM */
32 IMX_DMATYPE_EXT, /* External peripheral */
33 IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */
34 IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */
35 IMX_DMATYPE_DSP, /* DSP */
36 IMX_DMATYPE_MEMORY, /* Memory */
37 IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */
38 IMX_DMATYPE_SPDIF, /* SPDIF */
39 IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */
40 IMX_DMATYPE_ASRC, /* ASRC */
41 IMX_DMATYPE_ESAI, /* ESAI */
42};
43
44enum imx_dma_prio {
45 DMA_PRIO_HIGH = 0,
46 DMA_PRIO_MEDIUM = 1,
47 DMA_PRIO_LOW = 2
48};
49
50struct imx_dma_data {
51 int dma_request; /* DMA request line */
52 enum sdma_peripheral_type peripheral_type;
53 int priority;
54};
55
56static inline int imx_dma_is_ipu(struct dma_chan *chan)
57{
58 return !strcmp(dev_name(chan->device->dev), "ipu-core");
59}
60
61static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
62{
63 return !strcmp(dev_name(chan->device->dev), "imx-sdma") ||
64 !strcmp(dev_name(chan->device->dev), "imx-dma");
65}
66
67#endif
diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h
new file mode 100644
index 000000000000..9be112227ac4
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/sdma.h
@@ -0,0 +1,17 @@
1#ifndef __MACH_MXC_SDMA_H__
2#define __MACH_MXC_SDMA_H__
3
4/**
5 * struct sdma_platform_data - platform specific data for SDMA engine
6 *
7 * @sdma_version The version of this SDMA engine
8 * @cpu_name used to generate the firmware name
9 * @to_version CPU Tape out version
10 */
11struct sdma_platform_data {
12 int sdma_version;
13 char *cpu_name;
14 int to_version;
15};
16
17#endif /* __MACH_MXC_SDMA_H__ */
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index 5fbde4b8dc12..74b62f10d07f 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -1,10 +1,8 @@
1/* 1/*
2 * arch/arm/plat-nomadik/include/plat/ste_dma40.h 2 * Copyright (C) ST-Ericsson SA 2007-2010
3 * 3 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
4 * Copyright (C) ST-Ericsson 2007-2010 4 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2 5 * License terms: GNU General Public License (GPL) version 2
6 * Author: Per Friden <per.friden@stericsson.com>
7 * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
8 */ 6 */
9 7
10 8
@@ -14,43 +12,25 @@
14#include <linux/dmaengine.h> 12#include <linux/dmaengine.h>
15#include <linux/workqueue.h> 13#include <linux/workqueue.h>
16#include <linux/interrupt.h> 14#include <linux/interrupt.h>
17#include <linux/dmaengine.h>
18 15
19/* dev types for memcpy */ 16/* dev types for memcpy */
20#define STEDMA40_DEV_DST_MEMORY (-1) 17#define STEDMA40_DEV_DST_MEMORY (-1)
21#define STEDMA40_DEV_SRC_MEMORY (-1) 18#define STEDMA40_DEV_SRC_MEMORY (-1)
22 19
23/* 20enum stedma40_mode {
24 * Description of bitfields of channel_type variable is available in 21 STEDMA40_MODE_LOGICAL = 0,
25 * the info structure. 22 STEDMA40_MODE_PHYSICAL,
26 */ 23 STEDMA40_MODE_OPERATION,
24};
27 25
28/* Priority */ 26enum stedma40_mode_opt {
29#define STEDMA40_INFO_PRIO_TYPE_POS 2 27 STEDMA40_PCHAN_BASIC_MODE = 0,
30#define STEDMA40_HIGH_PRIORITY_CHANNEL (0x1 << STEDMA40_INFO_PRIO_TYPE_POS) 28 STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
31#define STEDMA40_LOW_PRIORITY_CHANNEL (0x2 << STEDMA40_INFO_PRIO_TYPE_POS) 29 STEDMA40_PCHAN_MODULO_MODE,
32 30 STEDMA40_PCHAN_DOUBLE_DST_MODE,
33/* Mode */ 31 STEDMA40_LCHAN_SRC_PHY_DST_LOG,
34#define STEDMA40_INFO_CH_MODE_TYPE_POS 6 32 STEDMA40_LCHAN_SRC_LOG_DST_PHY,
35#define STEDMA40_CHANNEL_IN_PHY_MODE (0x1 << STEDMA40_INFO_CH_MODE_TYPE_POS) 33};
36#define STEDMA40_CHANNEL_IN_LOG_MODE (0x2 << STEDMA40_INFO_CH_MODE_TYPE_POS)
37#define STEDMA40_CHANNEL_IN_OPER_MODE (0x3 << STEDMA40_INFO_CH_MODE_TYPE_POS)
38
39/* Mode options */
40#define STEDMA40_INFO_CH_MODE_OPT_POS 8
41#define STEDMA40_PCHAN_BASIC_MODE (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS)
42#define STEDMA40_PCHAN_MODULO_MODE (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS)
43#define STEDMA40_PCHAN_DOUBLE_DST_MODE (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS)
44#define STEDMA40_LCHAN_SRC_PHY_DST_LOG (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS)
45#define STEDMA40_LCHAN_SRC_LOG_DST_PHS (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS)
46#define STEDMA40_LCHAN_SRC_LOG_DST_LOG (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS)
47
48/* Interrupt */
49#define STEDMA40_INFO_TIM_POS 10
50#define STEDMA40_NO_TIM_FOR_LINK (0x0 << STEDMA40_INFO_TIM_POS)
51#define STEDMA40_TIM_FOR_LINK (0x1 << STEDMA40_INFO_TIM_POS)
52
53/* End of channel_type configuration */
54 34
55#define STEDMA40_ESIZE_8_BIT 0x0 35#define STEDMA40_ESIZE_8_BIT 0x0
56#define STEDMA40_ESIZE_16_BIT 0x1 36#define STEDMA40_ESIZE_16_BIT 0x1
@@ -73,16 +53,14 @@
73#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 53#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
74#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 54#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
75 55
56/* Maximum number of possible physical channels */
57#define STEDMA40_MAX_PHYS 32
58
76enum stedma40_flow_ctrl { 59enum stedma40_flow_ctrl {
77 STEDMA40_NO_FLOW_CTRL, 60 STEDMA40_NO_FLOW_CTRL,
78 STEDMA40_FLOW_CTRL, 61 STEDMA40_FLOW_CTRL,
79}; 62};
80 63
81enum stedma40_endianess {
82 STEDMA40_LITTLE_ENDIAN,
83 STEDMA40_BIG_ENDIAN
84};
85
86enum stedma40_periph_data_width { 64enum stedma40_periph_data_width {
87 STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT, 65 STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
88 STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT, 66 STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
@@ -90,15 +68,8 @@ enum stedma40_periph_data_width {
90 STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT 68 STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
91}; 69};
92 70
93struct stedma40_half_channel_info {
94 enum stedma40_endianess endianess;
95 enum stedma40_periph_data_width data_width;
96 int psize;
97 enum stedma40_flow_ctrl flow_ctrl;
98};
99
100enum stedma40_xfer_dir { 71enum stedma40_xfer_dir {
101 STEDMA40_MEM_TO_MEM, 72 STEDMA40_MEM_TO_MEM = 1,
102 STEDMA40_MEM_TO_PERIPH, 73 STEDMA40_MEM_TO_PERIPH,
103 STEDMA40_PERIPH_TO_MEM, 74 STEDMA40_PERIPH_TO_MEM,
104 STEDMA40_PERIPH_TO_PERIPH 75 STEDMA40_PERIPH_TO_PERIPH
@@ -106,18 +77,31 @@ enum stedma40_xfer_dir {
106 77
107 78
108/** 79/**
80 * struct stedma40_chan_cfg - dst/src channel configuration
81 *
82 * @big_endian: true if the src/dst should be read as big endian
83 * @data_width: Data width of the src/dst hardware
84 * @p_size: Burst size
85 * @flow_ctrl: Flow control on/off.
86 */
87struct stedma40_half_channel_info {
88 bool big_endian;
89 enum stedma40_periph_data_width data_width;
90 int psize;
91 enum stedma40_flow_ctrl flow_ctrl;
92};
93
94/**
109 * struct stedma40_chan_cfg - Structure to be filled by client drivers. 95 * struct stedma40_chan_cfg - Structure to be filled by client drivers.
110 * 96 *
111 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH 97 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
112 * @channel_type: priority, mode, mode options and interrupt configuration. 98 * @high_priority: true if high-priority
99 * @mode: channel mode: physical, logical, or operation
100 * @mode_opt: options for the chosen channel mode
113 * @src_dev_type: Src device type 101 * @src_dev_type: Src device type
114 * @dst_dev_type: Dst device type 102 * @dst_dev_type: Dst device type
115 * @src_info: Parameters for dst half channel 103 * @src_info: Parameters for dst half channel
116 * @dst_info: Parameters for dst half channel 104 * @dst_info: Parameters for dst half channel
117 * @pre_transfer_data: Data to be passed on to the pre_transfer() function.
118 * @pre_transfer: Callback used if needed before preparation of transfer.
119 * Only called if device is set. size of bytes to transfer
120 * (in case of multiple element transfer size is size of the first element).
121 * 105 *
122 * 106 *
123 * This structure has to be filled by the client drivers. 107 * This structure has to be filled by the client drivers.
@@ -126,15 +110,13 @@ enum stedma40_xfer_dir {
126 */ 110 */
127struct stedma40_chan_cfg { 111struct stedma40_chan_cfg {
128 enum stedma40_xfer_dir dir; 112 enum stedma40_xfer_dir dir;
129 unsigned int channel_type; 113 bool high_priority;
114 enum stedma40_mode mode;
115 enum stedma40_mode_opt mode_opt;
130 int src_dev_type; 116 int src_dev_type;
131 int dst_dev_type; 117 int dst_dev_type;
132 struct stedma40_half_channel_info src_info; 118 struct stedma40_half_channel_info src_info;
133 struct stedma40_half_channel_info dst_info; 119 struct stedma40_half_channel_info dst_info;
134 void *pre_transfer_data;
135 int (*pre_transfer) (struct dma_chan *chan,
136 void *data,
137 int size);
138}; 120};
139 121
140/** 122/**
@@ -147,7 +129,6 @@ struct stedma40_chan_cfg {
147 * @memcpy_len: length of memcpy 129 * @memcpy_len: length of memcpy
148 * @memcpy_conf_phy: default configuration of physical channel memcpy 130 * @memcpy_conf_phy: default configuration of physical channel memcpy
149 * @memcpy_conf_log: default configuration of logical channel memcpy 131 * @memcpy_conf_log: default configuration of logical channel memcpy
150 * @llis_per_log: number of max linked list items per logical channel
151 * @disabled_channels: A vector, ending with -1, that marks physical channels 132 * @disabled_channels: A vector, ending with -1, that marks physical channels
152 * that are for different reasons not available for the driver. 133 * that are for different reasons not available for the driver.
153 */ 134 */
@@ -159,23 +140,10 @@ struct stedma40_platform_data {
159 u32 memcpy_len; 140 u32 memcpy_len;
160 struct stedma40_chan_cfg *memcpy_conf_phy; 141 struct stedma40_chan_cfg *memcpy_conf_phy;
161 struct stedma40_chan_cfg *memcpy_conf_log; 142 struct stedma40_chan_cfg *memcpy_conf_log;
162 unsigned int llis_per_log; 143 int disabled_channels[STEDMA40_MAX_PHYS];
163 int disabled_channels[8];
164}; 144};
165 145
166/** 146#ifdef CONFIG_STE_DMA40
167 * setdma40_set_psize() - Used for changing the package size of an
168 * already configured dma channel.
169 *
170 * @chan: dmaengine handle
171 * @src_psize: new package side for src. (STEDMA40_PSIZE*)
172 * @src_psize: new package side for dst. (STEDMA40_PSIZE*)
173 *
174 * returns 0 on ok, otherwise negative error number.
175 */
176int stedma40_set_psize(struct dma_chan *chan,
177 int src_psize,
178 int dst_psize);
179 147
180/** 148/**
181 * stedma40_filter() - Provides stedma40_chan_cfg to the 149 * stedma40_filter() - Provides stedma40_chan_cfg to the
@@ -238,4 +206,21 @@ dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
238 direction, flags); 206 direction, flags);
239} 207}
240 208
209#else
210static inline bool stedma40_filter(struct dma_chan *chan, void *data)
211{
212 return false;
213}
214
215static inline struct
216dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
217 dma_addr_t addr,
218 unsigned int size,
219 enum dma_data_direction direction,
220 unsigned long flags)
221{
222 return NULL;
223}
224#endif
225
241#endif 226#endif
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 221a675ebbae..f04731820301 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -19,6 +19,7 @@
19#include <plat/common.h> 19#include <plat/common.h>
20#include <plat/board.h> 20#include <plat/board.h>
21#include <plat/vram.h> 21#include <plat/vram.h>
22#include <plat/dsp.h>
22 23
23 24
24#define NO_LENGTH_CHECK 0xffffffff 25#define NO_LENGTH_CHECK 0xffffffff
@@ -64,4 +65,5 @@ void __init omap_reserve(void)
64{ 65{
65 omapfb_reserve_sdram_memblock(); 66 omapfb_reserve_sdram_memblock();
66 omap_vram_reserve_sdram_memblock(); 67 omap_vram_reserve_sdram_memblock();
68 omap_dsp_reserve_sdram_memblock();
67} 69}
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 1e2383eae638..6f42a18b8aa4 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -15,6 +15,7 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/memblock.h>
18 19
19#include <mach/hardware.h> 20#include <mach/hardware.h>
20#include <asm/mach-types.h> 21#include <asm/mach-types.h>
@@ -231,6 +232,75 @@ static void omap_init_uwire(void)
231static inline void omap_init_uwire(void) {} 232static inline void omap_init_uwire(void) {}
232#endif 233#endif
233 234
235/*-------------------------------------------------------------------------*/
236
237#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
238
239static struct resource wdt_resources[] = {
240 {
241 .flags = IORESOURCE_MEM,
242 },
243};
244
245static struct platform_device omap_wdt_device = {
246 .name = "omap_wdt",
247 .id = -1,
248 .num_resources = ARRAY_SIZE(wdt_resources),
249 .resource = wdt_resources,
250};
251
252static void omap_init_wdt(void)
253{
254 if (cpu_is_omap16xx())
255 wdt_resources[0].start = 0xfffeb000;
256 else if (cpu_is_omap2420())
257 wdt_resources[0].start = 0x48022000; /* WDT2 */
258 else if (cpu_is_omap2430())
259 wdt_resources[0].start = 0x49016000; /* WDT2 */
260 else if (cpu_is_omap343x())
261 wdt_resources[0].start = 0x48314000; /* WDT2 */
262 else if (cpu_is_omap44xx())
263 wdt_resources[0].start = 0x4a314000;
264 else
265 return;
266
267 wdt_resources[0].end = wdt_resources[0].start + 0x4f;
268
269 (void) platform_device_register(&omap_wdt_device);
270}
271#else
272static inline void omap_init_wdt(void) {}
273#endif
274
275#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
276
277static phys_addr_t omap_dsp_phys_mempool_base;
278
279void __init omap_dsp_reserve_sdram_memblock(void)
280{
281 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
282 phys_addr_t paddr;
283
284 if (!size)
285 return;
286
287 paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT);
288 if (!paddr) {
289 pr_err("%s: failed to reserve %x bytes\n",
290 __func__, size);
291 return;
292 }
293
294 omap_dsp_phys_mempool_base = paddr;
295}
296
297phys_addr_t omap_dsp_get_mempool_base(void)
298{
299 return omap_dsp_phys_mempool_base;
300}
301EXPORT_SYMBOL(omap_dsp_get_mempool_base);
302#endif
303
234/* 304/*
235 * This gets called after board-specific INIT_MACHINE, and initializes most 305 * This gets called after board-specific INIT_MACHINE, and initializes most
236 * on-chip peripherals accessible on this board (except for few like USB): 306 * on-chip peripherals accessible on this board (except for few like USB):
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h
new file mode 100644
index 000000000000..9c604b390f9f
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/dsp.h
@@ -0,0 +1,31 @@
1#ifndef __OMAP_DSP_H__
2#define __OMAP_DSP_H__
3
4#include <linux/types.h>
5
6struct omap_dsp_platform_data {
7 void (*dsp_set_min_opp) (u8 opp_id);
8 u8 (*dsp_get_opp) (void);
9 void (*cpu_set_freq) (unsigned long f);
10 unsigned long (*cpu_get_freq) (void);
11 unsigned long mpu_speed[6];
12
13 /* functions to write and read PRCM registers */
14 void (*dsp_prm_write)(u32, s16 , u16);
15 u32 (*dsp_prm_read)(s16 , u16);
16 u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
17 void (*dsp_cm_write)(u32, s16 , u16);
18 u32 (*dsp_cm_read)(s16 , u16);
19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
20
21 phys_addr_t phys_mempool_base;
22 phys_addr_t phys_mempool_size;
23};
24
25#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
26extern void omap_dsp_reserve_sdram_memblock(void);
27#else
28static inline void omap_dsp_reserve_sdram_memblock(void) { }
29#endif
30
31#endif
diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h
new file mode 100644
index 000000000000..e49c5b6fc4e2
--- /dev/null
+++ b/arch/arm/plat-pxa/include/plat/sdhci.h
@@ -0,0 +1,32 @@
1/* linux/arch/arm/plat-pxa/include/plat/sdhci.h
2 *
3 * Copyright 2010 Marvell
4 * Zhangfei Gao <zhangfei.gao@marvell.com>
5 *
6 * PXA Platform - SDHCI platform data definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_PXA_SDHCI_H
14#define __PLAT_PXA_SDHCI_H
15
16/* pxa specific flag */
17/* Require clock free running */
18#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0)
19
20/*
21 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
22 * @max_speed: the maximum speed supported
23 * @quirks: quirks of specific device
24 * @flags: flags for platform requirement
25 */
26struct sdhci_pxa_platdata {
27 unsigned int max_speed;
28 unsigned int quirks;
29 unsigned int flags;
30};
31
32#endif /* __PLAT_PXA_SDHCI_H */
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 984bf66826d2..5a27b1b538f2 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -69,6 +69,7 @@ config S3C24XX_GPIO_EXTRA
69 int 69 int
70 default 128 if S3C24XX_GPIO_EXTRA128 70 default 128 if S3C24XX_GPIO_EXTRA128
71 default 64 if S3C24XX_GPIO_EXTRA64 71 default 64 if S3C24XX_GPIO_EXTRA64
72 default 16 if ARCH_H1940
72 default 0 73 default 0
73 74
74config S3C24XX_GPIO_EXTRA64 75config S3C24XX_GPIO_EXTRA64
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 243b6411050d..24c6f5a30596 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -82,6 +82,8 @@ static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { 82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
83 .set_config = s3c_gpio_setcfg_s3c24xx, 83 .set_config = s3c_gpio_setcfg_s3c24xx,
84 .get_config = s3c_gpio_getcfg_s3c24xx, 84 .get_config = s3c_gpio_getcfg_s3c24xx,
85 .set_pull = s3c_gpio_setpull_1up,
86 .get_pull = s3c_gpio_getpull_1up,
85}; 87};
86 88
87struct s3c_gpio_chip s3c24xx_gpios[] = { 89struct s3c_gpio_chip s3c24xx_gpios[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 10:18:55 -0500