diff options
Diffstat (limited to 'arch/arm')
181 files changed, 4219 insertions, 3624 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9124ff75fe53..7980873525b2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -11,6 +11,7 @@ config ARM | |||
11 | select RTC_LIB | 11 | select RTC_LIB |
12 | select SYS_SUPPORTS_APM_EMULATION | 12 | select SYS_SUPPORTS_APM_EMULATION |
13 | select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) | 13 | select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) |
14 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE | ||
14 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) | 15 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
15 | select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL | 16 | select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL |
16 | select HAVE_ARCH_KGDB | 17 | select HAVE_ARCH_KGDB |
@@ -38,6 +39,7 @@ config ARM | |||
38 | select GENERIC_IRQ_PROBE | 39 | select GENERIC_IRQ_PROBE |
39 | select GENERIC_IRQ_SHOW | 40 | select GENERIC_IRQ_SHOW |
40 | select GENERIC_IRQ_PROBE | 41 | select GENERIC_IRQ_PROBE |
42 | select ARCH_WANT_IPC_PARSE_VERSION | ||
41 | select HARDIRQS_SW_RESEND | 43 | select HARDIRQS_SW_RESEND |
42 | select CPU_PM if (SUSPEND || CPU_IDLE) | 44 | select CPU_PM if (SUSPEND || CPU_IDLE) |
43 | select GENERIC_PCI_IOMAP | 45 | select GENERIC_PCI_IOMAP |
@@ -45,6 +47,9 @@ config ARM | |||
45 | select GENERIC_SMP_IDLE_THREAD | 47 | select GENERIC_SMP_IDLE_THREAD |
46 | select KTIME_SCALAR | 48 | select KTIME_SCALAR |
47 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP | 49 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
50 | select GENERIC_STRNCPY_FROM_USER | ||
51 | select GENERIC_STRNLEN_USER | ||
52 | select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN | ||
48 | help | 53 | help |
49 | The ARM series is a line of low-power-consumption RISC chip designs | 54 | The ARM series is a line of low-power-consumption RISC chip designs |
50 | licensed by ARM Ltd and targeted at embedded applications and | 55 | licensed by ARM Ltd and targeted at embedded applications and |
@@ -1006,7 +1011,6 @@ config ARCH_VT8500 | |||
1006 | select ARCH_HAS_CPUFREQ | 1011 | select ARCH_HAS_CPUFREQ |
1007 | select GENERIC_CLOCKEVENTS | 1012 | select GENERIC_CLOCKEVENTS |
1008 | select ARCH_REQUIRE_GPIOLIB | 1013 | select ARCH_REQUIRE_GPIOLIB |
1009 | select HAVE_PWM | ||
1010 | help | 1014 | help |
1011 | Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. | 1015 | Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. |
1012 | 1016 | ||
@@ -2004,6 +2008,25 @@ config ARM_ATAG_DTB_COMPAT | |||
2004 | bootloaders, this option allows zImage to extract the information | 2008 | bootloaders, this option allows zImage to extract the information |
2005 | from the ATAG list and store it at run time into the appended DTB. | 2009 | from the ATAG list and store it at run time into the appended DTB. |
2006 | 2010 | ||
2011 | choice | ||
2012 | prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT | ||
2013 | default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER | ||
2014 | |||
2015 | config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER | ||
2016 | bool "Use bootloader kernel arguments if available" | ||
2017 | help | ||
2018 | Uses the command-line options passed by the boot loader instead of | ||
2019 | the device tree bootargs property. If the boot loader doesn't provide | ||
2020 | any, the device tree bootargs property will be used. | ||
2021 | |||
2022 | config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND | ||
2023 | bool "Extend with bootloader kernel arguments" | ||
2024 | help | ||
2025 | The command-line arguments provided by the boot loader will be | ||
2026 | appended to the the device tree bootargs property. | ||
2027 | |||
2028 | endchoice | ||
2029 | |||
2007 | config CMDLINE | 2030 | config CMDLINE |
2008 | string "Default kernel command string" | 2031 | string "Default kernel command string" |
2009 | default "" | 2032 | default "" |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index a03b5a7059e2..f15f82bf3a50 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -395,4 +395,13 @@ config ARM_KPROBES_TEST | |||
395 | help | 395 | help |
396 | Perform tests of kprobes API and instruction set simulation. | 396 | Perform tests of kprobes API and instruction set simulation. |
397 | 397 | ||
398 | config PID_IN_CONTEXTIDR | ||
399 | bool "Write the current PID to the CONTEXTIDR register" | ||
400 | depends on CPU_COPY_V6 | ||
401 | help | ||
402 | Enabling this option causes the kernel to write the current PID to | ||
403 | the PROCID field of the CONTEXTIDR register, at the expense of some | ||
404 | additional instructions during context switch. Say Y here only if you | ||
405 | are planning to use hardware trace tools with this kernel. | ||
406 | |||
398 | endmenu | 407 | endmenu |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4d6d31115cf2..30eae87ead6d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -10,6 +10,9 @@ | |||
10 | # | 10 | # |
11 | # Copyright (C) 1995-2001 by Russell King | 11 | # Copyright (C) 1995-2001 by Russell King |
12 | 12 | ||
13 | # Ensure linker flags are correct | ||
14 | LDFLAGS := | ||
15 | |||
13 | LDFLAGS_vmlinux :=-p --no-undefined -X | 16 | LDFLAGS_vmlinux :=-p --no-undefined -X |
14 | ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) | 17 | ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) |
15 | LDFLAGS_vmlinux += --be8 | 18 | LDFLAGS_vmlinux += --be8 |
diff --git a/arch/arm/boot/compressed/atags_to_fdt.c b/arch/arm/boot/compressed/atags_to_fdt.c index 797f04bedb47..aabc02a68482 100644 --- a/arch/arm/boot/compressed/atags_to_fdt.c +++ b/arch/arm/boot/compressed/atags_to_fdt.c | |||
@@ -1,6 +1,12 @@ | |||
1 | #include <asm/setup.h> | 1 | #include <asm/setup.h> |
2 | #include <libfdt.h> | 2 | #include <libfdt.h> |
3 | 3 | ||
4 | #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) | ||
5 | #define do_extend_cmdline 1 | ||
6 | #else | ||
7 | #define do_extend_cmdline 0 | ||
8 | #endif | ||
9 | |||
4 | static int node_offset(void *fdt, const char *node_path) | 10 | static int node_offset(void *fdt, const char *node_path) |
5 | { | 11 | { |
6 | int offset = fdt_path_offset(fdt, node_path); | 12 | int offset = fdt_path_offset(fdt, node_path); |
@@ -36,6 +42,48 @@ static int setprop_cell(void *fdt, const char *node_path, | |||
36 | return fdt_setprop_cell(fdt, offset, property, val); | 42 | return fdt_setprop_cell(fdt, offset, property, val); |
37 | } | 43 | } |
38 | 44 | ||
45 | static const void *getprop(const void *fdt, const char *node_path, | ||
46 | const char *property, int *len) | ||
47 | { | ||
48 | int offset = fdt_path_offset(fdt, node_path); | ||
49 | |||
50 | if (offset == -FDT_ERR_NOTFOUND) | ||
51 | return NULL; | ||
52 | |||
53 | return fdt_getprop(fdt, offset, property, len); | ||
54 | } | ||
55 | |||
56 | static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) | ||
57 | { | ||
58 | char cmdline[COMMAND_LINE_SIZE]; | ||
59 | const char *fdt_bootargs; | ||
60 | char *ptr = cmdline; | ||
61 | int len = 0; | ||
62 | |||
63 | /* copy the fdt command line into the buffer */ | ||
64 | fdt_bootargs = getprop(fdt, "/chosen", "bootargs", &len); | ||
65 | if (fdt_bootargs) | ||
66 | if (len < COMMAND_LINE_SIZE) { | ||
67 | memcpy(ptr, fdt_bootargs, len); | ||
68 | /* len is the length of the string | ||
69 | * including the NULL terminator */ | ||
70 | ptr += len - 1; | ||
71 | } | ||
72 | |||
73 | /* and append the ATAG_CMDLINE */ | ||
74 | if (fdt_cmdline) { | ||
75 | len = strlen(fdt_cmdline); | ||
76 | if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { | ||
77 | *ptr++ = ' '; | ||
78 | memcpy(ptr, fdt_cmdline, len); | ||
79 | ptr += len; | ||
80 | } | ||
81 | } | ||
82 | *ptr = '\0'; | ||
83 | |||
84 | setprop_string(fdt, "/chosen", "bootargs", cmdline); | ||
85 | } | ||
86 | |||
39 | /* | 87 | /* |
40 | * Convert and fold provided ATAGs into the provided FDT. | 88 | * Convert and fold provided ATAGs into the provided FDT. |
41 | * | 89 | * |
@@ -72,8 +120,18 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space) | |||
72 | 120 | ||
73 | for_each_tag(atag, atag_list) { | 121 | for_each_tag(atag, atag_list) { |
74 | if (atag->hdr.tag == ATAG_CMDLINE) { | 122 | if (atag->hdr.tag == ATAG_CMDLINE) { |
75 | setprop_string(fdt, "/chosen", "bootargs", | 123 | /* Append the ATAGS command line to the device tree |
76 | atag->u.cmdline.cmdline); | 124 | * command line. |
125 | * NB: This means that if the same parameter is set in | ||
126 | * the device tree and in the tags, the one from the | ||
127 | * tags will be chosen. | ||
128 | */ | ||
129 | if (do_extend_cmdline) | ||
130 | merge_fdt_bootargs(fdt, | ||
131 | atag->u.cmdline.cmdline); | ||
132 | else | ||
133 | setprop_string(fdt, "/chosen", "bootargs", | ||
134 | atag->u.cmdline.cmdline); | ||
77 | } else if (atag->hdr.tag == ATAG_MEM) { | 135 | } else if (atag->hdr.tag == ATAG_MEM) { |
78 | if (memcount >= sizeof(mem_reg_property)/4) | 136 | if (memcount >= sizeof(mem_reg_property)/4) |
79 | continue; | 137 | continue; |
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 2e1cfa00c25b..9fecf1ae777b 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts | |||
@@ -130,6 +130,12 @@ | |||
130 | clocks = <&eclk>; | 130 | clocks = <&eclk>; |
131 | }; | 131 | }; |
132 | 132 | ||
133 | memory-controller@fff00000 { | ||
134 | compatible = "calxeda,hb-ddr-ctrl"; | ||
135 | reg = <0xfff00000 0x1000>; | ||
136 | interrupts = <0 91 4>; | ||
137 | }; | ||
138 | |||
133 | ipc@fff20000 { | 139 | ipc@fff20000 { |
134 | compatible = "arm,pl320", "arm,primecell"; | 140 | compatible = "arm,pl320", "arm,primecell"; |
135 | reg = <0xfff20000 0x1000>; | 141 | reg = <0xfff20000 0x1000>; |
@@ -275,6 +281,12 @@ | |||
275 | }; | 281 | }; |
276 | }; | 282 | }; |
277 | 283 | ||
284 | sregs@fff3c200 { | ||
285 | compatible = "calxeda,hb-sregs-l2-ecc"; | ||
286 | reg = <0xfff3c200 0x100>; | ||
287 | interrupts = <0 71 4 0 72 4>; | ||
288 | }; | ||
289 | |||
278 | dma@fff3d000 { | 290 | dma@fff3d000 { |
279 | compatible = "arm,pl330", "arm,primecell"; | 291 | compatible = "arm,pl330", "arm,primecell"; |
280 | reg = <0xfff3d000 0x1000>; | 292 | reg = <0xfff3d000 0x1000>; |
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 915db89e3644..787efac68da8 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi | |||
@@ -660,6 +660,7 @@ | |||
660 | compatible = "fsl,imx28-i2c"; | 660 | compatible = "fsl,imx28-i2c"; |
661 | reg = <0x80058000 2000>; | 661 | reg = <0x80058000 2000>; |
662 | interrupts = <111 68>; | 662 | interrupts = <111 68>; |
663 | clock-frequency = <100000>; | ||
663 | status = "disabled"; | 664 | status = "disabled"; |
664 | }; | 665 | }; |
665 | 666 | ||
@@ -669,6 +670,7 @@ | |||
669 | compatible = "fsl,imx28-i2c"; | 670 | compatible = "fsl,imx28-i2c"; |
670 | reg = <0x8005a000 2000>; | 671 | reg = <0x8005a000 2000>; |
671 | interrupts = <110 69>; | 672 | interrupts = <110 69>; |
673 | clock-frequency = <100000>; | ||
672 | status = "disabled"; | 674 | status = "disabled"; |
673 | }; | 675 | }; |
674 | 676 | ||
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 922adefdd291..53cbaa3d4f90 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -127,7 +127,7 @@ | |||
127 | }; | 127 | }; |
128 | 128 | ||
129 | gpio1: gpio@73f84000 { | 129 | gpio1: gpio@73f84000 { |
130 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | 130 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
131 | reg = <0x73f84000 0x4000>; | 131 | reg = <0x73f84000 0x4000>; |
132 | interrupts = <50 51>; | 132 | interrupts = <50 51>; |
133 | gpio-controller; | 133 | gpio-controller; |
@@ -137,7 +137,7 @@ | |||
137 | }; | 137 | }; |
138 | 138 | ||
139 | gpio2: gpio@73f88000 { | 139 | gpio2: gpio@73f88000 { |
140 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | 140 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
141 | reg = <0x73f88000 0x4000>; | 141 | reg = <0x73f88000 0x4000>; |
142 | interrupts = <52 53>; | 142 | interrupts = <52 53>; |
143 | gpio-controller; | 143 | gpio-controller; |
@@ -147,7 +147,7 @@ | |||
147 | }; | 147 | }; |
148 | 148 | ||
149 | gpio3: gpio@73f8c000 { | 149 | gpio3: gpio@73f8c000 { |
150 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | 150 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
151 | reg = <0x73f8c000 0x4000>; | 151 | reg = <0x73f8c000 0x4000>; |
152 | interrupts = <54 55>; | 152 | interrupts = <54 55>; |
153 | gpio-controller; | 153 | gpio-controller; |
@@ -157,7 +157,7 @@ | |||
157 | }; | 157 | }; |
158 | 158 | ||
159 | gpio4: gpio@73f90000 { | 159 | gpio4: gpio@73f90000 { |
160 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | 160 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
161 | reg = <0x73f90000 0x4000>; | 161 | reg = <0x73f90000 0x4000>; |
162 | interrupts = <56 57>; | 162 | interrupts = <56 57>; |
163 | gpio-controller; | 163 | gpio-controller; |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 4e735edc78ed..fc79cdc4b4e6 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -129,7 +129,7 @@ | |||
129 | }; | 129 | }; |
130 | 130 | ||
131 | gpio1: gpio@53f84000 { | 131 | gpio1: gpio@53f84000 { |
132 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 132 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
133 | reg = <0x53f84000 0x4000>; | 133 | reg = <0x53f84000 0x4000>; |
134 | interrupts = <50 51>; | 134 | interrupts = <50 51>; |
135 | gpio-controller; | 135 | gpio-controller; |
@@ -139,7 +139,7 @@ | |||
139 | }; | 139 | }; |
140 | 140 | ||
141 | gpio2: gpio@53f88000 { | 141 | gpio2: gpio@53f88000 { |
142 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 142 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
143 | reg = <0x53f88000 0x4000>; | 143 | reg = <0x53f88000 0x4000>; |
144 | interrupts = <52 53>; | 144 | interrupts = <52 53>; |
145 | gpio-controller; | 145 | gpio-controller; |
@@ -149,7 +149,7 @@ | |||
149 | }; | 149 | }; |
150 | 150 | ||
151 | gpio3: gpio@53f8c000 { | 151 | gpio3: gpio@53f8c000 { |
152 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 152 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
153 | reg = <0x53f8c000 0x4000>; | 153 | reg = <0x53f8c000 0x4000>; |
154 | interrupts = <54 55>; | 154 | interrupts = <54 55>; |
155 | gpio-controller; | 155 | gpio-controller; |
@@ -159,7 +159,7 @@ | |||
159 | }; | 159 | }; |
160 | 160 | ||
161 | gpio4: gpio@53f90000 { | 161 | gpio4: gpio@53f90000 { |
162 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 162 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
163 | reg = <0x53f90000 0x4000>; | 163 | reg = <0x53f90000 0x4000>; |
164 | interrupts = <56 57>; | 164 | interrupts = <56 57>; |
165 | gpio-controller; | 165 | gpio-controller; |
@@ -197,7 +197,7 @@ | |||
197 | }; | 197 | }; |
198 | 198 | ||
199 | gpio5: gpio@53fdc000 { | 199 | gpio5: gpio@53fdc000 { |
200 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 200 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
201 | reg = <0x53fdc000 0x4000>; | 201 | reg = <0x53fdc000 0x4000>; |
202 | interrupts = <103 104>; | 202 | interrupts = <103 104>; |
203 | gpio-controller; | 203 | gpio-controller; |
@@ -207,7 +207,7 @@ | |||
207 | }; | 207 | }; |
208 | 208 | ||
209 | gpio6: gpio@53fe0000 { | 209 | gpio6: gpio@53fe0000 { |
210 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 210 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
211 | reg = <0x53fe0000 0x4000>; | 211 | reg = <0x53fe0000 0x4000>; |
212 | interrupts = <105 106>; | 212 | interrupts = <105 106>; |
213 | gpio-controller; | 213 | gpio-controller; |
@@ -217,7 +217,7 @@ | |||
217 | }; | 217 | }; |
218 | 218 | ||
219 | gpio7: gpio@53fe4000 { | 219 | gpio7: gpio@53fe4000 { |
220 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | 220 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
221 | reg = <0x53fe4000 0x4000>; | 221 | reg = <0x53fe4000 0x4000>; |
222 | interrupts = <107 108>; | 222 | interrupts = <107 108>; |
223 | gpio-controller; | 223 | gpio-controller; |
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index c25d49584814..3d3c64b014e6 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -277,7 +277,7 @@ | |||
277 | }; | 277 | }; |
278 | 278 | ||
279 | gpio1: gpio@0209c000 { | 279 | gpio1: gpio@0209c000 { |
280 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 280 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
281 | reg = <0x0209c000 0x4000>; | 281 | reg = <0x0209c000 0x4000>; |
282 | interrupts = <0 66 0x04 0 67 0x04>; | 282 | interrupts = <0 66 0x04 0 67 0x04>; |
283 | gpio-controller; | 283 | gpio-controller; |
@@ -287,7 +287,7 @@ | |||
287 | }; | 287 | }; |
288 | 288 | ||
289 | gpio2: gpio@020a0000 { | 289 | gpio2: gpio@020a0000 { |
290 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 290 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
291 | reg = <0x020a0000 0x4000>; | 291 | reg = <0x020a0000 0x4000>; |
292 | interrupts = <0 68 0x04 0 69 0x04>; | 292 | interrupts = <0 68 0x04 0 69 0x04>; |
293 | gpio-controller; | 293 | gpio-controller; |
@@ -297,7 +297,7 @@ | |||
297 | }; | 297 | }; |
298 | 298 | ||
299 | gpio3: gpio@020a4000 { | 299 | gpio3: gpio@020a4000 { |
300 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 300 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
301 | reg = <0x020a4000 0x4000>; | 301 | reg = <0x020a4000 0x4000>; |
302 | interrupts = <0 70 0x04 0 71 0x04>; | 302 | interrupts = <0 70 0x04 0 71 0x04>; |
303 | gpio-controller; | 303 | gpio-controller; |
@@ -307,7 +307,7 @@ | |||
307 | }; | 307 | }; |
308 | 308 | ||
309 | gpio4: gpio@020a8000 { | 309 | gpio4: gpio@020a8000 { |
310 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 310 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
311 | reg = <0x020a8000 0x4000>; | 311 | reg = <0x020a8000 0x4000>; |
312 | interrupts = <0 72 0x04 0 73 0x04>; | 312 | interrupts = <0 72 0x04 0 73 0x04>; |
313 | gpio-controller; | 313 | gpio-controller; |
@@ -317,7 +317,7 @@ | |||
317 | }; | 317 | }; |
318 | 318 | ||
319 | gpio5: gpio@020ac000 { | 319 | gpio5: gpio@020ac000 { |
320 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 320 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
321 | reg = <0x020ac000 0x4000>; | 321 | reg = <0x020ac000 0x4000>; |
322 | interrupts = <0 74 0x04 0 75 0x04>; | 322 | interrupts = <0 74 0x04 0 75 0x04>; |
323 | gpio-controller; | 323 | gpio-controller; |
@@ -327,7 +327,7 @@ | |||
327 | }; | 327 | }; |
328 | 328 | ||
329 | gpio6: gpio@020b0000 { | 329 | gpio6: gpio@020b0000 { |
330 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 330 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
331 | reg = <0x020b0000 0x4000>; | 331 | reg = <0x020b0000 0x4000>; |
332 | interrupts = <0 76 0x04 0 77 0x04>; | 332 | interrupts = <0 76 0x04 0 77 0x04>; |
333 | gpio-controller; | 333 | gpio-controller; |
@@ -337,7 +337,7 @@ | |||
337 | }; | 337 | }; |
338 | 338 | ||
339 | gpio7: gpio@020b4000 { | 339 | gpio7: gpio@020b4000 { |
340 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | 340 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
341 | reg = <0x020b4000 0x4000>; | 341 | reg = <0x020b4000 0x4000>; |
342 | interrupts = <0 78 0x04 0 79 0x04>; | 342 | interrupts = <0 78 0x04 0 79 0x04>; |
343 | gpio-controller; | 343 | gpio-controller; |
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi new file mode 100644 index 000000000000..798fa35c0005 --- /dev/null +++ b/arch/arm/boot/dts/r8a7740.dtsi | |||
@@ -0,0 +1,21 @@ | |||
1 | /* | ||
2 | * Device Tree Source for the r8a7740 SoC | ||
3 | * | ||
4 | * Copyright (C) 2012 Renesas Solutions Corp. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /include/ "skeleton.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "renesas,r8a7740"; | ||
15 | |||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | compatible = "arm,cortex-a9"; | ||
19 | }; | ||
20 | }; | ||
21 | }; | ||
diff --git a/arch/arm/boot/dts/sh7377.dtsi b/arch/arm/boot/dts/sh7377.dtsi new file mode 100644 index 000000000000..767ee0796daa --- /dev/null +++ b/arch/arm/boot/dts/sh7377.dtsi | |||
@@ -0,0 +1,21 @@ | |||
1 | /* | ||
2 | * Device Tree Source for the sh7377 SoC | ||
3 | * | ||
4 | * Copyright (C) 2012 Renesas Solutions Corp. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /include/ "skeleton.dtsi" | ||
12 | |||
13 | / { | ||
14 | compatible = "renesas,sh7377"; | ||
15 | |||
16 | cpus { | ||
17 | cpu@0 { | ||
18 | compatible = "arm,cortex-a8"; | ||
19 | }; | ||
20 | }; | ||
21 | }; | ||
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 9f1921634eb7..405d1673904e 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -123,6 +123,12 @@ | |||
123 | status = "disabled"; | 123 | status = "disabled"; |
124 | }; | 124 | }; |
125 | 125 | ||
126 | pwm { | ||
127 | compatible = "nvidia,tegra20-pwm"; | ||
128 | reg = <0x7000a000 0x100>; | ||
129 | #pwm-cells = <2>; | ||
130 | }; | ||
131 | |||
126 | i2c@7000c000 { | 132 | i2c@7000c000 { |
127 | compatible = "nvidia,tegra20-i2c"; | 133 | compatible = "nvidia,tegra20-i2c"; |
128 | reg = <0x7000c000 0x100>; | 134 | reg = <0x7000c000 0x100>; |
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index da740191771f..3e4334d14efb 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -117,6 +117,12 @@ | |||
117 | status = "disabled"; | 117 | status = "disabled"; |
118 | }; | 118 | }; |
119 | 119 | ||
120 | pwm { | ||
121 | compatible = "nvidia,tegra30-pwm", "nvidia,tegra20-pwm"; | ||
122 | reg = <0x7000a000 0x100>; | ||
123 | #pwm-cells = <2>; | ||
124 | }; | ||
125 | |||
120 | i2c@7000c000 { | 126 | i2c@7000c000 { |
121 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | 127 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; |
122 | reg = <0x7000c000 0x100>; | 128 | reg = <0x7000c000 0x100>; |
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index aa07f5938f05..1143c4d5c567 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -452,6 +452,7 @@ static struct dma_map_ops dmabounce_ops = { | |||
452 | .alloc = arm_dma_alloc, | 452 | .alloc = arm_dma_alloc, |
453 | .free = arm_dma_free, | 453 | .free = arm_dma_free, |
454 | .mmap = arm_dma_mmap, | 454 | .mmap = arm_dma_mmap, |
455 | .get_sgtable = arm_dma_get_sgtable, | ||
455 | .map_page = dmabounce_map_page, | 456 | .map_page = dmabounce_map_page, |
456 | .unmap_page = dmabounce_unmap_page, | 457 | .unmap_page = dmabounce_unmap_page, |
457 | .sync_single_for_cpu = dmabounce_sync_for_cpu, | 458 | .sync_single_for_cpu = dmabounce_sync_for_cpu, |
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig index ddc9fe6a78ac..7d8718468e0d 100644 --- a/arch/arm/configs/armadillo800eva_defconfig +++ b/arch/arm/configs/armadillo800eva_defconfig | |||
@@ -5,10 +5,7 @@ CONFIG_IKCONFIG_PROC=y | |||
5 | CONFIG_LOG_BUF_SHIFT=16 | 5 | CONFIG_LOG_BUF_SHIFT=16 |
6 | # CONFIG_UTS_NS is not set | 6 | # CONFIG_UTS_NS is not set |
7 | # CONFIG_IPC_NS is not set | 7 | # CONFIG_IPC_NS is not set |
8 | # CONFIG_USER_NS is not set | ||
9 | # CONFIG_PID_NS is not set | 8 | # CONFIG_PID_NS is not set |
10 | CONFIG_SYSFS_DEPRECATED=y | ||
11 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
12 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
13 | CONFIG_SLAB=y | 10 | CONFIG_SLAB=y |
14 | CONFIG_MODULES=y | 11 | CONFIG_MODULES=y |
@@ -21,7 +18,7 @@ CONFIG_ARCH_SHMOBILE=y | |||
21 | CONFIG_ARCH_R8A7740=y | 18 | CONFIG_ARCH_R8A7740=y |
22 | CONFIG_MACH_ARMADILLO800EVA=y | 19 | CONFIG_MACH_ARMADILLO800EVA=y |
23 | # CONFIG_SH_TIMER_TMU is not set | 20 | # CONFIG_SH_TIMER_TMU is not set |
24 | # CONFIG_ARM_THUMB is not set | 21 | CONFIG_ARM_THUMB=y |
25 | CONFIG_CPU_BPREDICT_DISABLE=y | 22 | CONFIG_CPU_BPREDICT_DISABLE=y |
26 | # CONFIG_CACHE_L2X0 is not set | 23 | # CONFIG_CACHE_L2X0 is not set |
27 | CONFIG_ARM_ERRATA_430973=y | 24 | CONFIG_ARM_ERRATA_430973=y |
@@ -39,6 +36,7 @@ CONFIG_ZBOOT_ROM_BSS=0x0 | |||
39 | CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096" | 36 | CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096" |
40 | CONFIG_CMDLINE_FORCE=y | 37 | CONFIG_CMDLINE_FORCE=y |
41 | CONFIG_KEXEC=y | 38 | CONFIG_KEXEC=y |
39 | CONFIG_VFP=y | ||
42 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | 40 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set |
43 | # CONFIG_SUSPEND is not set | 41 | # CONFIG_SUSPEND is not set |
44 | CONFIG_NET=y | 42 | CONFIG_NET=y |
@@ -89,26 +87,32 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y | |||
89 | CONFIG_I2C=y | 87 | CONFIG_I2C=y |
90 | CONFIG_I2C_SH_MOBILE=y | 88 | CONFIG_I2C_SH_MOBILE=y |
91 | # CONFIG_HWMON is not set | 89 | # CONFIG_HWMON is not set |
90 | CONFIG_MEDIA_SUPPORT=y | ||
91 | CONFIG_VIDEO_DEV=y | ||
92 | # CONFIG_RC_CORE is not set | ||
93 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
94 | # CONFIG_V4L_USB_DRIVERS is not set | ||
95 | CONFIG_V4L_PLATFORM_DRIVERS=y | ||
96 | CONFIG_SOC_CAMERA=y | ||
97 | CONFIG_SOC_CAMERA_MT9T112=y | ||
98 | CONFIG_VIDEO_SH_MOBILE_CEU=y | ||
99 | # CONFIG_RADIO_ADAPTERS is not set | ||
92 | CONFIG_FB=y | 100 | CONFIG_FB=y |
93 | CONFIG_FB_MODE_HELPERS=y | ||
94 | CONFIG_FB_SH_MOBILE_LCDC=y | 101 | CONFIG_FB_SH_MOBILE_LCDC=y |
102 | CONFIG_FB_SH_MOBILE_HDMI=y | ||
95 | CONFIG_LCD_CLASS_DEVICE=y | 103 | CONFIG_LCD_CLASS_DEVICE=y |
96 | CONFIG_FRAMEBUFFER_CONSOLE=y | 104 | CONFIG_FRAMEBUFFER_CONSOLE=y |
97 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | 105 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y |
98 | CONFIG_LOGO=y | 106 | CONFIG_LOGO=y |
99 | # CONFIG_LOGO_LINUX_MONO is not set | 107 | # CONFIG_LOGO_LINUX_MONO is not set |
100 | # CONFIG_LOGO_LINUX_VGA16 is not set | 108 | # CONFIG_LOGO_LINUX_VGA16 is not set |
101 | CONFIG_SOUND=y | ||
102 | CONFIG_SND=y | ||
103 | # CONFIG_SND_SUPPORT_OLD_API is not set | 109 | # CONFIG_SND_SUPPORT_OLD_API is not set |
104 | # CONFIG_SND_VERBOSE_PROCFS is not set | 110 | # CONFIG_SND_VERBOSE_PROCFS is not set |
105 | # CONFIG_SND_DRIVERS is not set | 111 | # CONFIG_SND_DRIVERS is not set |
106 | # CONFIG_SND_ARM is not set | 112 | # CONFIG_SND_ARM is not set |
107 | CONFIG_SND_SOC=y | ||
108 | CONFIG_SND_SOC_SH4_FSI=y | 113 | CONFIG_SND_SOC_SH4_FSI=y |
109 | # CONFIG_HID_SUPPORT is not set | 114 | # CONFIG_HID_SUPPORT is not set |
110 | CONFIG_USB=y | 115 | CONFIG_USB=y |
111 | # CONFIG_USB_DEVICE_CLASS is not set | ||
112 | CONFIG_USB_RENESAS_USBHS=y | 116 | CONFIG_USB_RENESAS_USBHS=y |
113 | CONFIG_USB_GADGET=y | 117 | CONFIG_USB_GADGET=y |
114 | CONFIG_USB_RENESAS_USBHS_UDC=y | 118 | CONFIG_USB_RENESAS_USBHS_UDC=y |
@@ -116,6 +120,8 @@ CONFIG_USB_ETH=m | |||
116 | CONFIG_MMC=y | 120 | CONFIG_MMC=y |
117 | CONFIG_MMC_SDHI=y | 121 | CONFIG_MMC_SDHI=y |
118 | CONFIG_MMC_SH_MMCIF=y | 122 | CONFIG_MMC_SH_MMCIF=y |
123 | CONFIG_DMADEVICES=y | ||
124 | CONFIG_SH_DMAE=y | ||
119 | CONFIG_UIO=y | 125 | CONFIG_UIO=y |
120 | CONFIG_UIO_PDRV_GENIRQ=y | 126 | CONFIG_UIO_PDRV_GENIRQ=y |
121 | # CONFIG_DNOTIFY is not set | 127 | # CONFIG_DNOTIFY is not set |
@@ -124,7 +130,6 @@ CONFIG_VFAT_FS=y | |||
124 | CONFIG_TMPFS=y | 130 | CONFIG_TMPFS=y |
125 | # CONFIG_MISC_FILESYSTEMS is not set | 131 | # CONFIG_MISC_FILESYSTEMS is not set |
126 | CONFIG_NFS_FS=y | 132 | CONFIG_NFS_FS=y |
127 | CONFIG_NFS_V3=y | ||
128 | CONFIG_NFS_V3_ACL=y | 133 | CONFIG_NFS_V3_ACL=y |
129 | CONFIG_NFS_V4=y | 134 | CONFIG_NFS_V4=y |
130 | CONFIG_NFS_V4_1=y | 135 | CONFIG_NFS_V4_1=y |
diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig new file mode 100644 index 000000000000..26146ffea1a5 --- /dev/null +++ b/arch/arm/configs/kzm9d_defconfig | |||
@@ -0,0 +1,89 @@ | |||
1 | # CONFIG_ARM_PATCH_PHYS_VIRT is not set | ||
2 | CONFIG_EXPERIMENTAL=y | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_NO_HZ=y | ||
5 | CONFIG_IKCONFIG=y | ||
6 | CONFIG_IKCONFIG_PROC=y | ||
7 | CONFIG_LOG_BUF_SHIFT=16 | ||
8 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
9 | CONFIG_SYSCTL_SYSCALL=y | ||
10 | CONFIG_EMBEDDED=y | ||
11 | CONFIG_SLAB=y | ||
12 | # CONFIG_BLK_DEV_BSG is not set | ||
13 | # CONFIG_IOSCHED_DEADLINE is not set | ||
14 | # CONFIG_IOSCHED_CFQ is not set | ||
15 | CONFIG_ARCH_SHMOBILE=y | ||
16 | CONFIG_ARCH_EMEV2=y | ||
17 | CONFIG_MACH_KZM9D=y | ||
18 | CONFIG_MEMORY_START=0x40000000 | ||
19 | CONFIG_MEMORY_SIZE=0x10000000 | ||
20 | # CONFIG_SH_TIMER_TMU is not set | ||
21 | # CONFIG_SWP_EMULATE is not set | ||
22 | # CONFIG_CACHE_L2X0 is not set | ||
23 | CONFIG_SMP=y | ||
24 | CONFIG_NR_CPUS=2 | ||
25 | CONFIG_HOTPLUG_CPU=y | ||
26 | # CONFIG_LOCAL_TIMERS is not set | ||
27 | CONFIG_AEABI=y | ||
28 | # CONFIG_OABI_COMPAT is not set | ||
29 | # CONFIG_CROSS_MEMORY_ATTACH is not set | ||
30 | CONFIG_FORCE_MAX_ZONEORDER=13 | ||
31 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
32 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
33 | CONFIG_ARM_APPENDED_DTB=y | ||
34 | CONFIG_CMDLINE="console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096" | ||
35 | CONFIG_CMDLINE_FORCE=y | ||
36 | CONFIG_VFP=y | ||
37 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
38 | # CONFIG_SUSPEND is not set | ||
39 | CONFIG_NET=y | ||
40 | CONFIG_PACKET=y | ||
41 | CONFIG_UNIX=y | ||
42 | CONFIG_INET=y | ||
43 | CONFIG_IP_PNP=y | ||
44 | CONFIG_IP_PNP_DHCP=y | ||
45 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
46 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
47 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
48 | # CONFIG_INET_LRO is not set | ||
49 | # CONFIG_INET_DIAG is not set | ||
50 | # CONFIG_IPV6 is not set | ||
51 | # CONFIG_WIRELESS is not set | ||
52 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
53 | # CONFIG_BLK_DEV is not set | ||
54 | CONFIG_NETDEVICES=y | ||
55 | # CONFIG_NET_VENDOR_BROADCOM is not set | ||
56 | # CONFIG_NET_VENDOR_CHELSIO is not set | ||
57 | # CONFIG_NET_VENDOR_CIRRUS is not set | ||
58 | # CONFIG_NET_VENDOR_FARADAY is not set | ||
59 | # CONFIG_NET_VENDOR_INTEL is not set | ||
60 | # CONFIG_NET_VENDOR_MARVELL is not set | ||
61 | # CONFIG_NET_VENDOR_MICREL is not set | ||
62 | # CONFIG_NET_VENDOR_NATSEMI is not set | ||
63 | # CONFIG_NET_VENDOR_SEEQ is not set | ||
64 | CONFIG_SMSC911X=y | ||
65 | # CONFIG_NET_VENDOR_STMICRO is not set | ||
66 | # CONFIG_NET_VENDOR_WIZNET is not set | ||
67 | # CONFIG_WLAN is not set | ||
68 | # CONFIG_INPUT_MOUSEDEV is not set | ||
69 | # CONFIG_INPUT_KEYBOARD is not set | ||
70 | # CONFIG_INPUT_MOUSE is not set | ||
71 | # CONFIG_SERIO is not set | ||
72 | # CONFIG_LEGACY_PTYS is not set | ||
73 | # CONFIG_DEVKMEM is not set | ||
74 | CONFIG_SERIAL_8250=y | ||
75 | CONFIG_SERIAL_8250_CONSOLE=y | ||
76 | CONFIG_SERIAL_8250_EM=y | ||
77 | # CONFIG_HW_RANDOM is not set | ||
78 | CONFIG_GPIOLIB=y | ||
79 | CONFIG_GPIO_EM=y | ||
80 | # CONFIG_HWMON is not set | ||
81 | # CONFIG_HID_SUPPORT is not set | ||
82 | # CONFIG_USB_SUPPORT is not set | ||
83 | # CONFIG_IOMMU_SUPPORT is not set | ||
84 | # CONFIG_DNOTIFY is not set | ||
85 | CONFIG_TMPFS=y | ||
86 | # CONFIG_MISC_FILESYSTEMS is not set | ||
87 | CONFIG_NFS_FS=y | ||
88 | CONFIG_ROOT_NFS=y | ||
89 | # CONFIG_FTRACE is not set | ||
diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig index e3ebc20ed0a7..2388c8610627 100644 --- a/arch/arm/configs/kzm9g_defconfig +++ b/arch/arm/configs/kzm9g_defconfig | |||
@@ -100,7 +100,12 @@ CONFIG_SND_SOC_SH4_FSI=y | |||
100 | CONFIG_USB=y | 100 | CONFIG_USB=y |
101 | CONFIG_USB_DEVICEFS=y | 101 | CONFIG_USB_DEVICEFS=y |
102 | CONFIG_USB_R8A66597_HCD=y | 102 | CONFIG_USB_R8A66597_HCD=y |
103 | CONFIG_USB_RENESAS_USBHS=y | ||
103 | CONFIG_USB_STORAGE=y | 104 | CONFIG_USB_STORAGE=y |
105 | CONFIG_USB_GADGET=y | ||
106 | CONFIG_USB_RENESAS_USBHS_UDC=y | ||
107 | CONFIG_USB_ETH=m | ||
108 | CONFIG_USB_MASS_STORAGE=m | ||
104 | CONFIG_MMC=y | 109 | CONFIG_MMC=y |
105 | # CONFIG_MMC_BLOCK_BOUNCE is not set | 110 | # CONFIG_MMC_BLOCK_BOUNCE is not set |
106 | CONFIG_MMC_SDHI=y | 111 | CONFIG_MMC_SDHI=y |
@@ -108,12 +113,13 @@ CONFIG_MMC_SH_MMCIF=y | |||
108 | CONFIG_NEW_LEDS=y | 113 | CONFIG_NEW_LEDS=y |
109 | CONFIG_LEDS_CLASS=y | 114 | CONFIG_LEDS_CLASS=y |
110 | CONFIG_RTC_CLASS=y | 115 | CONFIG_RTC_CLASS=y |
116 | CONFIG_RTC_DRV_RS5C372=y | ||
111 | CONFIG_DMADEVICES=y | 117 | CONFIG_DMADEVICES=y |
112 | CONFIG_SH_DMAE=y | 118 | CONFIG_SH_DMAE=y |
113 | CONFIG_ASYNC_TX_DMA=y | 119 | CONFIG_ASYNC_TX_DMA=y |
114 | CONFIG_STAGING=y | 120 | CONFIG_STAGING=y |
115 | # CONFIG_DNOTIFY is not set | 121 | # CONFIG_DNOTIFY is not set |
116 | # CONFIG_INOTIFY_USER is not set | 122 | CONFIG_INOTIFY_USER=y |
117 | CONFIG_VFAT_FS=y | 123 | CONFIG_VFAT_FS=y |
118 | CONFIG_TMPFS=y | 124 | CONFIG_TMPFS=y |
119 | # CONFIG_MISC_FILESYSTEMS is not set | 125 | # CONFIG_MISC_FILESYSTEMS is not set |
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index b152de79fd95..e58edc36b406 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig | |||
@@ -193,6 +193,8 @@ CONFIG_MMC_OMAP_HS=y | |||
193 | CONFIG_RTC_CLASS=y | 193 | CONFIG_RTC_CLASS=y |
194 | CONFIG_RTC_DRV_TWL92330=y | 194 | CONFIG_RTC_DRV_TWL92330=y |
195 | CONFIG_RTC_DRV_TWL4030=y | 195 | CONFIG_RTC_DRV_TWL4030=y |
196 | CONFIG_DMADEVICES=y | ||
197 | CONFIG_DMA_OMAP=y | ||
196 | CONFIG_EXT2_FS=y | 198 | CONFIG_EXT2_FS=y |
197 | CONFIG_EXT3_FS=y | 199 | CONFIG_EXT3_FS=y |
198 | # CONFIG_EXT3_FS_XATTR is not set | 200 | # CONFIG_EXT3_FS_XATTR is not set |
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 4be9c1e80ee6..db2245353f0f 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig | |||
@@ -106,6 +106,7 @@ CONFIG_I2C_TEGRA=y | |||
106 | CONFIG_SPI=y | 106 | CONFIG_SPI=y |
107 | CONFIG_SPI_TEGRA=y | 107 | CONFIG_SPI_TEGRA=y |
108 | CONFIG_GPIO_TPS65910=y | 108 | CONFIG_GPIO_TPS65910=y |
109 | CONFIG_GPIO_TPS6586X=y | ||
109 | CONFIG_POWER_SUPPLY=y | 110 | CONFIG_POWER_SUPPLY=y |
110 | CONFIG_BATTERY_SBS=y | 111 | CONFIG_BATTERY_SBS=y |
111 | CONFIG_SENSORS_LM90=y | 112 | CONFIG_SENSORS_LM90=y |
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h index ed2e95d46e29..62e75475e57e 100644 --- a/arch/arm/include/asm/arch_timer.h +++ b/arch/arm/include/asm/arch_timer.h | |||
@@ -1,7 +1,10 @@ | |||
1 | #ifndef __ASMARM_ARCH_TIMER_H | 1 | #ifndef __ASMARM_ARCH_TIMER_H |
2 | #define __ASMARM_ARCH_TIMER_H | 2 | #define __ASMARM_ARCH_TIMER_H |
3 | 3 | ||
4 | #include <asm/errno.h> | ||
5 | |||
4 | #ifdef CONFIG_ARM_ARCH_TIMER | 6 | #ifdef CONFIG_ARM_ARCH_TIMER |
7 | #define ARCH_HAS_READ_CURRENT_TIMER | ||
5 | int arch_timer_of_register(void); | 8 | int arch_timer_of_register(void); |
6 | int arch_timer_sched_clock_init(void); | 9 | int arch_timer_sched_clock_init(void); |
7 | #else | 10 | #else |
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 004c1bc95d2b..e4448e16046d 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -215,7 +215,9 @@ static inline void vivt_flush_cache_mm(struct mm_struct *mm) | |||
215 | static inline void | 215 | static inline void |
216 | vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) | 216 | vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) |
217 | { | 217 | { |
218 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) | 218 | struct mm_struct *mm = vma->vm_mm; |
219 | |||
220 | if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) | ||
219 | __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), | 221 | __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), |
220 | vma->vm_flags); | 222 | vma->vm_flags); |
221 | } | 223 | } |
@@ -223,7 +225,9 @@ vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned | |||
223 | static inline void | 225 | static inline void |
224 | vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) | 226 | vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) |
225 | { | 227 | { |
226 | if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { | 228 | struct mm_struct *mm = vma->vm_mm; |
229 | |||
230 | if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) { | ||
227 | unsigned long addr = user_addr & PAGE_MASK; | 231 | unsigned long addr = user_addr & PAGE_MASK; |
228 | __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); | 232 | __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); |
229 | } | 233 | } |
diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h index b2deda181549..dc6145120de3 100644 --- a/arch/arm/include/asm/delay.h +++ b/arch/arm/include/asm/delay.h | |||
@@ -6,9 +6,22 @@ | |||
6 | #ifndef __ASM_ARM_DELAY_H | 6 | #ifndef __ASM_ARM_DELAY_H |
7 | #define __ASM_ARM_DELAY_H | 7 | #define __ASM_ARM_DELAY_H |
8 | 8 | ||
9 | #include <asm/memory.h> | ||
9 | #include <asm/param.h> /* HZ */ | 10 | #include <asm/param.h> /* HZ */ |
10 | 11 | ||
11 | extern void __delay(int loops); | 12 | #define MAX_UDELAY_MS 2 |
13 | #define UDELAY_MULT ((UL(2199023) * HZ) >> 11) | ||
14 | #define UDELAY_SHIFT 30 | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | |||
18 | extern struct arm_delay_ops { | ||
19 | void (*delay)(unsigned long); | ||
20 | void (*const_udelay)(unsigned long); | ||
21 | void (*udelay)(unsigned long); | ||
22 | } arm_delay_ops; | ||
23 | |||
24 | #define __delay(n) arm_delay_ops.delay(n) | ||
12 | 25 | ||
13 | /* | 26 | /* |
14 | * This function intentionally does not exist; if you see references to | 27 | * This function intentionally does not exist; if you see references to |
@@ -23,22 +36,27 @@ extern void __bad_udelay(void); | |||
23 | * division by multiplication: you don't have to worry about | 36 | * division by multiplication: you don't have to worry about |
24 | * loss of precision. | 37 | * loss of precision. |
25 | * | 38 | * |
26 | * Use only for very small delays ( < 1 msec). Should probably use a | 39 | * Use only for very small delays ( < 2 msec). Should probably use a |
27 | * lookup table, really, as the multiplications take much too long with | 40 | * lookup table, really, as the multiplications take much too long with |
28 | * short delays. This is a "reasonable" implementation, though (and the | 41 | * short delays. This is a "reasonable" implementation, though (and the |
29 | * first constant multiplications gets optimized away if the delay is | 42 | * first constant multiplications gets optimized away if the delay is |
30 | * a constant) | 43 | * a constant) |
31 | */ | 44 | */ |
32 | extern void __udelay(unsigned long usecs); | 45 | #define __udelay(n) arm_delay_ops.udelay(n) |
33 | extern void __const_udelay(unsigned long); | 46 | #define __const_udelay(n) arm_delay_ops.const_udelay(n) |
34 | |||
35 | #define MAX_UDELAY_MS 2 | ||
36 | 47 | ||
37 | #define udelay(n) \ | 48 | #define udelay(n) \ |
38 | (__builtin_constant_p(n) ? \ | 49 | (__builtin_constant_p(n) ? \ |
39 | ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \ | 50 | ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \ |
40 | __const_udelay((n) * ((2199023U*HZ)>>11))) : \ | 51 | __const_udelay((n) * UDELAY_MULT)) : \ |
41 | __udelay(n)) | 52 | __udelay(n)) |
42 | 53 | ||
54 | /* Loop-based definitions for assembly code. */ | ||
55 | extern void __loop_delay(unsigned long loops); | ||
56 | extern void __loop_udelay(unsigned long usecs); | ||
57 | extern void __loop_const_udelay(unsigned long); | ||
58 | |||
59 | #endif /* __ASSEMBLY__ */ | ||
60 | |||
43 | #endif /* defined(_ARM_DELAY_H) */ | 61 | #endif /* defined(_ARM_DELAY_H) */ |
44 | 62 | ||
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index bbef15d04890..2ae842df4551 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h | |||
@@ -186,17 +186,6 @@ extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma, | |||
186 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | 186 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
187 | struct dma_attrs *attrs); | 187 | struct dma_attrs *attrs); |
188 | 188 | ||
189 | #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL) | ||
190 | |||
191 | static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, | ||
192 | void *cpu_addr, dma_addr_t dma_addr, | ||
193 | size_t size, struct dma_attrs *attrs) | ||
194 | { | ||
195 | struct dma_map_ops *ops = get_dma_ops(dev); | ||
196 | BUG_ON(!ops); | ||
197 | return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); | ||
198 | } | ||
199 | |||
200 | static inline void *dma_alloc_writecombine(struct device *dev, size_t size, | 189 | static inline void *dma_alloc_writecombine(struct device *dev, size_t size, |
201 | dma_addr_t *dma_handle, gfp_t flag) | 190 | dma_addr_t *dma_handle, gfp_t flag) |
202 | { | 191 | { |
@@ -213,20 +202,12 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, | |||
213 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); | 202 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); |
214 | } | 203 | } |
215 | 204 | ||
216 | static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, | ||
217 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | ||
218 | { | ||
219 | DEFINE_DMA_ATTRS(attrs); | ||
220 | dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); | ||
221 | return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs); | ||
222 | } | ||
223 | |||
224 | /* | 205 | /* |
225 | * This can be called during boot to increase the size of the consistent | 206 | * This can be called during boot to increase the size of the consistent |
226 | * DMA region above it's default value of 2MB. It must be called before the | 207 | * DMA region above it's default value of 2MB. It must be called before the |
227 | * memory allocator is initialised, i.e. before any core_initcall. | 208 | * memory allocator is initialised, i.e. before any core_initcall. |
228 | */ | 209 | */ |
229 | extern void __init init_consistent_dma_size(unsigned long size); | 210 | static inline void init_consistent_dma_size(unsigned long size) { } |
230 | 211 | ||
231 | /* | 212 | /* |
232 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" | 213 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" |
@@ -280,6 +261,9 @@ extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int, | |||
280 | enum dma_data_direction); | 261 | enum dma_data_direction); |
281 | extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int, | 262 | extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int, |
282 | enum dma_data_direction); | 263 | enum dma_data_direction); |
264 | extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt, | ||
265 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | ||
266 | struct dma_attrs *attrs); | ||
283 | 267 | ||
284 | #endif /* __KERNEL__ */ | 268 | #endif /* __KERNEL__ */ |
285 | #endif | 269 | #endif |
diff --git a/arch/arm/include/asm/kmap_types.h b/arch/arm/include/asm/kmap_types.h index e51b1e81df05..83eb2f772911 100644 --- a/arch/arm/include/asm/kmap_types.h +++ b/arch/arm/include/asm/kmap_types.h | |||
@@ -4,30 +4,6 @@ | |||
4 | /* | 4 | /* |
5 | * This is the "bare minimum". AIO seems to require this. | 5 | * This is the "bare minimum". AIO seems to require this. |
6 | */ | 6 | */ |
7 | enum km_type { | 7 | #define KM_TYPE_NR 16 |
8 | KM_BOUNCE_READ, | ||
9 | KM_SKB_SUNRPC_DATA, | ||
10 | KM_SKB_DATA_SOFTIRQ, | ||
11 | KM_USER0, | ||
12 | KM_USER1, | ||
13 | KM_BIO_SRC_IRQ, | ||
14 | KM_BIO_DST_IRQ, | ||
15 | KM_PTE0, | ||
16 | KM_PTE1, | ||
17 | KM_IRQ0, | ||
18 | KM_IRQ1, | ||
19 | KM_SOFTIRQ0, | ||
20 | KM_SOFTIRQ1, | ||
21 | KM_L1_CACHE, | ||
22 | KM_L2_CACHE, | ||
23 | KM_KDB, | ||
24 | KM_TYPE_NR | ||
25 | }; | ||
26 | |||
27 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
28 | #define KM_NMI (-1) | ||
29 | #define KM_NMI_PTE (-1) | ||
30 | #define KM_IRQ_PTE (-1) | ||
31 | #endif | ||
32 | 8 | ||
33 | #endif | 9 | #endif |
diff --git a/arch/arm/include/asm/locks.h b/arch/arm/include/asm/locks.h deleted file mode 100644 index ef4c897772d1..000000000000 --- a/arch/arm/include/asm/locks.h +++ /dev/null | |||
@@ -1,274 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/locks.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * Interrupt safe locking assembler. | ||
11 | */ | ||
12 | #ifndef __ASM_PROC_LOCKS_H | ||
13 | #define __ASM_PROC_LOCKS_H | ||
14 | |||
15 | #if __LINUX_ARM_ARCH__ >= 6 | ||
16 | |||
17 | #define __down_op(ptr,fail) \ | ||
18 | ({ \ | ||
19 | __asm__ __volatile__( \ | ||
20 | "@ down_op\n" \ | ||
21 | "1: ldrex lr, [%0]\n" \ | ||
22 | " sub lr, lr, %1\n" \ | ||
23 | " strex ip, lr, [%0]\n" \ | ||
24 | " teq ip, #0\n" \ | ||
25 | " bne 1b\n" \ | ||
26 | " teq lr, #0\n" \ | ||
27 | " movmi ip, %0\n" \ | ||
28 | " blmi " #fail \ | ||
29 | : \ | ||
30 | : "r" (ptr), "I" (1) \ | ||
31 | : "ip", "lr", "cc"); \ | ||
32 | smp_mb(); \ | ||
33 | }) | ||
34 | |||
35 | #define __down_op_ret(ptr,fail) \ | ||
36 | ({ \ | ||
37 | unsigned int ret; \ | ||
38 | __asm__ __volatile__( \ | ||
39 | "@ down_op_ret\n" \ | ||
40 | "1: ldrex lr, [%1]\n" \ | ||
41 | " sub lr, lr, %2\n" \ | ||
42 | " strex ip, lr, [%1]\n" \ | ||
43 | " teq ip, #0\n" \ | ||
44 | " bne 1b\n" \ | ||
45 | " teq lr, #0\n" \ | ||
46 | " movmi ip, %1\n" \ | ||
47 | " movpl ip, #0\n" \ | ||
48 | " blmi " #fail "\n" \ | ||
49 | " mov %0, ip" \ | ||
50 | : "=&r" (ret) \ | ||
51 | : "r" (ptr), "I" (1) \ | ||
52 | : "ip", "lr", "cc"); \ | ||
53 | smp_mb(); \ | ||
54 | ret; \ | ||
55 | }) | ||
56 | |||
57 | #define __up_op(ptr,wake) \ | ||
58 | ({ \ | ||
59 | smp_mb(); \ | ||
60 | __asm__ __volatile__( \ | ||
61 | "@ up_op\n" \ | ||
62 | "1: ldrex lr, [%0]\n" \ | ||
63 | " add lr, lr, %1\n" \ | ||
64 | " strex ip, lr, [%0]\n" \ | ||
65 | " teq ip, #0\n" \ | ||
66 | " bne 1b\n" \ | ||
67 | " cmp lr, #0\n" \ | ||
68 | " movle ip, %0\n" \ | ||
69 | " blle " #wake \ | ||
70 | : \ | ||
71 | : "r" (ptr), "I" (1) \ | ||
72 | : "ip", "lr", "cc"); \ | ||
73 | }) | ||
74 | |||
75 | /* | ||
76 | * The value 0x01000000 supports up to 128 processors and | ||
77 | * lots of processes. BIAS must be chosen such that sub'ing | ||
78 | * BIAS once per CPU will result in the long remaining | ||
79 | * negative. | ||
80 | */ | ||
81 | #define RW_LOCK_BIAS 0x01000000 | ||
82 | #define RW_LOCK_BIAS_STR "0x01000000" | ||
83 | |||
84 | #define __down_op_write(ptr,fail) \ | ||
85 | ({ \ | ||
86 | __asm__ __volatile__( \ | ||
87 | "@ down_op_write\n" \ | ||
88 | "1: ldrex lr, [%0]\n" \ | ||
89 | " sub lr, lr, %1\n" \ | ||
90 | " strex ip, lr, [%0]\n" \ | ||
91 | " teq ip, #0\n" \ | ||
92 | " bne 1b\n" \ | ||
93 | " teq lr, #0\n" \ | ||
94 | " movne ip, %0\n" \ | ||
95 | " blne " #fail \ | ||
96 | : \ | ||
97 | : "r" (ptr), "I" (RW_LOCK_BIAS) \ | ||
98 | : "ip", "lr", "cc"); \ | ||
99 | smp_mb(); \ | ||
100 | }) | ||
101 | |||
102 | #define __up_op_write(ptr,wake) \ | ||
103 | ({ \ | ||
104 | smp_mb(); \ | ||
105 | __asm__ __volatile__( \ | ||
106 | "@ up_op_write\n" \ | ||
107 | "1: ldrex lr, [%0]\n" \ | ||
108 | " adds lr, lr, %1\n" \ | ||
109 | " strex ip, lr, [%0]\n" \ | ||
110 | " teq ip, #0\n" \ | ||
111 | " bne 1b\n" \ | ||
112 | " movcs ip, %0\n" \ | ||
113 | " blcs " #wake \ | ||
114 | : \ | ||
115 | : "r" (ptr), "I" (RW_LOCK_BIAS) \ | ||
116 | : "ip", "lr", "cc"); \ | ||
117 | }) | ||
118 | |||
119 | #define __down_op_read(ptr,fail) \ | ||
120 | __down_op(ptr, fail) | ||
121 | |||
122 | #define __up_op_read(ptr,wake) \ | ||
123 | ({ \ | ||
124 | smp_mb(); \ | ||
125 | __asm__ __volatile__( \ | ||
126 | "@ up_op_read\n" \ | ||
127 | "1: ldrex lr, [%0]\n" \ | ||
128 | " add lr, lr, %1\n" \ | ||
129 | " strex ip, lr, [%0]\n" \ | ||
130 | " teq ip, #0\n" \ | ||
131 | " bne 1b\n" \ | ||
132 | " teq lr, #0\n" \ | ||
133 | " moveq ip, %0\n" \ | ||
134 | " bleq " #wake \ | ||
135 | : \ | ||
136 | : "r" (ptr), "I" (1) \ | ||
137 | : "ip", "lr", "cc"); \ | ||
138 | }) | ||
139 | |||
140 | #else | ||
141 | |||
142 | #define __down_op(ptr,fail) \ | ||
143 | ({ \ | ||
144 | __asm__ __volatile__( \ | ||
145 | "@ down_op\n" \ | ||
146 | " mrs ip, cpsr\n" \ | ||
147 | " orr lr, ip, #128\n" \ | ||
148 | " msr cpsr_c, lr\n" \ | ||
149 | " ldr lr, [%0]\n" \ | ||
150 | " subs lr, lr, %1\n" \ | ||
151 | " str lr, [%0]\n" \ | ||
152 | " msr cpsr_c, ip\n" \ | ||
153 | " movmi ip, %0\n" \ | ||
154 | " blmi " #fail \ | ||
155 | : \ | ||
156 | : "r" (ptr), "I" (1) \ | ||
157 | : "ip", "lr", "cc"); \ | ||
158 | smp_mb(); \ | ||
159 | }) | ||
160 | |||
161 | #define __down_op_ret(ptr,fail) \ | ||
162 | ({ \ | ||
163 | unsigned int ret; \ | ||
164 | __asm__ __volatile__( \ | ||
165 | "@ down_op_ret\n" \ | ||
166 | " mrs ip, cpsr\n" \ | ||
167 | " orr lr, ip, #128\n" \ | ||
168 | " msr cpsr_c, lr\n" \ | ||
169 | " ldr lr, [%1]\n" \ | ||
170 | " subs lr, lr, %2\n" \ | ||
171 | " str lr, [%1]\n" \ | ||
172 | " msr cpsr_c, ip\n" \ | ||
173 | " movmi ip, %1\n" \ | ||
174 | " movpl ip, #0\n" \ | ||
175 | " blmi " #fail "\n" \ | ||
176 | " mov %0, ip" \ | ||
177 | : "=&r" (ret) \ | ||
178 | : "r" (ptr), "I" (1) \ | ||
179 | : "ip", "lr", "cc"); \ | ||
180 | smp_mb(); \ | ||
181 | ret; \ | ||
182 | }) | ||
183 | |||
184 | #define __up_op(ptr,wake) \ | ||
185 | ({ \ | ||
186 | smp_mb(); \ | ||
187 | __asm__ __volatile__( \ | ||
188 | "@ up_op\n" \ | ||
189 | " mrs ip, cpsr\n" \ | ||
190 | " orr lr, ip, #128\n" \ | ||
191 | " msr cpsr_c, lr\n" \ | ||
192 | " ldr lr, [%0]\n" \ | ||
193 | " adds lr, lr, %1\n" \ | ||
194 | " str lr, [%0]\n" \ | ||
195 | " msr cpsr_c, ip\n" \ | ||
196 | " movle ip, %0\n" \ | ||
197 | " blle " #wake \ | ||
198 | : \ | ||
199 | : "r" (ptr), "I" (1) \ | ||
200 | : "ip", "lr", "cc"); \ | ||
201 | }) | ||
202 | |||
203 | /* | ||
204 | * The value 0x01000000 supports up to 128 processors and | ||
205 | * lots of processes. BIAS must be chosen such that sub'ing | ||
206 | * BIAS once per CPU will result in the long remaining | ||
207 | * negative. | ||
208 | */ | ||
209 | #define RW_LOCK_BIAS 0x01000000 | ||
210 | #define RW_LOCK_BIAS_STR "0x01000000" | ||
211 | |||
212 | #define __down_op_write(ptr,fail) \ | ||
213 | ({ \ | ||
214 | __asm__ __volatile__( \ | ||
215 | "@ down_op_write\n" \ | ||
216 | " mrs ip, cpsr\n" \ | ||
217 | " orr lr, ip, #128\n" \ | ||
218 | " msr cpsr_c, lr\n" \ | ||
219 | " ldr lr, [%0]\n" \ | ||
220 | " subs lr, lr, %1\n" \ | ||
221 | " str lr, [%0]\n" \ | ||
222 | " msr cpsr_c, ip\n" \ | ||
223 | " movne ip, %0\n" \ | ||
224 | " blne " #fail \ | ||
225 | : \ | ||
226 | : "r" (ptr), "I" (RW_LOCK_BIAS) \ | ||
227 | : "ip", "lr", "cc"); \ | ||
228 | smp_mb(); \ | ||
229 | }) | ||
230 | |||
231 | #define __up_op_write(ptr,wake) \ | ||
232 | ({ \ | ||
233 | __asm__ __volatile__( \ | ||
234 | "@ up_op_write\n" \ | ||
235 | " mrs ip, cpsr\n" \ | ||
236 | " orr lr, ip, #128\n" \ | ||
237 | " msr cpsr_c, lr\n" \ | ||
238 | " ldr lr, [%0]\n" \ | ||
239 | " adds lr, lr, %1\n" \ | ||
240 | " str lr, [%0]\n" \ | ||
241 | " msr cpsr_c, ip\n" \ | ||
242 | " movcs ip, %0\n" \ | ||
243 | " blcs " #wake \ | ||
244 | : \ | ||
245 | : "r" (ptr), "I" (RW_LOCK_BIAS) \ | ||
246 | : "ip", "lr", "cc"); \ | ||
247 | smp_mb(); \ | ||
248 | }) | ||
249 | |||
250 | #define __down_op_read(ptr,fail) \ | ||
251 | __down_op(ptr, fail) | ||
252 | |||
253 | #define __up_op_read(ptr,wake) \ | ||
254 | ({ \ | ||
255 | smp_mb(); \ | ||
256 | __asm__ __volatile__( \ | ||
257 | "@ up_op_read\n" \ | ||
258 | " mrs ip, cpsr\n" \ | ||
259 | " orr lr, ip, #128\n" \ | ||
260 | " msr cpsr_c, lr\n" \ | ||
261 | " ldr lr, [%0]\n" \ | ||
262 | " adds lr, lr, %1\n" \ | ||
263 | " str lr, [%0]\n" \ | ||
264 | " msr cpsr_c, ip\n" \ | ||
265 | " moveq ip, %0\n" \ | ||
266 | " bleq " #wake \ | ||
267 | : \ | ||
268 | : "r" (ptr), "I" (1) \ | ||
269 | : "ip", "lr", "cc"); \ | ||
270 | }) | ||
271 | |||
272 | #endif | ||
273 | |||
274 | #endif | ||
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index fcb575747e5e..e965f1b560f1 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <linux/compiler.h> | 16 | #include <linux/compiler.h> |
17 | #include <linux/const.h> | 17 | #include <linux/const.h> |
18 | #include <linux/types.h> | 18 | #include <linux/types.h> |
19 | #include <asm/sizes.h> | 19 | #include <linux/sizes.h> |
20 | 20 | ||
21 | #ifdef CONFIG_NEED_MACH_MEMORY_H | 21 | #ifdef CONFIG_NEED_MACH_MEMORY_H |
22 | #include <mach/memory.h> | 22 | #include <mach/memory.h> |
diff --git a/arch/arm/include/asm/mutex.h b/arch/arm/include/asm/mutex.h index 93226cf23ae0..b1479fd04a95 100644 --- a/arch/arm/include/asm/mutex.h +++ b/arch/arm/include/asm/mutex.h | |||
@@ -7,121 +7,10 @@ | |||
7 | */ | 7 | */ |
8 | #ifndef _ASM_MUTEX_H | 8 | #ifndef _ASM_MUTEX_H |
9 | #define _ASM_MUTEX_H | 9 | #define _ASM_MUTEX_H |
10 | |||
11 | #if __LINUX_ARM_ARCH__ < 6 | ||
12 | /* On pre-ARMv6 hardware the swp based implementation is the most efficient. */ | ||
13 | # include <asm-generic/mutex-xchg.h> | ||
14 | #else | ||
15 | |||
16 | /* | 10 | /* |
17 | * Attempting to lock a mutex on ARMv6+ can be done with a bastardized | 11 | * On pre-ARMv6 hardware this results in a swp-based implementation, |
18 | * atomic decrement (it is not a reliable atomic decrement but it satisfies | 12 | * which is the most efficient. For ARMv6+, we emit a pair of exclusive |
19 | * the defined semantics for our purpose, while being smaller and faster | 13 | * accesses instead. |
20 | * than a real atomic decrement or atomic swap. The idea is to attempt | ||
21 | * decrementing the lock value only once. If once decremented it isn't zero, | ||
22 | * or if its store-back fails due to a dispute on the exclusive store, we | ||
23 | * simply bail out immediately through the slow path where the lock will be | ||
24 | * reattempted until it succeeds. | ||
25 | */ | 14 | */ |
26 | static inline void | 15 | #include <asm-generic/mutex-xchg.h> |
27 | __mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *)) | ||
28 | { | ||
29 | int __ex_flag, __res; | ||
30 | |||
31 | __asm__ ( | ||
32 | |||
33 | "ldrex %0, [%2] \n\t" | ||
34 | "sub %0, %0, #1 \n\t" | ||
35 | "strex %1, %0, [%2] " | ||
36 | |||
37 | : "=&r" (__res), "=&r" (__ex_flag) | ||
38 | : "r" (&(count)->counter) | ||
39 | : "cc","memory" ); | ||
40 | |||
41 | __res |= __ex_flag; | ||
42 | if (unlikely(__res != 0)) | ||
43 | fail_fn(count); | ||
44 | } | ||
45 | |||
46 | static inline int | ||
47 | __mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *)) | ||
48 | { | ||
49 | int __ex_flag, __res; | ||
50 | |||
51 | __asm__ ( | ||
52 | |||
53 | "ldrex %0, [%2] \n\t" | ||
54 | "sub %0, %0, #1 \n\t" | ||
55 | "strex %1, %0, [%2] " | ||
56 | |||
57 | : "=&r" (__res), "=&r" (__ex_flag) | ||
58 | : "r" (&(count)->counter) | ||
59 | : "cc","memory" ); | ||
60 | |||
61 | __res |= __ex_flag; | ||
62 | if (unlikely(__res != 0)) | ||
63 | __res = fail_fn(count); | ||
64 | return __res; | ||
65 | } | ||
66 | |||
67 | /* | ||
68 | * Same trick is used for the unlock fast path. However the original value, | ||
69 | * rather than the result, is used to test for success in order to have | ||
70 | * better generated assembly. | ||
71 | */ | ||
72 | static inline void | ||
73 | __mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *)) | ||
74 | { | ||
75 | int __ex_flag, __res, __orig; | ||
76 | |||
77 | __asm__ ( | ||
78 | |||
79 | "ldrex %0, [%3] \n\t" | ||
80 | "add %1, %0, #1 \n\t" | ||
81 | "strex %2, %1, [%3] " | ||
82 | |||
83 | : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag) | ||
84 | : "r" (&(count)->counter) | ||
85 | : "cc","memory" ); | ||
86 | |||
87 | __orig |= __ex_flag; | ||
88 | if (unlikely(__orig != 0)) | ||
89 | fail_fn(count); | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * If the unlock was done on a contended lock, or if the unlock simply fails | ||
94 | * then the mutex remains locked. | ||
95 | */ | ||
96 | #define __mutex_slowpath_needs_to_unlock() 1 | ||
97 | |||
98 | /* | ||
99 | * For __mutex_fastpath_trylock we use another construct which could be | ||
100 | * described as a "single value cmpxchg". | ||
101 | * | ||
102 | * This provides the needed trylock semantics like cmpxchg would, but it is | ||
103 | * lighter and less generic than a true cmpxchg implementation. | ||
104 | */ | ||
105 | static inline int | ||
106 | __mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *)) | ||
107 | { | ||
108 | int __ex_flag, __res, __orig; | ||
109 | |||
110 | __asm__ ( | ||
111 | |||
112 | "1: ldrex %0, [%3] \n\t" | ||
113 | "subs %1, %0, #1 \n\t" | ||
114 | "strexeq %2, %1, [%3] \n\t" | ||
115 | "movlt %0, #0 \n\t" | ||
116 | "cmpeq %2, #0 \n\t" | ||
117 | "bgt 1b " | ||
118 | |||
119 | : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag) | ||
120 | : "r" (&count->counter) | ||
121 | : "cc", "memory" ); | ||
122 | |||
123 | return __orig; | ||
124 | } | ||
125 | |||
126 | #endif | ||
127 | #endif | 16 | #endif |
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h index 00cbe10a50e3..e074948d8143 100644 --- a/arch/arm/include/asm/perf_event.h +++ b/arch/arm/include/asm/perf_event.h | |||
@@ -12,21 +12,6 @@ | |||
12 | #ifndef __ARM_PERF_EVENT_H__ | 12 | #ifndef __ARM_PERF_EVENT_H__ |
13 | #define __ARM_PERF_EVENT_H__ | 13 | #define __ARM_PERF_EVENT_H__ |
14 | 14 | ||
15 | /* ARM perf PMU IDs for use by internal perf clients. */ | 15 | /* Nothing to see here... */ |
16 | enum arm_perf_pmu_ids { | ||
17 | ARM_PERF_PMU_ID_XSCALE1 = 0, | ||
18 | ARM_PERF_PMU_ID_XSCALE2, | ||
19 | ARM_PERF_PMU_ID_V6, | ||
20 | ARM_PERF_PMU_ID_V6MP, | ||
21 | ARM_PERF_PMU_ID_CA8, | ||
22 | ARM_PERF_PMU_ID_CA9, | ||
23 | ARM_PERF_PMU_ID_CA5, | ||
24 | ARM_PERF_PMU_ID_CA15, | ||
25 | ARM_PERF_PMU_ID_CA7, | ||
26 | ARM_NUM_PMU_IDS, | ||
27 | }; | ||
28 | |||
29 | extern enum arm_perf_pmu_ids | ||
30 | armpmu_get_pmu_id(void); | ||
31 | 16 | ||
32 | #endif /* __ARM_PERF_EVENT_H__ */ | 17 | #endif /* __ARM_PERF_EVENT_H__ */ |
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h index 90114faa9f3c..4432305f4a2a 100644 --- a/arch/arm/include/asm/pmu.h +++ b/arch/arm/include/asm/pmu.h | |||
@@ -103,10 +103,9 @@ struct pmu_hw_events { | |||
103 | 103 | ||
104 | struct arm_pmu { | 104 | struct arm_pmu { |
105 | struct pmu pmu; | 105 | struct pmu pmu; |
106 | enum arm_perf_pmu_ids id; | ||
107 | enum arm_pmu_type type; | 106 | enum arm_pmu_type type; |
108 | cpumask_t active_irqs; | 107 | cpumask_t active_irqs; |
109 | const char *name; | 108 | char *name; |
110 | irqreturn_t (*handle_irq)(int irq_num, void *dev); | 109 | irqreturn_t (*handle_irq)(int irq_num, void *dev); |
111 | void (*enable)(struct hw_perf_event *evt, int idx); | 110 | void (*enable)(struct hw_perf_event *evt, int idx); |
112 | void (*disable)(struct hw_perf_event *evt, int idx); | 111 | void (*disable)(struct hw_perf_event *evt, int idx); |
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index 23ebc0c82a39..24d284a1bfc7 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h | |||
@@ -196,7 +196,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn } | |||
196 | 196 | ||
197 | struct membank { | 197 | struct membank { |
198 | phys_addr_t start; | 198 | phys_addr_t start; |
199 | unsigned long size; | 199 | phys_addr_t size; |
200 | unsigned int highmem; | 200 | unsigned int highmem; |
201 | }; | 201 | }; |
202 | 202 | ||
@@ -217,7 +217,7 @@ extern struct meminfo meminfo; | |||
217 | #define bank_phys_end(bank) ((bank)->start + (bank)->size) | 217 | #define bank_phys_end(bank) ((bank)->start + (bank)->size) |
218 | #define bank_phys_size(bank) (bank)->size | 218 | #define bank_phys_size(bank) (bank)->size |
219 | 219 | ||
220 | extern int arm_add_memory(phys_addr_t start, unsigned long size); | 220 | extern int arm_add_memory(phys_addr_t start, phys_addr_t size); |
221 | extern void early_print(const char *str, ...); | 221 | extern void early_print(const char *str, ...); |
222 | extern void dump_machine_table(void); | 222 | extern void dump_machine_table(void); |
223 | 223 | ||
diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h index 65fa3c88095c..b4ca707d0a69 100644 --- a/arch/arm/include/asm/spinlock.h +++ b/arch/arm/include/asm/spinlock.h | |||
@@ -59,18 +59,13 @@ static inline void dsb_sev(void) | |||
59 | } | 59 | } |
60 | 60 | ||
61 | /* | 61 | /* |
62 | * ARMv6 Spin-locking. | 62 | * ARMv6 ticket-based spin-locking. |
63 | * | 63 | * |
64 | * We exclusively read the old value. If it is zero, we may have | 64 | * A memory barrier is required after we get a lock, and before we |
65 | * won the lock, so we try exclusively storing it. A memory barrier | 65 | * release it, because V6 CPUs are assumed to have weakly ordered |
66 | * is required after we get a lock, and before we release it, because | 66 | * memory. |
67 | * V6 CPUs are assumed to have weakly ordered memory. | ||
68 | * | ||
69 | * Unlocked value: 0 | ||
70 | * Locked value: 1 | ||
71 | */ | 67 | */ |
72 | 68 | ||
73 | #define arch_spin_is_locked(x) ((x)->lock != 0) | ||
74 | #define arch_spin_unlock_wait(lock) \ | 69 | #define arch_spin_unlock_wait(lock) \ |
75 | do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0) | 70 | do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0) |
76 | 71 | ||
@@ -79,31 +74,39 @@ static inline void dsb_sev(void) | |||
79 | static inline void arch_spin_lock(arch_spinlock_t *lock) | 74 | static inline void arch_spin_lock(arch_spinlock_t *lock) |
80 | { | 75 | { |
81 | unsigned long tmp; | 76 | unsigned long tmp; |
77 | u32 newval; | ||
78 | arch_spinlock_t lockval; | ||
82 | 79 | ||
83 | __asm__ __volatile__( | 80 | __asm__ __volatile__( |
84 | "1: ldrex %0, [%1]\n" | 81 | "1: ldrex %0, [%3]\n" |
85 | " teq %0, #0\n" | 82 | " add %1, %0, %4\n" |
86 | WFE("ne") | 83 | " strex %2, %1, [%3]\n" |
87 | " strexeq %0, %2, [%1]\n" | 84 | " teq %2, #0\n" |
88 | " teqeq %0, #0\n" | ||
89 | " bne 1b" | 85 | " bne 1b" |
90 | : "=&r" (tmp) | 86 | : "=&r" (lockval), "=&r" (newval), "=&r" (tmp) |
91 | : "r" (&lock->lock), "r" (1) | 87 | : "r" (&lock->slock), "I" (1 << TICKET_SHIFT) |
92 | : "cc"); | 88 | : "cc"); |
93 | 89 | ||
90 | while (lockval.tickets.next != lockval.tickets.owner) { | ||
91 | wfe(); | ||
92 | lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner); | ||
93 | } | ||
94 | |||
94 | smp_mb(); | 95 | smp_mb(); |
95 | } | 96 | } |
96 | 97 | ||
97 | static inline int arch_spin_trylock(arch_spinlock_t *lock) | 98 | static inline int arch_spin_trylock(arch_spinlock_t *lock) |
98 | { | 99 | { |
99 | unsigned long tmp; | 100 | unsigned long tmp; |
101 | u32 slock; | ||
100 | 102 | ||
101 | __asm__ __volatile__( | 103 | __asm__ __volatile__( |
102 | " ldrex %0, [%1]\n" | 104 | " ldrex %0, [%2]\n" |
103 | " teq %0, #0\n" | 105 | " subs %1, %0, %0, ror #16\n" |
104 | " strexeq %0, %2, [%1]" | 106 | " addeq %0, %0, %3\n" |
105 | : "=&r" (tmp) | 107 | " strexeq %1, %0, [%2]" |
106 | : "r" (&lock->lock), "r" (1) | 108 | : "=&r" (slock), "=&r" (tmp) |
109 | : "r" (&lock->slock), "I" (1 << TICKET_SHIFT) | ||
107 | : "cc"); | 110 | : "cc"); |
108 | 111 | ||
109 | if (tmp == 0) { | 112 | if (tmp == 0) { |
@@ -116,17 +119,38 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock) | |||
116 | 119 | ||
117 | static inline void arch_spin_unlock(arch_spinlock_t *lock) | 120 | static inline void arch_spin_unlock(arch_spinlock_t *lock) |
118 | { | 121 | { |
122 | unsigned long tmp; | ||
123 | u32 slock; | ||
124 | |||
119 | smp_mb(); | 125 | smp_mb(); |
120 | 126 | ||
121 | __asm__ __volatile__( | 127 | __asm__ __volatile__( |
122 | " str %1, [%0]\n" | 128 | " mov %1, #1\n" |
123 | : | 129 | "1: ldrex %0, [%2]\n" |
124 | : "r" (&lock->lock), "r" (0) | 130 | " uadd16 %0, %0, %1\n" |
131 | " strex %1, %0, [%2]\n" | ||
132 | " teq %1, #0\n" | ||
133 | " bne 1b" | ||
134 | : "=&r" (slock), "=&r" (tmp) | ||
135 | : "r" (&lock->slock) | ||
125 | : "cc"); | 136 | : "cc"); |
126 | 137 | ||
127 | dsb_sev(); | 138 | dsb_sev(); |
128 | } | 139 | } |
129 | 140 | ||
141 | static inline int arch_spin_is_locked(arch_spinlock_t *lock) | ||
142 | { | ||
143 | struct __raw_tickets tickets = ACCESS_ONCE(lock->tickets); | ||
144 | return tickets.owner != tickets.next; | ||
145 | } | ||
146 | |||
147 | static inline int arch_spin_is_contended(arch_spinlock_t *lock) | ||
148 | { | ||
149 | struct __raw_tickets tickets = ACCESS_ONCE(lock->tickets); | ||
150 | return (tickets.next - tickets.owner) > 1; | ||
151 | } | ||
152 | #define arch_spin_is_contended arch_spin_is_contended | ||
153 | |||
130 | /* | 154 | /* |
131 | * RWLOCKS | 155 | * RWLOCKS |
132 | * | 156 | * |
@@ -158,7 +182,7 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) | |||
158 | unsigned long tmp; | 182 | unsigned long tmp; |
159 | 183 | ||
160 | __asm__ __volatile__( | 184 | __asm__ __volatile__( |
161 | "1: ldrex %0, [%1]\n" | 185 | " ldrex %0, [%1]\n" |
162 | " teq %0, #0\n" | 186 | " teq %0, #0\n" |
163 | " strexeq %0, %2, [%1]" | 187 | " strexeq %0, %2, [%1]" |
164 | : "=&r" (tmp) | 188 | : "=&r" (tmp) |
@@ -244,7 +268,7 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) | |||
244 | unsigned long tmp, tmp2 = 1; | 268 | unsigned long tmp, tmp2 = 1; |
245 | 269 | ||
246 | __asm__ __volatile__( | 270 | __asm__ __volatile__( |
247 | "1: ldrex %0, [%2]\n" | 271 | " ldrex %0, [%2]\n" |
248 | " adds %0, %0, #1\n" | 272 | " adds %0, %0, #1\n" |
249 | " strexpl %1, %0, [%2]\n" | 273 | " strexpl %1, %0, [%2]\n" |
250 | : "=&r" (tmp), "+r" (tmp2) | 274 | : "=&r" (tmp), "+r" (tmp2) |
diff --git a/arch/arm/include/asm/spinlock_types.h b/arch/arm/include/asm/spinlock_types.h index d14d197ae04a..b262d2f8b478 100644 --- a/arch/arm/include/asm/spinlock_types.h +++ b/arch/arm/include/asm/spinlock_types.h | |||
@@ -5,11 +5,24 @@ | |||
5 | # error "please don't include this file directly" | 5 | # error "please don't include this file directly" |
6 | #endif | 6 | #endif |
7 | 7 | ||
8 | #define TICKET_SHIFT 16 | ||
9 | |||
8 | typedef struct { | 10 | typedef struct { |
9 | volatile unsigned int lock; | 11 | union { |
12 | u32 slock; | ||
13 | struct __raw_tickets { | ||
14 | #ifdef __ARMEB__ | ||
15 | u16 next; | ||
16 | u16 owner; | ||
17 | #else | ||
18 | u16 owner; | ||
19 | u16 next; | ||
20 | #endif | ||
21 | } tickets; | ||
22 | }; | ||
10 | } arch_spinlock_t; | 23 | } arch_spinlock_t; |
11 | 24 | ||
12 | #define __ARCH_SPIN_LOCK_UNLOCKED { 0 } | 25 | #define __ARCH_SPIN_LOCK_UNLOCKED { { 0 } } |
13 | 26 | ||
14 | typedef struct { | 27 | typedef struct { |
15 | volatile unsigned int lock; | 28 | volatile unsigned int lock; |
diff --git a/arch/arm/include/asm/timex.h b/arch/arm/include/asm/timex.h index 3be8de3adaba..ce119442277c 100644 --- a/arch/arm/include/asm/timex.h +++ b/arch/arm/include/asm/timex.h | |||
@@ -12,13 +12,15 @@ | |||
12 | #ifndef _ASMARM_TIMEX_H | 12 | #ifndef _ASMARM_TIMEX_H |
13 | #define _ASMARM_TIMEX_H | 13 | #define _ASMARM_TIMEX_H |
14 | 14 | ||
15 | #include <asm/arch_timer.h> | ||
15 | #include <mach/timex.h> | 16 | #include <mach/timex.h> |
16 | 17 | ||
17 | typedef unsigned long cycles_t; | 18 | typedef unsigned long cycles_t; |
18 | 19 | ||
19 | static inline cycles_t get_cycles (void) | 20 | #ifdef ARCH_HAS_READ_CURRENT_TIMER |
20 | { | 21 | #define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; }) |
21 | return 0; | 22 | #else |
22 | } | 23 | #define get_cycles() (0) |
24 | #endif | ||
23 | 25 | ||
24 | #endif | 26 | #endif |
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 71f6536d17ac..479a6352e0b5 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h | |||
@@ -189,6 +189,9 @@ static inline void set_fs(mm_segment_t fs) | |||
189 | 189 | ||
190 | #define access_ok(type,addr,size) (__range_ok(addr,size) == 0) | 190 | #define access_ok(type,addr,size) (__range_ok(addr,size) == 0) |
191 | 191 | ||
192 | #define user_addr_max() \ | ||
193 | (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL) | ||
194 | |||
192 | /* | 195 | /* |
193 | * The "__xxx" versions of the user access functions do not verify the | 196 | * The "__xxx" versions of the user access functions do not verify the |
194 | * address space - it must have been done previously with a separate | 197 | * address space - it must have been done previously with a separate |
@@ -398,9 +401,6 @@ extern unsigned long __must_check __clear_user_std(void __user *addr, unsigned l | |||
398 | #define __clear_user(addr,n) (memset((void __force *)addr, 0, n), 0) | 401 | #define __clear_user(addr,n) (memset((void __force *)addr, 0, n), 0) |
399 | #endif | 402 | #endif |
400 | 403 | ||
401 | extern unsigned long __must_check __strncpy_from_user(char *to, const char __user *from, unsigned long count); | ||
402 | extern unsigned long __must_check __strnlen_user(const char __user *s, long n); | ||
403 | |||
404 | static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) | 404 | static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) |
405 | { | 405 | { |
406 | if (access_ok(VERIFY_READ, from, n)) | 406 | if (access_ok(VERIFY_READ, from, n)) |
@@ -427,24 +427,9 @@ static inline unsigned long __must_check clear_user(void __user *to, unsigned lo | |||
427 | return n; | 427 | return n; |
428 | } | 428 | } |
429 | 429 | ||
430 | static inline long __must_check strncpy_from_user(char *dst, const char __user *src, long count) | 430 | extern long strncpy_from_user(char *dest, const char __user *src, long count); |
431 | { | ||
432 | long res = -EFAULT; | ||
433 | if (access_ok(VERIFY_READ, src, 1)) | ||
434 | res = __strncpy_from_user(dst, src, count); | ||
435 | return res; | ||
436 | } | ||
437 | |||
438 | #define strlen_user(s) strnlen_user(s, ~0UL >> 1) | ||
439 | 431 | ||
440 | static inline long __must_check strnlen_user(const char __user *s, long n) | 432 | extern __must_check long strlen_user(const char __user *str); |
441 | { | 433 | extern __must_check long strnlen_user(const char __user *str, long n); |
442 | unsigned long res = 0; | ||
443 | |||
444 | if (__addr_ok(s)) | ||
445 | res = __strnlen_user(s, n); | ||
446 | |||
447 | return res; | ||
448 | } | ||
449 | 434 | ||
450 | #endif /* _ASMARM_UACCESS_H */ | 435 | #endif /* _ASMARM_UACCESS_H */ |
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 512cd1473454..0cab47d4a83f 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h | |||
@@ -446,7 +446,6 @@ | |||
446 | 446 | ||
447 | #ifdef __KERNEL__ | 447 | #ifdef __KERNEL__ |
448 | 448 | ||
449 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
450 | #define __ARCH_WANT_STAT64 | 449 | #define __ARCH_WANT_STAT64 |
451 | #define __ARCH_WANT_SYS_GETHOSTNAME | 450 | #define __ARCH_WANT_SYS_GETHOSTNAME |
452 | #define __ARCH_WANT_SYS_PAUSE | 451 | #define __ARCH_WANT_SYS_PAUSE |
diff --git a/arch/arm/include/asm/word-at-a-time.h b/arch/arm/include/asm/word-at-a-time.h new file mode 100644 index 000000000000..4d52f92967a6 --- /dev/null +++ b/arch/arm/include/asm/word-at-a-time.h | |||
@@ -0,0 +1,96 @@ | |||
1 | #ifndef __ASM_ARM_WORD_AT_A_TIME_H | ||
2 | #define __ASM_ARM_WORD_AT_A_TIME_H | ||
3 | |||
4 | #ifndef __ARMEB__ | ||
5 | |||
6 | /* | ||
7 | * Little-endian word-at-a-time zero byte handling. | ||
8 | * Heavily based on the x86 algorithm. | ||
9 | */ | ||
10 | #include <linux/kernel.h> | ||
11 | |||
12 | struct word_at_a_time { | ||
13 | const unsigned long one_bits, high_bits; | ||
14 | }; | ||
15 | |||
16 | #define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) } | ||
17 | |||
18 | static inline unsigned long has_zero(unsigned long a, unsigned long *bits, | ||
19 | const struct word_at_a_time *c) | ||
20 | { | ||
21 | unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; | ||
22 | *bits = mask; | ||
23 | return mask; | ||
24 | } | ||
25 | |||
26 | #define prep_zero_mask(a, bits, c) (bits) | ||
27 | |||
28 | static inline unsigned long create_zero_mask(unsigned long bits) | ||
29 | { | ||
30 | bits = (bits - 1) & ~bits; | ||
31 | return bits >> 7; | ||
32 | } | ||
33 | |||
34 | static inline unsigned long find_zero(unsigned long mask) | ||
35 | { | ||
36 | unsigned long ret; | ||
37 | |||
38 | #if __LINUX_ARM_ARCH__ >= 5 | ||
39 | /* We have clz available. */ | ||
40 | ret = fls(mask) >> 3; | ||
41 | #else | ||
42 | /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */ | ||
43 | ret = (0x0ff0001 + mask) >> 23; | ||
44 | /* Fix the 1 for 00 case */ | ||
45 | ret &= mask; | ||
46 | #endif | ||
47 | |||
48 | return ret; | ||
49 | } | ||
50 | |||
51 | #ifdef CONFIG_DCACHE_WORD_ACCESS | ||
52 | |||
53 | #define zero_bytemask(mask) (mask) | ||
54 | |||
55 | /* | ||
56 | * Load an unaligned word from kernel space. | ||
57 | * | ||
58 | * In the (very unlikely) case of the word being a page-crosser | ||
59 | * and the next page not being mapped, take the exception and | ||
60 | * return zeroes in the non-existing part. | ||
61 | */ | ||
62 | static inline unsigned long load_unaligned_zeropad(const void *addr) | ||
63 | { | ||
64 | unsigned long ret, offset; | ||
65 | |||
66 | /* Load word from unaligned pointer addr */ | ||
67 | asm( | ||
68 | "1: ldr %0, [%2]\n" | ||
69 | "2:\n" | ||
70 | " .pushsection .fixup,\"ax\"\n" | ||
71 | " .align 2\n" | ||
72 | "3: and %1, %2, #0x3\n" | ||
73 | " bic %2, %2, #0x3\n" | ||
74 | " ldr %0, [%2]\n" | ||
75 | " lsl %1, %1, #0x3\n" | ||
76 | " lsr %0, %0, %1\n" | ||
77 | " b 2b\n" | ||
78 | " .popsection\n" | ||
79 | " .pushsection __ex_table,\"a\"\n" | ||
80 | " .align 3\n" | ||
81 | " .long 1b, 3b\n" | ||
82 | " .popsection" | ||
83 | : "=&r" (ret), "=&r" (offset) | ||
84 | : "r" (addr), "Qo" (*(unsigned long *)addr)); | ||
85 | |||
86 | return ret; | ||
87 | } | ||
88 | |||
89 | |||
90 | #endif /* DCACHE_WORD_ACCESS */ | ||
91 | |||
92 | #else /* __ARMEB__ */ | ||
93 | #include <asm-generic/word-at-a-time.h> | ||
94 | #endif | ||
95 | |||
96 | #endif /* __ASM_ARM_WORD_AT_A_TIME_H */ | ||
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c index dd58035621f7..cf258807160d 100644 --- a/arch/arm/kernel/arch_timer.c +++ b/arch/arm/kernel/arch_timer.c | |||
@@ -32,6 +32,8 @@ static int arch_timer_ppi2; | |||
32 | 32 | ||
33 | static struct clock_event_device __percpu **arch_timer_evt; | 33 | static struct clock_event_device __percpu **arch_timer_evt; |
34 | 34 | ||
35 | extern void init_current_timer_delay(unsigned long freq); | ||
36 | |||
35 | /* | 37 | /* |
36 | * Architected system timer support. | 38 | * Architected system timer support. |
37 | */ | 39 | */ |
@@ -137,7 +139,7 @@ static int __cpuinit arch_timer_setup(struct clock_event_device *clk) | |||
137 | /* Be safe... */ | 139 | /* Be safe... */ |
138 | arch_timer_disable(); | 140 | arch_timer_disable(); |
139 | 141 | ||
140 | clk->features = CLOCK_EVT_FEAT_ONESHOT; | 142 | clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP; |
141 | clk->name = "arch_sys_timer"; | 143 | clk->name = "arch_sys_timer"; |
142 | clk->rating = 450; | 144 | clk->rating = 450; |
143 | clk->set_mode = arch_timer_set_mode; | 145 | clk->set_mode = arch_timer_set_mode; |
@@ -223,6 +225,14 @@ static cycle_t arch_counter_read(struct clocksource *cs) | |||
223 | return arch_counter_get_cntpct(); | 225 | return arch_counter_get_cntpct(); |
224 | } | 226 | } |
225 | 227 | ||
228 | int read_current_timer(unsigned long *timer_val) | ||
229 | { | ||
230 | if (!arch_timer_rate) | ||
231 | return -ENXIO; | ||
232 | *timer_val = arch_counter_get_cntpct(); | ||
233 | return 0; | ||
234 | } | ||
235 | |||
226 | static struct clocksource clocksource_counter = { | 236 | static struct clocksource clocksource_counter = { |
227 | .name = "arch_sys_counter", | 237 | .name = "arch_sys_counter", |
228 | .rating = 400, | 238 | .rating = 400, |
@@ -296,6 +306,7 @@ static int __init arch_timer_register(void) | |||
296 | if (err) | 306 | if (err) |
297 | goto out_free_irq; | 307 | goto out_free_irq; |
298 | 308 | ||
309 | init_current_timer_delay(arch_timer_rate); | ||
299 | return 0; | 310 | return 0; |
300 | 311 | ||
301 | out_free_irq: | 312 | out_free_irq: |
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index b57c75e0b01f..60d3b738d420 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c | |||
@@ -49,8 +49,7 @@ extern void __aeabi_ulcmp(void); | |||
49 | extern void fpundefinstr(void); | 49 | extern void fpundefinstr(void); |
50 | 50 | ||
51 | /* platform dependent support */ | 51 | /* platform dependent support */ |
52 | EXPORT_SYMBOL(__udelay); | 52 | EXPORT_SYMBOL(arm_delay_ops); |
53 | EXPORT_SYMBOL(__const_udelay); | ||
54 | 53 | ||
55 | /* networking */ | 54 | /* networking */ |
56 | EXPORT_SYMBOL(csum_partial); | 55 | EXPORT_SYMBOL(csum_partial); |
@@ -87,10 +86,6 @@ EXPORT_SYMBOL(memmove); | |||
87 | EXPORT_SYMBOL(memchr); | 86 | EXPORT_SYMBOL(memchr); |
88 | EXPORT_SYMBOL(__memzero); | 87 | EXPORT_SYMBOL(__memzero); |
89 | 88 | ||
90 | /* user mem (segment) */ | ||
91 | EXPORT_SYMBOL(__strnlen_user); | ||
92 | EXPORT_SYMBOL(__strncpy_from_user); | ||
93 | |||
94 | #ifdef CONFIG_MMU | 89 | #ifdef CONFIG_MMU |
95 | EXPORT_SYMBOL(copy_page); | 90 | EXPORT_SYMBOL(copy_page); |
96 | 91 | ||
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 0d1851ca6eb9..0f82098c9bfe 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -244,6 +244,19 @@ svc_preempt: | |||
244 | b 1b | 244 | b 1b |
245 | #endif | 245 | #endif |
246 | 246 | ||
247 | __und_fault: | ||
248 | @ Correct the PC such that it is pointing at the instruction | ||
249 | @ which caused the fault. If the faulting instruction was ARM | ||
250 | @ the PC will be pointing at the next instruction, and have to | ||
251 | @ subtract 4. Otherwise, it is Thumb, and the PC will be | ||
252 | @ pointing at the second half of the Thumb instruction. We | ||
253 | @ have to subtract 2. | ||
254 | ldr r2, [r0, #S_PC] | ||
255 | sub r2, r2, r1 | ||
256 | str r2, [r0, #S_PC] | ||
257 | b do_undefinstr | ||
258 | ENDPROC(__und_fault) | ||
259 | |||
247 | .align 5 | 260 | .align 5 |
248 | __und_svc: | 261 | __und_svc: |
249 | #ifdef CONFIG_KPROBES | 262 | #ifdef CONFIG_KPROBES |
@@ -261,25 +274,32 @@ __und_svc: | |||
261 | @ | 274 | @ |
262 | @ r0 - instruction | 275 | @ r0 - instruction |
263 | @ | 276 | @ |
264 | #ifndef CONFIG_THUMB2_KERNEL | 277 | #ifndef CONFIG_THUMB2_KERNEL |
265 | ldr r0, [r4, #-4] | 278 | ldr r0, [r4, #-4] |
266 | #else | 279 | #else |
280 | mov r1, #2 | ||
267 | ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 | 281 | ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 |
268 | cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 | 282 | cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 |
269 | ldrhhs r9, [r4] @ bottom 16 bits | 283 | blo __und_svc_fault |
270 | orrhs r0, r9, r0, lsl #16 | 284 | ldrh r9, [r4] @ bottom 16 bits |
285 | add r4, r4, #2 | ||
286 | str r4, [sp, #S_PC] | ||
287 | orr r0, r9, r0, lsl #16 | ||
271 | #endif | 288 | #endif |
272 | adr r9, BSYM(1f) | 289 | adr r9, BSYM(__und_svc_finish) |
273 | mov r2, r4 | 290 | mov r2, r4 |
274 | bl call_fpe | 291 | bl call_fpe |
275 | 292 | ||
293 | mov r1, #4 @ PC correction to apply | ||
294 | __und_svc_fault: | ||
276 | mov r0, sp @ struct pt_regs *regs | 295 | mov r0, sp @ struct pt_regs *regs |
277 | bl do_undefinstr | 296 | bl __und_fault |
278 | 297 | ||
279 | @ | 298 | @ |
280 | @ IRQs off again before pulling preserved data off the stack | 299 | @ IRQs off again before pulling preserved data off the stack |
281 | @ | 300 | @ |
282 | 1: disable_irq_notrace | 301 | __und_svc_finish: |
302 | disable_irq_notrace | ||
283 | 303 | ||
284 | @ | 304 | @ |
285 | @ restore SPSR and restart the instruction | 305 | @ restore SPSR and restart the instruction |
@@ -423,25 +443,33 @@ __und_usr: | |||
423 | mov r2, r4 | 443 | mov r2, r4 |
424 | mov r3, r5 | 444 | mov r3, r5 |
425 | 445 | ||
446 | @ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the | ||
447 | @ faulting instruction depending on Thumb mode. | ||
448 | @ r3 = regs->ARM_cpsr | ||
426 | @ | 449 | @ |
427 | @ fall through to the emulation code, which returns using r9 if | 450 | @ The emulation code returns using r9 if it has emulated the |
428 | @ it has emulated the instruction, or the more conventional lr | 451 | @ instruction, or the more conventional lr if we are to treat |
429 | @ if we are to treat this as a real undefined instruction | 452 | @ this as a real undefined instruction |
430 | @ | ||
431 | @ r0 - instruction | ||
432 | @ | 453 | @ |
433 | adr r9, BSYM(ret_from_exception) | 454 | adr r9, BSYM(ret_from_exception) |
434 | adr lr, BSYM(__und_usr_unknown) | 455 | |
435 | tst r3, #PSR_T_BIT @ Thumb mode? | 456 | tst r3, #PSR_T_BIT @ Thumb mode? |
436 | itet eq @ explicit IT needed for the 1f label | 457 | bne __und_usr_thumb |
437 | subeq r4, r2, #4 @ ARM instr at LR - 4 | 458 | sub r4, r2, #4 @ ARM instr at LR - 4 |
438 | subne r4, r2, #2 @ Thumb instr at LR - 2 | 459 | 1: ldrt r0, [r4] |
439 | 1: ldreqt r0, [r4] | ||
440 | #ifdef CONFIG_CPU_ENDIAN_BE8 | 460 | #ifdef CONFIG_CPU_ENDIAN_BE8 |
441 | reveq r0, r0 @ little endian instruction | 461 | rev r0, r0 @ little endian instruction |
442 | #endif | 462 | #endif |
443 | beq call_fpe | 463 | @ r0 = 32-bit ARM instruction which caused the exception |
464 | @ r2 = PC value for the following instruction (:= regs->ARM_pc) | ||
465 | @ r4 = PC value for the faulting instruction | ||
466 | @ lr = 32-bit undefined instruction function | ||
467 | adr lr, BSYM(__und_usr_fault_32) | ||
468 | b call_fpe | ||
469 | |||
470 | __und_usr_thumb: | ||
444 | @ Thumb instruction | 471 | @ Thumb instruction |
472 | sub r4, r2, #2 @ First half of thumb instr at LR - 2 | ||
445 | #if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 | 473 | #if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 |
446 | /* | 474 | /* |
447 | * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms | 475 | * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms |
@@ -455,7 +483,7 @@ __und_usr: | |||
455 | ldr r5, .LCcpu_architecture | 483 | ldr r5, .LCcpu_architecture |
456 | ldr r5, [r5] | 484 | ldr r5, [r5] |
457 | cmp r5, #CPU_ARCH_ARMv7 | 485 | cmp r5, #CPU_ARCH_ARMv7 |
458 | blo __und_usr_unknown | 486 | blo __und_usr_fault_16 @ 16bit undefined instruction |
459 | /* | 487 | /* |
460 | * The following code won't get run unless the running CPU really is v7, so | 488 | * The following code won't get run unless the running CPU really is v7, so |
461 | * coding round the lack of ldrht on older arches is pointless. Temporarily | 489 | * coding round the lack of ldrht on older arches is pointless. Temporarily |
@@ -463,15 +491,18 @@ __und_usr: | |||
463 | */ | 491 | */ |
464 | .arch armv6t2 | 492 | .arch armv6t2 |
465 | #endif | 493 | #endif |
466 | 2: | 494 | 2: ldrht r5, [r4] |
467 | ARM( ldrht r5, [r4], #2 ) | ||
468 | THUMB( ldrht r5, [r4] ) | ||
469 | THUMB( add r4, r4, #2 ) | ||
470 | cmp r5, #0xe800 @ 32bit instruction if xx != 0 | 495 | cmp r5, #0xe800 @ 32bit instruction if xx != 0 |
471 | blo __und_usr_unknown | 496 | blo __und_usr_fault_16 @ 16bit undefined instruction |
472 | 3: ldrht r0, [r4] | 497 | 3: ldrht r0, [r2] |
473 | add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 | 498 | add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 |
499 | str r2, [sp, #S_PC] @ it's a 2x16bit instr, update | ||
474 | orr r0, r0, r5, lsl #16 | 500 | orr r0, r0, r5, lsl #16 |
501 | adr lr, BSYM(__und_usr_fault_32) | ||
502 | @ r0 = the two 16-bit Thumb instructions which caused the exception | ||
503 | @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc) | ||
504 | @ r4 = PC value for the first 16-bit Thumb instruction | ||
505 | @ lr = 32bit undefined instruction function | ||
475 | 506 | ||
476 | #if __LINUX_ARM_ARCH__ < 7 | 507 | #if __LINUX_ARM_ARCH__ < 7 |
477 | /* If the target arch was overridden, change it back: */ | 508 | /* If the target arch was overridden, change it back: */ |
@@ -482,17 +513,13 @@ __und_usr: | |||
482 | #endif | 513 | #endif |
483 | #endif /* __LINUX_ARM_ARCH__ < 7 */ | 514 | #endif /* __LINUX_ARM_ARCH__ < 7 */ |
484 | #else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */ | 515 | #else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */ |
485 | b __und_usr_unknown | 516 | b __und_usr_fault_16 |
486 | #endif | 517 | #endif |
487 | UNWIND(.fnend ) | 518 | UNWIND(.fnend) |
488 | ENDPROC(__und_usr) | 519 | ENDPROC(__und_usr) |
489 | 520 | ||
490 | @ | ||
491 | @ fallthrough to call_fpe | ||
492 | @ | ||
493 | |||
494 | /* | 521 | /* |
495 | * The out of line fixup for the ldrt above. | 522 | * The out of line fixup for the ldrt instructions above. |
496 | */ | 523 | */ |
497 | .pushsection .fixup, "ax" | 524 | .pushsection .fixup, "ax" |
498 | .align 2 | 525 | .align 2 |
@@ -524,11 +551,12 @@ ENDPROC(__und_usr) | |||
524 | * NEON handler code. | 551 | * NEON handler code. |
525 | * | 552 | * |
526 | * Emulators may wish to make use of the following registers: | 553 | * Emulators may wish to make use of the following registers: |
527 | * r0 = instruction opcode. | 554 | * r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) |
528 | * r2 = PC+4 | 555 | * r2 = PC value to resume execution after successful emulation |
529 | * r9 = normal "successful" return address | 556 | * r9 = normal "successful" return address |
530 | * r10 = this threads thread_info structure. | 557 | * r10 = this threads thread_info structure |
531 | * lr = unrecognised instruction return address | 558 | * lr = unrecognised instruction return address |
559 | * IRQs disabled, FIQs enabled. | ||
532 | */ | 560 | */ |
533 | @ | 561 | @ |
534 | @ Fall-through from Thumb-2 __und_usr | 562 | @ Fall-through from Thumb-2 __und_usr |
@@ -659,12 +687,17 @@ ENTRY(no_fp) | |||
659 | mov pc, lr | 687 | mov pc, lr |
660 | ENDPROC(no_fp) | 688 | ENDPROC(no_fp) |
661 | 689 | ||
662 | __und_usr_unknown: | 690 | __und_usr_fault_32: |
663 | enable_irq | 691 | mov r1, #4 |
692 | b 1f | ||
693 | __und_usr_fault_16: | ||
694 | mov r1, #2 | ||
695 | 1: enable_irq | ||
664 | mov r0, sp | 696 | mov r0, sp |
665 | adr lr, BSYM(ret_from_exception) | 697 | adr lr, BSYM(ret_from_exception) |
666 | b do_undefinstr | 698 | b __und_fault |
667 | ENDPROC(__und_usr_unknown) | 699 | ENDPROC(__und_usr_fault_32) |
700 | ENDPROC(__und_usr_fault_16) | ||
668 | 701 | ||
669 | .align 5 | 702 | .align 5 |
670 | __pabt_usr: | 703 | __pabt_usr: |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 4afed88d250a..978eac57e04a 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -51,23 +51,15 @@ ret_fast_syscall: | |||
51 | fast_work_pending: | 51 | fast_work_pending: |
52 | str r0, [sp, #S_R0+S_OFF]! @ returned r0 | 52 | str r0, [sp, #S_R0+S_OFF]! @ returned r0 |
53 | work_pending: | 53 | work_pending: |
54 | tst r1, #_TIF_NEED_RESCHED | ||
55 | bne work_resched | ||
56 | /* | ||
57 | * TIF_SIGPENDING or TIF_NOTIFY_RESUME must've been set if we got here | ||
58 | */ | ||
59 | ldr r2, [sp, #S_PSR] | ||
60 | mov r0, sp @ 'regs' | 54 | mov r0, sp @ 'regs' |
61 | tst r2, #15 @ are we returning to user mode? | ||
62 | bne no_work_pending @ no? just leave, then... | ||
63 | mov r2, why @ 'syscall' | 55 | mov r2, why @ 'syscall' |
64 | tst r1, #_TIF_SIGPENDING @ delivering a signal? | 56 | bl do_work_pending |
65 | movne why, #0 @ prevent further restarts | 57 | cmp r0, #0 |
66 | bl do_notify_resume | 58 | beq no_work_pending |
67 | b ret_slow_syscall @ Check work again | 59 | movlt scno, #(__NR_restart_syscall - __NR_SYSCALL_BASE) |
60 | ldmia sp, {r0 - r6} @ have to reload r0 - r6 | ||
61 | b local_restart @ ... and off we go | ||
68 | 62 | ||
69 | work_resched: | ||
70 | bl schedule | ||
71 | /* | 63 | /* |
72 | * "slow" syscall return path. "why" tells us if this was a real syscall. | 64 | * "slow" syscall return path. "why" tells us if this was a real syscall. |
73 | */ | 65 | */ |
@@ -95,13 +87,7 @@ ENDPROC(ret_to_user) | |||
95 | ENTRY(ret_from_fork) | 87 | ENTRY(ret_from_fork) |
96 | bl schedule_tail | 88 | bl schedule_tail |
97 | get_thread_info tsk | 89 | get_thread_info tsk |
98 | ldr r1, [tsk, #TI_FLAGS] @ check for syscall tracing | ||
99 | mov why, #1 | 90 | mov why, #1 |
100 | tst r1, #_TIF_SYSCALL_WORK @ are we tracing syscalls? | ||
101 | beq ret_slow_syscall | ||
102 | mov r1, sp | ||
103 | mov r0, #1 @ trace exit [IP = 1] | ||
104 | bl syscall_trace | ||
105 | b ret_slow_syscall | 91 | b ret_slow_syscall |
106 | ENDPROC(ret_from_fork) | 92 | ENDPROC(ret_from_fork) |
107 | 93 | ||
@@ -415,6 +401,7 @@ ENTRY(vector_swi) | |||
415 | eor scno, scno, #__NR_SYSCALL_BASE @ check OS number | 401 | eor scno, scno, #__NR_SYSCALL_BASE @ check OS number |
416 | #endif | 402 | #endif |
417 | 403 | ||
404 | local_restart: | ||
418 | ldr r10, [tsk, #TI_FLAGS] @ check for syscall tracing | 405 | ldr r10, [tsk, #TI_FLAGS] @ check for syscall tracing |
419 | stmdb sp!, {r4, r5} @ push fifth and sixth args | 406 | stmdb sp!, {r4, r5} @ push fifth and sixth args |
420 | 407 | ||
@@ -448,25 +435,24 @@ ENDPROC(vector_swi) | |||
448 | * context switches, and waiting for our parent to respond. | 435 | * context switches, and waiting for our parent to respond. |
449 | */ | 436 | */ |
450 | __sys_trace: | 437 | __sys_trace: |
451 | mov r2, scno | 438 | mov r1, scno |
452 | add r1, sp, #S_OFF | 439 | add r0, sp, #S_OFF |
453 | mov r0, #0 @ trace entry [IP = 0] | 440 | bl syscall_trace_enter |
454 | bl syscall_trace | ||
455 | 441 | ||
456 | adr lr, BSYM(__sys_trace_return) @ return address | 442 | adr lr, BSYM(__sys_trace_return) @ return address |
457 | mov scno, r0 @ syscall number (possibly new) | 443 | mov scno, r0 @ syscall number (possibly new) |
458 | add r1, sp, #S_R0 + S_OFF @ pointer to regs | 444 | add r1, sp, #S_R0 + S_OFF @ pointer to regs |
459 | cmp scno, #NR_syscalls @ check upper syscall limit | 445 | cmp scno, #NR_syscalls @ check upper syscall limit |
460 | ldmccia r1, {r0 - r3} @ have to reload r0 - r3 | 446 | ldmccia r1, {r0 - r6} @ have to reload r0 - r6 |
447 | stmccia sp, {r4, r5} @ and update the stack args | ||
461 | ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine | 448 | ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine |
462 | b 2b | 449 | b 2b |
463 | 450 | ||
464 | __sys_trace_return: | 451 | __sys_trace_return: |
465 | str r0, [sp, #S_R0 + S_OFF]! @ save returned r0 | 452 | str r0, [sp, #S_R0 + S_OFF]! @ save returned r0 |
466 | mov r2, scno | 453 | mov r1, scno |
467 | mov r1, sp | 454 | mov r0, sp |
468 | mov r0, #1 @ trace exit [IP = 1] | 455 | bl syscall_trace_exit |
469 | bl syscall_trace | ||
470 | b ret_slow_syscall | 456 | b ret_slow_syscall |
471 | 457 | ||
472 | .align 5 | 458 | .align 5 |
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c index df0bf0c8cb79..34e56647dcee 100644 --- a/arch/arm/kernel/ftrace.c +++ b/arch/arm/kernel/ftrace.c | |||
@@ -179,19 +179,20 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, | |||
179 | old = *parent; | 179 | old = *parent; |
180 | *parent = return_hooker; | 180 | *parent = return_hooker; |
181 | 181 | ||
182 | err = ftrace_push_return_trace(old, self_addr, &trace.depth, | ||
183 | frame_pointer); | ||
184 | if (err == -EBUSY) { | ||
185 | *parent = old; | ||
186 | return; | ||
187 | } | ||
188 | |||
189 | trace.func = self_addr; | 182 | trace.func = self_addr; |
183 | trace.depth = current->curr_ret_stack + 1; | ||
190 | 184 | ||
191 | /* Only trace if the calling function expects to */ | 185 | /* Only trace if the calling function expects to */ |
192 | if (!ftrace_graph_entry(&trace)) { | 186 | if (!ftrace_graph_entry(&trace)) { |
193 | current->curr_ret_stack--; | ||
194 | *parent = old; | 187 | *parent = old; |
188 | return; | ||
189 | } | ||
190 | |||
191 | err = ftrace_push_return_trace(old, self_addr, &trace.depth, | ||
192 | frame_pointer); | ||
193 | if (err == -EBUSY) { | ||
194 | *parent = old; | ||
195 | return; | ||
195 | } | 196 | } |
196 | } | 197 | } |
197 | 198 | ||
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 835898e7d704..3db960e20cb8 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -55,14 +55,6 @@ | |||
55 | add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE | 55 | add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE |
56 | .endm | 56 | .endm |
57 | 57 | ||
58 | #ifdef CONFIG_XIP_KERNEL | ||
59 | #define KERNEL_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) | ||
60 | #define KERNEL_END _edata_loc | ||
61 | #else | ||
62 | #define KERNEL_START KERNEL_RAM_VADDR | ||
63 | #define KERNEL_END _end | ||
64 | #endif | ||
65 | |||
66 | /* | 58 | /* |
67 | * Kernel startup entry point. | 59 | * Kernel startup entry point. |
68 | * --------------------------- | 60 | * --------------------------- |
@@ -218,51 +210,46 @@ __create_page_tables: | |||
218 | blo 1b | 210 | blo 1b |
219 | 211 | ||
220 | /* | 212 | /* |
221 | * Now setup the pagetables for our kernel direct | 213 | * Map our RAM from the start to the end of the kernel .bss section. |
222 | * mapped region. | ||
223 | */ | 214 | */ |
224 | mov r3, pc | 215 | add r0, r4, #PAGE_OFFSET >> (SECTION_SHIFT - PMD_ORDER) |
225 | mov r3, r3, lsr #SECTION_SHIFT | 216 | ldr r6, =(_end - 1) |
226 | orr r3, r7, r3, lsl #SECTION_SHIFT | 217 | orr r3, r8, r7 |
227 | add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) | ||
228 | str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! | ||
229 | ldr r6, =(KERNEL_END - 1) | ||
230 | add r0, r0, #1 << PMD_ORDER | ||
231 | add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) | 218 | add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) |
232 | 1: cmp r0, r6 | 219 | 1: str r3, [r0], #1 << PMD_ORDER |
233 | add r3, r3, #1 << SECTION_SHIFT | 220 | add r3, r3, #1 << SECTION_SHIFT |
234 | strls r3, [r0], #1 << PMD_ORDER | 221 | cmp r0, r6 |
235 | bls 1b | 222 | bls 1b |
236 | 223 | ||
237 | #ifdef CONFIG_XIP_KERNEL | 224 | #ifdef CONFIG_XIP_KERNEL |
238 | /* | 225 | /* |
239 | * Map some ram to cover our .data and .bss areas. | 226 | * Map the kernel image separately as it is not located in RAM. |
240 | */ | 227 | */ |
241 | add r3, r8, #TEXT_OFFSET | 228 | #define XIP_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) |
242 | orr r3, r3, r7 | 229 | mov r3, pc |
243 | add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) | 230 | mov r3, r3, lsr #SECTION_SHIFT |
244 | str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]! | 231 | orr r3, r7, r3, lsl #SECTION_SHIFT |
245 | ldr r6, =(_end - 1) | 232 | add r0, r4, #(XIP_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) |
246 | add r0, r0, #4 | 233 | str r3, [r0, #((XIP_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! |
234 | ldr r6, =(_edata_loc - 1) | ||
235 | add r0, r0, #1 << PMD_ORDER | ||
247 | add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) | 236 | add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) |
248 | 1: cmp r0, r6 | 237 | 1: cmp r0, r6 |
249 | add r3, r3, #1 << 20 | 238 | add r3, r3, #1 << SECTION_SHIFT |
250 | strls r3, [r0], #4 | 239 | strls r3, [r0], #1 << PMD_ORDER |
251 | bls 1b | 240 | bls 1b |
252 | #endif | 241 | #endif |
253 | 242 | ||
254 | /* | 243 | /* |
255 | * Then map boot params address in r2 or the first 1MB (2MB with LPAE) | 244 | * Then map boot params address in r2 if specified. |
256 | * of ram if boot params address is not specified. | ||
257 | */ | 245 | */ |
258 | mov r0, r2, lsr #SECTION_SHIFT | 246 | mov r0, r2, lsr #SECTION_SHIFT |
259 | movs r0, r0, lsl #SECTION_SHIFT | 247 | movs r0, r0, lsl #SECTION_SHIFT |
260 | moveq r0, r8 | 248 | subne r3, r0, r8 |
261 | sub r3, r0, r8 | 249 | addne r3, r3, #PAGE_OFFSET |
262 | add r3, r3, #PAGE_OFFSET | 250 | addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) |
263 | add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) | 251 | orrne r6, r7, r0 |
264 | orr r6, r7, r0 | 252 | strne r6, [r3] |
265 | str r6, [r3] | ||
266 | 253 | ||
267 | #ifdef CONFIG_DEBUG_LL | 254 | #ifdef CONFIG_DEBUG_LL |
268 | #if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING) | 255 | #if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING) |
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index a02eada3aa5d..ab243b87118d 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -47,17 +47,14 @@ static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); | |||
47 | /* Set at runtime when we know what CPU type we are. */ | 47 | /* Set at runtime when we know what CPU type we are. */ |
48 | static struct arm_pmu *cpu_pmu; | 48 | static struct arm_pmu *cpu_pmu; |
49 | 49 | ||
50 | enum arm_perf_pmu_ids | 50 | const char *perf_pmu_name(void) |
51 | armpmu_get_pmu_id(void) | ||
52 | { | 51 | { |
53 | int id = -ENODEV; | 52 | if (!cpu_pmu) |
54 | 53 | return NULL; | |
55 | if (cpu_pmu != NULL) | ||
56 | id = cpu_pmu->id; | ||
57 | 54 | ||
58 | return id; | 55 | return cpu_pmu->pmu.name; |
59 | } | 56 | } |
60 | EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); | 57 | EXPORT_SYMBOL_GPL(perf_pmu_name); |
61 | 58 | ||
62 | int perf_num_counters(void) | 59 | int perf_num_counters(void) |
63 | { | 60 | { |
@@ -760,7 +757,7 @@ init_hw_perf_events(void) | |||
760 | cpu_pmu->name, cpu_pmu->num_events); | 757 | cpu_pmu->name, cpu_pmu->num_events); |
761 | cpu_pmu_init(cpu_pmu); | 758 | cpu_pmu_init(cpu_pmu); |
762 | register_cpu_notifier(&pmu_cpu_notifier); | 759 | register_cpu_notifier(&pmu_cpu_notifier); |
763 | armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); | 760 | armpmu_register(cpu_pmu, cpu_pmu->name, PERF_TYPE_RAW); |
764 | } else { | 761 | } else { |
765 | pr_info("no hardware support available\n"); | 762 | pr_info("no hardware support available\n"); |
766 | } | 763 | } |
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c index ab627a740fa3..c90fcb2b6967 100644 --- a/arch/arm/kernel/perf_event_v6.c +++ b/arch/arm/kernel/perf_event_v6.c | |||
@@ -650,7 +650,6 @@ static int armv6_map_event(struct perf_event *event) | |||
650 | } | 650 | } |
651 | 651 | ||
652 | static struct arm_pmu armv6pmu = { | 652 | static struct arm_pmu armv6pmu = { |
653 | .id = ARM_PERF_PMU_ID_V6, | ||
654 | .name = "v6", | 653 | .name = "v6", |
655 | .handle_irq = armv6pmu_handle_irq, | 654 | .handle_irq = armv6pmu_handle_irq, |
656 | .enable = armv6pmu_enable_event, | 655 | .enable = armv6pmu_enable_event, |
@@ -685,7 +684,6 @@ static int armv6mpcore_map_event(struct perf_event *event) | |||
685 | } | 684 | } |
686 | 685 | ||
687 | static struct arm_pmu armv6mpcore_pmu = { | 686 | static struct arm_pmu armv6mpcore_pmu = { |
688 | .id = ARM_PERF_PMU_ID_V6MP, | ||
689 | .name = "v6mpcore", | 687 | .name = "v6mpcore", |
690 | .handle_irq = armv6pmu_handle_irq, | 688 | .handle_irq = armv6pmu_handle_irq, |
691 | .enable = armv6pmu_enable_event, | 689 | .enable = armv6pmu_enable_event, |
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index d3c536068162..f04070bd2183 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c | |||
@@ -1258,7 +1258,6 @@ static u32 __init armv7_read_num_pmnc_events(void) | |||
1258 | 1258 | ||
1259 | static struct arm_pmu *__init armv7_a8_pmu_init(void) | 1259 | static struct arm_pmu *__init armv7_a8_pmu_init(void) |
1260 | { | 1260 | { |
1261 | armv7pmu.id = ARM_PERF_PMU_ID_CA8; | ||
1262 | armv7pmu.name = "ARMv7 Cortex-A8"; | 1261 | armv7pmu.name = "ARMv7 Cortex-A8"; |
1263 | armv7pmu.map_event = armv7_a8_map_event; | 1262 | armv7pmu.map_event = armv7_a8_map_event; |
1264 | armv7pmu.num_events = armv7_read_num_pmnc_events(); | 1263 | armv7pmu.num_events = armv7_read_num_pmnc_events(); |
@@ -1267,7 +1266,6 @@ static struct arm_pmu *__init armv7_a8_pmu_init(void) | |||
1267 | 1266 | ||
1268 | static struct arm_pmu *__init armv7_a9_pmu_init(void) | 1267 | static struct arm_pmu *__init armv7_a9_pmu_init(void) |
1269 | { | 1268 | { |
1270 | armv7pmu.id = ARM_PERF_PMU_ID_CA9; | ||
1271 | armv7pmu.name = "ARMv7 Cortex-A9"; | 1269 | armv7pmu.name = "ARMv7 Cortex-A9"; |
1272 | armv7pmu.map_event = armv7_a9_map_event; | 1270 | armv7pmu.map_event = armv7_a9_map_event; |
1273 | armv7pmu.num_events = armv7_read_num_pmnc_events(); | 1271 | armv7pmu.num_events = armv7_read_num_pmnc_events(); |
@@ -1276,7 +1274,6 @@ static struct arm_pmu *__init armv7_a9_pmu_init(void) | |||
1276 | 1274 | ||
1277 | static struct arm_pmu *__init armv7_a5_pmu_init(void) | 1275 | static struct arm_pmu *__init armv7_a5_pmu_init(void) |
1278 | { | 1276 | { |
1279 | armv7pmu.id = ARM_PERF_PMU_ID_CA5; | ||
1280 | armv7pmu.name = "ARMv7 Cortex-A5"; | 1277 | armv7pmu.name = "ARMv7 Cortex-A5"; |
1281 | armv7pmu.map_event = armv7_a5_map_event; | 1278 | armv7pmu.map_event = armv7_a5_map_event; |
1282 | armv7pmu.num_events = armv7_read_num_pmnc_events(); | 1279 | armv7pmu.num_events = armv7_read_num_pmnc_events(); |
@@ -1285,7 +1282,6 @@ static struct arm_pmu *__init armv7_a5_pmu_init(void) | |||
1285 | 1282 | ||
1286 | static struct arm_pmu *__init armv7_a15_pmu_init(void) | 1283 | static struct arm_pmu *__init armv7_a15_pmu_init(void) |
1287 | { | 1284 | { |
1288 | armv7pmu.id = ARM_PERF_PMU_ID_CA15; | ||
1289 | armv7pmu.name = "ARMv7 Cortex-A15"; | 1285 | armv7pmu.name = "ARMv7 Cortex-A15"; |
1290 | armv7pmu.map_event = armv7_a15_map_event; | 1286 | armv7pmu.map_event = armv7_a15_map_event; |
1291 | armv7pmu.num_events = armv7_read_num_pmnc_events(); | 1287 | armv7pmu.num_events = armv7_read_num_pmnc_events(); |
@@ -1295,7 +1291,6 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void) | |||
1295 | 1291 | ||
1296 | static struct arm_pmu *__init armv7_a7_pmu_init(void) | 1292 | static struct arm_pmu *__init armv7_a7_pmu_init(void) |
1297 | { | 1293 | { |
1298 | armv7pmu.id = ARM_PERF_PMU_ID_CA7; | ||
1299 | armv7pmu.name = "ARMv7 Cortex-A7"; | 1294 | armv7pmu.name = "ARMv7 Cortex-A7"; |
1300 | armv7pmu.map_event = armv7_a7_map_event; | 1295 | armv7pmu.map_event = armv7_a7_map_event; |
1301 | armv7pmu.num_events = armv7_read_num_pmnc_events(); | 1296 | armv7pmu.num_events = armv7_read_num_pmnc_events(); |
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c index e34e7254e652..f759fe0bab63 100644 --- a/arch/arm/kernel/perf_event_xscale.c +++ b/arch/arm/kernel/perf_event_xscale.c | |||
@@ -435,7 +435,6 @@ static int xscale_map_event(struct perf_event *event) | |||
435 | } | 435 | } |
436 | 436 | ||
437 | static struct arm_pmu xscale1pmu = { | 437 | static struct arm_pmu xscale1pmu = { |
438 | .id = ARM_PERF_PMU_ID_XSCALE1, | ||
439 | .name = "xscale1", | 438 | .name = "xscale1", |
440 | .handle_irq = xscale1pmu_handle_irq, | 439 | .handle_irq = xscale1pmu_handle_irq, |
441 | .enable = xscale1pmu_enable_event, | 440 | .enable = xscale1pmu_enable_event, |
@@ -803,7 +802,6 @@ xscale2pmu_write_counter(int counter, u32 val) | |||
803 | } | 802 | } |
804 | 803 | ||
805 | static struct arm_pmu xscale2pmu = { | 804 | static struct arm_pmu xscale2pmu = { |
806 | .id = ARM_PERF_PMU_ID_XSCALE2, | ||
807 | .name = "xscale2", | 805 | .name = "xscale2", |
808 | .handle_irq = xscale2pmu_handle_irq, | 806 | .handle_irq = xscale2pmu_handle_irq, |
809 | .enable = xscale2pmu_enable_event, | 807 | .enable = xscale2pmu_enable_event, |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 19c95ea65b2f..693b744fd572 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -247,6 +247,7 @@ void machine_shutdown(void) | |||
247 | void machine_halt(void) | 247 | void machine_halt(void) |
248 | { | 248 | { |
249 | machine_shutdown(); | 249 | machine_shutdown(); |
250 | local_irq_disable(); | ||
250 | while (1); | 251 | while (1); |
251 | } | 252 | } |
252 | 253 | ||
@@ -268,6 +269,7 @@ void machine_restart(char *cmd) | |||
268 | 269 | ||
269 | /* Whoops - the platform was unable to reboot. Tell the user! */ | 270 | /* Whoops - the platform was unable to reboot. Tell the user! */ |
270 | printk("Reboot failed -- System halted\n"); | 271 | printk("Reboot failed -- System halted\n"); |
272 | local_irq_disable(); | ||
271 | while (1); | 273 | while (1); |
272 | } | 274 | } |
273 | 275 | ||
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 14e38261cd31..3e0fc5f7ed4b 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/regset.h> | 25 | #include <linux/regset.h> |
26 | #include <linux/audit.h> | 26 | #include <linux/audit.h> |
27 | #include <linux/tracehook.h> | 27 | #include <linux/tracehook.h> |
28 | #include <linux/unistd.h> | ||
28 | 29 | ||
29 | #include <asm/pgtable.h> | 30 | #include <asm/pgtable.h> |
30 | #include <asm/traps.h> | 31 | #include <asm/traps.h> |
@@ -907,16 +908,16 @@ long arch_ptrace(struct task_struct *child, long request, | |||
907 | return ret; | 908 | return ret; |
908 | } | 909 | } |
909 | 910 | ||
910 | asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | 911 | enum ptrace_syscall_dir { |
912 | PTRACE_SYSCALL_ENTER = 0, | ||
913 | PTRACE_SYSCALL_EXIT, | ||
914 | }; | ||
915 | |||
916 | static int ptrace_syscall_trace(struct pt_regs *regs, int scno, | ||
917 | enum ptrace_syscall_dir dir) | ||
911 | { | 918 | { |
912 | unsigned long ip; | 919 | unsigned long ip; |
913 | 920 | ||
914 | if (why) | ||
915 | audit_syscall_exit(regs); | ||
916 | else | ||
917 | audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, | ||
918 | regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); | ||
919 | |||
920 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | 921 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) |
921 | return scno; | 922 | return scno; |
922 | 923 | ||
@@ -927,14 +928,28 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | |||
927 | * IP = 0 -> entry, =1 -> exit | 928 | * IP = 0 -> entry, =1 -> exit |
928 | */ | 929 | */ |
929 | ip = regs->ARM_ip; | 930 | ip = regs->ARM_ip; |
930 | regs->ARM_ip = why; | 931 | regs->ARM_ip = dir; |
931 | 932 | ||
932 | if (why) | 933 | if (dir == PTRACE_SYSCALL_EXIT) |
933 | tracehook_report_syscall_exit(regs, 0); | 934 | tracehook_report_syscall_exit(regs, 0); |
934 | else if (tracehook_report_syscall_entry(regs)) | 935 | else if (tracehook_report_syscall_entry(regs)) |
935 | current_thread_info()->syscall = -1; | 936 | current_thread_info()->syscall = -1; |
936 | 937 | ||
937 | regs->ARM_ip = ip; | 938 | regs->ARM_ip = ip; |
938 | |||
939 | return current_thread_info()->syscall; | 939 | return current_thread_info()->syscall; |
940 | } | 940 | } |
941 | |||
942 | asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) | ||
943 | { | ||
944 | int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER); | ||
945 | audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1, | ||
946 | regs->ARM_r2, regs->ARM_r3); | ||
947 | return ret; | ||
948 | } | ||
949 | |||
950 | asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno) | ||
951 | { | ||
952 | int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT); | ||
953 | audit_syscall_exit(regs); | ||
954 | return ret; | ||
955 | } | ||
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index e15d83bb4ea3..a81dcecc7343 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -508,7 +508,7 @@ void __init dump_machine_table(void) | |||
508 | /* can't use cpu_relax() here as it may require MMU setup */; | 508 | /* can't use cpu_relax() here as it may require MMU setup */; |
509 | } | 509 | } |
510 | 510 | ||
511 | int __init arm_add_memory(phys_addr_t start, unsigned long size) | 511 | int __init arm_add_memory(phys_addr_t start, phys_addr_t size) |
512 | { | 512 | { |
513 | struct membank *bank = &meminfo.bank[meminfo.nr_banks]; | 513 | struct membank *bank = &meminfo.bank[meminfo.nr_banks]; |
514 | 514 | ||
@@ -538,7 +538,7 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size) | |||
538 | } | 538 | } |
539 | #endif | 539 | #endif |
540 | 540 | ||
541 | bank->size = size & PAGE_MASK; | 541 | bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1); |
542 | 542 | ||
543 | /* | 543 | /* |
544 | * Check whether this memory region has non-zero size or | 544 | * Check whether this memory region has non-zero size or |
@@ -558,7 +558,7 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size) | |||
558 | static int __init early_mem(char *p) | 558 | static int __init early_mem(char *p) |
559 | { | 559 | { |
560 | static int usermem __initdata = 0; | 560 | static int usermem __initdata = 0; |
561 | unsigned long size; | 561 | phys_addr_t size; |
562 | phys_addr_t start; | 562 | phys_addr_t start; |
563 | char *endp; | 563 | char *endp; |
564 | 564 | ||
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 536c5d6b340b..f27789e4e38a 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -27,7 +27,6 @@ | |||
27 | */ | 27 | */ |
28 | #define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) | 28 | #define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) |
29 | #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) | 29 | #define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) |
30 | #define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE) | ||
31 | 30 | ||
32 | /* | 31 | /* |
33 | * With EABI, the syscall number has to be loaded into r7. | 32 | * With EABI, the syscall number has to be loaded into r7. |
@@ -48,18 +47,6 @@ const unsigned long sigreturn_codes[7] = { | |||
48 | }; | 47 | }; |
49 | 48 | ||
50 | /* | 49 | /* |
51 | * Either we support OABI only, or we have EABI with the OABI | ||
52 | * compat layer enabled. In the later case we don't know if | ||
53 | * user space is EABI or not, and if not we must not clobber r7. | ||
54 | * Always using the OABI syscall solves that issue and works for | ||
55 | * all those cases. | ||
56 | */ | ||
57 | const unsigned long syscall_restart_code[2] = { | ||
58 | SWI_SYS_RESTART, /* swi __NR_restart_syscall */ | ||
59 | 0xe49df004, /* ldr pc, [sp], #4 */ | ||
60 | }; | ||
61 | |||
62 | /* | ||
63 | * atomically swap in the new signal mask, and wait for a signal. | 50 | * atomically swap in the new signal mask, and wait for a signal. |
64 | */ | 51 | */ |
65 | asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) | 52 | asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) |
@@ -582,12 +569,13 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, | |||
582 | * the kernel can handle, and then we build all the user-level signal handling | 569 | * the kernel can handle, and then we build all the user-level signal handling |
583 | * stack-frames in one go after that. | 570 | * stack-frames in one go after that. |
584 | */ | 571 | */ |
585 | static void do_signal(struct pt_regs *regs, int syscall) | 572 | static int do_signal(struct pt_regs *regs, int syscall) |
586 | { | 573 | { |
587 | unsigned int retval = 0, continue_addr = 0, restart_addr = 0; | 574 | unsigned int retval = 0, continue_addr = 0, restart_addr = 0; |
588 | struct k_sigaction ka; | 575 | struct k_sigaction ka; |
589 | siginfo_t info; | 576 | siginfo_t info; |
590 | int signr; | 577 | int signr; |
578 | int restart = 0; | ||
591 | 579 | ||
592 | /* | 580 | /* |
593 | * If we were from a system call, check for system call restarting... | 581 | * If we were from a system call, check for system call restarting... |
@@ -602,15 +590,15 @@ static void do_signal(struct pt_regs *regs, int syscall) | |||
602 | * debugger will see the already changed PSW. | 590 | * debugger will see the already changed PSW. |
603 | */ | 591 | */ |
604 | switch (retval) { | 592 | switch (retval) { |
593 | case -ERESTART_RESTARTBLOCK: | ||
594 | restart -= 2; | ||
605 | case -ERESTARTNOHAND: | 595 | case -ERESTARTNOHAND: |
606 | case -ERESTARTSYS: | 596 | case -ERESTARTSYS: |
607 | case -ERESTARTNOINTR: | 597 | case -ERESTARTNOINTR: |
598 | restart++; | ||
608 | regs->ARM_r0 = regs->ARM_ORIG_r0; | 599 | regs->ARM_r0 = regs->ARM_ORIG_r0; |
609 | regs->ARM_pc = restart_addr; | 600 | regs->ARM_pc = restart_addr; |
610 | break; | 601 | break; |
611 | case -ERESTART_RESTARTBLOCK: | ||
612 | regs->ARM_r0 = -EINTR; | ||
613 | break; | ||
614 | } | 602 | } |
615 | } | 603 | } |
616 | 604 | ||
@@ -619,14 +607,17 @@ static void do_signal(struct pt_regs *regs, int syscall) | |||
619 | * point the debugger may change all our registers ... | 607 | * point the debugger may change all our registers ... |
620 | */ | 608 | */ |
621 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); | 609 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); |
610 | /* | ||
611 | * Depending on the signal settings we may need to revert the | ||
612 | * decision to restart the system call. But skip this if a | ||
613 | * debugger has chosen to restart at a different PC. | ||
614 | */ | ||
615 | if (regs->ARM_pc != restart_addr) | ||
616 | restart = 0; | ||
622 | if (signr > 0) { | 617 | if (signr > 0) { |
623 | /* | 618 | if (unlikely(restart)) { |
624 | * Depending on the signal settings we may need to revert the | 619 | if (retval == -ERESTARTNOHAND || |
625 | * decision to restart the system call. But skip this if a | 620 | retval == -ERESTART_RESTARTBLOCK |
626 | * debugger has chosen to restart at a different PC. | ||
627 | */ | ||
628 | if (regs->ARM_pc == restart_addr) { | ||
629 | if (retval == -ERESTARTNOHAND | ||
630 | || (retval == -ERESTARTSYS | 621 | || (retval == -ERESTARTSYS |
631 | && !(ka.sa.sa_flags & SA_RESTART))) { | 622 | && !(ka.sa.sa_flags & SA_RESTART))) { |
632 | regs->ARM_r0 = -EINTR; | 623 | regs->ARM_r0 = -EINTR; |
@@ -635,52 +626,43 @@ static void do_signal(struct pt_regs *regs, int syscall) | |||
635 | } | 626 | } |
636 | 627 | ||
637 | handle_signal(signr, &ka, &info, regs); | 628 | handle_signal(signr, &ka, &info, regs); |
638 | return; | 629 | return 0; |
639 | } | ||
640 | |||
641 | if (syscall) { | ||
642 | /* | ||
643 | * Handle restarting a different system call. As above, | ||
644 | * if a debugger has chosen to restart at a different PC, | ||
645 | * ignore the restart. | ||
646 | */ | ||
647 | if (retval == -ERESTART_RESTARTBLOCK | ||
648 | && regs->ARM_pc == continue_addr) { | ||
649 | if (thumb_mode(regs)) { | ||
650 | regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE; | ||
651 | regs->ARM_pc -= 2; | ||
652 | } else { | ||
653 | #if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT) | ||
654 | regs->ARM_r7 = __NR_restart_syscall; | ||
655 | regs->ARM_pc -= 4; | ||
656 | #else | ||
657 | u32 __user *usp; | ||
658 | |||
659 | regs->ARM_sp -= 4; | ||
660 | usp = (u32 __user *)regs->ARM_sp; | ||
661 | |||
662 | if (put_user(regs->ARM_pc, usp) == 0) { | ||
663 | regs->ARM_pc = KERN_RESTART_CODE; | ||
664 | } else { | ||
665 | regs->ARM_sp += 4; | ||
666 | force_sigsegv(0, current); | ||
667 | } | ||
668 | #endif | ||
669 | } | ||
670 | } | ||
671 | } | 630 | } |
672 | 631 | ||
673 | restore_saved_sigmask(); | 632 | restore_saved_sigmask(); |
633 | if (unlikely(restart)) | ||
634 | regs->ARM_pc = continue_addr; | ||
635 | return restart; | ||
674 | } | 636 | } |
675 | 637 | ||
676 | asmlinkage void | 638 | asmlinkage int |
677 | do_notify_resume(struct pt_regs *regs, unsigned int thread_flags, int syscall) | 639 | do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) |
678 | { | 640 | { |
679 | if (thread_flags & _TIF_SIGPENDING) | 641 | do { |
680 | do_signal(regs, syscall); | 642 | if (likely(thread_flags & _TIF_NEED_RESCHED)) { |
681 | 643 | schedule(); | |
682 | if (thread_flags & _TIF_NOTIFY_RESUME) { | 644 | } else { |
683 | clear_thread_flag(TIF_NOTIFY_RESUME); | 645 | if (unlikely(!user_mode(regs))) |
684 | tracehook_notify_resume(regs); | 646 | return 0; |
685 | } | 647 | local_irq_enable(); |
648 | if (thread_flags & _TIF_SIGPENDING) { | ||
649 | int restart = do_signal(regs, syscall); | ||
650 | if (unlikely(restart)) { | ||
651 | /* | ||
652 | * Restart without handlers. | ||
653 | * Deal with it without leaving | ||
654 | * the kernel space. | ||
655 | */ | ||
656 | return restart; | ||
657 | } | ||
658 | syscall = 0; | ||
659 | } else { | ||
660 | clear_thread_flag(TIF_NOTIFY_RESUME); | ||
661 | tracehook_notify_resume(regs); | ||
662 | } | ||
663 | } | ||
664 | local_irq_disable(); | ||
665 | thread_flags = current_thread_info()->flags; | ||
666 | } while (thread_flags & _TIF_WORK_MASK); | ||
667 | return 0; | ||
686 | } | 668 | } |
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h index 6fcfe8398aa4..5ff067b7c752 100644 --- a/arch/arm/kernel/signal.h +++ b/arch/arm/kernel/signal.h | |||
@@ -8,7 +8,5 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | #define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) | 10 | #define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) |
11 | #define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes)) | ||
12 | 11 | ||
13 | extern const unsigned long sigreturn_codes[7]; | 12 | extern const unsigned long sigreturn_codes[7]; |
14 | extern const unsigned long syscall_restart_code[2]; | ||
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 2c7217d971db..ebd8ad274d76 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -179,7 +179,7 @@ void __ref cpu_die(void) | |||
179 | mb(); | 179 | mb(); |
180 | 180 | ||
181 | /* Tell __cpu_die() that this CPU is now safe to dispose of */ | 181 | /* Tell __cpu_die() that this CPU is now safe to dispose of */ |
182 | complete(&cpu_died); | 182 | RCU_NONIDLE(complete(&cpu_died)); |
183 | 183 | ||
184 | /* | 184 | /* |
185 | * actual CPU shutdown procedure is at least platform (if not | 185 | * actual CPU shutdown procedure is at least platform (if not |
@@ -563,7 +563,8 @@ void smp_send_stop(void) | |||
563 | 563 | ||
564 | cpumask_copy(&mask, cpu_online_mask); | 564 | cpumask_copy(&mask, cpu_online_mask); |
565 | cpumask_clear_cpu(smp_processor_id(), &mask); | 565 | cpumask_clear_cpu(smp_processor_id(), &mask); |
566 | smp_cross_call(&mask, IPI_CPU_STOP); | 566 | if (!cpumask_empty(&mask)) |
567 | smp_cross_call(&mask, IPI_CPU_STOP); | ||
567 | 568 | ||
568 | /* Wait up to one second for other CPUs to stop */ | 569 | /* Wait up to one second for other CPUs to stop */ |
569 | timeout = USEC_PER_SEC; | 570 | timeout = USEC_PER_SEC; |
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 8200deaa14f6..198b08456e90 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c | |||
@@ -17,11 +17,190 @@ | |||
17 | #include <linux/percpu.h> | 17 | #include <linux/percpu.h> |
18 | #include <linux/node.h> | 18 | #include <linux/node.h> |
19 | #include <linux/nodemask.h> | 19 | #include <linux/nodemask.h> |
20 | #include <linux/of.h> | ||
20 | #include <linux/sched.h> | 21 | #include <linux/sched.h> |
22 | #include <linux/slab.h> | ||
21 | 23 | ||
22 | #include <asm/cputype.h> | 24 | #include <asm/cputype.h> |
23 | #include <asm/topology.h> | 25 | #include <asm/topology.h> |
24 | 26 | ||
27 | /* | ||
28 | * cpu power scale management | ||
29 | */ | ||
30 | |||
31 | /* | ||
32 | * cpu power table | ||
33 | * This per cpu data structure describes the relative capacity of each core. | ||
34 | * On a heteregenous system, cores don't have the same computation capacity | ||
35 | * and we reflect that difference in the cpu_power field so the scheduler can | ||
36 | * take this difference into account during load balance. A per cpu structure | ||
37 | * is preferred because each CPU updates its own cpu_power field during the | ||
38 | * load balance except for idle cores. One idle core is selected to run the | ||
39 | * rebalance_domains for all idle cores and the cpu_power can be updated | ||
40 | * during this sequence. | ||
41 | */ | ||
42 | static DEFINE_PER_CPU(unsigned long, cpu_scale); | ||
43 | |||
44 | unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) | ||
45 | { | ||
46 | return per_cpu(cpu_scale, cpu); | ||
47 | } | ||
48 | |||
49 | static void set_power_scale(unsigned int cpu, unsigned long power) | ||
50 | { | ||
51 | per_cpu(cpu_scale, cpu) = power; | ||
52 | } | ||
53 | |||
54 | #ifdef CONFIG_OF | ||
55 | struct cpu_efficiency { | ||
56 | const char *compatible; | ||
57 | unsigned long efficiency; | ||
58 | }; | ||
59 | |||
60 | /* | ||
61 | * Table of relative efficiency of each processors | ||
62 | * The efficiency value must fit in 20bit and the final | ||
63 | * cpu_scale value must be in the range | ||
64 | * 0 < cpu_scale < 3*SCHED_POWER_SCALE/2 | ||
65 | * in order to return at most 1 when DIV_ROUND_CLOSEST | ||
66 | * is used to compute the capacity of a CPU. | ||
67 | * Processors that are not defined in the table, | ||
68 | * use the default SCHED_POWER_SCALE value for cpu_scale. | ||
69 | */ | ||
70 | struct cpu_efficiency table_efficiency[] = { | ||
71 | {"arm,cortex-a15", 3891}, | ||
72 | {"arm,cortex-a7", 2048}, | ||
73 | {NULL, }, | ||
74 | }; | ||
75 | |||
76 | struct cpu_capacity { | ||
77 | unsigned long hwid; | ||
78 | unsigned long capacity; | ||
79 | }; | ||
80 | |||
81 | struct cpu_capacity *cpu_capacity; | ||
82 | |||
83 | unsigned long middle_capacity = 1; | ||
84 | |||
85 | /* | ||
86 | * Iterate all CPUs' descriptor in DT and compute the efficiency | ||
87 | * (as per table_efficiency). Also calculate a middle efficiency | ||
88 | * as close as possible to (max{eff_i} - min{eff_i}) / 2 | ||
89 | * This is later used to scale the cpu_power field such that an | ||
90 | * 'average' CPU is of middle power. Also see the comments near | ||
91 | * table_efficiency[] and update_cpu_power(). | ||
92 | */ | ||
93 | static void __init parse_dt_topology(void) | ||
94 | { | ||
95 | struct cpu_efficiency *cpu_eff; | ||
96 | struct device_node *cn = NULL; | ||
97 | unsigned long min_capacity = (unsigned long)(-1); | ||
98 | unsigned long max_capacity = 0; | ||
99 | unsigned long capacity = 0; | ||
100 | int alloc_size, cpu = 0; | ||
101 | |||
102 | alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity); | ||
103 | cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT); | ||
104 | |||
105 | while ((cn = of_find_node_by_type(cn, "cpu"))) { | ||
106 | const u32 *rate, *reg; | ||
107 | int len; | ||
108 | |||
109 | if (cpu >= num_possible_cpus()) | ||
110 | break; | ||
111 | |||
112 | for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) | ||
113 | if (of_device_is_compatible(cn, cpu_eff->compatible)) | ||
114 | break; | ||
115 | |||
116 | if (cpu_eff->compatible == NULL) | ||
117 | continue; | ||
118 | |||
119 | rate = of_get_property(cn, "clock-frequency", &len); | ||
120 | if (!rate || len != 4) { | ||
121 | pr_err("%s missing clock-frequency property\n", | ||
122 | cn->full_name); | ||
123 | continue; | ||
124 | } | ||
125 | |||
126 | reg = of_get_property(cn, "reg", &len); | ||
127 | if (!reg || len != 4) { | ||
128 | pr_err("%s missing reg property\n", cn->full_name); | ||
129 | continue; | ||
130 | } | ||
131 | |||
132 | capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; | ||
133 | |||
134 | /* Save min capacity of the system */ | ||
135 | if (capacity < min_capacity) | ||
136 | min_capacity = capacity; | ||
137 | |||
138 | /* Save max capacity of the system */ | ||
139 | if (capacity > max_capacity) | ||
140 | max_capacity = capacity; | ||
141 | |||
142 | cpu_capacity[cpu].capacity = capacity; | ||
143 | cpu_capacity[cpu++].hwid = be32_to_cpup(reg); | ||
144 | } | ||
145 | |||
146 | if (cpu < num_possible_cpus()) | ||
147 | cpu_capacity[cpu].hwid = (unsigned long)(-1); | ||
148 | |||
149 | /* If min and max capacities are equals, we bypass the update of the | ||
150 | * cpu_scale because all CPUs have the same capacity. Otherwise, we | ||
151 | * compute a middle_capacity factor that will ensure that the capacity | ||
152 | * of an 'average' CPU of the system will be as close as possible to | ||
153 | * SCHED_POWER_SCALE, which is the default value, but with the | ||
154 | * constraint explained near table_efficiency[]. | ||
155 | */ | ||
156 | if (min_capacity == max_capacity) | ||
157 | cpu_capacity[0].hwid = (unsigned long)(-1); | ||
158 | else if (4*max_capacity < (3*(max_capacity + min_capacity))) | ||
159 | middle_capacity = (min_capacity + max_capacity) | ||
160 | >> (SCHED_POWER_SHIFT+1); | ||
161 | else | ||
162 | middle_capacity = ((max_capacity / 3) | ||
163 | >> (SCHED_POWER_SHIFT-1)) + 1; | ||
164 | |||
165 | } | ||
166 | |||
167 | /* | ||
168 | * Look for a customed capacity of a CPU in the cpu_capacity table during the | ||
169 | * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the | ||
170 | * function returns directly for SMP system. | ||
171 | */ | ||
172 | void update_cpu_power(unsigned int cpu, unsigned long hwid) | ||
173 | { | ||
174 | unsigned int idx = 0; | ||
175 | |||
176 | /* look for the cpu's hwid in the cpu capacity table */ | ||
177 | for (idx = 0; idx < num_possible_cpus(); idx++) { | ||
178 | if (cpu_capacity[idx].hwid == hwid) | ||
179 | break; | ||
180 | |||
181 | if (cpu_capacity[idx].hwid == -1) | ||
182 | return; | ||
183 | } | ||
184 | |||
185 | if (idx == num_possible_cpus()) | ||
186 | return; | ||
187 | |||
188 | set_power_scale(cpu, cpu_capacity[idx].capacity / middle_capacity); | ||
189 | |||
190 | printk(KERN_INFO "CPU%u: update cpu_power %lu\n", | ||
191 | cpu, arch_scale_freq_power(NULL, cpu)); | ||
192 | } | ||
193 | |||
194 | #else | ||
195 | static inline void parse_dt_topology(void) {} | ||
196 | static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} | ||
197 | #endif | ||
198 | |||
199 | |||
200 | /* | ||
201 | * cpu topology management | ||
202 | */ | ||
203 | |||
25 | #define MPIDR_SMP_BITMASK (0x3 << 30) | 204 | #define MPIDR_SMP_BITMASK (0x3 << 30) |
26 | #define MPIDR_SMP_VALUE (0x2 << 30) | 205 | #define MPIDR_SMP_VALUE (0x2 << 30) |
27 | 206 | ||
@@ -31,6 +210,7 @@ | |||
31 | * These masks reflect the current use of the affinity levels. | 210 | * These masks reflect the current use of the affinity levels. |
32 | * The affinity level can be up to 16 bits according to ARM ARM | 211 | * The affinity level can be up to 16 bits according to ARM ARM |
33 | */ | 212 | */ |
213 | #define MPIDR_HWID_BITMASK 0xFFFFFF | ||
34 | 214 | ||
35 | #define MPIDR_LEVEL0_MASK 0x3 | 215 | #define MPIDR_LEVEL0_MASK 0x3 |
36 | #define MPIDR_LEVEL0_SHIFT 0 | 216 | #define MPIDR_LEVEL0_SHIFT 0 |
@@ -41,6 +221,9 @@ | |||
41 | #define MPIDR_LEVEL2_MASK 0xFF | 221 | #define MPIDR_LEVEL2_MASK 0xFF |
42 | #define MPIDR_LEVEL2_SHIFT 16 | 222 | #define MPIDR_LEVEL2_SHIFT 16 |
43 | 223 | ||
224 | /* | ||
225 | * cpu topology table | ||
226 | */ | ||
44 | struct cputopo_arm cpu_topology[NR_CPUS]; | 227 | struct cputopo_arm cpu_topology[NR_CPUS]; |
45 | 228 | ||
46 | const struct cpumask *cpu_coregroup_mask(int cpu) | 229 | const struct cpumask *cpu_coregroup_mask(int cpu) |
@@ -48,6 +231,32 @@ const struct cpumask *cpu_coregroup_mask(int cpu) | |||
48 | return &cpu_topology[cpu].core_sibling; | 231 | return &cpu_topology[cpu].core_sibling; |
49 | } | 232 | } |
50 | 233 | ||
234 | void update_siblings_masks(unsigned int cpuid) | ||
235 | { | ||
236 | struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; | ||
237 | int cpu; | ||
238 | |||
239 | /* update core and thread sibling masks */ | ||
240 | for_each_possible_cpu(cpu) { | ||
241 | cpu_topo = &cpu_topology[cpu]; | ||
242 | |||
243 | if (cpuid_topo->socket_id != cpu_topo->socket_id) | ||
244 | continue; | ||
245 | |||
246 | cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); | ||
247 | if (cpu != cpuid) | ||
248 | cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); | ||
249 | |||
250 | if (cpuid_topo->core_id != cpu_topo->core_id) | ||
251 | continue; | ||
252 | |||
253 | cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling); | ||
254 | if (cpu != cpuid) | ||
255 | cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling); | ||
256 | } | ||
257 | smp_wmb(); | ||
258 | } | ||
259 | |||
51 | /* | 260 | /* |
52 | * store_cpu_topology is called at boot when only one cpu is running | 261 | * store_cpu_topology is called at boot when only one cpu is running |
53 | * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, | 262 | * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, |
@@ -57,7 +266,6 @@ void store_cpu_topology(unsigned int cpuid) | |||
57 | { | 266 | { |
58 | struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; | 267 | struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; |
59 | unsigned int mpidr; | 268 | unsigned int mpidr; |
60 | unsigned int cpu; | ||
61 | 269 | ||
62 | /* If the cpu topology has been already set, just return */ | 270 | /* If the cpu topology has been already set, just return */ |
63 | if (cpuid_topo->core_id != -1) | 271 | if (cpuid_topo->core_id != -1) |
@@ -99,26 +307,9 @@ void store_cpu_topology(unsigned int cpuid) | |||
99 | cpuid_topo->socket_id = -1; | 307 | cpuid_topo->socket_id = -1; |
100 | } | 308 | } |
101 | 309 | ||
102 | /* update core and thread sibling masks */ | 310 | update_siblings_masks(cpuid); |
103 | for_each_possible_cpu(cpu) { | 311 | |
104 | struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; | 312 | update_cpu_power(cpuid, mpidr & MPIDR_HWID_BITMASK); |
105 | |||
106 | if (cpuid_topo->socket_id == cpu_topo->socket_id) { | ||
107 | cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); | ||
108 | if (cpu != cpuid) | ||
109 | cpumask_set_cpu(cpu, | ||
110 | &cpuid_topo->core_sibling); | ||
111 | |||
112 | if (cpuid_topo->core_id == cpu_topo->core_id) { | ||
113 | cpumask_set_cpu(cpuid, | ||
114 | &cpu_topo->thread_sibling); | ||
115 | if (cpu != cpuid) | ||
116 | cpumask_set_cpu(cpu, | ||
117 | &cpuid_topo->thread_sibling); | ||
118 | } | ||
119 | } | ||
120 | } | ||
121 | smp_wmb(); | ||
122 | 313 | ||
123 | printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", | 314 | printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", |
124 | cpuid, cpu_topology[cpuid].thread_id, | 315 | cpuid, cpu_topology[cpuid].thread_id, |
@@ -134,7 +325,7 @@ void init_cpu_topology(void) | |||
134 | { | 325 | { |
135 | unsigned int cpu; | 326 | unsigned int cpu; |
136 | 327 | ||
137 | /* init core mask */ | 328 | /* init core mask and power*/ |
138 | for_each_possible_cpu(cpu) { | 329 | for_each_possible_cpu(cpu) { |
139 | struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); | 330 | struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); |
140 | 331 | ||
@@ -143,6 +334,10 @@ void init_cpu_topology(void) | |||
143 | cpu_topo->socket_id = -1; | 334 | cpu_topo->socket_id = -1; |
144 | cpumask_clear(&cpu_topo->core_sibling); | 335 | cpumask_clear(&cpu_topo->core_sibling); |
145 | cpumask_clear(&cpu_topo->thread_sibling); | 336 | cpumask_clear(&cpu_topo->thread_sibling); |
337 | |||
338 | set_power_scale(cpu, SCHED_POWER_SCALE); | ||
146 | } | 339 | } |
147 | smp_wmb(); | 340 | smp_wmb(); |
341 | |||
342 | parse_dt_topology(); | ||
148 | } | 343 | } |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 3647170e9a16..f7945218b8c6 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -233,9 +233,9 @@ void show_stack(struct task_struct *tsk, unsigned long *sp) | |||
233 | #define S_ISA " ARM" | 233 | #define S_ISA " ARM" |
234 | #endif | 234 | #endif |
235 | 235 | ||
236 | static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs) | 236 | static int __die(const char *str, int err, struct pt_regs *regs) |
237 | { | 237 | { |
238 | struct task_struct *tsk = thread->task; | 238 | struct task_struct *tsk = current; |
239 | static int die_counter; | 239 | static int die_counter; |
240 | int ret; | 240 | int ret; |
241 | 241 | ||
@@ -245,12 +245,12 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt | |||
245 | /* trap and error numbers are mostly meaningless on ARM */ | 245 | /* trap and error numbers are mostly meaningless on ARM */ |
246 | ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); | 246 | ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); |
247 | if (ret == NOTIFY_STOP) | 247 | if (ret == NOTIFY_STOP) |
248 | return ret; | 248 | return 1; |
249 | 249 | ||
250 | print_modules(); | 250 | print_modules(); |
251 | __show_regs(regs); | 251 | __show_regs(regs); |
252 | printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", | 252 | printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", |
253 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1); | 253 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), end_of_stack(tsk)); |
254 | 254 | ||
255 | if (!user_mode(regs) || in_interrupt()) { | 255 | if (!user_mode(regs) || in_interrupt()) { |
256 | dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, | 256 | dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, |
@@ -259,45 +259,77 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt | |||
259 | dump_instr(KERN_EMERG, regs); | 259 | dump_instr(KERN_EMERG, regs); |
260 | } | 260 | } |
261 | 261 | ||
262 | return ret; | 262 | return 0; |
263 | } | 263 | } |
264 | 264 | ||
265 | static DEFINE_RAW_SPINLOCK(die_lock); | 265 | static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED; |
266 | static int die_owner = -1; | ||
267 | static unsigned int die_nest_count; | ||
266 | 268 | ||
267 | /* | 269 | static unsigned long oops_begin(void) |
268 | * This function is protected against re-entrancy. | ||
269 | */ | ||
270 | void die(const char *str, struct pt_regs *regs, int err) | ||
271 | { | 270 | { |
272 | struct thread_info *thread = current_thread_info(); | 271 | int cpu; |
273 | int ret; | 272 | unsigned long flags; |
274 | enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; | ||
275 | 273 | ||
276 | oops_enter(); | 274 | oops_enter(); |
277 | 275 | ||
278 | raw_spin_lock_irq(&die_lock); | 276 | /* racy, but better than risking deadlock. */ |
277 | raw_local_irq_save(flags); | ||
278 | cpu = smp_processor_id(); | ||
279 | if (!arch_spin_trylock(&die_lock)) { | ||
280 | if (cpu == die_owner) | ||
281 | /* nested oops. should stop eventually */; | ||
282 | else | ||
283 | arch_spin_lock(&die_lock); | ||
284 | } | ||
285 | die_nest_count++; | ||
286 | die_owner = cpu; | ||
279 | console_verbose(); | 287 | console_verbose(); |
280 | bust_spinlocks(1); | 288 | bust_spinlocks(1); |
281 | if (!user_mode(regs)) | 289 | return flags; |
282 | bug_type = report_bug(regs->ARM_pc, regs); | 290 | } |
283 | if (bug_type != BUG_TRAP_TYPE_NONE) | ||
284 | str = "Oops - BUG"; | ||
285 | ret = __die(str, err, thread, regs); | ||
286 | 291 | ||
287 | if (regs && kexec_should_crash(thread->task)) | 292 | static void oops_end(unsigned long flags, struct pt_regs *regs, int signr) |
293 | { | ||
294 | if (regs && kexec_should_crash(current)) | ||
288 | crash_kexec(regs); | 295 | crash_kexec(regs); |
289 | 296 | ||
290 | bust_spinlocks(0); | 297 | bust_spinlocks(0); |
298 | die_owner = -1; | ||
291 | add_taint(TAINT_DIE); | 299 | add_taint(TAINT_DIE); |
292 | raw_spin_unlock_irq(&die_lock); | 300 | die_nest_count--; |
301 | if (!die_nest_count) | ||
302 | /* Nest count reaches zero, release the lock. */ | ||
303 | arch_spin_unlock(&die_lock); | ||
304 | raw_local_irq_restore(flags); | ||
293 | oops_exit(); | 305 | oops_exit(); |
294 | 306 | ||
295 | if (in_interrupt()) | 307 | if (in_interrupt()) |
296 | panic("Fatal exception in interrupt"); | 308 | panic("Fatal exception in interrupt"); |
297 | if (panic_on_oops) | 309 | if (panic_on_oops) |
298 | panic("Fatal exception"); | 310 | panic("Fatal exception"); |
299 | if (ret != NOTIFY_STOP) | 311 | if (signr) |
300 | do_exit(SIGSEGV); | 312 | do_exit(signr); |
313 | } | ||
314 | |||
315 | /* | ||
316 | * This function is protected against re-entrancy. | ||
317 | */ | ||
318 | void die(const char *str, struct pt_regs *regs, int err) | ||
319 | { | ||
320 | enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; | ||
321 | unsigned long flags = oops_begin(); | ||
322 | int sig = SIGSEGV; | ||
323 | |||
324 | if (!user_mode(regs)) | ||
325 | bug_type = report_bug(regs->ARM_pc, regs); | ||
326 | if (bug_type != BUG_TRAP_TYPE_NONE) | ||
327 | str = "Oops - BUG"; | ||
328 | |||
329 | if (__die(str, err, regs)) | ||
330 | sig = 0; | ||
331 | |||
332 | oops_end(flags, regs, sig); | ||
301 | } | 333 | } |
302 | 334 | ||
303 | void arm_notify_die(const char *str, struct pt_regs *regs, | 335 | void arm_notify_die(const char *str, struct pt_regs *regs, |
@@ -370,18 +402,10 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr) | |||
370 | 402 | ||
371 | asmlinkage void __exception do_undefinstr(struct pt_regs *regs) | 403 | asmlinkage void __exception do_undefinstr(struct pt_regs *regs) |
372 | { | 404 | { |
373 | unsigned int correction = thumb_mode(regs) ? 2 : 4; | ||
374 | unsigned int instr; | 405 | unsigned int instr; |
375 | siginfo_t info; | 406 | siginfo_t info; |
376 | void __user *pc; | 407 | void __user *pc; |
377 | 408 | ||
378 | /* | ||
379 | * According to the ARM ARM, PC is 2 or 4 bytes ahead, | ||
380 | * depending whether we're in Thumb mode or not. | ||
381 | * Correct this offset. | ||
382 | */ | ||
383 | regs->ARM_pc -= correction; | ||
384 | |||
385 | pc = (void __user *)instruction_pointer(regs); | 409 | pc = (void __user *)instruction_pointer(regs); |
386 | 410 | ||
387 | if (processor_mode(regs) == SVC_MODE) { | 411 | if (processor_mode(regs) == SVC_MODE) { |
@@ -820,8 +844,6 @@ void __init early_trap_init(void *vectors_base) | |||
820 | */ | 844 | */ |
821 | memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), | 845 | memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), |
822 | sigreturn_codes, sizeof(sigreturn_codes)); | 846 | sigreturn_codes, sizeof(sigreturn_codes)); |
823 | memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE), | ||
824 | syscall_restart_code, sizeof(syscall_restart_code)); | ||
825 | 847 | ||
826 | flush_icache_range(vectors, vectors + PAGE_SIZE); | 848 | flush_icache_range(vectors, vectors + PAGE_SIZE); |
827 | modify_domain(DOMAIN_USER, DOMAIN_CLIENT); | 849 | modify_domain(DOMAIN_USER, DOMAIN_CLIENT); |
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 992769ae2599..2473fd1fd51c 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile | |||
@@ -6,9 +6,8 @@ | |||
6 | 6 | ||
7 | lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ | 7 | lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ |
8 | csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ | 8 | csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ |
9 | delay.o findbit.o memchr.o memcpy.o \ | 9 | delay.o delay-loop.o findbit.o memchr.o memcpy.o \ |
10 | memmove.o memset.o memzero.o setbit.o \ | 10 | memmove.o memset.o memzero.o setbit.o \ |
11 | strncpy_from_user.o strnlen_user.o \ | ||
12 | strchr.o strrchr.o \ | 11 | strchr.o strrchr.o \ |
13 | testchangebit.o testclearbit.o testsetbit.o \ | 12 | testchangebit.o testclearbit.o testsetbit.o \ |
14 | ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ | 13 | ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ |
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay-loop.S index 3c9a05c8d20b..36b668d8e121 100644 --- a/arch/arm/lib/delay.S +++ b/arch/arm/lib/delay-loop.S | |||
@@ -9,11 +9,11 @@ | |||
9 | */ | 9 | */ |
10 | #include <linux/linkage.h> | 10 | #include <linux/linkage.h> |
11 | #include <asm/assembler.h> | 11 | #include <asm/assembler.h> |
12 | #include <asm/param.h> | 12 | #include <asm/delay.h> |
13 | .text | 13 | .text |
14 | 14 | ||
15 | .LC0: .word loops_per_jiffy | 15 | .LC0: .word loops_per_jiffy |
16 | .LC1: .word (2199023*HZ)>>11 | 16 | .LC1: .word UDELAY_MULT |
17 | 17 | ||
18 | /* | 18 | /* |
19 | * r0 <= 2000 | 19 | * r0 <= 2000 |
@@ -21,10 +21,10 @@ | |||
21 | * HZ <= 1000 | 21 | * HZ <= 1000 |
22 | */ | 22 | */ |
23 | 23 | ||
24 | ENTRY(__udelay) | 24 | ENTRY(__loop_udelay) |
25 | ldr r2, .LC1 | 25 | ldr r2, .LC1 |
26 | mul r0, r2, r0 | 26 | mul r0, r2, r0 |
27 | ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 | 27 | ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06 |
28 | mov r1, #-1 | 28 | mov r1, #-1 |
29 | ldr r2, .LC0 | 29 | ldr r2, .LC0 |
30 | ldr r2, [r2] @ max = 0x01ffffff | 30 | ldr r2, [r2] @ max = 0x01ffffff |
@@ -39,12 +39,10 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 | |||
39 | 39 | ||
40 | /* | 40 | /* |
41 | * loops = r0 * HZ * loops_per_jiffy / 1000000 | 41 | * loops = r0 * HZ * loops_per_jiffy / 1000000 |
42 | * | ||
43 | * Oh, if only we had a cycle counter... | ||
44 | */ | 42 | */ |
45 | 43 | ||
46 | @ Delay routine | 44 | @ Delay routine |
47 | ENTRY(__delay) | 45 | ENTRY(__loop_delay) |
48 | subs r0, r0, #1 | 46 | subs r0, r0, #1 |
49 | #if 0 | 47 | #if 0 |
50 | movls pc, lr | 48 | movls pc, lr |
@@ -62,8 +60,8 @@ ENTRY(__delay) | |||
62 | movls pc, lr | 60 | movls pc, lr |
63 | subs r0, r0, #1 | 61 | subs r0, r0, #1 |
64 | #endif | 62 | #endif |
65 | bhi __delay | 63 | bhi __loop_delay |
66 | mov pc, lr | 64 | mov pc, lr |
67 | ENDPROC(__udelay) | 65 | ENDPROC(__loop_udelay) |
68 | ENDPROC(__const_udelay) | 66 | ENDPROC(__loop_const_udelay) |
69 | ENDPROC(__delay) | 67 | ENDPROC(__loop_delay) |
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c new file mode 100644 index 000000000000..d6dacc69254e --- /dev/null +++ b/arch/arm/lib/delay.c | |||
@@ -0,0 +1,71 @@ | |||
1 | /* | ||
2 | * Delay loops based on the OpenRISC implementation. | ||
3 | * | ||
4 | * Copyright (C) 2012 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | * | ||
19 | * Author: Will Deacon <will.deacon@arm.com> | ||
20 | */ | ||
21 | |||
22 | #include <linux/delay.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/timex.h> | ||
27 | |||
28 | /* | ||
29 | * Default to the loop-based delay implementation. | ||
30 | */ | ||
31 | struct arm_delay_ops arm_delay_ops = { | ||
32 | .delay = __loop_delay, | ||
33 | .const_udelay = __loop_const_udelay, | ||
34 | .udelay = __loop_udelay, | ||
35 | }; | ||
36 | |||
37 | #ifdef ARCH_HAS_READ_CURRENT_TIMER | ||
38 | static void __timer_delay(unsigned long cycles) | ||
39 | { | ||
40 | cycles_t start = get_cycles(); | ||
41 | |||
42 | while ((get_cycles() - start) < cycles) | ||
43 | cpu_relax(); | ||
44 | } | ||
45 | |||
46 | static void __timer_const_udelay(unsigned long xloops) | ||
47 | { | ||
48 | unsigned long long loops = xloops; | ||
49 | loops *= loops_per_jiffy; | ||
50 | __timer_delay(loops >> UDELAY_SHIFT); | ||
51 | } | ||
52 | |||
53 | static void __timer_udelay(unsigned long usecs) | ||
54 | { | ||
55 | __timer_const_udelay(usecs * UDELAY_MULT); | ||
56 | } | ||
57 | |||
58 | void __init init_current_timer_delay(unsigned long freq) | ||
59 | { | ||
60 | pr_info("Switching to timer-based delay loop\n"); | ||
61 | lpj_fine = freq / HZ; | ||
62 | arm_delay_ops.delay = __timer_delay; | ||
63 | arm_delay_ops.const_udelay = __timer_const_udelay; | ||
64 | arm_delay_ops.udelay = __timer_udelay; | ||
65 | } | ||
66 | |||
67 | unsigned long __cpuinit calibrate_delay_is_known(void) | ||
68 | { | ||
69 | return lpj_fine; | ||
70 | } | ||
71 | #endif | ||
diff --git a/arch/arm/lib/io-acorn.S b/arch/arm/lib/io-acorn.S index 1b197ea7aab3..69719bad674d 100644 --- a/arch/arm/lib/io-acorn.S +++ b/arch/arm/lib/io-acorn.S | |||
@@ -11,13 +11,14 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
14 | #include <linux/kern_levels.h> | ||
14 | #include <asm/assembler.h> | 15 | #include <asm/assembler.h> |
15 | 16 | ||
16 | .text | 17 | .text |
17 | .align | 18 | .align |
18 | 19 | ||
19 | .Liosl_warning: | 20 | .Liosl_warning: |
20 | .ascii "<4>insl/outsl not implemented, called from %08lX\0" | 21 | .ascii KERN_WARNING "insl/outsl not implemented, called from %08lX\0" |
21 | .align | 22 | .align |
22 | 23 | ||
23 | /* | 24 | /* |
diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S deleted file mode 100644 index f202d7bd1647..000000000000 --- a/arch/arm/lib/strncpy_from_user.S +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/lib/strncpy_from_user.S | ||
3 | * | ||
4 | * Copyright (C) 1995-2000 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/linkage.h> | ||
11 | #include <asm/assembler.h> | ||
12 | #include <asm/errno.h> | ||
13 | |||
14 | .text | ||
15 | .align 5 | ||
16 | |||
17 | /* | ||
18 | * Copy a string from user space to kernel space. | ||
19 | * r0 = dst, r1 = src, r2 = byte length | ||
20 | * returns the number of characters copied (strlen of copied string), | ||
21 | * -EFAULT on exception, or "len" if we fill the whole buffer | ||
22 | */ | ||
23 | ENTRY(__strncpy_from_user) | ||
24 | mov ip, r1 | ||
25 | 1: subs r2, r2, #1 | ||
26 | ldrusr r3, r1, 1, pl | ||
27 | bmi 2f | ||
28 | strb r3, [r0], #1 | ||
29 | teq r3, #0 | ||
30 | bne 1b | ||
31 | sub r1, r1, #1 @ take NUL character out of count | ||
32 | 2: sub r0, r1, ip | ||
33 | mov pc, lr | ||
34 | ENDPROC(__strncpy_from_user) | ||
35 | |||
36 | .pushsection .fixup,"ax" | ||
37 | .align 0 | ||
38 | 9001: mov r3, #0 | ||
39 | strb r3, [r0, #0] @ null terminate | ||
40 | mov r0, #-EFAULT | ||
41 | mov pc, lr | ||
42 | .popsection | ||
43 | |||
diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S deleted file mode 100644 index 0ecbb459c4f1..000000000000 --- a/arch/arm/lib/strnlen_user.S +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/lib/strnlen_user.S | ||
3 | * | ||
4 | * Copyright (C) 1995-2000 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/linkage.h> | ||
11 | #include <asm/assembler.h> | ||
12 | #include <asm/errno.h> | ||
13 | |||
14 | .text | ||
15 | .align 5 | ||
16 | |||
17 | /* Prototype: unsigned long __strnlen_user(const char *str, long n) | ||
18 | * Purpose : get length of a string in user memory | ||
19 | * Params : str - address of string in user memory | ||
20 | * Returns : length of string *including terminator* | ||
21 | * or zero on exception, or n + 1 if too long | ||
22 | */ | ||
23 | ENTRY(__strnlen_user) | ||
24 | mov r2, r0 | ||
25 | 1: | ||
26 | ldrusr r3, r0, 1 | ||
27 | teq r3, #0 | ||
28 | beq 2f | ||
29 | subs r1, r1, #1 | ||
30 | bne 1b | ||
31 | add r0, r0, #1 | ||
32 | 2: sub r0, r0, r2 | ||
33 | mov pc, lr | ||
34 | ENDPROC(__strnlen_user) | ||
35 | |||
36 | .pushsection .fixup,"ax" | ||
37 | .align 0 | ||
38 | 9001: mov r0, #0 | ||
39 | mov pc, lr | ||
40 | .popsection | ||
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 977127368a7d..ef6cedd52e3c 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -183,6 +183,13 @@ static struct clk adc_op_clk = { | |||
183 | .rate_hz = 13200000, | 183 | .rate_hz = 13200000, |
184 | }; | 184 | }; |
185 | 185 | ||
186 | /* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */ | ||
187 | static struct clk aestdessha_clk = { | ||
188 | .name = "aestdessha_clk", | ||
189 | .pmc_mask = 1 << AT91SAM9G45_ID_AESTDESSHA, | ||
190 | .type = CLK_TYPE_PERIPHERAL, | ||
191 | }; | ||
192 | |||
186 | static struct clk *periph_clocks[] __initdata = { | 193 | static struct clk *periph_clocks[] __initdata = { |
187 | &pioA_clk, | 194 | &pioA_clk, |
188 | &pioB_clk, | 195 | &pioB_clk, |
@@ -212,6 +219,7 @@ static struct clk *periph_clocks[] __initdata = { | |||
212 | &udphs_clk, | 219 | &udphs_clk, |
213 | &mmc1_clk, | 220 | &mmc1_clk, |
214 | &adc_op_clk, | 221 | &adc_op_clk, |
222 | &aestdessha_clk, | ||
215 | // irq0 | 223 | // irq0 |
216 | }; | 224 | }; |
217 | 225 | ||
@@ -232,6 +240,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
232 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 240 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
233 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 241 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
234 | CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk), | 242 | CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk), |
243 | CLKDEV_CON_DEV_ID(NULL, "atmel_sha", &aestdessha_clk), | ||
244 | CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk), | ||
245 | CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk), | ||
235 | /* more usart lookup table for DT entries */ | 246 | /* more usart lookup table for DT entries */ |
236 | CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck), | 247 | CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck), |
237 | CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk), | 248 | CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk), |
@@ -388,7 +399,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
388 | 3, /* Ethernet */ | 399 | 3, /* Ethernet */ |
389 | 0, /* Image Sensor Interface */ | 400 | 0, /* Image Sensor Interface */ |
390 | 2, /* USB Device High speed port */ | 401 | 2, /* USB Device High speed port */ |
391 | 0, | 402 | 0, /* AESTDESSHA Crypto HW Accelerators */ |
392 | 0, /* Multimedia Card Interface 1 */ | 403 | 0, /* Multimedia Card Interface 1 */ |
393 | 0, | 404 | 0, |
394 | 0, /* Advanced Interrupt Controller (IRQ0) */ | 405 | 0, /* Advanced Interrupt Controller (IRQ0) */ |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 40fb79df2de0..06073996a382 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
19 | #include <linux/i2c-gpio.h> | 19 | #include <linux/i2c-gpio.h> |
20 | #include <linux/atmel-mci.h> | 20 | #include <linux/atmel-mci.h> |
21 | #include <linux/platform_data/atmel-aes.h> | ||
21 | 22 | ||
22 | #include <linux/platform_data/at91_adc.h> | 23 | #include <linux/platform_data/at91_adc.h> |
23 | 24 | ||
@@ -1830,6 +1831,130 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | |||
1830 | void __init at91_add_device_serial(void) {} | 1831 | void __init at91_add_device_serial(void) {} |
1831 | #endif | 1832 | #endif |
1832 | 1833 | ||
1834 | /* -------------------------------------------------------------------- | ||
1835 | * SHA1/SHA256 | ||
1836 | * -------------------------------------------------------------------- */ | ||
1837 | |||
1838 | #if defined(CONFIG_CRYPTO_DEV_ATMEL_SHA) || defined(CONFIG_CRYPTO_DEV_ATMEL_SHA_MODULE) | ||
1839 | static struct resource sha_resources[] = { | ||
1840 | { | ||
1841 | .start = AT91SAM9G45_BASE_SHA, | ||
1842 | .end = AT91SAM9G45_BASE_SHA + SZ_16K - 1, | ||
1843 | .flags = IORESOURCE_MEM, | ||
1844 | }, | ||
1845 | [1] = { | ||
1846 | .start = AT91SAM9G45_ID_AESTDESSHA, | ||
1847 | .end = AT91SAM9G45_ID_AESTDESSHA, | ||
1848 | .flags = IORESOURCE_IRQ, | ||
1849 | }, | ||
1850 | }; | ||
1851 | |||
1852 | static struct platform_device at91sam9g45_sha_device = { | ||
1853 | .name = "atmel_sha", | ||
1854 | .id = -1, | ||
1855 | .resource = sha_resources, | ||
1856 | .num_resources = ARRAY_SIZE(sha_resources), | ||
1857 | }; | ||
1858 | |||
1859 | static void __init at91_add_device_sha(void) | ||
1860 | { | ||
1861 | platform_device_register(&at91sam9g45_sha_device); | ||
1862 | } | ||
1863 | #else | ||
1864 | static void __init at91_add_device_sha(void) {} | ||
1865 | #endif | ||
1866 | |||
1867 | /* -------------------------------------------------------------------- | ||
1868 | * DES/TDES | ||
1869 | * -------------------------------------------------------------------- */ | ||
1870 | |||
1871 | #if defined(CONFIG_CRYPTO_DEV_ATMEL_TDES) || defined(CONFIG_CRYPTO_DEV_ATMEL_TDES_MODULE) | ||
1872 | static struct resource tdes_resources[] = { | ||
1873 | [0] = { | ||
1874 | .start = AT91SAM9G45_BASE_TDES, | ||
1875 | .end = AT91SAM9G45_BASE_TDES + SZ_16K - 1, | ||
1876 | .flags = IORESOURCE_MEM, | ||
1877 | }, | ||
1878 | [1] = { | ||
1879 | .start = AT91SAM9G45_ID_AESTDESSHA, | ||
1880 | .end = AT91SAM9G45_ID_AESTDESSHA, | ||
1881 | .flags = IORESOURCE_IRQ, | ||
1882 | }, | ||
1883 | }; | ||
1884 | |||
1885 | static struct platform_device at91sam9g45_tdes_device = { | ||
1886 | .name = "atmel_tdes", | ||
1887 | .id = -1, | ||
1888 | .resource = tdes_resources, | ||
1889 | .num_resources = ARRAY_SIZE(tdes_resources), | ||
1890 | }; | ||
1891 | |||
1892 | static void __init at91_add_device_tdes(void) | ||
1893 | { | ||
1894 | platform_device_register(&at91sam9g45_tdes_device); | ||
1895 | } | ||
1896 | #else | ||
1897 | static void __init at91_add_device_tdes(void) {} | ||
1898 | #endif | ||
1899 | |||
1900 | /* -------------------------------------------------------------------- | ||
1901 | * AES | ||
1902 | * -------------------------------------------------------------------- */ | ||
1903 | |||
1904 | #if defined(CONFIG_CRYPTO_DEV_ATMEL_AES) || defined(CONFIG_CRYPTO_DEV_ATMEL_AES_MODULE) | ||
1905 | static struct aes_platform_data aes_data; | ||
1906 | static u64 aes_dmamask = DMA_BIT_MASK(32); | ||
1907 | |||
1908 | static struct resource aes_resources[] = { | ||
1909 | [0] = { | ||
1910 | .start = AT91SAM9G45_BASE_AES, | ||
1911 | .end = AT91SAM9G45_BASE_AES + SZ_16K - 1, | ||
1912 | .flags = IORESOURCE_MEM, | ||
1913 | }, | ||
1914 | [1] = { | ||
1915 | .start = AT91SAM9G45_ID_AESTDESSHA, | ||
1916 | .end = AT91SAM9G45_ID_AESTDESSHA, | ||
1917 | .flags = IORESOURCE_IRQ, | ||
1918 | }, | ||
1919 | }; | ||
1920 | |||
1921 | static struct platform_device at91sam9g45_aes_device = { | ||
1922 | .name = "atmel_aes", | ||
1923 | .id = -1, | ||
1924 | .dev = { | ||
1925 | .dma_mask = &aes_dmamask, | ||
1926 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1927 | .platform_data = &aes_data, | ||
1928 | }, | ||
1929 | .resource = aes_resources, | ||
1930 | .num_resources = ARRAY_SIZE(aes_resources), | ||
1931 | }; | ||
1932 | |||
1933 | static void __init at91_add_device_aes(void) | ||
1934 | { | ||
1935 | struct at_dma_slave *atslave; | ||
1936 | struct aes_dma_data *alt_atslave; | ||
1937 | |||
1938 | alt_atslave = kzalloc(sizeof(struct aes_dma_data), GFP_KERNEL); | ||
1939 | |||
1940 | /* DMA TX slave channel configuration */ | ||
1941 | atslave = &alt_atslave->txdata; | ||
1942 | atslave->dma_dev = &at_hdmac_device.dev; | ||
1943 | atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_SRC_H2SEL_HW | | ||
1944 | ATC_SRC_PER(AT_DMA_ID_AES_RX); | ||
1945 | |||
1946 | /* DMA RX slave channel configuration */ | ||
1947 | atslave = &alt_atslave->rxdata; | ||
1948 | atslave->dma_dev = &at_hdmac_device.dev; | ||
1949 | atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_DST_H2SEL_HW | | ||
1950 | ATC_DST_PER(AT_DMA_ID_AES_TX); | ||
1951 | |||
1952 | aes_data.dma_slave = alt_atslave; | ||
1953 | platform_device_register(&at91sam9g45_aes_device); | ||
1954 | } | ||
1955 | #else | ||
1956 | static void __init at91_add_device_aes(void) {} | ||
1957 | #endif | ||
1833 | 1958 | ||
1834 | /* -------------------------------------------------------------------- */ | 1959 | /* -------------------------------------------------------------------- */ |
1835 | /* | 1960 | /* |
@@ -1847,6 +1972,9 @@ static int __init at91_add_standard_devices(void) | |||
1847 | at91_add_device_trng(); | 1972 | at91_add_device_trng(); |
1848 | at91_add_device_watchdog(); | 1973 | at91_add_device_watchdog(); |
1849 | at91_add_device_tc(); | 1974 | at91_add_device_tc(); |
1975 | at91_add_device_sha(); | ||
1976 | at91_add_device_tdes(); | ||
1977 | at91_add_device_aes(); | ||
1850 | return 0; | 1978 | return 0; |
1851 | } | 1979 | } |
1852 | 1980 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index 3a4da24d5911..8eba1021f533 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
@@ -136,6 +136,8 @@ | |||
136 | #define AT_DMA_ID_SSC1_RX 8 | 136 | #define AT_DMA_ID_SSC1_RX 8 |
137 | #define AT_DMA_ID_AC97_TX 9 | 137 | #define AT_DMA_ID_AC97_TX 9 |
138 | #define AT_DMA_ID_AC97_RX 10 | 138 | #define AT_DMA_ID_AC97_RX 10 |
139 | #define AT_DMA_ID_AES_TX 11 | ||
140 | #define AT_DMA_ID_AES_RX 12 | ||
139 | #define AT_DMA_ID_MCI1 13 | 141 | #define AT_DMA_ID_MCI1 13 |
140 | 142 | ||
141 | #endif | 143 | #endif |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index d1624a315c9a..783eab6845c4 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -546,6 +546,7 @@ static struct lcd_ctrl_config lcd_cfg = { | |||
546 | .sync_edge = 0, | 546 | .sync_edge = 0, |
547 | .sync_ctrl = 1, | 547 | .sync_ctrl = 1, |
548 | .raster_order = 0, | 548 | .raster_order = 0, |
549 | .fifo_th = 6, | ||
549 | }; | 550 | }; |
550 | 551 | ||
551 | struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = { | 552 | struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = { |
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index 26fe9de35ecb..2f51293c1875 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c | |||
@@ -620,10 +620,6 @@ static struct clk exynos4_init_clocks_off[] = { | |||
620 | .enable = exynos4_clk_ip_peril_ctrl, | 620 | .enable = exynos4_clk_ip_peril_ctrl, |
621 | .ctrlbit = (1 << 27), | 621 | .ctrlbit = (1 << 27), |
622 | }, { | 622 | }, { |
623 | .name = "fimg2d", | ||
624 | .enable = exynos4_clk_ip_image_ctrl, | ||
625 | .ctrlbit = (1 << 0), | ||
626 | }, { | ||
627 | .name = "mfc", | 623 | .name = "mfc", |
628 | .devname = "s5p-mfc", | 624 | .devname = "s5p-mfc", |
629 | .enable = exynos4_clk_ip_mfc_ctrl, | 625 | .enable = exynos4_clk_ip_mfc_ctrl, |
@@ -819,47 +815,21 @@ static struct clk *exynos4_clkset_mout_g2d0_list[] = { | |||
819 | [1] = &exynos4_clk_sclk_apll.clk, | 815 | [1] = &exynos4_clk_sclk_apll.clk, |
820 | }; | 816 | }; |
821 | 817 | ||
822 | static struct clksrc_sources exynos4_clkset_mout_g2d0 = { | 818 | struct clksrc_sources exynos4_clkset_mout_g2d0 = { |
823 | .sources = exynos4_clkset_mout_g2d0_list, | 819 | .sources = exynos4_clkset_mout_g2d0_list, |
824 | .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d0_list), | 820 | .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d0_list), |
825 | }; | 821 | }; |
826 | 822 | ||
827 | static struct clksrc_clk exynos4_clk_mout_g2d0 = { | ||
828 | .clk = { | ||
829 | .name = "mout_g2d0", | ||
830 | }, | ||
831 | .sources = &exynos4_clkset_mout_g2d0, | ||
832 | .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 }, | ||
833 | }; | ||
834 | |||
835 | static struct clk *exynos4_clkset_mout_g2d1_list[] = { | 823 | static struct clk *exynos4_clkset_mout_g2d1_list[] = { |
836 | [0] = &exynos4_clk_mout_epll.clk, | 824 | [0] = &exynos4_clk_mout_epll.clk, |
837 | [1] = &exynos4_clk_sclk_vpll.clk, | 825 | [1] = &exynos4_clk_sclk_vpll.clk, |
838 | }; | 826 | }; |
839 | 827 | ||
840 | static struct clksrc_sources exynos4_clkset_mout_g2d1 = { | 828 | struct clksrc_sources exynos4_clkset_mout_g2d1 = { |
841 | .sources = exynos4_clkset_mout_g2d1_list, | 829 | .sources = exynos4_clkset_mout_g2d1_list, |
842 | .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d1_list), | 830 | .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d1_list), |
843 | }; | 831 | }; |
844 | 832 | ||
845 | static struct clksrc_clk exynos4_clk_mout_g2d1 = { | ||
846 | .clk = { | ||
847 | .name = "mout_g2d1", | ||
848 | }, | ||
849 | .sources = &exynos4_clkset_mout_g2d1, | ||
850 | .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 }, | ||
851 | }; | ||
852 | |||
853 | static struct clk *exynos4_clkset_mout_g2d_list[] = { | ||
854 | [0] = &exynos4_clk_mout_g2d0.clk, | ||
855 | [1] = &exynos4_clk_mout_g2d1.clk, | ||
856 | }; | ||
857 | |||
858 | static struct clksrc_sources exynos4_clkset_mout_g2d = { | ||
859 | .sources = exynos4_clkset_mout_g2d_list, | ||
860 | .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d_list), | ||
861 | }; | ||
862 | |||
863 | static struct clk *exynos4_clkset_mout_mfc0_list[] = { | 833 | static struct clk *exynos4_clkset_mout_mfc0_list[] = { |
864 | [0] = &exynos4_clk_mout_mpll.clk, | 834 | [0] = &exynos4_clk_mout_mpll.clk, |
865 | [1] = &exynos4_clk_sclk_apll.clk, | 835 | [1] = &exynos4_clk_sclk_apll.clk, |
@@ -1126,13 +1096,6 @@ static struct clksrc_clk exynos4_clksrcs[] = { | |||
1126 | .reg_div = { .reg = EXYNOS4_CLKDIV_LCD0, .shift = 0, .size = 4 }, | 1096 | .reg_div = { .reg = EXYNOS4_CLKDIV_LCD0, .shift = 0, .size = 4 }, |
1127 | }, { | 1097 | }, { |
1128 | .clk = { | 1098 | .clk = { |
1129 | .name = "sclk_fimg2d", | ||
1130 | }, | ||
1131 | .sources = &exynos4_clkset_mout_g2d, | ||
1132 | .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1 }, | ||
1133 | .reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4 }, | ||
1134 | }, { | ||
1135 | .clk = { | ||
1136 | .name = "sclk_mfc", | 1099 | .name = "sclk_mfc", |
1137 | .devname = "s5p-mfc", | 1100 | .devname = "s5p-mfc", |
1138 | }, | 1101 | }, |
diff --git a/arch/arm/mach-exynos/clock-exynos4.h b/arch/arm/mach-exynos/clock-exynos4.h index 28a119701182..bd12d5f8b63d 100644 --- a/arch/arm/mach-exynos/clock-exynos4.h +++ b/arch/arm/mach-exynos/clock-exynos4.h | |||
@@ -23,6 +23,9 @@ extern struct clksrc_sources exynos4_clkset_group; | |||
23 | extern struct clk *exynos4_clkset_aclk_top_list[]; | 23 | extern struct clk *exynos4_clkset_aclk_top_list[]; |
24 | extern struct clk *exynos4_clkset_group_list[]; | 24 | extern struct clk *exynos4_clkset_group_list[]; |
25 | 25 | ||
26 | extern struct clksrc_sources exynos4_clkset_mout_g2d0; | ||
27 | extern struct clksrc_sources exynos4_clkset_mout_g2d1; | ||
28 | |||
26 | extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable); | 29 | extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable); |
27 | extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable); | 30 | extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable); |
28 | extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable); | 31 | extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable); |
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c index b8689ff60baf..fed4c26e9dad 100644 --- a/arch/arm/mach-exynos/clock-exynos4210.c +++ b/arch/arm/mach-exynos/clock-exynos4210.c | |||
@@ -48,6 +48,32 @@ static struct clksrc_clk *sysclks[] = { | |||
48 | /* nothing here yet */ | 48 | /* nothing here yet */ |
49 | }; | 49 | }; |
50 | 50 | ||
51 | static struct clksrc_clk exynos4210_clk_mout_g2d0 = { | ||
52 | .clk = { | ||
53 | .name = "mout_g2d0", | ||
54 | }, | ||
55 | .sources = &exynos4_clkset_mout_g2d0, | ||
56 | .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 }, | ||
57 | }; | ||
58 | |||
59 | static struct clksrc_clk exynos4210_clk_mout_g2d1 = { | ||
60 | .clk = { | ||
61 | .name = "mout_g2d1", | ||
62 | }, | ||
63 | .sources = &exynos4_clkset_mout_g2d1, | ||
64 | .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 }, | ||
65 | }; | ||
66 | |||
67 | static struct clk *exynos4210_clkset_mout_g2d_list[] = { | ||
68 | [0] = &exynos4210_clk_mout_g2d0.clk, | ||
69 | [1] = &exynos4210_clk_mout_g2d1.clk, | ||
70 | }; | ||
71 | |||
72 | static struct clksrc_sources exynos4210_clkset_mout_g2d = { | ||
73 | .sources = exynos4210_clkset_mout_g2d_list, | ||
74 | .nr_sources = ARRAY_SIZE(exynos4210_clkset_mout_g2d_list), | ||
75 | }; | ||
76 | |||
51 | static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) | 77 | static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) |
52 | { | 78 | { |
53 | return s5p_gatectrl(EXYNOS4210_CLKSRC_MASK_LCD1, clk, enable); | 79 | return s5p_gatectrl(EXYNOS4210_CLKSRC_MASK_LCD1, clk, enable); |
@@ -74,6 +100,13 @@ static struct clksrc_clk clksrcs[] = { | |||
74 | .sources = &exynos4_clkset_group, | 100 | .sources = &exynos4_clkset_group, |
75 | .reg_src = { .reg = EXYNOS4210_CLKSRC_LCD1, .shift = 0, .size = 4 }, | 101 | .reg_src = { .reg = EXYNOS4210_CLKSRC_LCD1, .shift = 0, .size = 4 }, |
76 | .reg_div = { .reg = EXYNOS4210_CLKDIV_LCD1, .shift = 0, .size = 4 }, | 102 | .reg_div = { .reg = EXYNOS4210_CLKDIV_LCD1, .shift = 0, .size = 4 }, |
103 | }, { | ||
104 | .clk = { | ||
105 | .name = "sclk_fimg2d", | ||
106 | }, | ||
107 | .sources = &exynos4210_clkset_mout_g2d, | ||
108 | .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1 }, | ||
109 | .reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4 }, | ||
77 | }, | 110 | }, |
78 | }; | 111 | }; |
79 | 112 | ||
@@ -105,6 +138,10 @@ static struct clk init_clocks_off[] = { | |||
105 | .devname = SYSMMU_CLOCK_DEVNAME(fimd1, 11), | 138 | .devname = SYSMMU_CLOCK_DEVNAME(fimd1, 11), |
106 | .enable = exynos4_clk_ip_lcd1_ctrl, | 139 | .enable = exynos4_clk_ip_lcd1_ctrl, |
107 | .ctrlbit = (1 << 4), | 140 | .ctrlbit = (1 << 4), |
141 | }, { | ||
142 | .name = "fimg2d", | ||
143 | .enable = exynos4_clk_ip_image_ctrl, | ||
144 | .ctrlbit = (1 << 0), | ||
108 | }, | 145 | }, |
109 | }; | 146 | }; |
110 | 147 | ||
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index da397d21bbcf..8fba0b5fb8ab 100644 --- a/arch/arm/mach-exynos/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c | |||
@@ -68,12 +68,45 @@ static struct clksrc_clk clk_mout_mpll_user = { | |||
68 | .reg_src = { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size = 1 }, | 68 | .reg_src = { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size = 1 }, |
69 | }; | 69 | }; |
70 | 70 | ||
71 | static struct clksrc_clk exynos4x12_clk_mout_g2d0 = { | ||
72 | .clk = { | ||
73 | .name = "mout_g2d0", | ||
74 | }, | ||
75 | .sources = &exynos4_clkset_mout_g2d0, | ||
76 | .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 20, .size = 1 }, | ||
77 | }; | ||
78 | |||
79 | static struct clksrc_clk exynos4x12_clk_mout_g2d1 = { | ||
80 | .clk = { | ||
81 | .name = "mout_g2d1", | ||
82 | }, | ||
83 | .sources = &exynos4_clkset_mout_g2d1, | ||
84 | .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 24, .size = 1 }, | ||
85 | }; | ||
86 | |||
87 | static struct clk *exynos4x12_clkset_mout_g2d_list[] = { | ||
88 | [0] = &exynos4x12_clk_mout_g2d0.clk, | ||
89 | [1] = &exynos4x12_clk_mout_g2d1.clk, | ||
90 | }; | ||
91 | |||
92 | static struct clksrc_sources exynos4x12_clkset_mout_g2d = { | ||
93 | .sources = exynos4x12_clkset_mout_g2d_list, | ||
94 | .nr_sources = ARRAY_SIZE(exynos4x12_clkset_mout_g2d_list), | ||
95 | }; | ||
96 | |||
71 | static struct clksrc_clk *sysclks[] = { | 97 | static struct clksrc_clk *sysclks[] = { |
72 | &clk_mout_mpll_user, | 98 | &clk_mout_mpll_user, |
73 | }; | 99 | }; |
74 | 100 | ||
75 | static struct clksrc_clk clksrcs[] = { | 101 | static struct clksrc_clk clksrcs[] = { |
76 | /* nothing here yet */ | 102 | { |
103 | .clk = { | ||
104 | .name = "sclk_fimg2d", | ||
105 | }, | ||
106 | .sources = &exynos4x12_clkset_mout_g2d, | ||
107 | .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 28, .size = 1 }, | ||
108 | .reg_div = { .reg = EXYNOS4_CLKDIV_DMC1, .shift = 0, .size = 4 }, | ||
109 | }, | ||
77 | }; | 110 | }; |
78 | 111 | ||
79 | static struct clk init_clocks_off[] = { | 112 | static struct clk init_clocks_off[] = { |
@@ -102,7 +135,11 @@ static struct clk init_clocks_off[] = { | |||
102 | .devname = "exynos-fimc-lite.1", | 135 | .devname = "exynos-fimc-lite.1", |
103 | .enable = exynos4212_clk_ip_isp0_ctrl, | 136 | .enable = exynos4212_clk_ip_isp0_ctrl, |
104 | .ctrlbit = (1 << 3), | 137 | .ctrlbit = (1 << 3), |
105 | } | 138 | }, { |
139 | .name = "fimg2d", | ||
140 | .enable = exynos4_clk_ip_dmc_ctrl, | ||
141 | .ctrlbit = (1 << 23), | ||
142 | }, | ||
106 | }; | 143 | }; |
107 | 144 | ||
108 | #ifdef CONFIG_PM_SLEEP | 145 | #ifdef CONFIG_PM_SLEEP |
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index f98a83a81ce7..ea785fcaf6c3 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c | |||
@@ -1066,12 +1066,8 @@ static struct platform_device nuri_max8903_device = { | |||
1066 | static void __init nuri_power_init(void) | 1066 | static void __init nuri_power_init(void) |
1067 | { | 1067 | { |
1068 | int gpio; | 1068 | int gpio; |
1069 | int irq_base = IRQ_GPIO_END + 1; | ||
1070 | int ta_en = 0; | 1069 | int ta_en = 0; |
1071 | 1070 | ||
1072 | nuri_max8997_pdata.irq_base = irq_base; | ||
1073 | irq_base += MAX8997_IRQ_NR; | ||
1074 | |||
1075 | gpio = EXYNOS4_GPX0(7); | 1071 | gpio = EXYNOS4_GPX0(7); |
1076 | gpio_request(gpio, "AP_PMIC_IRQ"); | 1072 | gpio_request(gpio, "AP_PMIC_IRQ"); |
1077 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); | 1073 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); |
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 5a12dc26f496..5ca80307d6d7 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -426,7 +426,6 @@ static struct max8997_platform_data __initdata origen_max8997_pdata = { | |||
426 | .buck1_gpiodvs = false, | 426 | .buck1_gpiodvs = false, |
427 | .buck2_gpiodvs = false, | 427 | .buck2_gpiodvs = false, |
428 | .buck5_gpiodvs = false, | 428 | .buck5_gpiodvs = false, |
429 | .irq_base = IRQ_GPIO_END + 1, | ||
430 | 429 | ||
431 | .ignore_gpiodvs_side_effect = true, | 430 | .ignore_gpiodvs_side_effect = true, |
432 | .buck125_default_idx = 0x0, | 431 | .buck125_default_idx = 0x0, |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 388928fdb11a..f3f5c6542ab4 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -89,11 +89,11 @@ static const struct resource imx25_audmux_res[] __initconst = { | |||
89 | 89 | ||
90 | void __init imx25_soc_init(void) | 90 | void __init imx25_soc_init(void) |
91 | { | 91 | { |
92 | /* i.mx25 has the i.mx31 type gpio */ | 92 | /* i.mx25 has the i.mx35 type gpio */ |
93 | mxc_register_gpio("imx31-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); | 93 | mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); |
94 | mxc_register_gpio("imx31-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); | 94 | mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); |
95 | mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); | 95 | mxc_register_gpio("imx35-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); |
96 | mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); | 96 | mxc_register_gpio("imx35-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); |
97 | 97 | ||
98 | pinctrl_provide_dummies(); | 98 | pinctrl_provide_dummies(); |
99 | /* i.mx25 has the i.mx35 type sdma */ | 99 | /* i.mx25 has the i.mx35 type sdma */ |
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index fe96105109b3..9d2c843bde02 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -272,10 +272,9 @@ void __init imx35_soc_init(void) | |||
272 | 272 | ||
273 | imx3_init_l2x0(); | 273 | imx3_init_l2x0(); |
274 | 274 | ||
275 | /* i.mx35 has the i.mx31 type gpio */ | 275 | mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); |
276 | mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); | 276 | mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); |
277 | mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); | 277 | mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); |
278 | mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); | ||
279 | 278 | ||
280 | pinctrl_provide_dummies(); | 279 | pinctrl_provide_dummies(); |
281 | if (to_version == 1) { | 280 | if (to_version == 1) { |
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index f19d604e1b2a..52d8f534be10 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c | |||
@@ -161,13 +161,13 @@ static const struct resource imx53_audmux_res[] __initconst = { | |||
161 | 161 | ||
162 | void __init imx50_soc_init(void) | 162 | void __init imx50_soc_init(void) |
163 | { | 163 | { |
164 | /* i.mx50 has the i.mx31 type gpio */ | 164 | /* i.mx50 has the i.mx35 type gpio */ |
165 | mxc_register_gpio("imx31-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); | 165 | mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); |
166 | mxc_register_gpio("imx31-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); | 166 | mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); |
167 | mxc_register_gpio("imx31-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); | 167 | mxc_register_gpio("imx35-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); |
168 | mxc_register_gpio("imx31-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); | 168 | mxc_register_gpio("imx35-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); |
169 | mxc_register_gpio("imx31-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); | 169 | mxc_register_gpio("imx35-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); |
170 | mxc_register_gpio("imx31-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); | 170 | mxc_register_gpio("imx35-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); |
171 | 171 | ||
172 | /* i.mx50 has the i.mx31 type audmux */ | 172 | /* i.mx50 has the i.mx31 type audmux */ |
173 | platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res, | 173 | platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res, |
@@ -176,11 +176,11 @@ void __init imx50_soc_init(void) | |||
176 | 176 | ||
177 | void __init imx51_soc_init(void) | 177 | void __init imx51_soc_init(void) |
178 | { | 178 | { |
179 | /* i.mx51 has the i.mx31 type gpio */ | 179 | /* i.mx51 has the i.mx35 type gpio */ |
180 | mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); | 180 | mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); |
181 | mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); | 181 | mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); |
182 | mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH); | 182 | mxc_register_gpio("imx35-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH); |
183 | mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH); | 183 | mxc_register_gpio("imx35-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH); |
184 | 184 | ||
185 | pinctrl_provide_dummies(); | 185 | pinctrl_provide_dummies(); |
186 | 186 | ||
@@ -198,14 +198,14 @@ void __init imx51_soc_init(void) | |||
198 | 198 | ||
199 | void __init imx53_soc_init(void) | 199 | void __init imx53_soc_init(void) |
200 | { | 200 | { |
201 | /* i.mx53 has the i.mx31 type gpio */ | 201 | /* i.mx53 has the i.mx35 type gpio */ |
202 | mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); | 202 | mxc_register_gpio("imx35-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); |
203 | mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); | 203 | mxc_register_gpio("imx35-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); |
204 | mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); | 204 | mxc_register_gpio("imx35-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); |
205 | mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); | 205 | mxc_register_gpio("imx35-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); |
206 | mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); | 206 | mxc_register_gpio("imx35-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); |
207 | mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); | 207 | mxc_register_gpio("imx35-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); |
208 | mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); | 208 | mxc_register_gpio("imx35-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); |
209 | 209 | ||
210 | pinctrl_provide_dummies(); | 210 | pinctrl_provide_dummies(); |
211 | /* i.mx53 has the i.mx35 type sdma */ | 211 | /* i.mx53 has the i.mx35 type sdma */ |
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index db0117ec55f4..e012dc8391cf 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c | |||
@@ -127,7 +127,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
127 | * the boot monitor to read the system wide flags register, | 127 | * the boot monitor to read the system wide flags register, |
128 | * and branch to the address found there. | 128 | * and branch to the address found there. |
129 | */ | 129 | */ |
130 | gic_raise_softirq(cpumask_of(cpu), 1); | 130 | gic_raise_softirq(cpumask_of(cpu), 0); |
131 | 131 | ||
132 | timeout = jiffies + (1 * HZ); | 132 | timeout = jiffies + (1 * HZ); |
133 | while (time_before(jiffies, timeout)) { | 133 | while (time_before(jiffies, timeout)) { |
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index 2cdf6ef69bee..d122ee6ab991 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c | |||
@@ -69,29 +69,6 @@ void netx_clcd_remove(struct clcd_fb *fb) | |||
69 | fb->fb.screen_base, fb->fb.fix.smem_start); | 69 | fb->fb.screen_base, fb->fb.fix.smem_start); |
70 | } | 70 | } |
71 | 71 | ||
72 | void clk_disable(struct clk *clk) | ||
73 | { | ||
74 | } | ||
75 | |||
76 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
77 | { | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | int clk_enable(struct clk *clk) | ||
82 | { | ||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | struct clk *clk_get(struct device *dev, const char *id) | ||
87 | { | ||
88 | return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT); | ||
89 | } | ||
90 | |||
91 | void clk_put(struct clk *clk) | ||
92 | { | ||
93 | } | ||
94 | |||
95 | static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); | 72 | static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); |
96 | 73 | ||
97 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) | 74 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) |
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c index da0e37d40823..e1362ce48497 100644 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ b/arch/arm/mach-omap1/board-h2-mmc.c | |||
@@ -54,7 +54,6 @@ static struct omap_mmc_platform_data mmc1_data = { | |||
54 | .nr_slots = 1, | 54 | .nr_slots = 1, |
55 | .init = mmc_late_init, | 55 | .init = mmc_late_init, |
56 | .cleanup = mmc_cleanup, | 56 | .cleanup = mmc_cleanup, |
57 | .dma_mask = 0xffffffff, | ||
58 | .slots[0] = { | 57 | .slots[0] = { |
59 | .set_power = mmc_set_power, | 58 | .set_power = mmc_set_power, |
60 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 59 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c index f8242aa9b763..c74daace8cd6 100644 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ b/arch/arm/mach-omap1/board-h3-mmc.c | |||
@@ -36,7 +36,6 @@ static int mmc_set_power(struct device *dev, int slot, int power_on, | |||
36 | */ | 36 | */ |
37 | static struct omap_mmc_platform_data mmc1_data = { | 37 | static struct omap_mmc_platform_data mmc1_data = { |
38 | .nr_slots = 1, | 38 | .nr_slots = 1, |
39 | .dma_mask = 0xffffffff, | ||
40 | .slots[0] = { | 39 | .slots[0] = { |
41 | .set_power = mmc_set_power, | 40 | .set_power = mmc_set_power, |
42 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 41 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 4007a372481b..2c0ca8fc3380 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -185,7 +185,6 @@ static int nokia770_mmc_get_cover_state(struct device *dev, int slot) | |||
185 | 185 | ||
186 | static struct omap_mmc_platform_data nokia770_mmc2_data = { | 186 | static struct omap_mmc_platform_data nokia770_mmc2_data = { |
187 | .nr_slots = 1, | 187 | .nr_slots = 1, |
188 | .dma_mask = 0xffffffff, | ||
189 | .max_freq = 12000000, | 188 | .max_freq = 12000000, |
190 | .slots[0] = { | 189 | .slots[0] = { |
191 | .set_power = nokia770_mmc_set_power, | 190 | .set_power = nokia770_mmc_set_power, |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index cc71a26723ef..355980321c2d 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -288,8 +288,7 @@ palmz71_gpio_setup(int early) | |||
288 | } | 288 | } |
289 | gpio_direction_input(PALMZ71_USBDETECT_GPIO); | 289 | gpio_direction_input(PALMZ71_USBDETECT_GPIO); |
290 | if (request_irq(gpio_to_irq(PALMZ71_USBDETECT_GPIO), | 290 | if (request_irq(gpio_to_irq(PALMZ71_USBDETECT_GPIO), |
291 | palmz71_powercable, IRQF_SAMPLE_RANDOM, | 291 | palmz71_powercable, 0, "palmz71-cable", NULL)) |
292 | "palmz71-cable", NULL)) | ||
293 | printk(KERN_ERR | 292 | printk(KERN_ERR |
294 | "IRQ request for power cable failed!\n"); | 293 | "IRQ request for power cable failed!\n"); |
295 | palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), NULL); | 294 | palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), NULL); |
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 2c5d0ed75285..677357ff61ac 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -468,7 +468,6 @@ static struct omap_mmc_platform_data mmc1_data = { | |||
468 | .cleanup = n8x0_mmc_cleanup, | 468 | .cleanup = n8x0_mmc_cleanup, |
469 | .shutdown = n8x0_mmc_shutdown, | 469 | .shutdown = n8x0_mmc_shutdown, |
470 | .max_freq = 24000000, | 470 | .max_freq = 24000000, |
471 | .dma_mask = 0xffffffff, | ||
472 | .slots[0] = { | 471 | .slots[0] = { |
473 | .wires = 4, | 472 | .wires = 4, |
474 | .set_power = n8x0_mmc_set_power, | 473 | .set_power = n8x0_mmc_set_power, |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 91b3d5c60bfe..83bed9ad3017 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -3376,15 +3376,15 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3376 | CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3376 | CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3377 | CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3377 | CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3378 | CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3378 | CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3379 | CLK("usbhs_omap", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), | 3379 | CLK(NULL, "utmi_p1_gfclk", &dummy_ck, CK_3XXX), |
3380 | CLK("usbhs_omap", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), | 3380 | CLK(NULL, "utmi_p2_gfclk", &dummy_ck, CK_3XXX), |
3381 | CLK("usbhs_omap", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), | 3381 | CLK(NULL, "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), |
3382 | CLK("usbhs_omap", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), | 3382 | CLK(NULL, "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), |
3383 | CLK("usbhs_omap", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), | 3383 | CLK(NULL, "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), |
3384 | CLK("usbhs_omap", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), | 3384 | CLK(NULL, "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), |
3385 | CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), | 3385 | CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), |
3386 | CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), | 3386 | CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), |
3387 | CLK("usbhs_omap", "init_60m_fclk", &dummy_ck, CK_3XXX), | 3387 | CLK(NULL, "init_60m_fclk", &dummy_ck, CK_3XXX), |
3388 | CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), | 3388 | CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), |
3389 | CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), | 3389 | CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), |
3390 | CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), | 3390 | CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), |
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 5fb47a14f4ba..af1ed7d24a1f 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c | |||
@@ -37,6 +37,7 @@ | |||
37 | 37 | ||
38 | #define DISPC_CONTROL 0x0040 | 38 | #define DISPC_CONTROL 0x0040 |
39 | #define DISPC_CONTROL2 0x0238 | 39 | #define DISPC_CONTROL2 0x0238 |
40 | #define DISPC_CONTROL3 0x0848 | ||
40 | #define DISPC_IRQSTATUS 0x0018 | 41 | #define DISPC_IRQSTATUS 0x0018 |
41 | 42 | ||
42 | #define DSS_SYSCONFIG 0x10 | 43 | #define DSS_SYSCONFIG 0x10 |
@@ -52,6 +53,7 @@ | |||
52 | #define EVSYNC_EVEN_IRQ_SHIFT 2 | 53 | #define EVSYNC_EVEN_IRQ_SHIFT 2 |
53 | #define EVSYNC_ODD_IRQ_SHIFT 3 | 54 | #define EVSYNC_ODD_IRQ_SHIFT 3 |
54 | #define FRAMEDONE2_IRQ_SHIFT 22 | 55 | #define FRAMEDONE2_IRQ_SHIFT 22 |
56 | #define FRAMEDONE3_IRQ_SHIFT 30 | ||
55 | #define FRAMEDONETV_IRQ_SHIFT 24 | 57 | #define FRAMEDONETV_IRQ_SHIFT 24 |
56 | 58 | ||
57 | /* | 59 | /* |
@@ -376,7 +378,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) | |||
376 | static void dispc_disable_outputs(void) | 378 | static void dispc_disable_outputs(void) |
377 | { | 379 | { |
378 | u32 v, irq_mask = 0; | 380 | u32 v, irq_mask = 0; |
379 | bool lcd_en, digit_en, lcd2_en = false; | 381 | bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false; |
380 | int i; | 382 | int i; |
381 | struct omap_dss_dispc_dev_attr *da; | 383 | struct omap_dss_dispc_dev_attr *da; |
382 | struct omap_hwmod *oh; | 384 | struct omap_hwmod *oh; |
@@ -405,7 +407,13 @@ static void dispc_disable_outputs(void) | |||
405 | lcd2_en = v & LCD_EN_MASK; | 407 | lcd2_en = v & LCD_EN_MASK; |
406 | } | 408 | } |
407 | 409 | ||
408 | if (!(lcd_en | digit_en | lcd2_en)) | 410 | /* store value of LCDENABLE for LCD3 */ |
411 | if (da->manager_count > 3) { | ||
412 | v = omap_hwmod_read(oh, DISPC_CONTROL3); | ||
413 | lcd3_en = v & LCD_EN_MASK; | ||
414 | } | ||
415 | |||
416 | if (!(lcd_en | digit_en | lcd2_en | lcd3_en)) | ||
409 | return; /* no managers currently enabled */ | 417 | return; /* no managers currently enabled */ |
410 | 418 | ||
411 | /* | 419 | /* |
@@ -426,10 +434,12 @@ static void dispc_disable_outputs(void) | |||
426 | 434 | ||
427 | if (lcd2_en) | 435 | if (lcd2_en) |
428 | irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; | 436 | irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; |
437 | if (lcd3_en) | ||
438 | irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT; | ||
429 | 439 | ||
430 | /* | 440 | /* |
431 | * clear any previous FRAMEDONE, FRAMEDONETV, | 441 | * clear any previous FRAMEDONE, FRAMEDONETV, |
432 | * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts | 442 | * EVSYNC_EVEN/ODD, FRAMEDONE2 or FRAMEDONE3 interrupts |
433 | */ | 443 | */ |
434 | omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); | 444 | omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); |
435 | 445 | ||
@@ -445,12 +455,19 @@ static void dispc_disable_outputs(void) | |||
445 | omap_hwmod_write(v, oh, DISPC_CONTROL2); | 455 | omap_hwmod_write(v, oh, DISPC_CONTROL2); |
446 | } | 456 | } |
447 | 457 | ||
458 | /* disable LCD3 manager */ | ||
459 | if (da->manager_count > 3) { | ||
460 | v = omap_hwmod_read(oh, DISPC_CONTROL3); | ||
461 | v &= ~LCD_EN_MASK; | ||
462 | omap_hwmod_write(v, oh, DISPC_CONTROL3); | ||
463 | } | ||
464 | |||
448 | i = 0; | 465 | i = 0; |
449 | while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != | 466 | while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != |
450 | irq_mask) { | 467 | irq_mask) { |
451 | i++; | 468 | i++; |
452 | if (i > FRAMEDONE_IRQ_TIMEOUT) { | 469 | if (i > FRAMEDONE_IRQ_TIMEOUT) { |
453 | pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n"); | 470 | pr_err("didn't get FRAMEDONE1/2/3 or TV interrupt\n"); |
454 | break; | 471 | break; |
455 | } | 472 | } |
456 | mdelay(1); | 473 | mdelay(1); |
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index be697d4e0843..a9675d8d1822 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c | |||
@@ -315,7 +315,6 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | |||
315 | mmc->slots[0].caps = c->caps; | 315 | mmc->slots[0].caps = c->caps; |
316 | mmc->slots[0].pm_caps = c->pm_caps; | 316 | mmc->slots[0].pm_caps = c->pm_caps; |
317 | mmc->slots[0].internal_clock = !c->ext_clock; | 317 | mmc->slots[0].internal_clock = !c->ext_clock; |
318 | mmc->dma_mask = 0xffffffff; | ||
319 | mmc->max_freq = c->max_freq; | 318 | mmc->max_freq = c->max_freq; |
320 | if (cpu_is_omap44xx()) | 319 | if (cpu_is_omap44xx()) |
321 | mmc->reg_offset = OMAP4_MMC_REG_OFFSET; | 320 | mmc->reg_offset = OMAP4_MMC_REG_OFFSET; |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 7d118b9bdd5f..9a35adf91232 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -125,7 +125,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
125 | booted = true; | 125 | booted = true; |
126 | } | 126 | } |
127 | 127 | ||
128 | gic_raise_softirq(cpumask_of(cpu), 1); | 128 | gic_raise_softirq(cpumask_of(cpu), 0); |
129 | 129 | ||
130 | /* | 130 | /* |
131 | * Now the secondary core is starting up let it run its | 131 | * Now the secondary core is starting up let it run its |
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h deleted file mode 100644 index b96949dd5adb..000000000000 --- a/arch/arm/mach-pxa/eseries.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi); | ||
2 | |||
3 | extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info; | ||
4 | extern struct pxaficp_platform_data e7xx_ficp_platform_data; | ||
5 | extern int e7xx_irda_init(void); | ||
6 | |||
7 | extern int eseries_tmio_enable(struct platform_device *dev); | ||
8 | extern int eseries_tmio_disable(struct platform_device *dev); | ||
9 | extern int eseries_tmio_suspend(struct platform_device *dev); | ||
10 | extern int eseries_tmio_resume(struct platform_device *dev); | ||
11 | extern void eseries_get_tmio_gpios(void); | ||
12 | extern struct resource eseries_tmio_resources[]; | ||
13 | extern struct platform_device e300_tc6387xb_device; | ||
14 | |||
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index d3de84b0dcbe..e6311988add2 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
@@ -296,27 +296,11 @@ static struct asic3_led asic3_leds[ASIC3_NUM_LEDS] = { | |||
296 | 296 | ||
297 | static struct resource asic3_resources[] = { | 297 | static struct resource asic3_resources[] = { |
298 | /* GPIO part */ | 298 | /* GPIO part */ |
299 | [0] = { | 299 | [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT), |
300 | .start = ASIC3_PHYS, | 300 | [1] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ)), |
301 | .end = ASIC3_PHYS + ASIC3_MAP_SIZE_16BIT - 1, | ||
302 | .flags = IORESOURCE_MEM, | ||
303 | }, | ||
304 | [1] = { | ||
305 | .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), | ||
306 | .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), | ||
307 | .flags = IORESOURCE_IRQ, | ||
308 | }, | ||
309 | /* SD part */ | 301 | /* SD part */ |
310 | [2] = { | 302 | [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT), |
311 | .start = ASIC3_SD_PHYS, | 303 | [3] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ)), |
312 | .end = ASIC3_SD_PHYS + ASIC3_MAP_SIZE_16BIT - 1, | ||
313 | .flags = IORESOURCE_MEM, | ||
314 | }, | ||
315 | [3] = { | ||
316 | .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), | ||
317 | .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), | ||
318 | .flags = IORESOURCE_IRQ, | ||
319 | }, | ||
320 | }; | 304 | }; |
321 | 305 | ||
322 | static struct asic3_platform_data asic3_platform_data = { | 306 | static struct asic3_platform_data asic3_platform_data = { |
@@ -343,11 +327,7 @@ static struct platform_device asic3 = { | |||
343 | */ | 327 | */ |
344 | 328 | ||
345 | static struct resource egpio_resources[] = { | 329 | static struct resource egpio_resources[] = { |
346 | [0] = { | 330 | [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4), |
347 | .start = PXA_CS5_PHYS, | ||
348 | .end = PXA_CS5_PHYS + 0x4 - 1, | ||
349 | .flags = IORESOURCE_MEM, | ||
350 | }, | ||
351 | }; | 331 | }; |
352 | 332 | ||
353 | static struct htc_egpio_chip egpio_chips[] = { | 333 | static struct htc_egpio_chip egpio_chips[] = { |
@@ -537,11 +517,7 @@ static struct w100fb_mach_info w3220_info = { | |||
537 | }; | 517 | }; |
538 | 518 | ||
539 | static struct resource w3220_resources[] = { | 519 | static struct resource w3220_resources[] = { |
540 | [0] = { | 520 | [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M), |
541 | .start = ATI_W3220_PHYS, | ||
542 | .end = ATI_W3220_PHYS + 0x00ffffff, | ||
543 | .flags = IORESOURCE_MEM, | ||
544 | }, | ||
545 | }; | 521 | }; |
546 | 522 | ||
547 | static struct platform_device w3220 = { | 523 | static struct platform_device w3220 = { |
@@ -683,20 +659,12 @@ static struct pda_power_pdata power_supply_info = { | |||
683 | }; | 659 | }; |
684 | 660 | ||
685 | static struct resource power_supply_resources[] = { | 661 | static struct resource power_supply_resources[] = { |
686 | [0] = { | 662 | [0] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), 1, "ac", |
687 | .name = "ac", | 663 | IORESOURCE_IRQ | |
688 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | 664 | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE), |
689 | IORESOURCE_IRQ_LOWEDGE, | 665 | [1] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), 1, "usb", |
690 | .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), | 666 | IORESOURCE_IRQ | |
691 | .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), | 667 | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE), |
692 | }, | ||
693 | [1] = { | ||
694 | .name = "usb", | ||
695 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | | ||
696 | IORESOURCE_IRQ_LOWEDGE, | ||
697 | .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), | ||
698 | .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), | ||
699 | }, | ||
700 | }; | 668 | }; |
701 | 669 | ||
702 | static struct platform_device power_supply = { | 670 | static struct platform_device power_supply = { |
diff --git a/arch/arm/mach-pxa/include/mach/regs-ost.h b/arch/arm/mach-pxa/include/mach/regs-ost.h index a3e5f86ef67e..628819995c52 100644 --- a/arch/arm/mach-pxa/include/mach/regs-ost.h +++ b/arch/arm/mach-pxa/include/mach/regs-ost.h | |||
@@ -7,17 +7,17 @@ | |||
7 | * OS Timer & Match Registers | 7 | * OS Timer & Match Registers |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #define OSMR0 __REG(0x40A00000) /* */ | 10 | #define OSMR0 io_p2v(0x40A00000) /* */ |
11 | #define OSMR1 __REG(0x40A00004) /* */ | 11 | #define OSMR1 io_p2v(0x40A00004) /* */ |
12 | #define OSMR2 __REG(0x40A00008) /* */ | 12 | #define OSMR2 io_p2v(0x40A00008) /* */ |
13 | #define OSMR3 __REG(0x40A0000C) /* */ | 13 | #define OSMR3 io_p2v(0x40A0000C) /* */ |
14 | #define OSMR4 __REG(0x40A00080) /* */ | 14 | #define OSMR4 io_p2v(0x40A00080) /* */ |
15 | #define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ | 15 | #define OSCR io_p2v(0x40A00010) /* OS Timer Counter Register */ |
16 | #define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ | 16 | #define OSCR4 io_p2v(0x40A00040) /* OS Timer Counter Register */ |
17 | #define OMCR4 __REG(0x40A000C0) /* */ | 17 | #define OMCR4 io_p2v(0x40A000C0) /* */ |
18 | #define OSSR __REG(0x40A00014) /* OS Timer Status Register */ | 18 | #define OSSR io_p2v(0x40A00014) /* OS Timer Status Register */ |
19 | #define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ | 19 | #define OWER io_p2v(0x40A00018) /* OS Timer Watchdog Enable Register */ |
20 | #define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ | 20 | #define OIER io_p2v(0x40A0001C) /* OS Timer Interrupt Enable Register */ |
21 | 21 | ||
22 | #define OSSR_M3 (1 << 3) /* Match status channel 3 */ | 22 | #define OSSR_M3 (1 << 3) /* Match status channel 3 */ |
23 | #define OSSR_M2 (1 << 2) /* Match status channel 2 */ | 23 | #define OSSR_M2 (1 << 2) /* Match status channel 2 */ |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 6bb3f47b1f14..0ca0db787903 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -456,7 +456,7 @@ static int lubbock_mci_init(struct device *dev, | |||
456 | init_timer(&mmc_timer); | 456 | init_timer(&mmc_timer); |
457 | mmc_timer.data = (unsigned long) data; | 457 | mmc_timer.data = (unsigned long) data; |
458 | return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, | 458 | return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, |
459 | IRQF_SAMPLE_RANDOM, "lubbock-sd-detect", data); | 459 | 0, "lubbock-sd-detect", data); |
460 | } | 460 | } |
461 | 461 | ||
462 | static int lubbock_mci_get_ro(struct device *dev) | 462 | static int lubbock_mci_get_ro(struct device *dev) |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 2db697cd2b4e..39561dcf65f2 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -633,9 +633,8 @@ static struct platform_device bq24022 = { | |||
633 | static int magician_mci_init(struct device *dev, | 633 | static int magician_mci_init(struct device *dev, |
634 | irq_handler_t detect_irq, void *data) | 634 | irq_handler_t detect_irq, void *data) |
635 | { | 635 | { |
636 | return request_irq(IRQ_MAGICIAN_SD, detect_irq, | 636 | return request_irq(IRQ_MAGICIAN_SD, detect_irq, IRQF_DISABLED, |
637 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, | 637 | "mmc card detect", data); |
638 | "mmc card detect", data); | ||
639 | } | 638 | } |
640 | 639 | ||
641 | static void magician_mci_exit(struct device *dev, void *data) | 640 | static void magician_mci_exit(struct device *dev, void *data) |
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index b4528899ef08..3fab583755d4 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c | |||
@@ -77,9 +77,10 @@ static void do_gpio_reset(void) | |||
77 | static void do_hw_reset(void) | 77 | static void do_hw_reset(void) |
78 | { | 78 | { |
79 | /* Initialize the watchdog and let it fire */ | 79 | /* Initialize the watchdog and let it fire */ |
80 | OWER = OWER_WME; | 80 | writel_relaxed(OWER_WME, OWER); |
81 | OSSR = OSSR_M3; | 81 | writel_relaxed(OSSR_M3, OSSR); |
82 | OSMR3 = OSCR + 368640; /* ... in 100 ms */ | 82 | /* ... in 100 ms */ |
83 | writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3); | ||
83 | } | 84 | } |
84 | 85 | ||
85 | void pxa_restart(char mode, const char *cmd) | 86 | void pxa_restart(char mode, const char *cmd) |
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 3d6c9bd90de6..4bc47d63698b 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -35,7 +35,7 @@ | |||
35 | 35 | ||
36 | static u32 notrace pxa_read_sched_clock(void) | 36 | static u32 notrace pxa_read_sched_clock(void) |
37 | { | 37 | { |
38 | return OSCR; | 38 | return readl_relaxed(OSCR); |
39 | } | 39 | } |
40 | 40 | ||
41 | 41 | ||
@@ -47,8 +47,8 @@ pxa_ost0_interrupt(int irq, void *dev_id) | |||
47 | struct clock_event_device *c = dev_id; | 47 | struct clock_event_device *c = dev_id; |
48 | 48 | ||
49 | /* Disarm the compare/match, signal the event. */ | 49 | /* Disarm the compare/match, signal the event. */ |
50 | OIER &= ~OIER_E0; | 50 | writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); |
51 | OSSR = OSSR_M0; | 51 | writel_relaxed(OSSR_M0, OSSR); |
52 | c->event_handler(c); | 52 | c->event_handler(c); |
53 | 53 | ||
54 | return IRQ_HANDLED; | 54 | return IRQ_HANDLED; |
@@ -59,10 +59,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev) | |||
59 | { | 59 | { |
60 | unsigned long next, oscr; | 60 | unsigned long next, oscr; |
61 | 61 | ||
62 | OIER |= OIER_E0; | 62 | writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER); |
63 | next = OSCR + delta; | 63 | next = readl_relaxed(OSCR) + delta; |
64 | OSMR0 = next; | 64 | writel_relaxed(next, OSMR0); |
65 | oscr = OSCR; | 65 | oscr = readl_relaxed(OSCR); |
66 | 66 | ||
67 | return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; | 67 | return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; |
68 | } | 68 | } |
@@ -72,15 +72,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
72 | { | 72 | { |
73 | switch (mode) { | 73 | switch (mode) { |
74 | case CLOCK_EVT_MODE_ONESHOT: | 74 | case CLOCK_EVT_MODE_ONESHOT: |
75 | OIER &= ~OIER_E0; | 75 | writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); |
76 | OSSR = OSSR_M0; | 76 | writel_relaxed(OSSR_M0, OSSR); |
77 | break; | 77 | break; |
78 | 78 | ||
79 | case CLOCK_EVT_MODE_UNUSED: | 79 | case CLOCK_EVT_MODE_UNUSED: |
80 | case CLOCK_EVT_MODE_SHUTDOWN: | 80 | case CLOCK_EVT_MODE_SHUTDOWN: |
81 | /* initializing, released, or preparing for suspend */ | 81 | /* initializing, released, or preparing for suspend */ |
82 | OIER &= ~OIER_E0; | 82 | writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); |
83 | OSSR = OSSR_M0; | 83 | writel_relaxed(OSSR_M0, OSSR); |
84 | break; | 84 | break; |
85 | 85 | ||
86 | case CLOCK_EVT_MODE_RESUME: | 86 | case CLOCK_EVT_MODE_RESUME: |
@@ -108,8 +108,8 @@ static void __init pxa_timer_init(void) | |||
108 | { | 108 | { |
109 | unsigned long clock_tick_rate = get_clock_tick_rate(); | 109 | unsigned long clock_tick_rate = get_clock_tick_rate(); |
110 | 110 | ||
111 | OIER = 0; | 111 | writel_relaxed(0, OIER); |
112 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 112 | writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); |
113 | 113 | ||
114 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); | 114 | setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); |
115 | 115 | ||
@@ -122,7 +122,7 @@ static void __init pxa_timer_init(void) | |||
122 | 122 | ||
123 | setup_irq(IRQ_OST0, &pxa_ost0_irq); | 123 | setup_irq(IRQ_OST0, &pxa_ost0_irq); |
124 | 124 | ||
125 | clocksource_mmio_init(&OSCR, "oscr0", clock_tick_rate, 200, 32, | 125 | clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32, |
126 | clocksource_mmio_readl_up); | 126 | clocksource_mmio_readl_up); |
127 | clockevents_register_device(&ckevt_pxa_osmr0); | 127 | clockevents_register_device(&ckevt_pxa_osmr0); |
128 | } | 128 | } |
@@ -132,12 +132,12 @@ static unsigned long osmr[4], oier, oscr; | |||
132 | 132 | ||
133 | static void pxa_timer_suspend(void) | 133 | static void pxa_timer_suspend(void) |
134 | { | 134 | { |
135 | osmr[0] = OSMR0; | 135 | osmr[0] = readl_relaxed(OSMR0); |
136 | osmr[1] = OSMR1; | 136 | osmr[1] = readl_relaxed(OSMR1); |
137 | osmr[2] = OSMR2; | 137 | osmr[2] = readl_relaxed(OSMR2); |
138 | osmr[3] = OSMR3; | 138 | osmr[3] = readl_relaxed(OSMR3); |
139 | oier = OIER; | 139 | oier = readl_relaxed(OIER); |
140 | oscr = OSCR; | 140 | oscr = readl_relaxed(OSCR); |
141 | } | 141 | } |
142 | 142 | ||
143 | static void pxa_timer_resume(void) | 143 | static void pxa_timer_resume(void) |
@@ -151,12 +151,12 @@ static void pxa_timer_resume(void) | |||
151 | if (osmr[0] - oscr < MIN_OSCR_DELTA) | 151 | if (osmr[0] - oscr < MIN_OSCR_DELTA) |
152 | osmr[0] += MIN_OSCR_DELTA; | 152 | osmr[0] += MIN_OSCR_DELTA; |
153 | 153 | ||
154 | OSMR0 = osmr[0]; | 154 | writel_relaxed(osmr[0], OSMR0); |
155 | OSMR1 = osmr[1]; | 155 | writel_relaxed(osmr[1], OSMR1); |
156 | OSMR2 = osmr[2]; | 156 | writel_relaxed(osmr[2], OSMR2); |
157 | OSMR3 = osmr[3]; | 157 | writel_relaxed(osmr[3], OSMR3); |
158 | OIER = oier; | 158 | writel_relaxed(oier, OIER); |
159 | OSCR = oscr; | 159 | writel_relaxed(oscr, OSCR); |
160 | } | 160 | } |
161 | #else | 161 | #else |
162 | #define pxa_timer_suspend NULL | 162 | #define pxa_timer_suspend NULL |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 2b6ac00b2cd9..166dd32cc1d3 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -332,8 +332,8 @@ static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, | |||
332 | int err; | 332 | int err; |
333 | 333 | ||
334 | err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, | 334 | err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, |
335 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM, | 335 | IRQF_DISABLED | IRQF_TRIGGER_RISING, |
336 | "MMC card detect", data); | 336 | "MMC card detect", data); |
337 | if (err) { | 337 | if (err) { |
338 | printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request" | 338 | printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request" |
339 | "MMC card detect IRQ\n"); | 339 | "MMC card detect IRQ\n"); |
diff --git a/arch/arm/mach-s3c64xx/include/mach/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h index fcf3dcabb694..c0537f40a3d8 100644 --- a/arch/arm/mach-s3c64xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h | |||
@@ -12,6 +12,9 @@ | |||
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #ifndef __MACH_S3C64XX_PM_CORE_H | ||
16 | #define __MACH_S3C64XX_PM_CORE_H __FILE__ | ||
17 | |||
15 | #include <mach/regs-gpio.h> | 18 | #include <mach/regs-gpio.h> |
16 | 19 | ||
17 | static inline void s3c_pm_debug_init_uart(void) | 20 | static inline void s3c_pm_debug_init_uart(void) |
@@ -113,3 +116,4 @@ static inline void samsung_pm_saved_gpios(void) | |||
113 | 116 | ||
114 | __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN); | 117 | __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN); |
115 | } | 118 | } |
119 | #endif /* __MACH_S3C64XX_PM_CORE_H */ | ||
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index d1dc7f1a239c..d673211f121c 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c | |||
@@ -362,7 +362,7 @@ static void __init assabet_init(void) | |||
362 | static void __init map_sa1100_gpio_regs( void ) | 362 | static void __init map_sa1100_gpio_regs( void ) |
363 | { | 363 | { |
364 | unsigned long phys = __PREG(GPLR) & PMD_MASK; | 364 | unsigned long phys = __PREG(GPLR) & PMD_MASK; |
365 | unsigned long virt = io_p2v(phys); | 365 | unsigned long virt = (unsigned long)io_p2v(phys); |
366 | int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); | 366 | int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); |
367 | pmd_t *pmd; | 367 | pmd_t *pmd; |
368 | 368 | ||
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index 19b2053f5af4..e8f4d1e19233 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c | |||
@@ -87,6 +87,7 @@ | |||
87 | #include <linux/types.h> | 87 | #include <linux/types.h> |
88 | #include <linux/init.h> | 88 | #include <linux/init.h> |
89 | #include <linux/cpufreq.h> | 89 | #include <linux/cpufreq.h> |
90 | #include <linux/io.h> | ||
90 | 91 | ||
91 | #include <asm/cputype.h> | 92 | #include <asm/cputype.h> |
92 | 93 | ||
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 675bf8ef97e8..48c45b0c92bb 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/cpufreq.h> | 19 | #include <linux/cpufreq.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/io.h> | ||
22 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
23 | #include <linux/moduleparam.h> | 24 | #include <linux/moduleparam.h> |
24 | #include <linux/types.h> | 25 | #include <linux/types.h> |
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 3f2d1b60188c..0ac6cc08a19c 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h | |||
@@ -830,14 +830,14 @@ | |||
830 | * (read/write). | 830 | * (read/write). |
831 | */ | 831 | */ |
832 | 832 | ||
833 | #define OSMR0 __REG(0x90000000) /* OS timer Match Reg. 0 */ | 833 | #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ |
834 | #define OSMR1 __REG(0x90000004) /* OS timer Match Reg. 1 */ | 834 | #define OSMR1 io_p2v(0x90000004) /* OS timer Match Reg. 1 */ |
835 | #define OSMR2 __REG(0x90000008) /* OS timer Match Reg. 2 */ | 835 | #define OSMR2 io_p2v(0x90000008) /* OS timer Match Reg. 2 */ |
836 | #define OSMR3 __REG(0x9000000c) /* OS timer Match Reg. 3 */ | 836 | #define OSMR3 io_p2v(0x9000000c) /* OS timer Match Reg. 3 */ |
837 | #define OSCR __REG(0x90000010) /* OS timer Counter Reg. */ | 837 | #define OSCR io_p2v(0x90000010) /* OS timer Counter Reg. */ |
838 | #define OSSR __REG(0x90000014 ) /* OS timer Status Reg. */ | 838 | #define OSSR io_p2v(0x90000014) /* OS timer Status Reg. */ |
839 | #define OWER __REG(0x90000018 ) /* OS timer Watch-dog Enable Reg. */ | 839 | #define OWER io_p2v(0x90000018) /* OS timer Watch-dog Enable Reg. */ |
840 | #define OIER __REG(0x9000001C ) /* OS timer Interrupt Enable Reg. */ | 840 | #define OIER io_p2v(0x9000001C) /* OS timer Interrupt Enable Reg. */ |
841 | 841 | ||
842 | #define OSSR_M(Nb) /* Match detected [0..3] */ \ | 842 | #define OSSR_M(Nb) /* Match detected [0..3] */ \ |
843 | (0x00000001 << (Nb)) | 843 | (0x00000001 << (Nb)) |
diff --git a/arch/arm/mach-sa1100/include/mach/gpio.h b/arch/arm/mach-sa1100/include/mach/gpio.h index a38fc4f54241..6a9eecf3137e 100644 --- a/arch/arm/mach-sa1100/include/mach/gpio.h +++ b/arch/arm/mach-sa1100/include/mach/gpio.h | |||
@@ -24,6 +24,7 @@ | |||
24 | #ifndef __ASM_ARCH_SA1100_GPIO_H | 24 | #ifndef __ASM_ARCH_SA1100_GPIO_H |
25 | #define __ASM_ARCH_SA1100_GPIO_H | 25 | #define __ASM_ARCH_SA1100_GPIO_H |
26 | 26 | ||
27 | #include <linux/io.h> | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
29 | #include <asm-generic/gpio.h> | 30 | #include <asm-generic/gpio.h> |
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index 99f5856d8de4..cbedd75a9d65 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h | |||
@@ -32,7 +32,7 @@ | |||
32 | #define PIO_START 0x80000000 /* physical start of IO space */ | 32 | #define PIO_START 0x80000000 /* physical start of IO space */ |
33 | 33 | ||
34 | #define io_p2v( x ) \ | 34 | #define io_p2v( x ) \ |
35 | ( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) | 35 | IOMEM( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) |
36 | #define io_v2p( x ) \ | 36 | #define io_v2p( x ) \ |
37 | ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) | 37 | ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) |
38 | 38 | ||
@@ -47,6 +47,8 @@ | |||
47 | #define CPU_SA1110_ID (0x6901b110) | 47 | #define CPU_SA1110_ID (0x6901b110) |
48 | #define CPU_SA1110_MASK (0xfffffff0) | 48 | #define CPU_SA1110_MASK (0xfffffff0) |
49 | 49 | ||
50 | #define __MREG(x) IOMEM(io_p2v(x)) | ||
51 | |||
50 | #ifndef __ASSEMBLY__ | 52 | #ifndef __ASSEMBLY__ |
51 | 53 | ||
52 | #include <asm/cputype.h> | 54 | #include <asm/cputype.h> |
@@ -56,7 +58,7 @@ | |||
56 | #define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) | 58 | #define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) |
57 | #define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) | 59 | #define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) |
58 | 60 | ||
59 | # define __REG(x) (*((volatile unsigned long *)io_p2v(x))) | 61 | # define __REG(x) (*((volatile unsigned long __iomem *)io_p2v(x))) |
60 | # define __PREG(x) (io_v2p((unsigned long)&(x))) | 62 | # define __PREG(x) (io_v2p((unsigned long)&(x))) |
61 | 63 | ||
62 | static inline unsigned long get_clock_tick_rate(void) | 64 | static inline unsigned long get_clock_tick_rate(void) |
diff --git a/arch/arm/mach-sa1100/include/mach/uncompress.h b/arch/arm/mach-sa1100/include/mach/uncompress.h index 6cb39ddde656..5cf71da60e42 100644 --- a/arch/arm/mach-sa1100/include/mach/uncompress.h +++ b/arch/arm/mach-sa1100/include/mach/uncompress.h | |||
@@ -8,6 +8,8 @@ | |||
8 | 8 | ||
9 | #include "hardware.h" | 9 | #include "hardware.h" |
10 | 10 | ||
11 | #define IOMEM(x) (x) | ||
12 | |||
11 | /* | 13 | /* |
12 | * The following code assumes the serial port has already been | 14 | * The following code assumes the serial port has already been |
13 | * initialized by the bootloader. We search for the first enabled | 15 | * initialized by the bootloader. We search for the first enabled |
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 516ccc25d7fd..2124f1fc2fbe 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/io.h> | ||
15 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
16 | #include <linux/ioport.h> | 17 | #include <linux/ioport.h> |
17 | #include <linux/syscore_ops.h> | 18 | #include <linux/syscore_ops.h> |
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c index b412fc09c80c..7f07f08d8968 100644 --- a/arch/arm/mach-sa1100/jornada720_ssp.c +++ b/arch/arm/mach-sa1100/jornada720_ssp.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
21 | #include <linux/io.h> | ||
21 | 22 | ||
22 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
23 | #include <mach/jornada720.h> | 24 | #include <mach/jornada720.h> |
diff --git a/arch/arm/mach-sa1100/leds-cerf.c b/arch/arm/mach-sa1100/leds-cerf.c index 040540fb7d8a..30fc3b2bf555 100644 --- a/arch/arm/mach-sa1100/leds-cerf.c +++ b/arch/arm/mach-sa1100/leds-cerf.c | |||
@@ -4,6 +4,7 @@ | |||
4 | * Author: ??? | 4 | * Author: ??? |
5 | */ | 5 | */ |
6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
7 | #include <linux/io.h> | ||
7 | 8 | ||
8 | #include <mach/hardware.h> | 9 | #include <mach/hardware.h> |
9 | #include <asm/leds.h> | 10 | #include <asm/leds.h> |
diff --git a/arch/arm/mach-sa1100/leds-lart.c b/arch/arm/mach-sa1100/leds-lart.c index a51830c60e53..50a5b143b460 100644 --- a/arch/arm/mach-sa1100/leds-lart.c +++ b/arch/arm/mach-sa1100/leds-lart.c | |||
@@ -10,6 +10,7 @@ | |||
10 | * pace of the LED. | 10 | * pace of the LED. |
11 | */ | 11 | */ |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/io.h> | ||
13 | 14 | ||
14 | #include <mach/hardware.h> | 15 | #include <mach/hardware.h> |
15 | #include <asm/leds.h> | 16 | #include <asm/leds.h> |
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c index 690cf0ce5c0c..6645d1e31f14 100644 --- a/arch/arm/mach-sa1100/pm.c +++ b/arch/arm/mach-sa1100/pm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | * Storage is local on the stack now. | 23 | * Storage is local on the stack now. |
24 | */ | 24 | */ |
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <linux/io.h> | ||
26 | #include <linux/suspend.h> | 27 | #include <linux/suspend.h> |
27 | #include <linux/errno.h> | 28 | #include <linux/errno.h> |
28 | #include <linux/time.h> | 29 | #include <linux/time.h> |
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S index 30cc6721665b..85863741ef8b 100644 --- a/arch/arm/mach-sa1100/sleep.S +++ b/arch/arm/mach-sa1100/sleep.S | |||
@@ -38,9 +38,9 @@ ENTRY(sa1100_finish_suspend) | |||
38 | orr r4, r4, #MDREFR_K1DB2 | 38 | orr r4, r4, #MDREFR_K1DB2 |
39 | ldr r5, =PPCR | 39 | ldr r5, =PPCR |
40 | 40 | ||
41 | @ Pre-load __udelay into the I-cache | 41 | @ Pre-load __loop_udelay into the I-cache |
42 | mov r0, #1 | 42 | mov r0, #1 |
43 | bl __udelay | 43 | bl __loop_udelay |
44 | mov r0, r0 | 44 | mov r0, r0 |
45 | 45 | ||
46 | @ The following must all exist in a single cache line to | 46 | @ The following must all exist in a single cache line to |
@@ -53,11 +53,11 @@ ENTRY(sa1100_finish_suspend) | |||
53 | @ delay 90us and set CPU PLL to lowest speed | 53 | @ delay 90us and set CPU PLL to lowest speed |
54 | @ fixes resume problem on high speed SA1110 | 54 | @ fixes resume problem on high speed SA1110 |
55 | mov r0, #90 | 55 | mov r0, #90 |
56 | bl __udelay | 56 | bl __loop_udelay |
57 | mov r1, #0 | 57 | mov r1, #0 |
58 | str r1, [r5] | 58 | str r1, [r5] |
59 | mov r0, #90 | 59 | mov r0, #90 |
60 | bl __udelay | 60 | bl __loop_udelay |
61 | 61 | ||
62 | /* | 62 | /* |
63 | * SA1110 SDRAM controller workaround. register values: | 63 | * SA1110 SDRAM controller workaround. register values: |
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 6af26e8d55e6..80702c9ecc77 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | static u32 notrace sa1100_read_sched_clock(void) | 23 | static u32 notrace sa1100_read_sched_clock(void) |
24 | { | 24 | { |
25 | return OSCR; | 25 | return readl_relaxed(OSCR); |
26 | } | 26 | } |
27 | 27 | ||
28 | #define MIN_OSCR_DELTA 2 | 28 | #define MIN_OSCR_DELTA 2 |
@@ -32,8 +32,8 @@ static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id) | |||
32 | struct clock_event_device *c = dev_id; | 32 | struct clock_event_device *c = dev_id; |
33 | 33 | ||
34 | /* Disarm the compare/match, signal the event. */ | 34 | /* Disarm the compare/match, signal the event. */ |
35 | OIER &= ~OIER_E0; | 35 | writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); |
36 | OSSR = OSSR_M0; | 36 | writel_relaxed(OSSR_M0, OSSR); |
37 | c->event_handler(c); | 37 | c->event_handler(c); |
38 | 38 | ||
39 | return IRQ_HANDLED; | 39 | return IRQ_HANDLED; |
@@ -44,10 +44,10 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c) | |||
44 | { | 44 | { |
45 | unsigned long next, oscr; | 45 | unsigned long next, oscr; |
46 | 46 | ||
47 | OIER |= OIER_E0; | 47 | writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER); |
48 | next = OSCR + delta; | 48 | next = readl_relaxed(OSCR) + delta; |
49 | OSMR0 = next; | 49 | writel_relaxed(next, OSMR0); |
50 | oscr = OSCR; | 50 | oscr = readl_relaxed(OSCR); |
51 | 51 | ||
52 | return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; | 52 | return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; |
53 | } | 53 | } |
@@ -59,8 +59,8 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c) | |||
59 | case CLOCK_EVT_MODE_ONESHOT: | 59 | case CLOCK_EVT_MODE_ONESHOT: |
60 | case CLOCK_EVT_MODE_UNUSED: | 60 | case CLOCK_EVT_MODE_UNUSED: |
61 | case CLOCK_EVT_MODE_SHUTDOWN: | 61 | case CLOCK_EVT_MODE_SHUTDOWN: |
62 | OIER &= ~OIER_E0; | 62 | writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); |
63 | OSSR = OSSR_M0; | 63 | writel_relaxed(OSSR_M0, OSSR); |
64 | break; | 64 | break; |
65 | 65 | ||
66 | case CLOCK_EVT_MODE_RESUME: | 66 | case CLOCK_EVT_MODE_RESUME: |
@@ -86,8 +86,8 @@ static struct irqaction sa1100_timer_irq = { | |||
86 | 86 | ||
87 | static void __init sa1100_timer_init(void) | 87 | static void __init sa1100_timer_init(void) |
88 | { | 88 | { |
89 | OIER = 0; | 89 | writel_relaxed(0, OIER); |
90 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; | 90 | writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); |
91 | 91 | ||
92 | setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); | 92 | setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); |
93 | 93 | ||
@@ -100,7 +100,7 @@ static void __init sa1100_timer_init(void) | |||
100 | 100 | ||
101 | setup_irq(IRQ_OST0, &sa1100_timer_irq); | 101 | setup_irq(IRQ_OST0, &sa1100_timer_irq); |
102 | 102 | ||
103 | clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, | 103 | clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, |
104 | clocksource_mmio_readl_up); | 104 | clocksource_mmio_readl_up); |
105 | clockevents_register_device(&ckevt_sa1100_osmr0); | 105 | clockevents_register_device(&ckevt_sa1100_osmr0); |
106 | } | 106 | } |
@@ -110,26 +110,26 @@ unsigned long osmr[4], oier; | |||
110 | 110 | ||
111 | static void sa1100_timer_suspend(void) | 111 | static void sa1100_timer_suspend(void) |
112 | { | 112 | { |
113 | osmr[0] = OSMR0; | 113 | osmr[0] = readl_relaxed(OSMR0); |
114 | osmr[1] = OSMR1; | 114 | osmr[1] = readl_relaxed(OSMR1); |
115 | osmr[2] = OSMR2; | 115 | osmr[2] = readl_relaxed(OSMR2); |
116 | osmr[3] = OSMR3; | 116 | osmr[3] = readl_relaxed(OSMR3); |
117 | oier = OIER; | 117 | oier = readl_relaxed(OIER); |
118 | } | 118 | } |
119 | 119 | ||
120 | static void sa1100_timer_resume(void) | 120 | static void sa1100_timer_resume(void) |
121 | { | 121 | { |
122 | OSSR = 0x0f; | 122 | writel_relaxed(0x0f, OSSR); |
123 | OSMR0 = osmr[0]; | 123 | writel_relaxed(osmr[0], OSMR0); |
124 | OSMR1 = osmr[1]; | 124 | writel_relaxed(osmr[1], OSMR1); |
125 | OSMR2 = osmr[2]; | 125 | writel_relaxed(osmr[2], OSMR2); |
126 | OSMR3 = osmr[3]; | 126 | writel_relaxed(osmr[3], OSMR3); |
127 | OIER = oier; | 127 | writel_relaxed(oier, OIER); |
128 | 128 | ||
129 | /* | 129 | /* |
130 | * OSMR0 is the system timer: make sure OSCR is sufficiently behind | 130 | * OSMR0 is the system timer: make sure OSCR is sufficiently behind |
131 | */ | 131 | */ |
132 | OSCR = OSMR0 - LATCH; | 132 | writel_relaxed(OSMR0 - LATCH, OSCR); |
133 | } | 133 | } |
134 | #else | 134 | #else |
135 | #define sa1100_timer_suspend NULL | 135 | #define sa1100_timer_suspend NULL |
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index df33909205e2..4cacc2d22fbe 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig | |||
@@ -19,6 +19,7 @@ config ARCH_SH7372 | |||
19 | select CPU_V7 | 19 | select CPU_V7 |
20 | select SH_CLK_CPG | 20 | select SH_CLK_CPG |
21 | select ARCH_WANT_OPTIONAL_GPIOLIB | 21 | select ARCH_WANT_OPTIONAL_GPIOLIB |
22 | select ARM_CPU_SUSPEND if PM || CPU_IDLE | ||
22 | 23 | ||
23 | config ARCH_SH73A0 | 24 | config ARCH_SH73A0 |
24 | bool "SH-Mobile AG5 (R8A73A00)" | 25 | bool "SH-Mobile AG5 (R8A73A00)" |
@@ -58,6 +59,7 @@ config MACH_G4EVM | |||
58 | bool "G4EVM board" | 59 | bool "G4EVM board" |
59 | depends on ARCH_SH7377 | 60 | depends on ARCH_SH7377 |
60 | select ARCH_REQUIRE_GPIOLIB | 61 | select ARCH_REQUIRE_GPIOLIB |
62 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
61 | 63 | ||
62 | config MACH_AP4EVB | 64 | config MACH_AP4EVB |
63 | bool "AP4EVB board" | 65 | bool "AP4EVB board" |
@@ -65,6 +67,7 @@ config MACH_AP4EVB | |||
65 | select ARCH_REQUIRE_GPIOLIB | 67 | select ARCH_REQUIRE_GPIOLIB |
66 | select SH_LCD_MIPI_DSI | 68 | select SH_LCD_MIPI_DSI |
67 | select SND_SOC_AK4642 if SND_SIMPLE_CARD | 69 | select SND_SOC_AK4642 if SND_SIMPLE_CARD |
70 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
68 | 71 | ||
69 | choice | 72 | choice |
70 | prompt "AP4EVB LCD panel selection" | 73 | prompt "AP4EVB LCD panel selection" |
@@ -83,6 +86,7 @@ config MACH_AG5EVM | |||
83 | bool "AG5EVM board" | 86 | bool "AG5EVM board" |
84 | select ARCH_REQUIRE_GPIOLIB | 87 | select ARCH_REQUIRE_GPIOLIB |
85 | select SH_LCD_MIPI_DSI | 88 | select SH_LCD_MIPI_DSI |
89 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
86 | depends on ARCH_SH73A0 | 90 | depends on ARCH_SH73A0 |
87 | 91 | ||
88 | config MACH_MACKEREL | 92 | config MACH_MACKEREL |
@@ -90,15 +94,18 @@ config MACH_MACKEREL | |||
90 | depends on ARCH_SH7372 | 94 | depends on ARCH_SH7372 |
91 | select ARCH_REQUIRE_GPIOLIB | 95 | select ARCH_REQUIRE_GPIOLIB |
92 | select SND_SOC_AK4642 if SND_SIMPLE_CARD | 96 | select SND_SOC_AK4642 if SND_SIMPLE_CARD |
97 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
93 | 98 | ||
94 | config MACH_KOTA2 | 99 | config MACH_KOTA2 |
95 | bool "KOTA2 board" | 100 | bool "KOTA2 board" |
96 | select ARCH_REQUIRE_GPIOLIB | 101 | select ARCH_REQUIRE_GPIOLIB |
102 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
97 | depends on ARCH_SH73A0 | 103 | depends on ARCH_SH73A0 |
98 | 104 | ||
99 | config MACH_BONITO | 105 | config MACH_BONITO |
100 | bool "bonito board" | 106 | bool "bonito board" |
101 | select ARCH_REQUIRE_GPIOLIB | 107 | select ARCH_REQUIRE_GPIOLIB |
108 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
102 | depends on ARCH_R8A7740 | 109 | depends on ARCH_R8A7740 |
103 | 110 | ||
104 | config MACH_ARMADILLO800EVA | 111 | config MACH_ARMADILLO800EVA |
@@ -106,22 +113,28 @@ config MACH_ARMADILLO800EVA | |||
106 | depends on ARCH_R8A7740 | 113 | depends on ARCH_R8A7740 |
107 | select ARCH_REQUIRE_GPIOLIB | 114 | select ARCH_REQUIRE_GPIOLIB |
108 | select USE_OF | 115 | select USE_OF |
116 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
117 | select SND_SOC_WM8978 if SND_SIMPLE_CARD | ||
109 | 118 | ||
110 | config MACH_MARZEN | 119 | config MACH_MARZEN |
111 | bool "MARZEN board" | 120 | bool "MARZEN board" |
112 | depends on ARCH_R8A7779 | 121 | depends on ARCH_R8A7779 |
113 | select ARCH_REQUIRE_GPIOLIB | 122 | select ARCH_REQUIRE_GPIOLIB |
123 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
114 | 124 | ||
115 | config MACH_KZM9D | 125 | config MACH_KZM9D |
116 | bool "KZM9D board" | 126 | bool "KZM9D board" |
117 | depends on ARCH_EMEV2 | 127 | depends on ARCH_EMEV2 |
118 | select USE_OF | 128 | select USE_OF |
129 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
119 | 130 | ||
120 | config MACH_KZM9G | 131 | config MACH_KZM9G |
121 | bool "KZM-A9-GT board" | 132 | bool "KZM-A9-GT board" |
122 | depends on ARCH_SH73A0 | 133 | depends on ARCH_SH73A0 |
123 | select ARCH_REQUIRE_GPIOLIB | 134 | select ARCH_REQUIRE_GPIOLIB |
124 | select USE_OF | 135 | select USE_OF |
136 | select SND_SOC_AK4642 if SND_SIMPLE_CARD | ||
137 | select REGULATOR_FIXED_VOLTAGE if REGULATOR | ||
125 | 138 | ||
126 | comment "SH-Mobile System Configuration" | 139 | comment "SH-Mobile System Configuration" |
127 | 140 | ||
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 8aa1962c22a2..0df5ae6740c6 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -39,7 +39,9 @@ obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o | |||
39 | # PM objects | 39 | # PM objects |
40 | obj-$(CONFIG_SUSPEND) += suspend.o | 40 | obj-$(CONFIG_SUSPEND) += suspend.o |
41 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 41 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
42 | obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o | ||
42 | obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o | 43 | obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o |
44 | obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o | ||
43 | obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o | 45 | obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o |
44 | 46 | ||
45 | # Board objects | 47 | # Board objects |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 5a6f22f05e99..d82c010fdfc6 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
29 | #include <linux/dma-mapping.h> | 29 | #include <linux/dma-mapping.h> |
30 | #include <linux/regulator/fixed.h> | ||
31 | #include <linux/regulator/machine.h> | ||
30 | #include <linux/serial_sci.h> | 32 | #include <linux/serial_sci.h> |
31 | #include <linux/smsc911x.h> | 33 | #include <linux/smsc911x.h> |
32 | #include <linux/gpio.h> | 34 | #include <linux/gpio.h> |
@@ -52,6 +54,12 @@ | |||
52 | #include <asm/hardware/cache-l2x0.h> | 54 | #include <asm/hardware/cache-l2x0.h> |
53 | #include <asm/traps.h> | 55 | #include <asm/traps.h> |
54 | 56 | ||
57 | /* Dummy supplies, where voltage doesn't matter */ | ||
58 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
59 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
60 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
61 | }; | ||
62 | |||
55 | static struct resource smsc9220_resources[] = { | 63 | static struct resource smsc9220_resources[] = { |
56 | [0] = { | 64 | [0] = { |
57 | .start = 0x14000000, | 65 | .start = 0x14000000, |
@@ -142,6 +150,13 @@ static struct platform_device fsi_device = { | |||
142 | .resource = fsi_resources, | 150 | .resource = fsi_resources, |
143 | }; | 151 | }; |
144 | 152 | ||
153 | /* Fixed 1.8V regulator to be used by MMCIF */ | ||
154 | static struct regulator_consumer_supply fixed1v8_power_consumers[] = | ||
155 | { | ||
156 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | ||
157 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | ||
158 | }; | ||
159 | |||
145 | static struct resource sh_mmcif_resources[] = { | 160 | static struct resource sh_mmcif_resources[] = { |
146 | [0] = { | 161 | [0] = { |
147 | .name = "MMCIF", | 162 | .name = "MMCIF", |
@@ -364,6 +379,13 @@ static struct platform_device mipidsi0_device = { | |||
364 | }, | 379 | }, |
365 | }; | 380 | }; |
366 | 381 | ||
382 | /* Fixed 2.8V regulators to be used by SDHI0 */ | ||
383 | static struct regulator_consumer_supply fixed2v8_power_consumers[] = | ||
384 | { | ||
385 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
386 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
387 | }; | ||
388 | |||
367 | /* SDHI0 */ | 389 | /* SDHI0 */ |
368 | static struct sh_mobile_sdhi_info sdhi0_info = { | 390 | static struct sh_mobile_sdhi_info sdhi0_info = { |
369 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | 391 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
@@ -408,8 +430,57 @@ static struct platform_device sdhi0_device = { | |||
408 | }, | 430 | }, |
409 | }; | 431 | }; |
410 | 432 | ||
411 | void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) | 433 | /* Fixed 3.3V regulator to be used by SDHI1 */ |
434 | static struct regulator_consumer_supply cn4_power_consumers[] = | ||
412 | { | 435 | { |
436 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
437 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
438 | }; | ||
439 | |||
440 | static struct regulator_init_data cn4_power_init_data = { | ||
441 | .constraints = { | ||
442 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
443 | }, | ||
444 | .num_consumer_supplies = ARRAY_SIZE(cn4_power_consumers), | ||
445 | .consumer_supplies = cn4_power_consumers, | ||
446 | }; | ||
447 | |||
448 | static struct fixed_voltage_config cn4_power_info = { | ||
449 | .supply_name = "CN4 SD/MMC Vdd", | ||
450 | .microvolts = 3300000, | ||
451 | .gpio = GPIO_PORT114, | ||
452 | .enable_high = 1, | ||
453 | .init_data = &cn4_power_init_data, | ||
454 | }; | ||
455 | |||
456 | static struct platform_device cn4_power = { | ||
457 | .name = "reg-fixed-voltage", | ||
458 | .id = 2, | ||
459 | .dev = { | ||
460 | .platform_data = &cn4_power_info, | ||
461 | }, | ||
462 | }; | ||
463 | |||
464 | static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) | ||
465 | { | ||
466 | static int power_gpio = -EINVAL; | ||
467 | |||
468 | if (power_gpio < 0) { | ||
469 | int ret = gpio_request(GPIO_PORT114, "sdhi1_power"); | ||
470 | if (!ret) { | ||
471 | power_gpio = GPIO_PORT114; | ||
472 | gpio_direction_output(power_gpio, 0); | ||
473 | } | ||
474 | } | ||
475 | |||
476 | /* | ||
477 | * If requesting the GPIO above failed, it means, that the regulator got | ||
478 | * probed and grabbed the GPIO, but we don't know, whether the sdhi | ||
479 | * driver already uses the regulator. If it doesn't, we have to toggle | ||
480 | * the GPIO ourselves, even though it is now owned by the fixed | ||
481 | * regulator driver. We have to live with the race in case the driver | ||
482 | * gets unloaded and the GPIO freed between these two steps. | ||
483 | */ | ||
413 | gpio_set_value(GPIO_PORT114, state); | 484 | gpio_set_value(GPIO_PORT114, state); |
414 | } | 485 | } |
415 | 486 | ||
@@ -455,6 +526,7 @@ static struct platform_device sdhi1_device = { | |||
455 | }; | 526 | }; |
456 | 527 | ||
457 | static struct platform_device *ag5evm_devices[] __initdata = { | 528 | static struct platform_device *ag5evm_devices[] __initdata = { |
529 | &cn4_power, | ||
458 | ð_device, | 530 | ð_device, |
459 | &keysc_device, | 531 | &keysc_device, |
460 | &fsi_device, | 532 | &fsi_device, |
@@ -468,6 +540,12 @@ static struct platform_device *ag5evm_devices[] __initdata = { | |||
468 | 540 | ||
469 | static void __init ag5evm_init(void) | 541 | static void __init ag5evm_init(void) |
470 | { | 542 | { |
543 | regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, | ||
544 | ARRAY_SIZE(fixed1v8_power_consumers), 1800000); | ||
545 | regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers, | ||
546 | ARRAY_SIZE(fixed2v8_power_consumers), 3300000); | ||
547 | regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
548 | |||
471 | sh73a0_pinmux_init(); | 549 | sh73a0_pinmux_init(); |
472 | 550 | ||
473 | /* enable SCIFA2 */ | 551 | /* enable SCIFA2 */ |
@@ -562,8 +640,6 @@ static void __init ag5evm_init(void) | |||
562 | gpio_request(GPIO_FN_SDHID1_2_PU, NULL); | 640 | gpio_request(GPIO_FN_SDHID1_2_PU, NULL); |
563 | gpio_request(GPIO_FN_SDHID1_1_PU, NULL); | 641 | gpio_request(GPIO_FN_SDHID1_1_PU, NULL); |
564 | gpio_request(GPIO_FN_SDHID1_0_PU, NULL); | 642 | gpio_request(GPIO_FN_SDHID1_0_PU, NULL); |
565 | gpio_request(GPIO_PORT114, "sdhi1_power"); | ||
566 | gpio_direction_output(GPIO_PORT114, 0); | ||
567 | 643 | ||
568 | #ifdef CONFIG_CACHE_L2X0 | 644 | #ifdef CONFIG_CACHE_L2X0 |
569 | /* Shared attribute override enable, 64K*8way */ | 645 | /* Shared attribute override enable, 64K*8way */ |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index ace60246a5df..f172ca85905c 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -34,6 +34,8 @@ | |||
34 | #include <linux/i2c.h> | 34 | #include <linux/i2c.h> |
35 | #include <linux/i2c/tsc2007.h> | 35 | #include <linux/i2c/tsc2007.h> |
36 | #include <linux/io.h> | 36 | #include <linux/io.h> |
37 | #include <linux/regulator/fixed.h> | ||
38 | #include <linux/regulator/machine.h> | ||
37 | #include <linux/smsc911x.h> | 39 | #include <linux/smsc911x.h> |
38 | #include <linux/sh_intc.h> | 40 | #include <linux/sh_intc.h> |
39 | #include <linux/sh_clk.h> | 41 | #include <linux/sh_clk.h> |
@@ -159,6 +161,27 @@ | |||
159 | * CN12: 3.3v | 161 | * CN12: 3.3v |
160 | */ | 162 | */ |
161 | 163 | ||
164 | /* Dummy supplies, where voltage doesn't matter */ | ||
165 | static struct regulator_consumer_supply fixed1v8_power_consumers[] = | ||
166 | { | ||
167 | /* J22 default position: 1.8V */ | ||
168 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
169 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
170 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | ||
171 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | ||
172 | }; | ||
173 | |||
174 | static struct regulator_consumer_supply fixed3v3_power_consumers[] = | ||
175 | { | ||
176 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
177 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
178 | }; | ||
179 | |||
180 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
181 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
182 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
183 | }; | ||
184 | |||
162 | /* MTD */ | 185 | /* MTD */ |
163 | static struct mtd_partition nor_flash_partitions[] = { | 186 | static struct mtd_partition nor_flash_partitions[] = { |
164 | { | 187 | { |
@@ -1138,21 +1161,6 @@ static void __init fsi_init_pm_clock(void) | |||
1138 | clk_put(fsia_ick); | 1161 | clk_put(fsia_ick); |
1139 | } | 1162 | } |
1140 | 1163 | ||
1141 | /* | ||
1142 | * FIXME !! | ||
1143 | * | ||
1144 | * gpio_no_direction | ||
1145 | * are quick_hack. | ||
1146 | * | ||
1147 | * current gpio frame work doesn't have | ||
1148 | * the method to control only pull up/down/free. | ||
1149 | * this function should be replaced by correct gpio function | ||
1150 | */ | ||
1151 | static void __init gpio_no_direction(u32 addr) | ||
1152 | { | ||
1153 | __raw_writeb(0x00, addr); | ||
1154 | } | ||
1155 | |||
1156 | /* TouchScreen */ | 1164 | /* TouchScreen */ |
1157 | #ifdef CONFIG_AP4EVB_QHD | 1165 | #ifdef CONFIG_AP4EVB_QHD |
1158 | # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 | 1166 | # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 |
@@ -1224,6 +1232,12 @@ static void __init ap4evb_init(void) | |||
1224 | u32 srcr4; | 1232 | u32 srcr4; |
1225 | struct clk *clk; | 1233 | struct clk *clk; |
1226 | 1234 | ||
1235 | regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, | ||
1236 | ARRAY_SIZE(fixed1v8_power_consumers), 1800000); | ||
1237 | regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers, | ||
1238 | ARRAY_SIZE(fixed3v3_power_consumers), 3300000); | ||
1239 | regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
1240 | |||
1227 | /* External clock source */ | 1241 | /* External clock source */ |
1228 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); | 1242 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); |
1229 | 1243 | ||
@@ -1302,8 +1316,8 @@ static void __init ap4evb_init(void) | |||
1302 | 1316 | ||
1303 | gpio_request(GPIO_PORT9, NULL); | 1317 | gpio_request(GPIO_PORT9, NULL); |
1304 | gpio_request(GPIO_PORT10, NULL); | 1318 | gpio_request(GPIO_PORT10, NULL); |
1305 | gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ | 1319 | gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */ |
1306 | gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ | 1320 | gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */ |
1307 | 1321 | ||
1308 | /* card detect pin for MMC slot (CN7) */ | 1322 | /* card detect pin for MMC slot (CN7) */ |
1309 | gpio_request(GPIO_PORT41, NULL); | 1323 | gpio_request(GPIO_PORT41, NULL); |
@@ -1447,14 +1461,14 @@ static void __init ap4evb_init(void) | |||
1447 | 1461 | ||
1448 | platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); | 1462 | platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); |
1449 | 1463 | ||
1450 | sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device); | 1464 | rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc1_device); |
1451 | sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); | 1465 | rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device); |
1452 | sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); | 1466 | rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device); |
1453 | 1467 | ||
1454 | sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); | 1468 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device); |
1455 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); | 1469 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device); |
1456 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); | 1470 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device); |
1457 | sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); | 1471 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device); |
1458 | 1472 | ||
1459 | hdmi_init_pm_clock(); | 1473 | hdmi_init_pm_clock(); |
1460 | fsi_init_pm_clock(); | 1474 | fsi_init_pm_clock(); |
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 9bd135531d76..cf10f92856dc 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c | |||
@@ -28,6 +28,8 @@ | |||
28 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
29 | #include <linux/gpio.h> | 29 | #include <linux/gpio.h> |
30 | #include <linux/gpio_keys.h> | 30 | #include <linux/gpio_keys.h> |
31 | #include <linux/regulator/fixed.h> | ||
32 | #include <linux/regulator/machine.h> | ||
31 | #include <linux/sh_eth.h> | 33 | #include <linux/sh_eth.h> |
32 | #include <linux/videodev2.h> | 34 | #include <linux/videodev2.h> |
33 | #include <linux/usb/renesas_usbhs.h> | 35 | #include <linux/usb/renesas_usbhs.h> |
@@ -37,14 +39,20 @@ | |||
37 | #include <linux/mmc/sh_mobile_sdhi.h> | 39 | #include <linux/mmc/sh_mobile_sdhi.h> |
38 | #include <mach/common.h> | 40 | #include <mach/common.h> |
39 | #include <mach/irqs.h> | 41 | #include <mach/irqs.h> |
42 | #include <mach/r8a7740.h> | ||
43 | #include <media/mt9t112.h> | ||
44 | #include <media/sh_mobile_ceu.h> | ||
45 | #include <media/soc_camera.h> | ||
40 | #include <asm/page.h> | 46 | #include <asm/page.h> |
41 | #include <asm/mach-types.h> | 47 | #include <asm/mach-types.h> |
42 | #include <asm/mach/arch.h> | 48 | #include <asm/mach/arch.h> |
43 | #include <asm/mach/map.h> | 49 | #include <asm/mach/map.h> |
44 | #include <asm/mach/time.h> | 50 | #include <asm/mach/time.h> |
45 | #include <asm/hardware/cache-l2x0.h> | 51 | #include <asm/hardware/cache-l2x0.h> |
46 | #include <mach/r8a7740.h> | ||
47 | #include <video/sh_mobile_lcdc.h> | 52 | #include <video/sh_mobile_lcdc.h> |
53 | #include <video/sh_mobile_hdmi.h> | ||
54 | #include <sound/sh_fsi.h> | ||
55 | #include <sound/simple_card.h> | ||
48 | 56 | ||
49 | /* | 57 | /* |
50 | * CON1 Camera Module | 58 | * CON1 Camera Module |
@@ -108,6 +116,14 @@ | |||
108 | */ | 116 | */ |
109 | 117 | ||
110 | /* | 118 | /* |
119 | * FSI-WM8978 | ||
120 | * | ||
121 | * this command is required when playback. | ||
122 | * | ||
123 | * # amixer set "Headphone" 50 | ||
124 | */ | ||
125 | |||
126 | /* | ||
111 | * USB function | 127 | * USB function |
112 | * | 128 | * |
113 | * When you use USB Function, | 129 | * When you use USB Function, |
@@ -117,14 +133,8 @@ | |||
117 | * These are a little bit complex. | 133 | * These are a little bit complex. |
118 | * see | 134 | * see |
119 | * usbhsf_power_ctrl() | 135 | * usbhsf_power_ctrl() |
120 | * | ||
121 | * CAUTION | ||
122 | * | ||
123 | * It uses autonomy mode for USB hotplug at this point | ||
124 | * (= usbhs_private.platform_callback.get_vbus is NULL), | ||
125 | * since we don't know what's happen on PM control | ||
126 | * on this workaround. | ||
127 | */ | 136 | */ |
137 | #define IRQ7 evt2irq(0x02e0) | ||
128 | #define USBCR1 0xe605810a | 138 | #define USBCR1 0xe605810a |
129 | #define USBH 0xC6700000 | 139 | #define USBH 0xC6700000 |
130 | #define USBH_USBCTR 0x10834 | 140 | #define USBH_USBCTR 0x10834 |
@@ -204,6 +214,20 @@ static void usbhsf_power_ctrl(struct platform_device *pdev, | |||
204 | } | 214 | } |
205 | } | 215 | } |
206 | 216 | ||
217 | static int usbhsf_get_vbus(struct platform_device *pdev) | ||
218 | { | ||
219 | return gpio_get_value(GPIO_PORT209); | ||
220 | } | ||
221 | |||
222 | static irqreturn_t usbhsf_interrupt(int irq, void *data) | ||
223 | { | ||
224 | struct platform_device *pdev = data; | ||
225 | |||
226 | renesas_usbhs_call_notify_hotplug(pdev); | ||
227 | |||
228 | return IRQ_HANDLED; | ||
229 | } | ||
230 | |||
207 | static void usbhsf_hardware_exit(struct platform_device *pdev) | 231 | static void usbhsf_hardware_exit(struct platform_device *pdev) |
208 | { | 232 | { |
209 | struct usbhsf_private *priv = usbhsf_get_priv(pdev); | 233 | struct usbhsf_private *priv = usbhsf_get_priv(pdev); |
@@ -227,11 +251,14 @@ static void usbhsf_hardware_exit(struct platform_device *pdev) | |||
227 | priv->host = NULL; | 251 | priv->host = NULL; |
228 | priv->func = NULL; | 252 | priv->func = NULL; |
229 | priv->usbh_base = NULL; | 253 | priv->usbh_base = NULL; |
254 | |||
255 | free_irq(IRQ7, pdev); | ||
230 | } | 256 | } |
231 | 257 | ||
232 | static int usbhsf_hardware_init(struct platform_device *pdev) | 258 | static int usbhsf_hardware_init(struct platform_device *pdev) |
233 | { | 259 | { |
234 | struct usbhsf_private *priv = usbhsf_get_priv(pdev); | 260 | struct usbhsf_private *priv = usbhsf_get_priv(pdev); |
261 | int ret; | ||
235 | 262 | ||
236 | priv->phy = clk_get(&pdev->dev, "phy"); | 263 | priv->phy = clk_get(&pdev->dev, "phy"); |
237 | priv->usb24 = clk_get(&pdev->dev, "usb24"); | 264 | priv->usb24 = clk_get(&pdev->dev, "usb24"); |
@@ -251,6 +278,14 @@ static int usbhsf_hardware_init(struct platform_device *pdev) | |||
251 | return -EIO; | 278 | return -EIO; |
252 | } | 279 | } |
253 | 280 | ||
281 | ret = request_irq(IRQ7, usbhsf_interrupt, IRQF_TRIGGER_NONE, | ||
282 | dev_name(&pdev->dev), pdev); | ||
283 | if (ret) { | ||
284 | dev_err(&pdev->dev, "request_irq err\n"); | ||
285 | return ret; | ||
286 | } | ||
287 | irq_set_irq_type(IRQ7, IRQ_TYPE_EDGE_BOTH); | ||
288 | |||
254 | /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */ | 289 | /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */ |
255 | clk_set_rate(priv->usb24, | 290 | clk_set_rate(priv->usb24, |
256 | clk_get_rate(clk_get_parent(priv->usb24))); | 291 | clk_get_rate(clk_get_parent(priv->usb24))); |
@@ -262,6 +297,7 @@ static struct usbhsf_private usbhsf_private = { | |||
262 | .info = { | 297 | .info = { |
263 | .platform_callback = { | 298 | .platform_callback = { |
264 | .get_id = usbhsf_get_id, | 299 | .get_id = usbhsf_get_id, |
300 | .get_vbus = usbhsf_get_vbus, | ||
265 | .hardware_init = usbhsf_hardware_init, | 301 | .hardware_init = usbhsf_hardware_init, |
266 | .hardware_exit = usbhsf_hardware_exit, | 302 | .hardware_exit = usbhsf_hardware_exit, |
267 | .power_ctrl = usbhsf_power_ctrl, | 303 | .power_ctrl = usbhsf_power_ctrl, |
@@ -269,6 +305,8 @@ static struct usbhsf_private usbhsf_private = { | |||
269 | .driver_param = { | 305 | .driver_param = { |
270 | .buswait_bwait = 5, | 306 | .buswait_bwait = 5, |
271 | .detection_delay = 5, | 307 | .detection_delay = 5, |
308 | .d0_rx_id = SHDMA_SLAVE_USBHS_RX, | ||
309 | .d1_tx_id = SHDMA_SLAVE_USBHS_TX, | ||
272 | }, | 310 | }, |
273 | } | 311 | } |
274 | }; | 312 | }; |
@@ -384,6 +422,103 @@ static struct platform_device lcdc0_device = { | |||
384 | }, | 422 | }, |
385 | }; | 423 | }; |
386 | 424 | ||
425 | /* | ||
426 | * LCDC1/HDMI | ||
427 | */ | ||
428 | static struct sh_mobile_hdmi_info hdmi_info = { | ||
429 | .flags = HDMI_OUTPUT_PUSH_PULL | | ||
430 | HDMI_OUTPUT_POLARITY_HI | | ||
431 | HDMI_32BIT_REG | | ||
432 | HDMI_HAS_HTOP1 | | ||
433 | HDMI_SND_SRC_SPDIF, | ||
434 | }; | ||
435 | |||
436 | static struct resource hdmi_resources[] = { | ||
437 | [0] = { | ||
438 | .name = "HDMI", | ||
439 | .start = 0xe6be0000, | ||
440 | .end = 0xe6be03ff, | ||
441 | .flags = IORESOURCE_MEM, | ||
442 | }, | ||
443 | [1] = { | ||
444 | .start = evt2irq(0x1700), | ||
445 | .flags = IORESOURCE_IRQ, | ||
446 | }, | ||
447 | [2] = { | ||
448 | .name = "HDMI emma3pf", | ||
449 | .start = 0xe6be4000, | ||
450 | .end = 0xe6be43ff, | ||
451 | .flags = IORESOURCE_MEM, | ||
452 | }, | ||
453 | }; | ||
454 | |||
455 | static struct platform_device hdmi_device = { | ||
456 | .name = "sh-mobile-hdmi", | ||
457 | .num_resources = ARRAY_SIZE(hdmi_resources), | ||
458 | .resource = hdmi_resources, | ||
459 | .id = -1, | ||
460 | .dev = { | ||
461 | .platform_data = &hdmi_info, | ||
462 | }, | ||
463 | }; | ||
464 | |||
465 | static const struct fb_videomode lcdc1_mode = { | ||
466 | .name = "HDMI 720p", | ||
467 | .xres = 1280, | ||
468 | .yres = 720, | ||
469 | .pixclock = 13468, | ||
470 | .left_margin = 220, | ||
471 | .right_margin = 110, | ||
472 | .hsync_len = 40, | ||
473 | .upper_margin = 20, | ||
474 | .lower_margin = 5, | ||
475 | .vsync_len = 5, | ||
476 | .refresh = 60, | ||
477 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | ||
478 | }; | ||
479 | |||
480 | static struct sh_mobile_lcdc_info hdmi_lcdc_info = { | ||
481 | .clock_source = LCDC_CLK_PERIPHERAL, /* HDMI clock */ | ||
482 | .ch[0] = { | ||
483 | .chan = LCDC_CHAN_MAINLCD, | ||
484 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
485 | .interface_type = RGB24, | ||
486 | .clock_divider = 1, | ||
487 | .flags = LCDC_FLAGS_DWPOL, | ||
488 | .lcd_modes = &lcdc1_mode, | ||
489 | .num_modes = 1, | ||
490 | .tx_dev = &hdmi_device, | ||
491 | .panel_cfg = { | ||
492 | .width = 1280, | ||
493 | .height = 720, | ||
494 | }, | ||
495 | }, | ||
496 | }; | ||
497 | |||
498 | static struct resource hdmi_lcdc_resources[] = { | ||
499 | [0] = { | ||
500 | .name = "LCDC1", | ||
501 | .start = 0xfe944000, | ||
502 | .end = 0xfe948000 - 1, | ||
503 | .flags = IORESOURCE_MEM, | ||
504 | }, | ||
505 | [1] = { | ||
506 | .start = intcs_evt2irq(0x1780), | ||
507 | .flags = IORESOURCE_IRQ, | ||
508 | }, | ||
509 | }; | ||
510 | |||
511 | static struct platform_device hdmi_lcdc_device = { | ||
512 | .name = "sh_mobile_lcdc_fb", | ||
513 | .num_resources = ARRAY_SIZE(hdmi_lcdc_resources), | ||
514 | .resource = hdmi_lcdc_resources, | ||
515 | .id = 1, | ||
516 | .dev = { | ||
517 | .platform_data = &hdmi_lcdc_info, | ||
518 | .coherent_dma_mask = ~0, | ||
519 | }, | ||
520 | }; | ||
521 | |||
387 | /* GPIO KEY */ | 522 | /* GPIO KEY */ |
388 | #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } | 523 | #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } |
389 | 524 | ||
@@ -407,6 +542,17 @@ static struct platform_device gpio_keys_device = { | |||
407 | }, | 542 | }, |
408 | }; | 543 | }; |
409 | 544 | ||
545 | /* Fixed 3.3V regulator to be used by SDHI0, SDHI1, MMCIF */ | ||
546 | static struct regulator_consumer_supply fixed3v3_power_consumers[] = | ||
547 | { | ||
548 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
549 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
550 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
551 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
552 | REGULATOR_SUPPLY("vmmc", "sh_mmcif"), | ||
553 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif"), | ||
554 | }; | ||
555 | |||
410 | /* SDHI0 */ | 556 | /* SDHI0 */ |
411 | /* | 557 | /* |
412 | * FIXME | 558 | * FIXME |
@@ -418,6 +564,8 @@ static struct platform_device gpio_keys_device = { | |||
418 | */ | 564 | */ |
419 | #define IRQ31 evt2irq(0x33E0) | 565 | #define IRQ31 evt2irq(0x33E0) |
420 | static struct sh_mobile_sdhi_info sdhi0_info = { | 566 | static struct sh_mobile_sdhi_info sdhi0_info = { |
567 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, | ||
568 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | ||
421 | .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\ | 569 | .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\ |
422 | MMC_CAP_NEEDS_POLL, | 570 | MMC_CAP_NEEDS_POLL, |
423 | .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | 571 | .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, |
@@ -458,6 +606,8 @@ static struct platform_device sdhi0_device = { | |||
458 | 606 | ||
459 | /* SDHI1 */ | 607 | /* SDHI1 */ |
460 | static struct sh_mobile_sdhi_info sdhi1_info = { | 608 | static struct sh_mobile_sdhi_info sdhi1_info = { |
609 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, | ||
610 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | ||
461 | .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, | 611 | .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, |
462 | .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | 612 | .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, |
463 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | 613 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, |
@@ -532,12 +682,209 @@ static struct platform_device sh_mmcif_device = { | |||
532 | .resource = sh_mmcif_resources, | 682 | .resource = sh_mmcif_resources, |
533 | }; | 683 | }; |
534 | 684 | ||
685 | /* Camera */ | ||
686 | static int mt9t111_power(struct device *dev, int mode) | ||
687 | { | ||
688 | struct clk *mclk = clk_get(NULL, "video1"); | ||
689 | |||
690 | if (IS_ERR(mclk)) { | ||
691 | dev_err(dev, "can't get video1 clock\n"); | ||
692 | return -EINVAL; | ||
693 | } | ||
694 | |||
695 | if (mode) { | ||
696 | /* video1 (= CON1 camera) expect 24MHz */ | ||
697 | clk_set_rate(mclk, clk_round_rate(mclk, 24000000)); | ||
698 | clk_enable(mclk); | ||
699 | gpio_direction_output(GPIO_PORT158, 1); | ||
700 | } else { | ||
701 | gpio_direction_output(GPIO_PORT158, 0); | ||
702 | clk_disable(mclk); | ||
703 | } | ||
704 | |||
705 | clk_put(mclk); | ||
706 | |||
707 | return 0; | ||
708 | } | ||
709 | |||
710 | static struct i2c_board_info i2c_camera_mt9t111 = { | ||
711 | I2C_BOARD_INFO("mt9t112", 0x3d), | ||
712 | }; | ||
713 | |||
714 | static struct mt9t112_camera_info mt9t111_info = { | ||
715 | .divider = { 16, 0, 0, 7, 0, 10, 14, 7, 7 }, | ||
716 | }; | ||
717 | |||
718 | static struct soc_camera_link mt9t111_link = { | ||
719 | .i2c_adapter_id = 0, | ||
720 | .bus_id = 0, | ||
721 | .board_info = &i2c_camera_mt9t111, | ||
722 | .power = mt9t111_power, | ||
723 | .priv = &mt9t111_info, | ||
724 | }; | ||
725 | |||
726 | static struct platform_device camera_device = { | ||
727 | .name = "soc-camera-pdrv", | ||
728 | .id = 0, | ||
729 | .dev = { | ||
730 | .platform_data = &mt9t111_link, | ||
731 | }, | ||
732 | }; | ||
733 | |||
734 | /* CEU0 */ | ||
735 | static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { | ||
736 | .flags = SH_CEU_FLAG_LOWER_8BIT, | ||
737 | }; | ||
738 | |||
739 | static struct resource ceu0_resources[] = { | ||
740 | [0] = { | ||
741 | .name = "CEU", | ||
742 | .start = 0xfe910000, | ||
743 | .end = 0xfe91009f, | ||
744 | .flags = IORESOURCE_MEM, | ||
745 | }, | ||
746 | [1] = { | ||
747 | .start = intcs_evt2irq(0x0500), | ||
748 | .flags = IORESOURCE_IRQ, | ||
749 | }, | ||
750 | [2] = { | ||
751 | /* place holder for contiguous memory */ | ||
752 | }, | ||
753 | }; | ||
754 | |||
755 | static struct platform_device ceu0_device = { | ||
756 | .name = "sh_mobile_ceu", | ||
757 | .id = 0, | ||
758 | .num_resources = ARRAY_SIZE(ceu0_resources), | ||
759 | .resource = ceu0_resources, | ||
760 | .dev = { | ||
761 | .platform_data = &sh_mobile_ceu0_info, | ||
762 | .coherent_dma_mask = 0xffffffff, | ||
763 | }, | ||
764 | }; | ||
765 | |||
766 | /* FSI */ | ||
767 | static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) | ||
768 | { | ||
769 | struct clk *fsib; | ||
770 | int ret; | ||
771 | |||
772 | /* it support 48KHz only */ | ||
773 | if (48000 != rate) | ||
774 | return -EINVAL; | ||
775 | |||
776 | fsib = clk_get(dev, "ickb"); | ||
777 | if (IS_ERR(fsib)) | ||
778 | return -EINVAL; | ||
779 | |||
780 | if (enable) { | ||
781 | ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | ||
782 | clk_enable(fsib); | ||
783 | } else { | ||
784 | ret = 0; | ||
785 | clk_disable(fsib); | ||
786 | } | ||
787 | |||
788 | clk_put(fsib); | ||
789 | |||
790 | return ret; | ||
791 | } | ||
792 | |||
793 | static struct sh_fsi_platform_info fsi_info = { | ||
794 | /* FSI-WM8978 */ | ||
795 | .port_a = { | ||
796 | .tx_id = SHDMA_SLAVE_FSIA_TX, | ||
797 | }, | ||
798 | /* FSI-HDMI */ | ||
799 | .port_b = { | ||
800 | .flags = SH_FSI_FMT_SPDIF | | ||
801 | SH_FSI_ENABLE_STREAM_MODE, | ||
802 | .set_rate = fsi_hdmi_set_rate, | ||
803 | .tx_id = SHDMA_SLAVE_FSIB_TX, | ||
804 | } | ||
805 | }; | ||
806 | |||
807 | static struct resource fsi_resources[] = { | ||
808 | [0] = { | ||
809 | .name = "FSI", | ||
810 | .start = 0xfe1f0000, | ||
811 | .end = 0xfe1f8400 - 1, | ||
812 | .flags = IORESOURCE_MEM, | ||
813 | }, | ||
814 | [1] = { | ||
815 | .start = evt2irq(0x1840), | ||
816 | .flags = IORESOURCE_IRQ, | ||
817 | }, | ||
818 | }; | ||
819 | |||
820 | static struct platform_device fsi_device = { | ||
821 | .name = "sh_fsi2", | ||
822 | .id = -1, | ||
823 | .num_resources = ARRAY_SIZE(fsi_resources), | ||
824 | .resource = fsi_resources, | ||
825 | .dev = { | ||
826 | .platform_data = &fsi_info, | ||
827 | }, | ||
828 | }; | ||
829 | |||
830 | /* FSI-WM8978 */ | ||
831 | static struct asoc_simple_dai_init_info fsi_wm8978_init_info = { | ||
832 | .fmt = SND_SOC_DAIFMT_I2S, | ||
833 | .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF, | ||
834 | .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS, | ||
835 | .sysclk = 12288000, | ||
836 | }; | ||
837 | |||
838 | static struct asoc_simple_card_info fsi_wm8978_info = { | ||
839 | .name = "wm8978", | ||
840 | .card = "FSI2A-WM8978", | ||
841 | .cpu_dai = "fsia-dai", | ||
842 | .codec = "wm8978.0-001a", | ||
843 | .platform = "sh_fsi2", | ||
844 | .codec_dai = "wm8978-hifi", | ||
845 | .init = &fsi_wm8978_init_info, | ||
846 | }; | ||
847 | |||
848 | static struct platform_device fsi_wm8978_device = { | ||
849 | .name = "asoc-simple-card", | ||
850 | .id = 0, | ||
851 | .dev = { | ||
852 | .platform_data = &fsi_wm8978_info, | ||
853 | }, | ||
854 | }; | ||
855 | |||
856 | /* FSI-HDMI */ | ||
857 | static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = { | ||
858 | .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM, | ||
859 | }; | ||
860 | |||
861 | static struct asoc_simple_card_info fsi2_hdmi_info = { | ||
862 | .name = "HDMI", | ||
863 | .card = "FSI2B-HDMI", | ||
864 | .cpu_dai = "fsib-dai", | ||
865 | .codec = "sh-mobile-hdmi", | ||
866 | .platform = "sh_fsi2", | ||
867 | .codec_dai = "sh_mobile_hdmi-hifi", | ||
868 | .init = &fsi2_hdmi_init_info, | ||
869 | }; | ||
870 | |||
871 | static struct platform_device fsi_hdmi_device = { | ||
872 | .name = "asoc-simple-card", | ||
873 | .id = 1, | ||
874 | .dev = { | ||
875 | .platform_data = &fsi2_hdmi_info, | ||
876 | }, | ||
877 | }; | ||
878 | |||
535 | /* I2C */ | 879 | /* I2C */ |
536 | static struct i2c_board_info i2c0_devices[] = { | 880 | static struct i2c_board_info i2c0_devices[] = { |
537 | { | 881 | { |
538 | I2C_BOARD_INFO("st1232-ts", 0x55), | 882 | I2C_BOARD_INFO("st1232-ts", 0x55), |
539 | .irq = evt2irq(0x0340), | 883 | .irq = evt2irq(0x0340), |
540 | }, | 884 | }, |
885 | { | ||
886 | I2C_BOARD_INFO("wm8978", 0x1a), | ||
887 | }, | ||
541 | }; | 888 | }; |
542 | 889 | ||
543 | /* | 890 | /* |
@@ -549,6 +896,13 @@ static struct platform_device *eva_devices[] __initdata = { | |||
549 | &sh_eth_device, | 896 | &sh_eth_device, |
550 | &sdhi0_device, | 897 | &sdhi0_device, |
551 | &sh_mmcif_device, | 898 | &sh_mmcif_device, |
899 | &hdmi_device, | ||
900 | &hdmi_lcdc_device, | ||
901 | &camera_device, | ||
902 | &ceu0_device, | ||
903 | &fsi_device, | ||
904 | &fsi_hdmi_device, | ||
905 | &fsi_wm8978_device, | ||
552 | }; | 906 | }; |
553 | 907 | ||
554 | static void __init eva_clock_init(void) | 908 | static void __init eva_clock_init(void) |
@@ -556,10 +910,14 @@ static void __init eva_clock_init(void) | |||
556 | struct clk *system = clk_get(NULL, "system_clk"); | 910 | struct clk *system = clk_get(NULL, "system_clk"); |
557 | struct clk *xtal1 = clk_get(NULL, "extal1"); | 911 | struct clk *xtal1 = clk_get(NULL, "extal1"); |
558 | struct clk *usb24s = clk_get(NULL, "usb24s"); | 912 | struct clk *usb24s = clk_get(NULL, "usb24s"); |
913 | struct clk *fsibck = clk_get(NULL, "fsibck"); | ||
914 | struct clk *fsib = clk_get(&fsi_device.dev, "ickb"); | ||
559 | 915 | ||
560 | if (IS_ERR(system) || | 916 | if (IS_ERR(system) || |
561 | IS_ERR(xtal1) || | 917 | IS_ERR(xtal1) || |
562 | IS_ERR(usb24s)) { | 918 | IS_ERR(usb24s) || |
919 | IS_ERR(fsibck) || | ||
920 | IS_ERR(fsib)) { | ||
563 | pr_err("armadillo800eva board clock init failed\n"); | 921 | pr_err("armadillo800eva board clock init failed\n"); |
564 | goto clock_error; | 922 | goto clock_error; |
565 | } | 923 | } |
@@ -570,6 +928,11 @@ static void __init eva_clock_init(void) | |||
570 | /* usb24s use extal1 (= system) clock (= 24MHz) */ | 928 | /* usb24s use extal1 (= system) clock (= 24MHz) */ |
571 | clk_set_parent(usb24s, system); | 929 | clk_set_parent(usb24s, system); |
572 | 930 | ||
931 | /* FSIBCK is 12.288MHz, and it is parent of FSI-B */ | ||
932 | clk_set_parent(fsib, fsibck); | ||
933 | clk_set_rate(fsibck, 12288000); | ||
934 | clk_set_rate(fsib, 12288000); | ||
935 | |||
573 | clock_error: | 936 | clock_error: |
574 | if (!IS_ERR(system)) | 937 | if (!IS_ERR(system)) |
575 | clk_put(system); | 938 | clk_put(system); |
@@ -577,16 +940,26 @@ clock_error: | |||
577 | clk_put(xtal1); | 940 | clk_put(xtal1); |
578 | if (!IS_ERR(usb24s)) | 941 | if (!IS_ERR(usb24s)) |
579 | clk_put(usb24s); | 942 | clk_put(usb24s); |
943 | if (!IS_ERR(fsibck)) | ||
944 | clk_put(fsibck); | ||
945 | if (!IS_ERR(fsib)) | ||
946 | clk_put(fsib); | ||
580 | } | 947 | } |
581 | 948 | ||
582 | /* | 949 | /* |
583 | * board init | 950 | * board init |
584 | */ | 951 | */ |
952 | #define GPIO_PORT7CR 0xe6050007 | ||
953 | #define GPIO_PORT8CR 0xe6050008 | ||
585 | static void __init eva_init(void) | 954 | static void __init eva_init(void) |
586 | { | 955 | { |
587 | eva_clock_init(); | 956 | struct platform_device *usb = NULL; |
957 | |||
958 | regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, | ||
959 | ARRAY_SIZE(fixed3v3_power_consumers), 3300000); | ||
588 | 960 | ||
589 | r8a7740_pinmux_init(); | 961 | r8a7740_pinmux_init(); |
962 | r8a7740_meram_workaround(); | ||
590 | 963 | ||
591 | /* SCIFA1 */ | 964 | /* SCIFA1 */ |
592 | gpio_request(GPIO_FN_SCIFA1_RXD, NULL); | 965 | gpio_request(GPIO_FN_SCIFA1_RXD, NULL); |
@@ -667,8 +1040,19 @@ static void __init eva_init(void) | |||
667 | /* USB Host */ | 1040 | /* USB Host */ |
668 | } else { | 1041 | } else { |
669 | /* USB Func */ | 1042 | /* USB Func */ |
670 | gpio_request(GPIO_FN_VBUS, NULL); | 1043 | /* |
1044 | * A1 chip has 2 IRQ7 pin and it was controled by MSEL register. | ||
1045 | * OTOH, usbhs interrupt needs its value (HI/LOW) to decide | ||
1046 | * USB connection/disconnection (usbhsf_get_vbus()). | ||
1047 | * This means we needs to select GPIO_FN_IRQ7_PORT209 first, | ||
1048 | * and select GPIO_PORT209 here | ||
1049 | */ | ||
1050 | gpio_request(GPIO_FN_IRQ7_PORT209, NULL); | ||
1051 | gpio_request(GPIO_PORT209, NULL); | ||
1052 | gpio_direction_input(GPIO_PORT209); | ||
1053 | |||
671 | platform_device_register(&usbhsf_device); | 1054 | platform_device_register(&usbhsf_device); |
1055 | usb = &usbhsf_device; | ||
672 | } | 1056 | } |
673 | 1057 | ||
674 | /* SDHI0 */ | 1058 | /* SDHI0 */ |
@@ -706,6 +1090,48 @@ static void __init eva_init(void) | |||
706 | gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL); | 1090 | gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL); |
707 | gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL); | 1091 | gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL); |
708 | 1092 | ||
1093 | /* CEU0 */ | ||
1094 | gpio_request(GPIO_FN_VIO0_D7, NULL); | ||
1095 | gpio_request(GPIO_FN_VIO0_D6, NULL); | ||
1096 | gpio_request(GPIO_FN_VIO0_D5, NULL); | ||
1097 | gpio_request(GPIO_FN_VIO0_D4, NULL); | ||
1098 | gpio_request(GPIO_FN_VIO0_D3, NULL); | ||
1099 | gpio_request(GPIO_FN_VIO0_D2, NULL); | ||
1100 | gpio_request(GPIO_FN_VIO0_D1, NULL); | ||
1101 | gpio_request(GPIO_FN_VIO0_D0, NULL); | ||
1102 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | ||
1103 | gpio_request(GPIO_FN_VIO0_HD, NULL); | ||
1104 | gpio_request(GPIO_FN_VIO0_VD, NULL); | ||
1105 | gpio_request(GPIO_FN_VIO0_FIELD, NULL); | ||
1106 | gpio_request(GPIO_FN_VIO_CKO, NULL); | ||
1107 | |||
1108 | /* CON1/CON15 Camera */ | ||
1109 | gpio_request(GPIO_PORT173, NULL); /* STANDBY */ | ||
1110 | gpio_request(GPIO_PORT172, NULL); /* RST */ | ||
1111 | gpio_request(GPIO_PORT158, NULL); /* CAM_PON */ | ||
1112 | gpio_direction_output(GPIO_PORT173, 0); | ||
1113 | gpio_direction_output(GPIO_PORT172, 1); | ||
1114 | gpio_direction_output(GPIO_PORT158, 0); /* see mt9t111_power() */ | ||
1115 | |||
1116 | /* FSI-WM8978 */ | ||
1117 | gpio_request(GPIO_FN_FSIAIBT, NULL); | ||
1118 | gpio_request(GPIO_FN_FSIAILR, NULL); | ||
1119 | gpio_request(GPIO_FN_FSIAOMC, NULL); | ||
1120 | gpio_request(GPIO_FN_FSIAOSLD, NULL); | ||
1121 | gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL); | ||
1122 | |||
1123 | gpio_request(GPIO_PORT7, NULL); | ||
1124 | gpio_request(GPIO_PORT8, NULL); | ||
1125 | gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */ | ||
1126 | gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */ | ||
1127 | |||
1128 | /* FSI-HDMI */ | ||
1129 | gpio_request(GPIO_FN_FSIBCK, NULL); | ||
1130 | |||
1131 | /* HDMI */ | ||
1132 | gpio_request(GPIO_FN_HDMI_HPD, NULL); | ||
1133 | gpio_request(GPIO_FN_HDMI_CEC, NULL); | ||
1134 | |||
709 | /* | 1135 | /* |
710 | * CAUTION | 1136 | * CAUTION |
711 | * | 1137 | * |
@@ -752,6 +1178,13 @@ static void __init eva_init(void) | |||
752 | 1178 | ||
753 | platform_add_devices(eva_devices, | 1179 | platform_add_devices(eva_devices, |
754 | ARRAY_SIZE(eva_devices)); | 1180 | ARRAY_SIZE(eva_devices)); |
1181 | |||
1182 | eva_clock_init(); | ||
1183 | |||
1184 | rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &lcdc0_device); | ||
1185 | rmobile_add_device_to_domain(&r8a7740_pd_a4lc, &hdmi_lcdc_device); | ||
1186 | if (usb) | ||
1187 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, usb); | ||
755 | } | 1188 | } |
756 | 1189 | ||
757 | static void __init eva_earlytimer_init(void) | 1190 | static void __init eva_earlytimer_init(void) |
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c index e9b32cfbf741..4129008eae29 100644 --- a/arch/arm/mach-shmobile/board-bonito.c +++ b/arch/arm/mach-shmobile/board-bonito.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
29 | #include <linux/regulator/fixed.h> | ||
30 | #include <linux/regulator/machine.h> | ||
29 | #include <linux/smsc911x.h> | 31 | #include <linux/smsc911x.h> |
30 | #include <linux/videodev2.h> | 32 | #include <linux/videodev2.h> |
31 | #include <mach/common.h> | 33 | #include <mach/common.h> |
@@ -75,6 +77,12 @@ | |||
75 | * S38.2 = OFF | 77 | * S38.2 = OFF |
76 | */ | 78 | */ |
77 | 79 | ||
80 | /* Dummy supplies, where voltage doesn't matter */ | ||
81 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
82 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
83 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
84 | }; | ||
85 | |||
78 | /* | 86 | /* |
79 | * FPGA | 87 | * FPGA |
80 | */ | 88 | */ |
@@ -360,6 +368,8 @@ static void __init bonito_init(void) | |||
360 | { | 368 | { |
361 | u16 val; | 369 | u16 val; |
362 | 370 | ||
371 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
372 | |||
363 | r8a7740_pinmux_init(); | 373 | r8a7740_pinmux_init(); |
364 | bonito_fpga_init(); | 374 | bonito_fpga_init(); |
365 | 375 | ||
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c index f1257321999a..fa5dfc5c8ed6 100644 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ b/arch/arm/mach-shmobile/board-g4evm.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <linux/mtd/mtd.h> | 26 | #include <linux/mtd/mtd.h> |
27 | #include <linux/mtd/partitions.h> | 27 | #include <linux/mtd/partitions.h> |
28 | #include <linux/mtd/physmap.h> | 28 | #include <linux/mtd/physmap.h> |
29 | #include <linux/regulator/fixed.h> | ||
30 | #include <linux/regulator/machine.h> | ||
29 | #include <linux/usb/r8a66597.h> | 31 | #include <linux/usb/r8a66597.h> |
30 | #include <linux/io.h> | 32 | #include <linux/io.h> |
31 | #include <linux/input.h> | 33 | #include <linux/input.h> |
@@ -196,6 +198,15 @@ static struct platform_device keysc_device = { | |||
196 | }, | 198 | }, |
197 | }; | 199 | }; |
198 | 200 | ||
201 | /* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */ | ||
202 | static struct regulator_consumer_supply fixed3v3_power_consumers[] = | ||
203 | { | ||
204 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
205 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
206 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
207 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
208 | }; | ||
209 | |||
199 | /* SDHI */ | 210 | /* SDHI */ |
200 | static struct sh_mobile_sdhi_info sdhi0_info = { | 211 | static struct sh_mobile_sdhi_info sdhi0_info = { |
201 | .tmio_caps = MMC_CAP_SDIO_IRQ, | 212 | .tmio_caps = MMC_CAP_SDIO_IRQ, |
@@ -271,26 +282,11 @@ static struct platform_device *g4evm_devices[] __initdata = { | |||
271 | #define GPIO_SDHID1_D3 0xe6052106 | 282 | #define GPIO_SDHID1_D3 0xe6052106 |
272 | #define GPIO_SDHICMD1 0xe6052107 | 283 | #define GPIO_SDHICMD1 0xe6052107 |
273 | 284 | ||
274 | /* | ||
275 | * FIXME !! | ||
276 | * | ||
277 | * gpio_pull_up is quick_hack. | ||
278 | * | ||
279 | * current gpio frame work doesn't have | ||
280 | * the method to control only pull up/down/free. | ||
281 | * this function should be replaced by correct gpio function | ||
282 | */ | ||
283 | static void __init gpio_pull_up(u32 addr) | ||
284 | { | ||
285 | u8 data = __raw_readb(addr); | ||
286 | |||
287 | data &= 0x0F; | ||
288 | data |= 0xC0; | ||
289 | __raw_writeb(data, addr); | ||
290 | } | ||
291 | |||
292 | static void __init g4evm_init(void) | 285 | static void __init g4evm_init(void) |
293 | { | 286 | { |
287 | regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, | ||
288 | ARRAY_SIZE(fixed3v3_power_consumers), 3300000); | ||
289 | |||
294 | sh7377_pinmux_init(); | 290 | sh7377_pinmux_init(); |
295 | 291 | ||
296 | /* Lit DS14 LED */ | 292 | /* Lit DS14 LED */ |
@@ -351,11 +347,11 @@ static void __init g4evm_init(void) | |||
351 | gpio_request(GPIO_FN_SDHID0_3, NULL); | 347 | gpio_request(GPIO_FN_SDHID0_3, NULL); |
352 | gpio_request(GPIO_FN_SDHICMD0, NULL); | 348 | gpio_request(GPIO_FN_SDHICMD0, NULL); |
353 | gpio_request(GPIO_FN_SDHIWP0, NULL); | 349 | gpio_request(GPIO_FN_SDHIWP0, NULL); |
354 | gpio_pull_up(GPIO_SDHID0_D0); | 350 | gpio_request_pullup(GPIO_SDHID0_D0); |
355 | gpio_pull_up(GPIO_SDHID0_D1); | 351 | gpio_request_pullup(GPIO_SDHID0_D1); |
356 | gpio_pull_up(GPIO_SDHID0_D2); | 352 | gpio_request_pullup(GPIO_SDHID0_D2); |
357 | gpio_pull_up(GPIO_SDHID0_D3); | 353 | gpio_request_pullup(GPIO_SDHID0_D3); |
358 | gpio_pull_up(GPIO_SDHICMD0); | 354 | gpio_request_pullup(GPIO_SDHICMD0); |
359 | 355 | ||
360 | /* SDHI1 */ | 356 | /* SDHI1 */ |
361 | gpio_request(GPIO_FN_SDHICLK1, NULL); | 357 | gpio_request(GPIO_FN_SDHICLK1, NULL); |
@@ -364,11 +360,11 @@ static void __init g4evm_init(void) | |||
364 | gpio_request(GPIO_FN_SDHID1_2, NULL); | 360 | gpio_request(GPIO_FN_SDHID1_2, NULL); |
365 | gpio_request(GPIO_FN_SDHID1_3, NULL); | 361 | gpio_request(GPIO_FN_SDHID1_3, NULL); |
366 | gpio_request(GPIO_FN_SDHICMD1, NULL); | 362 | gpio_request(GPIO_FN_SDHICMD1, NULL); |
367 | gpio_pull_up(GPIO_SDHID1_D0); | 363 | gpio_request_pullup(GPIO_SDHID1_D0); |
368 | gpio_pull_up(GPIO_SDHID1_D1); | 364 | gpio_request_pullup(GPIO_SDHID1_D1); |
369 | gpio_pull_up(GPIO_SDHID1_D2); | 365 | gpio_request_pullup(GPIO_SDHID1_D2); |
370 | gpio_pull_up(GPIO_SDHID1_D3); | 366 | gpio_request_pullup(GPIO_SDHID1_D3); |
371 | gpio_pull_up(GPIO_SDHICMD1); | 367 | gpio_request_pullup(GPIO_SDHICMD1); |
372 | 368 | ||
373 | sh7377_add_standard_devices(); | 369 | sh7377_add_standard_devices(); |
374 | 370 | ||
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c index f60f1b281cc4..21dbe54304d5 100644 --- a/arch/arm/mach-shmobile/board-kota2.c +++ b/arch/arm/mach-shmobile/board-kota2.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
29 | #include <linux/io.h> | 29 | #include <linux/io.h> |
30 | #include <linux/regulator/fixed.h> | ||
31 | #include <linux/regulator/machine.h> | ||
30 | #include <linux/smsc911x.h> | 32 | #include <linux/smsc911x.h> |
31 | #include <linux/gpio.h> | 33 | #include <linux/gpio.h> |
32 | #include <linux/input.h> | 34 | #include <linux/input.h> |
@@ -49,6 +51,12 @@ | |||
49 | #include <asm/hardware/cache-l2x0.h> | 51 | #include <asm/hardware/cache-l2x0.h> |
50 | #include <asm/traps.h> | 52 | #include <asm/traps.h> |
51 | 53 | ||
54 | /* Dummy supplies, where voltage doesn't matter */ | ||
55 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
56 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
57 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
58 | }; | ||
59 | |||
52 | /* SMSC 9220 */ | 60 | /* SMSC 9220 */ |
53 | static struct resource smsc9220_resources[] = { | 61 | static struct resource smsc9220_resources[] = { |
54 | [0] = { | 62 | [0] = { |
@@ -288,6 +296,13 @@ static struct platform_device leds_tpu30_device = { | |||
288 | .resource = tpu30_resources, | 296 | .resource = tpu30_resources, |
289 | }; | 297 | }; |
290 | 298 | ||
299 | /* Fixed 1.8V regulator to be used by MMCIF */ | ||
300 | static struct regulator_consumer_supply fixed1v8_power_consumers[] = | ||
301 | { | ||
302 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | ||
303 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | ||
304 | }; | ||
305 | |||
291 | /* MMCIF */ | 306 | /* MMCIF */ |
292 | static struct resource mmcif_resources[] = { | 307 | static struct resource mmcif_resources[] = { |
293 | [0] = { | 308 | [0] = { |
@@ -321,6 +336,15 @@ static struct platform_device mmcif_device = { | |||
321 | .resource = mmcif_resources, | 336 | .resource = mmcif_resources, |
322 | }; | 337 | }; |
323 | 338 | ||
339 | /* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */ | ||
340 | static struct regulator_consumer_supply fixed3v3_power_consumers[] = | ||
341 | { | ||
342 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
343 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
344 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
345 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
346 | }; | ||
347 | |||
324 | /* SDHI0 */ | 348 | /* SDHI0 */ |
325 | static struct sh_mobile_sdhi_info sdhi0_info = { | 349 | static struct sh_mobile_sdhi_info sdhi0_info = { |
326 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | 350 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, |
@@ -411,6 +435,12 @@ static struct platform_device *kota2_devices[] __initdata = { | |||
411 | 435 | ||
412 | static void __init kota2_init(void) | 436 | static void __init kota2_init(void) |
413 | { | 437 | { |
438 | regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, | ||
439 | ARRAY_SIZE(fixed1v8_power_consumers), 1800000); | ||
440 | regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers, | ||
441 | ARRAY_SIZE(fixed3v3_power_consumers), 3300000); | ||
442 | regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
443 | |||
414 | sh73a0_pinmux_init(); | 444 | sh73a0_pinmux_init(); |
415 | 445 | ||
416 | /* SCIFA2 (UART2) */ | 446 | /* SCIFA2 (UART2) */ |
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c index 6a33cf393428..2c986eaae7b4 100644 --- a/arch/arm/mach-shmobile/board-kzm9d.c +++ b/arch/arm/mach-shmobile/board-kzm9d.c | |||
@@ -21,6 +21,8 @@ | |||
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/regulator/fixed.h> | ||
25 | #include <linux/regulator/machine.h> | ||
24 | #include <linux/smsc911x.h> | 26 | #include <linux/smsc911x.h> |
25 | #include <mach/common.h> | 27 | #include <mach/common.h> |
26 | #include <mach/emev2.h> | 28 | #include <mach/emev2.h> |
@@ -28,6 +30,12 @@ | |||
28 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
29 | #include <asm/hardware/gic.h> | 31 | #include <asm/hardware/gic.h> |
30 | 32 | ||
33 | /* Dummy supplies, where voltage doesn't matter */ | ||
34 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
35 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
36 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
37 | }; | ||
38 | |||
31 | /* Ether */ | 39 | /* Ether */ |
32 | static struct resource smsc911x_resources[] = { | 40 | static struct resource smsc911x_resources[] = { |
33 | [0] = { | 41 | [0] = { |
@@ -63,6 +71,8 @@ static struct platform_device *kzm9d_devices[] __initdata = { | |||
63 | 71 | ||
64 | void __init kzm9d_add_standard_devices(void) | 72 | void __init kzm9d_add_standard_devices(void) |
65 | { | 73 | { |
74 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
75 | |||
66 | emev2_add_standard_devices(); | 76 | emev2_add_standard_devices(); |
67 | 77 | ||
68 | platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices)); | 78 | platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices)); |
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c index c0ae815e7beb..53b7ea92c32c 100644 --- a/arch/arm/mach-shmobile/board-kzm9g.c +++ b/arch/arm/mach-shmobile/board-kzm9g.c | |||
@@ -30,9 +30,14 @@ | |||
30 | #include <linux/mmc/sh_mobile_sdhi.h> | 30 | #include <linux/mmc/sh_mobile_sdhi.h> |
31 | #include <linux/mfd/tmio.h> | 31 | #include <linux/mfd/tmio.h> |
32 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
33 | #include <linux/regulator/fixed.h> | ||
34 | #include <linux/regulator/machine.h> | ||
33 | #include <linux/smsc911x.h> | 35 | #include <linux/smsc911x.h> |
34 | #include <linux/usb/r8a66597.h> | 36 | #include <linux/usb/r8a66597.h> |
37 | #include <linux/usb/renesas_usbhs.h> | ||
35 | #include <linux/videodev2.h> | 38 | #include <linux/videodev2.h> |
39 | #include <sound/sh_fsi.h> | ||
40 | #include <sound/simple_card.h> | ||
36 | #include <mach/irqs.h> | 41 | #include <mach/irqs.h> |
37 | #include <mach/sh73a0.h> | 42 | #include <mach/sh73a0.h> |
38 | #include <mach/common.h> | 43 | #include <mach/common.h> |
@@ -54,6 +59,20 @@ | |||
54 | #define GPIO_PCF8575_PORT15 (GPIO_NR + 13) | 59 | #define GPIO_PCF8575_PORT15 (GPIO_NR + 13) |
55 | #define GPIO_PCF8575_PORT16 (GPIO_NR + 14) | 60 | #define GPIO_PCF8575_PORT16 (GPIO_NR + 14) |
56 | 61 | ||
62 | /* Dummy supplies, where voltage doesn't matter */ | ||
63 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
64 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
65 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
66 | }; | ||
67 | |||
68 | /* | ||
69 | * FSI-AK4648 | ||
70 | * | ||
71 | * this command is required when playback. | ||
72 | * | ||
73 | * # amixer set "LINEOUT Mixer DACL" on | ||
74 | */ | ||
75 | |||
57 | /* SMSC 9221 */ | 76 | /* SMSC 9221 */ |
58 | static struct resource smsc9221_resources[] = { | 77 | static struct resource smsc9221_resources[] = { |
59 | [0] = { | 78 | [0] = { |
@@ -112,6 +131,151 @@ static struct platform_device usb_host_device = { | |||
112 | .resource = usb_resources, | 131 | .resource = usb_resources, |
113 | }; | 132 | }; |
114 | 133 | ||
134 | /* USB Func CN17 */ | ||
135 | struct usbhs_private { | ||
136 | unsigned int phy; | ||
137 | unsigned int cr2; | ||
138 | struct renesas_usbhs_platform_info info; | ||
139 | }; | ||
140 | |||
141 | #define IRQ15 intcs_evt2irq(0x03e0) | ||
142 | #define USB_PHY_MODE (1 << 4) | ||
143 | #define USB_PHY_INT_EN ((1 << 3) | (1 << 2)) | ||
144 | #define USB_PHY_ON (1 << 1) | ||
145 | #define USB_PHY_OFF (1 << 0) | ||
146 | #define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF) | ||
147 | |||
148 | #define usbhs_get_priv(pdev) \ | ||
149 | container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info) | ||
150 | |||
151 | static int usbhs_get_vbus(struct platform_device *pdev) | ||
152 | { | ||
153 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
154 | |||
155 | return !((1 << 7) & __raw_readw(priv->cr2)); | ||
156 | } | ||
157 | |||
158 | static void usbhs_phy_reset(struct platform_device *pdev) | ||
159 | { | ||
160 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
161 | |||
162 | /* init phy */ | ||
163 | __raw_writew(0x8a0a, priv->cr2); | ||
164 | } | ||
165 | |||
166 | static int usbhs_get_id(struct platform_device *pdev) | ||
167 | { | ||
168 | return USBHS_GADGET; | ||
169 | } | ||
170 | |||
171 | static irqreturn_t usbhs_interrupt(int irq, void *data) | ||
172 | { | ||
173 | struct platform_device *pdev = data; | ||
174 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
175 | |||
176 | renesas_usbhs_call_notify_hotplug(pdev); | ||
177 | |||
178 | /* clear status */ | ||
179 | __raw_writew(__raw_readw(priv->phy) | USB_PHY_INT_CLR, priv->phy); | ||
180 | |||
181 | return IRQ_HANDLED; | ||
182 | } | ||
183 | |||
184 | static int usbhs_hardware_init(struct platform_device *pdev) | ||
185 | { | ||
186 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
187 | int ret; | ||
188 | |||
189 | /* clear interrupt status */ | ||
190 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->phy); | ||
191 | |||
192 | ret = request_irq(IRQ15, usbhs_interrupt, IRQF_TRIGGER_HIGH, | ||
193 | dev_name(&pdev->dev), pdev); | ||
194 | if (ret) { | ||
195 | dev_err(&pdev->dev, "request_irq err\n"); | ||
196 | return ret; | ||
197 | } | ||
198 | |||
199 | /* enable USB phy interrupt */ | ||
200 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->phy); | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | |||
205 | static void usbhs_hardware_exit(struct platform_device *pdev) | ||
206 | { | ||
207 | struct usbhs_private *priv = usbhs_get_priv(pdev); | ||
208 | |||
209 | /* clear interrupt status */ | ||
210 | __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->phy); | ||
211 | |||
212 | free_irq(IRQ15, pdev); | ||
213 | } | ||
214 | |||
215 | static u32 usbhs_pipe_cfg[] = { | ||
216 | USB_ENDPOINT_XFER_CONTROL, | ||
217 | USB_ENDPOINT_XFER_ISOC, | ||
218 | USB_ENDPOINT_XFER_ISOC, | ||
219 | USB_ENDPOINT_XFER_BULK, | ||
220 | USB_ENDPOINT_XFER_BULK, | ||
221 | USB_ENDPOINT_XFER_BULK, | ||
222 | USB_ENDPOINT_XFER_INT, | ||
223 | USB_ENDPOINT_XFER_INT, | ||
224 | USB_ENDPOINT_XFER_INT, | ||
225 | USB_ENDPOINT_XFER_BULK, | ||
226 | USB_ENDPOINT_XFER_BULK, | ||
227 | USB_ENDPOINT_XFER_BULK, | ||
228 | USB_ENDPOINT_XFER_BULK, | ||
229 | USB_ENDPOINT_XFER_BULK, | ||
230 | USB_ENDPOINT_XFER_BULK, | ||
231 | USB_ENDPOINT_XFER_BULK, | ||
232 | }; | ||
233 | |||
234 | static struct usbhs_private usbhs_private = { | ||
235 | .phy = 0xe60781e0, /* USBPHYINT */ | ||
236 | .cr2 = 0xe605810c, /* USBCR2 */ | ||
237 | .info = { | ||
238 | .platform_callback = { | ||
239 | .hardware_init = usbhs_hardware_init, | ||
240 | .hardware_exit = usbhs_hardware_exit, | ||
241 | .get_id = usbhs_get_id, | ||
242 | .phy_reset = usbhs_phy_reset, | ||
243 | .get_vbus = usbhs_get_vbus, | ||
244 | }, | ||
245 | .driver_param = { | ||
246 | .buswait_bwait = 4, | ||
247 | .has_otg = 1, | ||
248 | .pipe_type = usbhs_pipe_cfg, | ||
249 | .pipe_size = ARRAY_SIZE(usbhs_pipe_cfg), | ||
250 | }, | ||
251 | }, | ||
252 | }; | ||
253 | |||
254 | static struct resource usbhs_resources[] = { | ||
255 | [0] = { | ||
256 | .start = 0xE6890000, | ||
257 | .end = 0xE68900e6 - 1, | ||
258 | .flags = IORESOURCE_MEM, | ||
259 | }, | ||
260 | [1] = { | ||
261 | .start = gic_spi(62), | ||
262 | .end = gic_spi(62), | ||
263 | .flags = IORESOURCE_IRQ, | ||
264 | }, | ||
265 | }; | ||
266 | |||
267 | static struct platform_device usbhs_device = { | ||
268 | .name = "renesas_usbhs", | ||
269 | .id = -1, | ||
270 | .dev = { | ||
271 | .dma_mask = NULL, | ||
272 | .coherent_dma_mask = 0xffffffff, | ||
273 | .platform_data = &usbhs_private.info, | ||
274 | }, | ||
275 | .num_resources = ARRAY_SIZE(usbhs_resources), | ||
276 | .resource = usbhs_resources, | ||
277 | }; | ||
278 | |||
115 | /* LCDC */ | 279 | /* LCDC */ |
116 | static struct fb_videomode kzm_lcdc_mode = { | 280 | static struct fb_videomode kzm_lcdc_mode = { |
117 | .name = "WVGA Panel", | 281 | .name = "WVGA Panel", |
@@ -166,6 +330,13 @@ static struct platform_device lcdc_device = { | |||
166 | }, | 330 | }, |
167 | }; | 331 | }; |
168 | 332 | ||
333 | /* Fixed 1.8V regulator to be used by MMCIF */ | ||
334 | static struct regulator_consumer_supply fixed1v8_power_consumers[] = | ||
335 | { | ||
336 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | ||
337 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | ||
338 | }; | ||
339 | |||
169 | /* MMCIF */ | 340 | /* MMCIF */ |
170 | static struct resource sh_mmcif_resources[] = { | 341 | static struct resource sh_mmcif_resources[] = { |
171 | [0] = { | 342 | [0] = { |
@@ -187,6 +358,8 @@ static struct resource sh_mmcif_resources[] = { | |||
187 | static struct sh_mmcif_plat_data sh_mmcif_platdata = { | 358 | static struct sh_mmcif_plat_data sh_mmcif_platdata = { |
188 | .ocr = MMC_VDD_165_195, | 359 | .ocr = MMC_VDD_165_195, |
189 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, | 360 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, |
361 | .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, | ||
362 | .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, | ||
190 | }; | 363 | }; |
191 | 364 | ||
192 | static struct platform_device mmc_device = { | 365 | static struct platform_device mmc_device = { |
@@ -200,6 +373,15 @@ static struct platform_device mmc_device = { | |||
200 | .resource = sh_mmcif_resources, | 373 | .resource = sh_mmcif_resources, |
201 | }; | 374 | }; |
202 | 375 | ||
376 | /* Fixed 2.8V regulators to be used by SDHI0 and SDHI2 */ | ||
377 | static struct regulator_consumer_supply fixed2v8_power_consumers[] = | ||
378 | { | ||
379 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | ||
380 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | ||
381 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"), | ||
382 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"), | ||
383 | }; | ||
384 | |||
203 | /* SDHI */ | 385 | /* SDHI */ |
204 | static struct sh_mobile_sdhi_info sdhi0_info = { | 386 | static struct sh_mobile_sdhi_info sdhi0_info = { |
205 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, | 387 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, |
@@ -240,6 +422,50 @@ static struct platform_device sdhi0_device = { | |||
240 | }, | 422 | }, |
241 | }; | 423 | }; |
242 | 424 | ||
425 | /* Micro SD */ | ||
426 | static struct sh_mobile_sdhi_info sdhi2_info = { | ||
427 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | | ||
428 | TMIO_MMC_USE_GPIO_CD | | ||
429 | TMIO_MMC_WRPROTECT_DISABLE, | ||
430 | .tmio_caps = MMC_CAP_SD_HIGHSPEED, | ||
431 | .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, | ||
432 | .cd_gpio = GPIO_PORT13, | ||
433 | }; | ||
434 | |||
435 | static struct resource sdhi2_resources[] = { | ||
436 | [0] = { | ||
437 | .name = "SDHI2", | ||
438 | .start = 0xee140000, | ||
439 | .end = 0xee1400ff, | ||
440 | .flags = IORESOURCE_MEM, | ||
441 | }, | ||
442 | [1] = { | ||
443 | .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT, | ||
444 | .start = gic_spi(103), | ||
445 | .flags = IORESOURCE_IRQ, | ||
446 | }, | ||
447 | [2] = { | ||
448 | .name = SH_MOBILE_SDHI_IRQ_SDCARD, | ||
449 | .start = gic_spi(104), | ||
450 | .flags = IORESOURCE_IRQ, | ||
451 | }, | ||
452 | [3] = { | ||
453 | .name = SH_MOBILE_SDHI_IRQ_SDIO, | ||
454 | .start = gic_spi(105), | ||
455 | .flags = IORESOURCE_IRQ, | ||
456 | }, | ||
457 | }; | ||
458 | |||
459 | static struct platform_device sdhi2_device = { | ||
460 | .name = "sh_mobile_sdhi", | ||
461 | .id = 2, | ||
462 | .num_resources = ARRAY_SIZE(sdhi2_resources), | ||
463 | .resource = sdhi2_resources, | ||
464 | .dev = { | ||
465 | .platform_data = &sdhi2_info, | ||
466 | }, | ||
467 | }; | ||
468 | |||
243 | /* KEY */ | 469 | /* KEY */ |
244 | #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } | 470 | #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } |
245 | 471 | ||
@@ -267,11 +493,74 @@ static struct platform_device gpio_keys_device = { | |||
267 | }, | 493 | }, |
268 | }; | 494 | }; |
269 | 495 | ||
496 | /* FSI-AK4648 */ | ||
497 | static struct sh_fsi_platform_info fsi_info = { | ||
498 | .port_a = { | ||
499 | .tx_id = SHDMA_SLAVE_FSI2A_TX, | ||
500 | }, | ||
501 | }; | ||
502 | |||
503 | static struct resource fsi_resources[] = { | ||
504 | [0] = { | ||
505 | .name = "FSI", | ||
506 | .start = 0xEC230000, | ||
507 | .end = 0xEC230400 - 1, | ||
508 | .flags = IORESOURCE_MEM, | ||
509 | }, | ||
510 | [1] = { | ||
511 | .start = gic_spi(146), | ||
512 | .flags = IORESOURCE_IRQ, | ||
513 | }, | ||
514 | }; | ||
515 | |||
516 | static struct platform_device fsi_device = { | ||
517 | .name = "sh_fsi2", | ||
518 | .id = -1, | ||
519 | .num_resources = ARRAY_SIZE(fsi_resources), | ||
520 | .resource = fsi_resources, | ||
521 | .dev = { | ||
522 | .platform_data = &fsi_info, | ||
523 | }, | ||
524 | }; | ||
525 | |||
526 | static struct asoc_simple_dai_init_info fsi2_ak4648_init_info = { | ||
527 | .fmt = SND_SOC_DAIFMT_LEFT_J, | ||
528 | .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM, | ||
529 | .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS, | ||
530 | .sysclk = 11289600, | ||
531 | }; | ||
532 | |||
533 | static struct asoc_simple_card_info fsi2_ak4648_info = { | ||
534 | .name = "AK4648", | ||
535 | .card = "FSI2A-AK4648", | ||
536 | .cpu_dai = "fsia-dai", | ||
537 | .codec = "ak4642-codec.0-0012", | ||
538 | .platform = "sh_fsi2", | ||
539 | .codec_dai = "ak4642-hifi", | ||
540 | .init = &fsi2_ak4648_init_info, | ||
541 | }; | ||
542 | |||
543 | static struct platform_device fsi_ak4648_device = { | ||
544 | .name = "asoc-simple-card", | ||
545 | .dev = { | ||
546 | .platform_data = &fsi2_ak4648_info, | ||
547 | }, | ||
548 | }; | ||
549 | |||
270 | /* I2C */ | 550 | /* I2C */ |
271 | static struct pcf857x_platform_data pcf8575_pdata = { | 551 | static struct pcf857x_platform_data pcf8575_pdata = { |
272 | .gpio_base = GPIO_PCF8575_BASE, | 552 | .gpio_base = GPIO_PCF8575_BASE, |
273 | }; | 553 | }; |
274 | 554 | ||
555 | static struct i2c_board_info i2c0_devices[] = { | ||
556 | { | ||
557 | I2C_BOARD_INFO("ak4648", 0x12), | ||
558 | }, | ||
559 | { | ||
560 | I2C_BOARD_INFO("r2025sd", 0x32), | ||
561 | } | ||
562 | }; | ||
563 | |||
275 | static struct i2c_board_info i2c1_devices[] = { | 564 | static struct i2c_board_info i2c1_devices[] = { |
276 | { | 565 | { |
277 | I2C_BOARD_INFO("st1232-ts", 0x55), | 566 | I2C_BOARD_INFO("st1232-ts", 0x55), |
@@ -289,10 +578,14 @@ static struct i2c_board_info i2c3_devices[] = { | |||
289 | static struct platform_device *kzm_devices[] __initdata = { | 578 | static struct platform_device *kzm_devices[] __initdata = { |
290 | &smsc_device, | 579 | &smsc_device, |
291 | &usb_host_device, | 580 | &usb_host_device, |
581 | &usbhs_device, | ||
292 | &lcdc_device, | 582 | &lcdc_device, |
293 | &mmc_device, | 583 | &mmc_device, |
294 | &sdhi0_device, | 584 | &sdhi0_device, |
585 | &sdhi2_device, | ||
295 | &gpio_keys_device, | 586 | &gpio_keys_device, |
587 | &fsi_device, | ||
588 | &fsi_ak4648_device, | ||
296 | }; | 589 | }; |
297 | 590 | ||
298 | /* | 591 | /* |
@@ -350,6 +643,12 @@ device_initcall(as3711_enable_lcdc_backlight); | |||
350 | 643 | ||
351 | static void __init kzm_init(void) | 644 | static void __init kzm_init(void) |
352 | { | 645 | { |
646 | regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, | ||
647 | ARRAY_SIZE(fixed1v8_power_consumers), 1800000); | ||
648 | regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers, | ||
649 | ARRAY_SIZE(fixed2v8_power_consumers), 2800000); | ||
650 | regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
651 | |||
353 | sh73a0_pinmux_init(); | 652 | sh73a0_pinmux_init(); |
354 | 653 | ||
355 | /* enable SCIFA4 */ | 654 | /* enable SCIFA4 */ |
@@ -427,15 +726,36 @@ static void __init kzm_init(void) | |||
427 | gpio_request(GPIO_PORT15, NULL); | 726 | gpio_request(GPIO_PORT15, NULL); |
428 | gpio_direction_output(GPIO_PORT15, 1); /* power */ | 727 | gpio_direction_output(GPIO_PORT15, 1); /* power */ |
429 | 728 | ||
729 | /* enable Micro SD */ | ||
730 | gpio_request(GPIO_FN_SDHID2_0, NULL); | ||
731 | gpio_request(GPIO_FN_SDHID2_1, NULL); | ||
732 | gpio_request(GPIO_FN_SDHID2_2, NULL); | ||
733 | gpio_request(GPIO_FN_SDHID2_3, NULL); | ||
734 | gpio_request(GPIO_FN_SDHICMD2, NULL); | ||
735 | gpio_request(GPIO_FN_SDHICLK2, NULL); | ||
736 | gpio_request(GPIO_PORT14, NULL); | ||
737 | gpio_direction_output(GPIO_PORT14, 1); /* power */ | ||
738 | |||
430 | /* I2C 3 */ | 739 | /* I2C 3 */ |
431 | gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL); | 740 | gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL); |
432 | gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL); | 741 | gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL); |
433 | 742 | ||
743 | /* enable FSI2 port A (ak4648) */ | ||
744 | gpio_request(GPIO_FN_FSIACK, NULL); | ||
745 | gpio_request(GPIO_FN_FSIAILR, NULL); | ||
746 | gpio_request(GPIO_FN_FSIAIBT, NULL); | ||
747 | gpio_request(GPIO_FN_FSIAISLD, NULL); | ||
748 | gpio_request(GPIO_FN_FSIAOSLD, NULL); | ||
749 | |||
750 | /* enable USB */ | ||
751 | gpio_request(GPIO_FN_VBUS_0, NULL); | ||
752 | |||
434 | #ifdef CONFIG_CACHE_L2X0 | 753 | #ifdef CONFIG_CACHE_L2X0 |
435 | /* Early BRESP enable, Shared attribute override enable, 64K*8way */ | 754 | /* Early BRESP enable, Shared attribute override enable, 64K*8way */ |
436 | l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); | 755 | l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff); |
437 | #endif | 756 | #endif |
438 | 757 | ||
758 | i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); | ||
439 | i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices)); | 759 | i2c_register_board_info(1, i2c1_devices, ARRAY_SIZE(i2c1_devices)); |
440 | i2c_register_board_info(3, i2c3_devices, ARRAY_SIZE(i2c3_devices)); | 760 | i2c_register_board_info(3, i2c3_devices, ARRAY_SIZE(i2c3_devices)); |
441 | 761 | ||
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 150122a44630..7ea2b31e3199 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -41,6 +41,8 @@ | |||
41 | #include <linux/mtd/physmap.h> | 41 | #include <linux/mtd/physmap.h> |
42 | #include <linux/mtd/sh_flctl.h> | 42 | #include <linux/mtd/sh_flctl.h> |
43 | #include <linux/pm_clock.h> | 43 | #include <linux/pm_clock.h> |
44 | #include <linux/regulator/fixed.h> | ||
45 | #include <linux/regulator/machine.h> | ||
44 | #include <linux/smsc911x.h> | 46 | #include <linux/smsc911x.h> |
45 | #include <linux/sh_intc.h> | 47 | #include <linux/sh_intc.h> |
46 | #include <linux/tca6416_keypad.h> | 48 | #include <linux/tca6416_keypad.h> |
@@ -203,31 +205,32 @@ | |||
203 | * amixer set "HPOUTR Mixer DACH" on | 205 | * amixer set "HPOUTR Mixer DACH" on |
204 | */ | 206 | */ |
205 | 207 | ||
206 | /* | 208 | /* Fixed 3.3V and 1.8V regulators to be used by multiple devices */ |
207 | * FIXME !! | 209 | static struct regulator_consumer_supply fixed1v8_power_consumers[] = |
208 | * | ||
209 | * gpio_no_direction | ||
210 | * gpio_pull_down | ||
211 | * are quick_hack. | ||
212 | * | ||
213 | * current gpio frame work doesn't have | ||
214 | * the method to control only pull up/down/free. | ||
215 | * this function should be replaced by correct gpio function | ||
216 | */ | ||
217 | static void __init gpio_no_direction(u32 addr) | ||
218 | { | 210 | { |
219 | __raw_writeb(0x00, addr); | 211 | /* |
220 | } | 212 | * J22 on mackerel switches mmcif.0 and sdhi.1 between 1.8V and 3.3V |
213 | * Since we cannot support both voltages, we support the default 1.8V | ||
214 | */ | ||
215 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | ||
216 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | ||
217 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | ||
218 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | ||
219 | }; | ||
221 | 220 | ||
222 | static void __init gpio_pull_down(u32 addr) | 221 | static struct regulator_consumer_supply fixed3v3_power_consumers[] = |
223 | { | 222 | { |
224 | u8 data = __raw_readb(addr); | 223 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), |
225 | 224 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | |
226 | data &= 0x0F; | 225 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.2"), |
227 | data |= 0xA0; | 226 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.2"), |
227 | }; | ||
228 | 228 | ||
229 | __raw_writeb(data, addr); | 229 | /* Dummy supplies, where voltage doesn't matter */ |
230 | } | 230 | static struct regulator_consumer_supply dummy_supplies[] = { |
231 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
232 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
233 | }; | ||
231 | 234 | ||
232 | /* MTD */ | 235 | /* MTD */ |
233 | static struct mtd_partition nor_flash_partitions[] = { | 236 | static struct mtd_partition nor_flash_partitions[] = { |
@@ -1409,6 +1412,12 @@ static void __init mackerel_init(void) | |||
1409 | u32 srcr4; | 1412 | u32 srcr4; |
1410 | struct clk *clk; | 1413 | struct clk *clk; |
1411 | 1414 | ||
1415 | regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, | ||
1416 | ARRAY_SIZE(fixed1v8_power_consumers), 1800000); | ||
1417 | regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers, | ||
1418 | ARRAY_SIZE(fixed3v3_power_consumers), 3300000); | ||
1419 | regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
1420 | |||
1412 | /* External clock source */ | 1421 | /* External clock source */ |
1413 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); | 1422 | clk_set_rate(&sh7372_dv_clki_clk, 27000000); |
1414 | 1423 | ||
@@ -1458,11 +1467,11 @@ static void __init mackerel_init(void) | |||
1458 | 1467 | ||
1459 | /* USBHS0 */ | 1468 | /* USBHS0 */ |
1460 | gpio_request(GPIO_FN_VBUS0_0, NULL); | 1469 | gpio_request(GPIO_FN_VBUS0_0, NULL); |
1461 | gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */ | 1470 | gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */ |
1462 | 1471 | ||
1463 | /* USBHS1 */ | 1472 | /* USBHS1 */ |
1464 | gpio_request(GPIO_FN_VBUS0_1, NULL); | 1473 | gpio_request(GPIO_FN_VBUS0_1, NULL); |
1465 | gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */ | 1474 | gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */ |
1466 | gpio_request(GPIO_FN_IDIN_1_113, NULL); | 1475 | gpio_request(GPIO_FN_IDIN_1_113, NULL); |
1467 | 1476 | ||
1468 | /* enable FSI2 port A (ak4643) */ | 1477 | /* enable FSI2 port A (ak4643) */ |
@@ -1475,8 +1484,8 @@ static void __init mackerel_init(void) | |||
1475 | 1484 | ||
1476 | gpio_request(GPIO_PORT9, NULL); | 1485 | gpio_request(GPIO_PORT9, NULL); |
1477 | gpio_request(GPIO_PORT10, NULL); | 1486 | gpio_request(GPIO_PORT10, NULL); |
1478 | gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ | 1487 | gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */ |
1479 | gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ | 1488 | gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */ |
1480 | 1489 | ||
1481 | intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */ | 1490 | intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */ |
1482 | 1491 | ||
@@ -1614,20 +1623,20 @@ static void __init mackerel_init(void) | |||
1614 | 1623 | ||
1615 | platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices)); | 1624 | platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices)); |
1616 | 1625 | ||
1617 | sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); | 1626 | rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device); |
1618 | sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device); | 1627 | rmobile_add_device_to_domain(&sh7372_pd_a4lc, &hdmi_lcdc_device); |
1619 | sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device); | 1628 | rmobile_add_device_to_domain(&sh7372_pd_a4lc, &meram_device); |
1620 | sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); | 1629 | rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device); |
1621 | sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device); | 1630 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs0_device); |
1622 | sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device); | 1631 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usbhs1_device); |
1623 | sh7372_add_device_to_domain(&sh7372_a3sp, &nand_flash_device); | 1632 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &nand_flash_device); |
1624 | sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); | 1633 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device); |
1625 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); | 1634 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device); |
1626 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) | 1635 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1627 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); | 1636 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device); |
1628 | #endif | 1637 | #endif |
1629 | sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device); | 1638 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi2_device); |
1630 | sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); | 1639 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device); |
1631 | 1640 | ||
1632 | hdmi_init_pm_clock(); | 1641 | hdmi_init_pm_clock(); |
1633 | sh7372_pm_init(); | 1642 | sh7372_pm_init(); |
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c index 14de3787cafc..3a528cf4366c 100644 --- a/arch/arm/mach-shmobile/board-marzen.c +++ b/arch/arm/mach-shmobile/board-marzen.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
29 | #include <linux/dma-mapping.h> | 29 | #include <linux/dma-mapping.h> |
30 | #include <linux/regulator/fixed.h> | ||
31 | #include <linux/regulator/machine.h> | ||
30 | #include <linux/smsc911x.h> | 32 | #include <linux/smsc911x.h> |
31 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
32 | #include <mach/r8a7779.h> | 34 | #include <mach/r8a7779.h> |
@@ -37,6 +39,12 @@ | |||
37 | #include <asm/hardware/gic.h> | 39 | #include <asm/hardware/gic.h> |
38 | #include <asm/traps.h> | 40 | #include <asm/traps.h> |
39 | 41 | ||
42 | /* Dummy supplies, where voltage doesn't matter */ | ||
43 | static struct regulator_consumer_supply dummy_supplies[] = { | ||
44 | REGULATOR_SUPPLY("vddvario", "smsc911x"), | ||
45 | REGULATOR_SUPPLY("vdd33a", "smsc911x"), | ||
46 | }; | ||
47 | |||
40 | /* SMSC LAN89218 */ | 48 | /* SMSC LAN89218 */ |
41 | static struct resource smsc911x_resources[] = { | 49 | static struct resource smsc911x_resources[] = { |
42 | [0] = { | 50 | [0] = { |
@@ -73,6 +81,8 @@ static struct platform_device *marzen_devices[] __initdata = { | |||
73 | 81 | ||
74 | static void __init marzen_init(void) | 82 | static void __init marzen_init(void) |
75 | { | 83 | { |
84 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | ||
85 | |||
76 | r8a7779_pinmux_init(); | 86 | r8a7779_pinmux_init(); |
77 | 87 | ||
78 | /* SCIF2 (CN18: DEBUG0) */ | 88 | /* SCIF2 (CN18: DEBUG0) */ |
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 26eea5f21054..ad5fccc7b5e7 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c | |||
@@ -43,7 +43,10 @@ | |||
43 | /* CPG registers */ | 43 | /* CPG registers */ |
44 | #define FRQCRA 0xe6150000 | 44 | #define FRQCRA 0xe6150000 |
45 | #define FRQCRB 0xe6150004 | 45 | #define FRQCRB 0xe6150004 |
46 | #define VCLKCR1 0xE6150008 | ||
47 | #define VCLKCR2 0xE615000c | ||
46 | #define FRQCRC 0xe61500e0 | 48 | #define FRQCRC 0xe61500e0 |
49 | #define FSIACKCR 0xe6150018 | ||
47 | #define PLLC01CR 0xe6150028 | 50 | #define PLLC01CR 0xe6150028 |
48 | 51 | ||
49 | #define SUBCKCR 0xe6150080 | 52 | #define SUBCKCR 0xe6150080 |
@@ -54,6 +57,8 @@ | |||
54 | #define MSTPSR2 0xe6150040 | 57 | #define MSTPSR2 0xe6150040 |
55 | #define MSTPSR3 0xe6150048 | 58 | #define MSTPSR3 0xe6150048 |
56 | #define MSTPSR4 0xe615004c | 59 | #define MSTPSR4 0xe615004c |
60 | #define FSIBCKCR 0xe6150090 | ||
61 | #define HDMICKCR 0xe6150094 | ||
57 | #define SMSTPCR0 0xe6150130 | 62 | #define SMSTPCR0 0xe6150130 |
58 | #define SMSTPCR1 0xe6150134 | 63 | #define SMSTPCR1 0xe6150134 |
59 | #define SMSTPCR2 0xe6150138 | 64 | #define SMSTPCR2 0xe6150138 |
@@ -271,6 +276,13 @@ static struct clk usb24_clk = { | |||
271 | .parent = &usb24s_clk, | 276 | .parent = &usb24s_clk, |
272 | }; | 277 | }; |
273 | 278 | ||
279 | /* External FSIACK/FSIBCK clock */ | ||
280 | static struct clk fsiack_clk = { | ||
281 | }; | ||
282 | |||
283 | static struct clk fsibck_clk = { | ||
284 | }; | ||
285 | |||
274 | struct clk *main_clks[] = { | 286 | struct clk *main_clks[] = { |
275 | &extalr_clk, | 287 | &extalr_clk, |
276 | &extal1_clk, | 288 | &extal1_clk, |
@@ -288,6 +300,8 @@ struct clk *main_clks[] = { | |||
288 | &pllc1_div2_clk, | 300 | &pllc1_div2_clk, |
289 | &usb24s_clk, | 301 | &usb24s_clk, |
290 | &usb24_clk, | 302 | &usb24_clk, |
303 | &fsiack_clk, | ||
304 | &fsibck_clk, | ||
291 | }; | 305 | }; |
292 | 306 | ||
293 | static void div4_kick(struct clk *clk) | 307 | static void div4_kick(struct clk *clk) |
@@ -313,6 +327,107 @@ static struct clk_div4_table div4_table = { | |||
313 | .kick = div4_kick, | 327 | .kick = div4_kick, |
314 | }; | 328 | }; |
315 | 329 | ||
330 | /* DIV6 reparent */ | ||
331 | enum { | ||
332 | DIV6_HDMI, | ||
333 | DIV6_VCLK1, DIV6_VCLK2, | ||
334 | DIV6_FSIA, DIV6_FSIB, | ||
335 | DIV6_REPARENT_NR, | ||
336 | }; | ||
337 | |||
338 | static struct clk *hdmi_parent[] = { | ||
339 | [0] = &pllc1_div2_clk, | ||
340 | [1] = &system_clk, | ||
341 | [2] = &dv_clk | ||
342 | }; | ||
343 | |||
344 | static struct clk *vclk_parents[8] = { | ||
345 | [0] = &pllc1_div2_clk, | ||
346 | [2] = &dv_clk, | ||
347 | [3] = &usb24s_clk, | ||
348 | [4] = &extal1_div2_clk, | ||
349 | [5] = &extalr_clk, | ||
350 | }; | ||
351 | |||
352 | static struct clk *fsia_parents[] = { | ||
353 | [0] = &pllc1_div2_clk, | ||
354 | [1] = &fsiack_clk, /* external clock */ | ||
355 | }; | ||
356 | |||
357 | static struct clk *fsib_parents[] = { | ||
358 | [0] = &pllc1_div2_clk, | ||
359 | [1] = &fsibck_clk, /* external clock */ | ||
360 | }; | ||
361 | |||
362 | static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { | ||
363 | [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0, | ||
364 | hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2), | ||
365 | [DIV6_VCLK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0, | ||
366 | vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3), | ||
367 | [DIV6_VCLK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0, | ||
368 | vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3), | ||
369 | [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0, | ||
370 | fsia_parents, ARRAY_SIZE(fsia_parents), 6, 2), | ||
371 | [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0, | ||
372 | fsib_parents, ARRAY_SIZE(fsib_parents), 6, 2), | ||
373 | }; | ||
374 | |||
375 | /* HDMI1/2 clock */ | ||
376 | static unsigned long hdmi12_recalc(struct clk *clk) | ||
377 | { | ||
378 | u32 val = __raw_readl(HDMICKCR); | ||
379 | int shift = (int)clk->priv; | ||
380 | |||
381 | val >>= shift; | ||
382 | val &= 0x3; | ||
383 | |||
384 | return clk->parent->rate / (1 << val); | ||
385 | }; | ||
386 | |||
387 | static int hdmi12_set_rate(struct clk *clk, unsigned long rate) | ||
388 | { | ||
389 | u32 val, mask; | ||
390 | int i, shift; | ||
391 | |||
392 | for (i = 0; i < 3; i++) | ||
393 | if (rate == clk->parent->rate / (1 << i)) | ||
394 | goto find; | ||
395 | return -ENODEV; | ||
396 | |||
397 | find: | ||
398 | shift = (int)clk->priv; | ||
399 | |||
400 | val = __raw_readl(HDMICKCR); | ||
401 | mask = ~(0x3 << shift); | ||
402 | val = (val & mask) | i << shift; | ||
403 | __raw_writel(val, HDMICKCR); | ||
404 | |||
405 | return 0; | ||
406 | }; | ||
407 | |||
408 | static struct sh_clk_ops hdmi12_clk_ops = { | ||
409 | .recalc = hdmi12_recalc, | ||
410 | .set_rate = hdmi12_set_rate, | ||
411 | }; | ||
412 | |||
413 | static struct clk hdmi1_clk = { | ||
414 | .ops = &hdmi12_clk_ops, | ||
415 | .priv = (void *)9, | ||
416 | .parent = &div6_reparent_clks[DIV6_HDMI], /* late install */ | ||
417 | }; | ||
418 | |||
419 | static struct clk hdmi2_clk = { | ||
420 | .ops = &hdmi12_clk_ops, | ||
421 | .priv = (void *)11, | ||
422 | .parent = &div6_reparent_clks[DIV6_HDMI], /* late install */ | ||
423 | }; | ||
424 | |||
425 | static struct clk *late_main_clks[] = { | ||
426 | &hdmi1_clk, | ||
427 | &hdmi2_clk, | ||
428 | }; | ||
429 | |||
430 | /* MSTP */ | ||
316 | enum { | 431 | enum { |
317 | DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, | 432 | DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, |
318 | DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP, | 433 | DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP, |
@@ -343,11 +458,12 @@ static struct clk div6_clks[DIV6_NR] = { | |||
343 | }; | 458 | }; |
344 | 459 | ||
345 | enum { | 460 | enum { |
346 | MSTP125, | 461 | MSTP128, MSTP127, MSTP125, |
347 | MSTP116, MSTP111, MSTP100, MSTP117, | 462 | MSTP116, MSTP111, MSTP100, MSTP117, |
348 | 463 | ||
349 | MSTP230, | 464 | MSTP230, |
350 | MSTP222, | 465 | MSTP222, |
466 | MSTP218, MSTP217, MSTP216, MSTP214, | ||
351 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | 467 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, |
352 | 468 | ||
353 | MSTP329, MSTP328, MSTP323, MSTP320, | 469 | MSTP329, MSTP328, MSTP323, MSTP320, |
@@ -360,6 +476,8 @@ enum { | |||
360 | }; | 476 | }; |
361 | 477 | ||
362 | static struct clk mstp_clks[MSTP_NR] = { | 478 | static struct clk mstp_clks[MSTP_NR] = { |
479 | [MSTP128] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 28, 0), /* CEU21 */ | ||
480 | [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 27, 0), /* CEU20 */ | ||
363 | [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ | 481 | [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ |
364 | [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ | 482 | [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ |
365 | [MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ | 483 | [MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ |
@@ -368,6 +486,10 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
368 | 486 | ||
369 | [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */ | 487 | [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */ |
370 | [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */ | 488 | [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */ |
489 | [MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */ | ||
490 | [MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */ | ||
491 | [MSTP216] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */ | ||
492 | [MSTP214] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */ | ||
371 | [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ | 493 | [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ |
372 | [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ | 494 | [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ |
373 | [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ | 495 | [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ |
@@ -408,6 +530,12 @@ static struct clk_lookup lookups[] = { | |||
408 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), | 530 | CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), |
409 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), | 531 | CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), |
410 | CLKDEV_CON_ID("usb24s", &usb24s_clk), | 532 | CLKDEV_CON_ID("usb24s", &usb24s_clk), |
533 | CLKDEV_CON_ID("hdmi1", &hdmi1_clk), | ||
534 | CLKDEV_CON_ID("hdmi2", &hdmi2_clk), | ||
535 | CLKDEV_CON_ID("video1", &div6_reparent_clks[DIV6_VCLK1]), | ||
536 | CLKDEV_CON_ID("video2", &div6_reparent_clks[DIV6_VCLK2]), | ||
537 | CLKDEV_CON_ID("fsiack", &fsiack_clk), | ||
538 | CLKDEV_CON_ID("fsibck", &fsibck_clk), | ||
411 | 539 | ||
412 | /* DIV4 clocks */ | 540 | /* DIV4 clocks */ |
413 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), | 541 | CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), |
@@ -430,6 +558,8 @@ static struct clk_lookup lookups[] = { | |||
430 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), | 558 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), |
431 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), | 559 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), |
432 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), | 560 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), |
561 | CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), | ||
562 | CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]), | ||
433 | 563 | ||
434 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), | 564 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), |
435 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), | 565 | CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), |
@@ -438,7 +568,10 @@ static struct clk_lookup lookups[] = { | |||
438 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), | 568 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), |
439 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), | 569 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), |
440 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), | 570 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), |
441 | 571 | CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), | |
572 | CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), | ||
573 | CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), | ||
574 | CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), | ||
442 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]), | 575 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]), |
443 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]), | 576 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]), |
444 | 577 | ||
@@ -459,6 +592,10 @@ static struct clk_lookup lookups[] = { | |||
459 | CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]), | 592 | CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]), |
460 | CLKDEV_ICK_ID("pci", "renesas_usbhs", &div4_clks[DIV4_USBP]), | 593 | CLKDEV_ICK_ID("pci", "renesas_usbhs", &div4_clks[DIV4_USBP]), |
461 | CLKDEV_ICK_ID("usb24", "renesas_usbhs", &usb24_clk), | 594 | CLKDEV_ICK_ID("usb24", "renesas_usbhs", &usb24_clk), |
595 | CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]), | ||
596 | |||
597 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), | ||
598 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), | ||
462 | }; | 599 | }; |
463 | 600 | ||
464 | void __init r8a7740_clock_init(u8 md_ck) | 601 | void __init r8a7740_clock_init(u8 md_ck) |
@@ -495,7 +632,14 @@ void __init r8a7740_clock_init(u8 md_ck) | |||
495 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | 632 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
496 | 633 | ||
497 | if (!ret) | 634 | if (!ret) |
498 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 635 | ret = sh_clk_div6_reparent_register(div6_reparent_clks, |
636 | DIV6_REPARENT_NR); | ||
637 | |||
638 | if (!ret) | ||
639 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); | ||
640 | |||
641 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | ||
642 | ret = clk_register(late_main_clks[k]); | ||
499 | 643 | ||
500 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 644 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
501 | 645 | ||
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 7d6e9fe47b56..339c62c824d5 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c | |||
@@ -162,7 +162,7 @@ void __init r8a7779_clock_init(void) | |||
162 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); | 162 | ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); |
163 | 163 | ||
164 | if (!ret) | 164 | if (!ret) |
165 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 165 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); |
166 | 166 | ||
167 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | 167 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) |
168 | ret = clk_register(late_main_clks[k]); | 168 | ret = clk_register(late_main_clks[k]); |
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c index 006e7b5d304c..162b791b8984 100644 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ b/arch/arm/mach-shmobile/clock-sh7367.c | |||
@@ -344,7 +344,7 @@ void __init sh7367_clock_init(void) | |||
344 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | 344 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
345 | 345 | ||
346 | if (!ret) | 346 | if (!ret) |
347 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 347 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); |
348 | 348 | ||
349 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 349 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
350 | 350 | ||
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 94d1f88246d3..5a2894b1c965 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c | |||
@@ -704,7 +704,7 @@ void __init sh7372_clock_init(void) | |||
704 | ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); | 704 | ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); |
705 | 705 | ||
706 | if (!ret) | 706 | if (!ret) |
707 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 707 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); |
708 | 708 | ||
709 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | 709 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) |
710 | ret = clk_register(late_main_clks[k]); | 710 | ret = clk_register(late_main_clks[k]); |
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c index 0798a15936c3..85f2a3ec2c44 100644 --- a/arch/arm/mach-shmobile/clock-sh7377.c +++ b/arch/arm/mach-shmobile/clock-sh7377.c | |||
@@ -355,7 +355,7 @@ void __init sh7377_clock_init(void) | |||
355 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | 355 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
356 | 356 | ||
357 | if (!ret) | 357 | if (!ret) |
358 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 358 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); |
359 | 359 | ||
360 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 360 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
361 | 361 | ||
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 3946c4ba2aa8..7f8da18a8580 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c | |||
@@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = { | |||
475 | 475 | ||
476 | enum { MSTP001, | 476 | enum { MSTP001, |
477 | MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, | 477 | MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, |
478 | MSTP219, MSTP218, | 478 | MSTP219, MSTP218, MSTP217, |
479 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | 479 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, |
480 | MSTP331, MSTP329, MSTP325, MSTP323, | 480 | MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322, |
481 | MSTP314, MSTP313, MSTP312, MSTP311, | 481 | MSTP314, MSTP313, MSTP312, MSTP311, |
482 | MSTP303, MSTP302, MSTP301, MSTP300, | 482 | MSTP303, MSTP302, MSTP301, MSTP300, |
483 | MSTP411, MSTP410, MSTP403, | 483 | MSTP411, MSTP410, MSTP403, |
@@ -498,6 +498,7 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
498 | [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */ | 498 | [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */ |
499 | [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */ | 499 | [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */ |
500 | [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */ | 500 | [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */ |
501 | [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* MP-DMAC */ | ||
501 | [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ | 502 | [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ |
502 | [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ | 503 | [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ |
503 | [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ | 504 | [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ |
@@ -507,8 +508,10 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
507 | [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ | 508 | [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ |
508 | [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ | 509 | [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ |
509 | [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ | 510 | [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ |
511 | [MSTP328] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 28, 0), /*FSI*/ | ||
510 | [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */ | 512 | [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */ |
511 | [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ | 513 | [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ |
514 | [MSTP322] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 22, 0), /* USB */ | ||
512 | [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */ | 515 | [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */ |
513 | [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ | 516 | [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ |
514 | [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ | 517 | [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ |
@@ -553,6 +556,7 @@ static struct clk_lookup lookups[] = { | |||
553 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ | 556 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ |
554 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ | 557 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ |
555 | CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */ | 558 | CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */ |
559 | CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* MP-DMAC */ | ||
556 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ | 560 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ |
557 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ | 561 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ |
558 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ | 562 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ |
@@ -562,8 +566,10 @@ static struct clk_lookup lookups[] = { | |||
562 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ | 566 | CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ |
563 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ | 567 | CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ |
564 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ | 568 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ |
569 | CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */ | ||
565 | CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ | 570 | CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ |
566 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ | 571 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ |
572 | CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */ | ||
567 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ | 573 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ |
568 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | 574 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ |
569 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ | 575 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ |
@@ -612,7 +618,7 @@ void __init sh73a0_clock_init(void) | |||
612 | ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); | 618 | ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); |
613 | 619 | ||
614 | if (!ret) | 620 | if (!ret) |
615 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 621 | ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); |
616 | 622 | ||
617 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | 623 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) |
618 | ret = clk_register(late_main_clks[k]); | 624 | ret = clk_register(late_main_clks[k]); |
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 01e2bc014f15..45e61dada030 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h | |||
@@ -77,6 +77,7 @@ extern void r8a7779_add_standard_devices(void); | |||
77 | extern void r8a7779_clock_init(void); | 77 | extern void r8a7779_clock_init(void); |
78 | extern void r8a7779_pinmux_init(void); | 78 | extern void r8a7779_pinmux_init(void); |
79 | extern void r8a7779_pm_init(void); | 79 | extern void r8a7779_pm_init(void); |
80 | extern void r8a7740_meram_workaround(void); | ||
80 | 81 | ||
81 | extern unsigned int r8a7779_get_core_count(void); | 82 | extern unsigned int r8a7779_get_core_count(void); |
82 | extern int r8a7779_platform_cpu_kill(unsigned int cpu); | 83 | extern int r8a7779_platform_cpu_kill(unsigned int cpu); |
diff --git a/arch/arm/mach-shmobile/include/mach/dma-register.h b/arch/arm/mach-shmobile/include/mach/dma-register.h new file mode 100644 index 000000000000..97c40bd9b94f --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/dma-register.h | |||
@@ -0,0 +1,84 @@ | |||
1 | /* | ||
2 | * SH-ARM CPU-specific DMA definitions, used by both DMA drivers | ||
3 | * | ||
4 | * Copyright (C) 2012 Renesas Solutions Corp | ||
5 | * | ||
6 | * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
7 | * | ||
8 | * Based on arch/sh/include/cpu-sh4/cpu/dma-register.h | ||
9 | * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License version 2 as | ||
13 | * published by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #ifndef DMA_REGISTER_H | ||
17 | #define DMA_REGISTER_H | ||
18 | |||
19 | /* | ||
20 | * Direct Memory Access Controller | ||
21 | */ | ||
22 | |||
23 | /* Transmit sizes and respective CHCR register values */ | ||
24 | enum { | ||
25 | XMIT_SZ_8BIT = 0, | ||
26 | XMIT_SZ_16BIT = 1, | ||
27 | XMIT_SZ_32BIT = 2, | ||
28 | XMIT_SZ_64BIT = 7, | ||
29 | XMIT_SZ_128BIT = 3, | ||
30 | XMIT_SZ_256BIT = 4, | ||
31 | XMIT_SZ_512BIT = 5, | ||
32 | }; | ||
33 | |||
34 | /* log2(size / 8) - used to calculate number of transfers */ | ||
35 | static const unsigned int dma_ts_shift[] = { | ||
36 | [XMIT_SZ_8BIT] = 0, | ||
37 | [XMIT_SZ_16BIT] = 1, | ||
38 | [XMIT_SZ_32BIT] = 2, | ||
39 | [XMIT_SZ_64BIT] = 3, | ||
40 | [XMIT_SZ_128BIT] = 4, | ||
41 | [XMIT_SZ_256BIT] = 5, | ||
42 | [XMIT_SZ_512BIT] = 6, | ||
43 | }; | ||
44 | |||
45 | #define TS_LOW_BIT 0x3 /* --xx */ | ||
46 | #define TS_HI_BIT 0xc /* xx-- */ | ||
47 | |||
48 | #define TS_LOW_SHIFT (3) | ||
49 | #define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */ | ||
50 | |||
51 | #define TS_INDEX2VAL(i) \ | ||
52 | ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\ | ||
53 | (((i) & TS_HI_BIT) << TS_HI_SHIFT)) | ||
54 | |||
55 | #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz))) | ||
56 | #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz))) | ||
57 | |||
58 | |||
59 | /* | ||
60 | * USB High-Speed DMAC | ||
61 | */ | ||
62 | /* Transmit sizes and respective CHCR register values */ | ||
63 | enum { | ||
64 | USBTS_XMIT_SZ_8BYTE = 0, | ||
65 | USBTS_XMIT_SZ_16BYTE = 1, | ||
66 | USBTS_XMIT_SZ_32BYTE = 2, | ||
67 | }; | ||
68 | |||
69 | /* log2(size / 8) - used to calculate number of transfers */ | ||
70 | static const unsigned int dma_usbts_shift[] = { | ||
71 | [USBTS_XMIT_SZ_8BYTE] = 3, | ||
72 | [USBTS_XMIT_SZ_16BYTE] = 4, | ||
73 | [USBTS_XMIT_SZ_32BYTE] = 5, | ||
74 | }; | ||
75 | |||
76 | #define USBTS_LOW_BIT 0x3 /* --xx */ | ||
77 | #define USBTS_HI_BIT 0x0 /* ---- */ | ||
78 | |||
79 | #define USBTS_LOW_SHIFT 6 | ||
80 | #define USBTS_HI_SHIFT 0 | ||
81 | |||
82 | #define USBTS_INDEX2VAL(i) (((i) & 3) << 6) | ||
83 | |||
84 | #endif /* DMA_REGISTER_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h index de795b42232a..844507d937cb 100644 --- a/arch/arm/mach-shmobile/include/mach/gpio.h +++ b/arch/arm/mach-shmobile/include/mach/gpio.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/errno.h> | 14 | #include <linux/errno.h> |
15 | #include <linux/sh_pfc.h> | 15 | #include <linux/sh_pfc.h> |
16 | #include <linux/io.h> | ||
16 | 17 | ||
17 | #ifdef CONFIG_GPIOLIB | 18 | #ifdef CONFIG_GPIOLIB |
18 | 19 | ||
@@ -27,4 +28,35 @@ static inline int irq_to_gpio(unsigned int irq) | |||
27 | 28 | ||
28 | #endif /* CONFIG_GPIOLIB */ | 29 | #endif /* CONFIG_GPIOLIB */ |
29 | 30 | ||
31 | /* | ||
32 | * FIXME !! | ||
33 | * | ||
34 | * current gpio frame work doesn't have | ||
35 | * the method to control only pull up/down/free. | ||
36 | * this function should be replaced by correct gpio function | ||
37 | */ | ||
38 | static inline void __init gpio_direction_none(u32 addr) | ||
39 | { | ||
40 | __raw_writeb(0x00, addr); | ||
41 | } | ||
42 | |||
43 | static inline void __init gpio_request_pullup(u32 addr) | ||
44 | { | ||
45 | u8 data = __raw_readb(addr); | ||
46 | |||
47 | data &= 0x0F; | ||
48 | data |= 0xC0; | ||
49 | __raw_writeb(data, addr); | ||
50 | } | ||
51 | |||
52 | static inline void __init gpio_request_pulldown(u32 addr) | ||
53 | { | ||
54 | u8 data = __raw_readb(addr); | ||
55 | |||
56 | data &= 0x0F; | ||
57 | data |= 0xA0; | ||
58 | |||
59 | __raw_writeb(data, addr); | ||
60 | } | ||
61 | |||
30 | #endif /* __ASM_ARCH_GPIO_H */ | 62 | #endif /* __ASM_ARCH_GPIO_H */ |
diff --git a/arch/arm/mach-shmobile/include/mach/pm-rmobile.h b/arch/arm/mach-shmobile/include/mach/pm-rmobile.h new file mode 100644 index 000000000000..5a402840fe28 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/pm-rmobile.h | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2012 Renesas Solutions Corp. | ||
3 | * | ||
4 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef PM_RMOBILE_H | ||
11 | #define PM_RMOBILE_H | ||
12 | |||
13 | #include <linux/pm_domain.h> | ||
14 | |||
15 | struct platform_device; | ||
16 | |||
17 | struct rmobile_pm_domain { | ||
18 | struct generic_pm_domain genpd; | ||
19 | struct dev_power_governor *gov; | ||
20 | int (*suspend)(void); | ||
21 | void (*resume)(void); | ||
22 | unsigned int bit_shift; | ||
23 | bool no_debug; | ||
24 | }; | ||
25 | |||
26 | static inline | ||
27 | struct rmobile_pm_domain *to_rmobile_pd(struct generic_pm_domain *d) | ||
28 | { | ||
29 | return container_of(d, struct rmobile_pm_domain, genpd); | ||
30 | } | ||
31 | |||
32 | #ifdef CONFIG_PM | ||
33 | extern void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd); | ||
34 | extern void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd, | ||
35 | struct platform_device *pdev); | ||
36 | extern void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd, | ||
37 | struct rmobile_pm_domain *rmobile_sd); | ||
38 | #else | ||
39 | #define rmobile_init_pm_domain(pd) do { } while (0) | ||
40 | #define rmobile_add_device_to_domain(pd, pdev) do { } while (0) | ||
41 | #define rmobile_pm_add_subdomain(pd, sd) do { } while (0) | ||
42 | #endif /* CONFIG_PM */ | ||
43 | |||
44 | #endif /* PM_RMOBILE_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h index 9d447abb969c..7143147780df 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h | |||
@@ -19,6 +19,8 @@ | |||
19 | #ifndef __ASM_R8A7740_H__ | 19 | #ifndef __ASM_R8A7740_H__ |
20 | #define __ASM_R8A7740_H__ | 20 | #define __ASM_R8A7740_H__ |
21 | 21 | ||
22 | #include <mach/pm-rmobile.h> | ||
23 | |||
22 | /* | 24 | /* |
23 | * MD_CKx pin | 25 | * MD_CKx pin |
24 | */ | 26 | */ |
@@ -139,7 +141,7 @@ enum { | |||
139 | GPIO_FN_DBGMD10, GPIO_FN_DBGMD11, GPIO_FN_DBGMD20, | 141 | GPIO_FN_DBGMD10, GPIO_FN_DBGMD11, GPIO_FN_DBGMD20, |
140 | GPIO_FN_DBGMD21, | 142 | GPIO_FN_DBGMD21, |
141 | 143 | ||
142 | /* FSI */ | 144 | /* FSI-A */ |
143 | GPIO_FN_FSIAISLD_PORT0, /* FSIAISLD Port 0/5 */ | 145 | GPIO_FN_FSIAISLD_PORT0, /* FSIAISLD Port 0/5 */ |
144 | GPIO_FN_FSIAISLD_PORT5, | 146 | GPIO_FN_FSIAISLD_PORT5, |
145 | GPIO_FN_FSIASPDIF_PORT9, /* FSIASPDIF Port 9/18 */ | 147 | GPIO_FN_FSIASPDIF_PORT9, /* FSIASPDIF Port 9/18 */ |
@@ -150,6 +152,9 @@ enum { | |||
150 | GPIO_FN_FSIACK, GPIO_FN_FSIAILR, | 152 | GPIO_FN_FSIACK, GPIO_FN_FSIAILR, |
151 | GPIO_FN_FSIAIBT, | 153 | GPIO_FN_FSIAIBT, |
152 | 154 | ||
155 | /* FSI-B */ | ||
156 | GPIO_FN_FSIBCK, | ||
157 | |||
153 | /* FMSI */ | 158 | /* FMSI */ |
154 | GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */ | 159 | GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */ |
155 | GPIO_FN_FMSISLD_PORT6, | 160 | GPIO_FN_FMSISLD_PORT6, |
@@ -565,6 +570,10 @@ enum { | |||
565 | GPIO_FN_RESETP_PULLUP, | 570 | GPIO_FN_RESETP_PULLUP, |
566 | GPIO_FN_RESETP_PLAIN, | 571 | GPIO_FN_RESETP_PLAIN, |
567 | 572 | ||
573 | /* HDMI */ | ||
574 | GPIO_FN_HDMI_HPD, | ||
575 | GPIO_FN_HDMI_CEC, | ||
576 | |||
568 | /* SDENC */ | 577 | /* SDENC */ |
569 | GPIO_FN_SDENC_CPG, | 578 | GPIO_FN_SDENC_CPG, |
570 | GPIO_FN_SDENC_DV_CLKI, | 579 | GPIO_FN_SDENC_DV_CLKI, |
@@ -581,4 +590,26 @@ enum { | |||
581 | GPIO_FN_TRACEAUD_FROM_MEMC, | 590 | GPIO_FN_TRACEAUD_FROM_MEMC, |
582 | }; | 591 | }; |
583 | 592 | ||
593 | /* DMA slave IDs */ | ||
594 | enum { | ||
595 | SHDMA_SLAVE_INVALID, | ||
596 | SHDMA_SLAVE_SDHI0_RX, | ||
597 | SHDMA_SLAVE_SDHI0_TX, | ||
598 | SHDMA_SLAVE_SDHI1_RX, | ||
599 | SHDMA_SLAVE_SDHI1_TX, | ||
600 | SHDMA_SLAVE_SDHI2_RX, | ||
601 | SHDMA_SLAVE_SDHI2_TX, | ||
602 | SHDMA_SLAVE_FSIA_RX, | ||
603 | SHDMA_SLAVE_FSIA_TX, | ||
604 | SHDMA_SLAVE_FSIB_TX, | ||
605 | SHDMA_SLAVE_USBHS_TX, | ||
606 | SHDMA_SLAVE_USBHS_RX, | ||
607 | }; | ||
608 | |||
609 | #ifdef CONFIG_PM | ||
610 | extern struct rmobile_pm_domain r8a7740_pd_a4s; | ||
611 | extern struct rmobile_pm_domain r8a7740_pd_a3sp; | ||
612 | extern struct rmobile_pm_domain r8a7740_pd_a4lc; | ||
613 | #endif /* CONFIG_PM */ | ||
614 | |||
584 | #endif /* __ASM_R8A7740_H__ */ | 615 | #endif /* __ASM_R8A7740_H__ */ |
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index 915d0093da08..b59048e6d8fd 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h | |||
@@ -13,6 +13,7 @@ | |||
13 | 13 | ||
14 | #include <linux/sh_clk.h> | 14 | #include <linux/sh_clk.h> |
15 | #include <linux/pm_domain.h> | 15 | #include <linux/pm_domain.h> |
16 | #include <mach/pm-rmobile.h> | ||
16 | 17 | ||
17 | /* | 18 | /* |
18 | * Pin Function Controller: | 19 | * Pin Function Controller: |
@@ -477,42 +478,16 @@ extern struct clk sh7372_fsibck_clk; | |||
477 | extern struct clk sh7372_fsidiva_clk; | 478 | extern struct clk sh7372_fsidiva_clk; |
478 | extern struct clk sh7372_fsidivb_clk; | 479 | extern struct clk sh7372_fsidivb_clk; |
479 | 480 | ||
480 | struct platform_device; | ||
481 | |||
482 | struct sh7372_pm_domain { | ||
483 | struct generic_pm_domain genpd; | ||
484 | struct dev_power_governor *gov; | ||
485 | int (*suspend)(void); | ||
486 | void (*resume)(void); | ||
487 | unsigned int bit_shift; | ||
488 | bool no_debug; | ||
489 | }; | ||
490 | |||
491 | static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d) | ||
492 | { | ||
493 | return container_of(d, struct sh7372_pm_domain, genpd); | ||
494 | } | ||
495 | |||
496 | #ifdef CONFIG_PM | 481 | #ifdef CONFIG_PM |
497 | extern struct sh7372_pm_domain sh7372_a4lc; | 482 | extern struct rmobile_pm_domain sh7372_pd_a4lc; |
498 | extern struct sh7372_pm_domain sh7372_a4mp; | 483 | extern struct rmobile_pm_domain sh7372_pd_a4mp; |
499 | extern struct sh7372_pm_domain sh7372_d4; | 484 | extern struct rmobile_pm_domain sh7372_pd_d4; |
500 | extern struct sh7372_pm_domain sh7372_a4r; | 485 | extern struct rmobile_pm_domain sh7372_pd_a4r; |
501 | extern struct sh7372_pm_domain sh7372_a3rv; | 486 | extern struct rmobile_pm_domain sh7372_pd_a3rv; |
502 | extern struct sh7372_pm_domain sh7372_a3ri; | 487 | extern struct rmobile_pm_domain sh7372_pd_a3ri; |
503 | extern struct sh7372_pm_domain sh7372_a4s; | 488 | extern struct rmobile_pm_domain sh7372_pd_a4s; |
504 | extern struct sh7372_pm_domain sh7372_a3sp; | 489 | extern struct rmobile_pm_domain sh7372_pd_a3sp; |
505 | extern struct sh7372_pm_domain sh7372_a3sg; | 490 | extern struct rmobile_pm_domain sh7372_pd_a3sg; |
506 | |||
507 | extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd); | ||
508 | extern void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, | ||
509 | struct platform_device *pdev); | ||
510 | extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, | ||
511 | struct sh7372_pm_domain *sh7372_sd); | ||
512 | #else | ||
513 | #define sh7372_init_pm_domain(pd) do { } while(0) | ||
514 | #define sh7372_add_device_to_domain(pd, pdev) do { } while(0) | ||
515 | #define sh7372_pm_add_subdomain(pd, sd) do { } while(0) | ||
516 | #endif /* CONFIG_PM */ | 491 | #endif /* CONFIG_PM */ |
517 | 492 | ||
518 | extern void sh7372_intcs_suspend(void); | 493 | extern void sh7372_intcs_suspend(void); |
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h index 398e2c10913b..fe950f25d793 100644 --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h | |||
@@ -516,6 +516,13 @@ enum { | |||
516 | SHDMA_SLAVE_SDHI2_RX, | 516 | SHDMA_SLAVE_SDHI2_RX, |
517 | SHDMA_SLAVE_MMCIF_TX, | 517 | SHDMA_SLAVE_MMCIF_TX, |
518 | SHDMA_SLAVE_MMCIF_RX, | 518 | SHDMA_SLAVE_MMCIF_RX, |
519 | SHDMA_SLAVE_FSI2A_TX, | ||
520 | SHDMA_SLAVE_FSI2A_RX, | ||
521 | SHDMA_SLAVE_FSI2B_TX, | ||
522 | SHDMA_SLAVE_FSI2B_RX, | ||
523 | SHDMA_SLAVE_FSI2C_TX, | ||
524 | SHDMA_SLAVE_FSI2C_RX, | ||
525 | SHDMA_SLAVE_FSI2D_RX, | ||
519 | }; | 526 | }; |
520 | 527 | ||
521 | /* | 528 | /* |
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c index 09c42afcb22d..9a69a31918ba 100644 --- a/arch/arm/mach-shmobile/intc-r8a7740.c +++ b/arch/arm/mach-shmobile/intc-r8a7740.c | |||
@@ -71,10 +71,12 @@ enum { | |||
71 | DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, | 71 | DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3, |
72 | DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, | 72 | DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR, |
73 | SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, | 73 | SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, |
74 | HDMI, | ||
74 | USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND, | 75 | USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND, |
75 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, | 76 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, |
76 | SPU2_0, SPU2_1, | 77 | SPU2_0, SPU2_1, |
77 | FSI, FMSI, | 78 | FSI, FMSI, |
79 | HDMI_SSS, HDMI_KEY, | ||
78 | IPMMU, | 80 | IPMMU, |
79 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, | 81 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, |
80 | MFIS2, | 82 | MFIS2, |
@@ -182,6 +184,7 @@ static struct intc_vect intca_vectors[] __initdata = { | |||
182 | INTC_VECT(USBH_EHCI, 0x1580), | 184 | INTC_VECT(USBH_EHCI, 0x1580), |
183 | INTC_VECT(USBH_PME, 0x15A0), | 185 | INTC_VECT(USBH_PME, 0x15A0), |
184 | INTC_VECT(USBH_BIND, 0x15C0), | 186 | INTC_VECT(USBH_BIND, 0x15C0), |
187 | INTC_VECT(HDMI, 0x1700), | ||
185 | INTC_VECT(RSPI_OVRF, 0x1780), | 188 | INTC_VECT(RSPI_OVRF, 0x1780), |
186 | INTC_VECT(RSPI_SPTEF, 0x17A0), | 189 | INTC_VECT(RSPI_SPTEF, 0x17A0), |
187 | INTC_VECT(RSPI_SPRF, 0x17C0), | 190 | INTC_VECT(RSPI_SPRF, 0x17C0), |
@@ -189,6 +192,8 @@ static struct intc_vect intca_vectors[] __initdata = { | |||
189 | INTC_VECT(SPU2_1, 0x1820), | 192 | INTC_VECT(SPU2_1, 0x1820), |
190 | INTC_VECT(FSI, 0x1840), | 193 | INTC_VECT(FSI, 0x1840), |
191 | INTC_VECT(FMSI, 0x1860), | 194 | INTC_VECT(FMSI, 0x1860), |
195 | INTC_VECT(HDMI_SSS, 0x18A0), | ||
196 | INTC_VECT(HDMI_KEY, 0x18C0), | ||
192 | INTC_VECT(IPMMU, 0x1920), | 197 | INTC_VECT(IPMMU, 0x1920), |
193 | INTC_VECT(AP_ARM_CTIIRQ, 0x1980), | 198 | INTC_VECT(AP_ARM_CTIIRQ, 0x1980), |
194 | INTC_VECT(AP_ARM_PMURQ, 0x19A0), | 199 | INTC_VECT(AP_ARM_PMURQ, 0x19A0), |
@@ -304,11 +309,11 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { | |||
304 | USBH_EHCI, USBH_PME, USBH_BIND, 0 } }, | 309 | USBH_EHCI, USBH_PME, USBH_BIND, 0 } }, |
305 | /* IMR3A3 / IMCR3A3 */ | 310 | /* IMR3A3 / IMCR3A3 */ |
306 | { /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8, | 311 | { /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8, |
307 | { 0, 0, 0, 0, | 312 | { HDMI, 0, 0, 0, |
308 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } }, | 313 | RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } }, |
309 | { /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8, | 314 | { /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8, |
310 | { SPU2_0, SPU2_1, FSI, FMSI, | 315 | { SPU2_0, SPU2_1, FSI, FMSI, |
311 | 0, 0, 0, 0 } }, | 316 | 0, HDMI_SSS, HDMI_KEY, 0 } }, |
312 | { /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8, | 317 | { /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8, |
313 | { 0, IPMMU, 0, 0, | 318 | { 0, IPMMU, 0, 0, |
314 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } }, | 319 | AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } }, |
@@ -353,10 +358,10 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = { | |||
353 | { 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } }, | 358 | { 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } }, |
354 | /* IPRGA3 */ | 359 | /* IPRGA3 */ |
355 | /* IPRHA3 */ | 360 | /* IPRHA3 */ |
356 | /* IPRIA3 */ | 361 | { 0xe6950020, 0, 16, 4, /* IPRIA3 */ { HDMI, 0, 0, 0 } }, |
357 | { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } }, | 362 | { 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } }, |
358 | { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, | 363 | { 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } }, |
359 | /* IPRLA3 */ | 364 | { 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, HDMI_SSS, HDMI_KEY, 0 } }, |
360 | { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } }, | 365 | { 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } }, |
361 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, | 366 | { 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } }, |
362 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, | 367 | { 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S, |
diff --git a/arch/arm/mach-shmobile/pfc-r8a7740.c b/arch/arm/mach-shmobile/pfc-r8a7740.c index 670fe1869dbc..ce9e7fa5cc8a 100644 --- a/arch/arm/mach-shmobile/pfc-r8a7740.c +++ b/arch/arm/mach-shmobile/pfc-r8a7740.c | |||
@@ -169,7 +169,7 @@ enum { | |||
169 | DBGMD10_MARK, DBGMD11_MARK, DBGMD20_MARK, | 169 | DBGMD10_MARK, DBGMD11_MARK, DBGMD20_MARK, |
170 | DBGMD21_MARK, | 170 | DBGMD21_MARK, |
171 | 171 | ||
172 | /* FSI */ | 172 | /* FSI-A */ |
173 | FSIAISLD_PORT0_MARK, /* FSIAISLD Port 0/5 */ | 173 | FSIAISLD_PORT0_MARK, /* FSIAISLD Port 0/5 */ |
174 | FSIAISLD_PORT5_MARK, | 174 | FSIAISLD_PORT5_MARK, |
175 | FSIASPDIF_PORT9_MARK, /* FSIASPDIF Port 9/18 */ | 175 | FSIASPDIF_PORT9_MARK, /* FSIASPDIF Port 9/18 */ |
@@ -178,6 +178,9 @@ enum { | |||
178 | FSIAOBT_MARK, FSIAOSLD_MARK, FSIAOMC_MARK, | 178 | FSIAOBT_MARK, FSIAOSLD_MARK, FSIAOMC_MARK, |
179 | FSIACK_MARK, FSIAILR_MARK, FSIAIBT_MARK, | 179 | FSIACK_MARK, FSIAILR_MARK, FSIAIBT_MARK, |
180 | 180 | ||
181 | /* FSI-B */ | ||
182 | FSIBCK_MARK, | ||
183 | |||
181 | /* FMSI */ | 184 | /* FMSI */ |
182 | FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */ | 185 | FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */ |
183 | FMSISLD_PORT6_MARK, | 186 | FMSISLD_PORT6_MARK, |
@@ -560,6 +563,9 @@ enum { | |||
560 | /* SDENC */ | 563 | /* SDENC */ |
561 | SDENC_CPG_MARK, SDENC_DV_CLKI_MARK, | 564 | SDENC_CPG_MARK, SDENC_DV_CLKI_MARK, |
562 | 565 | ||
566 | /* HDMI */ | ||
567 | HDMI_HPD_MARK, HDMI_CEC_MARK, | ||
568 | |||
563 | /* DEBUG */ | 569 | /* DEBUG */ |
564 | EDEBGREQ_PULLUP_MARK, /* for JTAG */ | 570 | EDEBGREQ_PULLUP_MARK, /* for JTAG */ |
565 | EDEBGREQ_PULLDOWN_MARK, | 571 | EDEBGREQ_PULLDOWN_MARK, |
@@ -771,6 +777,7 @@ static pinmux_enum_t pinmux_data[] = { | |||
771 | 777 | ||
772 | /* Port11 */ | 778 | /* Port11 */ |
773 | PINMUX_DATA(FSIACK_MARK, PORT11_FN1), | 779 | PINMUX_DATA(FSIACK_MARK, PORT11_FN1), |
780 | PINMUX_DATA(FSIBCK_MARK, PORT11_FN2), | ||
774 | PINMUX_DATA(IRQ2_PORT11_MARK, PORT11_FN0, MSEL1CR_2_0), | 781 | PINMUX_DATA(IRQ2_PORT11_MARK, PORT11_FN0, MSEL1CR_2_0), |
775 | 782 | ||
776 | /* Port12 */ | 783 | /* Port12 */ |
@@ -1254,7 +1261,7 @@ static pinmux_enum_t pinmux_data[] = { | |||
1254 | PINMUX_DATA(A21_MARK, PORT120_FN1), | 1261 | PINMUX_DATA(A21_MARK, PORT120_FN1), |
1255 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT120_FN2), | 1262 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT120_FN2), |
1256 | PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK, PORT120_FN3, MSEL4CR_10_0), | 1263 | PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK, PORT120_FN3, MSEL4CR_10_0), |
1257 | PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_0), | 1264 | PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_1), |
1258 | 1265 | ||
1259 | /* Port121 */ | 1266 | /* Port121 */ |
1260 | PINMUX_DATA(A20_MARK, PORT121_FN1), | 1267 | PINMUX_DATA(A20_MARK, PORT121_FN1), |
@@ -1616,13 +1623,15 @@ static pinmux_enum_t pinmux_data[] = { | |||
1616 | 1623 | ||
1617 | /* Port209 */ | 1624 | /* Port209 */ |
1618 | PINMUX_DATA(VBUS_MARK, PORT209_FN1), | 1625 | PINMUX_DATA(VBUS_MARK, PORT209_FN1), |
1619 | PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_1), | 1626 | PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_0), |
1620 | 1627 | ||
1621 | /* Port210 */ | 1628 | /* Port210 */ |
1622 | PINMUX_DATA(IRQ9_PORT210_MARK, PORT210_FN0, MSEL1CR_9_1), | 1629 | PINMUX_DATA(IRQ9_PORT210_MARK, PORT210_FN0, MSEL1CR_9_1), |
1630 | PINMUX_DATA(HDMI_HPD_MARK, PORT210_FN1), | ||
1623 | 1631 | ||
1624 | /* Port211 */ | 1632 | /* Port211 */ |
1625 | PINMUX_DATA(IRQ16_PORT211_MARK, PORT211_FN0, MSEL1CR_16_1), | 1633 | PINMUX_DATA(IRQ16_PORT211_MARK, PORT211_FN0, MSEL1CR_16_1), |
1634 | PINMUX_DATA(HDMI_CEC_MARK, PORT211_FN1), | ||
1626 | 1635 | ||
1627 | /* LCDC select */ | 1636 | /* LCDC select */ |
1628 | PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0), | 1637 | PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0), |
@@ -1691,7 +1700,7 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
1691 | GPIO_FN(DBGMD10), GPIO_FN(DBGMD11), GPIO_FN(DBGMD20), | 1700 | GPIO_FN(DBGMD10), GPIO_FN(DBGMD11), GPIO_FN(DBGMD20), |
1692 | GPIO_FN(DBGMD21), | 1701 | GPIO_FN(DBGMD21), |
1693 | 1702 | ||
1694 | /* FSI */ | 1703 | /* FSI-A */ |
1695 | GPIO_FN(FSIAISLD_PORT0), /* FSIAISLD Port 0/5 */ | 1704 | GPIO_FN(FSIAISLD_PORT0), /* FSIAISLD Port 0/5 */ |
1696 | GPIO_FN(FSIAISLD_PORT5), | 1705 | GPIO_FN(FSIAISLD_PORT5), |
1697 | GPIO_FN(FSIASPDIF_PORT9), /* FSIASPDIF Port 9/18 */ | 1706 | GPIO_FN(FSIASPDIF_PORT9), /* FSIASPDIF Port 9/18 */ |
@@ -1700,6 +1709,9 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
1700 | GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD), GPIO_FN(FSIAOMC), | 1709 | GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD), GPIO_FN(FSIAOMC), |
1701 | GPIO_FN(FSIACK), GPIO_FN(FSIAILR), GPIO_FN(FSIAIBT), | 1710 | GPIO_FN(FSIACK), GPIO_FN(FSIAILR), GPIO_FN(FSIAIBT), |
1702 | 1711 | ||
1712 | /* FSI-B */ | ||
1713 | GPIO_FN(FSIBCK), | ||
1714 | |||
1703 | /* FMSI */ | 1715 | /* FMSI */ |
1704 | GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */ | 1716 | GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */ |
1705 | GPIO_FN(FMSISLD_PORT6), | 1717 | GPIO_FN(FMSISLD_PORT6), |
@@ -2097,6 +2109,10 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
2097 | GPIO_FN(SDENC_CPG), | 2109 | GPIO_FN(SDENC_CPG), |
2098 | GPIO_FN(SDENC_DV_CLKI), | 2110 | GPIO_FN(SDENC_DV_CLKI), |
2099 | 2111 | ||
2112 | /* HDMI */ | ||
2113 | GPIO_FN(HDMI_HPD), | ||
2114 | GPIO_FN(HDMI_CEC), | ||
2115 | |||
2100 | /* SYSC */ | 2116 | /* SYSC */ |
2101 | GPIO_FN(RESETP_PULLUP), | 2117 | GPIO_FN(RESETP_PULLUP), |
2102 | GPIO_FN(RESETP_PLAIN), | 2118 | GPIO_FN(RESETP_PLAIN), |
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c new file mode 100644 index 000000000000..893504d012a6 --- /dev/null +++ b/arch/arm/mach-shmobile/pm-r8a7740.c | |||
@@ -0,0 +1,54 @@ | |||
1 | /* | ||
2 | * r8a7740 power management support | ||
3 | * | ||
4 | * Copyright (C) 2012 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #include <linux/console.h> | ||
12 | #include <mach/pm-rmobile.h> | ||
13 | |||
14 | #ifdef CONFIG_PM | ||
15 | static int r8a7740_pd_a4s_suspend(void) | ||
16 | { | ||
17 | /* | ||
18 | * The A4S domain contains the CPU core and therefore it should | ||
19 | * only be turned off if the CPU is in use. | ||
20 | */ | ||
21 | return -EBUSY; | ||
22 | } | ||
23 | |||
24 | struct rmobile_pm_domain r8a7740_pd_a4s = { | ||
25 | .genpd.name = "A4S", | ||
26 | .bit_shift = 10, | ||
27 | .gov = &pm_domain_always_on_gov, | ||
28 | .no_debug = true, | ||
29 | .suspend = r8a7740_pd_a4s_suspend, | ||
30 | }; | ||
31 | |||
32 | static int r8a7740_pd_a3sp_suspend(void) | ||
33 | { | ||
34 | /* | ||
35 | * Serial consoles make use of SCIF hardware located in A3SP, | ||
36 | * keep such power domain on if "no_console_suspend" is set. | ||
37 | */ | ||
38 | return console_suspend_enabled ? 0 : -EBUSY; | ||
39 | } | ||
40 | |||
41 | struct rmobile_pm_domain r8a7740_pd_a3sp = { | ||
42 | .genpd.name = "A3SP", | ||
43 | .bit_shift = 11, | ||
44 | .gov = &pm_domain_always_on_gov, | ||
45 | .no_debug = true, | ||
46 | .suspend = r8a7740_pd_a3sp_suspend, | ||
47 | }; | ||
48 | |||
49 | struct rmobile_pm_domain r8a7740_pd_a4lc = { | ||
50 | .genpd.name = "A4LC", | ||
51 | .bit_shift = 1, | ||
52 | }; | ||
53 | |||
54 | #endif /* CONFIG_PM */ | ||
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c new file mode 100644 index 000000000000..a8562540f1d6 --- /dev/null +++ b/arch/arm/mach-shmobile/pm-rmobile.c | |||
@@ -0,0 +1,167 @@ | |||
1 | /* | ||
2 | * rmobile power management support | ||
3 | * | ||
4 | * Copyright (C) 2012 Renesas Solutions Corp. | ||
5 | * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
6 | * | ||
7 | * based on pm-sh7372.c | ||
8 | * Copyright (C) 2011 Magnus Damm | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | */ | ||
14 | #include <linux/console.h> | ||
15 | #include <linux/delay.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/pm.h> | ||
18 | #include <linux/pm_clock.h> | ||
19 | #include <asm/io.h> | ||
20 | #include <mach/pm-rmobile.h> | ||
21 | |||
22 | /* SYSC */ | ||
23 | #define SPDCR 0xe6180008 | ||
24 | #define SWUCR 0xe6180014 | ||
25 | #define PSTR 0xe6180080 | ||
26 | |||
27 | #define PSTR_RETRIES 100 | ||
28 | #define PSTR_DELAY_US 10 | ||
29 | |||
30 | #ifdef CONFIG_PM | ||
31 | static int rmobile_pd_power_down(struct generic_pm_domain *genpd) | ||
32 | { | ||
33 | struct rmobile_pm_domain *rmobile_pd = to_rmobile_pd(genpd); | ||
34 | unsigned int mask = 1 << rmobile_pd->bit_shift; | ||
35 | |||
36 | if (rmobile_pd->suspend) { | ||
37 | int ret = rmobile_pd->suspend(); | ||
38 | |||
39 | if (ret) | ||
40 | return ret; | ||
41 | } | ||
42 | |||
43 | if (__raw_readl(PSTR) & mask) { | ||
44 | unsigned int retry_count; | ||
45 | __raw_writel(mask, SPDCR); | ||
46 | |||
47 | for (retry_count = PSTR_RETRIES; retry_count; retry_count--) { | ||
48 | if (!(__raw_readl(SPDCR) & mask)) | ||
49 | break; | ||
50 | cpu_relax(); | ||
51 | } | ||
52 | } | ||
53 | |||
54 | if (!rmobile_pd->no_debug) | ||
55 | pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n", | ||
56 | genpd->name, mask, __raw_readl(PSTR)); | ||
57 | |||
58 | return 0; | ||
59 | } | ||
60 | |||
61 | static int __rmobile_pd_power_up(struct rmobile_pm_domain *rmobile_pd, | ||
62 | bool do_resume) | ||
63 | { | ||
64 | unsigned int mask = 1 << rmobile_pd->bit_shift; | ||
65 | unsigned int retry_count; | ||
66 | int ret = 0; | ||
67 | |||
68 | if (__raw_readl(PSTR) & mask) | ||
69 | goto out; | ||
70 | |||
71 | __raw_writel(mask, SWUCR); | ||
72 | |||
73 | for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) { | ||
74 | if (!(__raw_readl(SWUCR) & mask)) | ||
75 | break; | ||
76 | if (retry_count > PSTR_RETRIES) | ||
77 | udelay(PSTR_DELAY_US); | ||
78 | else | ||
79 | cpu_relax(); | ||
80 | } | ||
81 | if (!retry_count) | ||
82 | ret = -EIO; | ||
83 | |||
84 | if (!rmobile_pd->no_debug) | ||
85 | pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n", | ||
86 | rmobile_pd->genpd.name, mask, __raw_readl(PSTR)); | ||
87 | |||
88 | out: | ||
89 | if (ret == 0 && rmobile_pd->resume && do_resume) | ||
90 | rmobile_pd->resume(); | ||
91 | |||
92 | return ret; | ||
93 | } | ||
94 | |||
95 | static int rmobile_pd_power_up(struct generic_pm_domain *genpd) | ||
96 | { | ||
97 | return __rmobile_pd_power_up(to_rmobile_pd(genpd), true); | ||
98 | } | ||
99 | |||
100 | static bool rmobile_pd_active_wakeup(struct device *dev) | ||
101 | { | ||
102 | bool (*active_wakeup)(struct device *dev); | ||
103 | |||
104 | active_wakeup = dev_gpd_data(dev)->ops.active_wakeup; | ||
105 | return active_wakeup ? active_wakeup(dev) : true; | ||
106 | } | ||
107 | |||
108 | static int rmobile_pd_stop_dev(struct device *dev) | ||
109 | { | ||
110 | int (*stop)(struct device *dev); | ||
111 | |||
112 | stop = dev_gpd_data(dev)->ops.stop; | ||
113 | if (stop) { | ||
114 | int ret = stop(dev); | ||
115 | if (ret) | ||
116 | return ret; | ||
117 | } | ||
118 | return pm_clk_suspend(dev); | ||
119 | } | ||
120 | |||
121 | static int rmobile_pd_start_dev(struct device *dev) | ||
122 | { | ||
123 | int (*start)(struct device *dev); | ||
124 | int ret; | ||
125 | |||
126 | ret = pm_clk_resume(dev); | ||
127 | if (ret) | ||
128 | return ret; | ||
129 | |||
130 | start = dev_gpd_data(dev)->ops.start; | ||
131 | if (start) | ||
132 | ret = start(dev); | ||
133 | |||
134 | return ret; | ||
135 | } | ||
136 | |||
137 | void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd) | ||
138 | { | ||
139 | struct generic_pm_domain *genpd = &rmobile_pd->genpd; | ||
140 | struct dev_power_governor *gov = rmobile_pd->gov; | ||
141 | |||
142 | pm_genpd_init(genpd, gov ? : &simple_qos_governor, false); | ||
143 | genpd->dev_ops.stop = rmobile_pd_stop_dev; | ||
144 | genpd->dev_ops.start = rmobile_pd_start_dev; | ||
145 | genpd->dev_ops.active_wakeup = rmobile_pd_active_wakeup; | ||
146 | genpd->dev_irq_safe = true; | ||
147 | genpd->power_off = rmobile_pd_power_down; | ||
148 | genpd->power_on = rmobile_pd_power_up; | ||
149 | __rmobile_pd_power_up(rmobile_pd, false); | ||
150 | } | ||
151 | |||
152 | void rmobile_add_device_to_domain(struct rmobile_pm_domain *rmobile_pd, | ||
153 | struct platform_device *pdev) | ||
154 | { | ||
155 | struct device *dev = &pdev->dev; | ||
156 | |||
157 | pm_genpd_add_device(&rmobile_pd->genpd, dev); | ||
158 | if (pm_clk_no_clocks(dev)) | ||
159 | pm_clk_add(dev, NULL); | ||
160 | } | ||
161 | |||
162 | void rmobile_pm_add_subdomain(struct rmobile_pm_domain *rmobile_pd, | ||
163 | struct rmobile_pm_domain *rmobile_sd) | ||
164 | { | ||
165 | pm_genpd_add_subdomain(&rmobile_pd->genpd, &rmobile_sd->genpd); | ||
166 | } | ||
167 | #endif /* CONFIG_PM */ | ||
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index a3bdb12acde9..792037069226 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/suspend.h> | 26 | #include <asm/suspend.h> |
27 | #include <mach/common.h> | 27 | #include <mach/common.h> |
28 | #include <mach/sh7372.h> | 28 | #include <mach/sh7372.h> |
29 | #include <mach/pm-rmobile.h> | ||
29 | 30 | ||
30 | /* DBG */ | 31 | /* DBG */ |
31 | #define DBGREG1 0xe6100020 | 32 | #define DBGREG1 0xe6100020 |
@@ -41,13 +42,10 @@ | |||
41 | #define PLLC01STPCR 0xe61500c8 | 42 | #define PLLC01STPCR 0xe61500c8 |
42 | 43 | ||
43 | /* SYSC */ | 44 | /* SYSC */ |
44 | #define SPDCR 0xe6180008 | ||
45 | #define SWUCR 0xe6180014 | ||
46 | #define SBAR 0xe6180020 | 45 | #define SBAR 0xe6180020 |
47 | #define WUPRMSK 0xe6180028 | 46 | #define WUPRMSK 0xe6180028 |
48 | #define WUPSMSK 0xe618002c | 47 | #define WUPSMSK 0xe618002c |
49 | #define WUPSMSK2 0xe6180048 | 48 | #define WUPSMSK2 0xe6180048 |
50 | #define PSTR 0xe6180080 | ||
51 | #define WUPSFAC 0xe6180098 | 49 | #define WUPSFAC 0xe6180098 |
52 | #define IRQCR 0xe618022c | 50 | #define IRQCR 0xe618022c |
53 | #define IRQCR2 0xe6180238 | 51 | #define IRQCR2 0xe6180238 |
@@ -71,188 +69,48 @@ | |||
71 | /* AP-System Core */ | 69 | /* AP-System Core */ |
72 | #define APARMBAREA 0xe6f10020 | 70 | #define APARMBAREA 0xe6f10020 |
73 | 71 | ||
74 | #define PSTR_RETRIES 100 | ||
75 | #define PSTR_DELAY_US 10 | ||
76 | |||
77 | #ifdef CONFIG_PM | 72 | #ifdef CONFIG_PM |
78 | 73 | ||
79 | static int pd_power_down(struct generic_pm_domain *genpd) | 74 | struct rmobile_pm_domain sh7372_pd_a4lc = { |
80 | { | ||
81 | struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd); | ||
82 | unsigned int mask = 1 << sh7372_pd->bit_shift; | ||
83 | |||
84 | if (sh7372_pd->suspend) { | ||
85 | int ret = sh7372_pd->suspend(); | ||
86 | |||
87 | if (ret) | ||
88 | return ret; | ||
89 | } | ||
90 | |||
91 | if (__raw_readl(PSTR) & mask) { | ||
92 | unsigned int retry_count; | ||
93 | |||
94 | __raw_writel(mask, SPDCR); | ||
95 | |||
96 | for (retry_count = PSTR_RETRIES; retry_count; retry_count--) { | ||
97 | if (!(__raw_readl(SPDCR) & mask)) | ||
98 | break; | ||
99 | cpu_relax(); | ||
100 | } | ||
101 | } | ||
102 | |||
103 | if (!sh7372_pd->no_debug) | ||
104 | pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n", | ||
105 | genpd->name, mask, __raw_readl(PSTR)); | ||
106 | |||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume) | ||
111 | { | ||
112 | unsigned int mask = 1 << sh7372_pd->bit_shift; | ||
113 | unsigned int retry_count; | ||
114 | int ret = 0; | ||
115 | |||
116 | if (__raw_readl(PSTR) & mask) | ||
117 | goto out; | ||
118 | |||
119 | __raw_writel(mask, SWUCR); | ||
120 | |||
121 | for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) { | ||
122 | if (!(__raw_readl(SWUCR) & mask)) | ||
123 | break; | ||
124 | if (retry_count > PSTR_RETRIES) | ||
125 | udelay(PSTR_DELAY_US); | ||
126 | else | ||
127 | cpu_relax(); | ||
128 | } | ||
129 | if (!retry_count) | ||
130 | ret = -EIO; | ||
131 | |||
132 | if (!sh7372_pd->no_debug) | ||
133 | pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n", | ||
134 | sh7372_pd->genpd.name, mask, __raw_readl(PSTR)); | ||
135 | |||
136 | out: | ||
137 | if (ret == 0 && sh7372_pd->resume && do_resume) | ||
138 | sh7372_pd->resume(); | ||
139 | |||
140 | return ret; | ||
141 | } | ||
142 | |||
143 | static int pd_power_up(struct generic_pm_domain *genpd) | ||
144 | { | ||
145 | return __pd_power_up(to_sh7372_pd(genpd), true); | ||
146 | } | ||
147 | |||
148 | static int sh7372_a4r_suspend(void) | ||
149 | { | ||
150 | sh7372_intcs_suspend(); | ||
151 | __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */ | ||
152 | return 0; | ||
153 | } | ||
154 | |||
155 | static bool pd_active_wakeup(struct device *dev) | ||
156 | { | ||
157 | bool (*active_wakeup)(struct device *dev); | ||
158 | |||
159 | active_wakeup = dev_gpd_data(dev)->ops.active_wakeup; | ||
160 | return active_wakeup ? active_wakeup(dev) : true; | ||
161 | } | ||
162 | |||
163 | static int sh7372_stop_dev(struct device *dev) | ||
164 | { | ||
165 | int (*stop)(struct device *dev); | ||
166 | |||
167 | stop = dev_gpd_data(dev)->ops.stop; | ||
168 | if (stop) { | ||
169 | int ret = stop(dev); | ||
170 | if (ret) | ||
171 | return ret; | ||
172 | } | ||
173 | return pm_clk_suspend(dev); | ||
174 | } | ||
175 | |||
176 | static int sh7372_start_dev(struct device *dev) | ||
177 | { | ||
178 | int (*start)(struct device *dev); | ||
179 | int ret; | ||
180 | |||
181 | ret = pm_clk_resume(dev); | ||
182 | if (ret) | ||
183 | return ret; | ||
184 | |||
185 | start = dev_gpd_data(dev)->ops.start; | ||
186 | if (start) | ||
187 | ret = start(dev); | ||
188 | |||
189 | return ret; | ||
190 | } | ||
191 | |||
192 | void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd) | ||
193 | { | ||
194 | struct generic_pm_domain *genpd = &sh7372_pd->genpd; | ||
195 | struct dev_power_governor *gov = sh7372_pd->gov; | ||
196 | |||
197 | pm_genpd_init(genpd, gov ? : &simple_qos_governor, false); | ||
198 | genpd->dev_ops.stop = sh7372_stop_dev; | ||
199 | genpd->dev_ops.start = sh7372_start_dev; | ||
200 | genpd->dev_ops.active_wakeup = pd_active_wakeup; | ||
201 | genpd->dev_irq_safe = true; | ||
202 | genpd->power_off = pd_power_down; | ||
203 | genpd->power_on = pd_power_up; | ||
204 | __pd_power_up(sh7372_pd, false); | ||
205 | } | ||
206 | |||
207 | void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd, | ||
208 | struct platform_device *pdev) | ||
209 | { | ||
210 | struct device *dev = &pdev->dev; | ||
211 | |||
212 | pm_genpd_add_device(&sh7372_pd->genpd, dev); | ||
213 | if (pm_clk_no_clocks(dev)) | ||
214 | pm_clk_add(dev, NULL); | ||
215 | } | ||
216 | |||
217 | void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd, | ||
218 | struct sh7372_pm_domain *sh7372_sd) | ||
219 | { | ||
220 | pm_genpd_add_subdomain(&sh7372_pd->genpd, &sh7372_sd->genpd); | ||
221 | } | ||
222 | |||
223 | struct sh7372_pm_domain sh7372_a4lc = { | ||
224 | .genpd.name = "A4LC", | 75 | .genpd.name = "A4LC", |
225 | .bit_shift = 1, | 76 | .bit_shift = 1, |
226 | }; | 77 | }; |
227 | 78 | ||
228 | struct sh7372_pm_domain sh7372_a4mp = { | 79 | struct rmobile_pm_domain sh7372_pd_a4mp = { |
229 | .genpd.name = "A4MP", | 80 | .genpd.name = "A4MP", |
230 | .bit_shift = 2, | 81 | .bit_shift = 2, |
231 | }; | 82 | }; |
232 | 83 | ||
233 | struct sh7372_pm_domain sh7372_d4 = { | 84 | struct rmobile_pm_domain sh7372_pd_d4 = { |
234 | .genpd.name = "D4", | 85 | .genpd.name = "D4", |
235 | .bit_shift = 3, | 86 | .bit_shift = 3, |
236 | }; | 87 | }; |
237 | 88 | ||
238 | struct sh7372_pm_domain sh7372_a4r = { | 89 | static int sh7372_a4r_pd_suspend(void) |
90 | { | ||
91 | sh7372_intcs_suspend(); | ||
92 | __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */ | ||
93 | return 0; | ||
94 | } | ||
95 | |||
96 | struct rmobile_pm_domain sh7372_pd_a4r = { | ||
239 | .genpd.name = "A4R", | 97 | .genpd.name = "A4R", |
240 | .bit_shift = 5, | 98 | .bit_shift = 5, |
241 | .suspend = sh7372_a4r_suspend, | 99 | .suspend = sh7372_a4r_pd_suspend, |
242 | .resume = sh7372_intcs_resume, | 100 | .resume = sh7372_intcs_resume, |
243 | }; | 101 | }; |
244 | 102 | ||
245 | struct sh7372_pm_domain sh7372_a3rv = { | 103 | struct rmobile_pm_domain sh7372_pd_a3rv = { |
246 | .genpd.name = "A3RV", | 104 | .genpd.name = "A3RV", |
247 | .bit_shift = 6, | 105 | .bit_shift = 6, |
248 | }; | 106 | }; |
249 | 107 | ||
250 | struct sh7372_pm_domain sh7372_a3ri = { | 108 | struct rmobile_pm_domain sh7372_pd_a3ri = { |
251 | .genpd.name = "A3RI", | 109 | .genpd.name = "A3RI", |
252 | .bit_shift = 8, | 110 | .bit_shift = 8, |
253 | }; | 111 | }; |
254 | 112 | ||
255 | static int sh7372_a4s_suspend(void) | 113 | static int sh7372_pd_a4s_suspend(void) |
256 | { | 114 | { |
257 | /* | 115 | /* |
258 | * The A4S domain contains the CPU core and therefore it should | 116 | * The A4S domain contains the CPU core and therefore it should |
@@ -261,15 +119,15 @@ static int sh7372_a4s_suspend(void) | |||
261 | return -EBUSY; | 119 | return -EBUSY; |
262 | } | 120 | } |
263 | 121 | ||
264 | struct sh7372_pm_domain sh7372_a4s = { | 122 | struct rmobile_pm_domain sh7372_pd_a4s = { |
265 | .genpd.name = "A4S", | 123 | .genpd.name = "A4S", |
266 | .bit_shift = 10, | 124 | .bit_shift = 10, |
267 | .gov = &pm_domain_always_on_gov, | 125 | .gov = &pm_domain_always_on_gov, |
268 | .no_debug = true, | 126 | .no_debug = true, |
269 | .suspend = sh7372_a4s_suspend, | 127 | .suspend = sh7372_pd_a4s_suspend, |
270 | }; | 128 | }; |
271 | 129 | ||
272 | static int sh7372_a3sp_suspend(void) | 130 | static int sh7372_a3sp_pd_suspend(void) |
273 | { | 131 | { |
274 | /* | 132 | /* |
275 | * Serial consoles make use of SCIF hardware located in A3SP, | 133 | * Serial consoles make use of SCIF hardware located in A3SP, |
@@ -278,32 +136,22 @@ static int sh7372_a3sp_suspend(void) | |||
278 | return console_suspend_enabled ? 0 : -EBUSY; | 136 | return console_suspend_enabled ? 0 : -EBUSY; |
279 | } | 137 | } |
280 | 138 | ||
281 | struct sh7372_pm_domain sh7372_a3sp = { | 139 | struct rmobile_pm_domain sh7372_pd_a3sp = { |
282 | .genpd.name = "A3SP", | 140 | .genpd.name = "A3SP", |
283 | .bit_shift = 11, | 141 | .bit_shift = 11, |
284 | .gov = &pm_domain_always_on_gov, | 142 | .gov = &pm_domain_always_on_gov, |
285 | .no_debug = true, | 143 | .no_debug = true, |
286 | .suspend = sh7372_a3sp_suspend, | 144 | .suspend = sh7372_a3sp_pd_suspend, |
287 | }; | 145 | }; |
288 | 146 | ||
289 | struct sh7372_pm_domain sh7372_a3sg = { | 147 | struct rmobile_pm_domain sh7372_pd_a3sg = { |
290 | .genpd.name = "A3SG", | 148 | .genpd.name = "A3SG", |
291 | .bit_shift = 13, | 149 | .bit_shift = 13, |
292 | }; | 150 | }; |
293 | 151 | ||
294 | #else /* !CONFIG_PM */ | 152 | #endif /* CONFIG_PM */ |
295 | |||
296 | static inline void sh7372_a3sp_init(void) {} | ||
297 | |||
298 | #endif /* !CONFIG_PM */ | ||
299 | 153 | ||
300 | #if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) | 154 | #if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE) |
301 | static int sh7372_do_idle_core_standby(unsigned long unused) | ||
302 | { | ||
303 | cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */ | ||
304 | return 0; | ||
305 | } | ||
306 | |||
307 | static void sh7372_set_reset_vector(unsigned long address) | 155 | static void sh7372_set_reset_vector(unsigned long address) |
308 | { | 156 | { |
309 | /* set reset vector, translate 4k */ | 157 | /* set reset vector, translate 4k */ |
@@ -311,21 +159,6 @@ static void sh7372_set_reset_vector(unsigned long address) | |||
311 | __raw_writel(0, APARMBAREA); | 159 | __raw_writel(0, APARMBAREA); |
312 | } | 160 | } |
313 | 161 | ||
314 | static void sh7372_enter_core_standby(void) | ||
315 | { | ||
316 | sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); | ||
317 | |||
318 | /* enter sleep mode with SYSTBCR to 0x10 */ | ||
319 | __raw_writel(0x10, SYSTBCR); | ||
320 | cpu_suspend(0, sh7372_do_idle_core_standby); | ||
321 | __raw_writel(0, SYSTBCR); | ||
322 | |||
323 | /* disable reset vector translation */ | ||
324 | __raw_writel(0, SBAR); | ||
325 | } | ||
326 | #endif | ||
327 | |||
328 | #ifdef CONFIG_SUSPEND | ||
329 | static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode) | 162 | static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode) |
330 | { | 163 | { |
331 | if (pllc0_on) | 164 | if (pllc0_on) |
@@ -465,22 +298,42 @@ static void sh7372_setup_sysc(unsigned long msk, unsigned long msk2) | |||
465 | 298 | ||
466 | static void sh7372_enter_a3sm_common(int pllc0_on) | 299 | static void sh7372_enter_a3sm_common(int pllc0_on) |
467 | { | 300 | { |
301 | /* use INTCA together with SYSC for wakeup */ | ||
302 | sh7372_setup_sysc(1 << 0, 0); | ||
468 | sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); | 303 | sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); |
469 | sh7372_enter_sysc(pllc0_on, 1 << 12); | 304 | sh7372_enter_sysc(pllc0_on, 1 << 12); |
470 | } | 305 | } |
306 | #endif /* CONFIG_SUSPEND || CONFIG_CPU_IDLE */ | ||
471 | 307 | ||
472 | static void sh7372_enter_a4s_common(int pllc0_on) | 308 | #ifdef CONFIG_CPU_IDLE |
309 | static int sh7372_do_idle_core_standby(unsigned long unused) | ||
473 | { | 310 | { |
474 | sh7372_intca_suspend(); | 311 | cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */ |
475 | memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100); | 312 | return 0; |
476 | sh7372_set_reset_vector(SMFRAM); | ||
477 | sh7372_enter_sysc(pllc0_on, 1 << 10); | ||
478 | sh7372_intca_resume(); | ||
479 | } | 313 | } |
480 | 314 | ||
481 | #endif | 315 | static void sh7372_enter_core_standby(void) |
316 | { | ||
317 | sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc)); | ||
482 | 318 | ||
483 | #ifdef CONFIG_CPU_IDLE | 319 | /* enter sleep mode with SYSTBCR to 0x10 */ |
320 | __raw_writel(0x10, SYSTBCR); | ||
321 | cpu_suspend(0, sh7372_do_idle_core_standby); | ||
322 | __raw_writel(0, SYSTBCR); | ||
323 | |||
324 | /* disable reset vector translation */ | ||
325 | __raw_writel(0, SBAR); | ||
326 | } | ||
327 | |||
328 | static void sh7372_enter_a3sm_pll_on(void) | ||
329 | { | ||
330 | sh7372_enter_a3sm_common(1); | ||
331 | } | ||
332 | |||
333 | static void sh7372_enter_a3sm_pll_off(void) | ||
334 | { | ||
335 | sh7372_enter_a3sm_common(0); | ||
336 | } | ||
484 | 337 | ||
485 | static void sh7372_cpuidle_setup(struct cpuidle_driver *drv) | 338 | static void sh7372_cpuidle_setup(struct cpuidle_driver *drv) |
486 | { | 339 | { |
@@ -492,7 +345,24 @@ static void sh7372_cpuidle_setup(struct cpuidle_driver *drv) | |||
492 | state->target_residency = 20 + 10; | 345 | state->target_residency = 20 + 10; |
493 | state->flags = CPUIDLE_FLAG_TIME_VALID; | 346 | state->flags = CPUIDLE_FLAG_TIME_VALID; |
494 | shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby; | 347 | shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_core_standby; |
348 | drv->state_count++; | ||
349 | |||
350 | state = &drv->states[drv->state_count]; | ||
351 | snprintf(state->name, CPUIDLE_NAME_LEN, "C3"); | ||
352 | strncpy(state->desc, "A3SM PLL ON", CPUIDLE_DESC_LEN); | ||
353 | state->exit_latency = 20; | ||
354 | state->target_residency = 30 + 20; | ||
355 | state->flags = CPUIDLE_FLAG_TIME_VALID; | ||
356 | shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_on; | ||
357 | drv->state_count++; | ||
495 | 358 | ||
359 | state = &drv->states[drv->state_count]; | ||
360 | snprintf(state->name, CPUIDLE_NAME_LEN, "C4"); | ||
361 | strncpy(state->desc, "A3SM PLL OFF", CPUIDLE_DESC_LEN); | ||
362 | state->exit_latency = 120; | ||
363 | state->target_residency = 30 + 120; | ||
364 | state->flags = CPUIDLE_FLAG_TIME_VALID; | ||
365 | shmobile_cpuidle_modes[drv->state_count] = sh7372_enter_a3sm_pll_off; | ||
496 | drv->state_count++; | 366 | drv->state_count++; |
497 | } | 367 | } |
498 | 368 | ||
@@ -505,6 +375,14 @@ static void sh7372_cpuidle_init(void) {} | |||
505 | #endif | 375 | #endif |
506 | 376 | ||
507 | #ifdef CONFIG_SUSPEND | 377 | #ifdef CONFIG_SUSPEND |
378 | static void sh7372_enter_a4s_common(int pllc0_on) | ||
379 | { | ||
380 | sh7372_intca_suspend(); | ||
381 | memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100); | ||
382 | sh7372_set_reset_vector(SMFRAM); | ||
383 | sh7372_enter_sysc(pllc0_on, 1 << 10); | ||
384 | sh7372_intca_resume(); | ||
385 | } | ||
508 | 386 | ||
509 | static int sh7372_enter_suspend(suspend_state_t suspend_state) | 387 | static int sh7372_enter_suspend(suspend_state_t suspend_state) |
510 | { | 388 | { |
@@ -512,24 +390,21 @@ static int sh7372_enter_suspend(suspend_state_t suspend_state) | |||
512 | 390 | ||
513 | /* check active clocks to determine potential wakeup sources */ | 391 | /* check active clocks to determine potential wakeup sources */ |
514 | if (sh7372_sysc_valid(&msk, &msk2)) { | 392 | if (sh7372_sysc_valid(&msk, &msk2)) { |
515 | /* convert INTC mask and sense to SYSC mask and sense */ | ||
516 | sh7372_setup_sysc(msk, msk2); | ||
517 | |||
518 | if (!console_suspend_enabled && | 393 | if (!console_suspend_enabled && |
519 | sh7372_a4s.genpd.status == GPD_STATE_POWER_OFF) { | 394 | sh7372_pd_a4s.genpd.status == GPD_STATE_POWER_OFF) { |
395 | /* convert INTC mask/sense to SYSC mask/sense */ | ||
396 | sh7372_setup_sysc(msk, msk2); | ||
397 | |||
520 | /* enter A4S sleep with PLLC0 off */ | 398 | /* enter A4S sleep with PLLC0 off */ |
521 | pr_debug("entering A4S\n"); | 399 | pr_debug("entering A4S\n"); |
522 | sh7372_enter_a4s_common(0); | 400 | sh7372_enter_a4s_common(0); |
523 | } else { | 401 | return 0; |
524 | /* enter A3SM sleep with PLLC0 off */ | ||
525 | pr_debug("entering A3SM\n"); | ||
526 | sh7372_enter_a3sm_common(0); | ||
527 | } | 402 | } |
528 | } else { | ||
529 | /* default to Core Standby that supports all wakeup sources */ | ||
530 | pr_debug("entering Core Standby\n"); | ||
531 | sh7372_enter_core_standby(); | ||
532 | } | 403 | } |
404 | |||
405 | /* default to enter A3SM sleep with PLLC0 off */ | ||
406 | pr_debug("entering A3SM\n"); | ||
407 | sh7372_enter_a3sm_common(0); | ||
533 | return 0; | 408 | return 0; |
534 | } | 409 | } |
535 | 410 | ||
@@ -550,7 +425,7 @@ static int sh7372_pm_notifier_fn(struct notifier_block *notifier, | |||
550 | * executed during system suspend and resume, respectively, so | 425 | * executed during system suspend and resume, respectively, so |
551 | * that those functions don't crash while accessing the INTCS. | 426 | * that those functions don't crash while accessing the INTCS. |
552 | */ | 427 | */ |
553 | pm_genpd_poweron(&sh7372_a4r.genpd); | 428 | pm_genpd_poweron(&sh7372_pd_a4r.genpd); |
554 | break; | 429 | break; |
555 | case PM_POST_SUSPEND: | 430 | case PM_POST_SUSPEND: |
556 | pm_genpd_poweroff_unused(); | 431 | pm_genpd_poweroff_unused(); |
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index ec4eb49c1693..78948a9dba0e 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c | |||
@@ -23,9 +23,14 @@ | |||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/of_platform.h> | ||
26 | #include <linux/serial_sci.h> | 27 | #include <linux/serial_sci.h> |
28 | #include <linux/sh_dma.h> | ||
27 | #include <linux/sh_timer.h> | 29 | #include <linux/sh_timer.h> |
30 | #include <linux/dma-mapping.h> | ||
31 | #include <mach/dma-register.h> | ||
28 | #include <mach/r8a7740.h> | 32 | #include <mach/r8a7740.h> |
33 | #include <mach/pm-rmobile.h> | ||
29 | #include <mach/common.h> | 34 | #include <mach/common.h> |
30 | #include <mach/irqs.h> | 35 | #include <mach/irqs.h> |
31 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
@@ -276,6 +281,272 @@ static struct platform_device *r8a7740_early_devices[] __initdata = { | |||
276 | &cmt10_device, | 281 | &cmt10_device, |
277 | }; | 282 | }; |
278 | 283 | ||
284 | /* DMA */ | ||
285 | static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = { | ||
286 | { | ||
287 | .slave_id = SHDMA_SLAVE_SDHI0_TX, | ||
288 | .addr = 0xe6850030, | ||
289 | .chcr = CHCR_TX(XMIT_SZ_16BIT), | ||
290 | .mid_rid = 0xc1, | ||
291 | }, { | ||
292 | .slave_id = SHDMA_SLAVE_SDHI0_RX, | ||
293 | .addr = 0xe6850030, | ||
294 | .chcr = CHCR_RX(XMIT_SZ_16BIT), | ||
295 | .mid_rid = 0xc2, | ||
296 | }, { | ||
297 | .slave_id = SHDMA_SLAVE_SDHI1_TX, | ||
298 | .addr = 0xe6860030, | ||
299 | .chcr = CHCR_TX(XMIT_SZ_16BIT), | ||
300 | .mid_rid = 0xc9, | ||
301 | }, { | ||
302 | .slave_id = SHDMA_SLAVE_SDHI1_RX, | ||
303 | .addr = 0xe6860030, | ||
304 | .chcr = CHCR_RX(XMIT_SZ_16BIT), | ||
305 | .mid_rid = 0xca, | ||
306 | }, { | ||
307 | .slave_id = SHDMA_SLAVE_SDHI2_TX, | ||
308 | .addr = 0xe6870030, | ||
309 | .chcr = CHCR_TX(XMIT_SZ_16BIT), | ||
310 | .mid_rid = 0xcd, | ||
311 | }, { | ||
312 | .slave_id = SHDMA_SLAVE_SDHI2_RX, | ||
313 | .addr = 0xe6870030, | ||
314 | .chcr = CHCR_RX(XMIT_SZ_16BIT), | ||
315 | .mid_rid = 0xce, | ||
316 | }, { | ||
317 | .slave_id = SHDMA_SLAVE_FSIA_TX, | ||
318 | .addr = 0xfe1f0024, | ||
319 | .chcr = CHCR_TX(XMIT_SZ_32BIT), | ||
320 | .mid_rid = 0xb1, | ||
321 | }, { | ||
322 | .slave_id = SHDMA_SLAVE_FSIA_RX, | ||
323 | .addr = 0xfe1f0020, | ||
324 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
325 | .mid_rid = 0xb2, | ||
326 | }, { | ||
327 | .slave_id = SHDMA_SLAVE_FSIB_TX, | ||
328 | .addr = 0xfe1f0064, | ||
329 | .chcr = CHCR_TX(XMIT_SZ_32BIT), | ||
330 | .mid_rid = 0xb5, | ||
331 | }, | ||
332 | }; | ||
333 | |||
334 | #define DMA_CHANNEL(a, b, c) \ | ||
335 | { \ | ||
336 | .offset = a, \ | ||
337 | .dmars = b, \ | ||
338 | .dmars_bit = c, \ | ||
339 | .chclr_offset = (0x220 - 0x20) + a \ | ||
340 | } | ||
341 | |||
342 | static const struct sh_dmae_channel r8a7740_dmae_channels[] = { | ||
343 | DMA_CHANNEL(0x00, 0, 0), | ||
344 | DMA_CHANNEL(0x10, 0, 8), | ||
345 | DMA_CHANNEL(0x20, 4, 0), | ||
346 | DMA_CHANNEL(0x30, 4, 8), | ||
347 | DMA_CHANNEL(0x50, 8, 0), | ||
348 | DMA_CHANNEL(0x60, 8, 8), | ||
349 | }; | ||
350 | |||
351 | static struct sh_dmae_pdata dma_platform_data = { | ||
352 | .slave = r8a7740_dmae_slaves, | ||
353 | .slave_num = ARRAY_SIZE(r8a7740_dmae_slaves), | ||
354 | .channel = r8a7740_dmae_channels, | ||
355 | .channel_num = ARRAY_SIZE(r8a7740_dmae_channels), | ||
356 | .ts_low_shift = TS_LOW_SHIFT, | ||
357 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, | ||
358 | .ts_high_shift = TS_HI_SHIFT, | ||
359 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, | ||
360 | .ts_shift = dma_ts_shift, | ||
361 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), | ||
362 | .dmaor_init = DMAOR_DME, | ||
363 | .chclr_present = 1, | ||
364 | }; | ||
365 | |||
366 | /* Resource order important! */ | ||
367 | static struct resource r8a7740_dmae0_resources[] = { | ||
368 | { | ||
369 | /* Channel registers and DMAOR */ | ||
370 | .start = 0xfe008020, | ||
371 | .end = 0xfe00828f, | ||
372 | .flags = IORESOURCE_MEM, | ||
373 | }, | ||
374 | { | ||
375 | /* DMARSx */ | ||
376 | .start = 0xfe009000, | ||
377 | .end = 0xfe00900b, | ||
378 | .flags = IORESOURCE_MEM, | ||
379 | }, | ||
380 | { | ||
381 | .name = "error_irq", | ||
382 | .start = evt2irq(0x20c0), | ||
383 | .end = evt2irq(0x20c0), | ||
384 | .flags = IORESOURCE_IRQ, | ||
385 | }, | ||
386 | { | ||
387 | /* IRQ for channels 0-5 */ | ||
388 | .start = evt2irq(0x2000), | ||
389 | .end = evt2irq(0x20a0), | ||
390 | .flags = IORESOURCE_IRQ, | ||
391 | }, | ||
392 | }; | ||
393 | |||
394 | /* Resource order important! */ | ||
395 | static struct resource r8a7740_dmae1_resources[] = { | ||
396 | { | ||
397 | /* Channel registers and DMAOR */ | ||
398 | .start = 0xfe018020, | ||
399 | .end = 0xfe01828f, | ||
400 | .flags = IORESOURCE_MEM, | ||
401 | }, | ||
402 | { | ||
403 | /* DMARSx */ | ||
404 | .start = 0xfe019000, | ||
405 | .end = 0xfe01900b, | ||
406 | .flags = IORESOURCE_MEM, | ||
407 | }, | ||
408 | { | ||
409 | .name = "error_irq", | ||
410 | .start = evt2irq(0x21c0), | ||
411 | .end = evt2irq(0x21c0), | ||
412 | .flags = IORESOURCE_IRQ, | ||
413 | }, | ||
414 | { | ||
415 | /* IRQ for channels 0-5 */ | ||
416 | .start = evt2irq(0x2100), | ||
417 | .end = evt2irq(0x21a0), | ||
418 | .flags = IORESOURCE_IRQ, | ||
419 | }, | ||
420 | }; | ||
421 | |||
422 | /* Resource order important! */ | ||
423 | static struct resource r8a7740_dmae2_resources[] = { | ||
424 | { | ||
425 | /* Channel registers and DMAOR */ | ||
426 | .start = 0xfe028020, | ||
427 | .end = 0xfe02828f, | ||
428 | .flags = IORESOURCE_MEM, | ||
429 | }, | ||
430 | { | ||
431 | /* DMARSx */ | ||
432 | .start = 0xfe029000, | ||
433 | .end = 0xfe02900b, | ||
434 | .flags = IORESOURCE_MEM, | ||
435 | }, | ||
436 | { | ||
437 | .name = "error_irq", | ||
438 | .start = evt2irq(0x22c0), | ||
439 | .end = evt2irq(0x22c0), | ||
440 | .flags = IORESOURCE_IRQ, | ||
441 | }, | ||
442 | { | ||
443 | /* IRQ for channels 0-5 */ | ||
444 | .start = evt2irq(0x2200), | ||
445 | .end = evt2irq(0x22a0), | ||
446 | .flags = IORESOURCE_IRQ, | ||
447 | }, | ||
448 | }; | ||
449 | |||
450 | static struct platform_device dma0_device = { | ||
451 | .name = "sh-dma-engine", | ||
452 | .id = 0, | ||
453 | .resource = r8a7740_dmae0_resources, | ||
454 | .num_resources = ARRAY_SIZE(r8a7740_dmae0_resources), | ||
455 | .dev = { | ||
456 | .platform_data = &dma_platform_data, | ||
457 | }, | ||
458 | }; | ||
459 | |||
460 | static struct platform_device dma1_device = { | ||
461 | .name = "sh-dma-engine", | ||
462 | .id = 1, | ||
463 | .resource = r8a7740_dmae1_resources, | ||
464 | .num_resources = ARRAY_SIZE(r8a7740_dmae1_resources), | ||
465 | .dev = { | ||
466 | .platform_data = &dma_platform_data, | ||
467 | }, | ||
468 | }; | ||
469 | |||
470 | static struct platform_device dma2_device = { | ||
471 | .name = "sh-dma-engine", | ||
472 | .id = 2, | ||
473 | .resource = r8a7740_dmae2_resources, | ||
474 | .num_resources = ARRAY_SIZE(r8a7740_dmae2_resources), | ||
475 | .dev = { | ||
476 | .platform_data = &dma_platform_data, | ||
477 | }, | ||
478 | }; | ||
479 | |||
480 | /* USB-DMAC */ | ||
481 | static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = { | ||
482 | { | ||
483 | .offset = 0, | ||
484 | }, { | ||
485 | .offset = 0x20, | ||
486 | }, | ||
487 | }; | ||
488 | |||
489 | static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = { | ||
490 | { | ||
491 | .slave_id = SHDMA_SLAVE_USBHS_TX, | ||
492 | .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE), | ||
493 | }, { | ||
494 | .slave_id = SHDMA_SLAVE_USBHS_RX, | ||
495 | .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE), | ||
496 | }, | ||
497 | }; | ||
498 | |||
499 | static struct sh_dmae_pdata usb_dma_platform_data = { | ||
500 | .slave = r8a7740_usb_dma_slaves, | ||
501 | .slave_num = ARRAY_SIZE(r8a7740_usb_dma_slaves), | ||
502 | .channel = r8a7740_usb_dma_channels, | ||
503 | .channel_num = ARRAY_SIZE(r8a7740_usb_dma_channels), | ||
504 | .ts_low_shift = USBTS_LOW_SHIFT, | ||
505 | .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT, | ||
506 | .ts_high_shift = USBTS_HI_SHIFT, | ||
507 | .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT, | ||
508 | .ts_shift = dma_usbts_shift, | ||
509 | .ts_shift_num = ARRAY_SIZE(dma_usbts_shift), | ||
510 | .dmaor_init = DMAOR_DME, | ||
511 | .chcr_offset = 0x14, | ||
512 | .chcr_ie_bit = 1 << 5, | ||
513 | .dmaor_is_32bit = 1, | ||
514 | .needs_tend_set = 1, | ||
515 | .no_dmars = 1, | ||
516 | .slave_only = 1, | ||
517 | }; | ||
518 | |||
519 | static struct resource r8a7740_usb_dma_resources[] = { | ||
520 | { | ||
521 | /* Channel registers and DMAOR */ | ||
522 | .start = 0xe68a0020, | ||
523 | .end = 0xe68a0064 - 1, | ||
524 | .flags = IORESOURCE_MEM, | ||
525 | }, | ||
526 | { | ||
527 | /* VCR/SWR/DMICR */ | ||
528 | .start = 0xe68a0000, | ||
529 | .end = 0xe68a0014 - 1, | ||
530 | .flags = IORESOURCE_MEM, | ||
531 | }, | ||
532 | { | ||
533 | /* IRQ for channels */ | ||
534 | .start = evt2irq(0x0a00), | ||
535 | .end = evt2irq(0x0a00), | ||
536 | .flags = IORESOURCE_IRQ, | ||
537 | }, | ||
538 | }; | ||
539 | |||
540 | static struct platform_device usb_dma_device = { | ||
541 | .name = "sh-dma-engine", | ||
542 | .id = 3, | ||
543 | .resource = r8a7740_usb_dma_resources, | ||
544 | .num_resources = ARRAY_SIZE(r8a7740_usb_dma_resources), | ||
545 | .dev = { | ||
546 | .platform_data = &usb_dma_platform_data, | ||
547 | }, | ||
548 | }; | ||
549 | |||
279 | /* I2C */ | 550 | /* I2C */ |
280 | static struct resource i2c0_resources[] = { | 551 | static struct resource i2c0_resources[] = { |
281 | [0] = { | 552 | [0] = { |
@@ -322,8 +593,30 @@ static struct platform_device i2c1_device = { | |||
322 | static struct platform_device *r8a7740_late_devices[] __initdata = { | 593 | static struct platform_device *r8a7740_late_devices[] __initdata = { |
323 | &i2c0_device, | 594 | &i2c0_device, |
324 | &i2c1_device, | 595 | &i2c1_device, |
596 | &dma0_device, | ||
597 | &dma1_device, | ||
598 | &dma2_device, | ||
599 | &usb_dma_device, | ||
325 | }; | 600 | }; |
326 | 601 | ||
602 | /* | ||
603 | * r8a7740 chip has lasting errata on MERAM buffer. | ||
604 | * this is work-around for it. | ||
605 | * see | ||
606 | * "Media RAM (MERAM)" on r8a7740 documentation | ||
607 | */ | ||
608 | #define MEBUFCNTR 0xFE950098 | ||
609 | void r8a7740_meram_workaround(void) | ||
610 | { | ||
611 | void __iomem *reg; | ||
612 | |||
613 | reg = ioremap_nocache(MEBUFCNTR, 4); | ||
614 | if (reg) { | ||
615 | iowrite32(0x01600164, reg); | ||
616 | iounmap(reg); | ||
617 | } | ||
618 | } | ||
619 | |||
327 | #define ICCR 0x0004 | 620 | #define ICCR 0x0004 |
328 | #define ICSTART 0x0070 | 621 | #define ICSTART 0x0070 |
329 | 622 | ||
@@ -380,10 +673,31 @@ void __init r8a7740_add_standard_devices(void) | |||
380 | r8a7740_i2c_workaround(&i2c0_device); | 673 | r8a7740_i2c_workaround(&i2c0_device); |
381 | r8a7740_i2c_workaround(&i2c1_device); | 674 | r8a7740_i2c_workaround(&i2c1_device); |
382 | 675 | ||
676 | /* PM domain */ | ||
677 | rmobile_init_pm_domain(&r8a7740_pd_a4s); | ||
678 | rmobile_init_pm_domain(&r8a7740_pd_a3sp); | ||
679 | rmobile_init_pm_domain(&r8a7740_pd_a4lc); | ||
680 | |||
681 | rmobile_pm_add_subdomain(&r8a7740_pd_a4s, &r8a7740_pd_a3sp); | ||
682 | |||
683 | /* add devices */ | ||
383 | platform_add_devices(r8a7740_early_devices, | 684 | platform_add_devices(r8a7740_early_devices, |
384 | ARRAY_SIZE(r8a7740_early_devices)); | 685 | ARRAY_SIZE(r8a7740_early_devices)); |
385 | platform_add_devices(r8a7740_late_devices, | 686 | platform_add_devices(r8a7740_late_devices, |
386 | ARRAY_SIZE(r8a7740_late_devices)); | 687 | ARRAY_SIZE(r8a7740_late_devices)); |
688 | |||
689 | /* add devices to PM domain */ | ||
690 | |||
691 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif0_device); | ||
692 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif1_device); | ||
693 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif2_device); | ||
694 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif3_device); | ||
695 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif4_device); | ||
696 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif5_device); | ||
697 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif6_device); | ||
698 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scif7_device); | ||
699 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &scifb_device); | ||
700 | rmobile_add_device_to_domain(&r8a7740_pd_a3sp, &i2c1_device); | ||
387 | } | 701 | } |
388 | 702 | ||
389 | static void __init r8a7740_earlytimer_init(void) | 703 | static void __init r8a7740_earlytimer_init(void) |
@@ -403,3 +717,49 @@ void __init r8a7740_add_early_devices(void) | |||
403 | /* override timer setup with soc-specific code */ | 717 | /* override timer setup with soc-specific code */ |
404 | shmobile_timer.init = r8a7740_earlytimer_init; | 718 | shmobile_timer.init = r8a7740_earlytimer_init; |
405 | } | 719 | } |
720 | |||
721 | #ifdef CONFIG_USE_OF | ||
722 | |||
723 | void __init r8a7740_add_early_devices_dt(void) | ||
724 | { | ||
725 | shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */ | ||
726 | |||
727 | early_platform_add_devices(r8a7740_early_devices, | ||
728 | ARRAY_SIZE(r8a7740_early_devices)); | ||
729 | |||
730 | /* setup early console here as well */ | ||
731 | shmobile_setup_console(); | ||
732 | } | ||
733 | |||
734 | static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = { | ||
735 | { } | ||
736 | }; | ||
737 | |||
738 | void __init r8a7740_add_standard_devices_dt(void) | ||
739 | { | ||
740 | /* clocks are setup late during boot in the case of DT */ | ||
741 | r8a7740_clock_init(0); | ||
742 | |||
743 | platform_add_devices(r8a7740_early_devices, | ||
744 | ARRAY_SIZE(r8a7740_early_devices)); | ||
745 | |||
746 | of_platform_populate(NULL, of_default_bus_match_table, | ||
747 | r8a7740_auxdata_lookup, NULL); | ||
748 | } | ||
749 | |||
750 | static const char *r8a7740_boards_compat_dt[] __initdata = { | ||
751 | "renesas,r8a7740", | ||
752 | NULL, | ||
753 | }; | ||
754 | |||
755 | DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)") | ||
756 | .map_io = r8a7740_map_io, | ||
757 | .init_early = r8a7740_add_early_devices_dt, | ||
758 | .init_irq = r8a7740_init_irq, | ||
759 | .handle_irq = shmobile_handle_irq_intc, | ||
760 | .init_machine = r8a7740_add_standard_devices_dt, | ||
761 | .timer = &shmobile_timer, | ||
762 | .dt_compat = r8a7740_boards_compat_dt, | ||
763 | MACHINE_END | ||
764 | |||
765 | #endif /* CONFIG_USE_OF */ | ||
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index fafce9ce8218..838a87be1d5c 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/sh_timer.h> | 33 | #include <linux/sh_timer.h> |
34 | #include <linux/pm_domain.h> | 34 | #include <linux/pm_domain.h> |
35 | #include <linux/dma-mapping.h> | 35 | #include <linux/dma-mapping.h> |
36 | #include <mach/dma-register.h> | ||
36 | #include <mach/hardware.h> | 37 | #include <mach/hardware.h> |
37 | #include <mach/irqs.h> | 38 | #include <mach/irqs.h> |
38 | #include <mach/sh7372.h> | 39 | #include <mach/sh7372.h> |
@@ -335,151 +336,126 @@ static struct platform_device iic1_device = { | |||
335 | }; | 336 | }; |
336 | 337 | ||
337 | /* DMA */ | 338 | /* DMA */ |
338 | /* Transmit sizes and respective CHCR register values */ | ||
339 | enum { | ||
340 | XMIT_SZ_8BIT = 0, | ||
341 | XMIT_SZ_16BIT = 1, | ||
342 | XMIT_SZ_32BIT = 2, | ||
343 | XMIT_SZ_64BIT = 7, | ||
344 | XMIT_SZ_128BIT = 3, | ||
345 | XMIT_SZ_256BIT = 4, | ||
346 | XMIT_SZ_512BIT = 5, | ||
347 | }; | ||
348 | |||
349 | /* log2(size / 8) - used to calculate number of transfers */ | ||
350 | #define TS_SHIFT { \ | ||
351 | [XMIT_SZ_8BIT] = 0, \ | ||
352 | [XMIT_SZ_16BIT] = 1, \ | ||
353 | [XMIT_SZ_32BIT] = 2, \ | ||
354 | [XMIT_SZ_64BIT] = 3, \ | ||
355 | [XMIT_SZ_128BIT] = 4, \ | ||
356 | [XMIT_SZ_256BIT] = 5, \ | ||
357 | [XMIT_SZ_512BIT] = 6, \ | ||
358 | } | ||
359 | |||
360 | #define TS_INDEX2VAL(i) ((((i) & 3) << 3) | \ | ||
361 | (((i) & 0xc) << (20 - 2))) | ||
362 | |||
363 | static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = { | 339 | static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = { |
364 | { | 340 | { |
365 | .slave_id = SHDMA_SLAVE_SCIF0_TX, | 341 | .slave_id = SHDMA_SLAVE_SCIF0_TX, |
366 | .addr = 0xe6c40020, | 342 | .addr = 0xe6c40020, |
367 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 343 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
368 | .mid_rid = 0x21, | 344 | .mid_rid = 0x21, |
369 | }, { | 345 | }, { |
370 | .slave_id = SHDMA_SLAVE_SCIF0_RX, | 346 | .slave_id = SHDMA_SLAVE_SCIF0_RX, |
371 | .addr = 0xe6c40024, | 347 | .addr = 0xe6c40024, |
372 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 348 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
373 | .mid_rid = 0x22, | 349 | .mid_rid = 0x22, |
374 | }, { | 350 | }, { |
375 | .slave_id = SHDMA_SLAVE_SCIF1_TX, | 351 | .slave_id = SHDMA_SLAVE_SCIF1_TX, |
376 | .addr = 0xe6c50020, | 352 | .addr = 0xe6c50020, |
377 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 353 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
378 | .mid_rid = 0x25, | 354 | .mid_rid = 0x25, |
379 | }, { | 355 | }, { |
380 | .slave_id = SHDMA_SLAVE_SCIF1_RX, | 356 | .slave_id = SHDMA_SLAVE_SCIF1_RX, |
381 | .addr = 0xe6c50024, | 357 | .addr = 0xe6c50024, |
382 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 358 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
383 | .mid_rid = 0x26, | 359 | .mid_rid = 0x26, |
384 | }, { | 360 | }, { |
385 | .slave_id = SHDMA_SLAVE_SCIF2_TX, | 361 | .slave_id = SHDMA_SLAVE_SCIF2_TX, |
386 | .addr = 0xe6c60020, | 362 | .addr = 0xe6c60020, |
387 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 363 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
388 | .mid_rid = 0x29, | 364 | .mid_rid = 0x29, |
389 | }, { | 365 | }, { |
390 | .slave_id = SHDMA_SLAVE_SCIF2_RX, | 366 | .slave_id = SHDMA_SLAVE_SCIF2_RX, |
391 | .addr = 0xe6c60024, | 367 | .addr = 0xe6c60024, |
392 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 368 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
393 | .mid_rid = 0x2a, | 369 | .mid_rid = 0x2a, |
394 | }, { | 370 | }, { |
395 | .slave_id = SHDMA_SLAVE_SCIF3_TX, | 371 | .slave_id = SHDMA_SLAVE_SCIF3_TX, |
396 | .addr = 0xe6c70020, | 372 | .addr = 0xe6c70020, |
397 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 373 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
398 | .mid_rid = 0x2d, | 374 | .mid_rid = 0x2d, |
399 | }, { | 375 | }, { |
400 | .slave_id = SHDMA_SLAVE_SCIF3_RX, | 376 | .slave_id = SHDMA_SLAVE_SCIF3_RX, |
401 | .addr = 0xe6c70024, | 377 | .addr = 0xe6c70024, |
402 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 378 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
403 | .mid_rid = 0x2e, | 379 | .mid_rid = 0x2e, |
404 | }, { | 380 | }, { |
405 | .slave_id = SHDMA_SLAVE_SCIF4_TX, | 381 | .slave_id = SHDMA_SLAVE_SCIF4_TX, |
406 | .addr = 0xe6c80020, | 382 | .addr = 0xe6c80020, |
407 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 383 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
408 | .mid_rid = 0x39, | 384 | .mid_rid = 0x39, |
409 | }, { | 385 | }, { |
410 | .slave_id = SHDMA_SLAVE_SCIF4_RX, | 386 | .slave_id = SHDMA_SLAVE_SCIF4_RX, |
411 | .addr = 0xe6c80024, | 387 | .addr = 0xe6c80024, |
412 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 388 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
413 | .mid_rid = 0x3a, | 389 | .mid_rid = 0x3a, |
414 | }, { | 390 | }, { |
415 | .slave_id = SHDMA_SLAVE_SCIF5_TX, | 391 | .slave_id = SHDMA_SLAVE_SCIF5_TX, |
416 | .addr = 0xe6cb0020, | 392 | .addr = 0xe6cb0020, |
417 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 393 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
418 | .mid_rid = 0x35, | 394 | .mid_rid = 0x35, |
419 | }, { | 395 | }, { |
420 | .slave_id = SHDMA_SLAVE_SCIF5_RX, | 396 | .slave_id = SHDMA_SLAVE_SCIF5_RX, |
421 | .addr = 0xe6cb0024, | 397 | .addr = 0xe6cb0024, |
422 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 398 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
423 | .mid_rid = 0x36, | 399 | .mid_rid = 0x36, |
424 | }, { | 400 | }, { |
425 | .slave_id = SHDMA_SLAVE_SCIF6_TX, | 401 | .slave_id = SHDMA_SLAVE_SCIF6_TX, |
426 | .addr = 0xe6c30040, | 402 | .addr = 0xe6c30040, |
427 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 403 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
428 | .mid_rid = 0x3d, | 404 | .mid_rid = 0x3d, |
429 | }, { | 405 | }, { |
430 | .slave_id = SHDMA_SLAVE_SCIF6_RX, | 406 | .slave_id = SHDMA_SLAVE_SCIF6_RX, |
431 | .addr = 0xe6c30060, | 407 | .addr = 0xe6c30060, |
432 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 408 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
433 | .mid_rid = 0x3e, | 409 | .mid_rid = 0x3e, |
434 | }, { | 410 | }, { |
435 | .slave_id = SHDMA_SLAVE_SDHI0_TX, | 411 | .slave_id = SHDMA_SLAVE_SDHI0_TX, |
436 | .addr = 0xe6850030, | 412 | .addr = 0xe6850030, |
437 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | 413 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
438 | .mid_rid = 0xc1, | 414 | .mid_rid = 0xc1, |
439 | }, { | 415 | }, { |
440 | .slave_id = SHDMA_SLAVE_SDHI0_RX, | 416 | .slave_id = SHDMA_SLAVE_SDHI0_RX, |
441 | .addr = 0xe6850030, | 417 | .addr = 0xe6850030, |
442 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | 418 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
443 | .mid_rid = 0xc2, | 419 | .mid_rid = 0xc2, |
444 | }, { | 420 | }, { |
445 | .slave_id = SHDMA_SLAVE_SDHI1_TX, | 421 | .slave_id = SHDMA_SLAVE_SDHI1_TX, |
446 | .addr = 0xe6860030, | 422 | .addr = 0xe6860030, |
447 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | 423 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
448 | .mid_rid = 0xc9, | 424 | .mid_rid = 0xc9, |
449 | }, { | 425 | }, { |
450 | .slave_id = SHDMA_SLAVE_SDHI1_RX, | 426 | .slave_id = SHDMA_SLAVE_SDHI1_RX, |
451 | .addr = 0xe6860030, | 427 | .addr = 0xe6860030, |
452 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | 428 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
453 | .mid_rid = 0xca, | 429 | .mid_rid = 0xca, |
454 | }, { | 430 | }, { |
455 | .slave_id = SHDMA_SLAVE_SDHI2_TX, | 431 | .slave_id = SHDMA_SLAVE_SDHI2_TX, |
456 | .addr = 0xe6870030, | 432 | .addr = 0xe6870030, |
457 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | 433 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
458 | .mid_rid = 0xcd, | 434 | .mid_rid = 0xcd, |
459 | }, { | 435 | }, { |
460 | .slave_id = SHDMA_SLAVE_SDHI2_RX, | 436 | .slave_id = SHDMA_SLAVE_SDHI2_RX, |
461 | .addr = 0xe6870030, | 437 | .addr = 0xe6870030, |
462 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT), | 438 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
463 | .mid_rid = 0xce, | 439 | .mid_rid = 0xce, |
464 | }, { | 440 | }, { |
465 | .slave_id = SHDMA_SLAVE_FSIA_TX, | 441 | .slave_id = SHDMA_SLAVE_FSIA_TX, |
466 | .addr = 0xfe1f0024, | 442 | .addr = 0xfe1f0024, |
467 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), | 443 | .chcr = CHCR_TX(XMIT_SZ_32BIT), |
468 | .mid_rid = 0xb1, | 444 | .mid_rid = 0xb1, |
469 | }, { | 445 | }, { |
470 | .slave_id = SHDMA_SLAVE_FSIA_RX, | 446 | .slave_id = SHDMA_SLAVE_FSIA_RX, |
471 | .addr = 0xfe1f0020, | 447 | .addr = 0xfe1f0020, |
472 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), | 448 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
473 | .mid_rid = 0xb2, | 449 | .mid_rid = 0xb2, |
474 | }, { | 450 | }, { |
475 | .slave_id = SHDMA_SLAVE_MMCIF_TX, | 451 | .slave_id = SHDMA_SLAVE_MMCIF_TX, |
476 | .addr = 0xe6bd0034, | 452 | .addr = 0xe6bd0034, |
477 | .chcr = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), | 453 | .chcr = CHCR_TX(XMIT_SZ_32BIT), |
478 | .mid_rid = 0xd1, | 454 | .mid_rid = 0xd1, |
479 | }, { | 455 | }, { |
480 | .slave_id = SHDMA_SLAVE_MMCIF_RX, | 456 | .slave_id = SHDMA_SLAVE_MMCIF_RX, |
481 | .addr = 0xe6bd0034, | 457 | .addr = 0xe6bd0034, |
482 | .chcr = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT), | 458 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
483 | .mid_rid = 0xd2, | 459 | .mid_rid = 0xd2, |
484 | }, | 460 | }, |
485 | }; | 461 | }; |
@@ -520,19 +496,17 @@ static const struct sh_dmae_channel sh7372_dmae_channels[] = { | |||
520 | } | 496 | } |
521 | }; | 497 | }; |
522 | 498 | ||
523 | static const unsigned int ts_shift[] = TS_SHIFT; | ||
524 | |||
525 | static struct sh_dmae_pdata dma_platform_data = { | 499 | static struct sh_dmae_pdata dma_platform_data = { |
526 | .slave = sh7372_dmae_slaves, | 500 | .slave = sh7372_dmae_slaves, |
527 | .slave_num = ARRAY_SIZE(sh7372_dmae_slaves), | 501 | .slave_num = ARRAY_SIZE(sh7372_dmae_slaves), |
528 | .channel = sh7372_dmae_channels, | 502 | .channel = sh7372_dmae_channels, |
529 | .channel_num = ARRAY_SIZE(sh7372_dmae_channels), | 503 | .channel_num = ARRAY_SIZE(sh7372_dmae_channels), |
530 | .ts_low_shift = 3, | 504 | .ts_low_shift = TS_LOW_SHIFT, |
531 | .ts_low_mask = 0x18, | 505 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, |
532 | .ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */ | 506 | .ts_high_shift = TS_HI_SHIFT, |
533 | .ts_high_mask = 0x00300000, | 507 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, |
534 | .ts_shift = ts_shift, | 508 | .ts_shift = dma_ts_shift, |
535 | .ts_shift_num = ARRAY_SIZE(ts_shift), | 509 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), |
536 | .dmaor_init = DMAOR_DME, | 510 | .dmaor_init = DMAOR_DME, |
537 | .chclr_present = 1, | 511 | .chclr_present = 1, |
538 | }; | 512 | }; |
@@ -654,17 +628,6 @@ static struct platform_device dma2_device = { | |||
654 | /* | 628 | /* |
655 | * USB-DMAC | 629 | * USB-DMAC |
656 | */ | 630 | */ |
657 | |||
658 | unsigned int usbts_shift[] = {3, 4, 5}; | ||
659 | |||
660 | enum { | ||
661 | XMIT_SZ_8BYTE = 0, | ||
662 | XMIT_SZ_16BYTE = 1, | ||
663 | XMIT_SZ_32BYTE = 2, | ||
664 | }; | ||
665 | |||
666 | #define USBTS_INDEX2VAL(i) (((i) & 3) << 6) | ||
667 | |||
668 | static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = { | 631 | static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = { |
669 | { | 632 | { |
670 | .offset = 0, | 633 | .offset = 0, |
@@ -677,10 +640,10 @@ static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = { | |||
677 | static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = { | 640 | static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = { |
678 | { | 641 | { |
679 | .slave_id = SHDMA_SLAVE_USB0_TX, | 642 | .slave_id = SHDMA_SLAVE_USB0_TX, |
680 | .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE), | 643 | .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE), |
681 | }, { | 644 | }, { |
682 | .slave_id = SHDMA_SLAVE_USB0_RX, | 645 | .slave_id = SHDMA_SLAVE_USB0_RX, |
683 | .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE), | 646 | .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE), |
684 | }, | 647 | }, |
685 | }; | 648 | }; |
686 | 649 | ||
@@ -689,12 +652,12 @@ static struct sh_dmae_pdata usb_dma0_platform_data = { | |||
689 | .slave_num = ARRAY_SIZE(sh7372_usb_dmae0_slaves), | 652 | .slave_num = ARRAY_SIZE(sh7372_usb_dmae0_slaves), |
690 | .channel = sh7372_usb_dmae_channels, | 653 | .channel = sh7372_usb_dmae_channels, |
691 | .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels), | 654 | .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels), |
692 | .ts_low_shift = 6, | 655 | .ts_low_shift = USBTS_LOW_SHIFT, |
693 | .ts_low_mask = 0xc0, | 656 | .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT, |
694 | .ts_high_shift = 0, | 657 | .ts_high_shift = USBTS_HI_SHIFT, |
695 | .ts_high_mask = 0, | 658 | .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT, |
696 | .ts_shift = usbts_shift, | 659 | .ts_shift = dma_usbts_shift, |
697 | .ts_shift_num = ARRAY_SIZE(usbts_shift), | 660 | .ts_shift_num = ARRAY_SIZE(dma_usbts_shift), |
698 | .dmaor_init = DMAOR_DME, | 661 | .dmaor_init = DMAOR_DME, |
699 | .chcr_offset = 0x14, | 662 | .chcr_offset = 0x14, |
700 | .chcr_ie_bit = 1 << 5, | 663 | .chcr_ie_bit = 1 << 5, |
@@ -739,10 +702,10 @@ static struct platform_device usb_dma0_device = { | |||
739 | static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = { | 702 | static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = { |
740 | { | 703 | { |
741 | .slave_id = SHDMA_SLAVE_USB1_TX, | 704 | .slave_id = SHDMA_SLAVE_USB1_TX, |
742 | .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE), | 705 | .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE), |
743 | }, { | 706 | }, { |
744 | .slave_id = SHDMA_SLAVE_USB1_RX, | 707 | .slave_id = SHDMA_SLAVE_USB1_RX, |
745 | .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE), | 708 | .chcr = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE), |
746 | }, | 709 | }, |
747 | }; | 710 | }; |
748 | 711 | ||
@@ -751,12 +714,12 @@ static struct sh_dmae_pdata usb_dma1_platform_data = { | |||
751 | .slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves), | 714 | .slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves), |
752 | .channel = sh7372_usb_dmae_channels, | 715 | .channel = sh7372_usb_dmae_channels, |
753 | .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels), | 716 | .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels), |
754 | .ts_low_shift = 6, | 717 | .ts_low_shift = USBTS_LOW_SHIFT, |
755 | .ts_low_mask = 0xc0, | 718 | .ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT, |
756 | .ts_high_shift = 0, | 719 | .ts_high_shift = USBTS_HI_SHIFT, |
757 | .ts_high_mask = 0, | 720 | .ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT, |
758 | .ts_shift = usbts_shift, | 721 | .ts_shift = dma_usbts_shift, |
759 | .ts_shift_num = ARRAY_SIZE(usbts_shift), | 722 | .ts_shift_num = ARRAY_SIZE(dma_usbts_shift), |
760 | .dmaor_init = DMAOR_DME, | 723 | .dmaor_init = DMAOR_DME, |
761 | .chcr_offset = 0x14, | 724 | .chcr_offset = 0x14, |
762 | .chcr_ie_bit = 1 << 5, | 725 | .chcr_ie_bit = 1 << 5, |
@@ -1038,21 +1001,21 @@ static struct platform_device *sh7372_late_devices[] __initdata = { | |||
1038 | 1001 | ||
1039 | void __init sh7372_add_standard_devices(void) | 1002 | void __init sh7372_add_standard_devices(void) |
1040 | { | 1003 | { |
1041 | sh7372_init_pm_domain(&sh7372_a4lc); | 1004 | rmobile_init_pm_domain(&sh7372_pd_a4lc); |
1042 | sh7372_init_pm_domain(&sh7372_a4mp); | 1005 | rmobile_init_pm_domain(&sh7372_pd_a4mp); |
1043 | sh7372_init_pm_domain(&sh7372_d4); | 1006 | rmobile_init_pm_domain(&sh7372_pd_d4); |
1044 | sh7372_init_pm_domain(&sh7372_a4r); | 1007 | rmobile_init_pm_domain(&sh7372_pd_a4r); |
1045 | sh7372_init_pm_domain(&sh7372_a3rv); | 1008 | rmobile_init_pm_domain(&sh7372_pd_a3rv); |
1046 | sh7372_init_pm_domain(&sh7372_a3ri); | 1009 | rmobile_init_pm_domain(&sh7372_pd_a3ri); |
1047 | sh7372_init_pm_domain(&sh7372_a4s); | 1010 | rmobile_init_pm_domain(&sh7372_pd_a4s); |
1048 | sh7372_init_pm_domain(&sh7372_a3sp); | 1011 | rmobile_init_pm_domain(&sh7372_pd_a3sp); |
1049 | sh7372_init_pm_domain(&sh7372_a3sg); | 1012 | rmobile_init_pm_domain(&sh7372_pd_a3sg); |
1050 | 1013 | ||
1051 | sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv); | 1014 | rmobile_pm_add_subdomain(&sh7372_pd_a4lc, &sh7372_pd_a3rv); |
1052 | sh7372_pm_add_subdomain(&sh7372_a4r, &sh7372_a4lc); | 1015 | rmobile_pm_add_subdomain(&sh7372_pd_a4r, &sh7372_pd_a4lc); |
1053 | 1016 | ||
1054 | sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sg); | 1017 | rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sg); |
1055 | sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sp); | 1018 | rmobile_pm_add_subdomain(&sh7372_pd_a4s, &sh7372_pd_a3sp); |
1056 | 1019 | ||
1057 | platform_add_devices(sh7372_early_devices, | 1020 | platform_add_devices(sh7372_early_devices, |
1058 | ARRAY_SIZE(sh7372_early_devices)); | 1021 | ARRAY_SIZE(sh7372_early_devices)); |
@@ -1060,30 +1023,30 @@ void __init sh7372_add_standard_devices(void) | |||
1060 | platform_add_devices(sh7372_late_devices, | 1023 | platform_add_devices(sh7372_late_devices, |
1061 | ARRAY_SIZE(sh7372_late_devices)); | 1024 | ARRAY_SIZE(sh7372_late_devices)); |
1062 | 1025 | ||
1063 | sh7372_add_device_to_domain(&sh7372_a3rv, &vpu_device); | 1026 | rmobile_add_device_to_domain(&sh7372_pd_a3rv, &vpu_device); |
1064 | sh7372_add_device_to_domain(&sh7372_a4mp, &spu0_device); | 1027 | rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu0_device); |
1065 | sh7372_add_device_to_domain(&sh7372_a4mp, &spu1_device); | 1028 | rmobile_add_device_to_domain(&sh7372_pd_a4mp, &spu1_device); |
1066 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif0_device); | 1029 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif0_device); |
1067 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif1_device); | 1030 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif1_device); |
1068 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif2_device); | 1031 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif2_device); |
1069 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif3_device); | 1032 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif3_device); |
1070 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif4_device); | 1033 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif4_device); |
1071 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif5_device); | 1034 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif5_device); |
1072 | sh7372_add_device_to_domain(&sh7372_a3sp, &scif6_device); | 1035 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &scif6_device); |
1073 | sh7372_add_device_to_domain(&sh7372_a3sp, &iic1_device); | 1036 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &iic1_device); |
1074 | sh7372_add_device_to_domain(&sh7372_a3sp, &dma0_device); | 1037 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma0_device); |
1075 | sh7372_add_device_to_domain(&sh7372_a3sp, &dma1_device); | 1038 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma1_device); |
1076 | sh7372_add_device_to_domain(&sh7372_a3sp, &dma2_device); | 1039 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &dma2_device); |
1077 | sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma0_device); | 1040 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma0_device); |
1078 | sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma1_device); | 1041 | rmobile_add_device_to_domain(&sh7372_pd_a3sp, &usb_dma1_device); |
1079 | sh7372_add_device_to_domain(&sh7372_a4r, &iic0_device); | 1042 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &iic0_device); |
1080 | sh7372_add_device_to_domain(&sh7372_a4r, &veu0_device); | 1043 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu0_device); |
1081 | sh7372_add_device_to_domain(&sh7372_a4r, &veu1_device); | 1044 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu1_device); |
1082 | sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device); | 1045 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu2_device); |
1083 | sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device); | 1046 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &veu3_device); |
1084 | sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device); | 1047 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &jpu_device); |
1085 | sh7372_add_device_to_domain(&sh7372_a4r, &tmu00_device); | 1048 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu00_device); |
1086 | sh7372_add_device_to_domain(&sh7372_a4r, &tmu01_device); | 1049 | rmobile_add_device_to_domain(&sh7372_pd_a4r, &tmu01_device); |
1087 | } | 1050 | } |
1088 | 1051 | ||
1089 | static void __init sh7372_earlytimer_init(void) | 1052 | static void __init sh7372_earlytimer_init(void) |
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c index d576a6abbade..855b1506caf8 100644 --- a/arch/arm/mach-shmobile/setup-sh7377.c +++ b/arch/arm/mach-shmobile/setup-sh7377.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/of_platform.h> | ||
25 | #include <linux/uio_driver.h> | 26 | #include <linux/uio_driver.h> |
26 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
27 | #include <linux/input.h> | 28 | #include <linux/input.h> |
@@ -500,3 +501,49 @@ void __init sh7377_add_early_devices(void) | |||
500 | /* override timer setup with soc-specific code */ | 501 | /* override timer setup with soc-specific code */ |
501 | shmobile_timer.init = sh7377_earlytimer_init; | 502 | shmobile_timer.init = sh7377_earlytimer_init; |
502 | } | 503 | } |
504 | |||
505 | #ifdef CONFIG_USE_OF | ||
506 | |||
507 | void __init sh7377_add_early_devices_dt(void) | ||
508 | { | ||
509 | shmobile_setup_delay(600, 1, 3); /* Cortex-A8 @ 600MHz */ | ||
510 | |||
511 | early_platform_add_devices(sh7377_early_devices, | ||
512 | ARRAY_SIZE(sh7377_early_devices)); | ||
513 | |||
514 | /* setup early console here as well */ | ||
515 | shmobile_setup_console(); | ||
516 | } | ||
517 | |||
518 | static const struct of_dev_auxdata sh7377_auxdata_lookup[] __initconst = { | ||
519 | { } | ||
520 | }; | ||
521 | |||
522 | void __init sh7377_add_standard_devices_dt(void) | ||
523 | { | ||
524 | /* clocks are setup late during boot in the case of DT */ | ||
525 | sh7377_clock_init(); | ||
526 | |||
527 | platform_add_devices(sh7377_early_devices, | ||
528 | ARRAY_SIZE(sh7377_early_devices)); | ||
529 | |||
530 | of_platform_populate(NULL, of_default_bus_match_table, | ||
531 | sh7377_auxdata_lookup, NULL); | ||
532 | } | ||
533 | |||
534 | static const char *sh7377_boards_compat_dt[] __initdata = { | ||
535 | "renesas,sh7377", | ||
536 | NULL, | ||
537 | }; | ||
538 | |||
539 | DT_MACHINE_START(SH7377_DT, "Generic SH7377 (Flattened Device Tree)") | ||
540 | .map_io = sh7377_map_io, | ||
541 | .init_early = sh7377_add_early_devices_dt, | ||
542 | .init_irq = sh7377_init_irq, | ||
543 | .handle_irq = shmobile_handle_irq_intc, | ||
544 | .init_machine = sh7377_add_standard_devices_dt, | ||
545 | .timer = &shmobile_timer, | ||
546 | .dt_compat = sh7377_boards_compat_dt, | ||
547 | MACHINE_END | ||
548 | |||
549 | #endif /* CONFIG_USE_OF */ | ||
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 04a0dfe75493..d230af656fc9 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/sh_dma.h> | 30 | #include <linux/sh_dma.h> |
31 | #include <linux/sh_intc.h> | 31 | #include <linux/sh_intc.h> |
32 | #include <linux/sh_timer.h> | 32 | #include <linux/sh_timer.h> |
33 | #include <mach/dma-register.h> | ||
33 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
34 | #include <mach/irqs.h> | 35 | #include <mach/irqs.h> |
35 | #include <mach/sh73a0.h> | 36 | #include <mach/sh73a0.h> |
@@ -415,32 +416,6 @@ static struct platform_device i2c4_device = { | |||
415 | .num_resources = ARRAY_SIZE(i2c4_resources), | 416 | .num_resources = ARRAY_SIZE(i2c4_resources), |
416 | }; | 417 | }; |
417 | 418 | ||
418 | /* Transmit sizes and respective CHCR register values */ | ||
419 | enum { | ||
420 | XMIT_SZ_8BIT = 0, | ||
421 | XMIT_SZ_16BIT = 1, | ||
422 | XMIT_SZ_32BIT = 2, | ||
423 | XMIT_SZ_64BIT = 7, | ||
424 | XMIT_SZ_128BIT = 3, | ||
425 | XMIT_SZ_256BIT = 4, | ||
426 | XMIT_SZ_512BIT = 5, | ||
427 | }; | ||
428 | |||
429 | /* log2(size / 8) - used to calculate number of transfers */ | ||
430 | #define TS_SHIFT { \ | ||
431 | [XMIT_SZ_8BIT] = 0, \ | ||
432 | [XMIT_SZ_16BIT] = 1, \ | ||
433 | [XMIT_SZ_32BIT] = 2, \ | ||
434 | [XMIT_SZ_64BIT] = 3, \ | ||
435 | [XMIT_SZ_128BIT] = 4, \ | ||
436 | [XMIT_SZ_256BIT] = 5, \ | ||
437 | [XMIT_SZ_512BIT] = 6, \ | ||
438 | } | ||
439 | |||
440 | #define TS_INDEX2VAL(i) ((((i) & 3) << 3) | (((i) & 0xc) << (20 - 2))) | ||
441 | #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz))) | ||
442 | #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz))) | ||
443 | |||
444 | static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { | 419 | static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { |
445 | { | 420 | { |
446 | .slave_id = SHDMA_SLAVE_SCIF0_TX, | 421 | .slave_id = SHDMA_SLAVE_SCIF0_TX, |
@@ -604,19 +579,17 @@ static const struct sh_dmae_channel sh73a0_dmae_channels[] = { | |||
604 | DMAE_CHANNEL(0x8980), | 579 | DMAE_CHANNEL(0x8980), |
605 | }; | 580 | }; |
606 | 581 | ||
607 | static const unsigned int ts_shift[] = TS_SHIFT; | ||
608 | |||
609 | static struct sh_dmae_pdata sh73a0_dmae_platform_data = { | 582 | static struct sh_dmae_pdata sh73a0_dmae_platform_data = { |
610 | .slave = sh73a0_dmae_slaves, | 583 | .slave = sh73a0_dmae_slaves, |
611 | .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), | 584 | .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), |
612 | .channel = sh73a0_dmae_channels, | 585 | .channel = sh73a0_dmae_channels, |
613 | .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), | 586 | .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), |
614 | .ts_low_shift = 3, | 587 | .ts_low_shift = TS_LOW_SHIFT, |
615 | .ts_low_mask = 0x18, | 588 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, |
616 | .ts_high_shift = (20 - 2), /* 2 bits for shifted low TS */ | 589 | .ts_high_shift = TS_HI_SHIFT, |
617 | .ts_high_mask = 0x00300000, | 590 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, |
618 | .ts_shift = ts_shift, | 591 | .ts_shift = dma_ts_shift, |
619 | .ts_shift_num = ARRAY_SIZE(ts_shift), | 592 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), |
620 | .dmaor_init = DMAOR_DME, | 593 | .dmaor_init = DMAOR_DME, |
621 | }; | 594 | }; |
622 | 595 | ||
@@ -651,6 +624,116 @@ static struct platform_device dma0_device = { | |||
651 | }, | 624 | }, |
652 | }; | 625 | }; |
653 | 626 | ||
627 | /* MPDMAC */ | ||
628 | static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { | ||
629 | { | ||
630 | .slave_id = SHDMA_SLAVE_FSI2A_RX, | ||
631 | .addr = 0xec230020, | ||
632 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
633 | .mid_rid = 0xd6, /* CHECK ME */ | ||
634 | }, { | ||
635 | .slave_id = SHDMA_SLAVE_FSI2A_TX, | ||
636 | .addr = 0xec230024, | ||
637 | .chcr = CHCR_TX(XMIT_SZ_32BIT), | ||
638 | .mid_rid = 0xd5, /* CHECK ME */ | ||
639 | }, { | ||
640 | .slave_id = SHDMA_SLAVE_FSI2C_RX, | ||
641 | .addr = 0xec230060, | ||
642 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
643 | .mid_rid = 0xda, /* CHECK ME */ | ||
644 | }, { | ||
645 | .slave_id = SHDMA_SLAVE_FSI2C_TX, | ||
646 | .addr = 0xec230064, | ||
647 | .chcr = CHCR_TX(XMIT_SZ_32BIT), | ||
648 | .mid_rid = 0xd9, /* CHECK ME */ | ||
649 | }, { | ||
650 | .slave_id = SHDMA_SLAVE_FSI2B_RX, | ||
651 | .addr = 0xec240020, | ||
652 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
653 | .mid_rid = 0x8e, /* CHECK ME */ | ||
654 | }, { | ||
655 | .slave_id = SHDMA_SLAVE_FSI2B_TX, | ||
656 | .addr = 0xec240024, | ||
657 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
658 | .mid_rid = 0x8d, /* CHECK ME */ | ||
659 | }, { | ||
660 | .slave_id = SHDMA_SLAVE_FSI2D_RX, | ||
661 | .addr = 0xec240060, | ||
662 | .chcr = CHCR_RX(XMIT_SZ_32BIT), | ||
663 | .mid_rid = 0x9a, /* CHECK ME */ | ||
664 | }, | ||
665 | }; | ||
666 | |||
667 | #define MPDMA_CHANNEL(a, b, c) \ | ||
668 | { \ | ||
669 | .offset = a, \ | ||
670 | .dmars = b, \ | ||
671 | .dmars_bit = c, \ | ||
672 | .chclr_offset = (0x220 - 0x20) + a \ | ||
673 | } | ||
674 | |||
675 | static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { | ||
676 | MPDMA_CHANNEL(0x00, 0, 0), | ||
677 | MPDMA_CHANNEL(0x10, 0, 8), | ||
678 | MPDMA_CHANNEL(0x20, 4, 0), | ||
679 | MPDMA_CHANNEL(0x30, 4, 8), | ||
680 | MPDMA_CHANNEL(0x50, 8, 0), | ||
681 | MPDMA_CHANNEL(0x70, 8, 8), | ||
682 | }; | ||
683 | |||
684 | static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { | ||
685 | .slave = sh73a0_mpdma_slaves, | ||
686 | .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), | ||
687 | .channel = sh73a0_mpdma_channels, | ||
688 | .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), | ||
689 | .ts_low_shift = TS_LOW_SHIFT, | ||
690 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, | ||
691 | .ts_high_shift = TS_HI_SHIFT, | ||
692 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, | ||
693 | .ts_shift = dma_ts_shift, | ||
694 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), | ||
695 | .dmaor_init = DMAOR_DME, | ||
696 | .chclr_present = 1, | ||
697 | }; | ||
698 | |||
699 | /* Resource order important! */ | ||
700 | static struct resource sh73a0_mpdma_resources[] = { | ||
701 | { | ||
702 | /* Channel registers and DMAOR */ | ||
703 | .start = 0xec618020, | ||
704 | .end = 0xec61828f, | ||
705 | .flags = IORESOURCE_MEM, | ||
706 | }, | ||
707 | { | ||
708 | /* DMARSx */ | ||
709 | .start = 0xec619000, | ||
710 | .end = 0xec61900b, | ||
711 | .flags = IORESOURCE_MEM, | ||
712 | }, | ||
713 | { | ||
714 | .name = "error_irq", | ||
715 | .start = gic_spi(181), | ||
716 | .end = gic_spi(181), | ||
717 | .flags = IORESOURCE_IRQ, | ||
718 | }, | ||
719 | { | ||
720 | /* IRQ for channels 0-5 */ | ||
721 | .start = gic_spi(175), | ||
722 | .end = gic_spi(180), | ||
723 | .flags = IORESOURCE_IRQ, | ||
724 | }, | ||
725 | }; | ||
726 | |||
727 | static struct platform_device mpdma0_device = { | ||
728 | .name = "sh-dma-engine", | ||
729 | .id = 1, | ||
730 | .resource = sh73a0_mpdma_resources, | ||
731 | .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), | ||
732 | .dev = { | ||
733 | .platform_data = &sh73a0_mpdma_platform_data, | ||
734 | }, | ||
735 | }; | ||
736 | |||
654 | static struct platform_device *sh73a0_early_devices[] __initdata = { | 737 | static struct platform_device *sh73a0_early_devices[] __initdata = { |
655 | &scif0_device, | 738 | &scif0_device, |
656 | &scif1_device, | 739 | &scif1_device, |
@@ -673,6 +756,7 @@ static struct platform_device *sh73a0_late_devices[] __initdata = { | |||
673 | &i2c3_device, | 756 | &i2c3_device, |
674 | &i2c4_device, | 757 | &i2c4_device, |
675 | &dma0_device, | 758 | &dma0_device, |
759 | &mpdma0_device, | ||
676 | }; | 760 | }; |
677 | 761 | ||
678 | #define SRCR2 0xe61580b0 | 762 | #define SRCR2 0xe61580b0 |
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index 0f882ecb7d81..6ec300549960 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -120,182 +120,156 @@ struct pl08x_channel_data spear300_dma_info[] = { | |||
120 | .min_signal = 2, | 120 | .min_signal = 2, |
121 | .max_signal = 2, | 121 | .max_signal = 2, |
122 | .muxval = 0, | 122 | .muxval = 0, |
123 | .cctl = 0, | ||
124 | .periph_buses = PL08X_AHB1, | 123 | .periph_buses = PL08X_AHB1, |
125 | }, { | 124 | }, { |
126 | .bus_id = "uart0_tx", | 125 | .bus_id = "uart0_tx", |
127 | .min_signal = 3, | 126 | .min_signal = 3, |
128 | .max_signal = 3, | 127 | .max_signal = 3, |
129 | .muxval = 0, | 128 | .muxval = 0, |
130 | .cctl = 0, | ||
131 | .periph_buses = PL08X_AHB1, | 129 | .periph_buses = PL08X_AHB1, |
132 | }, { | 130 | }, { |
133 | .bus_id = "ssp0_rx", | 131 | .bus_id = "ssp0_rx", |
134 | .min_signal = 8, | 132 | .min_signal = 8, |
135 | .max_signal = 8, | 133 | .max_signal = 8, |
136 | .muxval = 0, | 134 | .muxval = 0, |
137 | .cctl = 0, | ||
138 | .periph_buses = PL08X_AHB1, | 135 | .periph_buses = PL08X_AHB1, |
139 | }, { | 136 | }, { |
140 | .bus_id = "ssp0_tx", | 137 | .bus_id = "ssp0_tx", |
141 | .min_signal = 9, | 138 | .min_signal = 9, |
142 | .max_signal = 9, | 139 | .max_signal = 9, |
143 | .muxval = 0, | 140 | .muxval = 0, |
144 | .cctl = 0, | ||
145 | .periph_buses = PL08X_AHB1, | 141 | .periph_buses = PL08X_AHB1, |
146 | }, { | 142 | }, { |
147 | .bus_id = "i2c_rx", | 143 | .bus_id = "i2c_rx", |
148 | .min_signal = 10, | 144 | .min_signal = 10, |
149 | .max_signal = 10, | 145 | .max_signal = 10, |
150 | .muxval = 0, | 146 | .muxval = 0, |
151 | .cctl = 0, | ||
152 | .periph_buses = PL08X_AHB1, | 147 | .periph_buses = PL08X_AHB1, |
153 | }, { | 148 | }, { |
154 | .bus_id = "i2c_tx", | 149 | .bus_id = "i2c_tx", |
155 | .min_signal = 11, | 150 | .min_signal = 11, |
156 | .max_signal = 11, | 151 | .max_signal = 11, |
157 | .muxval = 0, | 152 | .muxval = 0, |
158 | .cctl = 0, | ||
159 | .periph_buses = PL08X_AHB1, | 153 | .periph_buses = PL08X_AHB1, |
160 | }, { | 154 | }, { |
161 | .bus_id = "irda", | 155 | .bus_id = "irda", |
162 | .min_signal = 12, | 156 | .min_signal = 12, |
163 | .max_signal = 12, | 157 | .max_signal = 12, |
164 | .muxval = 0, | 158 | .muxval = 0, |
165 | .cctl = 0, | ||
166 | .periph_buses = PL08X_AHB1, | 159 | .periph_buses = PL08X_AHB1, |
167 | }, { | 160 | }, { |
168 | .bus_id = "adc", | 161 | .bus_id = "adc", |
169 | .min_signal = 13, | 162 | .min_signal = 13, |
170 | .max_signal = 13, | 163 | .max_signal = 13, |
171 | .muxval = 0, | 164 | .muxval = 0, |
172 | .cctl = 0, | ||
173 | .periph_buses = PL08X_AHB1, | 165 | .periph_buses = PL08X_AHB1, |
174 | }, { | 166 | }, { |
175 | .bus_id = "to_jpeg", | 167 | .bus_id = "to_jpeg", |
176 | .min_signal = 14, | 168 | .min_signal = 14, |
177 | .max_signal = 14, | 169 | .max_signal = 14, |
178 | .muxval = 0, | 170 | .muxval = 0, |
179 | .cctl = 0, | ||
180 | .periph_buses = PL08X_AHB1, | 171 | .periph_buses = PL08X_AHB1, |
181 | }, { | 172 | }, { |
182 | .bus_id = "from_jpeg", | 173 | .bus_id = "from_jpeg", |
183 | .min_signal = 15, | 174 | .min_signal = 15, |
184 | .max_signal = 15, | 175 | .max_signal = 15, |
185 | .muxval = 0, | 176 | .muxval = 0, |
186 | .cctl = 0, | ||
187 | .periph_buses = PL08X_AHB1, | 177 | .periph_buses = PL08X_AHB1, |
188 | }, { | 178 | }, { |
189 | .bus_id = "ras0_rx", | 179 | .bus_id = "ras0_rx", |
190 | .min_signal = 0, | 180 | .min_signal = 0, |
191 | .max_signal = 0, | 181 | .max_signal = 0, |
192 | .muxval = 1, | 182 | .muxval = 1, |
193 | .cctl = 0, | ||
194 | .periph_buses = PL08X_AHB1, | 183 | .periph_buses = PL08X_AHB1, |
195 | }, { | 184 | }, { |
196 | .bus_id = "ras0_tx", | 185 | .bus_id = "ras0_tx", |
197 | .min_signal = 1, | 186 | .min_signal = 1, |
198 | .max_signal = 1, | 187 | .max_signal = 1, |
199 | .muxval = 1, | 188 | .muxval = 1, |
200 | .cctl = 0, | ||
201 | .periph_buses = PL08X_AHB1, | 189 | .periph_buses = PL08X_AHB1, |
202 | }, { | 190 | }, { |
203 | .bus_id = "ras1_rx", | 191 | .bus_id = "ras1_rx", |
204 | .min_signal = 2, | 192 | .min_signal = 2, |
205 | .max_signal = 2, | 193 | .max_signal = 2, |
206 | .muxval = 1, | 194 | .muxval = 1, |
207 | .cctl = 0, | ||
208 | .periph_buses = PL08X_AHB1, | 195 | .periph_buses = PL08X_AHB1, |
209 | }, { | 196 | }, { |
210 | .bus_id = "ras1_tx", | 197 | .bus_id = "ras1_tx", |
211 | .min_signal = 3, | 198 | .min_signal = 3, |
212 | .max_signal = 3, | 199 | .max_signal = 3, |
213 | .muxval = 1, | 200 | .muxval = 1, |
214 | .cctl = 0, | ||
215 | .periph_buses = PL08X_AHB1, | 201 | .periph_buses = PL08X_AHB1, |
216 | }, { | 202 | }, { |
217 | .bus_id = "ras2_rx", | 203 | .bus_id = "ras2_rx", |
218 | .min_signal = 4, | 204 | .min_signal = 4, |
219 | .max_signal = 4, | 205 | .max_signal = 4, |
220 | .muxval = 1, | 206 | .muxval = 1, |
221 | .cctl = 0, | ||
222 | .periph_buses = PL08X_AHB1, | 207 | .periph_buses = PL08X_AHB1, |
223 | }, { | 208 | }, { |
224 | .bus_id = "ras2_tx", | 209 | .bus_id = "ras2_tx", |
225 | .min_signal = 5, | 210 | .min_signal = 5, |
226 | .max_signal = 5, | 211 | .max_signal = 5, |
227 | .muxval = 1, | 212 | .muxval = 1, |
228 | .cctl = 0, | ||
229 | .periph_buses = PL08X_AHB1, | 213 | .periph_buses = PL08X_AHB1, |
230 | }, { | 214 | }, { |
231 | .bus_id = "ras3_rx", | 215 | .bus_id = "ras3_rx", |
232 | .min_signal = 6, | 216 | .min_signal = 6, |
233 | .max_signal = 6, | 217 | .max_signal = 6, |
234 | .muxval = 1, | 218 | .muxval = 1, |
235 | .cctl = 0, | ||
236 | .periph_buses = PL08X_AHB1, | 219 | .periph_buses = PL08X_AHB1, |
237 | }, { | 220 | }, { |
238 | .bus_id = "ras3_tx", | 221 | .bus_id = "ras3_tx", |
239 | .min_signal = 7, | 222 | .min_signal = 7, |
240 | .max_signal = 7, | 223 | .max_signal = 7, |
241 | .muxval = 1, | 224 | .muxval = 1, |
242 | .cctl = 0, | ||
243 | .periph_buses = PL08X_AHB1, | 225 | .periph_buses = PL08X_AHB1, |
244 | }, { | 226 | }, { |
245 | .bus_id = "ras4_rx", | 227 | .bus_id = "ras4_rx", |
246 | .min_signal = 8, | 228 | .min_signal = 8, |
247 | .max_signal = 8, | 229 | .max_signal = 8, |
248 | .muxval = 1, | 230 | .muxval = 1, |
249 | .cctl = 0, | ||
250 | .periph_buses = PL08X_AHB1, | 231 | .periph_buses = PL08X_AHB1, |
251 | }, { | 232 | }, { |
252 | .bus_id = "ras4_tx", | 233 | .bus_id = "ras4_tx", |
253 | .min_signal = 9, | 234 | .min_signal = 9, |
254 | .max_signal = 9, | 235 | .max_signal = 9, |
255 | .muxval = 1, | 236 | .muxval = 1, |
256 | .cctl = 0, | ||
257 | .periph_buses = PL08X_AHB1, | 237 | .periph_buses = PL08X_AHB1, |
258 | }, { | 238 | }, { |
259 | .bus_id = "ras5_rx", | 239 | .bus_id = "ras5_rx", |
260 | .min_signal = 10, | 240 | .min_signal = 10, |
261 | .max_signal = 10, | 241 | .max_signal = 10, |
262 | .muxval = 1, | 242 | .muxval = 1, |
263 | .cctl = 0, | ||
264 | .periph_buses = PL08X_AHB1, | 243 | .periph_buses = PL08X_AHB1, |
265 | }, { | 244 | }, { |
266 | .bus_id = "ras5_tx", | 245 | .bus_id = "ras5_tx", |
267 | .min_signal = 11, | 246 | .min_signal = 11, |
268 | .max_signal = 11, | 247 | .max_signal = 11, |
269 | .muxval = 1, | 248 | .muxval = 1, |
270 | .cctl = 0, | ||
271 | .periph_buses = PL08X_AHB1, | 249 | .periph_buses = PL08X_AHB1, |
272 | }, { | 250 | }, { |
273 | .bus_id = "ras6_rx", | 251 | .bus_id = "ras6_rx", |
274 | .min_signal = 12, | 252 | .min_signal = 12, |
275 | .max_signal = 12, | 253 | .max_signal = 12, |
276 | .muxval = 1, | 254 | .muxval = 1, |
277 | .cctl = 0, | ||
278 | .periph_buses = PL08X_AHB1, | 255 | .periph_buses = PL08X_AHB1, |
279 | }, { | 256 | }, { |
280 | .bus_id = "ras6_tx", | 257 | .bus_id = "ras6_tx", |
281 | .min_signal = 13, | 258 | .min_signal = 13, |
282 | .max_signal = 13, | 259 | .max_signal = 13, |
283 | .muxval = 1, | 260 | .muxval = 1, |
284 | .cctl = 0, | ||
285 | .periph_buses = PL08X_AHB1, | 261 | .periph_buses = PL08X_AHB1, |
286 | }, { | 262 | }, { |
287 | .bus_id = "ras7_rx", | 263 | .bus_id = "ras7_rx", |
288 | .min_signal = 14, | 264 | .min_signal = 14, |
289 | .max_signal = 14, | 265 | .max_signal = 14, |
290 | .muxval = 1, | 266 | .muxval = 1, |
291 | .cctl = 0, | ||
292 | .periph_buses = PL08X_AHB1, | 267 | .periph_buses = PL08X_AHB1, |
293 | }, { | 268 | }, { |
294 | .bus_id = "ras7_tx", | 269 | .bus_id = "ras7_tx", |
295 | .min_signal = 15, | 270 | .min_signal = 15, |
296 | .max_signal = 15, | 271 | .max_signal = 15, |
297 | .muxval = 1, | 272 | .muxval = 1, |
298 | .cctl = 0, | ||
299 | .periph_buses = PL08X_AHB1, | 273 | .periph_buses = PL08X_AHB1, |
300 | }, | 274 | }, |
301 | }; | 275 | }; |
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index bbcf4571d361..1d0e435b9045 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c | |||
@@ -205,182 +205,156 @@ struct pl08x_channel_data spear310_dma_info[] = { | |||
205 | .min_signal = 2, | 205 | .min_signal = 2, |
206 | .max_signal = 2, | 206 | .max_signal = 2, |
207 | .muxval = 0, | 207 | .muxval = 0, |
208 | .cctl = 0, | ||
209 | .periph_buses = PL08X_AHB1, | 208 | .periph_buses = PL08X_AHB1, |
210 | }, { | 209 | }, { |
211 | .bus_id = "uart0_tx", | 210 | .bus_id = "uart0_tx", |
212 | .min_signal = 3, | 211 | .min_signal = 3, |
213 | .max_signal = 3, | 212 | .max_signal = 3, |
214 | .muxval = 0, | 213 | .muxval = 0, |
215 | .cctl = 0, | ||
216 | .periph_buses = PL08X_AHB1, | 214 | .periph_buses = PL08X_AHB1, |
217 | }, { | 215 | }, { |
218 | .bus_id = "ssp0_rx", | 216 | .bus_id = "ssp0_rx", |
219 | .min_signal = 8, | 217 | .min_signal = 8, |
220 | .max_signal = 8, | 218 | .max_signal = 8, |
221 | .muxval = 0, | 219 | .muxval = 0, |
222 | .cctl = 0, | ||
223 | .periph_buses = PL08X_AHB1, | 220 | .periph_buses = PL08X_AHB1, |
224 | }, { | 221 | }, { |
225 | .bus_id = "ssp0_tx", | 222 | .bus_id = "ssp0_tx", |
226 | .min_signal = 9, | 223 | .min_signal = 9, |
227 | .max_signal = 9, | 224 | .max_signal = 9, |
228 | .muxval = 0, | 225 | .muxval = 0, |
229 | .cctl = 0, | ||
230 | .periph_buses = PL08X_AHB1, | 226 | .periph_buses = PL08X_AHB1, |
231 | }, { | 227 | }, { |
232 | .bus_id = "i2c_rx", | 228 | .bus_id = "i2c_rx", |
233 | .min_signal = 10, | 229 | .min_signal = 10, |
234 | .max_signal = 10, | 230 | .max_signal = 10, |
235 | .muxval = 0, | 231 | .muxval = 0, |
236 | .cctl = 0, | ||
237 | .periph_buses = PL08X_AHB1, | 232 | .periph_buses = PL08X_AHB1, |
238 | }, { | 233 | }, { |
239 | .bus_id = "i2c_tx", | 234 | .bus_id = "i2c_tx", |
240 | .min_signal = 11, | 235 | .min_signal = 11, |
241 | .max_signal = 11, | 236 | .max_signal = 11, |
242 | .muxval = 0, | 237 | .muxval = 0, |
243 | .cctl = 0, | ||
244 | .periph_buses = PL08X_AHB1, | 238 | .periph_buses = PL08X_AHB1, |
245 | }, { | 239 | }, { |
246 | .bus_id = "irda", | 240 | .bus_id = "irda", |
247 | .min_signal = 12, | 241 | .min_signal = 12, |
248 | .max_signal = 12, | 242 | .max_signal = 12, |
249 | .muxval = 0, | 243 | .muxval = 0, |
250 | .cctl = 0, | ||
251 | .periph_buses = PL08X_AHB1, | 244 | .periph_buses = PL08X_AHB1, |
252 | }, { | 245 | }, { |
253 | .bus_id = "adc", | 246 | .bus_id = "adc", |
254 | .min_signal = 13, | 247 | .min_signal = 13, |
255 | .max_signal = 13, | 248 | .max_signal = 13, |
256 | .muxval = 0, | 249 | .muxval = 0, |
257 | .cctl = 0, | ||
258 | .periph_buses = PL08X_AHB1, | 250 | .periph_buses = PL08X_AHB1, |
259 | }, { | 251 | }, { |
260 | .bus_id = "to_jpeg", | 252 | .bus_id = "to_jpeg", |
261 | .min_signal = 14, | 253 | .min_signal = 14, |
262 | .max_signal = 14, | 254 | .max_signal = 14, |
263 | .muxval = 0, | 255 | .muxval = 0, |
264 | .cctl = 0, | ||
265 | .periph_buses = PL08X_AHB1, | 256 | .periph_buses = PL08X_AHB1, |
266 | }, { | 257 | }, { |
267 | .bus_id = "from_jpeg", | 258 | .bus_id = "from_jpeg", |
268 | .min_signal = 15, | 259 | .min_signal = 15, |
269 | .max_signal = 15, | 260 | .max_signal = 15, |
270 | .muxval = 0, | 261 | .muxval = 0, |
271 | .cctl = 0, | ||
272 | .periph_buses = PL08X_AHB1, | 262 | .periph_buses = PL08X_AHB1, |
273 | }, { | 263 | }, { |
274 | .bus_id = "uart1_rx", | 264 | .bus_id = "uart1_rx", |
275 | .min_signal = 0, | 265 | .min_signal = 0, |
276 | .max_signal = 0, | 266 | .max_signal = 0, |
277 | .muxval = 1, | 267 | .muxval = 1, |
278 | .cctl = 0, | ||
279 | .periph_buses = PL08X_AHB1, | 268 | .periph_buses = PL08X_AHB1, |
280 | }, { | 269 | }, { |
281 | .bus_id = "uart1_tx", | 270 | .bus_id = "uart1_tx", |
282 | .min_signal = 1, | 271 | .min_signal = 1, |
283 | .max_signal = 1, | 272 | .max_signal = 1, |
284 | .muxval = 1, | 273 | .muxval = 1, |
285 | .cctl = 0, | ||
286 | .periph_buses = PL08X_AHB1, | 274 | .periph_buses = PL08X_AHB1, |
287 | }, { | 275 | }, { |
288 | .bus_id = "uart2_rx", | 276 | .bus_id = "uart2_rx", |
289 | .min_signal = 2, | 277 | .min_signal = 2, |
290 | .max_signal = 2, | 278 | .max_signal = 2, |
291 | .muxval = 1, | 279 | .muxval = 1, |
292 | .cctl = 0, | ||
293 | .periph_buses = PL08X_AHB1, | 280 | .periph_buses = PL08X_AHB1, |
294 | }, { | 281 | }, { |
295 | .bus_id = "uart2_tx", | 282 | .bus_id = "uart2_tx", |
296 | .min_signal = 3, | 283 | .min_signal = 3, |
297 | .max_signal = 3, | 284 | .max_signal = 3, |
298 | .muxval = 1, | 285 | .muxval = 1, |
299 | .cctl = 0, | ||
300 | .periph_buses = PL08X_AHB1, | 286 | .periph_buses = PL08X_AHB1, |
301 | }, { | 287 | }, { |
302 | .bus_id = "uart3_rx", | 288 | .bus_id = "uart3_rx", |
303 | .min_signal = 4, | 289 | .min_signal = 4, |
304 | .max_signal = 4, | 290 | .max_signal = 4, |
305 | .muxval = 1, | 291 | .muxval = 1, |
306 | .cctl = 0, | ||
307 | .periph_buses = PL08X_AHB1, | 292 | .periph_buses = PL08X_AHB1, |
308 | }, { | 293 | }, { |
309 | .bus_id = "uart3_tx", | 294 | .bus_id = "uart3_tx", |
310 | .min_signal = 5, | 295 | .min_signal = 5, |
311 | .max_signal = 5, | 296 | .max_signal = 5, |
312 | .muxval = 1, | 297 | .muxval = 1, |
313 | .cctl = 0, | ||
314 | .periph_buses = PL08X_AHB1, | 298 | .periph_buses = PL08X_AHB1, |
315 | }, { | 299 | }, { |
316 | .bus_id = "uart4_rx", | 300 | .bus_id = "uart4_rx", |
317 | .min_signal = 6, | 301 | .min_signal = 6, |
318 | .max_signal = 6, | 302 | .max_signal = 6, |
319 | .muxval = 1, | 303 | .muxval = 1, |
320 | .cctl = 0, | ||
321 | .periph_buses = PL08X_AHB1, | 304 | .periph_buses = PL08X_AHB1, |
322 | }, { | 305 | }, { |
323 | .bus_id = "uart4_tx", | 306 | .bus_id = "uart4_tx", |
324 | .min_signal = 7, | 307 | .min_signal = 7, |
325 | .max_signal = 7, | 308 | .max_signal = 7, |
326 | .muxval = 1, | 309 | .muxval = 1, |
327 | .cctl = 0, | ||
328 | .periph_buses = PL08X_AHB1, | 310 | .periph_buses = PL08X_AHB1, |
329 | }, { | 311 | }, { |
330 | .bus_id = "uart5_rx", | 312 | .bus_id = "uart5_rx", |
331 | .min_signal = 8, | 313 | .min_signal = 8, |
332 | .max_signal = 8, | 314 | .max_signal = 8, |
333 | .muxval = 1, | 315 | .muxval = 1, |
334 | .cctl = 0, | ||
335 | .periph_buses = PL08X_AHB1, | 316 | .periph_buses = PL08X_AHB1, |
336 | }, { | 317 | }, { |
337 | .bus_id = "uart5_tx", | 318 | .bus_id = "uart5_tx", |
338 | .min_signal = 9, | 319 | .min_signal = 9, |
339 | .max_signal = 9, | 320 | .max_signal = 9, |
340 | .muxval = 1, | 321 | .muxval = 1, |
341 | .cctl = 0, | ||
342 | .periph_buses = PL08X_AHB1, | 322 | .periph_buses = PL08X_AHB1, |
343 | }, { | 323 | }, { |
344 | .bus_id = "ras5_rx", | 324 | .bus_id = "ras5_rx", |
345 | .min_signal = 10, | 325 | .min_signal = 10, |
346 | .max_signal = 10, | 326 | .max_signal = 10, |
347 | .muxval = 1, | 327 | .muxval = 1, |
348 | .cctl = 0, | ||
349 | .periph_buses = PL08X_AHB1, | 328 | .periph_buses = PL08X_AHB1, |
350 | }, { | 329 | }, { |
351 | .bus_id = "ras5_tx", | 330 | .bus_id = "ras5_tx", |
352 | .min_signal = 11, | 331 | .min_signal = 11, |
353 | .max_signal = 11, | 332 | .max_signal = 11, |
354 | .muxval = 1, | 333 | .muxval = 1, |
355 | .cctl = 0, | ||
356 | .periph_buses = PL08X_AHB1, | 334 | .periph_buses = PL08X_AHB1, |
357 | }, { | 335 | }, { |
358 | .bus_id = "ras6_rx", | 336 | .bus_id = "ras6_rx", |
359 | .min_signal = 12, | 337 | .min_signal = 12, |
360 | .max_signal = 12, | 338 | .max_signal = 12, |
361 | .muxval = 1, | 339 | .muxval = 1, |
362 | .cctl = 0, | ||
363 | .periph_buses = PL08X_AHB1, | 340 | .periph_buses = PL08X_AHB1, |
364 | }, { | 341 | }, { |
365 | .bus_id = "ras6_tx", | 342 | .bus_id = "ras6_tx", |
366 | .min_signal = 13, | 343 | .min_signal = 13, |
367 | .max_signal = 13, | 344 | .max_signal = 13, |
368 | .muxval = 1, | 345 | .muxval = 1, |
369 | .cctl = 0, | ||
370 | .periph_buses = PL08X_AHB1, | 346 | .periph_buses = PL08X_AHB1, |
371 | }, { | 347 | }, { |
372 | .bus_id = "ras7_rx", | 348 | .bus_id = "ras7_rx", |
373 | .min_signal = 14, | 349 | .min_signal = 14, |
374 | .max_signal = 14, | 350 | .max_signal = 14, |
375 | .muxval = 1, | 351 | .muxval = 1, |
376 | .cctl = 0, | ||
377 | .periph_buses = PL08X_AHB1, | 352 | .periph_buses = PL08X_AHB1, |
378 | }, { | 353 | }, { |
379 | .bus_id = "ras7_tx", | 354 | .bus_id = "ras7_tx", |
380 | .min_signal = 15, | 355 | .min_signal = 15, |
381 | .max_signal = 15, | 356 | .max_signal = 15, |
382 | .muxval = 1, | 357 | .muxval = 1, |
383 | .cctl = 0, | ||
384 | .periph_buses = PL08X_AHB1, | 358 | .periph_buses = PL08X_AHB1, |
385 | }, | 359 | }, |
386 | }; | 360 | }; |
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 88d483bcd66a..fd823c624575 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c | |||
@@ -213,182 +213,156 @@ struct pl08x_channel_data spear320_dma_info[] = { | |||
213 | .min_signal = 2, | 213 | .min_signal = 2, |
214 | .max_signal = 2, | 214 | .max_signal = 2, |
215 | .muxval = 0, | 215 | .muxval = 0, |
216 | .cctl = 0, | ||
217 | .periph_buses = PL08X_AHB1, | 216 | .periph_buses = PL08X_AHB1, |
218 | }, { | 217 | }, { |
219 | .bus_id = "uart0_tx", | 218 | .bus_id = "uart0_tx", |
220 | .min_signal = 3, | 219 | .min_signal = 3, |
221 | .max_signal = 3, | 220 | .max_signal = 3, |
222 | .muxval = 0, | 221 | .muxval = 0, |
223 | .cctl = 0, | ||
224 | .periph_buses = PL08X_AHB1, | 222 | .periph_buses = PL08X_AHB1, |
225 | }, { | 223 | }, { |
226 | .bus_id = "ssp0_rx", | 224 | .bus_id = "ssp0_rx", |
227 | .min_signal = 8, | 225 | .min_signal = 8, |
228 | .max_signal = 8, | 226 | .max_signal = 8, |
229 | .muxval = 0, | 227 | .muxval = 0, |
230 | .cctl = 0, | ||
231 | .periph_buses = PL08X_AHB1, | 228 | .periph_buses = PL08X_AHB1, |
232 | }, { | 229 | }, { |
233 | .bus_id = "ssp0_tx", | 230 | .bus_id = "ssp0_tx", |
234 | .min_signal = 9, | 231 | .min_signal = 9, |
235 | .max_signal = 9, | 232 | .max_signal = 9, |
236 | .muxval = 0, | 233 | .muxval = 0, |
237 | .cctl = 0, | ||
238 | .periph_buses = PL08X_AHB1, | 234 | .periph_buses = PL08X_AHB1, |
239 | }, { | 235 | }, { |
240 | .bus_id = "i2c0_rx", | 236 | .bus_id = "i2c0_rx", |
241 | .min_signal = 10, | 237 | .min_signal = 10, |
242 | .max_signal = 10, | 238 | .max_signal = 10, |
243 | .muxval = 0, | 239 | .muxval = 0, |
244 | .cctl = 0, | ||
245 | .periph_buses = PL08X_AHB1, | 240 | .periph_buses = PL08X_AHB1, |
246 | }, { | 241 | }, { |
247 | .bus_id = "i2c0_tx", | 242 | .bus_id = "i2c0_tx", |
248 | .min_signal = 11, | 243 | .min_signal = 11, |
249 | .max_signal = 11, | 244 | .max_signal = 11, |
250 | .muxval = 0, | 245 | .muxval = 0, |
251 | .cctl = 0, | ||
252 | .periph_buses = PL08X_AHB1, | 246 | .periph_buses = PL08X_AHB1, |
253 | }, { | 247 | }, { |
254 | .bus_id = "irda", | 248 | .bus_id = "irda", |
255 | .min_signal = 12, | 249 | .min_signal = 12, |
256 | .max_signal = 12, | 250 | .max_signal = 12, |
257 | .muxval = 0, | 251 | .muxval = 0, |
258 | .cctl = 0, | ||
259 | .periph_buses = PL08X_AHB1, | 252 | .periph_buses = PL08X_AHB1, |
260 | }, { | 253 | }, { |
261 | .bus_id = "adc", | 254 | .bus_id = "adc", |
262 | .min_signal = 13, | 255 | .min_signal = 13, |
263 | .max_signal = 13, | 256 | .max_signal = 13, |
264 | .muxval = 0, | 257 | .muxval = 0, |
265 | .cctl = 0, | ||
266 | .periph_buses = PL08X_AHB1, | 258 | .periph_buses = PL08X_AHB1, |
267 | }, { | 259 | }, { |
268 | .bus_id = "to_jpeg", | 260 | .bus_id = "to_jpeg", |
269 | .min_signal = 14, | 261 | .min_signal = 14, |
270 | .max_signal = 14, | 262 | .max_signal = 14, |
271 | .muxval = 0, | 263 | .muxval = 0, |
272 | .cctl = 0, | ||
273 | .periph_buses = PL08X_AHB1, | 264 | .periph_buses = PL08X_AHB1, |
274 | }, { | 265 | }, { |
275 | .bus_id = "from_jpeg", | 266 | .bus_id = "from_jpeg", |
276 | .min_signal = 15, | 267 | .min_signal = 15, |
277 | .max_signal = 15, | 268 | .max_signal = 15, |
278 | .muxval = 0, | 269 | .muxval = 0, |
279 | .cctl = 0, | ||
280 | .periph_buses = PL08X_AHB1, | 270 | .periph_buses = PL08X_AHB1, |
281 | }, { | 271 | }, { |
282 | .bus_id = "ssp1_rx", | 272 | .bus_id = "ssp1_rx", |
283 | .min_signal = 0, | 273 | .min_signal = 0, |
284 | .max_signal = 0, | 274 | .max_signal = 0, |
285 | .muxval = 1, | 275 | .muxval = 1, |
286 | .cctl = 0, | ||
287 | .periph_buses = PL08X_AHB2, | 276 | .periph_buses = PL08X_AHB2, |
288 | }, { | 277 | }, { |
289 | .bus_id = "ssp1_tx", | 278 | .bus_id = "ssp1_tx", |
290 | .min_signal = 1, | 279 | .min_signal = 1, |
291 | .max_signal = 1, | 280 | .max_signal = 1, |
292 | .muxval = 1, | 281 | .muxval = 1, |
293 | .cctl = 0, | ||
294 | .periph_buses = PL08X_AHB2, | 282 | .periph_buses = PL08X_AHB2, |
295 | }, { | 283 | }, { |
296 | .bus_id = "ssp2_rx", | 284 | .bus_id = "ssp2_rx", |
297 | .min_signal = 2, | 285 | .min_signal = 2, |
298 | .max_signal = 2, | 286 | .max_signal = 2, |
299 | .muxval = 1, | 287 | .muxval = 1, |
300 | .cctl = 0, | ||
301 | .periph_buses = PL08X_AHB2, | 288 | .periph_buses = PL08X_AHB2, |
302 | }, { | 289 | }, { |
303 | .bus_id = "ssp2_tx", | 290 | .bus_id = "ssp2_tx", |
304 | .min_signal = 3, | 291 | .min_signal = 3, |
305 | .max_signal = 3, | 292 | .max_signal = 3, |
306 | .muxval = 1, | 293 | .muxval = 1, |
307 | .cctl = 0, | ||
308 | .periph_buses = PL08X_AHB2, | 294 | .periph_buses = PL08X_AHB2, |
309 | }, { | 295 | }, { |
310 | .bus_id = "uart1_rx", | 296 | .bus_id = "uart1_rx", |
311 | .min_signal = 4, | 297 | .min_signal = 4, |
312 | .max_signal = 4, | 298 | .max_signal = 4, |
313 | .muxval = 1, | 299 | .muxval = 1, |
314 | .cctl = 0, | ||
315 | .periph_buses = PL08X_AHB2, | 300 | .periph_buses = PL08X_AHB2, |
316 | }, { | 301 | }, { |
317 | .bus_id = "uart1_tx", | 302 | .bus_id = "uart1_tx", |
318 | .min_signal = 5, | 303 | .min_signal = 5, |
319 | .max_signal = 5, | 304 | .max_signal = 5, |
320 | .muxval = 1, | 305 | .muxval = 1, |
321 | .cctl = 0, | ||
322 | .periph_buses = PL08X_AHB2, | 306 | .periph_buses = PL08X_AHB2, |
323 | }, { | 307 | }, { |
324 | .bus_id = "uart2_rx", | 308 | .bus_id = "uart2_rx", |
325 | .min_signal = 6, | 309 | .min_signal = 6, |
326 | .max_signal = 6, | 310 | .max_signal = 6, |
327 | .muxval = 1, | 311 | .muxval = 1, |
328 | .cctl = 0, | ||
329 | .periph_buses = PL08X_AHB2, | 312 | .periph_buses = PL08X_AHB2, |
330 | }, { | 313 | }, { |
331 | .bus_id = "uart2_tx", | 314 | .bus_id = "uart2_tx", |
332 | .min_signal = 7, | 315 | .min_signal = 7, |
333 | .max_signal = 7, | 316 | .max_signal = 7, |
334 | .muxval = 1, | 317 | .muxval = 1, |
335 | .cctl = 0, | ||
336 | .periph_buses = PL08X_AHB2, | 318 | .periph_buses = PL08X_AHB2, |
337 | }, { | 319 | }, { |
338 | .bus_id = "i2c1_rx", | 320 | .bus_id = "i2c1_rx", |
339 | .min_signal = 8, | 321 | .min_signal = 8, |
340 | .max_signal = 8, | 322 | .max_signal = 8, |
341 | .muxval = 1, | 323 | .muxval = 1, |
342 | .cctl = 0, | ||
343 | .periph_buses = PL08X_AHB2, | 324 | .periph_buses = PL08X_AHB2, |
344 | }, { | 325 | }, { |
345 | .bus_id = "i2c1_tx", | 326 | .bus_id = "i2c1_tx", |
346 | .min_signal = 9, | 327 | .min_signal = 9, |
347 | .max_signal = 9, | 328 | .max_signal = 9, |
348 | .muxval = 1, | 329 | .muxval = 1, |
349 | .cctl = 0, | ||
350 | .periph_buses = PL08X_AHB2, | 330 | .periph_buses = PL08X_AHB2, |
351 | }, { | 331 | }, { |
352 | .bus_id = "i2c2_rx", | 332 | .bus_id = "i2c2_rx", |
353 | .min_signal = 10, | 333 | .min_signal = 10, |
354 | .max_signal = 10, | 334 | .max_signal = 10, |
355 | .muxval = 1, | 335 | .muxval = 1, |
356 | .cctl = 0, | ||
357 | .periph_buses = PL08X_AHB2, | 336 | .periph_buses = PL08X_AHB2, |
358 | }, { | 337 | }, { |
359 | .bus_id = "i2c2_tx", | 338 | .bus_id = "i2c2_tx", |
360 | .min_signal = 11, | 339 | .min_signal = 11, |
361 | .max_signal = 11, | 340 | .max_signal = 11, |
362 | .muxval = 1, | 341 | .muxval = 1, |
363 | .cctl = 0, | ||
364 | .periph_buses = PL08X_AHB2, | 342 | .periph_buses = PL08X_AHB2, |
365 | }, { | 343 | }, { |
366 | .bus_id = "i2s_rx", | 344 | .bus_id = "i2s_rx", |
367 | .min_signal = 12, | 345 | .min_signal = 12, |
368 | .max_signal = 12, | 346 | .max_signal = 12, |
369 | .muxval = 1, | 347 | .muxval = 1, |
370 | .cctl = 0, | ||
371 | .periph_buses = PL08X_AHB2, | 348 | .periph_buses = PL08X_AHB2, |
372 | }, { | 349 | }, { |
373 | .bus_id = "i2s_tx", | 350 | .bus_id = "i2s_tx", |
374 | .min_signal = 13, | 351 | .min_signal = 13, |
375 | .max_signal = 13, | 352 | .max_signal = 13, |
376 | .muxval = 1, | 353 | .muxval = 1, |
377 | .cctl = 0, | ||
378 | .periph_buses = PL08X_AHB2, | 354 | .periph_buses = PL08X_AHB2, |
379 | }, { | 355 | }, { |
380 | .bus_id = "rs485_rx", | 356 | .bus_id = "rs485_rx", |
381 | .min_signal = 14, | 357 | .min_signal = 14, |
382 | .max_signal = 14, | 358 | .max_signal = 14, |
383 | .muxval = 1, | 359 | .muxval = 1, |
384 | .cctl = 0, | ||
385 | .periph_buses = PL08X_AHB2, | 360 | .periph_buses = PL08X_AHB2, |
386 | }, { | 361 | }, { |
387 | .bus_id = "rs485_tx", | 362 | .bus_id = "rs485_tx", |
388 | .min_signal = 15, | 363 | .min_signal = 15, |
389 | .max_signal = 15, | 364 | .max_signal = 15, |
390 | .muxval = 1, | 365 | .muxval = 1, |
391 | .cctl = 0, | ||
392 | .periph_buses = PL08X_AHB2, | 366 | .periph_buses = PL08X_AHB2, |
393 | }, | 367 | }, |
394 | }; | 368 | }; |
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 66db5f13af84..98144baf8883 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c | |||
@@ -46,7 +46,8 @@ struct pl022_ssp_controller pl022_plat_data = { | |||
46 | struct pl08x_platform_data pl080_plat_data = { | 46 | struct pl08x_platform_data pl080_plat_data = { |
47 | .memcpy_channel = { | 47 | .memcpy_channel = { |
48 | .bus_id = "memcpy", | 48 | .bus_id = "memcpy", |
49 | .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ | 49 | .cctl_memcpy = |
50 | (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ | ||
50 | PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ | 51 | PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ |
51 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ | 52 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ |
52 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ | 53 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ |
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index 9af67d003c62..5a5a52db252b 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
@@ -36,336 +36,288 @@ static struct pl08x_channel_data spear600_dma_info[] = { | |||
36 | .min_signal = 0, | 36 | .min_signal = 0, |
37 | .max_signal = 0, | 37 | .max_signal = 0, |
38 | .muxval = 0, | 38 | .muxval = 0, |
39 | .cctl = 0, | ||
40 | .periph_buses = PL08X_AHB1, | 39 | .periph_buses = PL08X_AHB1, |
41 | }, { | 40 | }, { |
42 | .bus_id = "ssp1_tx", | 41 | .bus_id = "ssp1_tx", |
43 | .min_signal = 1, | 42 | .min_signal = 1, |
44 | .max_signal = 1, | 43 | .max_signal = 1, |
45 | .muxval = 0, | 44 | .muxval = 0, |
46 | .cctl = 0, | ||
47 | .periph_buses = PL08X_AHB1, | 45 | .periph_buses = PL08X_AHB1, |
48 | }, { | 46 | }, { |
49 | .bus_id = "uart0_rx", | 47 | .bus_id = "uart0_rx", |
50 | .min_signal = 2, | 48 | .min_signal = 2, |
51 | .max_signal = 2, | 49 | .max_signal = 2, |
52 | .muxval = 0, | 50 | .muxval = 0, |
53 | .cctl = 0, | ||
54 | .periph_buses = PL08X_AHB1, | 51 | .periph_buses = PL08X_AHB1, |
55 | }, { | 52 | }, { |
56 | .bus_id = "uart0_tx", | 53 | .bus_id = "uart0_tx", |
57 | .min_signal = 3, | 54 | .min_signal = 3, |
58 | .max_signal = 3, | 55 | .max_signal = 3, |
59 | .muxval = 0, | 56 | .muxval = 0, |
60 | .cctl = 0, | ||
61 | .periph_buses = PL08X_AHB1, | 57 | .periph_buses = PL08X_AHB1, |
62 | }, { | 58 | }, { |
63 | .bus_id = "uart1_rx", | 59 | .bus_id = "uart1_rx", |
64 | .min_signal = 4, | 60 | .min_signal = 4, |
65 | .max_signal = 4, | 61 | .max_signal = 4, |
66 | .muxval = 0, | 62 | .muxval = 0, |
67 | .cctl = 0, | ||
68 | .periph_buses = PL08X_AHB1, | 63 | .periph_buses = PL08X_AHB1, |
69 | }, { | 64 | }, { |
70 | .bus_id = "uart1_tx", | 65 | .bus_id = "uart1_tx", |
71 | .min_signal = 5, | 66 | .min_signal = 5, |
72 | .max_signal = 5, | 67 | .max_signal = 5, |
73 | .muxval = 0, | 68 | .muxval = 0, |
74 | .cctl = 0, | ||
75 | .periph_buses = PL08X_AHB1, | 69 | .periph_buses = PL08X_AHB1, |
76 | }, { | 70 | }, { |
77 | .bus_id = "ssp2_rx", | 71 | .bus_id = "ssp2_rx", |
78 | .min_signal = 6, | 72 | .min_signal = 6, |
79 | .max_signal = 6, | 73 | .max_signal = 6, |
80 | .muxval = 0, | 74 | .muxval = 0, |
81 | .cctl = 0, | ||
82 | .periph_buses = PL08X_AHB2, | 75 | .periph_buses = PL08X_AHB2, |
83 | }, { | 76 | }, { |
84 | .bus_id = "ssp2_tx", | 77 | .bus_id = "ssp2_tx", |
85 | .min_signal = 7, | 78 | .min_signal = 7, |
86 | .max_signal = 7, | 79 | .max_signal = 7, |
87 | .muxval = 0, | 80 | .muxval = 0, |
88 | .cctl = 0, | ||
89 | .periph_buses = PL08X_AHB2, | 81 | .periph_buses = PL08X_AHB2, |
90 | }, { | 82 | }, { |
91 | .bus_id = "ssp0_rx", | 83 | .bus_id = "ssp0_rx", |
92 | .min_signal = 8, | 84 | .min_signal = 8, |
93 | .max_signal = 8, | 85 | .max_signal = 8, |
94 | .muxval = 0, | 86 | .muxval = 0, |
95 | .cctl = 0, | ||
96 | .periph_buses = PL08X_AHB1, | 87 | .periph_buses = PL08X_AHB1, |
97 | }, { | 88 | }, { |
98 | .bus_id = "ssp0_tx", | 89 | .bus_id = "ssp0_tx", |
99 | .min_signal = 9, | 90 | .min_signal = 9, |
100 | .max_signal = 9, | 91 | .max_signal = 9, |
101 | .muxval = 0, | 92 | .muxval = 0, |
102 | .cctl = 0, | ||
103 | .periph_buses = PL08X_AHB1, | 93 | .periph_buses = PL08X_AHB1, |
104 | }, { | 94 | }, { |
105 | .bus_id = "i2c_rx", | 95 | .bus_id = "i2c_rx", |
106 | .min_signal = 10, | 96 | .min_signal = 10, |
107 | .max_signal = 10, | 97 | .max_signal = 10, |
108 | .muxval = 0, | 98 | .muxval = 0, |
109 | .cctl = 0, | ||
110 | .periph_buses = PL08X_AHB1, | 99 | .periph_buses = PL08X_AHB1, |
111 | }, { | 100 | }, { |
112 | .bus_id = "i2c_tx", | 101 | .bus_id = "i2c_tx", |
113 | .min_signal = 11, | 102 | .min_signal = 11, |
114 | .max_signal = 11, | 103 | .max_signal = 11, |
115 | .muxval = 0, | 104 | .muxval = 0, |
116 | .cctl = 0, | ||
117 | .periph_buses = PL08X_AHB1, | 105 | .periph_buses = PL08X_AHB1, |
118 | }, { | 106 | }, { |
119 | .bus_id = "irda", | 107 | .bus_id = "irda", |
120 | .min_signal = 12, | 108 | .min_signal = 12, |
121 | .max_signal = 12, | 109 | .max_signal = 12, |
122 | .muxval = 0, | 110 | .muxval = 0, |
123 | .cctl = 0, | ||
124 | .periph_buses = PL08X_AHB1, | 111 | .periph_buses = PL08X_AHB1, |
125 | }, { | 112 | }, { |
126 | .bus_id = "adc", | 113 | .bus_id = "adc", |
127 | .min_signal = 13, | 114 | .min_signal = 13, |
128 | .max_signal = 13, | 115 | .max_signal = 13, |
129 | .muxval = 0, | 116 | .muxval = 0, |
130 | .cctl = 0, | ||
131 | .periph_buses = PL08X_AHB2, | 117 | .periph_buses = PL08X_AHB2, |
132 | }, { | 118 | }, { |
133 | .bus_id = "to_jpeg", | 119 | .bus_id = "to_jpeg", |
134 | .min_signal = 14, | 120 | .min_signal = 14, |
135 | .max_signal = 14, | 121 | .max_signal = 14, |
136 | .muxval = 0, | 122 | .muxval = 0, |
137 | .cctl = 0, | ||
138 | .periph_buses = PL08X_AHB1, | 123 | .periph_buses = PL08X_AHB1, |
139 | }, { | 124 | }, { |
140 | .bus_id = "from_jpeg", | 125 | .bus_id = "from_jpeg", |
141 | .min_signal = 15, | 126 | .min_signal = 15, |
142 | .max_signal = 15, | 127 | .max_signal = 15, |
143 | .muxval = 0, | 128 | .muxval = 0, |
144 | .cctl = 0, | ||
145 | .periph_buses = PL08X_AHB1, | 129 | .periph_buses = PL08X_AHB1, |
146 | }, { | 130 | }, { |
147 | .bus_id = "ras0_rx", | 131 | .bus_id = "ras0_rx", |
148 | .min_signal = 0, | 132 | .min_signal = 0, |
149 | .max_signal = 0, | 133 | .max_signal = 0, |
150 | .muxval = 1, | 134 | .muxval = 1, |
151 | .cctl = 0, | ||
152 | .periph_buses = PL08X_AHB1, | 135 | .periph_buses = PL08X_AHB1, |
153 | }, { | 136 | }, { |
154 | .bus_id = "ras0_tx", | 137 | .bus_id = "ras0_tx", |
155 | .min_signal = 1, | 138 | .min_signal = 1, |
156 | .max_signal = 1, | 139 | .max_signal = 1, |
157 | .muxval = 1, | 140 | .muxval = 1, |
158 | .cctl = 0, | ||
159 | .periph_buses = PL08X_AHB1, | 141 | .periph_buses = PL08X_AHB1, |
160 | }, { | 142 | }, { |
161 | .bus_id = "ras1_rx", | 143 | .bus_id = "ras1_rx", |
162 | .min_signal = 2, | 144 | .min_signal = 2, |
163 | .max_signal = 2, | 145 | .max_signal = 2, |
164 | .muxval = 1, | 146 | .muxval = 1, |
165 | .cctl = 0, | ||
166 | .periph_buses = PL08X_AHB1, | 147 | .periph_buses = PL08X_AHB1, |
167 | }, { | 148 | }, { |
168 | .bus_id = "ras1_tx", | 149 | .bus_id = "ras1_tx", |
169 | .min_signal = 3, | 150 | .min_signal = 3, |
170 | .max_signal = 3, | 151 | .max_signal = 3, |
171 | .muxval = 1, | 152 | .muxval = 1, |
172 | .cctl = 0, | ||
173 | .periph_buses = PL08X_AHB1, | 153 | .periph_buses = PL08X_AHB1, |
174 | }, { | 154 | }, { |
175 | .bus_id = "ras2_rx", | 155 | .bus_id = "ras2_rx", |
176 | .min_signal = 4, | 156 | .min_signal = 4, |
177 | .max_signal = 4, | 157 | .max_signal = 4, |
178 | .muxval = 1, | 158 | .muxval = 1, |
179 | .cctl = 0, | ||
180 | .periph_buses = PL08X_AHB1, | 159 | .periph_buses = PL08X_AHB1, |
181 | }, { | 160 | }, { |
182 | .bus_id = "ras2_tx", | 161 | .bus_id = "ras2_tx", |
183 | .min_signal = 5, | 162 | .min_signal = 5, |
184 | .max_signal = 5, | 163 | .max_signal = 5, |
185 | .muxval = 1, | 164 | .muxval = 1, |
186 | .cctl = 0, | ||
187 | .periph_buses = PL08X_AHB1, | 165 | .periph_buses = PL08X_AHB1, |
188 | }, { | 166 | }, { |
189 | .bus_id = "ras3_rx", | 167 | .bus_id = "ras3_rx", |
190 | .min_signal = 6, | 168 | .min_signal = 6, |
191 | .max_signal = 6, | 169 | .max_signal = 6, |
192 | .muxval = 1, | 170 | .muxval = 1, |
193 | .cctl = 0, | ||
194 | .periph_buses = PL08X_AHB1, | 171 | .periph_buses = PL08X_AHB1, |
195 | }, { | 172 | }, { |
196 | .bus_id = "ras3_tx", | 173 | .bus_id = "ras3_tx", |
197 | .min_signal = 7, | 174 | .min_signal = 7, |
198 | .max_signal = 7, | 175 | .max_signal = 7, |
199 | .muxval = 1, | 176 | .muxval = 1, |
200 | .cctl = 0, | ||
201 | .periph_buses = PL08X_AHB1, | 177 | .periph_buses = PL08X_AHB1, |
202 | }, { | 178 | }, { |
203 | .bus_id = "ras4_rx", | 179 | .bus_id = "ras4_rx", |
204 | .min_signal = 8, | 180 | .min_signal = 8, |
205 | .max_signal = 8, | 181 | .max_signal = 8, |
206 | .muxval = 1, | 182 | .muxval = 1, |
207 | .cctl = 0, | ||
208 | .periph_buses = PL08X_AHB1, | 183 | .periph_buses = PL08X_AHB1, |
209 | }, { | 184 | }, { |
210 | .bus_id = "ras4_tx", | 185 | .bus_id = "ras4_tx", |
211 | .min_signal = 9, | 186 | .min_signal = 9, |
212 | .max_signal = 9, | 187 | .max_signal = 9, |
213 | .muxval = 1, | 188 | .muxval = 1, |
214 | .cctl = 0, | ||
215 | .periph_buses = PL08X_AHB1, | 189 | .periph_buses = PL08X_AHB1, |
216 | }, { | 190 | }, { |
217 | .bus_id = "ras5_rx", | 191 | .bus_id = "ras5_rx", |
218 | .min_signal = 10, | 192 | .min_signal = 10, |
219 | .max_signal = 10, | 193 | .max_signal = 10, |
220 | .muxval = 1, | 194 | .muxval = 1, |
221 | .cctl = 0, | ||
222 | .periph_buses = PL08X_AHB1, | 195 | .periph_buses = PL08X_AHB1, |
223 | }, { | 196 | }, { |
224 | .bus_id = "ras5_tx", | 197 | .bus_id = "ras5_tx", |
225 | .min_signal = 11, | 198 | .min_signal = 11, |
226 | .max_signal = 11, | 199 | .max_signal = 11, |
227 | .muxval = 1, | 200 | .muxval = 1, |
228 | .cctl = 0, | ||
229 | .periph_buses = PL08X_AHB1, | 201 | .periph_buses = PL08X_AHB1, |
230 | }, { | 202 | }, { |
231 | .bus_id = "ras6_rx", | 203 | .bus_id = "ras6_rx", |
232 | .min_signal = 12, | 204 | .min_signal = 12, |
233 | .max_signal = 12, | 205 | .max_signal = 12, |
234 | .muxval = 1, | 206 | .muxval = 1, |
235 | .cctl = 0, | ||
236 | .periph_buses = PL08X_AHB1, | 207 | .periph_buses = PL08X_AHB1, |
237 | }, { | 208 | }, { |
238 | .bus_id = "ras6_tx", | 209 | .bus_id = "ras6_tx", |
239 | .min_signal = 13, | 210 | .min_signal = 13, |
240 | .max_signal = 13, | 211 | .max_signal = 13, |
241 | .muxval = 1, | 212 | .muxval = 1, |
242 | .cctl = 0, | ||
243 | .periph_buses = PL08X_AHB1, | 213 | .periph_buses = PL08X_AHB1, |
244 | }, { | 214 | }, { |
245 | .bus_id = "ras7_rx", | 215 | .bus_id = "ras7_rx", |
246 | .min_signal = 14, | 216 | .min_signal = 14, |
247 | .max_signal = 14, | 217 | .max_signal = 14, |
248 | .muxval = 1, | 218 | .muxval = 1, |
249 | .cctl = 0, | ||
250 | .periph_buses = PL08X_AHB1, | 219 | .periph_buses = PL08X_AHB1, |
251 | }, { | 220 | }, { |
252 | .bus_id = "ras7_tx", | 221 | .bus_id = "ras7_tx", |
253 | .min_signal = 15, | 222 | .min_signal = 15, |
254 | .max_signal = 15, | 223 | .max_signal = 15, |
255 | .muxval = 1, | 224 | .muxval = 1, |
256 | .cctl = 0, | ||
257 | .periph_buses = PL08X_AHB1, | 225 | .periph_buses = PL08X_AHB1, |
258 | }, { | 226 | }, { |
259 | .bus_id = "ext0_rx", | 227 | .bus_id = "ext0_rx", |
260 | .min_signal = 0, | 228 | .min_signal = 0, |
261 | .max_signal = 0, | 229 | .max_signal = 0, |
262 | .muxval = 2, | 230 | .muxval = 2, |
263 | .cctl = 0, | ||
264 | .periph_buses = PL08X_AHB2, | 231 | .periph_buses = PL08X_AHB2, |
265 | }, { | 232 | }, { |
266 | .bus_id = "ext0_tx", | 233 | .bus_id = "ext0_tx", |
267 | .min_signal = 1, | 234 | .min_signal = 1, |
268 | .max_signal = 1, | 235 | .max_signal = 1, |
269 | .muxval = 2, | 236 | .muxval = 2, |
270 | .cctl = 0, | ||
271 | .periph_buses = PL08X_AHB2, | 237 | .periph_buses = PL08X_AHB2, |
272 | }, { | 238 | }, { |
273 | .bus_id = "ext1_rx", | 239 | .bus_id = "ext1_rx", |
274 | .min_signal = 2, | 240 | .min_signal = 2, |
275 | .max_signal = 2, | 241 | .max_signal = 2, |
276 | .muxval = 2, | 242 | .muxval = 2, |
277 | .cctl = 0, | ||
278 | .periph_buses = PL08X_AHB2, | 243 | .periph_buses = PL08X_AHB2, |
279 | }, { | 244 | }, { |
280 | .bus_id = "ext1_tx", | 245 | .bus_id = "ext1_tx", |
281 | .min_signal = 3, | 246 | .min_signal = 3, |
282 | .max_signal = 3, | 247 | .max_signal = 3, |
283 | .muxval = 2, | 248 | .muxval = 2, |
284 | .cctl = 0, | ||
285 | .periph_buses = PL08X_AHB2, | 249 | .periph_buses = PL08X_AHB2, |
286 | }, { | 250 | }, { |
287 | .bus_id = "ext2_rx", | 251 | .bus_id = "ext2_rx", |
288 | .min_signal = 4, | 252 | .min_signal = 4, |
289 | .max_signal = 4, | 253 | .max_signal = 4, |
290 | .muxval = 2, | 254 | .muxval = 2, |
291 | .cctl = 0, | ||
292 | .periph_buses = PL08X_AHB2, | 255 | .periph_buses = PL08X_AHB2, |
293 | }, { | 256 | }, { |
294 | .bus_id = "ext2_tx", | 257 | .bus_id = "ext2_tx", |
295 | .min_signal = 5, | 258 | .min_signal = 5, |
296 | .max_signal = 5, | 259 | .max_signal = 5, |
297 | .muxval = 2, | 260 | .muxval = 2, |
298 | .cctl = 0, | ||
299 | .periph_buses = PL08X_AHB2, | 261 | .periph_buses = PL08X_AHB2, |
300 | }, { | 262 | }, { |
301 | .bus_id = "ext3_rx", | 263 | .bus_id = "ext3_rx", |
302 | .min_signal = 6, | 264 | .min_signal = 6, |
303 | .max_signal = 6, | 265 | .max_signal = 6, |
304 | .muxval = 2, | 266 | .muxval = 2, |
305 | .cctl = 0, | ||
306 | .periph_buses = PL08X_AHB2, | 267 | .periph_buses = PL08X_AHB2, |
307 | }, { | 268 | }, { |
308 | .bus_id = "ext3_tx", | 269 | .bus_id = "ext3_tx", |
309 | .min_signal = 7, | 270 | .min_signal = 7, |
310 | .max_signal = 7, | 271 | .max_signal = 7, |
311 | .muxval = 2, | 272 | .muxval = 2, |
312 | .cctl = 0, | ||
313 | .periph_buses = PL08X_AHB2, | 273 | .periph_buses = PL08X_AHB2, |
314 | }, { | 274 | }, { |
315 | .bus_id = "ext4_rx", | 275 | .bus_id = "ext4_rx", |
316 | .min_signal = 8, | 276 | .min_signal = 8, |
317 | .max_signal = 8, | 277 | .max_signal = 8, |
318 | .muxval = 2, | 278 | .muxval = 2, |
319 | .cctl = 0, | ||
320 | .periph_buses = PL08X_AHB2, | 279 | .periph_buses = PL08X_AHB2, |
321 | }, { | 280 | }, { |
322 | .bus_id = "ext4_tx", | 281 | .bus_id = "ext4_tx", |
323 | .min_signal = 9, | 282 | .min_signal = 9, |
324 | .max_signal = 9, | 283 | .max_signal = 9, |
325 | .muxval = 2, | 284 | .muxval = 2, |
326 | .cctl = 0, | ||
327 | .periph_buses = PL08X_AHB2, | 285 | .periph_buses = PL08X_AHB2, |
328 | }, { | 286 | }, { |
329 | .bus_id = "ext5_rx", | 287 | .bus_id = "ext5_rx", |
330 | .min_signal = 10, | 288 | .min_signal = 10, |
331 | .max_signal = 10, | 289 | .max_signal = 10, |
332 | .muxval = 2, | 290 | .muxval = 2, |
333 | .cctl = 0, | ||
334 | .periph_buses = PL08X_AHB2, | 291 | .periph_buses = PL08X_AHB2, |
335 | }, { | 292 | }, { |
336 | .bus_id = "ext5_tx", | 293 | .bus_id = "ext5_tx", |
337 | .min_signal = 11, | 294 | .min_signal = 11, |
338 | .max_signal = 11, | 295 | .max_signal = 11, |
339 | .muxval = 2, | 296 | .muxval = 2, |
340 | .cctl = 0, | ||
341 | .periph_buses = PL08X_AHB2, | 297 | .periph_buses = PL08X_AHB2, |
342 | }, { | 298 | }, { |
343 | .bus_id = "ext6_rx", | 299 | .bus_id = "ext6_rx", |
344 | .min_signal = 12, | 300 | .min_signal = 12, |
345 | .max_signal = 12, | 301 | .max_signal = 12, |
346 | .muxval = 2, | 302 | .muxval = 2, |
347 | .cctl = 0, | ||
348 | .periph_buses = PL08X_AHB2, | 303 | .periph_buses = PL08X_AHB2, |
349 | }, { | 304 | }, { |
350 | .bus_id = "ext6_tx", | 305 | .bus_id = "ext6_tx", |
351 | .min_signal = 13, | 306 | .min_signal = 13, |
352 | .max_signal = 13, | 307 | .max_signal = 13, |
353 | .muxval = 2, | 308 | .muxval = 2, |
354 | .cctl = 0, | ||
355 | .periph_buses = PL08X_AHB2, | 309 | .periph_buses = PL08X_AHB2, |
356 | }, { | 310 | }, { |
357 | .bus_id = "ext7_rx", | 311 | .bus_id = "ext7_rx", |
358 | .min_signal = 14, | 312 | .min_signal = 14, |
359 | .max_signal = 14, | 313 | .max_signal = 14, |
360 | .muxval = 2, | 314 | .muxval = 2, |
361 | .cctl = 0, | ||
362 | .periph_buses = PL08X_AHB2, | 315 | .periph_buses = PL08X_AHB2, |
363 | }, { | 316 | }, { |
364 | .bus_id = "ext7_tx", | 317 | .bus_id = "ext7_tx", |
365 | .min_signal = 15, | 318 | .min_signal = 15, |
366 | .max_signal = 15, | 319 | .max_signal = 15, |
367 | .muxval = 2, | 320 | .muxval = 2, |
368 | .cctl = 0, | ||
369 | .periph_buses = PL08X_AHB2, | 321 | .periph_buses = PL08X_AHB2, |
370 | }, | 322 | }, |
371 | }; | 323 | }; |
@@ -373,7 +325,8 @@ static struct pl08x_channel_data spear600_dma_info[] = { | |||
373 | struct pl08x_platform_data pl080_plat_data = { | 325 | struct pl08x_platform_data pl080_plat_data = { |
374 | .memcpy_channel = { | 326 | .memcpy_channel = { |
375 | .bus_id = "memcpy", | 327 | .bus_id = "memcpy", |
376 | .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ | 328 | .cctl_memcpy = |
329 | (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ | ||
377 | PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ | 330 | PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ |
378 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ | 331 | PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ |
379 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ | 332 | PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ |
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index d0de9c1192f7..c0999633a9ab 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c | |||
@@ -64,7 +64,8 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { | |||
64 | &tegra_ehci2_pdata), | 64 | &tegra_ehci2_pdata), |
65 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", | 65 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", |
66 | &tegra_ehci3_pdata), | 66 | &tegra_ehci3_pdata), |
67 | OF_DEV_AUXDATA("nvidia,tegra20-apbdma", 0x6000a000, "tegra-apbdma", NULL), | 67 | OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL), |
68 | OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), | ||
68 | {} | 69 | {} |
69 | }; | 70 | }; |
70 | 71 | ||
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index ee48214bfd89..53bf60f11580 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c | |||
@@ -33,6 +33,8 @@ | |||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/hardware/gic.h> | 34 | #include <asm/hardware/gic.h> |
35 | 35 | ||
36 | #include <mach/iomap.h> | ||
37 | |||
36 | #include "board.h" | 38 | #include "board.h" |
37 | #include "clock.h" | 39 | #include "clock.h" |
38 | 40 | ||
@@ -48,6 +50,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { | |||
48 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL), | 50 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL), |
49 | OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), | 51 | OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), |
50 | OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), | 52 | OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), |
53 | OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), | ||
51 | {} | 54 | {} |
52 | }; | 55 | }; |
53 | 56 | ||
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index a310222951da..8674a890fd1c 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/i2c.h> | 17 | #include <linux/i2c.h> |
18 | #include <linux/platform_data/i2c-nomadik.h> | ||
18 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
19 | #include <linux/amba/bus.h> | 20 | #include <linux/amba/bus.h> |
20 | #include <linux/amba/pl022.h> | 21 | #include <linux/amba/pl022.h> |
@@ -40,7 +41,6 @@ | |||
40 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
41 | #include <asm/hardware/gic.h> | 42 | #include <asm/hardware/gic.h> |
42 | 43 | ||
43 | #include <plat/i2c.h> | ||
44 | #include <plat/ste_dma40.h> | 44 | #include <plat/ste_dma40.h> |
45 | #include <plat/gpio-nomadik.h> | 45 | #include <plat/gpio-nomadik.h> |
46 | 46 | ||
@@ -211,24 +211,6 @@ static struct ab8500_platform_data ab8500_platdata = { | |||
211 | .codec = &ab8500_codec_pdata, | 211 | .codec = &ab8500_codec_pdata, |
212 | }; | 212 | }; |
213 | 213 | ||
214 | static struct resource ab8500_resources[] = { | ||
215 | [0] = { | ||
216 | .start = IRQ_DB8500_AB8500, | ||
217 | .end = IRQ_DB8500_AB8500, | ||
218 | .flags = IORESOURCE_IRQ | ||
219 | } | ||
220 | }; | ||
221 | |||
222 | struct platform_device ab8500_device = { | ||
223 | .name = "ab8500-core", | ||
224 | .id = 0, | ||
225 | .dev = { | ||
226 | .platform_data = &ab8500_platdata, | ||
227 | }, | ||
228 | .num_resources = 1, | ||
229 | .resource = ab8500_resources, | ||
230 | }; | ||
231 | |||
232 | /* | 214 | /* |
233 | * TPS61052 | 215 | * TPS61052 |
234 | */ | 216 | */ |
@@ -443,7 +425,6 @@ static struct hash_platform_data u8500_hash1_platform_data = { | |||
443 | /* add any platform devices here - TODO */ | 425 | /* add any platform devices here - TODO */ |
444 | static struct platform_device *mop500_platform_devs[] __initdata = { | 426 | static struct platform_device *mop500_platform_devs[] __initdata = { |
445 | &mop500_gpio_keys_device, | 427 | &mop500_gpio_keys_device, |
446 | &ab8500_device, | ||
447 | }; | 428 | }; |
448 | 429 | ||
449 | #ifdef CONFIG_STE_DMA40 | 430 | #ifdef CONFIG_STE_DMA40 |
@@ -605,7 +586,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = { | |||
605 | &snowball_led_dev, | 586 | &snowball_led_dev, |
606 | &snowball_key_dev, | 587 | &snowball_key_dev, |
607 | &snowball_sbnet_dev, | 588 | &snowball_sbnet_dev, |
608 | &ab8500_device, | ||
609 | }; | 589 | }; |
610 | 590 | ||
611 | static void __init mop500_init_machine(void) | 591 | static void __init mop500_init_machine(void) |
@@ -617,9 +597,8 @@ static void __init mop500_init_machine(void) | |||
617 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; | 597 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; |
618 | 598 | ||
619 | mop500_pinmaps_init(); | 599 | mop500_pinmaps_init(); |
620 | parent = u8500_init_devices(); | 600 | parent = u8500_init_devices(&ab8500_platdata); |
621 | 601 | ||
622 | /* FIXME: parent of ab8500 should be prcmu */ | ||
623 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) | 602 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
624 | mop500_platform_devs[i]->dev.parent = parent; | 603 | mop500_platform_devs[i]->dev.parent = parent; |
625 | 604 | ||
@@ -652,7 +631,7 @@ static void __init snowball_init_machine(void) | |||
652 | int i; | 631 | int i; |
653 | 632 | ||
654 | snowball_pinmaps_init(); | 633 | snowball_pinmaps_init(); |
655 | parent = u8500_init_devices(); | 634 | parent = u8500_init_devices(&ab8500_platdata); |
656 | 635 | ||
657 | for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) | 636 | for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) |
658 | snowball_platform_devs[i]->dev.parent = parent; | 637 | snowball_platform_devs[i]->dev.parent = parent; |
@@ -684,7 +663,7 @@ static void __init hrefv60_init_machine(void) | |||
684 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; | 663 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; |
685 | 664 | ||
686 | hrefv60_pinmaps_init(); | 665 | hrefv60_pinmaps_init(); |
687 | parent = u8500_init_devices(); | 666 | parent = u8500_init_devices(&ab8500_platdata); |
688 | 667 | ||
689 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) | 668 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
690 | mop500_platform_devs[i]->dev.parent = parent; | 669 | mop500_platform_devs[i]->dev.parent = parent; |
@@ -785,9 +764,6 @@ static const struct of_device_id u8500_local_bus_nodes[] = { | |||
785 | /* only create devices below soc node */ | 764 | /* only create devices below soc node */ |
786 | { .compatible = "stericsson,db8500", }, | 765 | { .compatible = "stericsson,db8500", }, |
787 | { .compatible = "stericsson,db8500-prcmu", }, | 766 | { .compatible = "stericsson,db8500-prcmu", }, |
788 | { .compatible = "stericsson,db8500-prcmu-regulator", }, | ||
789 | { .compatible = "stericsson,ab8500", }, | ||
790 | { .compatible = "stericsson,ab8500-regulator", }, | ||
791 | { .compatible = "simple-bus"}, | 767 | { .compatible = "simple-bus"}, |
792 | { }, | 768 | { }, |
793 | }; | 769 | }; |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index c8dd94f606dc..db3c52d56ca4 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/irq.h> | 16 | #include <linux/irq.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/mfd/abx500/ab8500.h> | ||
19 | 20 | ||
20 | #include <asm/mach/map.h> | 21 | #include <asm/mach/map.h> |
21 | #include <asm/pmu.h> | 22 | #include <asm/pmu.h> |
@@ -115,7 +116,7 @@ static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler) | |||
115 | return ret; | 116 | return ret; |
116 | } | 117 | } |
117 | 118 | ||
118 | static struct arm_pmu_platdata db8500_pmu_platdata = { | 119 | struct arm_pmu_platdata db8500_pmu_platdata = { |
119 | .handle_irq = db8500_pmu_handler, | 120 | .handle_irq = db8500_pmu_handler, |
120 | }; | 121 | }; |
121 | 122 | ||
@@ -206,7 +207,7 @@ static struct device * __init db8500_soc_device_init(void) | |||
206 | /* | 207 | /* |
207 | * This function is called from the board init | 208 | * This function is called from the board init |
208 | */ | 209 | */ |
209 | struct device * __init u8500_init_devices(void) | 210 | struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500) |
210 | { | 211 | { |
211 | struct device *parent; | 212 | struct device *parent; |
212 | int i; | 213 | int i; |
@@ -223,6 +224,8 @@ struct device * __init u8500_init_devices(void) | |||
223 | for (i = 0; i < ARRAY_SIZE(platform_devs); i++) | 224 | for (i = 0; i < ARRAY_SIZE(platform_devs); i++) |
224 | platform_devs[i]->dev.parent = parent; | 225 | platform_devs[i]->dev.parent = parent; |
225 | 226 | ||
227 | db8500_prcmu_device.dev.platform_data = ab8500; | ||
228 | |||
226 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); | 229 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); |
227 | 230 | ||
228 | return parent; | 231 | return parent; |
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h index 6e4706560266..ecdd8386cffb 100644 --- a/arch/arm/mach-ux500/devices-common.h +++ b/arch/arm/mach-ux500/devices-common.h | |||
@@ -12,7 +12,7 @@ | |||
12 | #include <linux/dma-mapping.h> | 12 | #include <linux/dma-mapping.h> |
13 | #include <linux/sys_soc.h> | 13 | #include <linux/sys_soc.h> |
14 | #include <linux/amba/bus.h> | 14 | #include <linux/amba/bus.h> |
15 | #include <plat/i2c.h> | 15 | #include <linux/platform_data/i2c-nomadik.h> |
16 | #include <mach/crypto-ux500.h> | 16 | #include <mach/crypto-ux500.h> |
17 | 17 | ||
18 | struct spi_master_cntlr; | 18 | struct spi_master_cntlr; |
@@ -56,27 +56,15 @@ dbx500_add_uart(struct device *parent, const char *name, resource_size_t base, | |||
56 | 56 | ||
57 | struct nmk_i2c_controller; | 57 | struct nmk_i2c_controller; |
58 | 58 | ||
59 | static inline struct platform_device * | 59 | static inline struct amba_device * |
60 | dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq, | 60 | dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq, |
61 | struct nmk_i2c_controller *data) | 61 | struct nmk_i2c_controller *data) |
62 | { | 62 | { |
63 | struct resource res[] = { | 63 | /* Conjure a name similar to what the platform device used to have */ |
64 | DEFINE_RES_MEM(base, SZ_4K), | 64 | char name[16]; |
65 | DEFINE_RES_IRQ(irq), | ||
66 | }; | ||
67 | 65 | ||
68 | struct platform_device_info pdevinfo = { | 66 | snprintf(name, sizeof(name), "nmk-i2c.%d", id); |
69 | .parent = parent, | 67 | return amba_apb_device_add(parent, name, base, SZ_4K, irq, 0, data, 0); |
70 | .name = "nmk-i2c", | ||
71 | .id = id, | ||
72 | .res = res, | ||
73 | .num_res = ARRAY_SIZE(res), | ||
74 | .data = data, | ||
75 | .size_data = sizeof(*data), | ||
76 | .dma_mask = DMA_BIT_MASK(32), | ||
77 | }; | ||
78 | |||
79 | return platform_device_register_full(&pdevinfo); | ||
80 | } | 68 | } |
81 | 69 | ||
82 | static inline struct amba_device * | 70 | static inline struct amba_device * |
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h index 8b7ed82a2866..7914e5eaa9c7 100644 --- a/arch/arm/mach-ux500/include/mach/setup.h +++ b/arch/arm/mach-ux500/include/mach/setup.h | |||
@@ -13,11 +13,12 @@ | |||
13 | 13 | ||
14 | #include <asm/mach/time.h> | 14 | #include <asm/mach/time.h> |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/mfd/abx500/ab8500.h> | ||
16 | 17 | ||
17 | void __init ux500_map_io(void); | 18 | void __init ux500_map_io(void); |
18 | extern void __init u8500_map_io(void); | 19 | extern void __init u8500_map_io(void); |
19 | 20 | ||
20 | extern struct device * __init u8500_init_devices(void); | 21 | extern struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500); |
21 | 22 | ||
22 | extern void __init ux500_init_irq(void); | 23 | extern void __init ux500_init_irq(void); |
23 | extern void __init ux500_init_late(void); | 24 | extern void __init ux500_init_late(void); |
diff --git a/arch/arm/mach-vt8500/Makefile b/arch/arm/mach-vt8500/Makefile index 54e69973f39b..7ce51767c99c 100644 --- a/arch/arm/mach-vt8500/Makefile +++ b/arch/arm/mach-vt8500/Makefile | |||
@@ -5,5 +5,3 @@ obj-$(CONFIG_VTWM_VERSION_WM8505) += devices-wm8505.o | |||
5 | 5 | ||
6 | obj-$(CONFIG_MACH_BV07) += bv07.o | 6 | obj-$(CONFIG_MACH_BV07) += bv07.o |
7 | obj-$(CONFIG_MACH_WM8505_7IN_NETBOOK) += wm8505_7in.o | 7 | obj-$(CONFIG_MACH_WM8505_7IN_NETBOOK) += wm8505_7in.o |
8 | |||
9 | obj-$(CONFIG_HAVE_PWM) += pwm.o | ||
diff --git a/arch/arm/mach-vt8500/pwm.c b/arch/arm/mach-vt8500/pwm.c deleted file mode 100644 index 8ad825e93592..000000000000 --- a/arch/arm/mach-vt8500/pwm.c +++ /dev/null | |||
@@ -1,265 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/pwm.c | ||
3 | * | ||
4 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #include <linux/module.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include <linux/err.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/pwm.h> | ||
23 | #include <linux/delay.h> | ||
24 | |||
25 | #include <asm/div64.h> | ||
26 | |||
27 | #define VT8500_NR_PWMS 4 | ||
28 | |||
29 | static DEFINE_MUTEX(pwm_lock); | ||
30 | static LIST_HEAD(pwm_list); | ||
31 | |||
32 | struct pwm_device { | ||
33 | struct list_head node; | ||
34 | struct platform_device *pdev; | ||
35 | |||
36 | const char *label; | ||
37 | |||
38 | void __iomem *regbase; | ||
39 | |||
40 | unsigned int use_count; | ||
41 | unsigned int pwm_id; | ||
42 | }; | ||
43 | |||
44 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | ||
45 | static inline void pwm_busy_wait(void __iomem *reg, u8 bitmask) | ||
46 | { | ||
47 | int loops = msecs_to_loops(10); | ||
48 | while ((readb(reg) & bitmask) && --loops) | ||
49 | cpu_relax(); | ||
50 | |||
51 | if (unlikely(!loops)) | ||
52 | pr_warning("Waiting for status bits 0x%x to clear timed out\n", | ||
53 | bitmask); | ||
54 | } | ||
55 | |||
56 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
57 | { | ||
58 | unsigned long long c; | ||
59 | unsigned long period_cycles, prescale, pv, dc; | ||
60 | |||
61 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | ||
62 | return -EINVAL; | ||
63 | |||
64 | c = 25000000/2; /* wild guess --- need to implement clocks */ | ||
65 | c = c * period_ns; | ||
66 | do_div(c, 1000000000); | ||
67 | period_cycles = c; | ||
68 | |||
69 | if (period_cycles < 1) | ||
70 | period_cycles = 1; | ||
71 | prescale = (period_cycles - 1) / 4096; | ||
72 | pv = period_cycles / (prescale + 1) - 1; | ||
73 | if (pv > 4095) | ||
74 | pv = 4095; | ||
75 | |||
76 | if (prescale > 1023) | ||
77 | return -EINVAL; | ||
78 | |||
79 | c = (unsigned long long)pv * duty_ns; | ||
80 | do_div(c, period_ns); | ||
81 | dc = c; | ||
82 | |||
83 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 1)); | ||
84 | writel(prescale, pwm->regbase + 0x4 + (pwm->pwm_id << 4)); | ||
85 | |||
86 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 2)); | ||
87 | writel(pv, pwm->regbase + 0x8 + (pwm->pwm_id << 4)); | ||
88 | |||
89 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 3)); | ||
90 | writel(dc, pwm->regbase + 0xc + (pwm->pwm_id << 4)); | ||
91 | |||
92 | return 0; | ||
93 | } | ||
94 | EXPORT_SYMBOL(pwm_config); | ||
95 | |||
96 | int pwm_enable(struct pwm_device *pwm) | ||
97 | { | ||
98 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 0)); | ||
99 | writel(5, pwm->regbase + (pwm->pwm_id << 4)); | ||
100 | return 0; | ||
101 | } | ||
102 | EXPORT_SYMBOL(pwm_enable); | ||
103 | |||
104 | void pwm_disable(struct pwm_device *pwm) | ||
105 | { | ||
106 | pwm_busy_wait(pwm->regbase + 0x40 + pwm->pwm_id, (1 << 0)); | ||
107 | writel(0, pwm->regbase + (pwm->pwm_id << 4)); | ||
108 | } | ||
109 | EXPORT_SYMBOL(pwm_disable); | ||
110 | |||
111 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
112 | { | ||
113 | struct pwm_device *pwm; | ||
114 | int found = 0; | ||
115 | |||
116 | mutex_lock(&pwm_lock); | ||
117 | |||
118 | list_for_each_entry(pwm, &pwm_list, node) { | ||
119 | if (pwm->pwm_id == pwm_id) { | ||
120 | found = 1; | ||
121 | break; | ||
122 | } | ||
123 | } | ||
124 | |||
125 | if (found) { | ||
126 | if (pwm->use_count == 0) { | ||
127 | pwm->use_count++; | ||
128 | pwm->label = label; | ||
129 | } else { | ||
130 | pwm = ERR_PTR(-EBUSY); | ||
131 | } | ||
132 | } else { | ||
133 | pwm = ERR_PTR(-ENOENT); | ||
134 | } | ||
135 | |||
136 | mutex_unlock(&pwm_lock); | ||
137 | return pwm; | ||
138 | } | ||
139 | EXPORT_SYMBOL(pwm_request); | ||
140 | |||
141 | void pwm_free(struct pwm_device *pwm) | ||
142 | { | ||
143 | mutex_lock(&pwm_lock); | ||
144 | |||
145 | if (pwm->use_count) { | ||
146 | pwm->use_count--; | ||
147 | pwm->label = NULL; | ||
148 | } else { | ||
149 | pr_warning("PWM device already freed\n"); | ||
150 | } | ||
151 | |||
152 | mutex_unlock(&pwm_lock); | ||
153 | } | ||
154 | EXPORT_SYMBOL(pwm_free); | ||
155 | |||
156 | static inline void __add_pwm(struct pwm_device *pwm) | ||
157 | { | ||
158 | mutex_lock(&pwm_lock); | ||
159 | list_add_tail(&pwm->node, &pwm_list); | ||
160 | mutex_unlock(&pwm_lock); | ||
161 | } | ||
162 | |||
163 | static int __devinit pwm_probe(struct platform_device *pdev) | ||
164 | { | ||
165 | struct pwm_device *pwms; | ||
166 | struct resource *r; | ||
167 | int ret = 0; | ||
168 | int i; | ||
169 | |||
170 | pwms = kzalloc(sizeof(struct pwm_device) * VT8500_NR_PWMS, GFP_KERNEL); | ||
171 | if (pwms == NULL) { | ||
172 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
173 | return -ENOMEM; | ||
174 | } | ||
175 | |||
176 | for (i = 0; i < VT8500_NR_PWMS; i++) { | ||
177 | pwms[i].use_count = 0; | ||
178 | pwms[i].pwm_id = i; | ||
179 | pwms[i].pdev = pdev; | ||
180 | } | ||
181 | |||
182 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
183 | if (r == NULL) { | ||
184 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
185 | ret = -ENODEV; | ||
186 | goto err_free; | ||
187 | } | ||
188 | |||
189 | r = request_mem_region(r->start, resource_size(r), pdev->name); | ||
190 | if (r == NULL) { | ||
191 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
192 | ret = -EBUSY; | ||
193 | goto err_free; | ||
194 | } | ||
195 | |||
196 | pwms[0].regbase = ioremap(r->start, resource_size(r)); | ||
197 | if (pwms[0].regbase == NULL) { | ||
198 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
199 | ret = -ENODEV; | ||
200 | goto err_free_mem; | ||
201 | } | ||
202 | |||
203 | for (i = 1; i < VT8500_NR_PWMS; i++) | ||
204 | pwms[i].regbase = pwms[0].regbase; | ||
205 | |||
206 | for (i = 0; i < VT8500_NR_PWMS; i++) | ||
207 | __add_pwm(&pwms[i]); | ||
208 | |||
209 | platform_set_drvdata(pdev, pwms); | ||
210 | return 0; | ||
211 | |||
212 | err_free_mem: | ||
213 | release_mem_region(r->start, resource_size(r)); | ||
214 | err_free: | ||
215 | kfree(pwms); | ||
216 | return ret; | ||
217 | } | ||
218 | |||
219 | static int __devexit pwm_remove(struct platform_device *pdev) | ||
220 | { | ||
221 | struct pwm_device *pwms; | ||
222 | struct resource *r; | ||
223 | int i; | ||
224 | |||
225 | pwms = platform_get_drvdata(pdev); | ||
226 | if (pwms == NULL) | ||
227 | return -ENODEV; | ||
228 | |||
229 | mutex_lock(&pwm_lock); | ||
230 | |||
231 | for (i = 0; i < VT8500_NR_PWMS; i++) | ||
232 | list_del(&pwms[i].node); | ||
233 | mutex_unlock(&pwm_lock); | ||
234 | |||
235 | iounmap(pwms[0].regbase); | ||
236 | |||
237 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
238 | release_mem_region(r->start, resource_size(r)); | ||
239 | |||
240 | kfree(pwms); | ||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | static struct platform_driver pwm_driver = { | ||
245 | .driver = { | ||
246 | .name = "vt8500-pwm", | ||
247 | .owner = THIS_MODULE, | ||
248 | }, | ||
249 | .probe = pwm_probe, | ||
250 | .remove = __devexit_p(pwm_remove), | ||
251 | }; | ||
252 | |||
253 | static int __init pwm_init(void) | ||
254 | { | ||
255 | return platform_driver_register(&pwm_driver); | ||
256 | } | ||
257 | arch_initcall(pwm_init); | ||
258 | |||
259 | static void __exit pwm_exit(void) | ||
260 | { | ||
261 | platform_driver_unregister(&pwm_driver); | ||
262 | } | ||
263 | module_exit(pwm_exit); | ||
264 | |||
265 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index 806cc4f63516..119bc52ab93e 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/percpu.h> | 14 | #include <linux/percpu.h> |
15 | 15 | ||
16 | #include <asm/mmu_context.h> | 16 | #include <asm/mmu_context.h> |
17 | #include <asm/thread_notify.h> | ||
17 | #include <asm/tlbflush.h> | 18 | #include <asm/tlbflush.h> |
18 | 19 | ||
19 | static DEFINE_RAW_SPINLOCK(cpu_asid_lock); | 20 | static DEFINE_RAW_SPINLOCK(cpu_asid_lock); |
@@ -48,6 +49,40 @@ void cpu_set_reserved_ttbr0(void) | |||
48 | } | 49 | } |
49 | #endif | 50 | #endif |
50 | 51 | ||
52 | #ifdef CONFIG_PID_IN_CONTEXTIDR | ||
53 | static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd, | ||
54 | void *t) | ||
55 | { | ||
56 | u32 contextidr; | ||
57 | pid_t pid; | ||
58 | struct thread_info *thread = t; | ||
59 | |||
60 | if (cmd != THREAD_NOTIFY_SWITCH) | ||
61 | return NOTIFY_DONE; | ||
62 | |||
63 | pid = task_pid_nr(thread->task) << ASID_BITS; | ||
64 | asm volatile( | ||
65 | " mrc p15, 0, %0, c13, c0, 1\n" | ||
66 | " bfi %1, %0, #0, %2\n" | ||
67 | " mcr p15, 0, %1, c13, c0, 1\n" | ||
68 | : "=r" (contextidr), "+r" (pid) | ||
69 | : "I" (ASID_BITS)); | ||
70 | isb(); | ||
71 | |||
72 | return NOTIFY_OK; | ||
73 | } | ||
74 | |||
75 | static struct notifier_block contextidr_notifier_block = { | ||
76 | .notifier_call = contextidr_notifier, | ||
77 | }; | ||
78 | |||
79 | static int __init contextidr_notifier_init(void) | ||
80 | { | ||
81 | return thread_register_notifier(&contextidr_notifier_block); | ||
82 | } | ||
83 | arch_initcall(contextidr_notifier_init); | ||
84 | #endif | ||
85 | |||
51 | /* | 86 | /* |
52 | * We fork()ed a process, and we need a new context for the child | 87 | * We fork()ed a process, and we need a new context for the child |
53 | * to run in. | 88 | * to run in. |
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 655878bcc96d..c2cdf6500f75 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -22,13 +22,14 @@ | |||
22 | #include <linux/memblock.h> | 22 | #include <linux/memblock.h> |
23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
24 | #include <linux/iommu.h> | 24 | #include <linux/iommu.h> |
25 | #include <linux/io.h> | ||
25 | #include <linux/vmalloc.h> | 26 | #include <linux/vmalloc.h> |
27 | #include <linux/sizes.h> | ||
26 | 28 | ||
27 | #include <asm/memory.h> | 29 | #include <asm/memory.h> |
28 | #include <asm/highmem.h> | 30 | #include <asm/highmem.h> |
29 | #include <asm/cacheflush.h> | 31 | #include <asm/cacheflush.h> |
30 | #include <asm/tlbflush.h> | 32 | #include <asm/tlbflush.h> |
31 | #include <asm/sizes.h> | ||
32 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
33 | #include <asm/dma-iommu.h> | 34 | #include <asm/dma-iommu.h> |
34 | #include <asm/mach/map.h> | 35 | #include <asm/mach/map.h> |
@@ -72,7 +73,7 @@ static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page, | |||
72 | unsigned long offset, size_t size, enum dma_data_direction dir, | 73 | unsigned long offset, size_t size, enum dma_data_direction dir, |
73 | struct dma_attrs *attrs) | 74 | struct dma_attrs *attrs) |
74 | { | 75 | { |
75 | if (!arch_is_coherent()) | 76 | if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs)) |
76 | __dma_page_cpu_to_dev(page, offset, size, dir); | 77 | __dma_page_cpu_to_dev(page, offset, size, dir); |
77 | return pfn_to_dma(dev, page_to_pfn(page)) + offset; | 78 | return pfn_to_dma(dev, page_to_pfn(page)) + offset; |
78 | } | 79 | } |
@@ -95,7 +96,7 @@ static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle, | |||
95 | size_t size, enum dma_data_direction dir, | 96 | size_t size, enum dma_data_direction dir, |
96 | struct dma_attrs *attrs) | 97 | struct dma_attrs *attrs) |
97 | { | 98 | { |
98 | if (!arch_is_coherent()) | 99 | if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs)) |
99 | __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)), | 100 | __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)), |
100 | handle & ~PAGE_MASK, size, dir); | 101 | handle & ~PAGE_MASK, size, dir); |
101 | } | 102 | } |
@@ -124,6 +125,7 @@ struct dma_map_ops arm_dma_ops = { | |||
124 | .alloc = arm_dma_alloc, | 125 | .alloc = arm_dma_alloc, |
125 | .free = arm_dma_free, | 126 | .free = arm_dma_free, |
126 | .mmap = arm_dma_mmap, | 127 | .mmap = arm_dma_mmap, |
128 | .get_sgtable = arm_dma_get_sgtable, | ||
127 | .map_page = arm_dma_map_page, | 129 | .map_page = arm_dma_map_page, |
128 | .unmap_page = arm_dma_unmap_page, | 130 | .unmap_page = arm_dma_unmap_page, |
129 | .map_sg = arm_dma_map_sg, | 131 | .map_sg = arm_dma_map_sg, |
@@ -217,115 +219,70 @@ static void __dma_free_buffer(struct page *page, size_t size) | |||
217 | } | 219 | } |
218 | 220 | ||
219 | #ifdef CONFIG_MMU | 221 | #ifdef CONFIG_MMU |
222 | #ifdef CONFIG_HUGETLB_PAGE | ||
223 | #error ARM Coherent DMA allocator does not (yet) support huge TLB | ||
224 | #endif | ||
220 | 225 | ||
221 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT) | 226 | static void *__alloc_from_contiguous(struct device *dev, size_t size, |
222 | #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT) | 227 | pgprot_t prot, struct page **ret_page); |
223 | |||
224 | /* | ||
225 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations | ||
226 | */ | ||
227 | static pte_t **consistent_pte; | ||
228 | |||
229 | #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M | ||
230 | 228 | ||
231 | static unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE; | 229 | static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp, |
230 | pgprot_t prot, struct page **ret_page, | ||
231 | const void *caller); | ||
232 | 232 | ||
233 | void __init init_consistent_dma_size(unsigned long size) | 233 | static void * |
234 | __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot, | ||
235 | const void *caller) | ||
234 | { | 236 | { |
235 | unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M); | 237 | struct vm_struct *area; |
238 | unsigned long addr; | ||
236 | 239 | ||
237 | BUG_ON(consistent_pte); /* Check we're called before DMA region init */ | 240 | /* |
238 | BUG_ON(base < VMALLOC_END); | 241 | * DMA allocation can be mapped to user space, so lets |
242 | * set VM_USERMAP flags too. | ||
243 | */ | ||
244 | area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP, | ||
245 | caller); | ||
246 | if (!area) | ||
247 | return NULL; | ||
248 | addr = (unsigned long)area->addr; | ||
249 | area->phys_addr = __pfn_to_phys(page_to_pfn(page)); | ||
239 | 250 | ||
240 | /* Grow region to accommodate specified size */ | 251 | if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) { |
241 | if (base < consistent_base) | 252 | vunmap((void *)addr); |
242 | consistent_base = base; | 253 | return NULL; |
254 | } | ||
255 | return (void *)addr; | ||
243 | } | 256 | } |
244 | 257 | ||
245 | #include "vmregion.h" | 258 | static void __dma_free_remap(void *cpu_addr, size_t size) |
246 | |||
247 | static struct arm_vmregion_head consistent_head = { | ||
248 | .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), | ||
249 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), | ||
250 | .vm_end = CONSISTENT_END, | ||
251 | }; | ||
252 | |||
253 | #ifdef CONFIG_HUGETLB_PAGE | ||
254 | #error ARM Coherent DMA allocator does not (yet) support huge TLB | ||
255 | #endif | ||
256 | |||
257 | /* | ||
258 | * Initialise the consistent memory allocation. | ||
259 | */ | ||
260 | static int __init consistent_init(void) | ||
261 | { | 259 | { |
262 | int ret = 0; | 260 | unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP; |
263 | pgd_t *pgd; | 261 | struct vm_struct *area = find_vm_area(cpu_addr); |
264 | pud_t *pud; | 262 | if (!area || (area->flags & flags) != flags) { |
265 | pmd_t *pmd; | 263 | WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr); |
266 | pte_t *pte; | 264 | return; |
267 | int i = 0; | ||
268 | unsigned long base = consistent_base; | ||
269 | unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT; | ||
270 | |||
271 | if (IS_ENABLED(CONFIG_CMA) && !IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)) | ||
272 | return 0; | ||
273 | |||
274 | consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL); | ||
275 | if (!consistent_pte) { | ||
276 | pr_err("%s: no memory\n", __func__); | ||
277 | return -ENOMEM; | ||
278 | } | 265 | } |
279 | 266 | unmap_kernel_range((unsigned long)cpu_addr, size); | |
280 | pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END); | 267 | vunmap(cpu_addr); |
281 | consistent_head.vm_start = base; | ||
282 | |||
283 | do { | ||
284 | pgd = pgd_offset(&init_mm, base); | ||
285 | |||
286 | pud = pud_alloc(&init_mm, pgd, base); | ||
287 | if (!pud) { | ||
288 | pr_err("%s: no pud tables\n", __func__); | ||
289 | ret = -ENOMEM; | ||
290 | break; | ||
291 | } | ||
292 | |||
293 | pmd = pmd_alloc(&init_mm, pud, base); | ||
294 | if (!pmd) { | ||
295 | pr_err("%s: no pmd tables\n", __func__); | ||
296 | ret = -ENOMEM; | ||
297 | break; | ||
298 | } | ||
299 | WARN_ON(!pmd_none(*pmd)); | ||
300 | |||
301 | pte = pte_alloc_kernel(pmd, base); | ||
302 | if (!pte) { | ||
303 | pr_err("%s: no pte tables\n", __func__); | ||
304 | ret = -ENOMEM; | ||
305 | break; | ||
306 | } | ||
307 | |||
308 | consistent_pte[i++] = pte; | ||
309 | base += PMD_SIZE; | ||
310 | } while (base < CONSISTENT_END); | ||
311 | |||
312 | return ret; | ||
313 | } | 268 | } |
314 | core_initcall(consistent_init); | ||
315 | 269 | ||
316 | static void *__alloc_from_contiguous(struct device *dev, size_t size, | 270 | struct dma_pool { |
317 | pgprot_t prot, struct page **ret_page); | 271 | size_t size; |
318 | 272 | spinlock_t lock; | |
319 | static struct arm_vmregion_head coherent_head = { | 273 | unsigned long *bitmap; |
320 | .vm_lock = __SPIN_LOCK_UNLOCKED(&coherent_head.vm_lock), | 274 | unsigned long nr_pages; |
321 | .vm_list = LIST_HEAD_INIT(coherent_head.vm_list), | 275 | void *vaddr; |
276 | struct page *page; | ||
322 | }; | 277 | }; |
323 | 278 | ||
324 | static size_t coherent_pool_size = DEFAULT_CONSISTENT_DMA_SIZE / 8; | 279 | static struct dma_pool atomic_pool = { |
280 | .size = SZ_256K, | ||
281 | }; | ||
325 | 282 | ||
326 | static int __init early_coherent_pool(char *p) | 283 | static int __init early_coherent_pool(char *p) |
327 | { | 284 | { |
328 | coherent_pool_size = memparse(p, &p); | 285 | atomic_pool.size = memparse(p, &p); |
329 | return 0; | 286 | return 0; |
330 | } | 287 | } |
331 | early_param("coherent_pool", early_coherent_pool); | 288 | early_param("coherent_pool", early_coherent_pool); |
@@ -333,32 +290,45 @@ early_param("coherent_pool", early_coherent_pool); | |||
333 | /* | 290 | /* |
334 | * Initialise the coherent pool for atomic allocations. | 291 | * Initialise the coherent pool for atomic allocations. |
335 | */ | 292 | */ |
336 | static int __init coherent_init(void) | 293 | static int __init atomic_pool_init(void) |
337 | { | 294 | { |
295 | struct dma_pool *pool = &atomic_pool; | ||
338 | pgprot_t prot = pgprot_dmacoherent(pgprot_kernel); | 296 | pgprot_t prot = pgprot_dmacoherent(pgprot_kernel); |
339 | size_t size = coherent_pool_size; | 297 | unsigned long nr_pages = pool->size >> PAGE_SHIFT; |
298 | unsigned long *bitmap; | ||
340 | struct page *page; | 299 | struct page *page; |
341 | void *ptr; | 300 | void *ptr; |
301 | int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long); | ||
342 | 302 | ||
343 | if (!IS_ENABLED(CONFIG_CMA)) | 303 | bitmap = kzalloc(bitmap_size, GFP_KERNEL); |
344 | return 0; | 304 | if (!bitmap) |
305 | goto no_bitmap; | ||
345 | 306 | ||
346 | ptr = __alloc_from_contiguous(NULL, size, prot, &page); | 307 | if (IS_ENABLED(CONFIG_CMA)) |
308 | ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page); | ||
309 | else | ||
310 | ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot, | ||
311 | &page, NULL); | ||
347 | if (ptr) { | 312 | if (ptr) { |
348 | coherent_head.vm_start = (unsigned long) ptr; | 313 | spin_lock_init(&pool->lock); |
349 | coherent_head.vm_end = (unsigned long) ptr + size; | 314 | pool->vaddr = ptr; |
350 | printk(KERN_INFO "DMA: preallocated %u KiB pool for atomic coherent allocations\n", | 315 | pool->page = page; |
351 | (unsigned)size / 1024); | 316 | pool->bitmap = bitmap; |
317 | pool->nr_pages = nr_pages; | ||
318 | pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n", | ||
319 | (unsigned)pool->size / 1024); | ||
352 | return 0; | 320 | return 0; |
353 | } | 321 | } |
354 | printk(KERN_ERR "DMA: failed to allocate %u KiB pool for atomic coherent allocation\n", | 322 | kfree(bitmap); |
355 | (unsigned)size / 1024); | 323 | no_bitmap: |
324 | pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n", | ||
325 | (unsigned)pool->size / 1024); | ||
356 | return -ENOMEM; | 326 | return -ENOMEM; |
357 | } | 327 | } |
358 | /* | 328 | /* |
359 | * CMA is activated by core_initcall, so we must be called after it. | 329 | * CMA is activated by core_initcall, so we must be called after it. |
360 | */ | 330 | */ |
361 | postcore_initcall(coherent_init); | 331 | postcore_initcall(atomic_pool_init); |
362 | 332 | ||
363 | struct dma_contig_early_reserve { | 333 | struct dma_contig_early_reserve { |
364 | phys_addr_t base; | 334 | phys_addr_t base; |
@@ -406,112 +376,6 @@ void __init dma_contiguous_remap(void) | |||
406 | } | 376 | } |
407 | } | 377 | } |
408 | 378 | ||
409 | static void * | ||
410 | __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot, | ||
411 | const void *caller) | ||
412 | { | ||
413 | struct arm_vmregion *c; | ||
414 | size_t align; | ||
415 | int bit; | ||
416 | |||
417 | if (!consistent_pte) { | ||
418 | pr_err("%s: not initialised\n", __func__); | ||
419 | dump_stack(); | ||
420 | return NULL; | ||
421 | } | ||
422 | |||
423 | /* | ||
424 | * Align the virtual region allocation - maximum alignment is | ||
425 | * a section size, minimum is a page size. This helps reduce | ||
426 | * fragmentation of the DMA space, and also prevents allocations | ||
427 | * smaller than a section from crossing a section boundary. | ||
428 | */ | ||
429 | bit = fls(size - 1); | ||
430 | if (bit > SECTION_SHIFT) | ||
431 | bit = SECTION_SHIFT; | ||
432 | align = 1 << bit; | ||
433 | |||
434 | /* | ||
435 | * Allocate a virtual address in the consistent mapping region. | ||
436 | */ | ||
437 | c = arm_vmregion_alloc(&consistent_head, align, size, | ||
438 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller); | ||
439 | if (c) { | ||
440 | pte_t *pte; | ||
441 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
442 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
443 | |||
444 | pte = consistent_pte[idx] + off; | ||
445 | c->priv = page; | ||
446 | |||
447 | do { | ||
448 | BUG_ON(!pte_none(*pte)); | ||
449 | |||
450 | set_pte_ext(pte, mk_pte(page, prot), 0); | ||
451 | page++; | ||
452 | pte++; | ||
453 | off++; | ||
454 | if (off >= PTRS_PER_PTE) { | ||
455 | off = 0; | ||
456 | pte = consistent_pte[++idx]; | ||
457 | } | ||
458 | } while (size -= PAGE_SIZE); | ||
459 | |||
460 | dsb(); | ||
461 | |||
462 | return (void *)c->vm_start; | ||
463 | } | ||
464 | return NULL; | ||
465 | } | ||
466 | |||
467 | static void __dma_free_remap(void *cpu_addr, size_t size) | ||
468 | { | ||
469 | struct arm_vmregion *c; | ||
470 | unsigned long addr; | ||
471 | pte_t *ptep; | ||
472 | int idx; | ||
473 | u32 off; | ||
474 | |||
475 | c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr); | ||
476 | if (!c) { | ||
477 | pr_err("%s: trying to free invalid coherent area: %p\n", | ||
478 | __func__, cpu_addr); | ||
479 | dump_stack(); | ||
480 | return; | ||
481 | } | ||
482 | |||
483 | if ((c->vm_end - c->vm_start) != size) { | ||
484 | pr_err("%s: freeing wrong coherent size (%ld != %d)\n", | ||
485 | __func__, c->vm_end - c->vm_start, size); | ||
486 | dump_stack(); | ||
487 | size = c->vm_end - c->vm_start; | ||
488 | } | ||
489 | |||
490 | idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
491 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
492 | ptep = consistent_pte[idx] + off; | ||
493 | addr = c->vm_start; | ||
494 | do { | ||
495 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | ||
496 | |||
497 | ptep++; | ||
498 | addr += PAGE_SIZE; | ||
499 | off++; | ||
500 | if (off >= PTRS_PER_PTE) { | ||
501 | off = 0; | ||
502 | ptep = consistent_pte[++idx]; | ||
503 | } | ||
504 | |||
505 | if (pte_none(pte) || !pte_present(pte)) | ||
506 | pr_crit("%s: bad page in kernel page table\n", | ||
507 | __func__); | ||
508 | } while (size -= PAGE_SIZE); | ||
509 | |||
510 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | ||
511 | |||
512 | arm_vmregion_free(&consistent_head, c); | ||
513 | } | ||
514 | |||
515 | static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr, | 379 | static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr, |
516 | void *data) | 380 | void *data) |
517 | { | 381 | { |
@@ -552,16 +416,17 @@ static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp, | |||
552 | return ptr; | 416 | return ptr; |
553 | } | 417 | } |
554 | 418 | ||
555 | static void *__alloc_from_pool(struct device *dev, size_t size, | 419 | static void *__alloc_from_pool(size_t size, struct page **ret_page) |
556 | struct page **ret_page, const void *caller) | ||
557 | { | 420 | { |
558 | struct arm_vmregion *c; | 421 | struct dma_pool *pool = &atomic_pool; |
422 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; | ||
423 | unsigned int pageno; | ||
424 | unsigned long flags; | ||
425 | void *ptr = NULL; | ||
559 | size_t align; | 426 | size_t align; |
560 | 427 | ||
561 | if (!coherent_head.vm_start) { | 428 | if (!pool->vaddr) { |
562 | printk(KERN_ERR "%s: coherent pool not initialised!\n", | 429 | WARN(1, "coherent pool not initialised!\n"); |
563 | __func__); | ||
564 | dump_stack(); | ||
565 | return NULL; | 430 | return NULL; |
566 | } | 431 | } |
567 | 432 | ||
@@ -571,35 +436,41 @@ static void *__alloc_from_pool(struct device *dev, size_t size, | |||
571 | * size. This helps reduce fragmentation of the DMA space. | 436 | * size. This helps reduce fragmentation of the DMA space. |
572 | */ | 437 | */ |
573 | align = PAGE_SIZE << get_order(size); | 438 | align = PAGE_SIZE << get_order(size); |
574 | c = arm_vmregion_alloc(&coherent_head, align, size, 0, caller); | 439 | |
575 | if (c) { | 440 | spin_lock_irqsave(&pool->lock, flags); |
576 | void *ptr = (void *)c->vm_start; | 441 | pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages, |
577 | struct page *page = virt_to_page(ptr); | 442 | 0, count, (1 << align) - 1); |
578 | *ret_page = page; | 443 | if (pageno < pool->nr_pages) { |
579 | return ptr; | 444 | bitmap_set(pool->bitmap, pageno, count); |
445 | ptr = pool->vaddr + PAGE_SIZE * pageno; | ||
446 | *ret_page = pool->page + pageno; | ||
580 | } | 447 | } |
581 | return NULL; | 448 | spin_unlock_irqrestore(&pool->lock, flags); |
449 | |||
450 | return ptr; | ||
582 | } | 451 | } |
583 | 452 | ||
584 | static int __free_from_pool(void *cpu_addr, size_t size) | 453 | static int __free_from_pool(void *start, size_t size) |
585 | { | 454 | { |
586 | unsigned long start = (unsigned long)cpu_addr; | 455 | struct dma_pool *pool = &atomic_pool; |
587 | unsigned long end = start + size; | 456 | unsigned long pageno, count; |
588 | struct arm_vmregion *c; | 457 | unsigned long flags; |
589 | 458 | ||
590 | if (start < coherent_head.vm_start || end > coherent_head.vm_end) | 459 | if (start < pool->vaddr || start > pool->vaddr + pool->size) |
591 | return 0; | 460 | return 0; |
592 | 461 | ||
593 | c = arm_vmregion_find_remove(&coherent_head, (unsigned long)start); | 462 | if (start + size > pool->vaddr + pool->size) { |
594 | 463 | WARN(1, "freeing wrong coherent size from pool\n"); | |
595 | if ((c->vm_end - c->vm_start) != size) { | 464 | return 0; |
596 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | ||
597 | __func__, c->vm_end - c->vm_start, size); | ||
598 | dump_stack(); | ||
599 | size = c->vm_end - c->vm_start; | ||
600 | } | 465 | } |
601 | 466 | ||
602 | arm_vmregion_free(&coherent_head, c); | 467 | pageno = (start - pool->vaddr) >> PAGE_SHIFT; |
468 | count = size >> PAGE_SHIFT; | ||
469 | |||
470 | spin_lock_irqsave(&pool->lock, flags); | ||
471 | bitmap_clear(pool->bitmap, pageno, count); | ||
472 | spin_unlock_irqrestore(&pool->lock, flags); | ||
473 | |||
603 | return 1; | 474 | return 1; |
604 | } | 475 | } |
605 | 476 | ||
@@ -644,7 +515,7 @@ static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot) | |||
644 | 515 | ||
645 | #define __get_dma_pgprot(attrs, prot) __pgprot(0) | 516 | #define __get_dma_pgprot(attrs, prot) __pgprot(0) |
646 | #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL | 517 | #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL |
647 | #define __alloc_from_pool(dev, size, ret_page, c) NULL | 518 | #define __alloc_from_pool(size, ret_page) NULL |
648 | #define __alloc_from_contiguous(dev, size, prot, ret) NULL | 519 | #define __alloc_from_contiguous(dev, size, prot, ret) NULL |
649 | #define __free_from_pool(cpu_addr, size) 0 | 520 | #define __free_from_pool(cpu_addr, size) 0 |
650 | #define __free_from_contiguous(dev, page, size) do { } while (0) | 521 | #define __free_from_contiguous(dev, page, size) do { } while (0) |
@@ -702,10 +573,10 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, | |||
702 | 573 | ||
703 | if (arch_is_coherent() || nommu()) | 574 | if (arch_is_coherent() || nommu()) |
704 | addr = __alloc_simple_buffer(dev, size, gfp, &page); | 575 | addr = __alloc_simple_buffer(dev, size, gfp, &page); |
576 | else if (gfp & GFP_ATOMIC) | ||
577 | addr = __alloc_from_pool(size, &page); | ||
705 | else if (!IS_ENABLED(CONFIG_CMA)) | 578 | else if (!IS_ENABLED(CONFIG_CMA)) |
706 | addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller); | 579 | addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller); |
707 | else if (gfp & GFP_ATOMIC) | ||
708 | addr = __alloc_from_pool(dev, size, &page, caller); | ||
709 | else | 580 | else |
710 | addr = __alloc_from_contiguous(dev, size, prot, &page); | 581 | addr = __alloc_from_contiguous(dev, size, prot, &page); |
711 | 582 | ||
@@ -741,16 +612,22 @@ int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma, | |||
741 | { | 612 | { |
742 | int ret = -ENXIO; | 613 | int ret = -ENXIO; |
743 | #ifdef CONFIG_MMU | 614 | #ifdef CONFIG_MMU |
615 | unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; | ||
616 | unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT; | ||
744 | unsigned long pfn = dma_to_pfn(dev, dma_addr); | 617 | unsigned long pfn = dma_to_pfn(dev, dma_addr); |
618 | unsigned long off = vma->vm_pgoff; | ||
619 | |||
745 | vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot); | 620 | vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot); |
746 | 621 | ||
747 | if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret)) | 622 | if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret)) |
748 | return ret; | 623 | return ret; |
749 | 624 | ||
750 | ret = remap_pfn_range(vma, vma->vm_start, | 625 | if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) { |
751 | pfn + vma->vm_pgoff, | 626 | ret = remap_pfn_range(vma, vma->vm_start, |
752 | vma->vm_end - vma->vm_start, | 627 | pfn + off, |
753 | vma->vm_page_prot); | 628 | vma->vm_end - vma->vm_start, |
629 | vma->vm_page_prot); | ||
630 | } | ||
754 | #endif /* CONFIG_MMU */ | 631 | #endif /* CONFIG_MMU */ |
755 | 632 | ||
756 | return ret; | 633 | return ret; |
@@ -785,6 +662,21 @@ void arm_dma_free(struct device *dev, size_t size, void *cpu_addr, | |||
785 | } | 662 | } |
786 | } | 663 | } |
787 | 664 | ||
665 | int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt, | ||
666 | void *cpu_addr, dma_addr_t handle, size_t size, | ||
667 | struct dma_attrs *attrs) | ||
668 | { | ||
669 | struct page *page = pfn_to_page(dma_to_pfn(dev, handle)); | ||
670 | int ret; | ||
671 | |||
672 | ret = sg_alloc_table(sgt, 1, GFP_KERNEL); | ||
673 | if (unlikely(ret)) | ||
674 | return ret; | ||
675 | |||
676 | sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); | ||
677 | return 0; | ||
678 | } | ||
679 | |||
788 | static void dma_cache_maint_page(struct page *page, unsigned long offset, | 680 | static void dma_cache_maint_page(struct page *page, unsigned long offset, |
789 | size_t size, enum dma_data_direction dir, | 681 | size_t size, enum dma_data_direction dir, |
790 | void (*op)(const void *, size_t, int)) | 682 | void (*op)(const void *, size_t, int)) |
@@ -998,9 +890,6 @@ static int arm_dma_set_mask(struct device *dev, u64 dma_mask) | |||
998 | 890 | ||
999 | static int __init dma_debug_do_init(void) | 891 | static int __init dma_debug_do_init(void) |
1000 | { | 892 | { |
1001 | #ifdef CONFIG_MMU | ||
1002 | arm_vmregion_create_proc("dma-mappings", &consistent_head); | ||
1003 | #endif | ||
1004 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); | 893 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); |
1005 | return 0; | 894 | return 0; |
1006 | } | 895 | } |
@@ -1088,7 +977,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t | |||
1088 | 977 | ||
1089 | return pages; | 978 | return pages; |
1090 | error: | 979 | error: |
1091 | while (--i) | 980 | while (i--) |
1092 | if (pages[i]) | 981 | if (pages[i]) |
1093 | __free_pages(pages[i], 0); | 982 | __free_pages(pages[i], 0); |
1094 | if (array_size <= PAGE_SIZE) | 983 | if (array_size <= PAGE_SIZE) |
@@ -1117,61 +1006,32 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t s | |||
1117 | * Create a CPU mapping for a specified pages | 1006 | * Create a CPU mapping for a specified pages |
1118 | */ | 1007 | */ |
1119 | static void * | 1008 | static void * |
1120 | __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot) | 1009 | __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot, |
1010 | const void *caller) | ||
1121 | { | 1011 | { |
1122 | struct arm_vmregion *c; | 1012 | unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT; |
1123 | size_t align; | 1013 | struct vm_struct *area; |
1124 | size_t count = size >> PAGE_SHIFT; | 1014 | unsigned long p; |
1125 | int bit; | ||
1126 | 1015 | ||
1127 | if (!consistent_pte[0]) { | 1016 | area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP, |
1128 | pr_err("%s: not initialised\n", __func__); | 1017 | caller); |
1129 | dump_stack(); | 1018 | if (!area) |
1130 | return NULL; | 1019 | return NULL; |
1131 | } | ||
1132 | |||
1133 | /* | ||
1134 | * Align the virtual region allocation - maximum alignment is | ||
1135 | * a section size, minimum is a page size. This helps reduce | ||
1136 | * fragmentation of the DMA space, and also prevents allocations | ||
1137 | * smaller than a section from crossing a section boundary. | ||
1138 | */ | ||
1139 | bit = fls(size - 1); | ||
1140 | if (bit > SECTION_SHIFT) | ||
1141 | bit = SECTION_SHIFT; | ||
1142 | align = 1 << bit; | ||
1143 | |||
1144 | /* | ||
1145 | * Allocate a virtual address in the consistent mapping region. | ||
1146 | */ | ||
1147 | c = arm_vmregion_alloc(&consistent_head, align, size, | ||
1148 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM), NULL); | ||
1149 | if (c) { | ||
1150 | pte_t *pte; | ||
1151 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); | ||
1152 | int i = 0; | ||
1153 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | ||
1154 | |||
1155 | pte = consistent_pte[idx] + off; | ||
1156 | c->priv = pages; | ||
1157 | |||
1158 | do { | ||
1159 | BUG_ON(!pte_none(*pte)); | ||
1160 | |||
1161 | set_pte_ext(pte, mk_pte(pages[i], prot), 0); | ||
1162 | pte++; | ||
1163 | off++; | ||
1164 | i++; | ||
1165 | if (off >= PTRS_PER_PTE) { | ||
1166 | off = 0; | ||
1167 | pte = consistent_pte[++idx]; | ||
1168 | } | ||
1169 | } while (i < count); | ||
1170 | 1020 | ||
1171 | dsb(); | 1021 | area->pages = pages; |
1022 | area->nr_pages = nr_pages; | ||
1023 | p = (unsigned long)area->addr; | ||
1172 | 1024 | ||
1173 | return (void *)c->vm_start; | 1025 | for (i = 0; i < nr_pages; i++) { |
1026 | phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i])); | ||
1027 | if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot)) | ||
1028 | goto err; | ||
1029 | p += PAGE_SIZE; | ||
1174 | } | 1030 | } |
1031 | return area->addr; | ||
1032 | err: | ||
1033 | unmap_kernel_range((unsigned long)area->addr, size); | ||
1034 | vunmap(area->addr); | ||
1175 | return NULL; | 1035 | return NULL; |
1176 | } | 1036 | } |
1177 | 1037 | ||
@@ -1230,6 +1090,19 @@ static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t si | |||
1230 | return 0; | 1090 | return 0; |
1231 | } | 1091 | } |
1232 | 1092 | ||
1093 | static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs) | ||
1094 | { | ||
1095 | struct vm_struct *area; | ||
1096 | |||
1097 | if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) | ||
1098 | return cpu_addr; | ||
1099 | |||
1100 | area = find_vm_area(cpu_addr); | ||
1101 | if (area && (area->flags & VM_ARM_DMA_CONSISTENT)) | ||
1102 | return area->pages; | ||
1103 | return NULL; | ||
1104 | } | ||
1105 | |||
1233 | static void *arm_iommu_alloc_attrs(struct device *dev, size_t size, | 1106 | static void *arm_iommu_alloc_attrs(struct device *dev, size_t size, |
1234 | dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs) | 1107 | dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs) |
1235 | { | 1108 | { |
@@ -1248,7 +1121,11 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size, | |||
1248 | if (*handle == DMA_ERROR_CODE) | 1121 | if (*handle == DMA_ERROR_CODE) |
1249 | goto err_buffer; | 1122 | goto err_buffer; |
1250 | 1123 | ||
1251 | addr = __iommu_alloc_remap(pages, size, gfp, prot); | 1124 | if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) |
1125 | return pages; | ||
1126 | |||
1127 | addr = __iommu_alloc_remap(pages, size, gfp, prot, | ||
1128 | __builtin_return_address(0)); | ||
1252 | if (!addr) | 1129 | if (!addr) |
1253 | goto err_mapping; | 1130 | goto err_mapping; |
1254 | 1131 | ||
@@ -1265,31 +1142,25 @@ static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma, | |||
1265 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | 1142 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
1266 | struct dma_attrs *attrs) | 1143 | struct dma_attrs *attrs) |
1267 | { | 1144 | { |
1268 | struct arm_vmregion *c; | 1145 | unsigned long uaddr = vma->vm_start; |
1146 | unsigned long usize = vma->vm_end - vma->vm_start; | ||
1147 | struct page **pages = __iommu_get_pages(cpu_addr, attrs); | ||
1269 | 1148 | ||
1270 | vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot); | 1149 | vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot); |
1271 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); | ||
1272 | |||
1273 | if (c) { | ||
1274 | struct page **pages = c->priv; | ||
1275 | |||
1276 | unsigned long uaddr = vma->vm_start; | ||
1277 | unsigned long usize = vma->vm_end - vma->vm_start; | ||
1278 | int i = 0; | ||
1279 | 1150 | ||
1280 | do { | 1151 | if (!pages) |
1281 | int ret; | 1152 | return -ENXIO; |
1282 | 1153 | ||
1283 | ret = vm_insert_page(vma, uaddr, pages[i++]); | 1154 | do { |
1284 | if (ret) { | 1155 | int ret = vm_insert_page(vma, uaddr, *pages++); |
1285 | pr_err("Remapping memory, error: %d\n", ret); | 1156 | if (ret) { |
1286 | return ret; | 1157 | pr_err("Remapping memory failed: %d\n", ret); |
1287 | } | 1158 | return ret; |
1159 | } | ||
1160 | uaddr += PAGE_SIZE; | ||
1161 | usize -= PAGE_SIZE; | ||
1162 | } while (usize > 0); | ||
1288 | 1163 | ||
1289 | uaddr += PAGE_SIZE; | ||
1290 | usize -= PAGE_SIZE; | ||
1291 | } while (usize > 0); | ||
1292 | } | ||
1293 | return 0; | 1164 | return 0; |
1294 | } | 1165 | } |
1295 | 1166 | ||
@@ -1300,16 +1171,35 @@ static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma, | |||
1300 | void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr, | 1171 | void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr, |
1301 | dma_addr_t handle, struct dma_attrs *attrs) | 1172 | dma_addr_t handle, struct dma_attrs *attrs) |
1302 | { | 1173 | { |
1303 | struct arm_vmregion *c; | 1174 | struct page **pages = __iommu_get_pages(cpu_addr, attrs); |
1304 | size = PAGE_ALIGN(size); | 1175 | size = PAGE_ALIGN(size); |
1305 | 1176 | ||
1306 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); | 1177 | if (!pages) { |
1307 | if (c) { | 1178 | WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr); |
1308 | struct page **pages = c->priv; | 1179 | return; |
1309 | __dma_free_remap(cpu_addr, size); | ||
1310 | __iommu_remove_mapping(dev, handle, size); | ||
1311 | __iommu_free_buffer(dev, pages, size); | ||
1312 | } | 1180 | } |
1181 | |||
1182 | if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) { | ||
1183 | unmap_kernel_range((unsigned long)cpu_addr, size); | ||
1184 | vunmap(cpu_addr); | ||
1185 | } | ||
1186 | |||
1187 | __iommu_remove_mapping(dev, handle, size); | ||
1188 | __iommu_free_buffer(dev, pages, size); | ||
1189 | } | ||
1190 | |||
1191 | static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt, | ||
1192 | void *cpu_addr, dma_addr_t dma_addr, | ||
1193 | size_t size, struct dma_attrs *attrs) | ||
1194 | { | ||
1195 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; | ||
1196 | struct page **pages = __iommu_get_pages(cpu_addr, attrs); | ||
1197 | |||
1198 | if (!pages) | ||
1199 | return -ENXIO; | ||
1200 | |||
1201 | return sg_alloc_table_from_pages(sgt, pages, count, 0, size, | ||
1202 | GFP_KERNEL); | ||
1313 | } | 1203 | } |
1314 | 1204 | ||
1315 | /* | 1205 | /* |
@@ -1317,7 +1207,7 @@ void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr, | |||
1317 | */ | 1207 | */ |
1318 | static int __map_sg_chunk(struct device *dev, struct scatterlist *sg, | 1208 | static int __map_sg_chunk(struct device *dev, struct scatterlist *sg, |
1319 | size_t size, dma_addr_t *handle, | 1209 | size_t size, dma_addr_t *handle, |
1320 | enum dma_data_direction dir) | 1210 | enum dma_data_direction dir, struct dma_attrs *attrs) |
1321 | { | 1211 | { |
1322 | struct dma_iommu_mapping *mapping = dev->archdata.mapping; | 1212 | struct dma_iommu_mapping *mapping = dev->archdata.mapping; |
1323 | dma_addr_t iova, iova_base; | 1213 | dma_addr_t iova, iova_base; |
@@ -1336,7 +1226,8 @@ static int __map_sg_chunk(struct device *dev, struct scatterlist *sg, | |||
1336 | phys_addr_t phys = page_to_phys(sg_page(s)); | 1226 | phys_addr_t phys = page_to_phys(sg_page(s)); |
1337 | unsigned int len = PAGE_ALIGN(s->offset + s->length); | 1227 | unsigned int len = PAGE_ALIGN(s->offset + s->length); |
1338 | 1228 | ||
1339 | if (!arch_is_coherent()) | 1229 | if (!arch_is_coherent() && |
1230 | !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs)) | ||
1340 | __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir); | 1231 | __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir); |
1341 | 1232 | ||
1342 | ret = iommu_map(mapping->domain, iova, phys, len, 0); | 1233 | ret = iommu_map(mapping->domain, iova, phys, len, 0); |
@@ -1383,7 +1274,7 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
1383 | 1274 | ||
1384 | if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) { | 1275 | if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) { |
1385 | if (__map_sg_chunk(dev, start, size, &dma->dma_address, | 1276 | if (__map_sg_chunk(dev, start, size, &dma->dma_address, |
1386 | dir) < 0) | 1277 | dir, attrs) < 0) |
1387 | goto bad_mapping; | 1278 | goto bad_mapping; |
1388 | 1279 | ||
1389 | dma->dma_address += offset; | 1280 | dma->dma_address += offset; |
@@ -1396,7 +1287,7 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
1396 | } | 1287 | } |
1397 | size += s->length; | 1288 | size += s->length; |
1398 | } | 1289 | } |
1399 | if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir) < 0) | 1290 | if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs) < 0) |
1400 | goto bad_mapping; | 1291 | goto bad_mapping; |
1401 | 1292 | ||
1402 | dma->dma_address += offset; | 1293 | dma->dma_address += offset; |
@@ -1430,7 +1321,8 @@ void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
1430 | if (sg_dma_len(s)) | 1321 | if (sg_dma_len(s)) |
1431 | __iommu_remove_mapping(dev, sg_dma_address(s), | 1322 | __iommu_remove_mapping(dev, sg_dma_address(s), |
1432 | sg_dma_len(s)); | 1323 | sg_dma_len(s)); |
1433 | if (!arch_is_coherent()) | 1324 | if (!arch_is_coherent() && |
1325 | !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs)) | ||
1434 | __dma_page_dev_to_cpu(sg_page(s), s->offset, | 1326 | __dma_page_dev_to_cpu(sg_page(s), s->offset, |
1435 | s->length, dir); | 1327 | s->length, dir); |
1436 | } | 1328 | } |
@@ -1492,7 +1384,7 @@ static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page, | |||
1492 | dma_addr_t dma_addr; | 1384 | dma_addr_t dma_addr; |
1493 | int ret, len = PAGE_ALIGN(size + offset); | 1385 | int ret, len = PAGE_ALIGN(size + offset); |
1494 | 1386 | ||
1495 | if (!arch_is_coherent()) | 1387 | if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs)) |
1496 | __dma_page_cpu_to_dev(page, offset, size, dir); | 1388 | __dma_page_cpu_to_dev(page, offset, size, dir); |
1497 | 1389 | ||
1498 | dma_addr = __alloc_iova(mapping, len); | 1390 | dma_addr = __alloc_iova(mapping, len); |
@@ -1531,7 +1423,7 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle, | |||
1531 | if (!iova) | 1423 | if (!iova) |
1532 | return; | 1424 | return; |
1533 | 1425 | ||
1534 | if (!arch_is_coherent()) | 1426 | if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs)) |
1535 | __dma_page_dev_to_cpu(page, offset, size, dir); | 1427 | __dma_page_dev_to_cpu(page, offset, size, dir); |
1536 | 1428 | ||
1537 | iommu_unmap(mapping->domain, iova, len); | 1429 | iommu_unmap(mapping->domain, iova, len); |
@@ -1571,6 +1463,7 @@ struct dma_map_ops iommu_ops = { | |||
1571 | .alloc = arm_iommu_alloc_attrs, | 1463 | .alloc = arm_iommu_alloc_attrs, |
1572 | .free = arm_iommu_free_attrs, | 1464 | .free = arm_iommu_free_attrs, |
1573 | .mmap = arm_iommu_mmap_attrs, | 1465 | .mmap = arm_iommu_mmap_attrs, |
1466 | .get_sgtable = arm_iommu_get_sgtable, | ||
1574 | 1467 | ||
1575 | .map_page = arm_iommu_map_page, | 1468 | .map_page = arm_iommu_map_page, |
1576 | .unmap_page = arm_iommu_unmap_page, | 1469 | .unmap_page = arm_iommu_unmap_page, |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index f54d59219764..9aec41fa80ae 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -21,13 +21,13 @@ | |||
21 | #include <linux/gfp.h> | 21 | #include <linux/gfp.h> |
22 | #include <linux/memblock.h> | 22 | #include <linux/memblock.h> |
23 | #include <linux/dma-contiguous.h> | 23 | #include <linux/dma-contiguous.h> |
24 | #include <linux/sizes.h> | ||
24 | 25 | ||
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
26 | #include <asm/memblock.h> | 27 | #include <asm/memblock.h> |
27 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
28 | #include <asm/sections.h> | 29 | #include <asm/sections.h> |
29 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
30 | #include <asm/sizes.h> | ||
31 | #include <asm/tlb.h> | 31 | #include <asm/tlb.h> |
32 | #include <asm/fixmap.h> | 32 | #include <asm/fixmap.h> |
33 | 33 | ||
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 4f55f5062ab7..566750fa57d4 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/mm.h> | 25 | #include <linux/mm.h> |
26 | #include <linux/vmalloc.h> | 26 | #include <linux/vmalloc.h> |
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/sizes.h> | ||
28 | 29 | ||
29 | #include <asm/cp15.h> | 30 | #include <asm/cp15.h> |
30 | #include <asm/cputype.h> | 31 | #include <asm/cputype.h> |
@@ -32,7 +33,6 @@ | |||
32 | #include <asm/mmu_context.h> | 33 | #include <asm/mmu_context.h> |
33 | #include <asm/pgalloc.h> | 34 | #include <asm/pgalloc.h> |
34 | #include <asm/tlbflush.h> | 35 | #include <asm/tlbflush.h> |
35 | #include <asm/sizes.h> | ||
36 | #include <asm/system_info.h> | 36 | #include <asm/system_info.h> |
37 | 37 | ||
38 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index 2e8a1efdf7b8..6776160618ef 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h | |||
@@ -59,6 +59,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page | |||
59 | #define VM_ARM_MTYPE(mt) ((mt) << 20) | 59 | #define VM_ARM_MTYPE(mt) ((mt) << 20) |
60 | #define VM_ARM_MTYPE_MASK (0x1f << 20) | 60 | #define VM_ARM_MTYPE_MASK (0x1f << 20) |
61 | 61 | ||
62 | /* consistent regions used by dma_alloc_attrs() */ | ||
63 | #define VM_ARM_DMA_CONSISTENT 0x20000000 | ||
64 | |||
62 | #endif | 65 | #endif |
63 | 66 | ||
64 | #ifdef CONFIG_ZONE_DMA | 67 | #ifdef CONFIG_ZONE_DMA |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index cf4528d51774..4c2d0451e84a 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -16,13 +16,13 @@ | |||
16 | #include <linux/memblock.h> | 16 | #include <linux/memblock.h> |
17 | #include <linux/fs.h> | 17 | #include <linux/fs.h> |
18 | #include <linux/vmalloc.h> | 18 | #include <linux/vmalloc.h> |
19 | #include <linux/sizes.h> | ||
19 | 20 | ||
20 | #include <asm/cp15.h> | 21 | #include <asm/cp15.h> |
21 | #include <asm/cputype.h> | 22 | #include <asm/cputype.h> |
22 | #include <asm/sections.h> | 23 | #include <asm/sections.h> |
23 | #include <asm/cachetype.h> | 24 | #include <asm/cachetype.h> |
24 | #include <asm/setup.h> | 25 | #include <asm/setup.h> |
25 | #include <asm/sizes.h> | ||
26 | #include <asm/smp_plat.h> | 26 | #include <asm/smp_plat.h> |
27 | #include <asm/tlb.h> | 27 | #include <asm/tlb.h> |
28 | #include <asm/highmem.h> | 28 | #include <asm/highmem.h> |
@@ -422,12 +422,6 @@ static void __init build_mem_type_table(void) | |||
422 | vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; | 422 | vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; |
423 | 423 | ||
424 | /* | 424 | /* |
425 | * Only use write-through for non-SMP systems | ||
426 | */ | ||
427 | if (!is_smp() && cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH) | ||
428 | vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte; | ||
429 | |||
430 | /* | ||
431 | * Enable CPU-specific coherency if supported. | 425 | * Enable CPU-specific coherency if supported. |
432 | * (Only available on XSC3 at the moment.) | 426 | * (Only available on XSC3 at the moment.) |
433 | */ | 427 | */ |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 5900cd520e84..86b8b480634f 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -107,6 +107,12 @@ ENTRY(cpu_v6_switch_mm) | |||
107 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | 107 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB |
108 | mcr p15, 0, r2, c7, c10, 4 @ drain write buffer | 108 | mcr p15, 0, r2, c7, c10, 4 @ drain write buffer |
109 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | 109 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 |
110 | #ifdef CONFIG_PID_IN_CONTEXTIDR | ||
111 | mrc p15, 0, r2, c13, c0, 1 @ read current context ID | ||
112 | bic r2, r2, #0xff @ extract the PID | ||
113 | and r1, r1, #0xff | ||
114 | orr r1, r1, r2 @ insert into new context ID | ||
115 | #endif | ||
110 | mcr p15, 0, r1, c13, c0, 1 @ set context ID | 116 | mcr p15, 0, r1, c13, c0, 1 @ set context ID |
111 | #endif | 117 | #endif |
112 | mov pc, lr | 118 | mov pc, lr |
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S index 42ac069c8012..fd045e706390 100644 --- a/arch/arm/mm/proc-v7-2level.S +++ b/arch/arm/mm/proc-v7-2level.S | |||
@@ -46,6 +46,11 @@ ENTRY(cpu_v7_switch_mm) | |||
46 | #ifdef CONFIG_ARM_ERRATA_430973 | 46 | #ifdef CONFIG_ARM_ERRATA_430973 |
47 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | 47 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB |
48 | #endif | 48 | #endif |
49 | #ifdef CONFIG_PID_IN_CONTEXTIDR | ||
50 | mrc p15, 0, r2, c13, c0, 1 @ read current context ID | ||
51 | lsr r2, r2, #8 @ extract the PID | ||
52 | bfi r1, r2, #8, #24 @ insert into new context ID | ||
53 | #endif | ||
49 | #ifdef CONFIG_ARM_ERRATA_754322 | 54 | #ifdef CONFIG_ARM_ERRATA_754322 |
50 | dsb | 55 | dsb |
51 | #endif | 56 | #endif |
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index 845f461f8ec1..c2021139cb56 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S | |||
@@ -38,11 +38,19 @@ ENTRY(v7wbi_flush_user_tlb_range) | |||
38 | dsb | 38 | dsb |
39 | mov r0, r0, lsr #PAGE_SHIFT @ align address | 39 | mov r0, r0, lsr #PAGE_SHIFT @ align address |
40 | mov r1, r1, lsr #PAGE_SHIFT | 40 | mov r1, r1, lsr #PAGE_SHIFT |
41 | #ifdef CONFIG_ARM_ERRATA_720789 | ||
42 | mov r3, #0 | ||
43 | #else | ||
41 | asid r3, r3 @ mask ASID | 44 | asid r3, r3 @ mask ASID |
45 | #endif | ||
42 | orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA | 46 | orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA |
43 | mov r1, r1, lsl #PAGE_SHIFT | 47 | mov r1, r1, lsl #PAGE_SHIFT |
44 | 1: | 48 | 1: |
49 | #ifdef CONFIG_ARM_ERRATA_720789 | ||
50 | ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) | ||
51 | #else | ||
45 | ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) | 52 | ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) |
53 | #endif | ||
46 | ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA | 54 | ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA |
47 | 55 | ||
48 | add r0, r0, #PAGE_SZ | 56 | add r0, r0, #PAGE_SZ |
@@ -67,7 +75,11 @@ ENTRY(v7wbi_flush_kern_tlb_range) | |||
67 | mov r0, r0, lsl #PAGE_SHIFT | 75 | mov r0, r0, lsl #PAGE_SHIFT |
68 | mov r1, r1, lsl #PAGE_SHIFT | 76 | mov r1, r1, lsl #PAGE_SHIFT |
69 | 1: | 77 | 1: |
78 | #ifdef CONFIG_ARM_ERRATA_720789 | ||
79 | ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) | ||
80 | #else | ||
70 | ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) | 81 | ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) |
82 | #endif | ||
71 | ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA | 83 | ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA |
72 | add r0, r0, #PAGE_SZ | 84 | add r0, r0, #PAGE_SZ |
73 | cmp r0, r1 | 85 | cmp r0, r1 |
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c index 4e0a371630b3..99c63d4b6af8 100644 --- a/arch/arm/oprofile/common.c +++ b/arch/arm/oprofile/common.c | |||
@@ -23,26 +23,37 @@ | |||
23 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
24 | 24 | ||
25 | #ifdef CONFIG_HW_PERF_EVENTS | 25 | #ifdef CONFIG_HW_PERF_EVENTS |
26 | |||
27 | /* | ||
28 | * OProfile has a curious naming scheme for the ARM PMUs, but they are | ||
29 | * part of the user ABI so we need to map from the perf PMU name for | ||
30 | * supported PMUs. | ||
31 | */ | ||
32 | static struct op_perf_name { | ||
33 | char *perf_name; | ||
34 | char *op_name; | ||
35 | } op_perf_name_map[] = { | ||
36 | { "xscale1", "arm/xscale1" }, | ||
37 | { "xscale1", "arm/xscale2" }, | ||
38 | { "v6", "arm/armv6" }, | ||
39 | { "v6mpcore", "arm/mpcore" }, | ||
40 | { "ARMv7 Cortex-A8", "arm/armv7" }, | ||
41 | { "ARMv7 Cortex-A9", "arm/armv7-ca9" }, | ||
42 | }; | ||
43 | |||
26 | char *op_name_from_perf_id(void) | 44 | char *op_name_from_perf_id(void) |
27 | { | 45 | { |
28 | enum arm_perf_pmu_ids id = armpmu_get_pmu_id(); | 46 | int i; |
29 | 47 | struct op_perf_name names; | |
30 | switch (id) { | 48 | const char *perf_name = perf_pmu_name(); |
31 | case ARM_PERF_PMU_ID_XSCALE1: | 49 | |
32 | return "arm/xscale1"; | 50 | for (i = 0; i < ARRAY_SIZE(op_perf_name_map); ++i) { |
33 | case ARM_PERF_PMU_ID_XSCALE2: | 51 | names = op_perf_name_map[i]; |
34 | return "arm/xscale2"; | 52 | if (!strcmp(names.perf_name, perf_name)) |
35 | case ARM_PERF_PMU_ID_V6: | 53 | return names.op_name; |
36 | return "arm/armv6"; | ||
37 | case ARM_PERF_PMU_ID_V6MP: | ||
38 | return "arm/mpcore"; | ||
39 | case ARM_PERF_PMU_ID_CA8: | ||
40 | return "arm/armv7"; | ||
41 | case ARM_PERF_PMU_ID_CA9: | ||
42 | return "arm/armv7-ca9"; | ||
43 | default: | ||
44 | return NULL; | ||
45 | } | 54 | } |
55 | |||
56 | return NULL; | ||
46 | } | 57 | } |
47 | #endif | 58 | #endif |
48 | 59 | ||
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index c722f9ce6918..baf9064c0844 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
@@ -47,12 +47,6 @@ config MXC_TZIC | |||
47 | config MXC_AVIC | 47 | config MXC_AVIC |
48 | bool | 48 | bool |
49 | 49 | ||
50 | config MXC_PWM | ||
51 | tristate "Enable PWM driver" | ||
52 | select HAVE_PWM | ||
53 | help | ||
54 | Enable support for the i.MX PWM controller(s). | ||
55 | |||
56 | config MXC_DEBUG_BOARD | 50 | config MXC_DEBUG_BOARD |
57 | bool "Enable MXC debug board(for 3-stack)" | 51 | bool "Enable MXC debug board(for 3-stack)" |
58 | help | 52 | help |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index 63b064b5c1d5..6ac720031150 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
@@ -11,7 +11,6 @@ obj-$(CONFIG_MXC_AVIC) += avic.o | |||
11 | obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o | 11 | obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o |
12 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o | 12 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o |
13 | obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o | 13 | obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o |
14 | obj-$(CONFIG_MXC_PWM) += pwm.o | ||
15 | obj-$(CONFIG_MXC_ULPI) += ulpi.o | 14 | obj-$(CONFIG_MXC_ULPI) += ulpi.o |
16 | obj-$(CONFIG_MXC_USE_EPIT) += epit.o | 15 | obj-$(CONFIG_MXC_USE_EPIT) += epit.o |
17 | obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o | 16 | obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o |
diff --git a/arch/arm/plat-mxc/include/mach/i2c.h b/arch/arm/plat-mxc/include/mach/i2c.h index 375cdd0cf876..8289d915e615 100644 --- a/arch/arm/plat-mxc/include/mach/i2c.h +++ b/arch/arm/plat-mxc/include/mach/i2c.h | |||
@@ -15,7 +15,7 @@ | |||
15 | * | 15 | * |
16 | **/ | 16 | **/ |
17 | struct imxi2c_platform_data { | 17 | struct imxi2c_platform_data { |
18 | int bitrate; | 18 | u32 bitrate; |
19 | }; | 19 | }; |
20 | 20 | ||
21 | #endif /* __ASM_ARCH_I2C_H_ */ | 21 | #endif /* __ASM_ARCH_I2C_H_ */ |
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c deleted file mode 100644 index c0cab2270dd1..000000000000 --- a/arch/arm/plat-mxc/pwm.c +++ /dev/null | |||
@@ -1,306 +0,0 @@ | |||
1 | /* | ||
2 | * simple driver for PWM (Pulse Width Modulator) controller | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | * | ||
8 | * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com> | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/slab.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/clk.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/pwm.h> | ||
19 | #include <mach/hardware.h> | ||
20 | |||
21 | |||
22 | /* i.MX1 and i.MX21 share the same PWM function block: */ | ||
23 | |||
24 | #define MX1_PWMC 0x00 /* PWM Control Register */ | ||
25 | #define MX1_PWMS 0x04 /* PWM Sample Register */ | ||
26 | #define MX1_PWMP 0x08 /* PWM Period Register */ | ||
27 | |||
28 | |||
29 | /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ | ||
30 | |||
31 | #define MX3_PWMCR 0x00 /* PWM Control Register */ | ||
32 | #define MX3_PWMSAR 0x0C /* PWM Sample Register */ | ||
33 | #define MX3_PWMPR 0x10 /* PWM Period Register */ | ||
34 | #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) | ||
35 | #define MX3_PWMCR_DOZEEN (1 << 24) | ||
36 | #define MX3_PWMCR_WAITEN (1 << 23) | ||
37 | #define MX3_PWMCR_DBGEN (1 << 22) | ||
38 | #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) | ||
39 | #define MX3_PWMCR_CLKSRC_IPG (1 << 16) | ||
40 | #define MX3_PWMCR_EN (1 << 0) | ||
41 | |||
42 | |||
43 | |||
44 | struct pwm_device { | ||
45 | struct list_head node; | ||
46 | struct platform_device *pdev; | ||
47 | |||
48 | const char *label; | ||
49 | struct clk *clk; | ||
50 | |||
51 | int clk_enabled; | ||
52 | void __iomem *mmio_base; | ||
53 | |||
54 | unsigned int use_count; | ||
55 | unsigned int pwm_id; | ||
56 | }; | ||
57 | |||
58 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
59 | { | ||
60 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | ||
61 | return -EINVAL; | ||
62 | |||
63 | if (!(cpu_is_mx1() || cpu_is_mx21())) { | ||
64 | unsigned long long c; | ||
65 | unsigned long period_cycles, duty_cycles, prescale; | ||
66 | u32 cr; | ||
67 | |||
68 | c = clk_get_rate(pwm->clk); | ||
69 | c = c * period_ns; | ||
70 | do_div(c, 1000000000); | ||
71 | period_cycles = c; | ||
72 | |||
73 | prescale = period_cycles / 0x10000 + 1; | ||
74 | |||
75 | period_cycles /= prescale; | ||
76 | c = (unsigned long long)period_cycles * duty_ns; | ||
77 | do_div(c, period_ns); | ||
78 | duty_cycles = c; | ||
79 | |||
80 | /* | ||
81 | * according to imx pwm RM, the real period value should be | ||
82 | * PERIOD value in PWMPR plus 2. | ||
83 | */ | ||
84 | if (period_cycles > 2) | ||
85 | period_cycles -= 2; | ||
86 | else | ||
87 | period_cycles = 0; | ||
88 | |||
89 | writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); | ||
90 | writel(period_cycles, pwm->mmio_base + MX3_PWMPR); | ||
91 | |||
92 | cr = MX3_PWMCR_PRESCALER(prescale) | | ||
93 | MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | | ||
94 | MX3_PWMCR_DBGEN | MX3_PWMCR_EN; | ||
95 | |||
96 | if (cpu_is_mx25()) | ||
97 | cr |= MX3_PWMCR_CLKSRC_IPG; | ||
98 | else | ||
99 | cr |= MX3_PWMCR_CLKSRC_IPG_HIGH; | ||
100 | |||
101 | writel(cr, pwm->mmio_base + MX3_PWMCR); | ||
102 | } else if (cpu_is_mx1() || cpu_is_mx21()) { | ||
103 | /* The PWM subsystem allows for exact frequencies. However, | ||
104 | * I cannot connect a scope on my device to the PWM line and | ||
105 | * thus cannot provide the program the PWM controller | ||
106 | * exactly. Instead, I'm relying on the fact that the | ||
107 | * Bootloader (u-boot or WinCE+haret) has programmed the PWM | ||
108 | * function group already. So I'll just modify the PWM sample | ||
109 | * register to follow the ratio of duty_ns vs. period_ns | ||
110 | * accordingly. | ||
111 | * | ||
112 | * This is good enough for programming the brightness of | ||
113 | * the LCD backlight. | ||
114 | * | ||
115 | * The real implementation would divide PERCLK[0] first by | ||
116 | * both the prescaler (/1 .. /128) and then by CLKSEL | ||
117 | * (/2 .. /16). | ||
118 | */ | ||
119 | u32 max = readl(pwm->mmio_base + MX1_PWMP); | ||
120 | u32 p = max * duty_ns / period_ns; | ||
121 | writel(max - p, pwm->mmio_base + MX1_PWMS); | ||
122 | } else { | ||
123 | BUG(); | ||
124 | } | ||
125 | |||
126 | return 0; | ||
127 | } | ||
128 | EXPORT_SYMBOL(pwm_config); | ||
129 | |||
130 | int pwm_enable(struct pwm_device *pwm) | ||
131 | { | ||
132 | int rc = 0; | ||
133 | |||
134 | if (!pwm->clk_enabled) { | ||
135 | rc = clk_prepare_enable(pwm->clk); | ||
136 | if (!rc) | ||
137 | pwm->clk_enabled = 1; | ||
138 | } | ||
139 | return rc; | ||
140 | } | ||
141 | EXPORT_SYMBOL(pwm_enable); | ||
142 | |||
143 | void pwm_disable(struct pwm_device *pwm) | ||
144 | { | ||
145 | writel(0, pwm->mmio_base + MX3_PWMCR); | ||
146 | |||
147 | if (pwm->clk_enabled) { | ||
148 | clk_disable_unprepare(pwm->clk); | ||
149 | pwm->clk_enabled = 0; | ||
150 | } | ||
151 | } | ||
152 | EXPORT_SYMBOL(pwm_disable); | ||
153 | |||
154 | static DEFINE_MUTEX(pwm_lock); | ||
155 | static LIST_HEAD(pwm_list); | ||
156 | |||
157 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
158 | { | ||
159 | struct pwm_device *pwm; | ||
160 | int found = 0; | ||
161 | |||
162 | mutex_lock(&pwm_lock); | ||
163 | |||
164 | list_for_each_entry(pwm, &pwm_list, node) { | ||
165 | if (pwm->pwm_id == pwm_id) { | ||
166 | found = 1; | ||
167 | break; | ||
168 | } | ||
169 | } | ||
170 | |||
171 | if (found) { | ||
172 | if (pwm->use_count == 0) { | ||
173 | pwm->use_count++; | ||
174 | pwm->label = label; | ||
175 | } else | ||
176 | pwm = ERR_PTR(-EBUSY); | ||
177 | } else | ||
178 | pwm = ERR_PTR(-ENOENT); | ||
179 | |||
180 | mutex_unlock(&pwm_lock); | ||
181 | return pwm; | ||
182 | } | ||
183 | EXPORT_SYMBOL(pwm_request); | ||
184 | |||
185 | void pwm_free(struct pwm_device *pwm) | ||
186 | { | ||
187 | mutex_lock(&pwm_lock); | ||
188 | |||
189 | if (pwm->use_count) { | ||
190 | pwm->use_count--; | ||
191 | pwm->label = NULL; | ||
192 | } else | ||
193 | pr_warning("PWM device already freed\n"); | ||
194 | |||
195 | mutex_unlock(&pwm_lock); | ||
196 | } | ||
197 | EXPORT_SYMBOL(pwm_free); | ||
198 | |||
199 | static int __devinit mxc_pwm_probe(struct platform_device *pdev) | ||
200 | { | ||
201 | struct pwm_device *pwm; | ||
202 | struct resource *r; | ||
203 | int ret = 0; | ||
204 | |||
205 | pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | ||
206 | if (pwm == NULL) { | ||
207 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
208 | return -ENOMEM; | ||
209 | } | ||
210 | |||
211 | pwm->clk = clk_get(&pdev->dev, "pwm"); | ||
212 | |||
213 | if (IS_ERR(pwm->clk)) { | ||
214 | ret = PTR_ERR(pwm->clk); | ||
215 | goto err_free; | ||
216 | } | ||
217 | |||
218 | pwm->clk_enabled = 0; | ||
219 | |||
220 | pwm->use_count = 0; | ||
221 | pwm->pwm_id = pdev->id; | ||
222 | pwm->pdev = pdev; | ||
223 | |||
224 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
225 | if (r == NULL) { | ||
226 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
227 | ret = -ENODEV; | ||
228 | goto err_free_clk; | ||
229 | } | ||
230 | |||
231 | r = request_mem_region(r->start, resource_size(r), pdev->name); | ||
232 | if (r == NULL) { | ||
233 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
234 | ret = -EBUSY; | ||
235 | goto err_free_clk; | ||
236 | } | ||
237 | |||
238 | pwm->mmio_base = ioremap(r->start, resource_size(r)); | ||
239 | if (pwm->mmio_base == NULL) { | ||
240 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
241 | ret = -ENODEV; | ||
242 | goto err_free_mem; | ||
243 | } | ||
244 | |||
245 | mutex_lock(&pwm_lock); | ||
246 | list_add_tail(&pwm->node, &pwm_list); | ||
247 | mutex_unlock(&pwm_lock); | ||
248 | |||
249 | platform_set_drvdata(pdev, pwm); | ||
250 | return 0; | ||
251 | |||
252 | err_free_mem: | ||
253 | release_mem_region(r->start, resource_size(r)); | ||
254 | err_free_clk: | ||
255 | clk_put(pwm->clk); | ||
256 | err_free: | ||
257 | kfree(pwm); | ||
258 | return ret; | ||
259 | } | ||
260 | |||
261 | static int __devexit mxc_pwm_remove(struct platform_device *pdev) | ||
262 | { | ||
263 | struct pwm_device *pwm; | ||
264 | struct resource *r; | ||
265 | |||
266 | pwm = platform_get_drvdata(pdev); | ||
267 | if (pwm == NULL) | ||
268 | return -ENODEV; | ||
269 | |||
270 | mutex_lock(&pwm_lock); | ||
271 | list_del(&pwm->node); | ||
272 | mutex_unlock(&pwm_lock); | ||
273 | |||
274 | iounmap(pwm->mmio_base); | ||
275 | |||
276 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
277 | release_mem_region(r->start, resource_size(r)); | ||
278 | |||
279 | clk_put(pwm->clk); | ||
280 | |||
281 | kfree(pwm); | ||
282 | return 0; | ||
283 | } | ||
284 | |||
285 | static struct platform_driver mxc_pwm_driver = { | ||
286 | .driver = { | ||
287 | .name = "mxc_pwm", | ||
288 | }, | ||
289 | .probe = mxc_pwm_probe, | ||
290 | .remove = __devexit_p(mxc_pwm_remove), | ||
291 | }; | ||
292 | |||
293 | static int __init mxc_pwm_init(void) | ||
294 | { | ||
295 | return platform_driver_register(&mxc_pwm_driver); | ||
296 | } | ||
297 | arch_initcall(mxc_pwm_init); | ||
298 | |||
299 | static void __exit mxc_pwm_exit(void) | ||
300 | { | ||
301 | platform_driver_unregister(&mxc_pwm_driver); | ||
302 | } | ||
303 | module_exit(mxc_pwm_exit); | ||
304 | |||
305 | MODULE_LICENSE("GPL v2"); | ||
306 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); | ||
diff --git a/arch/arm/plat-nomadik/include/plat/i2c.h b/arch/arm/plat-nomadik/include/plat/i2c.h deleted file mode 100644 index 8ba70ffc31ec..000000000000 --- a/arch/arm/plat-nomadik/include/plat/i2c.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 ST-Ericsson | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2, as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __PLAT_I2C_H | ||
9 | #define __PLAT_I2C_H | ||
10 | |||
11 | enum i2c_freq_mode { | ||
12 | I2C_FREQ_MODE_STANDARD, /* up to 100 Kb/s */ | ||
13 | I2C_FREQ_MODE_FAST, /* up to 400 Kb/s */ | ||
14 | I2C_FREQ_MODE_HIGH_SPEED, /* up to 3.4 Mb/s */ | ||
15 | I2C_FREQ_MODE_FAST_PLUS, /* up to 1 Mb/s */ | ||
16 | }; | ||
17 | |||
18 | /** | ||
19 | * struct nmk_i2c_controller - client specific controller configuration | ||
20 | * @clk_freq: clock frequency for the operation mode | ||
21 | * @slsu: Slave data setup time in ns. | ||
22 | * The needed setup time for three modes of operation | ||
23 | * are 250ns, 100ns and 10ns respectively thus leading | ||
24 | * to the values of 14, 6, 2 for a 48 MHz i2c clk | ||
25 | * @tft: Tx FIFO Threshold in bytes | ||
26 | * @rft: Rx FIFO Threshold in bytes | ||
27 | * @timeout Slave response timeout(ms) | ||
28 | * @sm: speed mode | ||
29 | */ | ||
30 | struct nmk_i2c_controller { | ||
31 | unsigned long clk_freq; | ||
32 | unsigned short slsu; | ||
33 | unsigned char tft; | ||
34 | unsigned char rft; | ||
35 | int timeout; | ||
36 | enum i2c_freq_mode sm; | ||
37 | }; | ||
38 | |||
39 | #endif /* __PLAT_I2C_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h index 5493bd95da5e..eb3e4d555343 100644 --- a/arch/arm/plat-omap/include/plat/mmc.h +++ b/arch/arm/plat-omap/include/plat/mmc.h | |||
@@ -81,8 +81,6 @@ struct omap_mmc_platform_data { | |||
81 | /* Return context loss count due to PM states changing */ | 81 | /* Return context loss count due to PM states changing */ |
82 | int (*get_context_loss_count)(struct device *dev); | 82 | int (*get_context_loss_count)(struct device *dev); |
83 | 83 | ||
84 | u64 dma_mask; | ||
85 | |||
86 | /* Integrating attributes from the omap_hwmod layer */ | 84 | /* Integrating attributes from the omap_hwmod layer */ |
87 | u8 controller_flags; | 85 | u8 controller_flags; |
88 | 86 | ||
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile index f302d048392d..af8e484001e5 100644 --- a/arch/arm/plat-pxa/Makefile +++ b/arch/arm/plat-pxa/Makefile | |||
@@ -8,5 +8,4 @@ obj-$(CONFIG_PXA3xx) += mfp.o | |||
8 | obj-$(CONFIG_PXA95x) += mfp.o | 8 | obj-$(CONFIG_PXA95x) += mfp.o |
9 | obj-$(CONFIG_ARCH_MMP) += mfp.o | 9 | obj-$(CONFIG_ARCH_MMP) += mfp.o |
10 | 10 | ||
11 | obj-$(CONFIG_HAVE_PWM) += pwm.o | ||
12 | obj-$(CONFIG_PXA_SSP) += ssp.o | 11 | obj-$(CONFIG_PXA_SSP) += ssp.o |
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c deleted file mode 100644 index ef32686feef9..000000000000 --- a/arch/arm/plat-pxa/pwm.c +++ /dev/null | |||
@@ -1,304 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/pwm.c | ||
3 | * | ||
4 | * simple driver for PWM (Pulse Width Modulator) controller | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * 2008-02-13 initial version | ||
11 | * eric miao <eric.miao@marvell.com> | ||
12 | */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/err.h> | ||
19 | #include <linux/clk.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/pwm.h> | ||
22 | |||
23 | #include <asm/div64.h> | ||
24 | |||
25 | #define HAS_SECONDARY_PWM 0x10 | ||
26 | #define PWM_ID_BASE(d) ((d) & 0xf) | ||
27 | |||
28 | static const struct platform_device_id pwm_id_table[] = { | ||
29 | /* PWM has_secondary_pwm? */ | ||
30 | { "pxa25x-pwm", 0 }, | ||
31 | { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM }, | ||
32 | { "pxa168-pwm", 1 }, | ||
33 | { "pxa910-pwm", 1 }, | ||
34 | { }, | ||
35 | }; | ||
36 | MODULE_DEVICE_TABLE(platform, pwm_id_table); | ||
37 | |||
38 | /* PWM registers and bits definitions */ | ||
39 | #define PWMCR (0x00) | ||
40 | #define PWMDCR (0x04) | ||
41 | #define PWMPCR (0x08) | ||
42 | |||
43 | #define PWMCR_SD (1 << 6) | ||
44 | #define PWMDCR_FD (1 << 10) | ||
45 | |||
46 | struct pwm_device { | ||
47 | struct list_head node; | ||
48 | struct pwm_device *secondary; | ||
49 | struct platform_device *pdev; | ||
50 | |||
51 | const char *label; | ||
52 | struct clk *clk; | ||
53 | int clk_enabled; | ||
54 | void __iomem *mmio_base; | ||
55 | |||
56 | unsigned int use_count; | ||
57 | unsigned int pwm_id; | ||
58 | }; | ||
59 | |||
60 | /* | ||
61 | * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE | ||
62 | * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE | ||
63 | */ | ||
64 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
65 | { | ||
66 | unsigned long long c; | ||
67 | unsigned long period_cycles, prescale, pv, dc; | ||
68 | |||
69 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | ||
70 | return -EINVAL; | ||
71 | |||
72 | c = clk_get_rate(pwm->clk); | ||
73 | c = c * period_ns; | ||
74 | do_div(c, 1000000000); | ||
75 | period_cycles = c; | ||
76 | |||
77 | if (period_cycles < 1) | ||
78 | period_cycles = 1; | ||
79 | prescale = (period_cycles - 1) / 1024; | ||
80 | pv = period_cycles / (prescale + 1) - 1; | ||
81 | |||
82 | if (prescale > 63) | ||
83 | return -EINVAL; | ||
84 | |||
85 | if (duty_ns == period_ns) | ||
86 | dc = PWMDCR_FD; | ||
87 | else | ||
88 | dc = (pv + 1) * duty_ns / period_ns; | ||
89 | |||
90 | /* NOTE: the clock to PWM has to be enabled first | ||
91 | * before writing to the registers | ||
92 | */ | ||
93 | clk_enable(pwm->clk); | ||
94 | __raw_writel(prescale, pwm->mmio_base + PWMCR); | ||
95 | __raw_writel(dc, pwm->mmio_base + PWMDCR); | ||
96 | __raw_writel(pv, pwm->mmio_base + PWMPCR); | ||
97 | clk_disable(pwm->clk); | ||
98 | |||
99 | return 0; | ||
100 | } | ||
101 | EXPORT_SYMBOL(pwm_config); | ||
102 | |||
103 | int pwm_enable(struct pwm_device *pwm) | ||
104 | { | ||
105 | int rc = 0; | ||
106 | |||
107 | if (!pwm->clk_enabled) { | ||
108 | rc = clk_enable(pwm->clk); | ||
109 | if (!rc) | ||
110 | pwm->clk_enabled = 1; | ||
111 | } | ||
112 | return rc; | ||
113 | } | ||
114 | EXPORT_SYMBOL(pwm_enable); | ||
115 | |||
116 | void pwm_disable(struct pwm_device *pwm) | ||
117 | { | ||
118 | if (pwm->clk_enabled) { | ||
119 | clk_disable(pwm->clk); | ||
120 | pwm->clk_enabled = 0; | ||
121 | } | ||
122 | } | ||
123 | EXPORT_SYMBOL(pwm_disable); | ||
124 | |||
125 | static DEFINE_MUTEX(pwm_lock); | ||
126 | static LIST_HEAD(pwm_list); | ||
127 | |||
128 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
129 | { | ||
130 | struct pwm_device *pwm; | ||
131 | int found = 0; | ||
132 | |||
133 | mutex_lock(&pwm_lock); | ||
134 | |||
135 | list_for_each_entry(pwm, &pwm_list, node) { | ||
136 | if (pwm->pwm_id == pwm_id) { | ||
137 | found = 1; | ||
138 | break; | ||
139 | } | ||
140 | } | ||
141 | |||
142 | if (found) { | ||
143 | if (pwm->use_count == 0) { | ||
144 | pwm->use_count++; | ||
145 | pwm->label = label; | ||
146 | } else | ||
147 | pwm = ERR_PTR(-EBUSY); | ||
148 | } else | ||
149 | pwm = ERR_PTR(-ENOENT); | ||
150 | |||
151 | mutex_unlock(&pwm_lock); | ||
152 | return pwm; | ||
153 | } | ||
154 | EXPORT_SYMBOL(pwm_request); | ||
155 | |||
156 | void pwm_free(struct pwm_device *pwm) | ||
157 | { | ||
158 | mutex_lock(&pwm_lock); | ||
159 | |||
160 | if (pwm->use_count) { | ||
161 | pwm->use_count--; | ||
162 | pwm->label = NULL; | ||
163 | } else | ||
164 | pr_warning("PWM device already freed\n"); | ||
165 | |||
166 | mutex_unlock(&pwm_lock); | ||
167 | } | ||
168 | EXPORT_SYMBOL(pwm_free); | ||
169 | |||
170 | static inline void __add_pwm(struct pwm_device *pwm) | ||
171 | { | ||
172 | mutex_lock(&pwm_lock); | ||
173 | list_add_tail(&pwm->node, &pwm_list); | ||
174 | mutex_unlock(&pwm_lock); | ||
175 | } | ||
176 | |||
177 | static int __devinit pwm_probe(struct platform_device *pdev) | ||
178 | { | ||
179 | const struct platform_device_id *id = platform_get_device_id(pdev); | ||
180 | struct pwm_device *pwm, *secondary = NULL; | ||
181 | struct resource *r; | ||
182 | int ret = 0; | ||
183 | |||
184 | pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | ||
185 | if (pwm == NULL) { | ||
186 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
187 | return -ENOMEM; | ||
188 | } | ||
189 | |||
190 | pwm->clk = clk_get(&pdev->dev, NULL); | ||
191 | if (IS_ERR(pwm->clk)) { | ||
192 | ret = PTR_ERR(pwm->clk); | ||
193 | goto err_free; | ||
194 | } | ||
195 | pwm->clk_enabled = 0; | ||
196 | |||
197 | pwm->use_count = 0; | ||
198 | pwm->pwm_id = PWM_ID_BASE(id->driver_data) + pdev->id; | ||
199 | pwm->pdev = pdev; | ||
200 | |||
201 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
202 | if (r == NULL) { | ||
203 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
204 | ret = -ENODEV; | ||
205 | goto err_free_clk; | ||
206 | } | ||
207 | |||
208 | r = request_mem_region(r->start, resource_size(r), pdev->name); | ||
209 | if (r == NULL) { | ||
210 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
211 | ret = -EBUSY; | ||
212 | goto err_free_clk; | ||
213 | } | ||
214 | |||
215 | pwm->mmio_base = ioremap(r->start, resource_size(r)); | ||
216 | if (pwm->mmio_base == NULL) { | ||
217 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
218 | ret = -ENODEV; | ||
219 | goto err_free_mem; | ||
220 | } | ||
221 | |||
222 | if (id->driver_data & HAS_SECONDARY_PWM) { | ||
223 | secondary = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | ||
224 | if (secondary == NULL) { | ||
225 | ret = -ENOMEM; | ||
226 | goto err_free_mem; | ||
227 | } | ||
228 | |||
229 | *secondary = *pwm; | ||
230 | pwm->secondary = secondary; | ||
231 | |||
232 | /* registers for the second PWM has offset of 0x10 */ | ||
233 | secondary->mmio_base = pwm->mmio_base + 0x10; | ||
234 | secondary->pwm_id = pdev->id + 2; | ||
235 | } | ||
236 | |||
237 | __add_pwm(pwm); | ||
238 | if (secondary) | ||
239 | __add_pwm(secondary); | ||
240 | |||
241 | platform_set_drvdata(pdev, pwm); | ||
242 | return 0; | ||
243 | |||
244 | err_free_mem: | ||
245 | release_mem_region(r->start, resource_size(r)); | ||
246 | err_free_clk: | ||
247 | clk_put(pwm->clk); | ||
248 | err_free: | ||
249 | kfree(pwm); | ||
250 | return ret; | ||
251 | } | ||
252 | |||
253 | static int __devexit pwm_remove(struct platform_device *pdev) | ||
254 | { | ||
255 | struct pwm_device *pwm; | ||
256 | struct resource *r; | ||
257 | |||
258 | pwm = platform_get_drvdata(pdev); | ||
259 | if (pwm == NULL) | ||
260 | return -ENODEV; | ||
261 | |||
262 | mutex_lock(&pwm_lock); | ||
263 | |||
264 | if (pwm->secondary) { | ||
265 | list_del(&pwm->secondary->node); | ||
266 | kfree(pwm->secondary); | ||
267 | } | ||
268 | |||
269 | list_del(&pwm->node); | ||
270 | mutex_unlock(&pwm_lock); | ||
271 | |||
272 | iounmap(pwm->mmio_base); | ||
273 | |||
274 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
275 | release_mem_region(r->start, resource_size(r)); | ||
276 | |||
277 | clk_put(pwm->clk); | ||
278 | kfree(pwm); | ||
279 | return 0; | ||
280 | } | ||
281 | |||
282 | static struct platform_driver pwm_driver = { | ||
283 | .driver = { | ||
284 | .name = "pxa25x-pwm", | ||
285 | .owner = THIS_MODULE, | ||
286 | }, | ||
287 | .probe = pwm_probe, | ||
288 | .remove = __devexit_p(pwm_remove), | ||
289 | .id_table = pwm_id_table, | ||
290 | }; | ||
291 | |||
292 | static int __init pwm_init(void) | ||
293 | { | ||
294 | return platform_driver_register(&pwm_driver); | ||
295 | } | ||
296 | arch_initcall(pwm_init); | ||
297 | |||
298 | static void __exit pwm_exit(void) | ||
299 | { | ||
300 | platform_driver_unregister(&pwm_driver); | ||
301 | } | ||
302 | module_exit(pwm_exit); | ||
303 | |||
304 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index b78717496677..9e40e8d00740 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
@@ -59,7 +59,3 @@ obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o | |||
59 | 59 | ||
60 | obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o | 60 | obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o |
61 | obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o | 61 | obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o |
62 | |||
63 | # PWM support | ||
64 | |||
65 | obj-$(CONFIG_HAVE_PWM) += pwm.o | ||
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c deleted file mode 100644 index d3583050fb05..000000000000 --- a/arch/arm/plat-samsung/pwm.c +++ /dev/null | |||
@@ -1,416 +0,0 @@ | |||
1 | /* arch/arm/plat-s3c/pwm.c | ||
2 | * | ||
3 | * Copyright (c) 2007 Ben Dooks | ||
4 | * Copyright (c) 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> | ||
6 | * | ||
7 | * S3C series PWM device core | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License. | ||
12 | */ | ||
13 | |||
14 | #include <linux/export.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/err.h> | ||
19 | #include <linux/clk.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/pwm.h> | ||
22 | |||
23 | #include <mach/map.h> | ||
24 | |||
25 | #include <plat/regs-timer.h> | ||
26 | |||
27 | struct pwm_device { | ||
28 | struct list_head list; | ||
29 | struct platform_device *pdev; | ||
30 | |||
31 | struct clk *clk_div; | ||
32 | struct clk *clk; | ||
33 | const char *label; | ||
34 | |||
35 | unsigned int period_ns; | ||
36 | unsigned int duty_ns; | ||
37 | |||
38 | unsigned char tcon_base; | ||
39 | unsigned char use_count; | ||
40 | unsigned char pwm_id; | ||
41 | }; | ||
42 | |||
43 | #define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg) | ||
44 | |||
45 | static struct clk *clk_scaler[2]; | ||
46 | |||
47 | static inline int pwm_is_tdiv(struct pwm_device *pwm) | ||
48 | { | ||
49 | return clk_get_parent(pwm->clk) == pwm->clk_div; | ||
50 | } | ||
51 | |||
52 | static DEFINE_MUTEX(pwm_lock); | ||
53 | static LIST_HEAD(pwm_list); | ||
54 | |||
55 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
56 | { | ||
57 | struct pwm_device *pwm; | ||
58 | int found = 0; | ||
59 | |||
60 | mutex_lock(&pwm_lock); | ||
61 | |||
62 | list_for_each_entry(pwm, &pwm_list, list) { | ||
63 | if (pwm->pwm_id == pwm_id) { | ||
64 | found = 1; | ||
65 | break; | ||
66 | } | ||
67 | } | ||
68 | |||
69 | if (found) { | ||
70 | if (pwm->use_count == 0) { | ||
71 | pwm->use_count = 1; | ||
72 | pwm->label = label; | ||
73 | } else | ||
74 | pwm = ERR_PTR(-EBUSY); | ||
75 | } else | ||
76 | pwm = ERR_PTR(-ENOENT); | ||
77 | |||
78 | mutex_unlock(&pwm_lock); | ||
79 | return pwm; | ||
80 | } | ||
81 | |||
82 | EXPORT_SYMBOL(pwm_request); | ||
83 | |||
84 | |||
85 | void pwm_free(struct pwm_device *pwm) | ||
86 | { | ||
87 | mutex_lock(&pwm_lock); | ||
88 | |||
89 | if (pwm->use_count) { | ||
90 | pwm->use_count--; | ||
91 | pwm->label = NULL; | ||
92 | } else | ||
93 | printk(KERN_ERR "PWM%d device already freed\n", pwm->pwm_id); | ||
94 | |||
95 | mutex_unlock(&pwm_lock); | ||
96 | } | ||
97 | |||
98 | EXPORT_SYMBOL(pwm_free); | ||
99 | |||
100 | #define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0)) | ||
101 | #define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2)) | ||
102 | #define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3)) | ||
103 | #define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1)) | ||
104 | |||
105 | int pwm_enable(struct pwm_device *pwm) | ||
106 | { | ||
107 | unsigned long flags; | ||
108 | unsigned long tcon; | ||
109 | |||
110 | local_irq_save(flags); | ||
111 | |||
112 | tcon = __raw_readl(S3C2410_TCON); | ||
113 | tcon |= pwm_tcon_start(pwm); | ||
114 | __raw_writel(tcon, S3C2410_TCON); | ||
115 | |||
116 | local_irq_restore(flags); | ||
117 | |||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | EXPORT_SYMBOL(pwm_enable); | ||
122 | |||
123 | void pwm_disable(struct pwm_device *pwm) | ||
124 | { | ||
125 | unsigned long flags; | ||
126 | unsigned long tcon; | ||
127 | |||
128 | local_irq_save(flags); | ||
129 | |||
130 | tcon = __raw_readl(S3C2410_TCON); | ||
131 | tcon &= ~pwm_tcon_start(pwm); | ||
132 | __raw_writel(tcon, S3C2410_TCON); | ||
133 | |||
134 | local_irq_restore(flags); | ||
135 | } | ||
136 | |||
137 | EXPORT_SYMBOL(pwm_disable); | ||
138 | |||
139 | static unsigned long pwm_calc_tin(struct pwm_device *pwm, unsigned long freq) | ||
140 | { | ||
141 | unsigned long tin_parent_rate; | ||
142 | unsigned int div; | ||
143 | |||
144 | tin_parent_rate = clk_get_rate(clk_get_parent(pwm->clk_div)); | ||
145 | pwm_dbg(pwm, "tin parent at %lu\n", tin_parent_rate); | ||
146 | |||
147 | for (div = 2; div <= 16; div *= 2) { | ||
148 | if ((tin_parent_rate / (div << 16)) < freq) | ||
149 | return tin_parent_rate / div; | ||
150 | } | ||
151 | |||
152 | return tin_parent_rate / 16; | ||
153 | } | ||
154 | |||
155 | #define NS_IN_HZ (1000000000UL) | ||
156 | |||
157 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
158 | { | ||
159 | unsigned long tin_rate; | ||
160 | unsigned long tin_ns; | ||
161 | unsigned long period; | ||
162 | unsigned long flags; | ||
163 | unsigned long tcon; | ||
164 | unsigned long tcnt; | ||
165 | long tcmp; | ||
166 | |||
167 | /* We currently avoid using 64bit arithmetic by using the | ||
168 | * fact that anything faster than 1Hz is easily representable | ||
169 | * by 32bits. */ | ||
170 | |||
171 | if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ) | ||
172 | return -ERANGE; | ||
173 | |||
174 | if (duty_ns > period_ns) | ||
175 | return -EINVAL; | ||
176 | |||
177 | if (period_ns == pwm->period_ns && | ||
178 | duty_ns == pwm->duty_ns) | ||
179 | return 0; | ||
180 | |||
181 | /* The TCMP and TCNT can be read without a lock, they're not | ||
182 | * shared between the timers. */ | ||
183 | |||
184 | tcmp = __raw_readl(S3C2410_TCMPB(pwm->pwm_id)); | ||
185 | tcnt = __raw_readl(S3C2410_TCNTB(pwm->pwm_id)); | ||
186 | |||
187 | period = NS_IN_HZ / period_ns; | ||
188 | |||
189 | pwm_dbg(pwm, "duty_ns=%d, period_ns=%d (%lu)\n", | ||
190 | duty_ns, period_ns, period); | ||
191 | |||
192 | /* Check to see if we are changing the clock rate of the PWM */ | ||
193 | |||
194 | if (pwm->period_ns != period_ns) { | ||
195 | if (pwm_is_tdiv(pwm)) { | ||
196 | tin_rate = pwm_calc_tin(pwm, period); | ||
197 | clk_set_rate(pwm->clk_div, tin_rate); | ||
198 | } else | ||
199 | tin_rate = clk_get_rate(pwm->clk); | ||
200 | |||
201 | pwm->period_ns = period_ns; | ||
202 | |||
203 | pwm_dbg(pwm, "tin_rate=%lu\n", tin_rate); | ||
204 | |||
205 | tin_ns = NS_IN_HZ / tin_rate; | ||
206 | tcnt = period_ns / tin_ns; | ||
207 | } else | ||
208 | tin_ns = NS_IN_HZ / clk_get_rate(pwm->clk); | ||
209 | |||
210 | /* Note, counters count down */ | ||
211 | |||
212 | tcmp = duty_ns / tin_ns; | ||
213 | tcmp = tcnt - tcmp; | ||
214 | /* the pwm hw only checks the compare register after a decrement, | ||
215 | so the pin never toggles if tcmp = tcnt */ | ||
216 | if (tcmp == tcnt) | ||
217 | tcmp--; | ||
218 | |||
219 | pwm_dbg(pwm, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt); | ||
220 | |||
221 | if (tcmp < 0) | ||
222 | tcmp = 0; | ||
223 | |||
224 | /* Update the PWM register block. */ | ||
225 | |||
226 | local_irq_save(flags); | ||
227 | |||
228 | __raw_writel(tcmp, S3C2410_TCMPB(pwm->pwm_id)); | ||
229 | __raw_writel(tcnt, S3C2410_TCNTB(pwm->pwm_id)); | ||
230 | |||
231 | tcon = __raw_readl(S3C2410_TCON); | ||
232 | tcon |= pwm_tcon_manulupdate(pwm); | ||
233 | tcon |= pwm_tcon_autoreload(pwm); | ||
234 | __raw_writel(tcon, S3C2410_TCON); | ||
235 | |||
236 | tcon &= ~pwm_tcon_manulupdate(pwm); | ||
237 | __raw_writel(tcon, S3C2410_TCON); | ||
238 | |||
239 | local_irq_restore(flags); | ||
240 | |||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | EXPORT_SYMBOL(pwm_config); | ||
245 | |||
246 | static int pwm_register(struct pwm_device *pwm) | ||
247 | { | ||
248 | pwm->duty_ns = -1; | ||
249 | pwm->period_ns = -1; | ||
250 | |||
251 | mutex_lock(&pwm_lock); | ||
252 | list_add_tail(&pwm->list, &pwm_list); | ||
253 | mutex_unlock(&pwm_lock); | ||
254 | |||
255 | return 0; | ||
256 | } | ||
257 | |||
258 | static int s3c_pwm_probe(struct platform_device *pdev) | ||
259 | { | ||
260 | struct device *dev = &pdev->dev; | ||
261 | struct pwm_device *pwm; | ||
262 | unsigned long flags; | ||
263 | unsigned long tcon; | ||
264 | unsigned int id = pdev->id; | ||
265 | int ret; | ||
266 | |||
267 | if (id == 4) { | ||
268 | dev_err(dev, "TIMER4 is currently not supported\n"); | ||
269 | return -ENXIO; | ||
270 | } | ||
271 | |||
272 | pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | ||
273 | if (pwm == NULL) { | ||
274 | dev_err(dev, "failed to allocate pwm_device\n"); | ||
275 | return -ENOMEM; | ||
276 | } | ||
277 | |||
278 | pwm->pdev = pdev; | ||
279 | pwm->pwm_id = id; | ||
280 | |||
281 | /* calculate base of control bits in TCON */ | ||
282 | pwm->tcon_base = id == 0 ? 0 : (id * 4) + 4; | ||
283 | |||
284 | pwm->clk = clk_get(dev, "pwm-tin"); | ||
285 | if (IS_ERR(pwm->clk)) { | ||
286 | dev_err(dev, "failed to get pwm tin clk\n"); | ||
287 | ret = PTR_ERR(pwm->clk); | ||
288 | goto err_alloc; | ||
289 | } | ||
290 | |||
291 | pwm->clk_div = clk_get(dev, "pwm-tdiv"); | ||
292 | if (IS_ERR(pwm->clk_div)) { | ||
293 | dev_err(dev, "failed to get pwm tdiv clk\n"); | ||
294 | ret = PTR_ERR(pwm->clk_div); | ||
295 | goto err_clk_tin; | ||
296 | } | ||
297 | |||
298 | clk_enable(pwm->clk); | ||
299 | clk_enable(pwm->clk_div); | ||
300 | |||
301 | local_irq_save(flags); | ||
302 | |||
303 | tcon = __raw_readl(S3C2410_TCON); | ||
304 | tcon |= pwm_tcon_invert(pwm); | ||
305 | __raw_writel(tcon, S3C2410_TCON); | ||
306 | |||
307 | local_irq_restore(flags); | ||
308 | |||
309 | |||
310 | ret = pwm_register(pwm); | ||
311 | if (ret) { | ||
312 | dev_err(dev, "failed to register pwm\n"); | ||
313 | goto err_clk_tdiv; | ||
314 | } | ||
315 | |||
316 | pwm_dbg(pwm, "config bits %02x\n", | ||
317 | (__raw_readl(S3C2410_TCON) >> pwm->tcon_base) & 0x0f); | ||
318 | |||
319 | dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n", | ||
320 | clk_get_rate(pwm->clk), | ||
321 | clk_get_rate(pwm->clk_div), | ||
322 | pwm_is_tdiv(pwm) ? "div" : "ext", pwm->tcon_base); | ||
323 | |||
324 | platform_set_drvdata(pdev, pwm); | ||
325 | return 0; | ||
326 | |||
327 | err_clk_tdiv: | ||
328 | clk_disable(pwm->clk_div); | ||
329 | clk_disable(pwm->clk); | ||
330 | clk_put(pwm->clk_div); | ||
331 | |||
332 | err_clk_tin: | ||
333 | clk_put(pwm->clk); | ||
334 | |||
335 | err_alloc: | ||
336 | kfree(pwm); | ||
337 | return ret; | ||
338 | } | ||
339 | |||
340 | static int __devexit s3c_pwm_remove(struct platform_device *pdev) | ||
341 | { | ||
342 | struct pwm_device *pwm = platform_get_drvdata(pdev); | ||
343 | |||
344 | clk_disable(pwm->clk_div); | ||
345 | clk_disable(pwm->clk); | ||
346 | clk_put(pwm->clk_div); | ||
347 | clk_put(pwm->clk); | ||
348 | kfree(pwm); | ||
349 | |||
350 | return 0; | ||
351 | } | ||
352 | |||
353 | #ifdef CONFIG_PM | ||
354 | static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state) | ||
355 | { | ||
356 | struct pwm_device *pwm = platform_get_drvdata(pdev); | ||
357 | |||
358 | /* No one preserve these values during suspend so reset them | ||
359 | * Otherwise driver leaves PWM unconfigured if same values | ||
360 | * passed to pwm_config | ||
361 | */ | ||
362 | pwm->period_ns = 0; | ||
363 | pwm->duty_ns = 0; | ||
364 | |||
365 | return 0; | ||
366 | } | ||
367 | |||
368 | static int s3c_pwm_resume(struct platform_device *pdev) | ||
369 | { | ||
370 | struct pwm_device *pwm = platform_get_drvdata(pdev); | ||
371 | unsigned long tcon; | ||
372 | |||
373 | /* Restore invertion */ | ||
374 | tcon = __raw_readl(S3C2410_TCON); | ||
375 | tcon |= pwm_tcon_invert(pwm); | ||
376 | __raw_writel(tcon, S3C2410_TCON); | ||
377 | |||
378 | return 0; | ||
379 | } | ||
380 | |||
381 | #else | ||
382 | #define s3c_pwm_suspend NULL | ||
383 | #define s3c_pwm_resume NULL | ||
384 | #endif | ||
385 | |||
386 | static struct platform_driver s3c_pwm_driver = { | ||
387 | .driver = { | ||
388 | .name = "s3c24xx-pwm", | ||
389 | .owner = THIS_MODULE, | ||
390 | }, | ||
391 | .probe = s3c_pwm_probe, | ||
392 | .remove = __devexit_p(s3c_pwm_remove), | ||
393 | .suspend = s3c_pwm_suspend, | ||
394 | .resume = s3c_pwm_resume, | ||
395 | }; | ||
396 | |||
397 | static int __init pwm_init(void) | ||
398 | { | ||
399 | int ret; | ||
400 | |||
401 | clk_scaler[0] = clk_get(NULL, "pwm-scaler0"); | ||
402 | clk_scaler[1] = clk_get(NULL, "pwm-scaler1"); | ||
403 | |||
404 | if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) { | ||
405 | printk(KERN_ERR "%s: failed to get scaler clocks\n", __func__); | ||
406 | return -EINVAL; | ||
407 | } | ||
408 | |||
409 | ret = platform_driver_register(&s3c_pwm_driver); | ||
410 | if (ret) | ||
411 | printk(KERN_ERR "%s: failed to add pwm driver\n", __func__); | ||
412 | |||
413 | return ret; | ||
414 | } | ||
415 | |||
416 | arch_initcall(pwm_init); | ||
diff --git a/arch/arm/plat-spear/include/plat/keyboard.h b/arch/arm/plat-spear/include/plat/keyboard.h index 0562f134621d..9248e3a7e333 100644 --- a/arch/arm/plat-spear/include/plat/keyboard.h +++ b/arch/arm/plat-spear/include/plat/keyboard.h | |||
@@ -149,6 +149,7 @@ int _name[] = { \ | |||
149 | * keymap: pointer to keymap data (table and size) | 149 | * keymap: pointer to keymap data (table and size) |
150 | * rep: enables key autorepeat | 150 | * rep: enables key autorepeat |
151 | * mode: choose keyboard support(9x9, 6x6, 2x2) | 151 | * mode: choose keyboard support(9x9, 6x6, 2x2) |
152 | * suspended_rate: rate at which keyboard would operate in suspended mode | ||
152 | * | 153 | * |
153 | * This structure is supposed to be used by platform code to supply | 154 | * This structure is supposed to be used by platform code to supply |
154 | * keymaps to drivers that implement keyboards. | 155 | * keymaps to drivers that implement keyboards. |
@@ -157,6 +158,7 @@ struct kbd_platform_data { | |||
157 | const struct matrix_keymap_data *keymap; | 158 | const struct matrix_keymap_data *keymap; |
158 | bool rep; | 159 | bool rep; |
159 | unsigned int mode; | 160 | unsigned int mode; |
161 | unsigned int suspended_rate; | ||
160 | }; | 162 | }; |
161 | 163 | ||
162 | #endif /* __PLAT_KEYBOARD_H */ | 164 | #endif /* __PLAT_KEYBOARD_H */ |
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h index 2bc6b54460a8..eb6590ded40d 100644 --- a/arch/arm/plat-spear/include/plat/pl080.h +++ b/arch/arm/plat-spear/include/plat/pl080.h | |||
@@ -14,8 +14,8 @@ | |||
14 | #ifndef __PLAT_PL080_H | 14 | #ifndef __PLAT_PL080_H |
15 | #define __PLAT_PL080_H | 15 | #define __PLAT_PL080_H |
16 | 16 | ||
17 | struct pl08x_dma_chan; | 17 | struct pl08x_channel_data; |
18 | int pl080_get_signal(struct pl08x_dma_chan *ch); | 18 | int pl080_get_signal(const struct pl08x_channel_data *cd); |
19 | void pl080_put_signal(struct pl08x_dma_chan *ch); | 19 | void pl080_put_signal(const struct pl08x_channel_data *cd, int signal); |
20 | 20 | ||
21 | #endif /* __PLAT_PL080_H */ | 21 | #endif /* __PLAT_PL080_H */ |
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c index 12cf27f935f9..cfa1199d0f4a 100644 --- a/arch/arm/plat-spear/pl080.c +++ b/arch/arm/plat-spear/pl080.c | |||
@@ -27,9 +27,8 @@ struct { | |||
27 | unsigned char val; | 27 | unsigned char val; |
28 | } signals[16] = {{0, 0}, }; | 28 | } signals[16] = {{0, 0}, }; |
29 | 29 | ||
30 | int pl080_get_signal(struct pl08x_dma_chan *ch) | 30 | int pl080_get_signal(const struct pl08x_channel_data *cd) |
31 | { | 31 | { |
32 | const struct pl08x_channel_data *cd = ch->cd; | ||
33 | unsigned int signal = cd->min_signal, val; | 32 | unsigned int signal = cd->min_signal, val; |
34 | unsigned long flags; | 33 | unsigned long flags; |
35 | 34 | ||
@@ -63,18 +62,17 @@ int pl080_get_signal(struct pl08x_dma_chan *ch) | |||
63 | return signal; | 62 | return signal; |
64 | } | 63 | } |
65 | 64 | ||
66 | void pl080_put_signal(struct pl08x_dma_chan *ch) | 65 | void pl080_put_signal(const struct pl08x_channel_data *cd, int signal) |
67 | { | 66 | { |
68 | const struct pl08x_channel_data *cd = ch->cd; | ||
69 | unsigned long flags; | 67 | unsigned long flags; |
70 | 68 | ||
71 | spin_lock_irqsave(&lock, flags); | 69 | spin_lock_irqsave(&lock, flags); |
72 | 70 | ||
73 | /* if signal is not used */ | 71 | /* if signal is not used */ |
74 | if (!signals[cd->min_signal].busy) | 72 | if (!signals[signal].busy) |
75 | BUG(); | 73 | BUG(); |
76 | 74 | ||
77 | signals[cd->min_signal].busy--; | 75 | signals[signal].busy--; |
78 | 76 | ||
79 | spin_unlock_irqrestore(&lock, flags); | 77 | spin_unlock_irqrestore(&lock, flags); |
80 | } | 78 | } |
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c index 49c7db48c7f1..d7c5c171f5aa 100644 --- a/arch/arm/plat-versatile/platsmp.c +++ b/arch/arm/plat-versatile/platsmp.c | |||
@@ -85,7 +85,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
85 | * the boot monitor to read the system wide flags register, | 85 | * the boot monitor to read the system wide flags register, |
86 | * and branch to the address found there. | 86 | * and branch to the address found there. |
87 | */ | 87 | */ |
88 | gic_raise_softirq(cpumask_of(cpu), 1); | 88 | gic_raise_softirq(cpumask_of(cpu), 0); |
89 | 89 | ||
90 | timeout = jiffies + (1 * HZ); | 90 | timeout = jiffies + (1 * HZ); |
91 | while (time_before(jiffies, timeout)) { | 91 | while (time_before(jiffies, timeout)) { |
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 4fa9903b83cf..cc926c985981 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S | |||
@@ -7,18 +7,20 @@ | |||
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | * | ||
11 | * Basic entry code, called from the kernel's undefined instruction trap. | ||
12 | * r0 = faulted instruction | ||
13 | * r5 = faulted PC+4 | ||
14 | * r9 = successful return | ||
15 | * r10 = thread_info structure | ||
16 | * lr = failure return | ||
17 | */ | 10 | */ |
18 | #include <asm/thread_info.h> | 11 | #include <asm/thread_info.h> |
19 | #include <asm/vfpmacros.h> | 12 | #include <asm/vfpmacros.h> |
20 | #include "../kernel/entry-header.S" | 13 | #include "../kernel/entry-header.S" |
21 | 14 | ||
15 | @ VFP entry point. | ||
16 | @ | ||
17 | @ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) | ||
18 | @ r2 = PC value to resume execution after successful emulation | ||
19 | @ r9 = normal "successful" return address | ||
20 | @ r10 = this threads thread_info structure | ||
21 | @ lr = unrecognised instruction return address | ||
22 | @ IRQs disabled. | ||
23 | @ | ||
22 | ENTRY(do_vfp) | 24 | ENTRY(do_vfp) |
23 | #ifdef CONFIG_PREEMPT | 25 | #ifdef CONFIG_PREEMPT |
24 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | 26 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count |
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 2d30c7f6edd3..ea0349f63586 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -16,6 +16,7 @@ | |||
16 | */ | 16 | */ |
17 | #include <asm/thread_info.h> | 17 | #include <asm/thread_info.h> |
18 | #include <asm/vfpmacros.h> | 18 | #include <asm/vfpmacros.h> |
19 | #include <linux/kern_levels.h> | ||
19 | #include "../kernel/entry-header.S" | 20 | #include "../kernel/entry-header.S" |
20 | 21 | ||
21 | .macro DBGSTR, str | 22 | .macro DBGSTR, str |
@@ -24,7 +25,7 @@ | |||
24 | add r0, pc, #4 | 25 | add r0, pc, #4 |
25 | bl printk | 26 | bl printk |
26 | b 1f | 27 | b 1f |
27 | .asciz "<7>VFP: \str\n" | 28 | .asciz KERN_DEBUG "VFP: \str\n" |
28 | .balign 4 | 29 | .balign 4 |
29 | 1: ldmfd sp!, {r0-r3, ip, lr} | 30 | 1: ldmfd sp!, {r0-r3, ip, lr} |
30 | #endif | 31 | #endif |
@@ -37,7 +38,7 @@ | |||
37 | add r0, pc, #4 | 38 | add r0, pc, #4 |
38 | bl printk | 39 | bl printk |
39 | b 1f | 40 | b 1f |
40 | .asciz "<7>VFP: \str\n" | 41 | .asciz KERN_DEBUG "VFP: \str\n" |
41 | .balign 4 | 42 | .balign 4 |
42 | 1: ldmfd sp!, {r0-r3, ip, lr} | 43 | 1: ldmfd sp!, {r0-r3, ip, lr} |
43 | #endif | 44 | #endif |
@@ -52,7 +53,7 @@ | |||
52 | add r0, pc, #4 | 53 | add r0, pc, #4 |
53 | bl printk | 54 | bl printk |
54 | b 1f | 55 | b 1f |
55 | .asciz "<7>VFP: \str\n" | 56 | .asciz KERN_DEBUG "VFP: \str\n" |
56 | .balign 4 | 57 | .balign 4 |
57 | 1: ldmfd sp!, {r0-r3, ip, lr} | 58 | 1: ldmfd sp!, {r0-r3, ip, lr} |
58 | #endif | 59 | #endif |
@@ -61,13 +62,13 @@ | |||
61 | 62 | ||
62 | @ VFP hardware support entry point. | 63 | @ VFP hardware support entry point. |
63 | @ | 64 | @ |
64 | @ r0 = faulted instruction | 65 | @ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb) |
65 | @ r2 = faulted PC+4 | 66 | @ r2 = PC value to resume execution after successful emulation |
66 | @ r9 = successful return | 67 | @ r9 = normal "successful" return address |
67 | @ r10 = vfp_state union | 68 | @ r10 = vfp_state union |
68 | @ r11 = CPU number | 69 | @ r11 = CPU number |
69 | @ lr = failure return | 70 | @ lr = unrecognised instruction return address |
70 | 71 | @ IRQs enabled. | |
71 | ENTRY(vfp_support_entry) | 72 | ENTRY(vfp_support_entry) |
72 | DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 | 73 | DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 |
73 | 74 | ||
@@ -161,9 +162,12 @@ vfp_hw_state_valid: | |||
161 | @ exception before retrying branch | 162 | @ exception before retrying branch |
162 | @ out before setting an FPEXC that | 163 | @ out before setting an FPEXC that |
163 | @ stops us reading stuff | 164 | @ stops us reading stuff |
164 | VFPFMXR FPEXC, r1 @ restore FPEXC last | 165 | VFPFMXR FPEXC, r1 @ Restore FPEXC last |
165 | sub r2, r2, #4 | 166 | sub r2, r2, #4 @ Retry current instruction - if Thumb |
166 | str r2, [sp, #S_PC] @ retry the instruction | 167 | str r2, [sp, #S_PC] @ mode it's two 16-bit instructions, |
168 | @ else it's one 32-bit instruction, so | ||
169 | @ always subtract 4 from the following | ||
170 | @ instruction address. | ||
167 | #ifdef CONFIG_PREEMPT | 171 | #ifdef CONFIG_PREEMPT |
168 | get_thread_info r10 | 172 | get_thread_info r10 |
169 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count | 173 | ldr r4, [r10, #TI_PREEMPT] @ get preempt count |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 586961929e96..fb849d044bde 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -457,10 +457,16 @@ static int vfp_pm_suspend(void) | |||
457 | 457 | ||
458 | /* disable, just in case */ | 458 | /* disable, just in case */ |
459 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); | 459 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
460 | } else if (vfp_current_hw_state[ti->cpu]) { | ||
461 | #ifndef CONFIG_SMP | ||
462 | fmxr(FPEXC, fpexc | FPEXC_EN); | ||
463 | vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); | ||
464 | fmxr(FPEXC, fpexc); | ||
465 | #endif | ||
460 | } | 466 | } |
461 | 467 | ||
462 | /* clear any information we had about last context state */ | 468 | /* clear any information we had about last context state */ |
463 | memset(vfp_current_hw_state, 0, sizeof(vfp_current_hw_state)); | 469 | vfp_current_hw_state[ti->cpu] = NULL; |
464 | 470 | ||
465 | return 0; | 471 | return 0; |
466 | } | 472 | } |