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-rw-r--r--arch/arm/Kconfig23
-rw-r--r--arch/arm/Kconfig.debug8
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi6
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78230.dtsi9
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78460.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi14
-rw-r--r--arch/arm/boot/dts/dbx5x0.dtsi4
-rw-r--r--arch/arm/boot/dts/dove.dtsi1
-rw-r--r--arch/arm/boot/dts/ecx-2000.dts4
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts2
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5440-ssdk5440.dts2
-rw-r--r--arch/arm/boot/dts/highbank.dts20
-rw-r--r--arch/arm/boot/dts/imx23-olinuxino.dts8
-rw-r--r--arch/arm/boot/dts/imx31-bug.dts2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-6282.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-topkick.dts17
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi1
-rw-r--r--arch/arm/boot/dts/twl4030.dtsi4
-rw-r--r--arch/arm/boot/dts/wm8850-w70v2.dts47
-rw-r--r--arch/arm/boot/dts/wm8850.dtsi224
-rw-r--r--arch/arm/common/Kconfig23
-rw-r--r--arch/arm/common/Makefile2
-rw-r--r--arch/arm/common/gic.c811
-rw-r--r--arch/arm/common/sa1111.c5
-rw-r--r--arch/arm/common/scoop.c6
-rw-r--r--arch/arm/common/vic.c459
-rw-r--r--arch/arm/configs/multi_v7_defconfig1
-rw-r--r--arch/arm/configs/mvebu_defconfig4
-rw-r--r--arch/arm/configs/omap2plus_defconfig5
-rw-r--r--arch/arm/include/asm/hardware/gic.h57
-rw-r--r--arch/arm/include/asm/hardware/vic.h57
-rw-r--r--arch/arm/include/asm/mach/irq.h1
-rw-r--r--arch/arm/include/debug/vt8500.S (renamed from arch/arm/mach-vt8500/include/mach/debug-macro.S)24
-rw-r--r--arch/arm/kernel/bios32.c18
-rw-r--r--arch/arm/kernel/etm.c4
-rw-r--r--arch/arm/kernel/irq.c10
-rw-r--r--arch/arm/kernel/perf_event_cpu.c10
-rw-r--r--arch/arm/kernel/perf_event_v6.c4
-rw-r--r--arch/arm/kernel/perf_event_v7.c12
-rw-r--r--arch/arm/kernel/perf_event_xscale.c4
-rw-r--r--arch/arm/kernel/smp.c3
-rw-r--r--arch/arm/kernel/smp_twd.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c7
-rw-r--r--arch/arm/mach-bcm/board_bcm.c16
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c2
-rw-r--r--arch/arm/mach-cns3xxx/core.c15
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c2
-rw-r--r--arch/arm/mach-davinci/cdce949.c4
-rw-r--r--arch/arm/mach-dove/pcie.c2
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c2
-rw-r--r--arch/arm/mach-ep93xx/core.c3
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c9
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c2
-rw-r--r--arch/arm/mach-ep93xx/micro9.c5
-rw-r--r--arch/arm/mach-ep93xx/simone.c2
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c2
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c2
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c2
-rw-r--r--arch/arm/mach-exynos/Kconfig2
-rw-r--r--arch/arm/mach-exynos/common.c17
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-irq.h2
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c2
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c2
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c2
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c2
-rw-r--r--arch/arm/mach-exynos/mach-origen.c2
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c3
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c3
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c2
-rw-r--r--arch/arm/mach-exynos/mct.c19
-rw-r--r--arch/arm/mach-exynos/platsmp.c6
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c6
-rw-r--r--arch/arm/mach-highbank/highbank.c13
-rw-r--r--arch/arm/mach-highbank/hotplug.c2
-rw-r--r--arch/arm/mach-highbank/platsmp.c18
-rw-r--r--arch/arm/mach-highbank/pm.c19
-rw-r--r--arch/arm/mach-highbank/sysregs.h23
-rw-r--r--arch/arm/mach-highbank/system.c4
-rw-r--r--arch/arm/mach-imx/Kconfig2
-rw-r--r--arch/arm/mach-imx/common.h1
-rw-r--r--arch/arm/mach-imx/cpufreq.c2
-rw-r--r--arch/arm/mach-imx/epit.c15
-rw-r--r--arch/arm/mach-imx/gpc.c2
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c10
-rw-r--r--arch/arm/mach-imx/mmdc.c2
-rw-r--r--arch/arm/mach-imx/platsmp.c4
-rw-r--r--arch/arm/mach-imx/time.c15
-rw-r--r--arch/arm/mach-iop13xx/pci.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c11
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c4
-rw-r--r--arch/arm/mach-kirkwood/board-usi_topkick.c4
-rw-r--r--arch/arm/mach-kirkwood/pcie.c2
-rw-r--r--arch/arm/mach-ks8695/board-acs5k.c2
-rw-r--r--arch/arm/mach-lpc32xx/timer.c9
-rw-r--r--arch/arm/mach-mmp/sram.c4
-rw-r--r--arch/arm/mach-mmp/time.c7
-rw-r--r--arch/arm/mach-msm/board-dt-8660.c16
-rw-r--r--arch/arm/mach-msm/board-dt-8960.c16
-rw-r--r--arch/arm/mach-msm/platsmp.c6
-rw-r--r--arch/arm/mach-msm/proc_comm.c2
-rw-r--r--arch/arm/mach-msm/smd.c2
-rw-r--r--arch/arm/mach-msm/timer.c7
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c2
-rw-r--r--arch/arm/mach-mxs/timer.c24
-rw-r--r--arch/arm/mach-netx/generic.c2
-rw-r--r--arch/arm/mach-netx/nxdb500.c2
-rw-r--r--arch/arm/mach-netx/nxdkn.c2
-rw-r--r--arch/arm/mach-netx/nxeb500hmi.c2
-rw-r--r--arch/arm/mach-netx/time.c10
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c3
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c2
-rw-r--r--arch/arm/mach-nomadik/include/mach/irqs.h78
-rw-r--r--arch/arm/mach-omap1/Makefile2
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/fb.c80
-rw-r--r--arch/arm/mach-omap1/mailbox.c6
-rw-r--r--arch/arm/mach-omap1/time.c11
-rw-r--r--arch/arm/mach-omap1/timer32k.c12
-rw-r--r--arch/arm/mach-omap1/usb.c8
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c3
-rw-r--r--arch/arm/mach-omap2/board-generic.c3
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c3
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/control.h2
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c3
-rw-r--r--arch/arm/mach-omap2/drm.c1
-rw-r--r--arch/arm/mach-omap2/dss-common.c3
-rw-r--r--arch/arm/mach-omap2/fb.c (renamed from arch/arm/plat-omap/fb.c)50
-rw-r--r--arch/arm/mach-omap2/gpmc.c12
-rw-r--r--arch/arm/mach-omap2/mailbox.c6
-rw-r--r--arch/arm/mach-omap2/omap-smp.c6
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c3
-rw-r--r--arch/arm/mach-omap2/omap4-common.c11
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_twl.c8
-rw-r--r--arch/arm/mach-omap2/pmu.c2
-rw-r--r--arch/arm/mach-omap2/prm2xxx.c91
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c22
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c31
-rw-r--r--arch/arm/mach-omap2/prm44xx.c6
-rw-r--r--arch/arm/mach-omap2/prm44xx.h4
-rw-r--r--arch/arm/mach-omap2/timer.c13
-rw-r--r--arch/arm/mach-orion5x/pci.c2
-rw-r--r--arch/arm/mach-picoxcell/common.c15
-rw-r--r--arch/arm/mach-prima2/pm.c2
-rw-r--r--arch/arm/mach-prima2/rtciobrg.c2
-rw-r--r--arch/arm/mach-prima2/timer-prima2.c10
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c4
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c2
-rw-r--r--arch/arm/mach-pxa/time.c8
-rw-r--r--arch/arm/mach-pxa/tosa-bt.c4
-rw-r--r--arch/arm/mach-realview/core.c1
-rw-r--r--arch/arm/mach-realview/platsmp.c3
-rw-r--r--arch/arm/mach-realview/realview_eb.c3
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c3
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c3
-rw-r--r--arch/arm/mach-realview/realview_pba8.c3
-rw-r--r--arch/arm/mach-realview/realview_pbx.c3
-rw-r--r--arch/arm/mach-s3c24xx/h1940-bluetooth.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-osiris-dvs.c6
-rw-r--r--arch/arm/mach-s3c64xx/common.c2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-irq.h1
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/tick.h2
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410-module.c6
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c70
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq5.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq7.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c2
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/regs-irq.h1
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/tick.h29
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/regs-irq.h1
-rw-r--r--arch/arm/mach-s5pc100/include/mach/tick.h2
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-irq.h1
-rw-r--r--arch/arm/mach-s5pv210/include/mach/tick.h26
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-torbreck.c2
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c2
-rw-r--r--arch/arm/mach-sa1100/neponset.c8
-rw-r--r--arch/arm/mach-sa1100/time.c8
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c3
-rw-r--r--arch/arm/mach-shmobile/board-kota2.c3
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d.c2
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c3
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c2
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c2
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c2
-rw-r--r--arch/arm/mach-shmobile/platsmp.c3
-rw-r--r--arch/arm/mach-shmobile/setup-emev2.c17
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c4
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c2
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c2
-rw-r--r--arch/arm/mach-socfpga/platsmp.c4
-rw-r--r--arch/arm/mach-socfpga/socfpga.c14
-rw-r--r--arch/arm/mach-spear13xx/include/mach/generic.h1
-rw-r--r--arch/arm/mach-spear13xx/platsmp.c4
-rw-r--r--arch/arm/mach-spear13xx/spear1310.c5
-rw-r--r--arch/arm/mach-spear13xx/spear1340.c5
-rw-r--r--arch/arm/mach-spear13xx/spear13xx.c13
-rw-r--r--arch/arm/mach-spear3xx/include/mach/generic.h1
-rw-r--r--arch/arm/mach-spear3xx/spear300.c5
-rw-r--r--arch/arm/mach-spear3xx/spear310.c5
-rw-r--r--arch/arm/mach-spear3xx/spear320.c5
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c16
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c16
-rw-r--r--arch/arm/mach-sunxi/sunxi.c6
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c3
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra30.c2
-rw-r--r--arch/arm/mach-tegra/common.c10
-rw-r--r--arch/arm/mach-tegra/irq.c3
-rw-r--r--arch/arm/mach-tegra/pcie.c6
-rw-r--r--arch/arm/mach-tegra/platsmp.c4
-rw-r--r--arch/arm/mach-tegra/tegra2_emc.c6
-rw-r--r--arch/arm/mach-tegra/timer.c8
-rw-r--r--arch/arm/mach-u300/core.c3
-rw-r--r--arch/arm/mach-u300/dummyspichip.c6
-rw-r--r--arch/arm/mach-ux500/board-mop500.c5
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c5
-rw-r--r--arch/arm/mach-ux500/cpu.c10
-rw-r--r--arch/arm/mach-ux500/platsmp.c6
-rw-r--r--arch/arm/mach-versatile/core.c2
-rw-r--r--arch/arm/mach-versatile/include/mach/irqs.h6
-rw-r--r--arch/arm/mach-versatile/versatile_ab.c2
-rw-r--r--arch/arm/mach-versatile/versatile_dt.c2
-rw-r--r--arch/arm/mach-versatile/versatile_pb.c2
-rw-r--r--arch/arm/mach-vexpress/Kconfig1
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c4
-rw-r--r--arch/arm/mach-vexpress/platsmp.c3
-rw-r--r--arch/arm/mach-vexpress/v2m.c16
-rw-r--r--arch/arm/mach-vt8500/Kconfig28
-rw-r--r--arch/arm/mach-vt8500/Makefile2
-rw-r--r--arch/arm/mach-vt8500/common.h1
-rw-r--r--arch/arm/mach-vt8500/include/mach/timex.h26
-rw-r--r--arch/arm/mach-vt8500/include/mach/uncompress.h37
-rw-r--r--arch/arm/mach-vt8500/timer.c184
-rw-r--r--arch/arm/mach-vt8500/vt8500.c3
-rw-r--r--arch/arm/mach-w90x900/time.c10
-rw-r--r--arch/arm/mach-zynq/common.c17
-rw-r--r--arch/arm/mm/cache-l2x0.c34
-rw-r--r--arch/arm/mm/proc-v7.S4
-rw-r--r--arch/arm/plat-iop/time.c9
-rw-r--r--arch/arm/plat-omap/Makefile2
-rw-r--r--arch/arm/plat-omap/counter_32k.c2
-rw-r--r--arch/arm/plat-omap/dma.c6
-rw-r--r--arch/arm/plat-omap/dmtimer.c19
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h4
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-orion/time.c6
-rw-r--r--arch/arm/plat-pxa/ssp.c6
-rw-r--r--arch/arm/plat-samsung/adc.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h2
-rw-r--r--arch/arm/plat-samsung/s5p-irq-eint.c3
-rw-r--r--arch/arm/plat-samsung/s5p-irq.c3
-rw-r--r--arch/arm/plat-samsung/s5p-time.c9
-rw-r--r--arch/arm/plat-spear/time.c8
-rw-r--r--arch/arm/plat-versatile/platsmp.c4
274 files changed, 1069 insertions, 2753 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 13f89a262fa8..a3ffd1a391a7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX
371config ARCH_CLPS711X 371config ARCH_CLPS711X
372 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 372 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
373 select ARCH_REQUIRE_GPIOLIB 373 select ARCH_REQUIRE_GPIOLIB
374 select ARCH_USES_GETTIMEOFFSET
375 select AUTO_ZRELADDR 374 select AUTO_ZRELADDR
376 select CLKDEV_LOOKUP 375 select CLKDEV_LOOKUP
377 select COMMON_CLK 376 select COMMON_CLK
@@ -951,22 +950,6 @@ config ARCH_OMAP
951 help 950 help
952 Support for TI's OMAP platform (OMAP1/2/3/4). 951 Support for TI's OMAP platform (OMAP1/2/3/4).
953 952
954config ARCH_VT8500_SINGLE
955 bool "VIA/WonderMedia 85xx"
956 select ARCH_HAS_CPUFREQ
957 select ARCH_REQUIRE_GPIOLIB
958 select CLKDEV_LOOKUP
959 select COMMON_CLK
960 select CPU_ARM926T
961 select GENERIC_CLOCKEVENTS
962 select GENERIC_GPIO
963 select HAVE_CLK
964 select MULTI_IRQ_HANDLER
965 select SPARSE_IRQ
966 select USE_OF
967 help
968 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
969
970endchoice 953endchoice
971 954
972menu "Multiple platform selection" 955menu "Multiple platform selection"
@@ -1231,6 +1214,7 @@ config ARM_ERRATA_430973
1231config ARM_ERRATA_458693 1214config ARM_ERRATA_458693
1232 bool "ARM errata: Processor deadlock when a false hazard is created" 1215 bool "ARM errata: Processor deadlock when a false hazard is created"
1233 depends on CPU_V7 1216 depends on CPU_V7
1217 depends on !ARCH_MULTIPLATFORM
1234 help 1218 help
1235 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1219 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1236 erratum. For very specific sequences of memory operations, it is 1220 erratum. For very specific sequences of memory operations, it is
@@ -1244,6 +1228,7 @@ config ARM_ERRATA_458693
1244config ARM_ERRATA_460075 1228config ARM_ERRATA_460075
1245 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1229 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1246 depends on CPU_V7 1230 depends on CPU_V7
1231 depends on !ARCH_MULTIPLATFORM
1247 help 1232 help
1248 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1233 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1249 erratum. Any asynchronous access to the L2 cache may encounter a 1234 erratum. Any asynchronous access to the L2 cache may encounter a
@@ -1256,6 +1241,7 @@ config ARM_ERRATA_460075
1256config ARM_ERRATA_742230 1241config ARM_ERRATA_742230
1257 bool "ARM errata: DMB operation may be faulty" 1242 bool "ARM errata: DMB operation may be faulty"
1258 depends on CPU_V7 && SMP 1243 depends on CPU_V7 && SMP
1244 depends on !ARCH_MULTIPLATFORM
1259 help 1245 help
1260 This option enables the workaround for the 742230 Cortex-A9 1246 This option enables the workaround for the 742230 Cortex-A9
1261 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1247 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
@@ -1268,6 +1254,7 @@ config ARM_ERRATA_742230
1268config ARM_ERRATA_742231 1254config ARM_ERRATA_742231
1269 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1255 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1270 depends on CPU_V7 && SMP 1256 depends on CPU_V7 && SMP
1257 depends on !ARCH_MULTIPLATFORM
1271 help 1258 help
1272 This option enables the workaround for the 742231 Cortex-A9 1259 This option enables the workaround for the 742231 Cortex-A9
1273 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1260 (r2p0..r2p2) erratum. Under certain conditions, specific to the
@@ -1318,6 +1305,7 @@ config PL310_ERRATA_727915
1318config ARM_ERRATA_743622 1305config ARM_ERRATA_743622
1319 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1306 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1320 depends on CPU_V7 1307 depends on CPU_V7
1308 depends on !ARCH_MULTIPLATFORM
1321 help 1309 help
1322 This option enables the workaround for the 743622 Cortex-A9 1310 This option enables the workaround for the 743622 Cortex-A9
1323 (r2p*) erratum. Under very rare conditions, a faulty 1311 (r2p*) erratum. Under very rare conditions, a faulty
@@ -1331,6 +1319,7 @@ config ARM_ERRATA_743622
1331config ARM_ERRATA_751472 1319config ARM_ERRATA_751472
1332 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1320 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1333 depends on CPU_V7 1321 depends on CPU_V7
1322 depends on !ARCH_MULTIPLATFORM
1334 help 1323 help
1335 This option enables the workaround for the 751472 Cortex-A9 (prior 1324 This option enables the workaround for the 751472 Cortex-A9 (prior
1336 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1325 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 00ad1f895da2..af3987cb9e4d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -426,6 +426,13 @@ choice
426 of the tiles using the RS1 memory map, including all new A-class 426 of the tiles using the RS1 memory map, including all new A-class
427 core tiles, FPGA-based SMMs and software models. 427 core tiles, FPGA-based SMMs and software models.
428 428
429 config DEBUG_VT8500_UART0
430 bool "Use UART0 on VIA/Wondermedia SoCs"
431 depends on ARCH_VT8500
432 help
433 This option selects UART0 on VIA/Wondermedia System-on-a-chip
434 devices, including VT8500, WM8505, WM8650 and WM8850.
435
429 config DEBUG_LL_UART_NONE 436 config DEBUG_LL_UART_NONE
430 bool "No low-level debugging UART" 437 bool "No low-level debugging UART"
431 depends on !ARCH_MULTIPLATFORM 438 depends on !ARCH_MULTIPLATFORM
@@ -520,6 +527,7 @@ config DEBUG_LL_INCLUDE
520 default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1 527 default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
521 default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \ 528 default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
522 DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 529 DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
530 default "debug/vt8500.S" if DEBUG_VT8500_UART0
523 default "debug/tegra.S" if DEBUG_TEGRA_UART 531 default "debug/tegra.S" if DEBUG_TEGRA_UART
524 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 532 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
525 default "mach/debug-macro.S" 533 default "mach/debug-macro.S"
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6af9901d3d2f..b34479014f9e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -152,7 +152,8 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
152 xenvm-4.2.dtb 152 xenvm-4.2.dtb
153dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ 153dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
154 wm8505-ref.dtb \ 154 wm8505-ref.dtb \
155 wm8650-mid.dtb 155 wm8650-mid.dtb \
156 wm8850-w70v2.dtb
156dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb 157dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
157 158
158targets += dtbs 159targets += dtbs
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index cf6c48a09eac..4c0abe85405f 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -50,17 +50,19 @@
50 ranges; 50 ranges;
51 51
52 serial@d0012000 { 52 serial@d0012000 {
53 compatible = "ns16550"; 53 compatible = "snps,dw-apb-uart";
54 reg = <0xd0012000 0x100>; 54 reg = <0xd0012000 0x100>;
55 reg-shift = <2>; 55 reg-shift = <2>;
56 interrupts = <41>; 56 interrupts = <41>;
57 reg-io-width = <4>;
57 status = "disabled"; 58 status = "disabled";
58 }; 59 };
59 serial@d0012100 { 60 serial@d0012100 {
60 compatible = "ns16550"; 61 compatible = "snps,dw-apb-uart";
61 reg = <0xd0012100 0x100>; 62 reg = <0xd0012100 0x100>;
62 reg-shift = <2>; 63 reg-shift = <2>;
63 interrupts = <42>; 64 interrupts = <42>;
65 reg-io-width = <4>;
64 status = "disabled"; 66 status = "disabled";
65 }; 67 };
66 68
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index c45c7b4dc352..271855a6e224 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -34,7 +34,14 @@
34 reg = <0>; 34 reg = <0>;
35 clocks = <&cpuclk 0>; 35 clocks = <&cpuclk 0>;
36 }; 36 };
37 } 37
38 cpu@1 {
39 device_type = "cpu";
40 compatible = "marvell,sheeva-v7";
41 reg = <1>;
42 clocks = <&cpuclk 1>;
43 };
44 };
38 45
39 soc { 46 soc {
40 pinctrl { 47 pinctrl {
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index a2aee5707377..1c1937dbce73 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -85,5 +85,13 @@
85 #interrupts-cells = <2>; 85 #interrupts-cells = <2>;
86 interrupts = <24>; 86 interrupts = <24>;
87 }; 87 };
88
89 ethernet@d0034000 {
90 compatible = "marvell,armada-370-neta";
91 reg = <0xd0034000 0x2500>;
92 interrupts = <14>;
93 clocks = <&gateclk 1>;
94 status = "disabled";
95 };
88 }; 96 };
89}; 97};
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index da03a129243a..4905cf3a5ef8 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -100,5 +100,13 @@
100 #interrupts-cells = <2>; 100 #interrupts-cells = <2>;
101 interrupts = <24>; 101 interrupts = <24>;
102 }; 102 };
103
104 ethernet@d0034000 {
105 compatible = "marvell,armada-370-neta";
106 reg = <0xd0034000 0x2500>;
107 interrupts = <14>;
108 clocks = <&gateclk 1>;
109 status = "disabled";
110 };
103 }; 111 };
104 }; 112 };
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 367aa3f94912..2e37ef101c90 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -42,17 +42,19 @@
42 42
43 soc { 43 soc {
44 serial@d0012200 { 44 serial@d0012200 {
45 compatible = "ns16550"; 45 compatible = "snps,dw-apb-uart";
46 reg = <0xd0012200 0x100>; 46 reg = <0xd0012200 0x100>;
47 reg-shift = <2>; 47 reg-shift = <2>;
48 interrupts = <43>; 48 interrupts = <43>;
49 reg-io-width = <4>;
49 status = "disabled"; 50 status = "disabled";
50 }; 51 };
51 serial@d0012300 { 52 serial@d0012300 {
52 compatible = "ns16550"; 53 compatible = "snps,dw-apb-uart";
53 reg = <0xd0012300 0x100>; 54 reg = <0xd0012300 0x100>;
54 reg-shift = <2>; 55 reg-shift = <2>;
55 interrupts = <44>; 56 interrupts = <44>;
57 reg-io-width = <4>;
56 status = "disabled"; 58 status = "disabled";
57 }; 59 };
58 60
@@ -93,14 +95,6 @@
93 status = "disabled"; 95 status = "disabled";
94 }; 96 };
95 97
96 ethernet@d0034000 {
97 compatible = "marvell,armada-370-neta";
98 reg = <0xd0034000 0x2500>;
99 interrupts = <14>;
100 clocks = <&gateclk 1>;
101 status = "disabled";
102 };
103
104 xor@d0060900 { 98 xor@d0060900 {
105 compatible = "marvell,orion-xor"; 99 compatible = "marvell,orion-xor";
106 reg = <0xd0060900 0x100 100 reg = <0xd0060900 0x100
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 2efd9c891bc9..63f2fbcfe819 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -170,7 +170,9 @@
170 gpio-bank = <8>; 170 gpio-bank = <8>;
171 }; 171 };
172 172
173 pinctrl { 173 pinctrl@80157000 {
174 // This is actually the PRCMU base address
175 reg = <0x80157000 0x2000>;
174 compatible = "stericsson,nmk_pinctrl"; 176 compatible = "stericsson,nmk_pinctrl";
175 }; 177 };
176 178
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index f3f7e9d8adca..42eac1ff3cc8 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -117,6 +117,7 @@
117 pinctrl: pinctrl@d0200 { 117 pinctrl: pinctrl@d0200 {
118 compatible = "marvell,dove-pinctrl"; 118 compatible = "marvell,dove-pinctrl";
119 reg = <0xd0200 0x10>; 119 reg = <0xd0200 0x10>;
120 clocks = <&gate_clk 22>;
120 }; 121 };
121 122
122 spi0: spi@10600 { 123 spi0: spi@10600 {
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 46477ac1de99..139b40cc3a23 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -32,6 +32,7 @@
32 32
33 cpu@0 { 33 cpu@0 {
34 compatible = "arm,cortex-a15"; 34 compatible = "arm,cortex-a15";
35 device_type = "cpu";
35 reg = <0>; 36 reg = <0>;
36 clocks = <&a9pll>; 37 clocks = <&a9pll>;
37 clock-names = "cpu"; 38 clock-names = "cpu";
@@ -39,6 +40,7 @@
39 40
40 cpu@1 { 41 cpu@1 {
41 compatible = "arm,cortex-a15"; 42 compatible = "arm,cortex-a15";
43 device_type = "cpu";
42 reg = <1>; 44 reg = <1>;
43 clocks = <&a9pll>; 45 clocks = <&a9pll>;
44 clock-names = "cpu"; 46 clock-names = "cpu";
@@ -46,6 +48,7 @@
46 48
47 cpu@2 { 49 cpu@2 {
48 compatible = "arm,cortex-a15"; 50 compatible = "arm,cortex-a15";
51 device_type = "cpu";
49 reg = <2>; 52 reg = <2>;
50 clocks = <&a9pll>; 53 clocks = <&a9pll>;
51 clock-names = "cpu"; 54 clock-names = "cpu";
@@ -53,6 +56,7 @@
53 56
54 cpu@3 { 57 cpu@3 {
55 compatible = "arm,cortex-a15"; 58 compatible = "arm,cortex-a15";
59 device_type = "cpu";
56 reg = <3>; 60 reg = <3>;
57 clocks = <&a9pll>; 61 clocks = <&a9pll>;
58 clock-names = "cpu"; 62 clock-names = "cpu";
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 9b23a8255e39..f63490707f3a 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -26,7 +26,7 @@
26 }; 26 };
27 27
28 chosen { 28 chosen {
29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; 29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
30 }; 30 };
31 31
32 sdhci@12530000 { 32 sdhci@12530000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 2e3b6efaf1a2..3acf594ea60b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -574,7 +574,7 @@
574 574
575 hdmi { 575 hdmi {
576 compatible = "samsung,exynos5-hdmi"; 576 compatible = "samsung,exynos5-hdmi";
577 reg = <0x14530000 0x100000>; 577 reg = <0x14530000 0x70000>;
578 interrupts = <0 95 0>; 578 interrupts = <0 95 0>;
579 }; 579 };
580 580
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index 921c83cf694f..81e2c964a900 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -21,7 +21,7 @@
21 }; 21 };
22 22
23 chosen { 23 chosen {
24 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc"; 24 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc";
25 }; 25 };
26 26
27 spi { 27 spi {
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index a9ae5d32e80d..5927a8df5625 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -30,33 +30,37 @@
30 #address-cells = <1>; 30 #address-cells = <1>;
31 #size-cells = <0>; 31 #size-cells = <0>;
32 32
33 cpu@0 { 33 cpu@900 {
34 compatible = "arm,cortex-a9"; 34 compatible = "arm,cortex-a9";
35 reg = <0>; 35 device_type = "cpu";
36 reg = <0x900>;
36 next-level-cache = <&L2>; 37 next-level-cache = <&L2>;
37 clocks = <&a9pll>; 38 clocks = <&a9pll>;
38 clock-names = "cpu"; 39 clock-names = "cpu";
39 }; 40 };
40 41
41 cpu@1 { 42 cpu@901 {
42 compatible = "arm,cortex-a9"; 43 compatible = "arm,cortex-a9";
43 reg = <1>; 44 device_type = "cpu";
45 reg = <0x901>;
44 next-level-cache = <&L2>; 46 next-level-cache = <&L2>;
45 clocks = <&a9pll>; 47 clocks = <&a9pll>;
46 clock-names = "cpu"; 48 clock-names = "cpu";
47 }; 49 };
48 50
49 cpu@2 { 51 cpu@902 {
50 compatible = "arm,cortex-a9"; 52 compatible = "arm,cortex-a9";
51 reg = <2>; 53 device_type = "cpu";
54 reg = <0x902>;
52 next-level-cache = <&L2>; 55 next-level-cache = <&L2>;
53 clocks = <&a9pll>; 56 clocks = <&a9pll>;
54 clock-names = "cpu"; 57 clock-names = "cpu";
55 }; 58 };
56 59
57 cpu@3 { 60 cpu@903 {
58 compatible = "arm,cortex-a9"; 61 compatible = "arm,cortex-a9";
59 reg = <3>; 62 device_type = "cpu";
63 reg = <0x903>;
60 next-level-cache = <&L2>; 64 next-level-cache = <&L2>;
61 clocks = <&a9pll>; 65 clocks = <&a9pll>;
62 clock-names = "cpu"; 66 clock-names = "cpu";
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index 7c43b8e70b9f..e7484e4ea659 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -39,17 +39,17 @@
39 hog_pins_a: hog@0 { 39 hog_pins_a: hog@0 {
40 reg = <0>; 40 reg = <0>;
41 fsl,pinmux-ids = < 41 fsl,pinmux-ids = <
42 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ 42 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
43 >; 43 >;
44 fsl,drive-strength = <0>; 44 fsl,drive-strength = <0>;
45 fsl,voltage = <1>; 45 fsl,voltage = <1>;
46 fsl,pull-up = <0>; 46 fsl,pull-up = <0>;
47 }; 47 };
48 48
49 led_pin_gpio0_17: led_gpio0_17@0 { 49 led_pin_gpio2_1: led_gpio2_1@0 {
50 reg = <0>; 50 reg = <0>;
51 fsl,pinmux-ids = < 51 fsl,pinmux-ids = <
52 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ 52 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
53 >; 53 >;
54 fsl,drive-strength = <0>; 54 fsl,drive-strength = <0>;
55 fsl,voltage = <1>; 55 fsl,voltage = <1>;
@@ -110,7 +110,7 @@
110 leds { 110 leds {
111 compatible = "gpio-leds"; 111 compatible = "gpio-leds";
112 pinctrl-names = "default"; 112 pinctrl-names = "default";
113 pinctrl-0 = <&led_pin_gpio0_17>; 113 pinctrl-0 = <&led_pin_gpio2_1>;
114 114
115 user { 115 user {
116 label = "green"; 116 label = "green";
diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts
index 24731cb78e8e..7f67402328d3 100644
--- a/arch/arm/boot/dts/imx31-bug.dts
+++ b/arch/arm/boot/dts/imx31-bug.dts
@@ -14,7 +14,7 @@
14 14
15/ { 15/ {
16 model = "Buglabs i.MX31 Bug 1.x"; 16 model = "Buglabs i.MX31 Bug 1.x";
17 compatible = "fsl,imx31-bug", "fsl,imx31"; 17 compatible = "buglabs,imx31-bug", "fsl,imx31";
18 18
19 memory { 19 memory {
20 reg = <0x80000000 0x8000000>; /* 128M */ 20 reg = <0x80000000 0x8000000>; /* 128M */
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 552aed4ff982..edc3f1eb6699 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -492,7 +492,7 @@
492 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 492 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
493 reg = <0x53fcc000 0x4000>; 493 reg = <0x53fcc000 0x4000>;
494 interrupts = <83>; 494 interrupts = <83>;
495 clocks = <&clks 158>, <&clks 157>; 495 clocks = <&clks 87>, <&clks 86>;
496 clock-names = "ipg", "per"; 496 clock-names = "ipg", "per";
497 status = "disabled"; 497 status = "disabled";
498 }; 498 };
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index 9ae2004d5675..4ccea2130a6c 100644
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -39,6 +39,7 @@
39 #size-cells = <0>; 39 #size-cells = <0>;
40 interrupts = <32>; 40 interrupts = <32>;
41 clock-frequency = <100000>; 41 clock-frequency = <100000>;
42 clocks = <&gate_clk 7>;
42 status = "disabled"; 43 status = "disabled";
43 }; 44 };
44 }; 45 };
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
index c0de5a7f660d..cd15452a52a6 100644
--- a/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -82,4 +82,21 @@
82 gpios = <&gpio1 16 1>; 82 gpios = <&gpio1 16 1>;
83 }; 83 };
84 }; 84 };
85 regulators {
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <0>;
89
90 sata0_power: regulator@1 {
91 compatible = "regulator-fixed";
92 reg = <1>;
93 regulator-name = "SATA0 Power";
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
96 enable-active-high;
97 regulator-always-on;
98 regulator-boot-on;
99 gpio = <&gpio1 4 0>;
100 };
101 };
85}; 102};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 7735cee4a9c6..110d6cbb795b 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -144,6 +144,7 @@
144 compatible = "marvell,orion-ehci"; 144 compatible = "marvell,orion-ehci";
145 reg = <0x50000 0x1000>; 145 reg = <0x50000 0x1000>;
146 interrupts = <19>; 146 interrupts = <19>;
147 clocks = <&gate_clk 3>;
147 status = "okay"; 148 status = "okay";
148 }; 149 };
149 150
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index 63411b036932..ed0bc9546837 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -19,6 +19,10 @@
19 interrupts = <11>; 19 interrupts = <11>;
20 }; 20 };
21 21
22 watchdog {
23 compatible = "ti,twl4030-wdt";
24 };
25
22 vdac: regulator-vdac { 26 vdac: regulator-vdac {
23 compatible = "ti,twl4030-vdac"; 27 compatible = "ti,twl4030-vdac";
24 regulator-min-microvolt = <1800000>; 28 regulator-min-microvolt = <1800000>;
diff --git a/arch/arm/boot/dts/wm8850-w70v2.dts b/arch/arm/boot/dts/wm8850-w70v2.dts
new file mode 100644
index 000000000000..fcc660c89540
--- /dev/null
+++ b/arch/arm/boot/dts/wm8850-w70v2.dts
@@ -0,0 +1,47 @@
1/*
2 * wm8850-w70v2.dts
3 * - Device tree file for Wondermedia WM8850 Tablet
4 * - 'W70-V2' mainboard
5 * - HongLianYing 'HLY070ML268-21A' 7" LCD panel
6 *
7 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
8 *
9 * Licensed under GPLv2 or later
10 */
11
12/dts-v1/;
13/include/ "wm8850.dtsi"
14
15/ {
16 model = "Wondermedia WM8850-W70v2 Tablet";
17
18 /*
19 * Display node is based on Sascha Hauer's patch on dri-devel.
20 * Added a bpp property to calculate the size of the framebuffer
21 * until the binding is formalized.
22 */
23 display: display@0 {
24 modes {
25 mode0: mode@0 {
26 hactive = <800>;
27 vactive = <480>;
28 hback-porch = <88>;
29 hfront-porch = <40>;
30 hsync-len = <0>;
31 vback-porch = <32>;
32 vfront-porch = <11>;
33 vsync-len = <1>;
34 clock = <0>; /* unused but required */
35 bpp = <16>; /* non-standard but required */
36 };
37 };
38 };
39
40 backlight {
41 compatible = "pwm-backlight";
42 pwms = <&pwm 0 50000 1>; /* duty inverted */
43
44 brightness-levels = <0 40 60 80 100 130 190 255>;
45 default-brightness-level = <5>;
46 };
47};
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
new file mode 100644
index 000000000000..e8cbfdc87bba
--- /dev/null
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -0,0 +1,224 @@
1/*
2 * wm8850.dtsi - Device tree file for Wondermedia WM8850 SoC
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 compatible = "wm,wm8850";
13
14 aliases {
15 serial0 = &uart0;
16 serial1 = &uart1;
17 serial2 = &uart2;
18 serial3 = &uart3;
19 };
20
21 soc {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 ranges;
26 interrupt-parent = <&intc0>;
27
28 intc0: interrupt-controller@d8140000 {
29 compatible = "via,vt8500-intc";
30 interrupt-controller;
31 reg = <0xd8140000 0x10000>;
32 #interrupt-cells = <1>;
33 };
34
35 /* Secondary IC cascaded to intc0 */
36 intc1: interrupt-controller@d8150000 {
37 compatible = "via,vt8500-intc";
38 interrupt-controller;
39 #interrupt-cells = <1>;
40 reg = <0xD8150000 0x10000>;
41 interrupts = <56 57 58 59 60 61 62 63>;
42 };
43
44 gpio: gpio-controller@d8110000 {
45 compatible = "wm,wm8650-gpio";
46 gpio-controller;
47 reg = <0xd8110000 0x10000>;
48 #gpio-cells = <3>;
49 };
50
51 pmc@d8130000 {
52 compatible = "via,vt8500-pmc";
53 reg = <0xd8130000 0x1000>;
54
55 clocks {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 ref25: ref25M {
60 #clock-cells = <0>;
61 compatible = "fixed-clock";
62 clock-frequency = <25000000>;
63 };
64
65 ref24: ref24M {
66 #clock-cells = <0>;
67 compatible = "fixed-clock";
68 clock-frequency = <24000000>;
69 };
70
71 plla: plla {
72 #clock-cells = <0>;
73 compatible = "wm,wm8750-pll-clock";
74 clocks = <&ref25>;
75 reg = <0x200>;
76 };
77
78 pllb: pllb {
79 #clock-cells = <0>;
80 compatible = "wm,wm8750-pll-clock";
81 clocks = <&ref25>;
82 reg = <0x204>;
83 };
84
85 clkuart0: uart0 {
86 #clock-cells = <0>;
87 compatible = "via,vt8500-device-clock";
88 clocks = <&ref24>;
89 enable-reg = <0x254>;
90 enable-bit = <24>;
91 };
92
93 clkuart1: uart1 {
94 #clock-cells = <0>;
95 compatible = "via,vt8500-device-clock";
96 clocks = <&ref24>;
97 enable-reg = <0x254>;
98 enable-bit = <25>;
99 };
100
101 clkuart2: uart2 {
102 #clock-cells = <0>;
103 compatible = "via,vt8500-device-clock";
104 clocks = <&ref24>;
105 enable-reg = <0x254>;
106 enable-bit = <26>;
107 };
108
109 clkuart3: uart3 {
110 #clock-cells = <0>;
111 compatible = "via,vt8500-device-clock";
112 clocks = <&ref24>;
113 enable-reg = <0x254>;
114 enable-bit = <27>;
115 };
116
117 clkpwm: pwm {
118 #clock-cells = <0>;
119 compatible = "via,vt8500-device-clock";
120 clocks = <&pllb>;
121 divisor-reg = <0x350>;
122 enable-reg = <0x250>;
123 enable-bit = <17>;
124 };
125
126 clksdhc: sdhc {
127 #clock-cells = <0>;
128 compatible = "via,vt8500-device-clock";
129 clocks = <&pllb>;
130 divisor-reg = <0x330>;
131 divisor-mask = <0x3f>;
132 enable-reg = <0x250>;
133 enable-bit = <0>;
134 };
135 };
136 };
137
138 fb@d8051700 {
139 compatible = "wm,wm8505-fb";
140 reg = <0xd8051700 0x200>;
141 display = <&display>;
142 default-mode = <&mode0>;
143 };
144
145 ge_rops@d8050400 {
146 compatible = "wm,prizm-ge-rops";
147 reg = <0xd8050400 0x100>;
148 };
149
150 pwm: pwm@d8220000 {
151 #pwm-cells = <3>;
152 compatible = "via,vt8500-pwm";
153 reg = <0xd8220000 0x100>;
154 clocks = <&clkpwm>;
155 };
156
157 timer@d8130100 {
158 compatible = "via,vt8500-timer";
159 reg = <0xd8130100 0x28>;
160 interrupts = <36>;
161 };
162
163 ehci@d8007900 {
164 compatible = "via,vt8500-ehci";
165 reg = <0xd8007900 0x200>;
166 interrupts = <26>;
167 };
168
169 uhci@d8007b00 {
170 compatible = "platform-uhci";
171 reg = <0xd8007b00 0x200>;
172 interrupts = <26>;
173 };
174
175 uhci@d8008d00 {
176 compatible = "platform-uhci";
177 reg = <0xd8008d00 0x200>;
178 interrupts = <26>;
179 };
180
181 uart0: uart@d8200000 {
182 compatible = "via,vt8500-uart";
183 reg = <0xd8200000 0x1040>;
184 interrupts = <32>;
185 clocks = <&clkuart0>;
186 };
187
188 uart1: uart@d82b0000 {
189 compatible = "via,vt8500-uart";
190 reg = <0xd82b0000 0x1040>;
191 interrupts = <33>;
192 clocks = <&clkuart1>;
193 };
194
195 uart2: uart@d8210000 {
196 compatible = "via,vt8500-uart";
197 reg = <0xd8210000 0x1040>;
198 interrupts = <47>;
199 clocks = <&clkuart2>;
200 };
201
202 uart3: uart@d82c0000 {
203 compatible = "via,vt8500-uart";
204 reg = <0xd82c0000 0x1040>;
205 interrupts = <50>;
206 clocks = <&clkuart3>;
207 };
208
209 rtc@d8100000 {
210 compatible = "via,vt8500-rtc";
211 reg = <0xd8100000 0x10000>;
212 interrupts = <48>;
213 };
214
215 sdhc@d800a000 {
216 compatible = "wm,wm8505-sdhc";
217 reg = <0xd800a000 0x1000>;
218 interrupts = <20 21>;
219 clocks = <&clksdhc>;
220 bus-width = <4>;
221 sdon-inverted;
222 };
223 };
224};
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 45ceeb0e93e0..9353184d730d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,26 +1,3 @@
1config ARM_GIC
2 bool
3 select IRQ_DOMAIN
4 select MULTI_IRQ_HANDLER
5
6config GIC_NON_BANKED
7 bool
8
9config ARM_VIC
10 bool
11 select IRQ_DOMAIN
12 select MULTI_IRQ_HANDLER
13
14config ARM_VIC_NR
15 int
16 default 4 if ARCH_S5PV210
17 default 3 if ARCH_S5PC100
18 default 2
19 depends on ARM_VIC
20 help
21 The maximum number of VICs available in the system, for
22 power management.
23
24config ICST 1config ICST
25 bool 2 bool
26 3
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index e8a4e58f1b82..dc8dd0de5c0f 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -2,8 +2,6 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-$(CONFIG_ARM_GIC) += gic.o
6obj-$(CONFIG_ARM_VIC) += vic.o
7obj-$(CONFIG_ICST) += icst.o 5obj-$(CONFIG_ICST) += icst.o
8obj-$(CONFIG_SA1111) += sa1111.o 6obj-$(CONFIG_SA1111) += sa1111.o
9obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o 7obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
deleted file mode 100644
index 36ae03a3f5d1..000000000000
--- a/arch/arm/common/gic.c
+++ /dev/null
@@ -1,811 +0,0 @@
1/*
2 * linux/arch/arm/common/gic.c
3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Interrupt architecture for the GIC:
11 *
12 * o There is one Interrupt Distributor, which receives interrupts
13 * from system devices and sends them to the Interrupt Controllers.
14 *
15 * o There is one CPU Interface per CPU, which sends interrupts sent
16 * by the Distributor, and interrupts generated locally, to the
17 * associated CPU. The base address of the CPU interface is usually
18 * aliased so that the same address points to different chips depending
19 * on the CPU it is accessed from.
20 *
21 * Note that IRQs 0-31 are special - they are local to each CPU.
22 * As such, the enable set/clear, pending set/clear and active bit
23 * registers are banked per-cpu for these sources.
24 */
25#include <linux/init.h>
26#include <linux/kernel.h>
27#include <linux/err.h>
28#include <linux/module.h>
29#include <linux/list.h>
30#include <linux/smp.h>
31#include <linux/cpu_pm.h>
32#include <linux/cpumask.h>
33#include <linux/io.h>
34#include <linux/of.h>
35#include <linux/of_address.h>
36#include <linux/of_irq.h>
37#include <linux/irqdomain.h>
38#include <linux/interrupt.h>
39#include <linux/percpu.h>
40#include <linux/slab.h>
41
42#include <asm/irq.h>
43#include <asm/exception.h>
44#include <asm/smp_plat.h>
45#include <asm/mach/irq.h>
46#include <asm/hardware/gic.h>
47
48union gic_base {
49 void __iomem *common_base;
50 void __percpu __iomem **percpu_base;
51};
52
53struct gic_chip_data {
54 union gic_base dist_base;
55 union gic_base cpu_base;
56#ifdef CONFIG_CPU_PM
57 u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
58 u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
59 u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
60 u32 __percpu *saved_ppi_enable;
61 u32 __percpu *saved_ppi_conf;
62#endif
63 struct irq_domain *domain;
64 unsigned int gic_irqs;
65#ifdef CONFIG_GIC_NON_BANKED
66 void __iomem *(*get_base)(union gic_base *);
67#endif
68};
69
70static DEFINE_RAW_SPINLOCK(irq_controller_lock);
71
72/*
73 * The GIC mapping of CPU interfaces does not necessarily match
74 * the logical CPU numbering. Let's use a mapping as returned
75 * by the GIC itself.
76 */
77#define NR_GIC_CPU_IF 8
78static u8 gic_cpu_map[NR_GIC_CPU_IF] __read_mostly;
79
80/*
81 * Supported arch specific GIC irq extension.
82 * Default make them NULL.
83 */
84struct irq_chip gic_arch_extn = {
85 .irq_eoi = NULL,
86 .irq_mask = NULL,
87 .irq_unmask = NULL,
88 .irq_retrigger = NULL,
89 .irq_set_type = NULL,
90 .irq_set_wake = NULL,
91};
92
93#ifndef MAX_GIC_NR
94#define MAX_GIC_NR 1
95#endif
96
97static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
98
99#ifdef CONFIG_GIC_NON_BANKED
100static void __iomem *gic_get_percpu_base(union gic_base *base)
101{
102 return *__this_cpu_ptr(base->percpu_base);
103}
104
105static void __iomem *gic_get_common_base(union gic_base *base)
106{
107 return base->common_base;
108}
109
110static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
111{
112 return data->get_base(&data->dist_base);
113}
114
115static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
116{
117 return data->get_base(&data->cpu_base);
118}
119
120static inline void gic_set_base_accessor(struct gic_chip_data *data,
121 void __iomem *(*f)(union gic_base *))
122{
123 data->get_base = f;
124}
125#else
126#define gic_data_dist_base(d) ((d)->dist_base.common_base)
127#define gic_data_cpu_base(d) ((d)->cpu_base.common_base)
128#define gic_set_base_accessor(d,f)
129#endif
130
131static inline void __iomem *gic_dist_base(struct irq_data *d)
132{
133 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
134 return gic_data_dist_base(gic_data);
135}
136
137static inline void __iomem *gic_cpu_base(struct irq_data *d)
138{
139 struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
140 return gic_data_cpu_base(gic_data);
141}
142
143static inline unsigned int gic_irq(struct irq_data *d)
144{
145 return d->hwirq;
146}
147
148/*
149 * Routines to acknowledge, disable and enable interrupts
150 */
151static void gic_mask_irq(struct irq_data *d)
152{
153 u32 mask = 1 << (gic_irq(d) % 32);
154
155 raw_spin_lock(&irq_controller_lock);
156 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
157 if (gic_arch_extn.irq_mask)
158 gic_arch_extn.irq_mask(d);
159 raw_spin_unlock(&irq_controller_lock);
160}
161
162static void gic_unmask_irq(struct irq_data *d)
163{
164 u32 mask = 1 << (gic_irq(d) % 32);
165
166 raw_spin_lock(&irq_controller_lock);
167 if (gic_arch_extn.irq_unmask)
168 gic_arch_extn.irq_unmask(d);
169 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
170 raw_spin_unlock(&irq_controller_lock);
171}
172
173static void gic_eoi_irq(struct irq_data *d)
174{
175 if (gic_arch_extn.irq_eoi) {
176 raw_spin_lock(&irq_controller_lock);
177 gic_arch_extn.irq_eoi(d);
178 raw_spin_unlock(&irq_controller_lock);
179 }
180
181 writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
182}
183
184static int gic_set_type(struct irq_data *d, unsigned int type)
185{
186 void __iomem *base = gic_dist_base(d);
187 unsigned int gicirq = gic_irq(d);
188 u32 enablemask = 1 << (gicirq % 32);
189 u32 enableoff = (gicirq / 32) * 4;
190 u32 confmask = 0x2 << ((gicirq % 16) * 2);
191 u32 confoff = (gicirq / 16) * 4;
192 bool enabled = false;
193 u32 val;
194
195 /* Interrupt configuration for SGIs can't be changed */
196 if (gicirq < 16)
197 return -EINVAL;
198
199 if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
200 return -EINVAL;
201
202 raw_spin_lock(&irq_controller_lock);
203
204 if (gic_arch_extn.irq_set_type)
205 gic_arch_extn.irq_set_type(d, type);
206
207 val = readl_relaxed(base + GIC_DIST_CONFIG + confoff);
208 if (type == IRQ_TYPE_LEVEL_HIGH)
209 val &= ~confmask;
210 else if (type == IRQ_TYPE_EDGE_RISING)
211 val |= confmask;
212
213 /*
214 * As recommended by the spec, disable the interrupt before changing
215 * the configuration
216 */
217 if (readl_relaxed(base + GIC_DIST_ENABLE_SET + enableoff) & enablemask) {
218 writel_relaxed(enablemask, base + GIC_DIST_ENABLE_CLEAR + enableoff);
219 enabled = true;
220 }
221
222 writel_relaxed(val, base + GIC_DIST_CONFIG + confoff);
223
224 if (enabled)
225 writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff);
226
227 raw_spin_unlock(&irq_controller_lock);
228
229 return 0;
230}
231
232static int gic_retrigger(struct irq_data *d)
233{
234 if (gic_arch_extn.irq_retrigger)
235 return gic_arch_extn.irq_retrigger(d);
236
237 return -ENXIO;
238}
239
240#ifdef CONFIG_SMP
241static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
242 bool force)
243{
244 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
245 unsigned int shift = (gic_irq(d) % 4) * 8;
246 unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask);
247 u32 val, mask, bit;
248
249 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
250 return -EINVAL;
251
252 mask = 0xff << shift;
253 bit = gic_cpu_map[cpu] << shift;
254
255 raw_spin_lock(&irq_controller_lock);
256 val = readl_relaxed(reg) & ~mask;
257 writel_relaxed(val | bit, reg);
258 raw_spin_unlock(&irq_controller_lock);
259
260 return IRQ_SET_MASK_OK;
261}
262#endif
263
264#ifdef CONFIG_PM
265static int gic_set_wake(struct irq_data *d, unsigned int on)
266{
267 int ret = -ENXIO;
268
269 if (gic_arch_extn.irq_set_wake)
270 ret = gic_arch_extn.irq_set_wake(d, on);
271
272 return ret;
273}
274
275#else
276#define gic_set_wake NULL
277#endif
278
279asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
280{
281 u32 irqstat, irqnr;
282 struct gic_chip_data *gic = &gic_data[0];
283 void __iomem *cpu_base = gic_data_cpu_base(gic);
284
285 do {
286 irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
287 irqnr = irqstat & ~0x1c00;
288
289 if (likely(irqnr > 15 && irqnr < 1021)) {
290 irqnr = irq_find_mapping(gic->domain, irqnr);
291 handle_IRQ(irqnr, regs);
292 continue;
293 }
294 if (irqnr < 16) {
295 writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
296#ifdef CONFIG_SMP
297 handle_IPI(irqnr, regs);
298#endif
299 continue;
300 }
301 break;
302 } while (1);
303}
304
305static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
306{
307 struct gic_chip_data *chip_data = irq_get_handler_data(irq);
308 struct irq_chip *chip = irq_get_chip(irq);
309 unsigned int cascade_irq, gic_irq;
310 unsigned long status;
311
312 chained_irq_enter(chip, desc);
313
314 raw_spin_lock(&irq_controller_lock);
315 status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
316 raw_spin_unlock(&irq_controller_lock);
317
318 gic_irq = (status & 0x3ff);
319 if (gic_irq == 1023)
320 goto out;
321
322 cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
323 if (unlikely(gic_irq < 32 || gic_irq > 1020))
324 do_bad_IRQ(cascade_irq, desc);
325 else
326 generic_handle_irq(cascade_irq);
327
328 out:
329 chained_irq_exit(chip, desc);
330}
331
332static struct irq_chip gic_chip = {
333 .name = "GIC",
334 .irq_mask = gic_mask_irq,
335 .irq_unmask = gic_unmask_irq,
336 .irq_eoi = gic_eoi_irq,
337 .irq_set_type = gic_set_type,
338 .irq_retrigger = gic_retrigger,
339#ifdef CONFIG_SMP
340 .irq_set_affinity = gic_set_affinity,
341#endif
342 .irq_set_wake = gic_set_wake,
343};
344
345void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
346{
347 if (gic_nr >= MAX_GIC_NR)
348 BUG();
349 if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0)
350 BUG();
351 irq_set_chained_handler(irq, gic_handle_cascade_irq);
352}
353
354static void __init gic_dist_init(struct gic_chip_data *gic)
355{
356 unsigned int i;
357 u32 cpumask;
358 unsigned int gic_irqs = gic->gic_irqs;
359 void __iomem *base = gic_data_dist_base(gic);
360
361 writel_relaxed(0, base + GIC_DIST_CTRL);
362
363 /*
364 * Set all global interrupts to be level triggered, active low.
365 */
366 for (i = 32; i < gic_irqs; i += 16)
367 writel_relaxed(0, base + GIC_DIST_CONFIG + i * 4 / 16);
368
369 /*
370 * Set all global interrupts to this CPU only.
371 */
372 cpumask = readl_relaxed(base + GIC_DIST_TARGET + 0);
373 for (i = 32; i < gic_irqs; i += 4)
374 writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
375
376 /*
377 * Set priority on all global interrupts.
378 */
379 for (i = 32; i < gic_irqs; i += 4)
380 writel_relaxed(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4);
381
382 /*
383 * Disable all interrupts. Leave the PPI and SGIs alone
384 * as these enables are banked registers.
385 */
386 for (i = 32; i < gic_irqs; i += 32)
387 writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
388
389 writel_relaxed(1, base + GIC_DIST_CTRL);
390}
391
392static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
393{
394 void __iomem *dist_base = gic_data_dist_base(gic);
395 void __iomem *base = gic_data_cpu_base(gic);
396 unsigned int cpu_mask, cpu = smp_processor_id();
397 int i;
398
399 /*
400 * Get what the GIC says our CPU mask is.
401 */
402 BUG_ON(cpu >= NR_GIC_CPU_IF);
403 cpu_mask = readl_relaxed(dist_base + GIC_DIST_TARGET + 0);
404 gic_cpu_map[cpu] = cpu_mask;
405
406 /*
407 * Clear our mask from the other map entries in case they're
408 * still undefined.
409 */
410 for (i = 0; i < NR_GIC_CPU_IF; i++)
411 if (i != cpu)
412 gic_cpu_map[i] &= ~cpu_mask;
413
414 /*
415 * Deal with the banked PPI and SGI interrupts - disable all
416 * PPI interrupts, ensure all SGI interrupts are enabled.
417 */
418 writel_relaxed(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
419 writel_relaxed(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
420
421 /*
422 * Set priority on PPI and SGI interrupts
423 */
424 for (i = 0; i < 32; i += 4)
425 writel_relaxed(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
426
427 writel_relaxed(0xf0, base + GIC_CPU_PRIMASK);
428 writel_relaxed(1, base + GIC_CPU_CTRL);
429}
430
431#ifdef CONFIG_CPU_PM
432/*
433 * Saves the GIC distributor registers during suspend or idle. Must be called
434 * with interrupts disabled but before powering down the GIC. After calling
435 * this function, no interrupts will be delivered by the GIC, and another
436 * platform-specific wakeup source must be enabled.
437 */
438static void gic_dist_save(unsigned int gic_nr)
439{
440 unsigned int gic_irqs;
441 void __iomem *dist_base;
442 int i;
443
444 if (gic_nr >= MAX_GIC_NR)
445 BUG();
446
447 gic_irqs = gic_data[gic_nr].gic_irqs;
448 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
449
450 if (!dist_base)
451 return;
452
453 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 16); i++)
454 gic_data[gic_nr].saved_spi_conf[i] =
455 readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
456
457 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 4); i++)
458 gic_data[gic_nr].saved_spi_target[i] =
459 readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4);
460
461 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 32); i++)
462 gic_data[gic_nr].saved_spi_enable[i] =
463 readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
464}
465
466/*
467 * Restores the GIC distributor registers during resume or when coming out of
468 * idle. Must be called before enabling interrupts. If a level interrupt
469 * that occured while the GIC was suspended is still present, it will be
470 * handled normally, but any edge interrupts that occured will not be seen by
471 * the GIC and need to be handled by the platform-specific wakeup source.
472 */
473static void gic_dist_restore(unsigned int gic_nr)
474{
475 unsigned int gic_irqs;
476 unsigned int i;
477 void __iomem *dist_base;
478
479 if (gic_nr >= MAX_GIC_NR)
480 BUG();
481
482 gic_irqs = gic_data[gic_nr].gic_irqs;
483 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
484
485 if (!dist_base)
486 return;
487
488 writel_relaxed(0, dist_base + GIC_DIST_CTRL);
489
490 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 16); i++)
491 writel_relaxed(gic_data[gic_nr].saved_spi_conf[i],
492 dist_base + GIC_DIST_CONFIG + i * 4);
493
494 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 4); i++)
495 writel_relaxed(0xa0a0a0a0,
496 dist_base + GIC_DIST_PRI + i * 4);
497
498 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 4); i++)
499 writel_relaxed(gic_data[gic_nr].saved_spi_target[i],
500 dist_base + GIC_DIST_TARGET + i * 4);
501
502 for (i = 0; i < DIV_ROUND_UP(gic_irqs, 32); i++)
503 writel_relaxed(gic_data[gic_nr].saved_spi_enable[i],
504 dist_base + GIC_DIST_ENABLE_SET + i * 4);
505
506 writel_relaxed(1, dist_base + GIC_DIST_CTRL);
507}
508
509static void gic_cpu_save(unsigned int gic_nr)
510{
511 int i;
512 u32 *ptr;
513 void __iomem *dist_base;
514 void __iomem *cpu_base;
515
516 if (gic_nr >= MAX_GIC_NR)
517 BUG();
518
519 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
520 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
521
522 if (!dist_base || !cpu_base)
523 return;
524
525 ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable);
526 for (i = 0; i < DIV_ROUND_UP(32, 32); i++)
527 ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
528
529 ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf);
530 for (i = 0; i < DIV_ROUND_UP(32, 16); i++)
531 ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4);
532
533}
534
535static void gic_cpu_restore(unsigned int gic_nr)
536{
537 int i;
538 u32 *ptr;
539 void __iomem *dist_base;
540 void __iomem *cpu_base;
541
542 if (gic_nr >= MAX_GIC_NR)
543 BUG();
544
545 dist_base = gic_data_dist_base(&gic_data[gic_nr]);
546 cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
547
548 if (!dist_base || !cpu_base)
549 return;
550
551 ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable);
552 for (i = 0; i < DIV_ROUND_UP(32, 32); i++)
553 writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4);
554
555 ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf);
556 for (i = 0; i < DIV_ROUND_UP(32, 16); i++)
557 writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4);
558
559 for (i = 0; i < DIV_ROUND_UP(32, 4); i++)
560 writel_relaxed(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4);
561
562 writel_relaxed(0xf0, cpu_base + GIC_CPU_PRIMASK);
563 writel_relaxed(1, cpu_base + GIC_CPU_CTRL);
564}
565
566static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v)
567{
568 int i;
569
570 for (i = 0; i < MAX_GIC_NR; i++) {
571#ifdef CONFIG_GIC_NON_BANKED
572 /* Skip over unused GICs */
573 if (!gic_data[i].get_base)
574 continue;
575#endif
576 switch (cmd) {
577 case CPU_PM_ENTER:
578 gic_cpu_save(i);
579 break;
580 case CPU_PM_ENTER_FAILED:
581 case CPU_PM_EXIT:
582 gic_cpu_restore(i);
583 break;
584 case CPU_CLUSTER_PM_ENTER:
585 gic_dist_save(i);
586 break;
587 case CPU_CLUSTER_PM_ENTER_FAILED:
588 case CPU_CLUSTER_PM_EXIT:
589 gic_dist_restore(i);
590 break;
591 }
592 }
593
594 return NOTIFY_OK;
595}
596
597static struct notifier_block gic_notifier_block = {
598 .notifier_call = gic_notifier,
599};
600
601static void __init gic_pm_init(struct gic_chip_data *gic)
602{
603 gic->saved_ppi_enable = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4,
604 sizeof(u32));
605 BUG_ON(!gic->saved_ppi_enable);
606
607 gic->saved_ppi_conf = __alloc_percpu(DIV_ROUND_UP(32, 16) * 4,
608 sizeof(u32));
609 BUG_ON(!gic->saved_ppi_conf);
610
611 if (gic == &gic_data[0])
612 cpu_pm_register_notifier(&gic_notifier_block);
613}
614#else
615static void __init gic_pm_init(struct gic_chip_data *gic)
616{
617}
618#endif
619
620static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
621 irq_hw_number_t hw)
622{
623 if (hw < 32) {
624 irq_set_percpu_devid(irq);
625 irq_set_chip_and_handler(irq, &gic_chip,
626 handle_percpu_devid_irq);
627 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
628 } else {
629 irq_set_chip_and_handler(irq, &gic_chip,
630 handle_fasteoi_irq);
631 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
632 }
633 irq_set_chip_data(irq, d->host_data);
634 return 0;
635}
636
637static int gic_irq_domain_xlate(struct irq_domain *d,
638 struct device_node *controller,
639 const u32 *intspec, unsigned int intsize,
640 unsigned long *out_hwirq, unsigned int *out_type)
641{
642 if (d->of_node != controller)
643 return -EINVAL;
644 if (intsize < 3)
645 return -EINVAL;
646
647 /* Get the interrupt number and add 16 to skip over SGIs */
648 *out_hwirq = intspec[1] + 16;
649
650 /* For SPIs, we need to add 16 more to get the GIC irq ID number */
651 if (!intspec[0])
652 *out_hwirq += 16;
653
654 *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
655 return 0;
656}
657
658const struct irq_domain_ops gic_irq_domain_ops = {
659 .map = gic_irq_domain_map,
660 .xlate = gic_irq_domain_xlate,
661};
662
663void __init gic_init_bases(unsigned int gic_nr, int irq_start,
664 void __iomem *dist_base, void __iomem *cpu_base,
665 u32 percpu_offset, struct device_node *node)
666{
667 irq_hw_number_t hwirq_base;
668 struct gic_chip_data *gic;
669 int gic_irqs, irq_base, i;
670
671 BUG_ON(gic_nr >= MAX_GIC_NR);
672
673 gic = &gic_data[gic_nr];
674#ifdef CONFIG_GIC_NON_BANKED
675 if (percpu_offset) { /* Frankein-GIC without banked registers... */
676 unsigned int cpu;
677
678 gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
679 gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
680 if (WARN_ON(!gic->dist_base.percpu_base ||
681 !gic->cpu_base.percpu_base)) {
682 free_percpu(gic->dist_base.percpu_base);
683 free_percpu(gic->cpu_base.percpu_base);
684 return;
685 }
686
687 for_each_possible_cpu(cpu) {
688 unsigned long offset = percpu_offset * cpu_logical_map(cpu);
689 *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
690 *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
691 }
692
693 gic_set_base_accessor(gic, gic_get_percpu_base);
694 } else
695#endif
696 { /* Normal, sane GIC... */
697 WARN(percpu_offset,
698 "GIC_NON_BANKED not enabled, ignoring %08x offset!",
699 percpu_offset);
700 gic->dist_base.common_base = dist_base;
701 gic->cpu_base.common_base = cpu_base;
702 gic_set_base_accessor(gic, gic_get_common_base);
703 }
704
705 /*
706 * Initialize the CPU interface map to all CPUs.
707 * It will be refined as each CPU probes its ID.
708 */
709 for (i = 0; i < NR_GIC_CPU_IF; i++)
710 gic_cpu_map[i] = 0xff;
711
712 /*
713 * For primary GICs, skip over SGIs.
714 * For secondary GICs, skip over PPIs, too.
715 */
716 if (gic_nr == 0 && (irq_start & 31) > 0) {
717 hwirq_base = 16;
718 if (irq_start != -1)
719 irq_start = (irq_start & ~31) + 16;
720 } else {
721 hwirq_base = 32;
722 }
723
724 /*
725 * Find out how many interrupts are supported.
726 * The GIC only supports up to 1020 interrupt sources.
727 */
728 gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
729 gic_irqs = (gic_irqs + 1) * 32;
730 if (gic_irqs > 1020)
731 gic_irqs = 1020;
732 gic->gic_irqs = gic_irqs;
733
734 gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
735 irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id());
736 if (IS_ERR_VALUE(irq_base)) {
737 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
738 irq_start);
739 irq_base = irq_start;
740 }
741 gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
742 hwirq_base, &gic_irq_domain_ops, gic);
743 if (WARN_ON(!gic->domain))
744 return;
745
746 gic_chip.flags |= gic_arch_extn.flags;
747 gic_dist_init(gic);
748 gic_cpu_init(gic);
749 gic_pm_init(gic);
750}
751
752void __cpuinit gic_secondary_init(unsigned int gic_nr)
753{
754 BUG_ON(gic_nr >= MAX_GIC_NR);
755
756 gic_cpu_init(&gic_data[gic_nr]);
757}
758
759#ifdef CONFIG_SMP
760void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
761{
762 int cpu;
763 unsigned long map = 0;
764
765 /* Convert our logical CPU mask into a physical one. */
766 for_each_cpu(cpu, mask)
767 map |= gic_cpu_map[cpu];
768
769 /*
770 * Ensure that stores to Normal memory are visible to the
771 * other CPUs before issuing the IPI.
772 */
773 dsb();
774
775 /* this always happens on GIC0 */
776 writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
777}
778#endif
779
780#ifdef CONFIG_OF
781static int gic_cnt __initdata = 0;
782
783int __init gic_of_init(struct device_node *node, struct device_node *parent)
784{
785 void __iomem *cpu_base;
786 void __iomem *dist_base;
787 u32 percpu_offset;
788 int irq;
789
790 if (WARN_ON(!node))
791 return -ENODEV;
792
793 dist_base = of_iomap(node, 0);
794 WARN(!dist_base, "unable to map gic dist registers\n");
795
796 cpu_base = of_iomap(node, 1);
797 WARN(!cpu_base, "unable to map gic cpu registers\n");
798
799 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
800 percpu_offset = 0;
801
802 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
803
804 if (parent) {
805 irq = irq_of_parse_and_map(node, 0);
806 gic_cascade_irq(gic_cnt, irq);
807 }
808 gic_cnt++;
809 return 0;
810}
811#endif
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 9173d112ea01..e57d7e5bf96a 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -686,8 +686,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
686 * %-EINVAL no platform data passed 686 * %-EINVAL no platform data passed
687 * %0 successful. 687 * %0 successful.
688 */ 688 */
689static int __devinit 689static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
690__sa1111_probe(struct device *me, struct resource *mem, int irq)
691{ 690{
692 struct sa1111_platform_data *pd = me->platform_data; 691 struct sa1111_platform_data *pd = me->platform_data;
693 struct sa1111 *sachip; 692 struct sa1111 *sachip;
@@ -1011,7 +1010,7 @@ static int sa1111_resume(struct platform_device *dev)
1011#define sa1111_resume NULL 1010#define sa1111_resume NULL
1012#endif 1011#endif
1013 1012
1014static int __devinit sa1111_probe(struct platform_device *pdev) 1013static int sa1111_probe(struct platform_device *pdev)
1015{ 1014{
1016 struct resource *mem; 1015 struct resource *mem;
1017 int irq; 1016 int irq;
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 0c616d5fcb0f..a5c3dc38aa18 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -176,7 +176,7 @@ static int scoop_resume(struct platform_device *dev)
176#define scoop_resume NULL 176#define scoop_resume NULL
177#endif 177#endif
178 178
179static int __devinit scoop_probe(struct platform_device *pdev) 179static int scoop_probe(struct platform_device *pdev)
180{ 180{
181 struct scoop_dev *devptr; 181 struct scoop_dev *devptr;
182 struct scoop_config *inf; 182 struct scoop_config *inf;
@@ -243,7 +243,7 @@ err_ioremap:
243 return ret; 243 return ret;
244} 244}
245 245
246static int __devexit scoop_remove(struct platform_device *pdev) 246static int scoop_remove(struct platform_device *pdev)
247{ 247{
248 struct scoop_dev *sdev = platform_get_drvdata(pdev); 248 struct scoop_dev *sdev = platform_get_drvdata(pdev);
249 int ret; 249 int ret;
@@ -268,7 +268,7 @@ static int __devexit scoop_remove(struct platform_device *pdev)
268 268
269static struct platform_driver scoop_driver = { 269static struct platform_driver scoop_driver = {
270 .probe = scoop_probe, 270 .probe = scoop_probe,
271 .remove = __devexit_p(scoop_remove), 271 .remove = scoop_remove,
272 .suspend = scoop_suspend, 272 .suspend = scoop_suspend,
273 .resume = scoop_resume, 273 .resume = scoop_resume,
274 .driver = { 274 .driver = {
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
deleted file mode 100644
index e4df17ca90c7..000000000000
--- a/arch/arm/common/vic.c
+++ /dev/null
@@ -1,459 +0,0 @@
1/*
2 * linux/arch/arm/common/vic.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/export.h>
23#include <linux/init.h>
24#include <linux/list.h>
25#include <linux/io.h>
26#include <linux/irqdomain.h>
27#include <linux/of.h>
28#include <linux/of_address.h>
29#include <linux/of_irq.h>
30#include <linux/syscore_ops.h>
31#include <linux/device.h>
32#include <linux/amba/bus.h>
33
34#include <asm/exception.h>
35#include <asm/mach/irq.h>
36#include <asm/hardware/vic.h>
37
38/**
39 * struct vic_device - VIC PM device
40 * @irq: The IRQ number for the base of the VIC.
41 * @base: The register base for the VIC.
42 * @valid_sources: A bitmask of valid interrupts
43 * @resume_sources: A bitmask of interrupts for resume.
44 * @resume_irqs: The IRQs enabled for resume.
45 * @int_select: Save for VIC_INT_SELECT.
46 * @int_enable: Save for VIC_INT_ENABLE.
47 * @soft_int: Save for VIC_INT_SOFT.
48 * @protect: Save for VIC_PROTECT.
49 * @domain: The IRQ domain for the VIC.
50 */
51struct vic_device {
52 void __iomem *base;
53 int irq;
54 u32 valid_sources;
55 u32 resume_sources;
56 u32 resume_irqs;
57 u32 int_select;
58 u32 int_enable;
59 u32 soft_int;
60 u32 protect;
61 struct irq_domain *domain;
62};
63
64/* we cannot allocate memory when VICs are initially registered */
65static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
66
67static int vic_id;
68
69/**
70 * vic_init2 - common initialisation code
71 * @base: Base of the VIC.
72 *
73 * Common initialisation code for registration
74 * and resume.
75*/
76static void vic_init2(void __iomem *base)
77{
78 int i;
79
80 for (i = 0; i < 16; i++) {
81 void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
82 writel(VIC_VECT_CNTL_ENABLE | i, reg);
83 }
84
85 writel(32, base + VIC_PL190_DEF_VECT_ADDR);
86}
87
88#ifdef CONFIG_PM
89static void resume_one_vic(struct vic_device *vic)
90{
91 void __iomem *base = vic->base;
92
93 printk(KERN_DEBUG "%s: resuming vic at %p\n", __func__, base);
94
95 /* re-initialise static settings */
96 vic_init2(base);
97
98 writel(vic->int_select, base + VIC_INT_SELECT);
99 writel(vic->protect, base + VIC_PROTECT);
100
101 /* set the enabled ints and then clear the non-enabled */
102 writel(vic->int_enable, base + VIC_INT_ENABLE);
103 writel(~vic->int_enable, base + VIC_INT_ENABLE_CLEAR);
104
105 /* and the same for the soft-int register */
106
107 writel(vic->soft_int, base + VIC_INT_SOFT);
108 writel(~vic->soft_int, base + VIC_INT_SOFT_CLEAR);
109}
110
111static void vic_resume(void)
112{
113 int id;
114
115 for (id = vic_id - 1; id >= 0; id--)
116 resume_one_vic(vic_devices + id);
117}
118
119static void suspend_one_vic(struct vic_device *vic)
120{
121 void __iomem *base = vic->base;
122
123 printk(KERN_DEBUG "%s: suspending vic at %p\n", __func__, base);
124
125 vic->int_select = readl(base + VIC_INT_SELECT);
126 vic->int_enable = readl(base + VIC_INT_ENABLE);
127 vic->soft_int = readl(base + VIC_INT_SOFT);
128 vic->protect = readl(base + VIC_PROTECT);
129
130 /* set the interrupts (if any) that are used for
131 * resuming the system */
132
133 writel(vic->resume_irqs, base + VIC_INT_ENABLE);
134 writel(~vic->resume_irqs, base + VIC_INT_ENABLE_CLEAR);
135}
136
137static int vic_suspend(void)
138{
139 int id;
140
141 for (id = 0; id < vic_id; id++)
142 suspend_one_vic(vic_devices + id);
143
144 return 0;
145}
146
147struct syscore_ops vic_syscore_ops = {
148 .suspend = vic_suspend,
149 .resume = vic_resume,
150};
151
152/**
153 * vic_pm_init - initicall to register VIC pm
154 *
155 * This is called via late_initcall() to register
156 * the resources for the VICs due to the early
157 * nature of the VIC's registration.
158*/
159static int __init vic_pm_init(void)
160{
161 if (vic_id > 0)
162 register_syscore_ops(&vic_syscore_ops);
163
164 return 0;
165}
166late_initcall(vic_pm_init);
167#endif /* CONFIG_PM */
168
169static struct irq_chip vic_chip;
170
171static int vic_irqdomain_map(struct irq_domain *d, unsigned int irq,
172 irq_hw_number_t hwirq)
173{
174 struct vic_device *v = d->host_data;
175
176 /* Skip invalid IRQs, only register handlers for the real ones */
177 if (!(v->valid_sources & (1 << hwirq)))
178 return -ENOTSUPP;
179 irq_set_chip_and_handler(irq, &vic_chip, handle_level_irq);
180 irq_set_chip_data(irq, v->base);
181 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
182 return 0;
183}
184
185static struct irq_domain_ops vic_irqdomain_ops = {
186 .map = vic_irqdomain_map,
187 .xlate = irq_domain_xlate_onetwocell,
188};
189
190/**
191 * vic_register() - Register a VIC.
192 * @base: The base address of the VIC.
193 * @irq: The base IRQ for the VIC.
194 * @valid_sources: bitmask of valid interrupts
195 * @resume_sources: bitmask of interrupts allowed for resume sources.
196 * @node: The device tree node associated with the VIC.
197 *
198 * Register the VIC with the system device tree so that it can be notified
199 * of suspend and resume requests and ensure that the correct actions are
200 * taken to re-instate the settings on resume.
201 *
202 * This also configures the IRQ domain for the VIC.
203 */
204static void __init vic_register(void __iomem *base, unsigned int irq,
205 u32 valid_sources, u32 resume_sources,
206 struct device_node *node)
207{
208 struct vic_device *v;
209
210 if (vic_id >= ARRAY_SIZE(vic_devices)) {
211 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
212 return;
213 }
214
215 v = &vic_devices[vic_id];
216 v->base = base;
217 v->valid_sources = valid_sources;
218 v->resume_sources = resume_sources;
219 v->irq = irq;
220 vic_id++;
221 v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
222 &vic_irqdomain_ops, v);
223}
224
225static void vic_ack_irq(struct irq_data *d)
226{
227 void __iomem *base = irq_data_get_irq_chip_data(d);
228 unsigned int irq = d->hwirq;
229 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
230 /* moreover, clear the soft-triggered, in case it was the reason */
231 writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
232}
233
234static void vic_mask_irq(struct irq_data *d)
235{
236 void __iomem *base = irq_data_get_irq_chip_data(d);
237 unsigned int irq = d->hwirq;
238 writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
239}
240
241static void vic_unmask_irq(struct irq_data *d)
242{
243 void __iomem *base = irq_data_get_irq_chip_data(d);
244 unsigned int irq = d->hwirq;
245 writel(1 << irq, base + VIC_INT_ENABLE);
246}
247
248#if defined(CONFIG_PM)
249static struct vic_device *vic_from_irq(unsigned int irq)
250{
251 struct vic_device *v = vic_devices;
252 unsigned int base_irq = irq & ~31;
253 int id;
254
255 for (id = 0; id < vic_id; id++, v++) {
256 if (v->irq == base_irq)
257 return v;
258 }
259
260 return NULL;
261}
262
263static int vic_set_wake(struct irq_data *d, unsigned int on)
264{
265 struct vic_device *v = vic_from_irq(d->irq);
266 unsigned int off = d->hwirq;
267 u32 bit = 1 << off;
268
269 if (!v)
270 return -EINVAL;
271
272 if (!(bit & v->resume_sources))
273 return -EINVAL;
274
275 if (on)
276 v->resume_irqs |= bit;
277 else
278 v->resume_irqs &= ~bit;
279
280 return 0;
281}
282#else
283#define vic_set_wake NULL
284#endif /* CONFIG_PM */
285
286static struct irq_chip vic_chip = {
287 .name = "VIC",
288 .irq_ack = vic_ack_irq,
289 .irq_mask = vic_mask_irq,
290 .irq_unmask = vic_unmask_irq,
291 .irq_set_wake = vic_set_wake,
292};
293
294static void __init vic_disable(void __iomem *base)
295{
296 writel(0, base + VIC_INT_SELECT);
297 writel(0, base + VIC_INT_ENABLE);
298 writel(~0, base + VIC_INT_ENABLE_CLEAR);
299 writel(0, base + VIC_ITCR);
300 writel(~0, base + VIC_INT_SOFT_CLEAR);
301}
302
303static void __init vic_clear_interrupts(void __iomem *base)
304{
305 unsigned int i;
306
307 writel(0, base + VIC_PL190_VECT_ADDR);
308 for (i = 0; i < 19; i++) {
309 unsigned int value;
310
311 value = readl(base + VIC_PL190_VECT_ADDR);
312 writel(value, base + VIC_PL190_VECT_ADDR);
313 }
314}
315
316/*
317 * The PL190 cell from ARM has been modified by ST to handle 64 interrupts.
318 * The original cell has 32 interrupts, while the modified one has 64,
319 * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case
320 * the probe function is called twice, with base set to offset 000
321 * and 020 within the page. We call this "second block".
322 */
323static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
324 u32 vic_sources, struct device_node *node)
325{
326 unsigned int i;
327 int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
328
329 /* Disable all interrupts initially. */
330 vic_disable(base);
331
332 /*
333 * Make sure we clear all existing interrupts. The vector registers
334 * in this cell are after the second block of general registers,
335 * so we can address them using standard offsets, but only from
336 * the second base address, which is 0x20 in the page
337 */
338 if (vic_2nd_block) {
339 vic_clear_interrupts(base);
340
341 /* ST has 16 vectors as well, but we don't enable them by now */
342 for (i = 0; i < 16; i++) {
343 void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
344 writel(0, reg);
345 }
346
347 writel(32, base + VIC_PL190_DEF_VECT_ADDR);
348 }
349
350 vic_register(base, irq_start, vic_sources, 0, node);
351}
352
353void __init __vic_init(void __iomem *base, int irq_start,
354 u32 vic_sources, u32 resume_sources,
355 struct device_node *node)
356{
357 unsigned int i;
358 u32 cellid = 0;
359 enum amba_vendor vendor;
360
361 /* Identify which VIC cell this one is, by reading the ID */
362 for (i = 0; i < 4; i++) {
363 void __iomem *addr;
364 addr = (void __iomem *)((u32)base & PAGE_MASK) + 0xfe0 + (i * 4);
365 cellid |= (readl(addr) & 0xff) << (8 * i);
366 }
367 vendor = (cellid >> 12) & 0xff;
368 printk(KERN_INFO "VIC @%p: id 0x%08x, vendor 0x%02x\n",
369 base, cellid, vendor);
370
371 switch(vendor) {
372 case AMBA_VENDOR_ST:
373 vic_init_st(base, irq_start, vic_sources, node);
374 return;
375 default:
376 printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
377 /* fall through */
378 case AMBA_VENDOR_ARM:
379 break;
380 }
381
382 /* Disable all interrupts initially. */
383 vic_disable(base);
384
385 /* Make sure we clear all existing interrupts */
386 vic_clear_interrupts(base);
387
388 vic_init2(base);
389
390 vic_register(base, irq_start, vic_sources, resume_sources, node);
391}
392
393/**
394 * vic_init() - initialise a vectored interrupt controller
395 * @base: iomem base address
396 * @irq_start: starting interrupt number, must be muliple of 32
397 * @vic_sources: bitmask of interrupt sources to allow
398 * @resume_sources: bitmask of interrupt sources to allow for resume
399 */
400void __init vic_init(void __iomem *base, unsigned int irq_start,
401 u32 vic_sources, u32 resume_sources)
402{
403 __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
404}
405
406#ifdef CONFIG_OF
407int __init vic_of_init(struct device_node *node, struct device_node *parent)
408{
409 void __iomem *regs;
410
411 if (WARN(parent, "non-root VICs are not supported"))
412 return -EINVAL;
413
414 regs = of_iomap(node, 0);
415 if (WARN_ON(!regs))
416 return -EIO;
417
418 /*
419 * Passing -1 as first IRQ makes the simple domain allocate descriptors
420 */
421 __vic_init(regs, -1, ~0, ~0, node);
422
423 return 0;
424}
425#endif /* CONFIG OF */
426
427/*
428 * Handle each interrupt in a single VIC. Returns non-zero if we've
429 * handled at least one interrupt. This reads the status register
430 * before handling each interrupt, which is necessary given that
431 * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
432 */
433static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
434{
435 u32 stat, irq;
436 int handled = 0;
437
438 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
439 irq = ffs(stat) - 1;
440 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
441 handled = 1;
442 }
443
444 return handled;
445}
446
447/*
448 * Keep iterating over all registered VIC's until there are no pending
449 * interrupts.
450 */
451asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
452{
453 int i, handled;
454
455 do {
456 for (i = 0, handled = 0; i < vic_id; ++i)
457 handled |= handle_one_vic(&vic_devices[i], regs);
458 } while (handled);
459}
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index dbea6f4efe9f..2eeff1e64b6e 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -6,6 +6,7 @@ CONFIG_MACH_ARMADA_370=y
6CONFIG_MACH_ARMADA_XP=y 6CONFIG_MACH_ARMADA_XP=y
7CONFIG_ARCH_HIGHBANK=y 7CONFIG_ARCH_HIGHBANK=y
8CONFIG_ARCH_SOCFPGA=y 8CONFIG_ARCH_SOCFPGA=y
9CONFIG_ARCH_SUNXI=y
9# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set 10# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
10CONFIG_ARM_ERRATA_754322=y 11CONFIG_ARM_ERRATA_754322=y
11CONFIG_SMP=y 12CONFIG_SMP=y
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index a702fb345c01..b5bc96cb65a7 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -33,9 +33,7 @@ CONFIG_MVNETA=y
33CONFIG_MARVELL_PHY=y 33CONFIG_MARVELL_PHY=y
34CONFIG_SERIAL_8250=y 34CONFIG_SERIAL_8250=y
35CONFIG_SERIAL_8250_CONSOLE=y 35CONFIG_SERIAL_8250_CONSOLE=y
36CONFIG_SERIAL_OF_PLATFORM=y 36CONFIG_SERIAL_8250_DW=y
37CONFIG_I2C=y
38CONFIG_I2C_MV64XXX=y
39CONFIG_GPIOLIB=y 37CONFIG_GPIOLIB=y
40CONFIG_GPIO_SYSFS=y 38CONFIG_GPIO_SYSFS=y
41# CONFIG_USB_SUPPORT is not set 39# CONFIG_USB_SUPPORT is not set
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index a1dc5c071e71..82ce8d738fa1 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -65,6 +65,8 @@ CONFIG_MAC80211_RC_PID=y
65CONFIG_MAC80211_RC_DEFAULT_PID=y 65CONFIG_MAC80211_RC_DEFAULT_PID=y
66CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 66CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
67CONFIG_CONNECTOR=y 67CONFIG_CONNECTOR=y
68CONFIG_DEVTMPFS=y
69CONFIG_DEVTMPFS_MOUNT=y
68CONFIG_MTD=y 70CONFIG_MTD=y
69CONFIG_MTD_CMDLINE_PARTS=y 71CONFIG_MTD_CMDLINE_PARTS=y
70CONFIG_MTD_CHAR=y 72CONFIG_MTD_CHAR=y
@@ -132,9 +134,11 @@ CONFIG_POWER_SUPPLY=y
132CONFIG_WATCHDOG=y 134CONFIG_WATCHDOG=y
133CONFIG_OMAP_WATCHDOG=y 135CONFIG_OMAP_WATCHDOG=y
134CONFIG_TWL4030_WATCHDOG=y 136CONFIG_TWL4030_WATCHDOG=y
137CONFIG_MFD_TPS65217=y
135CONFIG_REGULATOR_TWL4030=y 138CONFIG_REGULATOR_TWL4030=y
136CONFIG_REGULATOR_TPS65023=y 139CONFIG_REGULATOR_TPS65023=y
137CONFIG_REGULATOR_TPS6507X=y 140CONFIG_REGULATOR_TPS6507X=y
141CONFIG_REGULATOR_TPS65217=y
138CONFIG_FB=y 142CONFIG_FB=y
139CONFIG_FIRMWARE_EDID=y 143CONFIG_FIRMWARE_EDID=y
140CONFIG_FB_MODE_HELPERS=y 144CONFIG_FB_MODE_HELPERS=y
@@ -170,6 +174,7 @@ CONFIG_SND_DEBUG=y
170CONFIG_SND_USB_AUDIO=m 174CONFIG_SND_USB_AUDIO=m
171CONFIG_SND_SOC=m 175CONFIG_SND_SOC=m
172CONFIG_SND_OMAP_SOC=m 176CONFIG_SND_OMAP_SOC=m
177CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
173CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m 178CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
174CONFIG_USB=y 179CONFIG_USB=y
175CONFIG_USB_DEBUG=y 180CONFIG_USB_DEBUG=y
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
deleted file mode 100644
index 4b1ce6cd477f..000000000000
--- a/arch/arm/include/asm/hardware/gic.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/gic.h
3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_HARDWARE_GIC_H
11#define __ASM_ARM_HARDWARE_GIC_H
12
13#include <linux/compiler.h>
14
15#define GIC_CPU_CTRL 0x00
16#define GIC_CPU_PRIMASK 0x04
17#define GIC_CPU_BINPOINT 0x08
18#define GIC_CPU_INTACK 0x0c
19#define GIC_CPU_EOI 0x10
20#define GIC_CPU_RUNNINGPRI 0x14
21#define GIC_CPU_HIGHPRI 0x18
22
23#define GIC_DIST_CTRL 0x000
24#define GIC_DIST_CTR 0x004
25#define GIC_DIST_ENABLE_SET 0x100
26#define GIC_DIST_ENABLE_CLEAR 0x180
27#define GIC_DIST_PENDING_SET 0x200
28#define GIC_DIST_PENDING_CLEAR 0x280
29#define GIC_DIST_ACTIVE_BIT 0x300
30#define GIC_DIST_PRI 0x400
31#define GIC_DIST_TARGET 0x800
32#define GIC_DIST_CONFIG 0xc00
33#define GIC_DIST_SOFTINT 0xf00
34
35#ifndef __ASSEMBLY__
36#include <linux/irqdomain.h>
37struct device_node;
38
39extern struct irq_chip gic_arch_extn;
40
41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset, struct device_node *);
43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs);
46void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
47void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
48
49static inline void gic_init(unsigned int nr, int start,
50 void __iomem *dist , void __iomem *cpu)
51{
52 gic_init_bases(nr, start, dist, cpu, 0, NULL);
53}
54
55#endif
56
57#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
deleted file mode 100644
index 2bebad36fc83..000000000000
--- a/arch/arm/include/asm/hardware/vic.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/vic.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_HARDWARE_VIC_H
21#define __ASM_ARM_HARDWARE_VIC_H
22
23#define VIC_IRQ_STATUS 0x00
24#define VIC_FIQ_STATUS 0x04
25#define VIC_RAW_STATUS 0x08
26#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
27#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
28#define VIC_INT_ENABLE_CLEAR 0x14
29#define VIC_INT_SOFT 0x18
30#define VIC_INT_SOFT_CLEAR 0x1c
31#define VIC_PROTECT 0x20
32#define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */
33#define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */
34
35#define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */
36#define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */
37#define VIC_ITCR 0x300 /* VIC test control register */
38
39#define VIC_VECT_CNTL_ENABLE (1 << 5)
40
41#define VIC_PL192_VECT_ADDR 0xF00
42
43#ifndef __ASSEMBLY__
44#include <linux/compiler.h>
45#include <linux/types.h>
46
47struct device_node;
48struct pt_regs;
49
50void __vic_init(void __iomem *base, int irq_start, u32 vic_sources,
51 u32 resume_sources, struct device_node *node);
52void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
53int vic_of_init(struct device_node *node, struct device_node *parent);
54void vic_handle_irq(struct pt_regs *regs);
55
56#endif /* __ASSEMBLY__ */
57#endif
diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h
index 15cb035309f7..18c883023339 100644
--- a/arch/arm/include/asm/mach/irq.h
+++ b/arch/arm/include/asm/mach/irq.h
@@ -22,6 +22,7 @@ extern int show_fiq_list(struct seq_file *, int);
22 22
23#ifdef CONFIG_MULTI_IRQ_HANDLER 23#ifdef CONFIG_MULTI_IRQ_HANDLER
24extern void (*handle_arch_irq)(struct pt_regs *); 24extern void (*handle_arch_irq)(struct pt_regs *);
25extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
25#endif 26#endif
26 27
27/* 28/*
diff --git a/arch/arm/mach-vt8500/include/mach/debug-macro.S b/arch/arm/include/debug/vt8500.S
index ca292f29d4a3..0e0ca0869da7 100644
--- a/arch/arm/mach-vt8500/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/vt8500.S
@@ -1,20 +1,24 @@
1/* 1/*
2 * arch/arm/mach-vt8500/include/mach/debug-macro.S 2 * Debugging macro include header
3 * 3 *
4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> 4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5 * 5 * Moved from arch/arm/mach-vt8500/include/mach/debug-macro.S
6 * Debugging macro include header 6 * Minor changes for readability.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 */
12*/ 12
13#define DEBUG_LL_PHYS_BASE 0xD8000000
14#define DEBUG_LL_VIRT_BASE 0xF8000000
15#define DEBUG_LL_UART_OFFSET 0x00200000
13 16
17#if defined(CONFIG_DEBUG_VT8500_UART0)
14 .macro addruart, rp, rv, tmp 18 .macro addruart, rp, rv, tmp
15 mov \rp, #0x00200000 19 mov \rp, #DEBUG_LL_UART_OFFSET
16 orr \rv, \rp, #0xf8000000 20 orr \rv, \rp, #DEBUG_LL_VIRT_BASE
17 orr \rp, \rp, #0xd8000000 21 orr \rp, \rp, #DEBUG_LL_PHYS_BASE
18 .endm 22 .endm
19 23
20 .macro senduart,rd,rx 24 .macro senduart,rd,rx
@@ -29,3 +33,5 @@
29 33
30 .macro waituart,rd,rx 34 .macro waituart,rd,rx
31 .endm 35 .endm
36
37#endif
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 9b722612553d..379cf3292390 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -78,7 +78,7 @@ void pcibios_report_status(u_int status_mask, int warn)
78 * Bug 3 is responsible for the sound DMA grinding to a halt. We now 78 * Bug 3 is responsible for the sound DMA grinding to a halt. We now
79 * live with bug 2. 79 * live with bug 2.
80 */ 80 */
81static void __devinit pci_fixup_83c553(struct pci_dev *dev) 81static void pci_fixup_83c553(struct pci_dev *dev)
82{ 82{
83 /* 83 /*
84 * Set memory region to start at address 0, and enable IO 84 * Set memory region to start at address 0, and enable IO
@@ -130,7 +130,7 @@ static void __devinit pci_fixup_83c553(struct pci_dev *dev)
130} 130}
131DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553); 131DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553);
132 132
133static void __devinit pci_fixup_unassign(struct pci_dev *dev) 133static void pci_fixup_unassign(struct pci_dev *dev)
134{ 134{
135 dev->resource[0].end -= dev->resource[0].start; 135 dev->resource[0].end -= dev->resource[0].start;
136 dev->resource[0].start = 0; 136 dev->resource[0].start = 0;
@@ -142,7 +142,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F,
142 * if it is the host bridge by marking it as such. These resources are of 142 * if it is the host bridge by marking it as such. These resources are of
143 * no consequence to the PCI layer (they are handled elsewhere). 143 * no consequence to the PCI layer (they are handled elsewhere).
144 */ 144 */
145static void __devinit pci_fixup_dec21285(struct pci_dev *dev) 145static void pci_fixup_dec21285(struct pci_dev *dev)
146{ 146{
147 int i; 147 int i;
148 148
@@ -161,7 +161,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_d
161/* 161/*
162 * PCI IDE controllers use non-standard I/O port decoding, respect it. 162 * PCI IDE controllers use non-standard I/O port decoding, respect it.
163 */ 163 */
164static void __devinit pci_fixup_ide_bases(struct pci_dev *dev) 164static void pci_fixup_ide_bases(struct pci_dev *dev)
165{ 165{
166 struct resource *r; 166 struct resource *r;
167 int i; 167 int i;
@@ -182,7 +182,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
182/* 182/*
183 * Put the DEC21142 to sleep 183 * Put the DEC21142 to sleep
184 */ 184 */
185static void __devinit pci_fixup_dec21142(struct pci_dev *dev) 185static void pci_fixup_dec21142(struct pci_dev *dev)
186{ 186{
187 pci_write_config_dword(dev, 0x40, 0x80000000); 187 pci_write_config_dword(dev, 0x40, 0x80000000);
188} 188}
@@ -204,7 +204,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_d
204 * functional. However, The CY82C693U _does not work_ in bus 204 * functional. However, The CY82C693U _does not work_ in bus
205 * master mode without locking the PCI bus solid. 205 * master mode without locking the PCI bus solid.
206 */ 206 */
207static void __devinit pci_fixup_cy82c693(struct pci_dev *dev) 207static void pci_fixup_cy82c693(struct pci_dev *dev)
208{ 208{
209 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) { 209 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
210 u32 base0, base1; 210 u32 base0, base1;
@@ -254,7 +254,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
254} 254}
255DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693); 255DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
256 256
257static void __devinit pci_fixup_it8152(struct pci_dev *dev) 257static void pci_fixup_it8152(struct pci_dev *dev)
258{ 258{
259 int i; 259 int i;
260 /* fixup for ITE 8152 devices */ 260 /* fixup for ITE 8152 devices */
@@ -361,9 +361,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
361 printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", 361 printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
362 bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); 362 bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
363} 363}
364#ifdef CONFIG_HOTPLUG
365EXPORT_SYMBOL(pcibios_fixup_bus); 364EXPORT_SYMBOL(pcibios_fixup_bus);
366#endif
367 365
368/* 366/*
369 * Swizzle the device pin each time we cross a bridge. If a platform does 367 * Swizzle the device pin each time we cross a bridge. If a platform does
@@ -380,7 +378,7 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
380 * PCI standard swizzle is implemented on plug-in cards and Cardbus based 378 * PCI standard swizzle is implemented on plug-in cards and Cardbus based
381 * PCI extenders, so it can not be ignored. 379 * PCI extenders, so it can not be ignored.
382 */ 380 */
383static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin) 381static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
384{ 382{
385 struct pci_sys_data *sys = dev->sysdata; 383 struct pci_sys_data *sys = dev->sysdata;
386 int slot, oldpin = *pin; 384 int slot, oldpin = *pin;
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 36d20bd50120..9b6de8c988f3 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -339,7 +339,7 @@ static struct miscdevice etb_miscdev = {
339 .fops = &etb_fops, 339 .fops = &etb_fops,
340}; 340};
341 341
342static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id) 342static int etb_probe(struct amba_device *dev, const struct amba_id *id)
343{ 343{
344 struct tracectx *t = &tracer; 344 struct tracectx *t = &tracer;
345 int ret = 0; 345 int ret = 0;
@@ -531,7 +531,7 @@ static ssize_t trace_mode_store(struct kobject *kobj,
531static struct kobj_attribute trace_mode_attr = 531static struct kobj_attribute trace_mode_attr =
532 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); 532 __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
533 533
534static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id) 534static int etm_probe(struct amba_device *dev, const struct amba_id *id)
535{ 535{
536 struct tracectx *t = &tracer; 536 struct tracectx *t = &tracer;
537 int ret = 0; 537 int ret = 0;
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 896165096d6a..8e4ef4c83a74 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -117,6 +117,16 @@ void __init init_IRQ(void)
117 machine_desc->init_irq(); 117 machine_desc->init_irq();
118} 118}
119 119
120#ifdef CONFIG_MULTI_IRQ_HANDLER
121void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
122{
123 if (handle_arch_irq)
124 return;
125
126 handle_arch_irq = handle_irq;
127}
128#endif
129
120#ifdef CONFIG_SPARSE_IRQ 130#ifdef CONFIG_SPARSE_IRQ
121int __init arch_probe_nr_irqs(void) 131int __init arch_probe_nr_irqs(void)
122{ 132{
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 9a4f6307a016..5f6620684e25 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -132,7 +132,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
132 return 0; 132 return 0;
133} 133}
134 134
135static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu) 135static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
136{ 136{
137 int cpu; 137 int cpu;
138 for_each_possible_cpu(cpu) { 138 for_each_possible_cpu(cpu) {
@@ -178,7 +178,7 @@ static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
178/* 178/*
179 * PMU platform driver and devicetree bindings. 179 * PMU platform driver and devicetree bindings.
180 */ 180 */
181static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = { 181static struct of_device_id cpu_pmu_of_device_ids[] = {
182 {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init}, 182 {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
183 {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init}, 183 {.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
184 {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init}, 184 {.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
@@ -190,7 +190,7 @@ static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
190 {}, 190 {},
191}; 191};
192 192
193static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = { 193static struct platform_device_id cpu_pmu_plat_device_ids[] = {
194 {.name = "arm-pmu"}, 194 {.name = "arm-pmu"},
195 {}, 195 {},
196}; 196};
@@ -198,7 +198,7 @@ static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
198/* 198/*
199 * CPU PMU identification and probing. 199 * CPU PMU identification and probing.
200 */ 200 */
201static int __devinit probe_current_pmu(struct arm_pmu *pmu) 201static int probe_current_pmu(struct arm_pmu *pmu)
202{ 202{
203 int cpu = get_cpu(); 203 int cpu = get_cpu();
204 unsigned long cpuid = read_cpuid_id(); 204 unsigned long cpuid = read_cpuid_id();
@@ -252,7 +252,7 @@ static int __devinit probe_current_pmu(struct arm_pmu *pmu)
252 return ret; 252 return ret;
253} 253}
254 254
255static int __devinit cpu_pmu_device_probe(struct platform_device *pdev) 255static int cpu_pmu_device_probe(struct platform_device *pdev)
256{ 256{
257 const struct of_device_id *of_id; 257 const struct of_device_id *of_id;
258 int (*init_fn)(struct arm_pmu *); 258 int (*init_fn)(struct arm_pmu *);
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index f3e22ff8b6a2..041d0526a288 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -653,7 +653,7 @@ static int armv6_map_event(struct perf_event *event)
653 &armv6_perf_cache_map, 0xFF); 653 &armv6_perf_cache_map, 0xFF);
654} 654}
655 655
656static int __devinit armv6pmu_init(struct arm_pmu *cpu_pmu) 656static int armv6pmu_init(struct arm_pmu *cpu_pmu)
657{ 657{
658 cpu_pmu->name = "v6"; 658 cpu_pmu->name = "v6";
659 cpu_pmu->handle_irq = armv6pmu_handle_irq; 659 cpu_pmu->handle_irq = armv6pmu_handle_irq;
@@ -685,7 +685,7 @@ static int armv6mpcore_map_event(struct perf_event *event)
685 &armv6mpcore_perf_cache_map, 0xFF); 685 &armv6mpcore_perf_cache_map, 0xFF);
686} 686}
687 687
688static int __devinit armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu) 688static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
689{ 689{
690 cpu_pmu->name = "v6mpcore"; 690 cpu_pmu->name = "v6mpcore";
691 cpu_pmu->handle_irq = armv6pmu_handle_irq; 691 cpu_pmu->handle_irq = armv6pmu_handle_irq;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 7d0cce85d17e..4fbc757d9cff 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -1226,7 +1226,7 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu)
1226 cpu_pmu->max_period = (1LLU << 32) - 1; 1226 cpu_pmu->max_period = (1LLU << 32) - 1;
1227}; 1227};
1228 1228
1229static u32 __devinit armv7_read_num_pmnc_events(void) 1229static u32 armv7_read_num_pmnc_events(void)
1230{ 1230{
1231 u32 nb_cnt; 1231 u32 nb_cnt;
1232 1232
@@ -1237,7 +1237,7 @@ static u32 __devinit armv7_read_num_pmnc_events(void)
1237 return nb_cnt + 1; 1237 return nb_cnt + 1;
1238} 1238}
1239 1239
1240static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) 1240static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
1241{ 1241{
1242 armv7pmu_init(cpu_pmu); 1242 armv7pmu_init(cpu_pmu);
1243 cpu_pmu->name = "ARMv7 Cortex-A8"; 1243 cpu_pmu->name = "ARMv7 Cortex-A8";
@@ -1246,7 +1246,7 @@ static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
1246 return 0; 1246 return 0;
1247} 1247}
1248 1248
1249static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) 1249static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
1250{ 1250{
1251 armv7pmu_init(cpu_pmu); 1251 armv7pmu_init(cpu_pmu);
1252 cpu_pmu->name = "ARMv7 Cortex-A9"; 1252 cpu_pmu->name = "ARMv7 Cortex-A9";
@@ -1255,7 +1255,7 @@ static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
1255 return 0; 1255 return 0;
1256} 1256}
1257 1257
1258static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) 1258static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
1259{ 1259{
1260 armv7pmu_init(cpu_pmu); 1260 armv7pmu_init(cpu_pmu);
1261 cpu_pmu->name = "ARMv7 Cortex-A5"; 1261 cpu_pmu->name = "ARMv7 Cortex-A5";
@@ -1264,7 +1264,7 @@ static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
1264 return 0; 1264 return 0;
1265} 1265}
1266 1266
1267static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) 1267static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
1268{ 1268{
1269 armv7pmu_init(cpu_pmu); 1269 armv7pmu_init(cpu_pmu);
1270 cpu_pmu->name = "ARMv7 Cortex-A15"; 1270 cpu_pmu->name = "ARMv7 Cortex-A15";
@@ -1274,7 +1274,7 @@ static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
1274 return 0; 1274 return 0;
1275} 1275}
1276 1276
1277static int __devinit armv7_a7_pmu_init(struct arm_pmu *cpu_pmu) 1277static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
1278{ 1278{
1279 armv7pmu_init(cpu_pmu); 1279 armv7pmu_init(cpu_pmu);
1280 cpu_pmu->name = "ARMv7 Cortex-A7"; 1280 cpu_pmu->name = "ARMv7 Cortex-A7";
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 0c8265e53d5f..2b0fe30ec12e 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -440,7 +440,7 @@ static int xscale_map_event(struct perf_event *event)
440 &xscale_perf_cache_map, 0xFF); 440 &xscale_perf_cache_map, 0xFF);
441} 441}
442 442
443static int __devinit xscale1pmu_init(struct arm_pmu *cpu_pmu) 443static int xscale1pmu_init(struct arm_pmu *cpu_pmu)
444{ 444{
445 cpu_pmu->name = "xscale1"; 445 cpu_pmu->name = "xscale1";
446 cpu_pmu->handle_irq = xscale1pmu_handle_irq; 446 cpu_pmu->handle_irq = xscale1pmu_handle_irq;
@@ -810,7 +810,7 @@ static inline void xscale2pmu_write_counter(struct perf_event *event, u32 val)
810 } 810 }
811} 811}
812 812
813static int __devinit xscale2pmu_init(struct arm_pmu *cpu_pmu) 813static int xscale2pmu_init(struct arm_pmu *cpu_pmu)
814{ 814{
815 cpu_pmu->name = "xscale2"; 815 cpu_pmu->name = "xscale2";
816 cpu_pmu->handle_irq = xscale2pmu_handle_irq; 816 cpu_pmu->handle_irq = xscale2pmu_handle_irq;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 84f4cbf652e5..3fc96db2a4b6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -416,7 +416,8 @@ static void (*smp_cross_call)(const struct cpumask *, unsigned int);
416 416
417void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) 417void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
418{ 418{
419 smp_cross_call = fn; 419 if (!smp_cross_call)
420 smp_cross_call = fn;
420} 421}
421 422
422void arch_send_call_function_ipi_mask(const struct cpumask *mask) 423void arch_send_call_function_ipi_mask(const struct cpumask *mask)
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 49f335d301ba..dc9bb0146665 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -24,7 +24,6 @@
24 24
25#include <asm/smp_twd.h> 25#include <asm/smp_twd.h>
26#include <asm/localtimer.h> 26#include <asm/localtimer.h>
27#include <asm/hardware/gic.h>
28 27
29/* set up by the platform code */ 28/* set up by the platform code */
30static void __iomem *twd_base; 29static void __iomem *twd_base;
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 180b3024bec3..2acdff4c1dfe 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
174static struct clock_event_device clkevt = { 174static struct clock_event_device clkevt = {
175 .name = "at91_tick", 175 .name = "at91_tick",
176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 176 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
177 .shift = 32,
178 .rating = 150, 177 .rating = 150,
179 .set_next_event = clkevt32k_next_event, 178 .set_next_event = clkevt32k_next_event,
180 .set_mode = clkevt32k_mode, 179 .set_mode = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
265 at91_st_write(AT91_ST_RTMR, 1); 264 at91_st_write(AT91_ST_RTMR, 1);
266 265
267 /* Setup timer clockevent, with minimum of two ticks (important!!) */ 266 /* Setup timer clockevent, with minimum of two ticks (important!!) */
268 clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
269 clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
270 clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
271 clkevt.cpumask = cpumask_of(0); 267 clkevt.cpumask = cpumask_of(0);
272 clockevents_register_device(&clkevt); 268 clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
269 2, AT91_ST_ALMV);
273 270
274 /* register clocksource */ 271 /* register clocksource */
275 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); 272 clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c
index 3df68030cf68..f0f9abafad29 100644
--- a/arch/arm/mach-bcm/board_bcm.c
+++ b/arch/arm/mach-bcm/board_bcm.c
@@ -11,30 +11,19 @@
11 * GNU General Public License for more details. 11 * GNU General Public License for more details.
12 */ 12 */
13 13
14#include <linux/of_irq.h>
15#include <linux/of_platform.h> 14#include <linux/of_platform.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/device.h> 16#include <linux/device.h>
18#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/irqchip.h>
19 19
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/hardware/gic.h>
22
23#include <asm/mach/time.h> 21#include <asm/mach/time.h>
24 22
25static const struct of_device_id irq_match[] = {
26 {.compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
27 {}
28};
29
30static void timer_init(void) 23static void timer_init(void)
31{ 24{
32} 25}
33 26
34static void __init init_irq(void)
35{
36 of_irq_init(irq_match);
37}
38 27
39static void __init board_init(void) 28static void __init board_init(void)
40{ 29{
@@ -45,9 +34,8 @@ static void __init board_init(void)
45static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, }; 34static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
46 35
47DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor") 36DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
48 .init_irq = init_irq, 37 .init_irq = irqchip_init,
49 .init_time = timer_init, 38 .init_time = timer_init,
50 .init_machine = board_init, 39 .init_machine = board_init,
51 .dt_compat = bcm11351_dt_compat, 40 .dt_compat = bcm11351_dt_compat,
52 .handle_irq = gic_handle_irq,
53MACHINE_END 41MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 3c86f910b647..a71867e1d8d6 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -28,7 +28,6 @@
28#include <linux/usb/ohci_pdriver.h> 28#include <linux/usb/ohci_pdriver.h>
29#include <asm/setup.h> 29#include <asm/setup.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/hardware/gic.h>
32#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
33#include <asm/mach/map.h> 32#include <asm/mach/map.h>
34#include <asm/mach/time.h> 33#include <asm/mach/time.h>
@@ -251,7 +250,6 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
251 .map_io = cns3420_map_io, 250 .map_io = cns3420_map_io,
252 .init_irq = cns3xxx_init_irq, 251 .init_irq = cns3xxx_init_irq,
253 .init_time = cns3xxx_timer_init, 252 .init_time = cns3xxx_timer_init,
254 .handle_irq = gic_handle_irq,
255 .init_machine = cns3420_init, 253 .init_machine = cns3420_init,
256 .restart = cns3xxx_restart, 254 .restart = cns3xxx_restart,
257MACHINE_END 255MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 1754f8f4f34c..e698f26cc0cb 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -12,10 +12,10 @@
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/clockchips.h> 13#include <linux/clockchips.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/irqchip/arm-gic.h>
15#include <asm/mach/map.h> 16#include <asm/mach/map.h>
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
17#include <asm/mach/irq.h> 18#include <asm/mach/irq.h>
18#include <asm/hardware/gic.h>
19#include <asm/hardware/cache-l2x0.h> 19#include <asm/hardware/cache-l2x0.h>
20#include <mach/cns3xxx.h> 20#include <mach/cns3xxx.h>
21#include "core.h" 21#include "core.h"
@@ -134,7 +134,6 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,
134 134
135static struct clock_event_device cns3xxx_tmr1_clockevent = { 135static struct clock_event_device cns3xxx_tmr1_clockevent = {
136 .name = "cns3xxx timer1", 136 .name = "cns3xxx timer1",
137 .shift = 8,
138 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 137 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
139 .set_mode = cns3xxx_timer_set_mode, 138 .set_mode = cns3xxx_timer_set_mode,
140 .set_next_event = cns3xxx_timer_set_next_event, 139 .set_next_event = cns3xxx_timer_set_next_event,
@@ -145,15 +144,9 @@ static struct clock_event_device cns3xxx_tmr1_clockevent = {
145static void __init cns3xxx_clockevents_init(unsigned int timer_irq) 144static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
146{ 145{
147 cns3xxx_tmr1_clockevent.irq = timer_irq; 146 cns3xxx_tmr1_clockevent.irq = timer_irq;
148 cns3xxx_tmr1_clockevent.mult = 147 clockevents_config_and_register(&cns3xxx_tmr1_clockevent,
149 div_sc((cns3xxx_cpu_clock() >> 3) * 1000000, NSEC_PER_SEC, 148 (cns3xxx_cpu_clock() >> 3) * 1000000,
150 cns3xxx_tmr1_clockevent.shift); 149 0xf, 0xffffffff);
151 cns3xxx_tmr1_clockevent.max_delta_ns =
152 clockevent_delta2ns(0xffffffff, &cns3xxx_tmr1_clockevent);
153 cns3xxx_tmr1_clockevent.min_delta_ns =
154 clockevent_delta2ns(0xf, &cns3xxx_tmr1_clockevent);
155
156 clockevents_register_device(&cns3xxx_tmr1_clockevent);
157} 150}
158 151
159/* 152/*
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index a9f2054c3e9b..de7adff324dc 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -358,7 +358,7 @@ static int cpld_video_probe(struct i2c_client *client,
358 return 0; 358 return 0;
359} 359}
360 360
361static int __devexit cpld_video_remove(struct i2c_client *client) 361static int cpld_video_remove(struct i2c_client *client)
362{ 362{
363 cpld_client = NULL; 363 cpld_client = NULL;
364 return 0; 364 return 0;
diff --git a/arch/arm/mach-davinci/cdce949.c b/arch/arm/mach-davinci/cdce949.c
index f2232ca6d070..abafb92031c0 100644
--- a/arch/arm/mach-davinci/cdce949.c
+++ b/arch/arm/mach-davinci/cdce949.c
@@ -256,7 +256,7 @@ static int cdce_probe(struct i2c_client *client,
256 return 0; 256 return 0;
257} 257}
258 258
259static int __devexit cdce_remove(struct i2c_client *client) 259static int cdce_remove(struct i2c_client *client)
260{ 260{
261 cdce_i2c_client = NULL; 261 cdce_i2c_client = NULL;
262 return 0; 262 return 0;
@@ -274,7 +274,7 @@ static struct i2c_driver cdce_driver = {
274 .name = "cdce949", 274 .name = "cdce949",
275 }, 275 },
276 .probe = cdce_probe, 276 .probe = cdce_probe,
277 .remove = __devexit_p(cdce_remove), 277 .remove = cdce_remove,
278 .id_table = cdce_id, 278 .id_table = cdce_id,
279}; 279};
280 280
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 0ef4435b1657..8a275f297522 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -135,7 +135,7 @@ static struct pci_ops pcie_ops = {
135 .write = pcie_wr_conf, 135 .write = pcie_wr_conf,
136}; 136};
137 137
138static void __devinit rc_pci_fixup(struct pci_dev *dev) 138static void rc_pci_fixup(struct pci_dev *dev)
139{ 139{
140 /* 140 /*
141 * Prevent enumeration of root complex. 141 * Prevent enumeration of root complex.
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 82d9c788535a..bda6c3a5c923 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -17,7 +17,6 @@
17 17
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -39,7 +38,6 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
39 .atag_offset = 0x100, 38 .atag_offset = 0x100,
40 .map_io = ep93xx_map_io, 39 .map_io = ep93xx_map_io,
41 .init_irq = ep93xx_init_irq, 40 .init_irq = ep93xx_init_irq,
42 .handle_irq = vic_handle_irq,
43 .init_time = ep93xx_timer_init, 41 .init_time = ep93xx_timer_init,
44 .init_machine = adssphere_init_machine, 42 .init_machine = adssphere_init_machine,
45 .init_late = ep93xx_init_late, 43 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index ee27b4b0ab07..c49ed3dc1aea 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -34,6 +34,7 @@
34#include <linux/i2c-gpio.h> 34#include <linux/i2c-gpio.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/export.h> 36#include <linux/export.h>
37#include <linux/irqchip/arm-vic.h>
37 38
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39#include <linux/platform_data/video-ep93xx.h> 40#include <linux/platform_data/video-ep93xx.h>
@@ -44,8 +45,6 @@
44#include <asm/mach/map.h> 45#include <asm/mach/map.h>
45#include <asm/mach/time.h> 46#include <asm/mach/time.h>
46 47
47#include <asm/hardware/vic.h>
48
49#include "soc.h" 48#include "soc.h"
50 49
51/************************************************************************* 50/*************************************************************************
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index ac260519c9e9..27b14ae92c7e 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,7 +39,6 @@
39#include <linux/platform_data/spi-ep93xx.h> 39#include <linux/platform_data/spi-ep93xx.h>
40#include <mach/gpio-ep93xx.h> 40#include <mach/gpio-ep93xx.h>
41 41
42#include <asm/hardware/vic.h>
43#include <asm/mach-types.h> 42#include <asm/mach-types.h>
44#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
45 44
@@ -276,7 +275,6 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
276 .atag_offset = 0x100, 275 .atag_offset = 0x100,
277 .map_io = ep93xx_map_io, 276 .map_io = ep93xx_map_io,
278 .init_irq = ep93xx_init_irq, 277 .init_irq = ep93xx_init_irq,
279 .handle_irq = vic_handle_irq,
280 .init_time = ep93xx_timer_init, 278 .init_time = ep93xx_timer_init,
281 .init_machine = edb93xx_init_machine, 279 .init_machine = edb93xx_init_machine,
282 .init_late = ep93xx_init_late, 280 .init_late = ep93xx_init_late,
@@ -290,7 +288,6 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
290 .atag_offset = 0x100, 288 .atag_offset = 0x100,
291 .map_io = ep93xx_map_io, 289 .map_io = ep93xx_map_io,
292 .init_irq = ep93xx_init_irq, 290 .init_irq = ep93xx_init_irq,
293 .handle_irq = vic_handle_irq,
294 .init_time = ep93xx_timer_init, 291 .init_time = ep93xx_timer_init,
295 .init_machine = edb93xx_init_machine, 292 .init_machine = edb93xx_init_machine,
296 .init_late = ep93xx_init_late, 293 .init_late = ep93xx_init_late,
@@ -304,7 +301,6 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
304 .atag_offset = 0x100, 301 .atag_offset = 0x100,
305 .map_io = ep93xx_map_io, 302 .map_io = ep93xx_map_io,
306 .init_irq = ep93xx_init_irq, 303 .init_irq = ep93xx_init_irq,
307 .handle_irq = vic_handle_irq,
308 .init_time = ep93xx_timer_init, 304 .init_time = ep93xx_timer_init,
309 .init_machine = edb93xx_init_machine, 305 .init_machine = edb93xx_init_machine,
310 .init_late = ep93xx_init_late, 306 .init_late = ep93xx_init_late,
@@ -318,7 +314,6 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
318 .atag_offset = 0x100, 314 .atag_offset = 0x100,
319 .map_io = ep93xx_map_io, 315 .map_io = ep93xx_map_io,
320 .init_irq = ep93xx_init_irq, 316 .init_irq = ep93xx_init_irq,
321 .handle_irq = vic_handle_irq,
322 .init_time = ep93xx_timer_init, 317 .init_time = ep93xx_timer_init,
323 .init_machine = edb93xx_init_machine, 318 .init_machine = edb93xx_init_machine,
324 .init_late = ep93xx_init_late, 319 .init_late = ep93xx_init_late,
@@ -332,7 +327,6 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
332 .atag_offset = 0x100, 327 .atag_offset = 0x100,
333 .map_io = ep93xx_map_io, 328 .map_io = ep93xx_map_io,
334 .init_irq = ep93xx_init_irq, 329 .init_irq = ep93xx_init_irq,
335 .handle_irq = vic_handle_irq,
336 .init_time = ep93xx_timer_init, 330 .init_time = ep93xx_timer_init,
337 .init_machine = edb93xx_init_machine, 331 .init_machine = edb93xx_init_machine,
338 .init_late = ep93xx_init_late, 332 .init_late = ep93xx_init_late,
@@ -346,7 +340,6 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
346 .atag_offset = 0x100, 340 .atag_offset = 0x100,
347 .map_io = ep93xx_map_io, 341 .map_io = ep93xx_map_io,
348 .init_irq = ep93xx_init_irq, 342 .init_irq = ep93xx_init_irq,
349 .handle_irq = vic_handle_irq,
350 .init_time = ep93xx_timer_init, 343 .init_time = ep93xx_timer_init,
351 .init_machine = edb93xx_init_machine, 344 .init_machine = edb93xx_init_machine,
352 .init_late = ep93xx_init_late, 345 .init_late = ep93xx_init_late,
@@ -360,7 +353,6 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
360 .atag_offset = 0x100, 353 .atag_offset = 0x100,
361 .map_io = ep93xx_map_io, 354 .map_io = ep93xx_map_io,
362 .init_irq = ep93xx_init_irq, 355 .init_irq = ep93xx_init_irq,
363 .handle_irq = vic_handle_irq,
364 .init_time = ep93xx_timer_init, 356 .init_time = ep93xx_timer_init,
365 .init_machine = edb93xx_init_machine, 357 .init_machine = edb93xx_init_machine,
366 .init_late = ep93xx_init_late, 358 .init_late = ep93xx_init_late,
@@ -374,7 +366,6 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
374 .atag_offset = 0x100, 366 .atag_offset = 0x100,
375 .map_io = ep93xx_map_io, 367 .map_io = ep93xx_map_io,
376 .init_irq = ep93xx_init_irq, 368 .init_irq = ep93xx_init_irq,
377 .handle_irq = vic_handle_irq,
378 .init_time = ep93xx_timer_init, 369 .init_time = ep93xx_timer_init,
379 .init_machine = edb93xx_init_machine, 370 .init_machine = edb93xx_init_machine,
380 .init_late = ep93xx_init_late, 371 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 76c50f42bd71..0cca5b183309 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -17,7 +17,6 @@
17 17
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -39,7 +38,6 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
39 .atag_offset = 0x100, 38 .atag_offset = 0x100,
40 .map_io = ep93xx_map_io, 39 .map_io = ep93xx_map_io,
41 .init_irq = ep93xx_init_irq, 40 .init_irq = ep93xx_init_irq,
42 .handle_irq = vic_handle_irq,
43 .init_time = ep93xx_timer_init, 41 .init_time = ep93xx_timer_init,
44 .init_machine = gesbc9312_init_machine, 42 .init_machine = gesbc9312_init_machine,
45 .init_late = ep93xx_init_late, 43 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 777cd2170f8a..373583c29825 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,7 +18,6 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20 20
21#include <asm/hardware/vic.h>
22#include <asm/mach-types.h> 21#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
24 23
@@ -82,7 +81,6 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
82 .atag_offset = 0x100, 81 .atag_offset = 0x100,
83 .map_io = ep93xx_map_io, 82 .map_io = ep93xx_map_io,
84 .init_irq = ep93xx_init_irq, 83 .init_irq = ep93xx_init_irq,
85 .handle_irq = vic_handle_irq,
86 .init_time = ep93xx_timer_init, 84 .init_time = ep93xx_timer_init,
87 .init_machine = micro9_init_machine, 85 .init_machine = micro9_init_machine,
88 .init_late = ep93xx_init_late, 86 .init_late = ep93xx_init_late,
@@ -96,7 +94,6 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
96 .atag_offset = 0x100, 94 .atag_offset = 0x100,
97 .map_io = ep93xx_map_io, 95 .map_io = ep93xx_map_io,
98 .init_irq = ep93xx_init_irq, 96 .init_irq = ep93xx_init_irq,
99 .handle_irq = vic_handle_irq,
100 .init_time = ep93xx_timer_init, 97 .init_time = ep93xx_timer_init,
101 .init_machine = micro9_init_machine, 98 .init_machine = micro9_init_machine,
102 .init_late = ep93xx_init_late, 99 .init_late = ep93xx_init_late,
@@ -110,7 +107,6 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
110 .atag_offset = 0x100, 107 .atag_offset = 0x100,
111 .map_io = ep93xx_map_io, 108 .map_io = ep93xx_map_io,
112 .init_irq = ep93xx_init_irq, 109 .init_irq = ep93xx_init_irq,
113 .handle_irq = vic_handle_irq,
114 .init_time = ep93xx_timer_init, 110 .init_time = ep93xx_timer_init,
115 .init_machine = micro9_init_machine, 111 .init_machine = micro9_init_machine,
116 .init_late = ep93xx_init_late, 112 .init_late = ep93xx_init_late,
@@ -124,7 +120,6 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
124 .atag_offset = 0x100, 120 .atag_offset = 0x100,
125 .map_io = ep93xx_map_io, 121 .map_io = ep93xx_map_io,
126 .init_irq = ep93xx_init_irq, 122 .init_irq = ep93xx_init_irq,
127 .handle_irq = vic_handle_irq,
128 .init_time = ep93xx_timer_init, 123 .init_time = ep93xx_timer_init,
129 .init_machine = micro9_init_machine, 124 .init_machine = micro9_init_machine,
130 .init_late = ep93xx_init_late, 125 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 6ff39ee2ad5d..36f22c1a31fe 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,7 +25,6 @@
25#include <linux/platform_data/video-ep93xx.h> 25#include <linux/platform_data/video-ep93xx.h>
26#include <mach/gpio-ep93xx.h> 26#include <mach/gpio-ep93xx.h>
27 27
28#include <asm/hardware/vic.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31 30
@@ -83,7 +82,6 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
83 .atag_offset = 0x100, 82 .atag_offset = 0x100,
84 .map_io = ep93xx_map_io, 83 .map_io = ep93xx_map_io,
85 .init_irq = ep93xx_init_irq, 84 .init_irq = ep93xx_init_irq,
86 .handle_irq = vic_handle_irq,
87 .init_time = ep93xx_timer_init, 85 .init_time = ep93xx_timer_init,
88 .init_machine = simone_init_machine, 86 .init_machine = simone_init_machine,
89 .init_late = ep93xx_init_late, 87 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 6434c07dbf96..aa86f86638dd 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,7 +31,6 @@
31#include <linux/platform_data/video-ep93xx.h> 31#include <linux/platform_data/video-ep93xx.h>
32#include <mach/gpio-ep93xx.h> 32#include <mach/gpio-ep93xx.h>
33 33
34#include <asm/hardware/vic.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
36#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
37 36
@@ -176,7 +175,6 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
176 .atag_offset = 0x100, 175 .atag_offset = 0x100,
177 .map_io = ep93xx_map_io, 176 .map_io = ep93xx_map_io,
178 .init_irq = ep93xx_init_irq, 177 .init_irq = ep93xx_init_irq,
179 .handle_irq = vic_handle_irq,
180 .init_time = ep93xx_timer_init, 178 .init_time = ep93xx_timer_init,
181 .init_machine = snappercl15_init_machine, 179 .init_machine = snappercl15_init_machine,
182 .init_late = ep93xx_init_late, 180 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index e4fa0d3760a5..61f4b5dc4d7d 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -22,7 +22,6 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
25#include <asm/hardware/vic.h>
26#include <asm/mach-types.h> 25#include <asm/mach-types.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
@@ -246,7 +245,6 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
246 .atag_offset = 0x100, 245 .atag_offset = 0x100,
247 .map_io = ts72xx_map_io, 246 .map_io = ts72xx_map_io,
248 .init_irq = ep93xx_init_irq, 247 .init_irq = ep93xx_init_irq,
249 .handle_irq = vic_handle_irq,
250 .init_time = ep93xx_timer_init, 248 .init_time = ep93xx_timer_init,
251 .init_machine = ts72xx_init_machine, 249 .init_machine = ts72xx_init_machine,
252 .init_late = ep93xx_init_late, 250 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index 8610ba293991..605956fd07a2 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -34,7 +34,6 @@
34#include <linux/platform_data/spi-ep93xx.h> 34#include <linux/platform_data/spi-ep93xx.h>
35#include <mach/gpio-ep93xx.h> 35#include <mach/gpio-ep93xx.h>
36 36
37#include <asm/hardware/vic.h>
38#include <asm/mach-types.h> 37#include <asm/mach-types.h>
39#include <asm/mach/map.h> 38#include <asm/mach/map.h>
40#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
@@ -364,7 +363,6 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
364 .atag_offset = 0x100, 363 .atag_offset = 0x100,
365 .map_io = vision_map_io, 364 .map_io = vision_map_io,
366 .init_irq = ep93xx_init_irq, 365 .init_irq = ep93xx_init_irq,
367 .handle_irq = vic_handle_irq,
368 .init_time = ep93xx_timer_init, 366 .init_time = ep93xx_timer_init,
369 .init_machine = vision_init_machine, 367 .init_machine = vision_init_machine,
370 .init_late = ep93xx_init_late, 368 .init_late = ep93xx_init_late,
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 91d5b6f1d5af..e103c290bc9e 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -74,6 +74,8 @@ config SOC_EXYNOS5440
74 depends on ARCH_EXYNOS5 74 depends on ARCH_EXYNOS5
75 select ARM_ARCH_TIMER 75 select ARM_ARCH_TIMER
76 select AUTO_ZRELADDR 76 select AUTO_ZRELADDR
77 select PINCTRL
78 select PINCTRL_EXYNOS5440
77 help 79 help
78 Enable EXYNOS5440 SoC support 80 Enable EXYNOS5440 SoC support
79 81
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index d6d0dc651089..4ea80bc4ef9b 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -22,12 +22,13 @@
22#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/irqdomain.h> 24#include <linux/irqdomain.h>
25#include <linux/irqchip.h>
25#include <linux/of_address.h> 26#include <linux/of_address.h>
27#include <linux/irqchip/arm-gic.h>
26 28
27#include <asm/proc-fns.h> 29#include <asm/proc-fns.h>
28#include <asm/exception.h> 30#include <asm/exception.h>
29#include <asm/hardware/cache-l2x0.h> 31#include <asm/hardware/cache-l2x0.h>
30#include <asm/hardware/gic.h>
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
33#include <asm/cacheflush.h> 34#include <asm/cacheflush.h>
@@ -424,11 +425,18 @@ static void __init exynos5_init_clocks(int xtal)
424{ 425{
425 printk(KERN_DEBUG "%s: initializing clocks\n", __func__); 426 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
426 427
428 /* EXYNOS5440 can support only common clock framework */
429
430 if (soc_is_exynos5440())
431 return;
432
433#ifdef CONFIG_SOC_EXYNOS5250
427 s3c24xx_register_baseclocks(xtal); 434 s3c24xx_register_baseclocks(xtal);
428 s5p_register_clocks(xtal); 435 s5p_register_clocks(xtal);
429 436
430 exynos5_register_clocks(); 437 exynos5_register_clocks();
431 exynos5_setup_clocks(); 438 exynos5_setup_clocks();
439#endif
432} 440}
433 441
434#define COMBINER_ENABLE_SET 0x0 442#define COMBINER_ENABLE_SET 0x0
@@ -637,8 +645,6 @@ static int __init combiner_of_init(struct device_node *np,
637} 645}
638 646
639static const struct of_device_id exynos_dt_irq_match[] = { 647static const struct of_device_id exynos_dt_irq_match[] = {
640 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
641 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
642 { .compatible = "samsung,exynos4210-combiner", 648 { .compatible = "samsung,exynos4210-combiner",
643 .data = combiner_of_init, }, 649 .data = combiner_of_init, },
644 {}, 650 {},
@@ -654,8 +660,10 @@ void __init exynos4_init_irq(void)
654 if (!of_have_populated_dt()) 660 if (!of_have_populated_dt())
655 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); 661 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
656#ifdef CONFIG_OF 662#ifdef CONFIG_OF
657 else 663 else {
664 irqchip_init();
658 of_irq_init(exynos_dt_irq_match); 665 of_irq_init(exynos_dt_irq_match);
666 }
659#endif 667#endif
660 668
661 if (!of_have_populated_dt()) 669 if (!of_have_populated_dt())
@@ -672,6 +680,7 @@ void __init exynos4_init_irq(void)
672void __init exynos5_init_irq(void) 680void __init exynos5_init_irq(void)
673{ 681{
674#ifdef CONFIG_OF 682#ifdef CONFIG_OF
683 irqchip_init();
675 of_irq_init(exynos_dt_irq_match); 684 of_irq_init(exynos_dt_irq_match);
676#endif 685#endif
677 /* 686 /*
diff --git a/arch/arm/mach-exynos/include/mach/regs-irq.h b/arch/arm/mach-exynos/include/mach/regs-irq.h
index 9c7b4bfd546f..f2b50506b9f6 100644
--- a/arch/arm/mach-exynos/include/mach/regs-irq.h
+++ b/arch/arm/mach-exynos/include/mach/regs-irq.h
@@ -13,7 +13,7 @@
13#ifndef __ASM_ARCH_REGS_IRQ_H 13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <asm/hardware/gic.h> 16#include <linux/irqchip/arm-gic.h>
17#include <mach/map.h> 17#include <mach/map.h>
18 18
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index 2f18130d0d10..685f29173afa 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,7 +16,6 @@
16#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20#include <asm/mach-types.h> 19#include <asm/mach-types.h>
21 20
22#include <plat/cpu.h> 21#include <plat/cpu.h>
@@ -201,7 +200,6 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
201 .smp = smp_ops(exynos_smp_ops), 200 .smp = smp_ops(exynos_smp_ops),
202 .init_irq = exynos4_init_irq, 201 .init_irq = exynos4_init_irq,
203 .map_io = armlex4210_map_io, 202 .map_io = armlex4210_map_io,
204 .handle_irq = gic_handle_irq,
205 .init_machine = armlex4210_machine_init, 203 .init_machine = armlex4210_machine_init,
206 .init_late = exynos_init_late, 204 .init_late = exynos_init_late,
207 .init_time = exynos4_timer_init, 205 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index 160030168b19..112d10e53d20 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -15,7 +15,6 @@
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18#include <asm/hardware/gic.h>
19#include <mach/map.h> 18#include <mach/map.h>
20 19
21#include <plat/cpu.h> 20#include <plat/cpu.h>
@@ -107,7 +106,6 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
107 .smp = smp_ops(exynos_smp_ops), 106 .smp = smp_ops(exynos_smp_ops),
108 .init_irq = exynos4_init_irq, 107 .init_irq = exynos4_init_irq,
109 .map_io = exynos4_dt_map_io, 108 .map_io = exynos4_dt_map_io,
110 .handle_irq = gic_handle_irq,
111 .init_machine = exynos4_dt_machine_init, 109 .init_machine = exynos4_dt_machine_init,
112 .init_late = exynos_init_late, 110 .init_late = exynos_init_late,
113 .init_time = exynos4_timer_init, 111 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 4e074c67cc8b..0deeecffa3ae 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -16,7 +16,6 @@
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20#include <mach/map.h> 19#include <mach/map.h>
21#include <mach/regs-pmu.h> 20#include <mach/regs-pmu.h>
22 21
@@ -179,7 +178,6 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
179 .init_irq = exynos5_init_irq, 178 .init_irq = exynos5_init_irq,
180 .smp = smp_ops(exynos_smp_ops), 179 .smp = smp_ops(exynos_smp_ops),
181 .map_io = exynos5_dt_map_io, 180 .map_io = exynos5_dt_map_io,
182 .handle_irq = gic_handle_irq,
183 .init_machine = exynos5_dt_machine_init, 181 .init_machine = exynos5_dt_machine_init,
184 .init_late = exynos_init_late, 182 .init_late = exynos_init_late,
185 .init_time = exynos4_timer_init, 183 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index dccd1d16b836..b8b3fbf0bae7 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -39,7 +39,6 @@
39#include <media/v4l2-mediabus.h> 39#include <media/v4l2-mediabus.h>
40 40
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/hardware/gic.h>
43#include <asm/mach-types.h> 42#include <asm/mach-types.h>
44 43
45#include <plat/adc.h> 44#include <plat/adc.h>
@@ -1379,7 +1378,6 @@ MACHINE_START(NURI, "NURI")
1379 .smp = smp_ops(exynos_smp_ops), 1378 .smp = smp_ops(exynos_smp_ops),
1380 .init_irq = exynos4_init_irq, 1379 .init_irq = exynos4_init_irq,
1381 .map_io = nuri_map_io, 1380 .map_io = nuri_map_io,
1382 .handle_irq = gic_handle_irq,
1383 .init_machine = nuri_machine_init, 1381 .init_machine = nuri_machine_init,
1384 .init_late = exynos_init_late, 1382 .init_late = exynos_init_late,
1385 .init_time = exynos4_timer_init, 1383 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 4e1156324562..579d2d171daa 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -29,7 +29,6 @@
29#include <linux/platform_data/usb-exynos.h> 29#include <linux/platform_data/usb-exynos.h>
30 30
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34 33
35#include <video/platform_lcd.h> 34#include <video/platform_lcd.h>
@@ -814,7 +813,6 @@ MACHINE_START(ORIGEN, "ORIGEN")
814 .smp = smp_ops(exynos_smp_ops), 813 .smp = smp_ops(exynos_smp_ops),
815 .init_irq = exynos4_init_irq, 814 .init_irq = exynos4_init_irq,
816 .map_io = origen_map_io, 815 .map_io = origen_map_io,
817 .handle_irq = gic_handle_irq,
818 .init_machine = origen_machine_init, 816 .init_machine = origen_machine_init,
819 .init_late = exynos_init_late, 817 .init_late = exynos_init_late,
820 .init_time = exynos4_timer_init, 818 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index e9c9c2995f09..fe6149624b84 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -25,7 +25,6 @@
25#include <linux/platform_data/s3c-hsotg.h> 25#include <linux/platform_data/s3c-hsotg.h>
26 26
27#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
28#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30 29
31#include <video/samsung_fimd.h> 30#include <video/samsung_fimd.h>
@@ -376,7 +375,6 @@ MACHINE_START(SMDK4212, "SMDK4212")
376 .smp = smp_ops(exynos_smp_ops), 375 .smp = smp_ops(exynos_smp_ops),
377 .init_irq = exynos4_init_irq, 376 .init_irq = exynos4_init_irq,
378 .map_io = smdk4x12_map_io, 377 .map_io = smdk4x12_map_io,
379 .handle_irq = gic_handle_irq,
380 .init_machine = smdk4x12_machine_init, 378 .init_machine = smdk4x12_machine_init,
381 .init_time = exynos4_timer_init, 379 .init_time = exynos4_timer_init,
382 .restart = exynos4_restart, 380 .restart = exynos4_restart,
@@ -390,7 +388,6 @@ MACHINE_START(SMDK4412, "SMDK4412")
390 .smp = smp_ops(exynos_smp_ops), 388 .smp = smp_ops(exynos_smp_ops),
391 .init_irq = exynos4_init_irq, 389 .init_irq = exynos4_init_irq,
392 .map_io = smdk4x12_map_io, 390 .map_io = smdk4x12_map_io,
393 .handle_irq = gic_handle_irq,
394 .init_machine = smdk4x12_machine_init, 391 .init_machine = smdk4x12_machine_init,
395 .init_late = exynos_init_late, 392 .init_late = exynos_init_late,
396 .init_time = exynos4_timer_init, 393 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index b228ab9bda0b..d71672922b19 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -26,7 +26,6 @@
26#include <linux/platform_data/usb-exynos.h> 26#include <linux/platform_data/usb-exynos.h>
27 27
28#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
29#include <asm/hardware/gic.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31 30
32#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
@@ -423,7 +422,6 @@ MACHINE_START(SMDKV310, "SMDKV310")
423 .smp = smp_ops(exynos_smp_ops), 422 .smp = smp_ops(exynos_smp_ops),
424 .init_irq = exynos4_init_irq, 423 .init_irq = exynos4_init_irq,
425 .map_io = smdkv310_map_io, 424 .map_io = smdkv310_map_io,
426 .handle_irq = gic_handle_irq,
427 .init_machine = smdkv310_machine_init, 425 .init_machine = smdkv310_machine_init,
428 .init_time = exynos4_timer_init, 426 .init_time = exynos4_timer_init,
429 .reserve = &smdkv310_reserve, 427 .reserve = &smdkv310_reserve,
@@ -436,7 +434,6 @@ MACHINE_START(SMDKC210, "SMDKC210")
436 .smp = smp_ops(exynos_smp_ops), 434 .smp = smp_ops(exynos_smp_ops),
437 .init_irq = exynos4_init_irq, 435 .init_irq = exynos4_init_irq,
438 .map_io = smdkv310_map_io, 436 .map_io = smdkv310_map_io,
439 .handle_irq = gic_handle_irq,
440 .init_machine = smdkv310_machine_init, 437 .init_machine = smdkv310_machine_init,
441 .init_late = exynos_init_late, 438 .init_late = exynos_init_late,
442 .init_time = exynos4_timer_init, 439 .init_time = exynos4_timer_init,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 866f29a9beee..c9d33a43103e 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,7 +29,6 @@
29#include <drm/exynos_drm.h> 29#include <drm/exynos_drm.h>
30 30
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34 33
35#include <video/samsung_fimd.h> 34#include <video/samsung_fimd.h>
@@ -1151,7 +1150,6 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1151 .smp = smp_ops(exynos_smp_ops), 1150 .smp = smp_ops(exynos_smp_ops),
1152 .init_irq = exynos4_init_irq, 1151 .init_irq = exynos4_init_irq,
1153 .map_io = universal_map_io, 1152 .map_io = universal_map_io,
1154 .handle_irq = gic_handle_irq,
1155 .init_machine = universal_machine_init, 1153 .init_machine = universal_machine_init,
1156 .init_late = exynos_init_late, 1154 .init_late = exynos_init_late,
1157 .init_time = s5p_timer_init, 1155 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 4a89b54fcadb..c9d6650f9b5d 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -22,7 +22,6 @@
22#include <linux/of.h> 22#include <linux/of.h>
23 23
24#include <asm/arch_timer.h> 24#include <asm/arch_timer.h>
25#include <asm/hardware/gic.h>
26#include <asm/localtimer.h> 25#include <asm/localtimer.h>
27 26
28#include <plat/cpu.h> 27#include <plat/cpu.h>
@@ -255,13 +254,9 @@ static struct irqaction mct_comp_event_irq = {
255 254
256static void exynos4_clockevent_init(void) 255static void exynos4_clockevent_init(void)
257{ 256{
258 clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
259 mct_comp_device.max_delta_ns =
260 clockevent_delta2ns(0xffffffff, &mct_comp_device);
261 mct_comp_device.min_delta_ns =
262 clockevent_delta2ns(0xf, &mct_comp_device);
263 mct_comp_device.cpumask = cpumask_of(0); 257 mct_comp_device.cpumask = cpumask_of(0);
264 clockevents_register_device(&mct_comp_device); 258 clockevents_config_and_register(&mct_comp_device, clk_rate,
259 0xf, 0xffffffff);
265 260
266 if (soc_is_exynos5250()) 261 if (soc_is_exynos5250())
267 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); 262 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +399,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
404 evt->set_mode = exynos4_tick_set_mode; 399 evt->set_mode = exynos4_tick_set_mode;
405 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 400 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
406 evt->rating = 450; 401 evt->rating = 450;
407 402 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
408 clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5); 403 0xf, 0x7fffffff);
409 evt->max_delta_ns =
410 clockevent_delta2ns(0x7fffffff, evt);
411 evt->min_delta_ns =
412 clockevent_delta2ns(0xf, evt);
413
414 clockevents_register_device(evt);
415 404
416 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); 405 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
417 406
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index c5c840e947b8..60f7c5be057d 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,9 +20,9 @@
20#include <linux/jiffies.h> 20#include <linux/jiffies.h>
21#include <linux/smp.h> 21#include <linux/smp.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/irqchip/arm-gic.h>
23 24
24#include <asm/cacheflush.h> 25#include <asm/cacheflush.h>
25#include <asm/hardware/gic.h>
26#include <asm/smp_plat.h> 26#include <asm/smp_plat.h>
27#include <asm/smp_scu.h> 27#include <asm/smp_scu.h>
28 28
@@ -149,7 +149,7 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
149 149
150 __raw_writel(virt_to_phys(exynos4_secondary_startup), 150 __raw_writel(virt_to_phys(exynos4_secondary_startup),
151 cpu_boot_reg(phys_cpu)); 151 cpu_boot_reg(phys_cpu));
152 gic_raise_softirq(cpumask_of(cpu), 0); 152 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
153 153
154 if (pen_release == -1) 154 if (pen_release == -1)
155 break; 155 break;
@@ -190,8 +190,6 @@ static void __init exynos_smp_init_cpus(void)
190 190
191 for (i = 0; i < ncores; i++) 191 for (i = 0; i < ncores; i++)
192 set_cpu_possible(i, true); 192 set_cpu_possible(i, true);
193
194 set_smp_cross_call(gic_raise_softirq);
195} 193}
196 194
197static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) 195static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 9f14b1d9a0e7..9ee78f7b4990 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -101,10 +101,6 @@ void __init footbridge_timer_init(void)
101 101
102 setup_irq(ce->irq, &footbridge_timer_irq); 102 setup_irq(ce->irq, &footbridge_timer_irq);
103 103
104 clockevents_calc_mult_shift(ce, mem_fclk_21285, 5);
105 ce->max_delta_ns = clockevent_delta2ns(0xffffff, ce);
106 ce->min_delta_ns = clockevent_delta2ns(0x000004, ce);
107 ce->cpumask = cpumask_of(smp_processor_id()); 104 ce->cpumask = cpumask_of(smp_processor_id());
108 105 clockevents_config_and_register(ce, mem_fclk_21285, 0x4, 0xffffff);
109 clockevents_register_device(ce);
110} 106}
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index f6ca285ee5c5..fd630bccbd31 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -18,6 +18,7 @@
18#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/irqchip.h>
21#include <linux/irqdomain.h> 22#include <linux/irqdomain.h>
22#include <linux/of.h> 23#include <linux/of.h>
23#include <linux/of_irq.h> 24#include <linux/of_irq.h>
@@ -32,7 +33,6 @@
32#include <asm/smp_twd.h> 33#include <asm/smp_twd.h>
33#include <asm/hardware/arm_timer.h> 34#include <asm/hardware/arm_timer.h>
34#include <asm/hardware/timer-sp.h> 35#include <asm/hardware/timer-sp.h>
35#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
@@ -66,12 +66,6 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
66 HB_JUMP_TABLE_PHYS(cpu) + 15); 66 HB_JUMP_TABLE_PHYS(cpu) + 15);
67} 67}
68 68
69const static struct of_device_id irq_match[] = {
70 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
71 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
72 {}
73};
74
75#ifdef CONFIG_CACHE_L2X0 69#ifdef CONFIG_CACHE_L2X0
76static void highbank_l2x0_disable(void) 70static void highbank_l2x0_disable(void)
77{ 71{
@@ -82,7 +76,7 @@ static void highbank_l2x0_disable(void)
82 76
83static void __init highbank_init_irq(void) 77static void __init highbank_init_irq(void)
84{ 78{
85 of_irq_init(irq_match); 79 irqchip_init();
86 80
87 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) 81 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
88 highbank_scu_map_io(); 82 highbank_scu_map_io();
@@ -131,7 +125,7 @@ static void __init highbank_timer_init(void)
131 125
132static void highbank_power_off(void) 126static void highbank_power_off(void)
133{ 127{
134 hignbank_set_pwr_shutdown(); 128 highbank_set_pwr_shutdown();
135 129
136 while (1) 130 while (1)
137 cpu_do_idle(); 131 cpu_do_idle();
@@ -206,7 +200,6 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
206 .map_io = debug_ll_io_init, 200 .map_io = debug_ll_io_init,
207 .init_irq = highbank_init_irq, 201 .init_irq = highbank_init_irq,
208 .init_time = highbank_timer_init, 202 .init_time = highbank_timer_init,
209 .handle_irq = gic_handle_irq,
210 .init_machine = highbank_init, 203 .init_machine = highbank_init,
211 .dt_compat = highbank_match, 204 .dt_compat = highbank_match,
212 .restart = highbank_restart, 205 .restart = highbank_restart,
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index 7b60faccd551..f30c52843396 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
30{ 30{
31 flush_cache_all(); 31 flush_cache_all();
32 32
33 highbank_set_cpu_jump(cpu, secondary_startup); 33 highbank_set_cpu_jump(cpu, phys_to_virt(0));
34 highbank_set_core_pwr(); 34 highbank_set_core_pwr();
35 35
36 cpu_do_idle(); 36 cpu_do_idle();
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 1129957f6c1d..8797a7001720 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -17,9 +17,9 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irqchip/arm-gic.h>
20 21
21#include <asm/smp_scu.h> 22#include <asm/smp_scu.h>
22#include <asm/hardware/gic.h>
23 23
24#include "core.h" 24#include "core.h"
25 25
@@ -32,7 +32,8 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
32 32
33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) 33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
34{ 34{
35 gic_raise_softirq(cpumask_of(cpu), 0); 35 highbank_set_cpu_jump(cpu, secondary_startup);
36 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
36 return 0; 37 return 0;
37} 38}
38 39
@@ -55,25 +56,12 @@ static void __init highbank_smp_init_cpus(void)
55 56
56 for (i = 0; i < ncores; i++) 57 for (i = 0; i < ncores; i++)
57 set_cpu_possible(i, true); 58 set_cpu_possible(i, true);
58
59 set_smp_cross_call(gic_raise_softirq);
60} 59}
61 60
62static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) 61static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
63{ 62{
64 int i;
65
66 if (scu_base_addr) 63 if (scu_base_addr)
67 scu_enable(scu_base_addr); 64 scu_enable(scu_base_addr);
68
69 /*
70 * Write the address of secondary startup into the jump table
71 * The cores are in wfi and wait until they receive a soft interrupt
72 * and a non-zero value to jump to. Then the secondary CPU branches
73 * to this address.
74 */
75 for (i = 1; i < max_cpus; i++)
76 highbank_set_cpu_jump(i, secondary_startup);
77} 65}
78 66
79struct smp_operations highbank_smp_ops __initdata = { 67struct smp_operations highbank_smp_ops __initdata = {
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index 74aa135966f0..04eddb4f4380 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -14,10 +14,12 @@
14 * this program. If not, see <http://www.gnu.org/licenses/>. 14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */ 15 */
16 16
17#include <linux/cpu_pm.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/io.h> 19#include <linux/io.h>
19#include <linux/suspend.h> 20#include <linux/suspend.h>
20 21
22#include <asm/cacheflush.h>
21#include <asm/proc-fns.h> 23#include <asm/proc-fns.h>
22#include <asm/suspend.h> 24#include <asm/suspend.h>
23 25
@@ -26,16 +28,31 @@
26 28
27static int highbank_suspend_finish(unsigned long val) 29static int highbank_suspend_finish(unsigned long val)
28{ 30{
31 outer_flush_all();
32 outer_disable();
33
34 highbank_set_pwr_suspend();
35
29 cpu_do_idle(); 36 cpu_do_idle();
37
38 highbank_clear_pwr_request();
30 return 0; 39 return 0;
31} 40}
32 41
33static int highbank_pm_enter(suspend_state_t state) 42static int highbank_pm_enter(suspend_state_t state)
34{ 43{
35 hignbank_set_pwr_suspend(); 44 cpu_pm_enter();
45 cpu_cluster_pm_enter();
46
36 highbank_set_cpu_jump(0, cpu_resume); 47 highbank_set_cpu_jump(0, cpu_resume);
37 cpu_suspend(0, highbank_suspend_finish); 48 cpu_suspend(0, highbank_suspend_finish);
38 49
50 cpu_cluster_pm_exit();
51 cpu_pm_exit();
52
53 highbank_smc1(0x102, 0x1);
54 if (scu_base_addr)
55 scu_enable(scu_base_addr);
39 return 0; 56 return 0;
40} 57}
41 58
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index e13e8ea7c6cb..70af9d13fcef 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void)
44 writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); 44 writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
45} 45}
46 46
47static inline void hignbank_set_pwr_suspend(void) 47static inline void highbank_clear_core_pwr(void)
48{
49 int cpu = cpu_logical_map(smp_processor_id());
50 if (scu_base_addr)
51 scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
52 else
53 writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
54}
55
56static inline void highbank_set_pwr_suspend(void)
48{ 57{
49 writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); 58 writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
50 highbank_set_core_pwr(); 59 highbank_set_core_pwr();
51} 60}
52 61
53static inline void hignbank_set_pwr_shutdown(void) 62static inline void highbank_set_pwr_shutdown(void)
54{ 63{
55 writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); 64 writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
56 highbank_set_core_pwr(); 65 highbank_set_core_pwr();
57} 66}
58 67
59static inline void hignbank_set_pwr_soft_reset(void) 68static inline void highbank_set_pwr_soft_reset(void)
60{ 69{
61 writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); 70 writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
62 highbank_set_core_pwr(); 71 highbank_set_core_pwr();
63} 72}
64 73
65static inline void hignbank_set_pwr_hard_reset(void) 74static inline void highbank_set_pwr_hard_reset(void)
66{ 75{
67 writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); 76 writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
68 highbank_set_core_pwr(); 77 highbank_set_core_pwr();
69} 78}
70 79
80static inline void highbank_clear_pwr_request(void)
81{
82 writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
83 highbank_clear_core_pwr();
84}
85
71#endif 86#endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index aed96ad9bd4a..37d8384dcf19 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -22,9 +22,9 @@
22void highbank_restart(char mode, const char *cmd) 22void highbank_restart(char mode, const char *cmd)
23{ 23{
24 if (mode == 'h') 24 if (mode == 'h')
25 hignbank_set_pwr_hard_reset(); 25 highbank_set_pwr_hard_reset();
26 else 26 else
27 hignbank_set_pwr_soft_reset(); 27 highbank_set_pwr_soft_reset();
28 28
29 while (1) 29 while (1)
30 cpu_do_idle(); 30 cpu_do_idle();
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 1ad0d76de8c7..3e628fd7a674 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -841,8 +841,6 @@ config SOC_IMX6Q
841 select ARCH_HAS_CPUFREQ 841 select ARCH_HAS_CPUFREQ
842 select ARCH_HAS_OPP 842 select ARCH_HAS_OPP
843 select ARM_CPU_SUSPEND if PM 843 select ARM_CPU_SUSPEND if PM
844 select ARM_ERRATA_743622
845 select ARM_ERRATA_751472
846 select ARM_ERRATA_754322 844 select ARM_ERRATA_754322
847 select ARM_ERRATA_764369 if SMP 845 select ARM_ERRATA_764369 if SMP
848 select ARM_ERRATA_775420 846 select ARM_ERRATA_775420
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 7191ab4434e5..b0164da63b0c 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -112,7 +112,6 @@ void tzic_handle_irq(struct pt_regs *);
112#define imx50_handle_irq tzic_handle_irq 112#define imx50_handle_irq tzic_handle_irq
113#define imx51_handle_irq tzic_handle_irq 113#define imx51_handle_irq tzic_handle_irq
114#define imx53_handle_irq tzic_handle_irq 114#define imx53_handle_irq tzic_handle_irq
115#define imx6q_handle_irq gic_handle_irq
116 115
117extern void imx_enable_cpu(int cpu, bool enable); 116extern void imx_enable_cpu(int cpu, bool enable);
118extern void imx_set_cpu_jump(int cpu, void *jump_addr); 117extern void imx_set_cpu_jump(int cpu, void *jump_addr);
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 36e8b3994470..d8c75c3c925d 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -188,7 +188,7 @@ static struct cpufreq_driver mxc_driver = {
188 .name = "imx", 188 .name = "imx",
189}; 189};
190 190
191static int __devinit mxc_cpufreq_driver_init(void) 191static int mxc_cpufreq_driver_init(void)
192{ 192{
193 return cpufreq_register_driver(&mxc_driver); 193 return cpufreq_register_driver(&mxc_driver);
194} 194}
diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c
index 04a5961beeac..e02de188ae83 100644
--- a/arch/arm/mach-imx/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -178,7 +178,6 @@ static struct irqaction epit_timer_irq = {
178static struct clock_event_device clockevent_epit = { 178static struct clock_event_device clockevent_epit = {
179 .name = "epit", 179 .name = "epit",
180 .features = CLOCK_EVT_FEAT_ONESHOT, 180 .features = CLOCK_EVT_FEAT_ONESHOT,
181 .shift = 32,
182 .set_mode = epit_set_mode, 181 .set_mode = epit_set_mode,
183 .set_next_event = epit_set_next_event, 182 .set_next_event = epit_set_next_event,
184 .rating = 200, 183 .rating = 200,
@@ -186,18 +185,10 @@ static struct clock_event_device clockevent_epit = {
186 185
187static int __init epit_clockevent_init(struct clk *timer_clk) 186static int __init epit_clockevent_init(struct clk *timer_clk)
188{ 187{
189 unsigned int c = clk_get_rate(timer_clk);
190
191 clockevent_epit.mult = div_sc(c, NSEC_PER_SEC,
192 clockevent_epit.shift);
193 clockevent_epit.max_delta_ns =
194 clockevent_delta2ns(0xfffffffe, &clockevent_epit);
195 clockevent_epit.min_delta_ns =
196 clockevent_delta2ns(0x800, &clockevent_epit);
197
198 clockevent_epit.cpumask = cpumask_of(0); 188 clockevent_epit.cpumask = cpumask_of(0);
199 189 clockevents_config_and_register(&clockevent_epit,
200 clockevents_register_device(&clockevent_epit); 190 clk_get_rate(timer_clk),
191 0x800, 0xfffffffe);
201 192
202 return 0; 193 return 0;
203} 194}
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index e1537f9e45b8..ff24920699e4 100644
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -15,7 +15,7 @@
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_address.h> 16#include <linux/of_address.h>
17#include <linux/of_irq.h> 17#include <linux/of_irq.h>
18#include <asm/hardware/gic.h> 18#include <linux/irqchip/arm-gic.h>
19 19
20#define GPC_IMR1 0x008 20#define GPC_IMR1 0x008
21#define GPC_PGC_CPU_PDN 0x2a0 21#define GPC_PGC_CPU_PDN 0x2a0
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index cd277a0f5b16..8d3d06e0e8a1 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/irqchip.h>
21#include <linux/of.h> 22#include <linux/of.h>
22#include <linux/of_address.h> 23#include <linux/of_address.h>
23#include <linux/of_irq.h> 24#include <linux/of_irq.h>
@@ -29,7 +30,6 @@
29#include <asm/cpuidle.h> 30#include <asm/cpuidle.h>
30#include <asm/smp_twd.h> 31#include <asm/smp_twd.h>
31#include <asm/hardware/cache-l2x0.h> 32#include <asm/hardware/cache-l2x0.h>
32#include <asm/hardware/gic.h>
33#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
34#include <asm/mach/time.h> 34#include <asm/mach/time.h>
35#include <asm/system_misc.h> 35#include <asm/system_misc.h>
@@ -221,17 +221,12 @@ static void __init imx6q_map_io(void)
221 imx6q_clock_map_io(); 221 imx6q_clock_map_io();
222} 222}
223 223
224static const struct of_device_id imx6q_irq_match[] __initconst = {
225 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
226 { /* sentinel */ }
227};
228
229static void __init imx6q_init_irq(void) 224static void __init imx6q_init_irq(void)
230{ 225{
231 l2x0_of_init(0, ~0UL); 226 l2x0_of_init(0, ~0UL);
232 imx_src_init(); 227 imx_src_init();
233 imx_gpc_init(); 228 imx_gpc_init();
234 of_irq_init(imx6q_irq_match); 229 irqchip_init();
235} 230}
236 231
237static void __init imx6q_timer_init(void) 232static void __init imx6q_timer_init(void)
@@ -250,7 +245,6 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
250 .smp = smp_ops(imx_smp_ops), 245 .smp = smp_ops(imx_smp_ops),
251 .map_io = imx6q_map_io, 246 .map_io = imx6q_map_io,
252 .init_irq = imx6q_init_irq, 247 .init_irq = imx6q_init_irq,
253 .handle_irq = imx6q_handle_irq,
254 .init_time = imx6q_timer_init, 248 .init_time = imx6q_timer_init,
255 .init_machine = imx6q_init_machine, 249 .init_machine = imx6q_init_machine,
256 .init_late = imx6q_init_late, 250 .init_late = imx6q_init_late,
diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c
index c461e98496c3..7a9686ad994c 100644
--- a/arch/arm/mach-imx/mmdc.c
+++ b/arch/arm/mach-imx/mmdc.c
@@ -21,7 +21,7 @@
21#define BP_MMDC_MAPSR_PSD 0 21#define BP_MMDC_MAPSR_PSD 0
22#define BP_MMDC_MAPSR_PSS 4 22#define BP_MMDC_MAPSR_PSS 4
23 23
24static int __devinit imx_mmdc_probe(struct platform_device *pdev) 24static int imx_mmdc_probe(struct platform_device *pdev)
25{ 25{
26 struct device_node *np = pdev->dev.of_node; 26 struct device_node *np = pdev->dev.of_node;
27 void __iomem *mmdc_base, *reg; 27 void __iomem *mmdc_base, *reg;
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 3777b805b76b..d35693117991 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -12,9 +12,9 @@
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <linux/irqchip/arm-gic.h>
15#include <asm/page.h> 16#include <asm/page.h>
16#include <asm/smp_scu.h> 17#include <asm/smp_scu.h>
17#include <asm/hardware/gic.h>
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19 19
20#include "common.h" 20#include "common.h"
@@ -71,8 +71,6 @@ static void __init imx_smp_init_cpus(void)
71 71
72 for (i = 0; i < ncores; i++) 72 for (i = 0; i < ncores; i++)
73 set_cpu_possible(i, true); 73 set_cpu_possible(i, true);
74
75 set_smp_cross_call(gic_raise_softirq);
76} 74}
77 75
78void imx_smp_prepare(void) 76void imx_smp_prepare(void)
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index f017302f6d09..62769df36db1 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -256,7 +256,6 @@ static struct irqaction mxc_timer_irq = {
256static struct clock_event_device clockevent_mxc = { 256static struct clock_event_device clockevent_mxc = {
257 .name = "mxc_timer1", 257 .name = "mxc_timer1",
258 .features = CLOCK_EVT_FEAT_ONESHOT, 258 .features = CLOCK_EVT_FEAT_ONESHOT,
259 .shift = 32,
260 .set_mode = mxc_set_mode, 259 .set_mode = mxc_set_mode,
261 .set_next_event = mx1_2_set_next_event, 260 .set_next_event = mx1_2_set_next_event,
262 .rating = 200, 261 .rating = 200,
@@ -264,21 +263,13 @@ static struct clock_event_device clockevent_mxc = {
264 263
265static int __init mxc_clockevent_init(struct clk *timer_clk) 264static int __init mxc_clockevent_init(struct clk *timer_clk)
266{ 265{
267 unsigned int c = clk_get_rate(timer_clk);
268
269 if (timer_is_v2()) 266 if (timer_is_v2())
270 clockevent_mxc.set_next_event = v2_set_next_event; 267 clockevent_mxc.set_next_event = v2_set_next_event;
271 268
272 clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC,
273 clockevent_mxc.shift);
274 clockevent_mxc.max_delta_ns =
275 clockevent_delta2ns(0xfffffffe, &clockevent_mxc);
276 clockevent_mxc.min_delta_ns =
277 clockevent_delta2ns(0xff, &clockevent_mxc);
278
279 clockevent_mxc.cpumask = cpumask_of(0); 269 clockevent_mxc.cpumask = cpumask_of(0);
280 270 clockevents_config_and_register(&clockevent_mxc,
281 clockevents_register_device(&clockevent_mxc); 271 clk_get_rate(timer_clk),
272 0xff, 0xfffffffe);
282 273
283 return 0; 274 return 0;
284} 275}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 2f28018c4447..9082b84aeebb 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
504 504
505/* Scan an IOP13XX PCI bus. nr selects which ATU we use. 505/* Scan an IOP13XX PCI bus. nr selects which ATU we use.
506 */ 506 */
507struct pci_bus * __devinit iop13xx_scan_bus(int nr, struct pci_sys_data *sys) 507struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
508{ 508{
509 int which_atu; 509 int which_atu;
510 struct pci_bus *bus = NULL; 510 struct pci_bus *bus = NULL;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index f6ac695ceb60..1dbeb7c99d58 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -519,22 +519,15 @@ static struct clock_event_device clockevent_ixp4xx = {
519 .name = "ixp4xx timer1", 519 .name = "ixp4xx timer1",
520 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 520 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
521 .rating = 200, 521 .rating = 200,
522 .shift = 24,
523 .set_mode = ixp4xx_set_mode, 522 .set_mode = ixp4xx_set_mode,
524 .set_next_event = ixp4xx_set_next_event, 523 .set_next_event = ixp4xx_set_next_event,
525}; 524};
526 525
527static void __init ixp4xx_clockevent_init(void) 526static void __init ixp4xx_clockevent_init(void)
528{ 527{
529 clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
530 clockevent_ixp4xx.shift);
531 clockevent_ixp4xx.max_delta_ns =
532 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
533 clockevent_ixp4xx.min_delta_ns =
534 clockevent_delta2ns(0xf, &clockevent_ixp4xx);
535 clockevent_ixp4xx.cpumask = cpumask_of(0); 528 clockevent_ixp4xx.cpumask = cpumask_of(0);
536 529 clockevents_config_and_register(&clockevent_ixp4xx, IXP4XX_TIMER_FREQ,
537 clockevents_register_device(&clockevent_ixp4xx); 530 0xf, 0xfffffffe);
538} 531}
539 532
540void ixp4xx_restart(char mode, const char *cmd) 533void ixp4xx_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index d6f57fd6f788..d4af5c191c24 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -67,6 +67,10 @@ static void __init kirkwood_legacy_clk_init(void)
67 orion_clkdev_add(NULL, "mv643xx_eth_port.1", 67 orion_clkdev_add(NULL, "mv643xx_eth_port.1",
68 of_clk_get_from_provider(&clkspec)); 68 of_clk_get_from_provider(&clkspec));
69 69
70 clkspec.args[0] = CGC_BIT_SDIO;
71 orion_clkdev_add(NULL, "mvsdio",
72 of_clk_get_from_provider(&clkspec));
73
70} 74}
71 75
72static void __init kirkwood_of_clk_init(void) 76static void __init kirkwood_of_clk_init(void)
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c
index 15e69fcde9f4..23d2dd1b1b1e 100644
--- a/arch/arm/mach-kirkwood/board-usi_topkick.c
+++ b/arch/arm/mach-kirkwood/board-usi_topkick.c
@@ -64,8 +64,6 @@ static unsigned int topkick_mpp_config[] __initdata = {
64 0 64 0
65}; 65};
66 66
67#define TOPKICK_SATA0_PWR_ENABLE 36
68
69void __init usi_topkick_init(void) 67void __init usi_topkick_init(void)
70{ 68{
71 /* 69 /*
@@ -73,8 +71,6 @@ void __init usi_topkick_init(void)
73 */ 71 */
74 kirkwood_mpp_conf(topkick_mpp_config); 72 kirkwood_mpp_conf(topkick_mpp_config);
75 73
76 /* SATA0 power enable */
77 gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1);
78 74
79 kirkwood_ge00_init(&topkick_ge00_data); 75 kirkwood_ge00_init(&topkick_ge00_data);
80 kirkwood_sdio_init(&topkick_mvsdio_data); 76 kirkwood_sdio_init(&topkick_mvsdio_data);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ef102646ba9a..a1c3ab6fc809 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -214,7 +214,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
214 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on 214 * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
215 * the device. Decoding setup is handled by the orion code. 215 * the device. Decoding setup is handled by the orion code.
216 */ 216 */
217static void __devinit rc_pci_fixup(struct pci_dev *dev) 217static void rc_pci_fixup(struct pci_dev *dev)
218{ 218{
219 if (dev->bus->parent == NULL && dev->devfn == 0) { 219 if (dev->bus->parent == NULL && dev->devfn == 0) {
220 int i; 220 int i;
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index 7beec9b8becd..456d6386edf8 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -92,7 +92,7 @@ static struct i2c_board_info acs5k_i2c_devs[] __initdata = {
92 }, 92 },
93}; 93};
94 94
95static void __devinit acs5k_i2c_init(void) 95static void acs5k_i2c_init(void)
96{ 96{
97 /* The gpio interface */ 97 /* The gpio interface */
98 platform_device_register(&acs5k_i2c_device); 98 platform_device_register(&acs5k_i2c_device);
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index 88bd4ce3b94a..20eab63d10ba 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -70,7 +70,6 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
70static struct clock_event_device lpc32xx_clkevt = { 70static struct clock_event_device lpc32xx_clkevt = {
71 .name = "lpc32xx_clkevt", 71 .name = "lpc32xx_clkevt",
72 .features = CLOCK_EVT_FEAT_ONESHOT, 72 .features = CLOCK_EVT_FEAT_ONESHOT,
73 .shift = 32,
74 .rating = 300, 73 .rating = 300,
75 .set_next_event = lpc32xx_clkevt_next_event, 74 .set_next_event = lpc32xx_clkevt_next_event,
76 .set_mode = lpc32xx_clkevt_mode, 75 .set_mode = lpc32xx_clkevt_mode,
@@ -141,14 +140,8 @@ void __init lpc32xx_timer_init(void)
141 setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq); 140 setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq);
142 141
143 /* Setup the clockevent structure. */ 142 /* Setup the clockevent structure. */
144 lpc32xx_clkevt.mult = div_sc(clkrate, NSEC_PER_SEC,
145 lpc32xx_clkevt.shift);
146 lpc32xx_clkevt.max_delta_ns = clockevent_delta2ns(-1,
147 &lpc32xx_clkevt);
148 lpc32xx_clkevt.min_delta_ns = clockevent_delta2ns(1,
149 &lpc32xx_clkevt) + 1;
150 lpc32xx_clkevt.cpumask = cpumask_of(0); 143 lpc32xx_clkevt.cpumask = cpumask_of(0);
151 clockevents_register_device(&lpc32xx_clkevt); 144 clockevents_config_and_register(&lpc32xx_clkevt, clkrate, 1, -1);
152 145
153 /* Use timer1 as clock source. */ 146 /* Use timer1 as clock source. */
154 __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET, 147 __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET,
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c
index a6c08ede4491..bf5e64906e65 100644
--- a/arch/arm/mach-mmp/sram.c
+++ b/arch/arm/mach-mmp/sram.c
@@ -61,7 +61,7 @@ struct gen_pool *sram_get_gpool(char *pool_name)
61} 61}
62EXPORT_SYMBOL(sram_get_gpool); 62EXPORT_SYMBOL(sram_get_gpool);
63 63
64static int __devinit sram_probe(struct platform_device *pdev) 64static int sram_probe(struct platform_device *pdev)
65{ 65{
66 struct sram_platdata *pdata = pdev->dev.platform_data; 66 struct sram_platdata *pdata = pdev->dev.platform_data;
67 struct sram_bank_info *info; 67 struct sram_bank_info *info;
@@ -125,7 +125,7 @@ out:
125 return ret; 125 return ret;
126} 126}
127 127
128static int __devexit sram_remove(struct platform_device *pdev) 128static int sram_remove(struct platform_device *pdev)
129{ 129{
130 struct sram_bank_info *info; 130 struct sram_bank_info *info;
131 131
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 936447c70977..86a18b3d252e 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -141,7 +141,6 @@ static void timer_set_mode(enum clock_event_mode mode,
141static struct clock_event_device ckevt = { 141static struct clock_event_device ckevt = {
142 .name = "clockevent", 142 .name = "clockevent",
143 .features = CLOCK_EVT_FEAT_ONESHOT, 143 .features = CLOCK_EVT_FEAT_ONESHOT,
144 .shift = 32,
145 .rating = 200, 144 .rating = 200,
146 .set_next_event = timer_set_next_event, 145 .set_next_event = timer_set_next_event,
147 .set_mode = timer_set_mode, 146 .set_mode = timer_set_mode,
@@ -198,15 +197,13 @@ void __init timer_init(int irq)
198 197
199 setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE); 198 setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
200 199
201 ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
202 ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
203 ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt);
204 ckevt.cpumask = cpumask_of(0); 200 ckevt.cpumask = cpumask_of(0);
205 201
206 setup_irq(irq, &timer_irq); 202 setup_irq(irq, &timer_irq);
207 203
208 clocksource_register_hz(&cksrc, CLOCK_TICK_RATE); 204 clocksource_register_hz(&cksrc, CLOCK_TICK_RATE);
209 clockevents_register_device(&ckevt); 205 clockevents_config_and_register(&ckevt, CLOCK_TICK_RATE,
206 MIN_DELTA, MAX_DELTA);
210} 207}
211 208
212#ifdef CONFIG_OF 209#ifdef CONFIG_OF
diff --git a/arch/arm/mach-msm/board-dt-8660.c b/arch/arm/mach-msm/board-dt-8660.c
index 27c41eabfd12..7dcfc5300bbd 100644
--- a/arch/arm/mach-msm/board-dt-8660.c
+++ b/arch/arm/mach-msm/board-dt-8660.c
@@ -11,26 +11,15 @@
11 */ 11 */
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/irqchip.h>
14#include <linux/of.h> 15#include <linux/of.h>
15#include <linux/of_irq.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20 19
21#include <mach/board.h> 20#include <mach/board.h>
22#include "common.h" 21#include "common.h"
23 22
24static const struct of_device_id msm_dt_gic_match[] __initconst = {
25 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
26 {}
27};
28
29static void __init msm8x60_init_irq(void)
30{
31 of_irq_init(msm_dt_gic_match);
32}
33
34static void __init msm8x60_init_late(void) 23static void __init msm8x60_init_late(void)
35{ 24{
36 smd_debugfs_init(); 25 smd_debugfs_init();
@@ -55,8 +44,7 @@ static const char *msm8x60_fluid_match[] __initdata = {
55DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)") 44DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
56 .smp = smp_ops(msm_smp_ops), 45 .smp = smp_ops(msm_smp_ops),
57 .map_io = msm_map_msm8x60_io, 46 .map_io = msm_map_msm8x60_io,
58 .init_irq = msm8x60_init_irq, 47 .init_irq = irqchip_init,
59 .handle_irq = gic_handle_irq,
60 .init_machine = msm8x60_dt_init, 48 .init_machine = msm8x60_dt_init,
61 .init_late = msm8x60_init_late, 49 .init_late = msm8x60_init_late,
62 .init_time = msm_dt_timer_init, 50 .init_time = msm_dt_timer_init,
diff --git a/arch/arm/mach-msm/board-dt-8960.c b/arch/arm/mach-msm/board-dt-8960.c
index 3226d5276962..73019363ffa4 100644
--- a/arch/arm/mach-msm/board-dt-8960.c
+++ b/arch/arm/mach-msm/board-dt-8960.c
@@ -11,24 +11,13 @@
11 */ 11 */
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/of_irq.h> 14#include <linux/irqchip.h>
15#include <linux/of_platform.h> 15#include <linux/of_platform.h>
16 16
17#include <asm/hardware/gic.h>
18#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
19 18
20#include "common.h" 19#include "common.h"
21 20
22static const struct of_device_id msm_dt_gic_match[] __initconst = {
23 { .compatible = "qcom,msm-qgic2", .data = gic_of_init },
24 { }
25};
26
27static void __init msm_dt_init_irq(void)
28{
29 of_irq_init(msm_dt_gic_match);
30}
31
32static void __init msm_dt_init(void) 21static void __init msm_dt_init(void)
33{ 22{
34 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 23 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -42,9 +31,8 @@ static const char * const msm8960_dt_match[] __initconst = {
42DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)") 31DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
43 .smp = smp_ops(msm_smp_ops), 32 .smp = smp_ops(msm_smp_ops),
44 .map_io = msm_map_msm8960_io, 33 .map_io = msm_map_msm8960_io,
45 .init_irq = msm_dt_init_irq, 34 .init_irq = irqchip_init,
46 .init_time = msm_dt_timer_init, 35 .init_time = msm_dt_timer_init,
47 .init_machine = msm_dt_init, 36 .init_machine = msm_dt_init,
48 .dt_compat = msm8960_dt_match, 37 .dt_compat = msm8960_dt_match,
49 .handle_irq = gic_handle_irq,
50MACHINE_END 38MACHINE_END
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 7ed69b69c87c..42932865416a 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -15,8 +15,8 @@
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/smp.h> 16#include <linux/smp.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/irqchip/arm-gic.h>
18 19
19#include <asm/hardware/gic.h>
20#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
21#include <asm/cputype.h> 21#include <asm/cputype.h>
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
@@ -115,7 +115,7 @@ static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *id
115 * the boot monitor to read the system wide flags register, 115 * the boot monitor to read the system wide flags register,
116 * and branch to the address found there. 116 * and branch to the address found there.
117 */ 117 */
118 gic_raise_softirq(cpumask_of(cpu), 0); 118 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
119 119
120 timeout = jiffies + (1 * HZ); 120 timeout = jiffies + (1 * HZ);
121 while (time_before(jiffies, timeout)) { 121 while (time_before(jiffies, timeout)) {
@@ -153,8 +153,6 @@ static void __init msm_smp_init_cpus(void)
153 153
154 for (i = 0; i < ncores; i++) 154 for (i = 0; i < ncores; i++)
155 set_cpu_possible(i, true); 155 set_cpu_possible(i, true);
156
157 set_smp_cross_call(gic_raise_softirq);
158} 156}
159 157
160static void __init msm_smp_prepare_cpus(unsigned int max_cpus) 158static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c
index 8f1eecd88186..507f5ca80697 100644
--- a/arch/arm/mach-msm/proc_comm.c
+++ b/arch/arm/mach-msm/proc_comm.c
@@ -120,7 +120,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
120 * and unknown state. This function should be called early to 120 * and unknown state. This function should be called early to
121 * wait on the ARM9. 121 * wait on the ARM9.
122 */ 122 */
123void __devinit proc_comm_boot_wait(void) 123void proc_comm_boot_wait(void)
124{ 124{
125 void __iomem *base = MSM_SHARED_RAM_BASE; 125 void __iomem *base = MSM_SHARED_RAM_BASE;
126 126
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index c5a2eddc6cdc..b1588a1ea2f8 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -988,7 +988,7 @@ int smd_core_init(void)
988 return 0; 988 return 0;
989} 989}
990 990
991static int __devinit msm_smd_probe(struct platform_device *pdev) 991static int msm_smd_probe(struct platform_device *pdev)
992{ 992{
993 /* 993 /*
994 * If we haven't waited for the ARM9 to boot up till now, 994 * If we haven't waited for the ARM9 to boot up till now,
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 2fb5f3eec50f..2969027f02fa 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -25,7 +25,6 @@
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26 26
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <asm/hardware/gic.h>
29#include <asm/localtimer.h> 28#include <asm/localtimer.h>
30#include <asm/sched_clock.h> 29#include <asm/sched_clock.h>
31 30
@@ -144,13 +143,9 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
144 evt->rating = msm_clockevent.rating; 143 evt->rating = msm_clockevent.rating;
145 evt->set_mode = msm_timer_set_mode; 144 evt->set_mode = msm_timer_set_mode;
146 evt->set_next_event = msm_timer_set_next_event; 145 evt->set_next_event = msm_timer_set_next_event;
147 evt->shift = msm_clockevent.shift;
148 evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift);
149 evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt);
150 evt->min_delta_ns = clockevent_delta2ns(4, evt);
151 146
152 *__this_cpu_ptr(msm_evt.percpu_evt) = evt; 147 *__this_cpu_ptr(msm_evt.percpu_evt) = evt;
153 clockevents_register_device(evt); 148 clockevents_config_and_register(evt, GPT_HZ, 4, 0xf0000000);
154 enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING); 149 enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
155 return 0; 150 return 0;
156} 151}
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index a9a154a646dd..ee8c0b51df2c 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -173,7 +173,7 @@ static struct pci_ops pcie_ops = {
173 .write = pcie_wr_conf, 173 .write = pcie_wr_conf,
174}; 174};
175 175
176static void __devinit rc_pci_fixup(struct pci_dev *dev) 176static void rc_pci_fixup(struct pci_dev *dev)
177{ 177{
178 /* 178 /*
179 * Prevent enumeration of root complex. 179 * Prevent enumeration of root complex.
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 856f4c796061..27451b1ba3f1 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -195,7 +195,6 @@ static void mxs_set_mode(enum clock_event_mode mode,
195static struct clock_event_device mxs_clockevent_device = { 195static struct clock_event_device mxs_clockevent_device = {
196 .name = "mxs_timrot", 196 .name = "mxs_timrot",
197 .features = CLOCK_EVT_FEAT_ONESHOT, 197 .features = CLOCK_EVT_FEAT_ONESHOT,
198 .shift = 32,
199 .set_mode = mxs_set_mode, 198 .set_mode = mxs_set_mode,
200 .set_next_event = timrotv2_set_next_event, 199 .set_next_event = timrotv2_set_next_event,
201 .rating = 200, 200 .rating = 200,
@@ -203,25 +202,12 @@ static struct clock_event_device mxs_clockevent_device = {
203 202
204static int __init mxs_clockevent_init(struct clk *timer_clk) 203static int __init mxs_clockevent_init(struct clk *timer_clk)
205{ 204{
206 unsigned int c = clk_get_rate(timer_clk); 205 if (timrot_is_v1())
207
208 mxs_clockevent_device.mult =
209 div_sc(c, NSEC_PER_SEC, mxs_clockevent_device.shift);
210 mxs_clockevent_device.cpumask = cpumask_of(0);
211 if (timrot_is_v1()) {
212 mxs_clockevent_device.set_next_event = timrotv1_set_next_event; 206 mxs_clockevent_device.set_next_event = timrotv1_set_next_event;
213 mxs_clockevent_device.max_delta_ns = 207 mxs_clockevent_device.cpumask = cpumask_of(0);
214 clockevent_delta2ns(0xfffe, &mxs_clockevent_device); 208 clockevents_config_and_register(&mxs_clockevent_device,
215 mxs_clockevent_device.min_delta_ns = 209 clk_get_rate(timer_clk), 0xf,
216 clockevent_delta2ns(0xf, &mxs_clockevent_device); 210 timrot_is_v1() ? 0xfffe : 0xfffffffe);
217 } else {
218 mxs_clockevent_device.max_delta_ns =
219 clockevent_delta2ns(0xfffffffe, &mxs_clockevent_device);
220 mxs_clockevent_device.min_delta_ns =
221 clockevent_delta2ns(0xf, &mxs_clockevent_device);
222 }
223
224 clockevents_register_device(&mxs_clockevent_device);
225 211
226 return 0; 212 return 0;
227} 213}
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index aa627465d914..27c2cb7ab813 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -23,9 +23,9 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irqchip/arm-vic.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/mach/map.h> 28#include <asm/mach/map.h>
28#include <asm/hardware/vic.h>
29#include <mach/netx-regs.h> 29#include <mach/netx-regs.h>
30#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
31 31
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 241e1b9c58cb..9b558eb3070f 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,7 +28,6 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
32#include <mach/netx-regs.h> 31#include <mach/netx-regs.h>
33#include <linux/platform_data/eth-netx.h> 32#include <linux/platform_data/eth-netx.h>
34 33
@@ -204,7 +203,6 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
204 .atag_offset = 0x100, 203 .atag_offset = 0x100,
205 .map_io = netx_map_io, 204 .map_io = netx_map_io,
206 .init_irq = netx_init_irq, 205 .init_irq = netx_init_irq,
207 .handle_irq = vic_handle_irq,
208 .init_time = netx_timer_init, 206 .init_time = netx_timer_init,
209 .init_machine = nxdb500_init, 207 .init_machine = nxdb500_init,
210 .restart = netx_restart, 208 .restart = netx_restart,
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index 055aeecedde2..a5e86cd365e7 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,7 +28,6 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
32#include <mach/netx-regs.h> 31#include <mach/netx-regs.h>
33#include <linux/platform_data/eth-netx.h> 32#include <linux/platform_data/eth-netx.h>
34 33
@@ -97,7 +96,6 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
97 .atag_offset = 0x100, 96 .atag_offset = 0x100,
98 .map_io = netx_map_io, 97 .map_io = netx_map_io,
99 .init_irq = netx_init_irq, 98 .init_irq = netx_init_irq,
100 .handle_irq = vic_handle_irq,
101 .init_time = netx_timer_init, 99 .init_time = netx_timer_init,
102 .init_machine = nxdkn_init, 100 .init_machine = nxdkn_init,
103 .restart = netx_restart, 101 .restart = netx_restart,
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 018e91c55b00..ad17885d0159 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,7 +28,6 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/vic.h>
32#include <mach/netx-regs.h> 31#include <mach/netx-regs.h>
33#include <linux/platform_data/eth-netx.h> 32#include <linux/platform_data/eth-netx.h>
34 33
@@ -181,7 +180,6 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
181 .atag_offset = 0x100, 180 .atag_offset = 0x100,
182 .map_io = netx_map_io, 181 .map_io = netx_map_io,
183 .init_irq = netx_init_irq, 182 .init_irq = netx_init_irq,
184 .handle_irq = vic_handle_irq,
185 .init_time = netx_timer_init, 183 .init_time = netx_timer_init,
186 .init_machine = nxeb500hmi_init, 184 .init_machine = nxeb500hmi_init,
187 .restart = netx_restart, 185 .restart = netx_restart,
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index 0dee4524494f..6df42e643031 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -76,7 +76,6 @@ static int netx_set_next_event(unsigned long evt,
76 76
77static struct clock_event_device netx_clockevent = { 77static struct clock_event_device netx_clockevent = {
78 .name = "netx-timer" __stringify(TIMER_CLOCKEVENT), 78 .name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
79 .shift = 32,
80 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 79 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
81 .set_next_event = netx_set_next_event, 80 .set_next_event = netx_set_next_event,
82 .set_mode = netx_set_mode, 81 .set_mode = netx_set_mode,
@@ -140,14 +139,9 @@ void __init netx_timer_init(void)
140 clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), 139 clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
141 "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up); 140 "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up);
142 141
143 netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
144 netx_clockevent.shift);
145 netx_clockevent.max_delta_ns =
146 clockevent_delta2ns(0xfffffffe, &netx_clockevent);
147 /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. 142 /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
148 * Adding some safety ... */ 143 * Adding some safety ... */
149 netx_clockevent.min_delta_ns =
150 clockevent_delta2ns(0xa00, &netx_clockevent);
151 netx_clockevent.cpumask = cpumask_of(0); 144 netx_clockevent.cpumask = cpumask_of(0);
152 clockevents_register_device(&netx_clockevent); 145 clockevents_config_and_register(&netx_clockevent, CLOCK_TICK_RATE,
146 0xa00, 0xfffffffe);
153} 147}
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index ab756ed87ef0..aaed48d94374 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -27,8 +27,6 @@
27#include <linux/pinctrl/machine.h> 27#include <linux/pinctrl/machine.h>
28#include <linux/platform_data/pinctrl-nomadik.h> 28#include <linux/platform_data/pinctrl-nomadik.h>
29#include <linux/platform_data/clocksource-nomadik-mtu.h> 29#include <linux/platform_data/clocksource-nomadik-mtu.h>
30#include <linux/platform_data/mtd-nomadik-nand.h>
31#include <asm/hardware/vic.h>
32#include <asm/sizes.h> 30#include <asm/sizes.h>
33#include <asm/mach-types.h> 31#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -349,7 +347,6 @@ MACHINE_START(NOMADIK, "NHK8815")
349 .atag_offset = 0x100, 347 .atag_offset = 0x100,
350 .map_io = cpu8815_map_io, 348 .map_io = cpu8815_map_io,
351 .init_irq = cpu8815_init_irq, 349 .init_irq = cpu8815_init_irq,
352 .handle_irq = vic_handle_irq,
353 .init_time = nomadik_timer_init, 350 .init_time = nomadik_timer_init,
354 .init_machine = nhk8815_platform_init, 351 .init_machine = nhk8815_platform_init,
355 .restart = cpu8815_restart, 352 .restart = cpu8815_restart,
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 1273931303fb..351404673f6c 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -25,13 +25,13 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/irqchip/arm-vic.h>
28#include <linux/platform_data/clk-nomadik.h> 29#include <linux/platform_data/clk-nomadik.h>
29#include <linux/platform_data/pinctrl-nomadik.h> 30#include <linux/platform_data/pinctrl-nomadik.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <mach/irqs.h> 33#include <mach/irqs.h>
33#include <asm/mach/map.h> 34#include <asm/mach/map.h>
34#include <asm/hardware/vic.h>
35 35
36#include <asm/cacheflush.h> 36#include <asm/cacheflush.h>
37#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h
index b549d0571548..215f8cdb4004 100644
--- a/arch/arm/mach-nomadik/include/mach/irqs.h
+++ b/arch/arm/mach-nomadik/include/mach/irqs.h
@@ -22,49 +22,49 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
25#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ 25#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */
26 26
27/* 27/*
28 * Interrupt numbers generic for all Nomadik Chip cuts 28 * Interrupt numbers generic for all Nomadik Chip cuts
29 */ 29 */
30#define IRQ_WATCHDOG 1 30#define IRQ_WATCHDOG (IRQ_VIC_START+0)
31#define IRQ_SOFTINT 2 31#define IRQ_SOFTINT (IRQ_VIC_START+1)
32#define IRQ_CRYPTO 3 32#define IRQ_CRYPTO (IRQ_VIC_START+2)
33#define IRQ_OWM 4 33#define IRQ_OWM (IRQ_VIC_START+3)
34#define IRQ_MTU0 5 34#define IRQ_MTU0 (IRQ_VIC_START+4)
35#define IRQ_MTU1 6 35#define IRQ_MTU1 (IRQ_VIC_START+5)
36#define IRQ_GPIO0 7 36#define IRQ_GPIO0 (IRQ_VIC_START+6)
37#define IRQ_GPIO1 8 37#define IRQ_GPIO1 (IRQ_VIC_START+7)
38#define IRQ_GPIO2 9 38#define IRQ_GPIO2 (IRQ_VIC_START+8)
39#define IRQ_GPIO3 10 39#define IRQ_GPIO3 (IRQ_VIC_START+9)
40#define IRQ_RTC_RTT 11 40#define IRQ_RTC_RTT (IRQ_VIC_START+10)
41#define IRQ_SSP 12 41#define IRQ_SSP (IRQ_VIC_START+11)
42#define IRQ_UART0 13 42#define IRQ_UART0 (IRQ_VIC_START+12)
43#define IRQ_DMA1 14 43#define IRQ_DMA1 (IRQ_VIC_START+13)
44#define IRQ_CLCD_MDIF 15 44#define IRQ_CLCD_MDIF (IRQ_VIC_START+14)
45#define IRQ_DMA0 16 45#define IRQ_DMA0 (IRQ_VIC_START+15)
46#define IRQ_PWRFAIL 17 46#define IRQ_PWRFAIL (IRQ_VIC_START+16)
47#define IRQ_UART1 18 47#define IRQ_UART1 (IRQ_VIC_START+17)
48#define IRQ_FIRDA 19 48#define IRQ_FIRDA (IRQ_VIC_START+18)
49#define IRQ_MSP0 20 49#define IRQ_MSP0 (IRQ_VIC_START+19)
50#define IRQ_I2C0 21 50#define IRQ_I2C0 (IRQ_VIC_START+20)
51#define IRQ_I2C1 22 51#define IRQ_I2C1 (IRQ_VIC_START+21)
52#define IRQ_SDMMC 23 52#define IRQ_SDMMC (IRQ_VIC_START+22)
53#define IRQ_USBOTG 24 53#define IRQ_USBOTG (IRQ_VIC_START+23)
54#define IRQ_SVA_IT0 25 54#define IRQ_SVA_IT0 (IRQ_VIC_START+24)
55#define IRQ_SVA_IT1 26 55#define IRQ_SVA_IT1 (IRQ_VIC_START+25)
56#define IRQ_SAA_IT0 27 56#define IRQ_SAA_IT0 (IRQ_VIC_START+26)
57#define IRQ_SAA_IT1 28 57#define IRQ_SAA_IT1 (IRQ_VIC_START+27)
58#define IRQ_UART2 29 58#define IRQ_UART2 (IRQ_VIC_START+28)
59#define IRQ_MSP2 30 59#define IRQ_MSP2 (IRQ_VIC_START+29)
60#define IRQ_L2CC 49 60#define IRQ_L2CC (IRQ_VIC_START+30)
61#define IRQ_HPI 50 61#define IRQ_HPI (IRQ_VIC_START+31)
62#define IRQ_SKE 51 62#define IRQ_SKE (IRQ_VIC_START+32)
63#define IRQ_KP 52 63#define IRQ_KP (IRQ_VIC_START+33)
64#define IRQ_MEMST 55 64#define IRQ_MEMST (IRQ_VIC_START+34)
65#define IRQ_SGA_IT 59 65#define IRQ_SGA_IT (IRQ_VIC_START+35)
66#define IRQ_USBM 61 66#define IRQ_USBM (IRQ_VIC_START+36)
67#define IRQ_MSP1 63 67#define IRQ_MSP1 (IRQ_VIC_START+37)
68 68
69#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) 69#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64)
70 70
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index f0e69cbc5baa..222d58c0ae76 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \ 6obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
7 serial.o devices.o dma.o 7 serial.o devices.o dma.o fb.o
8obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o 8obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
9 9
10ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) 10ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 3d2aa6f30192..2aab761ee68d 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
160 .ctrl_name = "internal", 160 .ctrl_name = "internal",
161}; 161};
162 162
163static struct omap_usb_config ams_delta_usb_config = { 163static struct omap_usb_config ams_delta_usb_config __initdata = {
164 .register_host = 1, 164 .register_host = 1,
165 .hmc_mode = 16, 165 .hmc_mode = 16,
166 .pins[0] = 2, 166 .pins[0] = 2,
diff --git a/arch/arm/mach-omap1/fb.c b/arch/arm/mach-omap1/fb.c
new file mode 100644
index 000000000000..c770d45c7226
--- /dev/null
+++ b/arch/arm/mach-omap1/fb.c
@@ -0,0 +1,80 @@
1/*
2 * File: arch/arm/plat-omap/fb.c
3 *
4 * Framebuffer device registration for TI OMAP platforms
5 *
6 * Copyright (C) 2006 Nokia Corporation
7 * Author: Imre Deak <imre.deak@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/init.h>
28#include <linux/platform_device.h>
29#include <linux/memblock.h>
30#include <linux/io.h>
31#include <linux/omapfb.h>
32#include <linux/dma-mapping.h>
33
34#include <asm/mach/map.h>
35
36#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
37
38static bool omapfb_lcd_configured;
39static struct omapfb_platform_data omapfb_config;
40
41static u64 omap_fb_dma_mask = ~(u32)0;
42
43static struct platform_device omap_fb_device = {
44 .name = "omapfb",
45 .id = -1,
46 .dev = {
47 .dma_mask = &omap_fb_dma_mask,
48 .coherent_dma_mask = DMA_BIT_MASK(32),
49 .platform_data = &omapfb_config,
50 },
51 .num_resources = 0,
52};
53
54void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
55{
56 omapfb_config.lcd = *config;
57 omapfb_lcd_configured = true;
58}
59
60static int __init omap_init_fb(void)
61{
62 /*
63 * If the board file has not set the lcd config with
64 * omapfb_set_lcd_config(), don't bother registering the omapfb device
65 */
66 if (!omapfb_lcd_configured)
67 return 0;
68
69 return platform_device_register(&omap_fb_device);
70}
71
72arch_initcall(omap_init_fb);
73
74#else
75
76void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
77{
78}
79
80#endif
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
index e962926b67bc..efc8f207f6fc 100644
--- a/arch/arm/mach-omap1/mailbox.c
+++ b/arch/arm/mach-omap1/mailbox.c
@@ -142,7 +142,7 @@ static struct omap_mbox mbox_dsp_info = {
142 142
143static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL }; 143static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL };
144 144
145static int __devinit omap1_mbox_probe(struct platform_device *pdev) 145static int omap1_mbox_probe(struct platform_device *pdev)
146{ 146{
147 struct resource *mem; 147 struct resource *mem;
148 int ret; 148 int ret;
@@ -165,7 +165,7 @@ static int __devinit omap1_mbox_probe(struct platform_device *pdev)
165 return 0; 165 return 0;
166} 166}
167 167
168static int __devexit omap1_mbox_remove(struct platform_device *pdev) 168static int omap1_mbox_remove(struct platform_device *pdev)
169{ 169{
170 omap_mbox_unregister(); 170 omap_mbox_unregister();
171 iounmap(mbox_base); 171 iounmap(mbox_base);
@@ -174,7 +174,7 @@ static int __devexit omap1_mbox_remove(struct platform_device *pdev)
174 174
175static struct platform_driver omap1_mbox_driver = { 175static struct platform_driver omap1_mbox_driver = {
176 .probe = omap1_mbox_probe, 176 .probe = omap1_mbox_probe,
177 .remove = __devexit_p(omap1_mbox_remove), 177 .remove = omap1_mbox_remove,
178 .driver = { 178 .driver = {
179 .name = "omap-mailbox", 179 .name = "omap-mailbox",
180 }, 180 },
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 1d4512fdc9bc..726ec23d29c7 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -145,7 +145,6 @@ static void omap_mpu_set_mode(enum clock_event_mode mode,
145static struct clock_event_device clockevent_mpu_timer1 = { 145static struct clock_event_device clockevent_mpu_timer1 = {
146 .name = "mpu_timer1", 146 .name = "mpu_timer1",
147 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 147 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
148 .shift = 32,
149 .set_next_event = omap_mpu_set_next_event, 148 .set_next_event = omap_mpu_set_next_event,
150 .set_mode = omap_mpu_set_mode, 149 .set_mode = omap_mpu_set_mode,
151}; 150};
@@ -170,15 +169,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
170 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); 169 setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
171 omap_mpu_timer_start(0, (rate / HZ) - 1, 1); 170 omap_mpu_timer_start(0, (rate / HZ) - 1, 1);
172 171
173 clockevent_mpu_timer1.mult = div_sc(rate, NSEC_PER_SEC,
174 clockevent_mpu_timer1.shift);
175 clockevent_mpu_timer1.max_delta_ns =
176 clockevent_delta2ns(-1, &clockevent_mpu_timer1);
177 clockevent_mpu_timer1.min_delta_ns =
178 clockevent_delta2ns(1, &clockevent_mpu_timer1);
179
180 clockevent_mpu_timer1.cpumask = cpumask_of(0); 172 clockevent_mpu_timer1.cpumask = cpumask_of(0);
181 clockevents_register_device(&clockevent_mpu_timer1); 173 clockevents_config_and_register(&clockevent_mpu_timer1, rate,
174 1, -1);
182} 175}
183 176
184 177
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 41152fadd4c0..0b74246ba62c 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -140,7 +140,6 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode,
140static struct clock_event_device clockevent_32k_timer = { 140static struct clock_event_device clockevent_32k_timer = {
141 .name = "32k-timer", 141 .name = "32k-timer",
142 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 142 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
143 .shift = 32,
144 .set_next_event = omap_32k_timer_set_next_event, 143 .set_next_event = omap_32k_timer_set_next_event,
145 .set_mode = omap_32k_timer_set_mode, 144 .set_mode = omap_32k_timer_set_mode,
146}; 145};
@@ -165,16 +164,9 @@ static __init void omap_init_32k_timer(void)
165{ 164{
166 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); 165 setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
167 166
168 clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
169 NSEC_PER_SEC,
170 clockevent_32k_timer.shift);
171 clockevent_32k_timer.max_delta_ns =
172 clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer);
173 clockevent_32k_timer.min_delta_ns =
174 clockevent_delta2ns(1, &clockevent_32k_timer);
175
176 clockevent_32k_timer.cpumask = cpumask_of(0); 167 clockevent_32k_timer.cpumask = cpumask_of(0);
177 clockevents_register_device(&clockevent_32k_timer); 168 clockevents_config_and_register(&clockevent_32k_timer,
169 OMAP_32K_TICKS_PER_SEC, 1, 0xfffffffe);
178} 170}
179 171
180/* 172/*
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 104fed366b8f..1a1db5971cd9 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
629static inline void omap_1510_usb_init(struct omap_usb_config *config) {} 629static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
630#endif 630#endif
631 631
632void __init omap1_usb_init(struct omap_usb_config *pdata) 632void __init omap1_usb_init(struct omap_usb_config *_pdata)
633{ 633{
634 struct omap_usb_config *pdata;
635
636 pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
637 if (!pdata)
638 return;
639
634 pdata->usb0_init = omap1_usb0_init; 640 pdata->usb0_init = omap1_usb0_init;
635 pdata->usb1_init = omap1_usb1_init; 641 pdata->usb1_init = omap1_usb1_init;
636 pdata->usb2_init = omap1_usb2_init; 642 pdata->usb2_init = omap1_usb2_init;
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index a8004f33b7e2..947cafe65aef 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ 6obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
7 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ 7 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
8 omap_device.o sram.o 8 omap_device.o sram.o
9 9
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index f5d5f5941d7d..f8eeef40efe8 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -26,10 +26,10 @@
26#include <linux/regulator/fixed.h> 26#include <linux/regulator/fixed.h>
27#include <linux/leds.h> 27#include <linux/leds.h>
28#include <linux/leds_pwm.h> 28#include <linux/leds_pwm.h>
29#include <linux/irqchip/arm-gic.h>
29#include <linux/platform_data/omap4-keypad.h> 30#include <linux/platform_data/omap4-keypad.h>
30#include <linux/usb/musb.h> 31#include <linux/usb/musb.h>
31 32
32#include <asm/hardware/gic.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
35#include <asm/mach/map.h> 35#include <asm/mach/map.h>
@@ -722,7 +722,6 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
722 .map_io = omap4_map_io, 722 .map_io = omap4_map_io,
723 .init_early = omap4430_init_early, 723 .init_early = omap4430_init_early,
724 .init_irq = gic_init_irq, 724 .init_irq = gic_init_irq,
725 .handle_irq = gic_handle_irq,
726 .init_machine = omap_4430sdp_init, 725 .init_machine = omap_4430sdp_init,
727 .init_late = omap4430_init_late, 726 .init_late = omap4430_init_late,
728 .init_time = omap4_local_timer_init, 727 .init_time = omap4_local_timer_init,
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 8a5f814613c6..2590463e4b57 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -16,7 +16,6 @@
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18 18
19#include <asm/hardware/gic.h>
20#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
21 20
22#include "common.h" 21#include "common.h"
@@ -156,7 +155,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
156 .map_io = omap4_map_io, 155 .map_io = omap4_map_io,
157 .init_early = omap4430_init_early, 156 .init_early = omap4430_init_early,
158 .init_irq = omap_gic_of_init, 157 .init_irq = omap_gic_of_init,
159 .handle_irq = gic_handle_irq,
160 .init_machine = omap_generic_init, 158 .init_machine = omap_generic_init,
161 .init_late = omap4430_init_late, 159 .init_late = omap4430_init_late,
162 .init_time = omap4_local_timer_init, 160 .init_time = omap4_local_timer_init,
@@ -177,7 +175,6 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
177 .map_io = omap5_map_io, 175 .map_io = omap5_map_io,
178 .init_early = omap5_init_early, 176 .init_early = omap5_init_early,
179 .init_irq = omap_gic_of_init, 177 .init_irq = omap_gic_of_init,
180 .handle_irq = gic_handle_irq,
181 .init_machine = omap_generic_init, 178 .init_machine = omap_generic_init,
182 .init_time = omap5_realtime_timer_init, 179 .init_time = omap5_realtime_timer_init,
183 .dt_compat = omap5_boards_compat, 180 .dt_compat = omap5_boards_compat,
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index ed8240c1a9b9..22838fa44a60 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -31,9 +31,9 @@
31#include <linux/ti_wilink_st.h> 31#include <linux/ti_wilink_st.h>
32#include <linux/usb/musb.h> 32#include <linux/usb/musb.h>
33#include <linux/wl12xx.h> 33#include <linux/wl12xx.h>
34#include <linux/irqchip/arm-gic.h>
34#include <linux/platform_data/omap-abe-twl6040.h> 35#include <linux/platform_data/omap-abe-twl6040.h>
35 36
36#include <asm/hardware/gic.h>
37#include <asm/mach-types.h> 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
@@ -453,7 +453,6 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
453 .map_io = omap4_map_io, 453 .map_io = omap4_map_io,
454 .init_early = omap4430_init_early, 454 .init_early = omap4430_init_early,
455 .init_irq = gic_init_irq, 455 .init_irq = gic_init_irq,
456 .handle_irq = gic_handle_irq,
457 .init_machine = omap4_panda_init, 456 .init_machine = omap4_panda_init,
458 .init_late = omap4430_init_late, 457 .init_late = omap4430_init_late,
459 .init_time = omap4_local_timer_init, 458 .init_time = omap4_local_timer_init,
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index bdf39481fbd6..6ef87580c33f 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
1167 .recalc_rate = &omap2_clksel_recalc, 1167 .recalc_rate = &omap2_clksel_recalc,
1168 .get_parent = &omap2_clksel_find_parent_index, 1168 .get_parent = &omap2_clksel_find_parent_index,
1169 .set_parent = &omap2_clksel_set_parent, 1169 .set_parent = &omap2_clksel_set_parent,
1170 .enable = &omap2_clkops_enable_clkdm,
1171 .disable = &omap2_clkops_disable_clkdm,
1170}; 1172};
1171 1173
1172static struct clk emu_src_ck; 1174static struct clk emu_src_ck;
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 3d944d3263d2..e6c328128a0a 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -234,7 +234,7 @@
234#define OMAP343X_PADCONF_ETK_D14 OMAP343X_PADCONF_ETK(16) 234#define OMAP343X_PADCONF_ETK_D14 OMAP343X_PADCONF_ETK(16)
235#define OMAP343X_PADCONF_ETK_D15 OMAP343X_PADCONF_ETK(17) 235#define OMAP343X_PADCONF_ETK_D15 OMAP343X_PADCONF_ETK(17)
236 236
237/* 34xx GENERAL_WKUP regist offsets */ 237/* 34xx GENERAL_WKUP register offsets */
238#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \ 238#define OMAP343X_CONTROL_WKUP_DEBOBSMUX(i) (OMAP343X_CONTROL_GENERAL_WKUP + \
239 0x008 + (i)) 239 0x008 + (i))
240#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008) 240#define OMAP343X_CONTROL_WKUP_DEBOBS0 (OMAP343X_CONTROL_GENERAL_WKUP + 0x008)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 2bb18838cba9..0a02aab5df67 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -504,8 +504,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
504 if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { 504 if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
505 freqsel = _omap3_dpll_compute_freqsel(clk, 505 freqsel = _omap3_dpll_compute_freqsel(clk,
506 dd->last_rounded_n); 506 dd->last_rounded_n);
507 if (!freqsel) 507 WARN_ON(!freqsel);
508 WARN_ON(1);
509 } 508 }
510 509
511 pr_debug("%s: %s: set rate: locking rate to %lu.\n", 510 pr_debug("%s: %s: set rate: locking rate to %lu.\n",
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index fce5aa3fff49..4c7566c7e24a 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -27,7 +27,6 @@
27 27
28#include "omap_device.h" 28#include "omap_device.h"
29#include "omap_hwmod.h" 29#include "omap_hwmod.h"
30#include <plat/cpu.h>
31 30
32#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) 31#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE)
33 32
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 679a0478644f..4be5cfc81ab8 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -31,8 +31,7 @@
31#include <video/omap-panel-nokia-dsi.h> 31#include <video/omap-panel-nokia-dsi.h>
32#include <video/omap-panel-picodlp.h> 32#include <video/omap-panel-picodlp.h>
33 33
34#include <plat/cpu.h> 34#include "soc.h"
35
36#include "dss-common.h" 35#include "dss-common.h"
37#include "mux.h" 36#include "mux.h"
38 37
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/mach-omap2/fb.c
index a3367b783fc7..d9bd965f6d07 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/mach-omap2/fb.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * File: arch/arm/plat-omap/fb.c
3 *
4 * Framebuffer device registration for TI OMAP platforms 2 * Framebuffer device registration for TI OMAP platforms
5 * 3 *
6 * Copyright (C) 2006 Nokia Corporation 4 * Copyright (C) 2006 Nokia Corporation
@@ -33,7 +31,7 @@
33 31
34#include <asm/mach/map.h> 32#include <asm/mach/map.h>
35 33
36#include <plat/cpu.h> 34#include "soc.h"
37 35
38#ifdef CONFIG_OMAP2_VRFB 36#ifdef CONFIG_OMAP2_VRFB
39 37
@@ -94,45 +92,7 @@ static int __init omap_init_vrfb(void)
94arch_initcall(omap_init_vrfb); 92arch_initcall(omap_init_vrfb);
95#endif 93#endif
96 94
97#if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) 95#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
98
99static bool omapfb_lcd_configured;
100static struct omapfb_platform_data omapfb_config;
101
102static u64 omap_fb_dma_mask = ~(u32)0;
103
104static struct platform_device omap_fb_device = {
105 .name = "omapfb",
106 .id = -1,
107 .dev = {
108 .dma_mask = &omap_fb_dma_mask,
109 .coherent_dma_mask = DMA_BIT_MASK(32),
110 .platform_data = &omapfb_config,
111 },
112 .num_resources = 0,
113};
114
115void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
116{
117 omapfb_config.lcd = *config;
118 omapfb_lcd_configured = true;
119}
120
121static int __init omap_init_fb(void)
122{
123 /*
124 * If the board file has not set the lcd config with
125 * omapfb_set_lcd_config(), don't bother registering the omapfb device
126 */
127 if (!omapfb_lcd_configured)
128 return 0;
129
130 return platform_device_register(&omap_fb_device);
131}
132
133arch_initcall(omap_init_fb);
134
135#elif defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
136 96
137static u64 omap_fb_dma_mask = ~(u32)0; 97static u64 omap_fb_dma_mask = ~(u32)0;
138static struct omapfb_platform_data omapfb_config; 98static struct omapfb_platform_data omapfb_config;
@@ -155,10 +115,4 @@ static int __init omap_init_fb(void)
155 115
156arch_initcall(omap_init_fb); 116arch_initcall(omap_init_fb);
157 117
158#else
159
160void __init omapfb_set_lcd_config(const struct omap_lcd_config *config)
161{
162}
163
164#endif 118#endif
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 65468f6d7f0e..8033cb747c86 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -744,7 +744,7 @@ static int gpmc_setup_irq(void)
744 return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); 744 return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
745} 745}
746 746
747static __devexit int gpmc_free_irq(void) 747static int gpmc_free_irq(void)
748{ 748{
749 int i; 749 int i;
750 750
@@ -762,7 +762,7 @@ static __devexit int gpmc_free_irq(void)
762 return 0; 762 return 0;
763} 763}
764 764
765static void __devexit gpmc_mem_exit(void) 765static void gpmc_mem_exit(void)
766{ 766{
767 int cs; 767 int cs;
768 768
@@ -774,7 +774,7 @@ static void __devexit gpmc_mem_exit(void)
774 774
775} 775}
776 776
777static int __devinit gpmc_mem_init(void) 777static int gpmc_mem_init(void)
778{ 778{
779 int cs, rc; 779 int cs, rc;
780 unsigned long boot_rom_space = 0; 780 unsigned long boot_rom_space = 0;
@@ -1121,7 +1121,7 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
1121 return 0; 1121 return 0;
1122} 1122}
1123 1123
1124static __devinit int gpmc_probe(struct platform_device *pdev) 1124static int gpmc_probe(struct platform_device *pdev)
1125{ 1125{
1126 int rc; 1126 int rc;
1127 u32 l; 1127 u32 l;
@@ -1177,7 +1177,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
1177 return 0; 1177 return 0;
1178} 1178}
1179 1179
1180static __devexit int gpmc_remove(struct platform_device *pdev) 1180static int gpmc_remove(struct platform_device *pdev)
1181{ 1181{
1182 gpmc_free_irq(); 1182 gpmc_free_irq();
1183 gpmc_mem_exit(); 1183 gpmc_mem_exit();
@@ -1187,7 +1187,7 @@ static __devexit int gpmc_remove(struct platform_device *pdev)
1187 1187
1188static struct platform_driver gpmc_driver = { 1188static struct platform_driver gpmc_driver = {
1189 .probe = gpmc_probe, 1189 .probe = gpmc_probe,
1190 .remove = __devexit_p(gpmc_remove), 1190 .remove = gpmc_remove,
1191 .driver = { 1191 .driver = {
1192 .name = DEVICE_NAME, 1192 .name = DEVICE_NAME,
1193 .owner = THIS_MODULE, 1193 .owner = THIS_MODULE,
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 0d974565f8ca..0b080267b7f6 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -342,7 +342,7 @@ struct omap_mbox mbox_2_info = {
342struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; 342struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL };
343#endif 343#endif
344 344
345static int __devinit omap2_mbox_probe(struct platform_device *pdev) 345static int omap2_mbox_probe(struct platform_device *pdev)
346{ 346{
347 struct resource *mem; 347 struct resource *mem;
348 int ret; 348 int ret;
@@ -395,7 +395,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev)
395 return 0; 395 return 0;
396} 396}
397 397
398static int __devexit omap2_mbox_remove(struct platform_device *pdev) 398static int omap2_mbox_remove(struct platform_device *pdev)
399{ 399{
400 omap_mbox_unregister(); 400 omap_mbox_unregister();
401 iounmap(mbox_base); 401 iounmap(mbox_base);
@@ -404,7 +404,7 @@ static int __devexit omap2_mbox_remove(struct platform_device *pdev)
404 404
405static struct platform_driver omap2_mbox_driver = { 405static struct platform_driver omap2_mbox_driver = {
406 .probe = omap2_mbox_probe, 406 .probe = omap2_mbox_probe,
407 .remove = __devexit_p(omap2_mbox_remove), 407 .remove = omap2_mbox_remove,
408 .driver = { 408 .driver = {
409 .name = "omap-mailbox", 409 .name = "omap-mailbox",
410 }, 410 },
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index cd42d921940d..361677983af0 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -19,9 +19,9 @@
19#include <linux/device.h> 19#include <linux/device.h>
20#include <linux/smp.h> 20#include <linux/smp.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/irqchip/arm-gic.h>
22 23
23#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
24#include <asm/hardware/gic.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26 26
27#include "omap-secure.h" 27#include "omap-secure.h"
@@ -157,7 +157,7 @@ static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *
157 booted = true; 157 booted = true;
158 } 158 }
159 159
160 gic_raise_softirq(cpumask_of(cpu), 0); 160 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
161 161
162 /* 162 /*
163 * Now the secondary core is starting up let it run its 163 * Now the secondary core is starting up let it run its
@@ -231,8 +231,6 @@ static void __init omap4_smp_init_cpus(void)
231 231
232 for (i = 0; i < ncores; i++) 232 for (i = 0; i < ncores; i++)
233 set_cpu_possible(i, true); 233 set_cpu_possible(i, true);
234
235 set_smp_cross_call(gic_raise_softirq);
236} 234}
237 235
238static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) 236static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 5d3b4f4f81ae..8c5b5e3e3541 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -24,8 +24,7 @@
24#include <linux/cpu.h> 24#include <linux/cpu.h>
25#include <linux/notifier.h> 25#include <linux/notifier.h>
26#include <linux/cpu_pm.h> 26#include <linux/cpu_pm.h>
27 27#include <linux/irqchip/arm-gic.h>
28#include <asm/hardware/gic.h>
29 28
30#include "omap-wakeupgen.h" 29#include "omap-wakeupgen.h"
31#include "omap-secure.h" 30#include "omap-secure.h"
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6897ae21bb82..547094883606 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -15,13 +15,14 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/irqchip.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/memblock.h> 20#include <linux/memblock.h>
20#include <linux/of_irq.h> 21#include <linux/of_irq.h>
21#include <linux/of_platform.h> 22#include <linux/of_platform.h>
22#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/irqchip/arm-gic.h>
23 25
24#include <asm/hardware/gic.h>
25#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <asm/memblock.h> 28#include <asm/memblock.h>
@@ -255,16 +256,10 @@ static int __init omap4_sar_ram_init(void)
255} 256}
256early_initcall(omap4_sar_ram_init); 257early_initcall(omap4_sar_ram_init);
257 258
258static struct of_device_id irq_match[] __initdata = {
259 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
260 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
261 { }
262};
263
264void __init omap_gic_of_init(void) 259void __init omap_gic_of_init(void)
265{ 260{
266 omap_wakeupgen_init(); 261 omap_wakeupgen_init();
267 of_irq_init(irq_match); 262 irqchip_init();
268} 263}
269 264
270#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) 265#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 081c71edddf4..646c14d9fdb9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
2070 { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, }, 2070 { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
2071 { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, }, 2071 { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
2072 { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, }, 2072 { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
2073 { .irq = -1 + OMAP_INTC_START, }, 2073 { .irq = -1, },
2074}; 2074};
2075 2075
2076static struct omap_hwmod am33xx_usbss_hwmod = { 2076static struct omap_hwmod am33xx_usbss_hwmod = {
@@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
2515 .user = OCP_USER_MPU, 2515 .user = OCP_USER_MPU,
2516}; 2516};
2517 2517
2518struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { 2518static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2519 { 2519 {
2520 .pa_start = 0x4A101000, 2520 .pa_start = 0x4A101000,
2521 .pa_end = 0x4A101000 + SZ_256 - 1, 2521 .pa_end = 0x4A101000 + SZ_256 - 1,
@@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2523 { } 2523 { }
2524}; 2524};
2525 2525
2526struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { 2526static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
2527 .master = &am33xx_cpgmac0_hwmod, 2527 .master = &am33xx_cpgmac0_hwmod,
2528 .slave = &am33xx_mdio_hwmod, 2528 .slave = &am33xx_mdio_hwmod,
2529 .addr = am33xx_mdio_addr_space, 2529 .addr = am33xx_mdio_addr_space,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index f9fab942d5ba..129d5081ed15 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -26,7 +26,6 @@
26 26
27#include <linux/omap-dma.h> 27#include <linux/omap-dma.h>
28 28
29#include <linux/platform_data/omap_ocp2scp.h>
30#include <linux/platform_data/spi-omap2-mcspi.h> 29#include <linux/platform_data/spi-omap2-mcspi.h>
31#include <linux/platform_data/asoc-ti-mcbsp.h> 30#include <linux/platform_data/asoc-ti-mcbsp.h>
32#include <linux/platform_data/iommu-omap.h> 31#include <linux/platform_data/iommu-omap.h>
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index fefd40166624..615e5b1fb025 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -292,8 +292,8 @@ int __init omap3_twl_set_sr_bit(bool enable)
292 if (twl_sr_enable_autoinit) 292 if (twl_sr_enable_autoinit)
293 pr_warning("%s: unexpected multiple calls\n", __func__); 293 pr_warning("%s: unexpected multiple calls\n", __func__);
294 294
295 ret = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &temp, 295 ret = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
296 TWL4030_DCDC_GLOBAL_CFG); 296 TWL4030_DCDC_GLOBAL_CFG);
297 if (ret) 297 if (ret)
298 goto err; 298 goto err;
299 299
@@ -302,8 +302,8 @@ int __init omap3_twl_set_sr_bit(bool enable)
302 else 302 else
303 temp &= ~SMARTREFLEX_ENABLE; 303 temp &= ~SMARTREFLEX_ENABLE;
304 304
305 ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, temp, 305 ret = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
306 TWL4030_DCDC_GLOBAL_CFG); 306 TWL4030_DCDC_GLOBAL_CFG);
307 if (!ret) { 307 if (!ret) {
308 twl_sr_enable_autoinit = true; 308 twl_sr_enable_autoinit = true;
309 return 0; 309 return 0;
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index 250d909e38bd..eb78ae7a3464 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -11,8 +11,6 @@
11 * the Free Software Foundation; either version 2 of the License, or 11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version. 12 * (at your option) any later version.
13 */ 13 */
14#include <linux/pm_runtime.h>
15
16#include <asm/pmu.h> 14#include <asm/pmu.h>
17 15
18#include "soc.h" 16#include "soc.h"
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index faeab18696df..418de9c3b319 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -18,9 +18,8 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20 20
21#include "soc.h"
21#include "common.h" 22#include "common.h"
22#include <plat/cpu.h>
23
24#include "vp.h" 23#include "vp.h"
25#include "powerdomain.h" 24#include "powerdomain.h"
26#include "clockdomain.h" 25#include "clockdomain.h"
@@ -29,6 +28,14 @@
29#include "prm-regbits-24xx.h" 28#include "prm-regbits-24xx.h"
30 29
31/* 30/*
31 * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
32 * these are reversed from the bits used on OMAP3+
33 */
34#define OMAP24XX_PWRDM_POWER_ON 0x0
35#define OMAP24XX_PWRDM_POWER_RET 0x1
36#define OMAP24XX_PWRDM_POWER_OFF 0x3
37
38/*
32 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP 39 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
33 * hardware register (which are specific to the OMAP2xxx SoCs) to 40 * hardware register (which are specific to the OMAP2xxx SoCs) to
34 * reset source ID bit shifts (which is an OMAP SoC-independent 41 * reset source ID bit shifts (which is an OMAP SoC-independent
@@ -69,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
69} 76}
70 77
71/** 78/**
79 * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
80 * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
81 *
82 * Return the common power state bits corresponding to the OMAP2xxx
83 * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
84 */
85static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
86{
87 u8 pwrst;
88
89 switch (omap2xxx_pwrst) {
90 case OMAP24XX_PWRDM_POWER_OFF:
91 pwrst = PWRDM_POWER_OFF;
92 break;
93 case OMAP24XX_PWRDM_POWER_RET:
94 pwrst = PWRDM_POWER_RET;
95 break;
96 case OMAP24XX_PWRDM_POWER_ON:
97 pwrst = PWRDM_POWER_ON;
98 break;
99 default:
100 return -EINVAL;
101 }
102
103 return pwrst;
104}
105
106/**
72 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC 107 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
73 * 108 *
74 * Set the DPLL reset bit, which should reboot the SoC. This is the 109 * Set the DPLL reset bit, which should reboot the SoC. This is the
@@ -98,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
98 return 0; 133 return 0;
99} 134}
100 135
136static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
137{
138 u8 omap24xx_pwrst;
139
140 switch (pwrst) {
141 case PWRDM_POWER_OFF:
142 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
143 break;
144 case PWRDM_POWER_RET:
145 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
146 break;
147 case PWRDM_POWER_ON:
148 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
149 break;
150 default:
151 return -EINVAL;
152 }
153
154 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
155 (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
156 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
157 return 0;
158}
159
160static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
161{
162 u8 omap2xxx_pwrst;
163
164 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
165 OMAP2_PM_PWSTCTRL,
166 OMAP_POWERSTATE_MASK);
167
168 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
169}
170
171static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
172{
173 u8 omap2xxx_pwrst;
174
175 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
176 OMAP2_PM_PWSTST,
177 OMAP_POWERSTATEST_MASK);
178
179 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
180}
181
101struct pwrdm_ops omap2_pwrdm_operations = { 182struct pwrdm_ops omap2_pwrdm_operations = {
102 .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, 183 .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
103 .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, 184 .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
104 .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, 185 .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
105 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, 186 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
106 .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, 187 .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
107 .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, 188 .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 30517f5af707..a3e121f94a86 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
103/* Powerdomain low-level functions */ 103/* Powerdomain low-level functions */
104 104
105/* Common functions across OMAP2 and OMAP3 */ 105/* Common functions across OMAP2 and OMAP3 */
106int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
107{
108 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
109 (pwrst << OMAP_POWERSTATE_SHIFT),
110 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
111 return 0;
112}
113
114int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
115{
116 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
117 OMAP2_PM_PWSTCTRL,
118 OMAP_POWERSTATE_MASK);
119}
120
121int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
122{
123 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
124 OMAP2_PM_PWSTST,
125 OMAP_POWERSTATEST_MASK);
126}
127
128int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, 106int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
129 u8 pwrst) 107 u8 pwrst)
130{ 108{
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index db198d058584..e648bd55b072 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -18,9 +18,8 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20 20
21#include "soc.h"
21#include "common.h" 22#include "common.h"
22#include <plat/cpu.h>
23
24#include "vp.h" 23#include "vp.h"
25#include "powerdomain.h" 24#include "powerdomain.h"
26#include "prm3xxx.h" 25#include "prm3xxx.h"
@@ -278,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
278 277
279/* Powerdomain low-level functions */ 278/* Powerdomain low-level functions */
280 279
280static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
281{
282 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
283 (pwrst << OMAP_POWERSTATE_SHIFT),
284 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
285 return 0;
286}
287
288static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
289{
290 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
291 OMAP2_PM_PWSTCTRL,
292 OMAP_POWERSTATE_MASK);
293}
294
295static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
296{
297 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
298 OMAP2_PM_PWSTST,
299 OMAP_POWERSTATEST_MASK);
300}
301
281/* Applicable only for OMAP3. Not supported on OMAP2 */ 302/* Applicable only for OMAP3. Not supported on OMAP2 */
282static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) 303static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
283{ 304{
@@ -356,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
356} 377}
357 378
358struct pwrdm_ops omap3_pwrdm_operations = { 379struct pwrdm_ops omap3_pwrdm_operations = {
359 .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, 380 .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
360 .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, 381 .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
361 .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, 382 .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
362 .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, 383 .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
363 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, 384 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
364 .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, 385 .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 7498bc77fe8b..c05a343d465d 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
56 * enumeration) 56 * enumeration)
57 */ 57 */
58static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { 58static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
59 { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, 59 { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT,
60 OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, 60 OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
61 { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, 61 { OMAP4430_GLOBAL_COLD_RST_SHIFT,
62 OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, 62 OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
63 { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, 63 { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
64 OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, 64 OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
@@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void)
333 u32 r = 0; 333 u32 r = 0;
334 u32 v; 334 u32 v;
335 335
336 v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 336 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
337 OMAP4_RM_RSTST); 337 OMAP4_RM_RSTST);
338 338
339 p = omap44xx_prm_reset_src_map; 339 p = omap44xx_prm_reset_src_map;
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 22b0979206ca..8ee1fbdec561 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -62,8 +62,8 @@
62 62
63/* OMAP4 specific register offsets */ 63/* OMAP4 specific register offsets */
64#define OMAP4_RM_RSTCTRL 0x0000 64#define OMAP4_RM_RSTCTRL 0x0000
65#define OMAP4_RM_RSTTIME 0x0004 65#define OMAP4_RM_RSTST 0x0004
66#define OMAP4_RM_RSTST 0x0008 66#define OMAP4_RM_RSTTIME 0x0008
67#define OMAP4_PM_PWSTCTRL 0x0000 67#define OMAP4_PM_PWSTCTRL 0x0000
68#define OMAP4_PM_PWSTST 0x0004 68#define OMAP4_PM_PWSTST 0x0004
69 69
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 5975a42e16d4..57b1ee39fe56 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -131,7 +131,6 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
131static struct clock_event_device clockevent_gpt = { 131static struct clock_event_device clockevent_gpt = {
132 .name = "gp_timer", 132 .name = "gp_timer",
133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 133 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
134 .shift = 32,
135 .rating = 300, 134 .rating = 300,
136 .set_next_event = omap2_gp_timer_set_next_event, 135 .set_next_event = omap2_gp_timer_set_next_event,
137 .set_mode = omap2_gp_timer_set_mode, 136 .set_mode = omap2_gp_timer_set_mode,
@@ -340,17 +339,11 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
340 339
341 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); 340 __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
342 341
343 clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
344 clockevent_gpt.shift);
345 clockevent_gpt.max_delta_ns =
346 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
347 clockevent_gpt.min_delta_ns =
348 clockevent_delta2ns(3, &clockevent_gpt);
349 /* Timer internal resynch latency. */
350
351 clockevent_gpt.cpumask = cpu_possible_mask; 342 clockevent_gpt.cpumask = cpu_possible_mask;
352 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); 343 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
353 clockevents_register_device(&clockevent_gpt); 344 clockevents_config_and_register(&clockevent_gpt, clkev.rate,
345 3, /* Timer internal resynch latency */
346 0xffffffff);
354 347
355 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", 348 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
356 gptimer_id, clkev.rate); 349 gptimer_id, clkev.rate);
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index cd50e328db2a..d9c7c3bf0d9c 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -506,7 +506,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
506/***************************************************************************** 506/*****************************************************************************
507 * General PCIe + PCI 507 * General PCIe + PCI
508 ****************************************************************************/ 508 ****************************************************************************/
509static void __devinit rc_pci_fixup(struct pci_dev *dev) 509static void rc_pci_fixup(struct pci_dev *dev)
510{ 510{
511 /* 511 /*
512 * Prevent enumeration of root complex. 512 * Prevent enumeration of root complex.
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 518c59bdbcda..70b441ad1d18 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/delay.h> 10#include <linux/delay.h>
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/irqchip.h>
12#include <linux/irqdomain.h> 13#include <linux/irqdomain.h>
13#include <linux/of.h> 14#include <linux/of.h>
14#include <linux/of_address.h> 15#include <linux/of_address.h>
@@ -17,7 +18,6 @@
17#include <linux/dw_apb_timer.h> 18#include <linux/dw_apb_timer.h>
18 19
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20#include <asm/hardware/vic.h>
21#include <asm/mach/map.h> 21#include <asm/mach/map.h>
22 22
23#include "common.h" 23#include "common.h"
@@ -70,16 +70,6 @@ static const char *picoxcell_dt_match[] = {
70 NULL 70 NULL
71}; 71};
72 72
73static const struct of_device_id vic_of_match[] __initconst = {
74 { .compatible = "arm,pl192-vic", .data = vic_of_init, },
75 { /* Sentinel */ }
76};
77
78static void __init picoxcell_init_irq(void)
79{
80 of_irq_init(vic_of_match);
81}
82
83static void picoxcell_wdt_restart(char mode, const char *cmd) 73static void picoxcell_wdt_restart(char mode, const char *cmd)
84{ 74{
85 /* 75 /*
@@ -97,8 +87,7 @@ static void picoxcell_wdt_restart(char mode, const char *cmd)
97DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 87DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
98 .map_io = picoxcell_map_io, 88 .map_io = picoxcell_map_io,
99 .nr_irqs = NR_IRQS_LEGACY, 89 .nr_irqs = NR_IRQS_LEGACY,
100 .init_irq = picoxcell_init_irq, 90 .init_irq = irqchip_init,
101 .handle_irq = vic_handle_irq,
102 .init_time = dw_apb_timer_init, 91 .init_time = dw_apb_timer_init,
103 .init_machine = picoxcell_init_machine, 92 .init_machine = picoxcell_init_machine,
104 .dt_compat = picoxcell_dt_match, 93 .dt_compat = picoxcell_dt_match,
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index fb5a7910af35..9936c180bf01 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -123,7 +123,7 @@ static const struct of_device_id memc_ids[] = {
123 {} 123 {}
124}; 124};
125 125
126static int __devinit sirfsoc_memc_probe(struct platform_device *op) 126static int sirfsoc_memc_probe(struct platform_device *op)
127{ 127{
128 struct device_node *np = op->dev.of_node; 128 struct device_node *np = op->dev.of_node;
129 129
diff --git a/arch/arm/mach-prima2/rtciobrg.c b/arch/arm/mach-prima2/rtciobrg.c
index fc6c4ab963f2..9f2da2eec4dc 100644
--- a/arch/arm/mach-prima2/rtciobrg.c
+++ b/arch/arm/mach-prima2/rtciobrg.c
@@ -108,7 +108,7 @@ static const struct of_device_id rtciobrg_ids[] = {
108 {} 108 {}
109}; 109};
110 110
111static int __devinit sirfsoc_rtciobrg_probe(struct platform_device *op) 111static int sirfsoc_rtciobrg_probe(struct platform_device *op)
112{ 112{
113 struct device_node *np = op->dev.of_node; 113 struct device_node *np = op->dev.of_node;
114 114
diff --git a/arch/arm/mach-prima2/timer-prima2.c b/arch/arm/mach-prima2/timer-prima2.c
index 309e724735b7..6da584f8a949 100644
--- a/arch/arm/mach-prima2/timer-prima2.c
+++ b/arch/arm/mach-prima2/timer-prima2.c
@@ -175,15 +175,9 @@ static u32 notrace sirfsoc_read_sched_clock(void)
175 175
176static void __init sirfsoc_clockevent_init(void) 176static void __init sirfsoc_clockevent_init(void)
177{ 177{
178 clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60);
179
180 sirfsoc_clockevent.max_delta_ns =
181 clockevent_delta2ns(-2, &sirfsoc_clockevent);
182 sirfsoc_clockevent.min_delta_ns =
183 clockevent_delta2ns(2, &sirfsoc_clockevent);
184
185 sirfsoc_clockevent.cpumask = cpumask_of(0); 178 sirfsoc_clockevent.cpumask = cpumask_of(0);
186 clockevents_register_device(&sirfsoc_clockevent); 179 clockevents_config_and_register(&sirfsoc_clockevent, CLOCK_TICK_RATE,
180 2, -2);
187} 181}
188 182
189/* initialize the kernel jiffy timer source */ 183/* initialize the kernel jiffy timer source */
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 048c4299473c..7a39efc50865 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -198,7 +198,7 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
198 198
199static struct platform_device *corgipm_device; 199static struct platform_device *corgipm_device;
200 200
201static int __devinit corgipm_init(void) 201static int corgipm_init(void)
202{ 202{
203 int ret; 203 int ret;
204 204
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index ec55c575ed19..0a36d3585f26 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -829,7 +829,7 @@ static const struct platform_suspend_ops sharpsl_pm_ops = {
829}; 829};
830#endif 830#endif
831 831
832static int __devinit sharpsl_pm_probe(struct platform_device *pdev) 832static int sharpsl_pm_probe(struct platform_device *pdev)
833{ 833{
834 int ret, irq; 834 int ret, irq;
835 835
@@ -941,7 +941,7 @@ static struct platform_driver sharpsl_pm_driver = {
941 }, 941 },
942}; 942};
943 943
944static int __devinit sharpsl_pm_init(void) 944static int sharpsl_pm_init(void)
945{ 945{
946 return platform_driver_register(&sharpsl_pm_driver); 946 return platform_driver_register(&sharpsl_pm_driver);
947} 947}
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 842596d4d31e..e191f9996b26 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -232,7 +232,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
232 232
233static struct platform_device *spitzpm_device; 233static struct platform_device *spitzpm_device;
234 234
235static int __devinit spitzpm_init(void) 235static int spitzpm_init(void)
236{ 236{
237 int ret; 237 int ret;
238 238
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index bea19a06b2bf..8f1ee92aea30 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -151,16 +151,12 @@ void __init pxa_timer_init(void)
151 151
152 setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); 152 setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
153 153
154 clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
155 ckevt_pxa_osmr0.max_delta_ns =
156 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
157 ckevt_pxa_osmr0.min_delta_ns =
158 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
159 ckevt_pxa_osmr0.cpumask = cpumask_of(0); 154 ckevt_pxa_osmr0.cpumask = cpumask_of(0);
160 155
161 setup_irq(IRQ_OST0, &pxa_ost0_irq); 156 setup_irq(IRQ_OST0, &pxa_ost0_irq);
162 157
163 clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32, 158 clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32,
164 clocksource_mmio_readl_up); 159 clocksource_mmio_readl_up);
165 clockevents_register_device(&ckevt_pxa_osmr0); 160 clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
161 MIN_OSCR_DELTA * 2, 0x7fffffff);
166} 162}
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c
index b9b1e5c2b290..fc3646c2c694 100644
--- a/arch/arm/mach-pxa/tosa-bt.c
+++ b/arch/arm/mach-pxa/tosa-bt.c
@@ -102,7 +102,7 @@ err_reset:
102 return rc; 102 return rc;
103} 103}
104 104
105static int __devexit tosa_bt_remove(struct platform_device *dev) 105static int tosa_bt_remove(struct platform_device *dev)
106{ 106{
107 struct tosa_bt_data *data = dev->dev.platform_data; 107 struct tosa_bt_data *data = dev->dev.platform_data;
108 struct rfkill *rfk = platform_get_drvdata(dev); 108 struct rfkill *rfk = platform_get_drvdata(dev);
@@ -125,7 +125,7 @@ static int __devexit tosa_bt_remove(struct platform_device *dev)
125 125
126static struct platform_driver tosa_bt_driver = { 126static struct platform_driver tosa_bt_driver = {
127 .probe = tosa_bt_probe, 127 .probe = tosa_bt_probe,
128 .remove = __devexit_p(tosa_bt_remove), 128 .remove = tosa_bt_remove,
129 129
130 .driver = { 130 .driver = {
131 .name = "tosa-bt", 131 .name = "tosa-bt",
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 682467480588..1d5ee5c9a1dc 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -42,7 +42,6 @@
42#include <asm/mach/irq.h> 42#include <asm/mach/irq.h>
43#include <asm/mach/map.h> 43#include <asm/mach/map.h>
44 44
45#include <asm/hardware/gic.h>
46 45
47#include <mach/platform.h> 46#include <mach/platform.h>
48#include <mach/irqs.h> 47#include <mach/irqs.h>
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 300f7064465d..98e3052b7933 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -14,7 +14,6 @@
14#include <linux/io.h> 14#include <linux/io.h>
15 15
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17#include <asm/hardware/gic.h>
18#include <asm/mach-types.h> 17#include <asm/mach-types.h>
19#include <asm/smp_scu.h> 18#include <asm/smp_scu.h>
20 19
@@ -59,8 +58,6 @@ static void __init realview_smp_init_cpus(void)
59 58
60 for (i = 0; i < ncores; i++) 59 for (i = 0; i < ncores; i++)
61 set_cpu_possible(i, true); 60 set_cpu_possible(i, true);
62
63 set_smp_cross_call(gic_raise_softirq);
64} 61}
65 62
66static void __init realview_smp_prepare_cpus(unsigned int max_cpus) 63static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index f892862fd6ae..5b1c8bfe6fa9 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -27,13 +27,13 @@
27#include <linux/amba/mmci.h> 27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h> 28#include <linux/amba/pl022.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h>
30#include <linux/platform_data/clk-realview.h> 31#include <linux/platform_data/clk-realview.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/hardware/gic.h>
37#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
38#include <asm/smp_twd.h> 38#include <asm/smp_twd.h>
39 39
@@ -469,7 +469,6 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
469 .init_early = realview_init_early, 469 .init_early = realview_init_early,
470 .init_irq = gic_init_irq, 470 .init_irq = gic_init_irq,
471 .init_time = realview_eb_timer_init, 471 .init_time = realview_eb_timer_init,
472 .handle_irq = gic_handle_irq,
473 .init_machine = realview_eb_init, 472 .init_machine = realview_eb_init,
474#ifdef CONFIG_ZONE_DMA 473#ifdef CONFIG_ZONE_DMA
475 .dma_zone_size = SZ_256M, 474 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 6a4524b93fc6..d5e83a1f6982 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -29,13 +29,13 @@
29#include <linux/mtd/physmap.h> 29#include <linux/mtd/physmap.h>
30#include <linux/mtd/partitions.h> 30#include <linux/mtd/partitions.h>
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/irqchip/arm-gic.h>
32#include <linux/platform_data/clk-realview.h> 33#include <linux/platform_data/clk-realview.h>
33 34
34#include <mach/hardware.h> 35#include <mach/hardware.h>
35#include <asm/irq.h> 36#include <asm/irq.h>
36#include <asm/mach-types.h> 37#include <asm/mach-types.h>
37#include <asm/pgtable.h> 38#include <asm/pgtable.h>
38#include <asm/hardware/gic.h>
39#include <asm/hardware/cache-l2x0.h> 39#include <asm/hardware/cache-l2x0.h>
40 40
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -381,7 +381,6 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
381 .init_early = realview_init_early, 381 .init_early = realview_init_early,
382 .init_irq = gic_init_irq, 382 .init_irq = gic_init_irq,
383 .init_time = realview_pb1176_timer_init, 383 .init_time = realview_pb1176_timer_init,
384 .handle_irq = gic_handle_irq,
385 .init_machine = realview_pb1176_init, 384 .init_machine = realview_pb1176_init,
386#ifdef CONFIG_ZONE_DMA 385#ifdef CONFIG_ZONE_DMA
387 .dma_zone_size = SZ_256M, 386 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 502f6e6c6913..c3cfe213b5e6 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -27,13 +27,13 @@
27#include <linux/amba/mmci.h> 27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h> 28#include <linux/amba/pl022.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h>
30#include <linux/platform_data/clk-realview.h> 31#include <linux/platform_data/clk-realview.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/hardware/gic.h>
37#include <asm/hardware/cache-l2x0.h> 37#include <asm/hardware/cache-l2x0.h>
38#include <asm/smp_twd.h> 38#include <asm/smp_twd.h>
39 39
@@ -364,7 +364,6 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
364 .init_early = realview_init_early, 364 .init_early = realview_init_early,
365 .init_irq = gic_init_irq, 365 .init_irq = gic_init_irq,
366 .init_time = realview_pb11mp_timer_init, 366 .init_time = realview_pb11mp_timer_init,
367 .handle_irq = gic_handle_irq,
368 .init_machine = realview_pb11mp_init, 367 .init_machine = realview_pb11mp_init,
369#ifdef CONFIG_ZONE_DMA 368#ifdef CONFIG_ZONE_DMA
370 .dma_zone_size = SZ_256M, 369 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 85c81aaa05e8..dde652a59620 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -27,12 +27,12 @@
27#include <linux/amba/mmci.h> 27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h> 28#include <linux/amba/pl022.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/irqchip/arm-gic.h>
30#include <linux/platform_data/clk-realview.h> 31#include <linux/platform_data/clk-realview.h>
31 32
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34#include <asm/pgtable.h> 35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h>
36 36
37#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
38#include <asm/mach/map.h> 38#include <asm/mach/map.h>
@@ -305,7 +305,6 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
305 .init_early = realview_init_early, 305 .init_early = realview_init_early,
306 .init_irq = gic_init_irq, 306 .init_irq = gic_init_irq,
307 .init_time = realview_pba8_timer_init, 307 .init_time = realview_pba8_timer_init,
308 .handle_irq = gic_handle_irq,
309 .init_machine = realview_pba8_init, 308 .init_machine = realview_pba8_init,
310#ifdef CONFIG_ZONE_DMA 309#ifdef CONFIG_ZONE_DMA
311 .dma_zone_size = SZ_256M, 310 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index a15a7b0be29b..54f0185b01e3 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -26,13 +26,13 @@
26#include <linux/amba/mmci.h> 26#include <linux/amba/mmci.h>
27#include <linux/amba/pl022.h> 27#include <linux/amba/pl022.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/irqchip/arm-gic.h>
29#include <linux/platform_data/clk-realview.h> 30#include <linux/platform_data/clk-realview.h>
30 31
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33#include <asm/smp_twd.h> 34#include <asm/smp_twd.h>
34#include <asm/pgtable.h> 35#include <asm/pgtable.h>
35#include <asm/hardware/gic.h>
36#include <asm/hardware/cache-l2x0.h> 36#include <asm/hardware/cache-l2x0.h>
37 37
38#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
@@ -401,7 +401,6 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
401 .init_early = realview_init_early, 401 .init_early = realview_init_early,
402 .init_irq = gic_init_irq, 402 .init_irq = gic_init_irq,
403 .init_time = realview_pbx_timer_init, 403 .init_time = realview_pbx_timer_init,
404 .handle_irq = gic_handle_irq,
405 .init_machine = realview_pbx_init, 404 .init_machine = realview_pbx_init,
406#ifdef CONFIG_ZONE_DMA 405#ifdef CONFIG_ZONE_DMA
407 .dma_zone_size = SZ_256M, 406 .dma_zone_size = SZ_256M,
diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
index 57aee916bdb1..3f40c61b6e02 100644
--- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c
@@ -62,7 +62,7 @@ static const struct rfkill_ops h1940bt_rfkill_ops = {
62 .set_block = h1940bt_set_block, 62 .set_block = h1940bt_set_block,
63}; 63};
64 64
65static int __devinit h1940bt_probe(struct platform_device *pdev) 65static int h1940bt_probe(struct platform_device *pdev)
66{ 66{
67 struct rfkill *rfk; 67 struct rfkill *rfk;
68 int ret = 0; 68 int ret = 0;
diff --git a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
index 5876c6ba7500..45e74363aaa9 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c
@@ -93,7 +93,7 @@ static struct notifier_block osiris_dvs_nb = {
93 .notifier_call = osiris_dvs_notify, 93 .notifier_call = osiris_dvs_notify,
94}; 94};
95 95
96static int __devinit osiris_dvs_probe(struct platform_device *pdev) 96static int osiris_dvs_probe(struct platform_device *pdev)
97{ 97{
98 int ret; 98 int ret;
99 99
@@ -126,7 +126,7 @@ err_nogpio:
126 return ret; 126 return ret;
127} 127}
128 128
129static int __devexit osiris_dvs_remove(struct platform_device *pdev) 129static int osiris_dvs_remove(struct platform_device *pdev)
130{ 130{
131 dev_info(&pdev->dev, "exiting\n"); 131 dev_info(&pdev->dev, "exiting\n");
132 132
@@ -167,7 +167,7 @@ static const struct dev_pm_ops osiris_dvs_pm = {
167 167
168static struct platform_driver osiris_dvs_driver = { 168static struct platform_driver osiris_dvs_driver = {
169 .probe = osiris_dvs_probe, 169 .probe = osiris_dvs_probe,
170 .remove = __devexit_p(osiris_dvs_remove), 170 .remove = osiris_dvs_remove,
171 .driver = { 171 .driver = {
172 .name = "osiris-dvs", 172 .name = "osiris-dvs",
173 .owner = THIS_MODULE, 173 .owner = THIS_MODULE,
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index aef303b8997e..0b9c0ba44834 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -25,10 +25,10 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/irqchip/arm-vic.h>
28 29
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/hardware/vic.h>
32#include <asm/system_misc.h> 32#include <asm/system_misc.h>
33 33
34#include <mach/map.h> 34#include <mach/map.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
index bcce68a0bb75..6a1127891c87 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
@@ -15,6 +15,5 @@
15#ifndef __ASM_ARCH_REGS_IRQ_H 15#ifndef __ASM_ARCH_REGS_IRQ_H
16#define __ASM_ARCH_REGS_IRQ_H __FILE__ 16#define __ASM_ARCH_REGS_IRQ_H __FILE__
17 17
18#include <asm/hardware/vic.h>
19 18
20#endif /* __ASM_ARCH_6400_REGS_IRQ_H */ 19#endif /* __ASM_ARCH_6400_REGS_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
index ebe18a9469b8..db9c1b1d56a4 100644
--- a/arch/arm/mach-s3c64xx/include/mach/tick.h
+++ b/arch/arm/mach-s3c64xx/include/mach/tick.h
@@ -15,6 +15,8 @@
15#ifndef __ASM_ARCH_TICK_H 15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__ 16#define __ASM_ARCH_TICK_H __FILE__
17 17
18#include <linux/irqchip/arm-vic.h>
19
18/* note, the timer interrutps turn up in 2 places, the vic and then 20/* note, the timer interrutps turn up in 2 places, the vic and then
19 * the timer block. We take the VIC as the base at the moment. 21 * the timer block. We take the VIC as the base at the moment.
20 */ 22 */
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 75cbc67f628e..afeae0b5bb28 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -31,7 +31,6 @@
31#include <video/platform_lcd.h> 31#include <video/platform_lcd.h>
32#include <video/samsung_fimd.h> 32#include <video/samsung_fimd.h>
33 33
34#include <asm/hardware/vic.h>
35#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 35#include <asm/mach/map.h>
37#include <asm/mach/irq.h> 36#include <asm/mach/irq.h>
@@ -230,7 +229,6 @@ MACHINE_START(ANW6410, "A&W6410")
230 .atag_offset = 0x100, 229 .atag_offset = 0x100,
231 230
232 .init_irq = s3c6410_init_irq, 231 .init_irq = s3c6410_init_irq,
233 .handle_irq = vic_handle_irq,
234 .map_io = anw6410_map_io, 232 .map_io = anw6410_map_io,
235 .init_machine = anw6410_machine_init, 233 .init_machine = anw6410_machine_init,
236 .init_late = s3c64xx_init_late, 234 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index c6d8dba90623..553059f51841 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -290,7 +290,7 @@ static const struct i2c_board_info wm2200_i2c[] = {
290 .platform_data = &wm2200_pdata, }, 290 .platform_data = &wm2200_pdata, },
291}; 291};
292 292
293static __devinitdata const struct { 293static const struct {
294 u8 id; 294 u8 id;
295 u8 rev; 295 u8 rev;
296 const char *name; 296 const char *name;
@@ -343,8 +343,8 @@ static __devinitdata const struct {
343 .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) }, 343 .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
344}; 344};
345 345
346static __devinit int wlf_gf_module_probe(struct i2c_client *i2c, 346static int wlf_gf_module_probe(struct i2c_client *i2c,
347 const struct i2c_device_id *i2c_id) 347 const struct i2c_device_id *i2c_id)
348{ 348{
349 int ret, i, j, id, rev; 349 int ret, i, j, id, rev;
350 350
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 87aab127dd60..5b6adc7f1d39 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -42,7 +42,6 @@
42 42
43#include <sound/wm1250-ev1.h> 43#include <sound/wm1250-ev1.h>
44 44
45#include <asm/hardware/vic.h>
46#include <asm/mach/arch.h> 45#include <asm/mach/arch.h>
47#include <asm/mach-types.h> 46#include <asm/mach-types.h>
48 47
@@ -171,7 +170,7 @@ static struct fb_videomode crag6410_lcd_timing = {
171}; 170};
172 171
173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ 172/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
174static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = { 173static struct s3c_fb_platdata crag6410_lcd_pdata = {
175 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, 174 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
176 .vtiming = &crag6410_lcd_timing, 175 .vtiming = &crag6410_lcd_timing,
177 .win[0] = &crag6410_fb_win0, 176 .win[0] = &crag6410_fb_win0,
@@ -181,7 +180,7 @@ static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = {
181 180
182/* 2x6 keypad */ 181/* 2x6 keypad */
183 182
184static uint32_t crag6410_keymap[] __devinitdata = { 183static uint32_t crag6410_keymap[] = {
185 /* KEY(row, col, keycode) */ 184 /* KEY(row, col, keycode) */
186 KEY(0, 0, KEY_VOLUMEUP), 185 KEY(0, 0, KEY_VOLUMEUP),
187 KEY(0, 1, KEY_HOME), 186 KEY(0, 1, KEY_HOME),
@@ -197,12 +196,12 @@ static uint32_t crag6410_keymap[] __devinitdata = {
197 KEY(1, 5, KEY_CAMERA), 196 KEY(1, 5, KEY_CAMERA),
198}; 197};
199 198
200static struct matrix_keymap_data crag6410_keymap_data __devinitdata = { 199static struct matrix_keymap_data crag6410_keymap_data = {
201 .keymap = crag6410_keymap, 200 .keymap = crag6410_keymap,
202 .keymap_size = ARRAY_SIZE(crag6410_keymap), 201 .keymap_size = ARRAY_SIZE(crag6410_keymap),
203}; 202};
204 203
205static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = { 204static struct samsung_keypad_platdata crag6410_keypad_data = {
206 .keymap_data = &crag6410_keymap_data, 205 .keymap_data = &crag6410_keymap_data,
207 .rows = 2, 206 .rows = 2,
208 .cols = 6, 207 .cols = 6,
@@ -407,11 +406,11 @@ static struct wm831x_buckv_pdata vddarm_pdata = {
407 .dvs_gpio = S3C64XX_GPK(0), 406 .dvs_gpio = S3C64XX_GPK(0),
408}; 407};
409 408
410static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = { 409static struct regulator_consumer_supply vddarm_consumers[] = {
411 REGULATOR_SUPPLY("vddarm", NULL), 410 REGULATOR_SUPPLY("vddarm", NULL),
412}; 411};
413 412
414static struct regulator_init_data vddarm __devinitdata = { 413static struct regulator_init_data vddarm = {
415 .constraints = { 414 .constraints = {
416 .name = "VDDARM", 415 .name = "VDDARM",
417 .min_uV = 1000000, 416 .min_uV = 1000000,
@@ -425,11 +424,11 @@ static struct regulator_init_data vddarm __devinitdata = {
425 .driver_data = &vddarm_pdata, 424 .driver_data = &vddarm_pdata,
426}; 425};
427 426
428static struct regulator_consumer_supply vddint_consumers[] __devinitdata = { 427static struct regulator_consumer_supply vddint_consumers[] = {
429 REGULATOR_SUPPLY("vddint", NULL), 428 REGULATOR_SUPPLY("vddint", NULL),
430}; 429};
431 430
432static struct regulator_init_data vddint __devinitdata = { 431static struct regulator_init_data vddint = {
433 .constraints = { 432 .constraints = {
434 .name = "VDDINT", 433 .name = "VDDINT",
435 .min_uV = 1000000, 434 .min_uV = 1000000,
@@ -442,27 +441,27 @@ static struct regulator_init_data vddint __devinitdata = {
442 .supply_regulator = "WALLVDD", 441 .supply_regulator = "WALLVDD",
443}; 442};
444 443
445static struct regulator_init_data vddmem __devinitdata = { 444static struct regulator_init_data vddmem = {
446 .constraints = { 445 .constraints = {
447 .name = "VDDMEM", 446 .name = "VDDMEM",
448 .always_on = 1, 447 .always_on = 1,
449 }, 448 },
450}; 449};
451 450
452static struct regulator_init_data vddsys __devinitdata = { 451static struct regulator_init_data vddsys = {
453 .constraints = { 452 .constraints = {
454 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS", 453 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
455 .always_on = 1, 454 .always_on = 1,
456 }, 455 },
457}; 456};
458 457
459static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = { 458static struct regulator_consumer_supply vddmmc_consumers[] = {
460 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), 459 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
461 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"), 460 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
462 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), 461 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
463}; 462};
464 463
465static struct regulator_init_data vddmmc __devinitdata = { 464static struct regulator_init_data vddmmc = {
466 .constraints = { 465 .constraints = {
467 .name = "VDDMMC,UH", 466 .name = "VDDMMC,UH",
468 .always_on = 1, 467 .always_on = 1,
@@ -472,7 +471,7 @@ static struct regulator_init_data vddmmc __devinitdata = {
472 .supply_regulator = "WALLVDD", 471 .supply_regulator = "WALLVDD",
473}; 472};
474 473
475static struct regulator_init_data vddotgi __devinitdata = { 474static struct regulator_init_data vddotgi = {
476 .constraints = { 475 .constraints = {
477 .name = "VDDOTGi", 476 .name = "VDDOTGi",
478 .always_on = 1, 477 .always_on = 1,
@@ -480,7 +479,7 @@ static struct regulator_init_data vddotgi __devinitdata = {
480 .supply_regulator = "WALLVDD", 479 .supply_regulator = "WALLVDD",
481}; 480};
482 481
483static struct regulator_init_data vddotg __devinitdata = { 482static struct regulator_init_data vddotg = {
484 .constraints = { 483 .constraints = {
485 .name = "VDDOTG", 484 .name = "VDDOTG",
486 .always_on = 1, 485 .always_on = 1,
@@ -488,7 +487,7 @@ static struct regulator_init_data vddotg __devinitdata = {
488 .supply_regulator = "WALLVDD", 487 .supply_regulator = "WALLVDD",
489}; 488};
490 489
491static struct regulator_init_data vddhi __devinitdata = { 490static struct regulator_init_data vddhi = {
492 .constraints = { 491 .constraints = {
493 .name = "VDDHI", 492 .name = "VDDHI",
494 .always_on = 1, 493 .always_on = 1,
@@ -496,7 +495,7 @@ static struct regulator_init_data vddhi __devinitdata = {
496 .supply_regulator = "WALLVDD", 495 .supply_regulator = "WALLVDD",
497}; 496};
498 497
499static struct regulator_init_data vddadc __devinitdata = { 498static struct regulator_init_data vddadc = {
500 .constraints = { 499 .constraints = {
501 .name = "VDDADC,VDDDAC", 500 .name = "VDDADC,VDDDAC",
502 .always_on = 1, 501 .always_on = 1,
@@ -504,7 +503,7 @@ static struct regulator_init_data vddadc __devinitdata = {
504 .supply_regulator = "WALLVDD", 503 .supply_regulator = "WALLVDD",
505}; 504};
506 505
507static struct regulator_init_data vddmem0 __devinitdata = { 506static struct regulator_init_data vddmem0 = {
508 .constraints = { 507 .constraints = {
509 .name = "VDDMEM0", 508 .name = "VDDMEM0",
510 .always_on = 1, 509 .always_on = 1,
@@ -512,7 +511,7 @@ static struct regulator_init_data vddmem0 __devinitdata = {
512 .supply_regulator = "WALLVDD", 511 .supply_regulator = "WALLVDD",
513}; 512};
514 513
515static struct regulator_init_data vddpll __devinitdata = { 514static struct regulator_init_data vddpll = {
516 .constraints = { 515 .constraints = {
517 .name = "VDDPLL", 516 .name = "VDDPLL",
518 .always_on = 1, 517 .always_on = 1,
@@ -520,7 +519,7 @@ static struct regulator_init_data vddpll __devinitdata = {
520 .supply_regulator = "WALLVDD", 519 .supply_regulator = "WALLVDD",
521}; 520};
522 521
523static struct regulator_init_data vddlcd __devinitdata = { 522static struct regulator_init_data vddlcd = {
524 .constraints = { 523 .constraints = {
525 .name = "VDDLCD", 524 .name = "VDDLCD",
526 .always_on = 1, 525 .always_on = 1,
@@ -528,7 +527,7 @@ static struct regulator_init_data vddlcd __devinitdata = {
528 .supply_regulator = "WALLVDD", 527 .supply_regulator = "WALLVDD",
529}; 528};
530 529
531static struct regulator_init_data vddalive __devinitdata = { 530static struct regulator_init_data vddalive = {
532 .constraints = { 531 .constraints = {
533 .name = "VDDALIVE", 532 .name = "VDDALIVE",
534 .always_on = 1, 533 .always_on = 1,
@@ -536,28 +535,28 @@ static struct regulator_init_data vddalive __devinitdata = {
536 .supply_regulator = "WALLVDD", 535 .supply_regulator = "WALLVDD",
537}; 536};
538 537
539static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = { 538static struct wm831x_backup_pdata banff_backup_pdata = {
540 .charger_enable = 1, 539 .charger_enable = 1,
541 .vlim = 2500, /* mV */ 540 .vlim = 2500, /* mV */
542 .ilim = 200, /* uA */ 541 .ilim = 200, /* uA */
543}; 542};
544 543
545static struct wm831x_status_pdata banff_red_led __devinitdata = { 544static struct wm831x_status_pdata banff_red_led = {
546 .name = "banff:red:", 545 .name = "banff:red:",
547 .default_src = WM831X_STATUS_MANUAL, 546 .default_src = WM831X_STATUS_MANUAL,
548}; 547};
549 548
550static struct wm831x_status_pdata banff_green_led __devinitdata = { 549static struct wm831x_status_pdata banff_green_led = {
551 .name = "banff:green:", 550 .name = "banff:green:",
552 .default_src = WM831X_STATUS_MANUAL, 551 .default_src = WM831X_STATUS_MANUAL,
553}; 552};
554 553
555static struct wm831x_touch_pdata touch_pdata __devinitdata = { 554static struct wm831x_touch_pdata touch_pdata = {
556 .data_irq = S3C_EINT(26), 555 .data_irq = S3C_EINT(26),
557 .pd_irq = S3C_EINT(27), 556 .pd_irq = S3C_EINT(27),
558}; 557};
559 558
560static struct wm831x_pdata crag_pmic_pdata __devinitdata = { 559static struct wm831x_pdata crag_pmic_pdata = {
561 .wm831x_num = 1, 560 .wm831x_num = 1,
562 .gpio_base = BANFF_PMIC_GPIO_BASE, 561 .gpio_base = BANFF_PMIC_GPIO_BASE,
563 .soft_shutdown = true, 562 .soft_shutdown = true,
@@ -601,7 +600,7 @@ static struct wm831x_pdata crag_pmic_pdata __devinitdata = {
601 .touch = &touch_pdata, 600 .touch = &touch_pdata,
602}; 601};
603 602
604static struct i2c_board_info i2c_devs0[] __devinitdata = { 603static struct i2c_board_info i2c_devs0[] = {
605 { I2C_BOARD_INFO("24c08", 0x50), }, 604 { I2C_BOARD_INFO("24c08", 0x50), },
606 { I2C_BOARD_INFO("tca6408", 0x20), 605 { I2C_BOARD_INFO("tca6408", 0x20),
607 .platform_data = &crag6410_pca_data, 606 .platform_data = &crag6410_pca_data,
@@ -616,13 +615,13 @@ static struct s3c2410_platform_i2c i2c0_pdata = {
616 .frequency = 400000, 615 .frequency = 400000,
617}; 616};
618 617
619static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = { 618static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
620 REGULATOR_SUPPLY("DCVDD", "spi0.0"), 619 REGULATOR_SUPPLY("DCVDD", "spi0.0"),
621 REGULATOR_SUPPLY("AVDD", "spi0.0"), 620 REGULATOR_SUPPLY("AVDD", "spi0.0"),
622 REGULATOR_SUPPLY("AVDD", "spi0.1"), 621 REGULATOR_SUPPLY("AVDD", "spi0.1"),
623}; 622};
624 623
625static struct regulator_init_data pvdd_1v2 __devinitdata = { 624static struct regulator_init_data pvdd_1v2 = {
626 .constraints = { 625 .constraints = {
627 .name = "PVDD_1V2", 626 .name = "PVDD_1V2",
628 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 627 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
@@ -632,7 +631,7 @@ static struct regulator_init_data pvdd_1v2 __devinitdata = {
632 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), 631 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
633}; 632};
634 633
635static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = { 634static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
636 REGULATOR_SUPPLY("LDOVDD", "1-001a"), 635 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
637 REGULATOR_SUPPLY("PLLVDD", "1-001a"), 636 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
638 REGULATOR_SUPPLY("DBVDD", "1-001a"), 637 REGULATOR_SUPPLY("DBVDD", "1-001a"),
@@ -664,7 +663,7 @@ static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = {
664 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"), 663 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
665}; 664};
666 665
667static struct regulator_init_data pvdd_1v8 __devinitdata = { 666static struct regulator_init_data pvdd_1v8 = {
668 .constraints = { 667 .constraints = {
669 .name = "PVDD_1V8", 668 .name = "PVDD_1V8",
670 .always_on = 1, 669 .always_on = 1,
@@ -674,12 +673,12 @@ static struct regulator_init_data pvdd_1v8 __devinitdata = {
674 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers), 673 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
675}; 674};
676 675
677static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = { 676static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
678 REGULATOR_SUPPLY("MICVDD", "1-001a"), 677 REGULATOR_SUPPLY("MICVDD", "1-001a"),
679 REGULATOR_SUPPLY("AVDD1", "1-001a"), 678 REGULATOR_SUPPLY("AVDD1", "1-001a"),
680}; 679};
681 680
682static struct regulator_init_data pvdd_3v3 __devinitdata = { 681static struct regulator_init_data pvdd_3v3 = {
683 .constraints = { 682 .constraints = {
684 .name = "PVDD_3V3", 683 .name = "PVDD_3V3",
685 .always_on = 1, 684 .always_on = 1,
@@ -689,7 +688,7 @@ static struct regulator_init_data pvdd_3v3 __devinitdata = {
689 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers), 688 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
690}; 689};
691 690
692static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = { 691static struct wm831x_pdata glenfarclas_pmic_pdata = {
693 .wm831x_num = 2, 692 .wm831x_num = 2,
694 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE, 693 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
695 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE, 694 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
@@ -721,7 +720,7 @@ static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
721 }, 720 },
722}; 721};
723 722
724static struct i2c_board_info i2c_devs1[] __devinitdata = { 723static struct i2c_board_info i2c_devs1[] = {
725 { I2C_BOARD_INFO("wm8311", 0x34), 724 { I2C_BOARD_INFO("wm8311", 0x34),
726 .irq = S3C_EINT(0), 725 .irq = S3C_EINT(0),
727 .platform_data = &glenfarclas_pmic_pdata }, 726 .platform_data = &glenfarclas_pmic_pdata },
@@ -867,7 +866,6 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
867 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */ 866 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
868 .atag_offset = 0x100, 867 .atag_offset = 0x100,
869 .init_irq = s3c6410_init_irq, 868 .init_irq = s3c6410_init_irq,
870 .handle_irq = vic_handle_irq,
871 .map_io = crag6410_map_io, 869 .map_io = crag6410_map_io,
872 .init_machine = crag6410_machine_init, 870 .init_machine = crag6410_machine_init,
873 .init_late = s3c64xx_init_late, 871 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 7e8605d98142..7212eb9cfeb9 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -30,7 +30,6 @@
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <mach/map.h> 31#include <mach/map.h>
32 32
33#include <asm/hardware/vic.h>
34#include <asm/irq.h> 33#include <asm/irq.h>
35#include <asm/mach-types.h> 34#include <asm/mach-types.h>
36 35
@@ -273,7 +272,6 @@ MACHINE_START(HMT, "Airgoo-HMT")
273 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ 272 /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
274 .atag_offset = 0x100, 273 .atag_offset = 0x100,
275 .init_irq = s3c6410_init_irq, 274 .init_irq = s3c6410_init_irq,
276 .handle_irq = vic_handle_irq,
277 .map_io = hmt_map_io, 275 .map_io = hmt_map_io,
278 .init_machine = hmt_machine_init, 276 .init_machine = hmt_machine_init,
279 .init_late = s3c64xx_init_late, 277 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 4f8dc7dff92b..e173e6e98228 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,7 +24,6 @@
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/types.h> 25#include <linux/types.h>
26 26
27#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 27#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
@@ -352,7 +351,6 @@ MACHINE_START(MINI6410, "MINI6410")
352 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ 351 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
353 .atag_offset = 0x100, 352 .atag_offset = 0x100,
354 .init_irq = s3c6410_init_irq, 353 .init_irq = s3c6410_init_irq,
355 .handle_irq = vic_handle_irq,
356 .map_io = mini6410_map_io, 354 .map_io = mini6410_map_io,
357 .init_machine = mini6410_machine_init, 355 .init_machine = mini6410_machine_init,
358 .init_late = s3c64xx_init_late, 356 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index cdd7f947376c..8d3cedd995ff 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -26,7 +26,6 @@
26#include <video/platform_lcd.h> 26#include <video/platform_lcd.h>
27#include <video/samsung_fimd.h> 27#include <video/samsung_fimd.h>
28 28
29#include <asm/hardware/vic.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 30#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
@@ -101,7 +100,6 @@ MACHINE_START(NCP, "NCP")
101 /* Maintainer: Samsung Electronics */ 100 /* Maintainer: Samsung Electronics */
102 .atag_offset = 0x100, 101 .atag_offset = 0x100,
103 .init_irq = s3c6410_init_irq, 102 .init_irq = s3c6410_init_irq,
104 .handle_irq = vic_handle_irq,
105 .map_io = ncp_map_io, 103 .map_io = ncp_map_io,
106 .init_machine = ncp_machine_init, 104 .init_machine = ncp_machine_init,
107 .init_late = s3c64xx_init_late, 105 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index b0f61982ef56..4d0d47a66930 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,7 +25,6 @@
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/types.h> 26#include <linux/types.h>
27 27
28#include <asm/hardware/vic.h>
29#include <asm/mach-types.h> 28#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
31#include <asm/mach/map.h> 30#include <asm/mach/map.h>
@@ -331,7 +330,6 @@ MACHINE_START(REAL6410, "REAL6410")
331 .atag_offset = 0x100, 330 .atag_offset = 0x100,
332 331
333 .init_irq = s3c6410_init_irq, 332 .init_irq = s3c6410_init_irq,
334 .handle_irq = vic_handle_irq,
335 .map_io = real6410_map_io, 333 .map_io = real6410_map_io,
336 .init_machine = real6410_machine_init, 334 .init_machine = real6410_machine_init,
337 .init_late = s3c64xx_init_late, 335 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 7a737614717e..ca2afcfce573 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,7 +17,6 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -153,7 +152,6 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
153 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 152 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
154 .atag_offset = 0x100, 153 .atag_offset = 0x100,
155 .init_irq = s3c6410_init_irq, 154 .init_irq = s3c6410_init_irq,
156 .handle_irq = vic_handle_irq,
157 .map_io = smartq_map_io, 155 .map_io = smartq_map_io,
158 .init_machine = smartq5_machine_init, 156 .init_machine = smartq5_machine_init,
159 .init_late = s3c64xx_init_late, 157 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index 889d525325c8..37bb0c632a5e 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,7 +17,6 @@
17#include <linux/leds.h> 17#include <linux/leds.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19 19
20#include <asm/hardware/vic.h>
21#include <asm/mach-types.h> 20#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23 22
@@ -169,7 +168,6 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
169 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ 168 /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
170 .atag_offset = 0x100, 169 .atag_offset = 0x100,
171 .init_irq = s3c6410_init_irq, 170 .init_irq = s3c6410_init_irq,
172 .handle_irq = vic_handle_irq,
173 .map_io = smartq_map_io, 171 .map_io = smartq_map_io,
174 .init_machine = smartq7_machine_init, 172 .init_machine = smartq7_machine_init,
175 .init_late = s3c64xx_init_late, 173 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index e31fe5bb37b6..a392869c8342 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,7 +22,6 @@
22 22
23#include <asm/mach-types.h> 23#include <asm/mach-types.h>
24 24
25#include <asm/hardware/vic.h>
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/mach/irq.h> 27#include <asm/mach/irq.h>
@@ -90,7 +89,6 @@ MACHINE_START(SMDK6400, "SMDK6400")
90 .atag_offset = 0x100, 89 .atag_offset = 0x100,
91 90
92 .init_irq = s3c6400_init_irq, 91 .init_irq = s3c6400_init_irq,
93 .handle_irq = vic_handle_irq,
94 .map_io = smdk6400_map_io, 92 .map_io = smdk6400_map_io,
95 .init_machine = smdk6400_machine_init, 93 .init_machine = smdk6400_machine_init,
96 .init_late = s3c64xx_init_late, 94 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index f1b87cd9cb0e..1663d10ba02a 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -45,7 +45,6 @@
45#include <video/platform_lcd.h> 45#include <video/platform_lcd.h>
46#include <video/samsung_fimd.h> 46#include <video/samsung_fimd.h>
47 47
48#include <asm/hardware/vic.h>
49#include <asm/mach/arch.h> 48#include <asm/mach/arch.h>
50#include <asm/mach/map.h> 49#include <asm/mach/map.h>
51#include <asm/mach/irq.h> 50#include <asm/mach/irq.h>
@@ -700,7 +699,6 @@ MACHINE_START(SMDK6410, "SMDK6410")
700 .atag_offset = 0x100, 699 .atag_offset = 0x100,
701 700
702 .init_irq = s3c6410_init_irq, 701 .init_irq = s3c6410_init_irq,
703 .handle_irq = vic_handle_irq,
704 .map_io = smdk6410_map_io, 702 .map_io = smdk6410_map_io,
705 .init_machine = smdk6410_machine_init, 703 .init_machine = smdk6410_machine_init,
706 .init_late = s3c64xx_init_late, 704 .init_late = s3c64xx_init_late,
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
index 4aaebdace55f..d60397d1ff40 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
@@ -13,7 +13,6 @@
13#ifndef __ASM_ARCH_REGS_IRQ_H 13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <asm/hardware/vic.h>
17#include <mach/map.h> 16#include <mach/map.h>
18 17
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 18#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/tick.h b/arch/arm/mach-s5p64x0/include/mach/tick.h
deleted file mode 100644
index 00aa7f1d8e51..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/tick.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/include/mach/tick.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * http://armlinux.simtec.co.uk/
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * S5P64X0 - Timer tick support definitions
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_TICK_H
19#define __ASM_ARCH_TICK_H __FILE__
20
21static inline u32 s3c24xx_ostimer_pending(void)
22{
23 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
24 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
25}
26
27#define TICK_MAX (0xffffffff)
28
29#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 0a3146dc081a..a40d5eb38124 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -29,7 +29,6 @@
29#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
30#include <video/samsung_fimd.h> 30#include <video/samsung_fimd.h>
31 31
32#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -272,7 +271,6 @@ MACHINE_START(SMDK6440, "SMDK6440")
272 .atag_offset = 0x100, 271 .atag_offset = 0x100,
273 272
274 .init_irq = s5p6440_init_irq, 273 .init_irq = s5p6440_init_irq,
275 .handle_irq = vic_handle_irq,
276 .map_io = smdk6440_map_io, 274 .map_io = smdk6440_map_io,
277 .init_machine = smdk6440_machine_init, 275 .init_machine = smdk6440_machine_init,
278 .init_time = s5p_timer_init, 276 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 36917f2ea25a..703e576a26e0 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -29,7 +29,6 @@
29#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
30#include <video/samsung_fimd.h> 30#include <video/samsung_fimd.h>
31 31
32#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/irq.h> 34#include <asm/irq.h>
@@ -291,7 +290,6 @@ MACHINE_START(SMDK6450, "SMDK6450")
291 .atag_offset = 0x100, 290 .atag_offset = 0x100,
292 291
293 .init_irq = s5p6450_init_irq, 292 .init_irq = s5p6450_init_irq,
294 .handle_irq = vic_handle_irq,
295 .map_io = smdk6450_map_io, 293 .map_io = smdk6450_map_io,
296 .init_machine = smdk6450_machine_init, 294 .init_machine = smdk6450_machine_init,
297 .init_time = s5p_timer_init, 295 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
index 4d9036d0f288..761627897f30 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h
@@ -14,6 +14,5 @@
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <asm/hardware/vic.h>
18 17
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 18#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
index 20f68730ed18..0af8e41230ed 100644
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ b/arch/arm/mach-s5pc100/include/mach/tick.h
@@ -15,6 +15,8 @@
15#ifndef __ASM_ARCH_TICK_H 15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__ 16#define __ASM_ARCH_TICK_H __FILE__
17 17
18#include <linux/irqchip/arm-vic.h>
19
18/* note, the timer interrutps turn up in 2 places, the vic and then 20/* note, the timer interrutps turn up in 2 places, the vic and then
19 * the timer block. We take the VIC as the base at the moment. 21 * the timer block. We take the VIC as the base at the moment.
20 */ 22 */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 39a9197d1746..185a19583898 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,7 +25,6 @@
25#include <linux/input.h> 25#include <linux/input.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27 27
28#include <asm/hardware/vic.h>
29#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 29#include <asm/mach/map.h>
31 30
@@ -254,7 +253,6 @@ MACHINE_START(SMDKC100, "SMDKC100")
254 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 253 /* Maintainer: Byungho Min <bhmin@samsung.com> */
255 .atag_offset = 0x100, 254 .atag_offset = 0x100,
256 .init_irq = s5pc100_init_irq, 255 .init_irq = s5pc100_init_irq,
257 .handle_irq = vic_handle_irq,
258 .map_io = smdkc100_map_io, 256 .map_io = smdkc100_map_io,
259 .init_machine = smdkc100_machine_init, 257 .init_machine = smdkc100_machine_init,
260 .init_time = s3c24xx_timer_init, 258 .init_time = s3c24xx_timer_init,
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
index 5c3b104a7c86..d8bc1e6c7aaa 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
@@ -13,7 +13,6 @@
13#ifndef __ASM_ARCH_REGS_IRQ_H 13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__ 14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15 15
16#include <asm/hardware/vic.h>
17#include <mach/map.h> 16#include <mach/map.h>
18 17
19#endif /* __ASM_ARCH_REGS_IRQ_H */ 18#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h
deleted file mode 100644
index 7993b3603ccf..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/tick.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/tick.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5PV210 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 1fb44a5ebb83..11900a8e88a3 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,7 +22,6 @@
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24 24
25#include <asm/hardware/vic.h>
26#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
28#include <asm/setup.h> 27#include <asm/setup.h>
@@ -685,7 +684,6 @@ MACHINE_START(AQUILA, "Aquila")
685 Kyungmin Park <kyungmin.park@samsung.com> */ 684 Kyungmin Park <kyungmin.park@samsung.com> */
686 .atag_offset = 0x100, 685 .atag_offset = 0x100,
687 .init_irq = s5pv210_init_irq, 686 .init_irq = s5pv210_init_irq,
688 .handle_irq = vic_handle_irq,
689 .map_io = aquila_map_io, 687 .map_io = aquila_map_io,
690 .init_machine = aquila_machine_init, 688 .init_machine = aquila_machine_init,
691 .init_time = s5p_timer_init, 689 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index ababdca2b3e4..570481591746 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -29,7 +29,6 @@
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/platform_data/s3c-hsotg.h> 30#include <linux/platform_data/s3c-hsotg.h>
31 31
32#include <asm/hardware/vic.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
35#include <asm/setup.h> 34#include <asm/setup.h>
@@ -972,7 +971,6 @@ MACHINE_START(GONI, "GONI")
972 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ 971 /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
973 .atag_offset = 0x100, 972 .atag_offset = 0x100,
974 .init_irq = s5pv210_init_irq, 973 .init_irq = s5pv210_init_irq,
975 .handle_irq = vic_handle_irq,
976 .map_io = goni_map_io, 974 .map_io = goni_map_io,
977 .init_machine = goni_machine_init, 975 .init_machine = goni_machine_init,
978 .init_time = s5p_timer_init, 976 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index acfb0ebce13b..28bd0248a3e2 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -15,7 +15,6 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/device.h> 16#include <linux/device.h>
17 17
18#include <asm/hardware/vic.h>
19#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 19#include <asm/mach/map.h>
21#include <asm/setup.h> 20#include <asm/setup.h>
@@ -152,7 +151,6 @@ MACHINE_START(SMDKC110, "SMDKC110")
152 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 151 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
153 .atag_offset = 0x100, 152 .atag_offset = 0x100,
154 .init_irq = s5pv210_init_irq, 153 .init_irq = s5pv210_init_irq,
155 .handle_irq = vic_handle_irq,
156 .map_io = smdkc110_map_io, 154 .map_io = smdkc110_map_io,
157 .init_machine = smdkc110_machine_init, 155 .init_machine = smdkc110_machine_init,
158 .init_time = s5p_timer_init, 156 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index e1d820f3b426..3c73f36869bb 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -21,7 +21,6 @@
21#include <linux/pwm_backlight.h> 21#include <linux/pwm_backlight.h>
22#include <linux/platform_data/s3c-hsotg.h> 22#include <linux/platform_data/s3c-hsotg.h>
23 23
24#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 25#include <asm/mach/map.h>
27#include <asm/setup.h> 26#include <asm/setup.h>
@@ -328,7 +327,6 @@ MACHINE_START(SMDKV210, "SMDKV210")
328 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 327 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
329 .atag_offset = 0x100, 328 .atag_offset = 0x100,
330 .init_irq = s5pv210_init_irq, 329 .init_irq = s5pv210_init_irq,
331 .handle_irq = vic_handle_irq,
332 .map_io = smdkv210_map_io, 330 .map_io = smdkv210_map_io,
333 .init_machine = smdkv210_machine_init, 331 .init_machine = smdkv210_machine_init,
334 .init_time = s5p_timer_init, 332 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 1e6fc6eccdf3..2d4c5531819c 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,7 +14,6 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16 16
17#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 18#include <asm/mach/map.h>
20#include <asm/setup.h> 19#include <asm/setup.h>
@@ -129,7 +128,6 @@ MACHINE_START(TORBRECK, "TORBRECK")
129 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ 128 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
130 .atag_offset = 0x100, 129 .atag_offset = 0x100,
131 .init_irq = s5pv210_init_irq, 130 .init_irq = s5pv210_init_irq,
132 .handle_irq = vic_handle_irq,
133 .map_io = torbreck_map_io, 131 .map_io = torbreck_map_io,
134 .init_machine = torbreck_machine_init, 132 .init_machine = torbreck_machine_init,
135 .init_time = s5p_timer_init, 133 .init_time = s5p_timer_init,
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 7f07f08d8968..b143c4659346 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -130,7 +130,7 @@ void jornada_ssp_end(void)
130}; 130};
131EXPORT_SYMBOL(jornada_ssp_end); 131EXPORT_SYMBOL(jornada_ssp_end);
132 132
133static int __devinit jornada_ssp_probe(struct platform_device *dev) 133static int jornada_ssp_probe(struct platform_device *dev)
134{ 134{
135 int ret; 135 int ret;
136 136
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 88be0474f3d7..400f80332046 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -154,7 +154,7 @@ static u_int neponset_get_mctrl(struct uart_port *port)
154 return ret; 154 return ret;
155} 155}
156 156
157static struct sa1100_port_fns neponset_port_fns __devinitdata = { 157static struct sa1100_port_fns neponset_port_fns = {
158 .set_mctrl = neponset_set_mctrl, 158 .set_mctrl = neponset_set_mctrl,
159 .get_mctrl = neponset_get_mctrl, 159 .get_mctrl = neponset_get_mctrl,
160}; 160};
@@ -233,7 +233,7 @@ static struct sa1111_platform_data sa1111_info = {
233 .disable_devs = SA1111_DEVID_PS2_MSE, 233 .disable_devs = SA1111_DEVID_PS2_MSE,
234}; 234};
235 235
236static int __devinit neponset_probe(struct platform_device *dev) 236static int neponset_probe(struct platform_device *dev)
237{ 237{
238 struct neponset_drvdata *d; 238 struct neponset_drvdata *d;
239 struct resource *nep_res, *sa1111_res, *smc91x_res; 239 struct resource *nep_res, *sa1111_res, *smc91x_res;
@@ -368,7 +368,7 @@ static int __devinit neponset_probe(struct platform_device *dev)
368 return ret; 368 return ret;
369} 369}
370 370
371static int __devexit neponset_remove(struct platform_device *dev) 371static int neponset_remove(struct platform_device *dev)
372{ 372{
373 struct neponset_drvdata *d = platform_get_drvdata(dev); 373 struct neponset_drvdata *d = platform_get_drvdata(dev);
374 int irq = platform_get_irq(dev, 0); 374 int irq = platform_get_irq(dev, 0);
@@ -420,7 +420,7 @@ static const struct dev_pm_ops neponset_pm_ops = {
420 420
421static struct platform_driver neponset_device_driver = { 421static struct platform_driver neponset_device_driver = {
422 .probe = neponset_probe, 422 .probe = neponset_probe,
423 .remove = __devexit_p(neponset_remove), 423 .remove = neponset_remove,
424 .driver = { 424 .driver = {
425 .name = "neponset", 425 .name = "neponset",
426 .owner = THIS_MODULE, 426 .owner = THIS_MODULE,
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 934db6385cd6..a59a13a665a6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -124,16 +124,12 @@ void __init sa1100_timer_init(void)
124 124
125 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); 125 setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
126 126
127 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
128 ckevt_sa1100_osmr0.max_delta_ns =
129 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
130 ckevt_sa1100_osmr0.min_delta_ns =
131 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
132 ckevt_sa1100_osmr0.cpumask = cpumask_of(0); 127 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
133 128
134 setup_irq(IRQ_OST0, &sa1100_timer_irq); 129 setup_irq(IRQ_OST0, &sa1100_timer_irq);
135 130
136 clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, 131 clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
137 clocksource_mmio_readl_up); 132 clocksource_mmio_readl_up);
138 clockevents_register_device(&ckevt_sa1100_osmr0); 133 clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400,
134 MIN_OSCR_DELTA * 2, 0x7fffffff);
139} 135}
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index d81a66362b7c..705bc63c7984 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -40,6 +40,7 @@
40#include <linux/mmc/sh_mobile_sdhi.h> 40#include <linux/mmc/sh_mobile_sdhi.h>
41#include <linux/mfd/tmio.h> 41#include <linux/mfd/tmio.h>
42#include <linux/sh_clk.h> 42#include <linux/sh_clk.h>
43#include <linux/irqchip/arm-gic.h>
43#include <video/sh_mobile_lcdc.h> 44#include <video/sh_mobile_lcdc.h>
44#include <video/sh_mipi_dsi.h> 45#include <video/sh_mipi_dsi.h>
45#include <sound/sh_fsi.h> 46#include <sound/sh_fsi.h>
@@ -49,7 +50,6 @@
49#include <mach/common.h> 50#include <mach/common.h>
50#include <asm/mach-types.h> 51#include <asm/mach-types.h>
51#include <asm/mach/arch.h> 52#include <asm/mach/arch.h>
52#include <asm/hardware/gic.h>
53#include <asm/hardware/cache-l2x0.h> 53#include <asm/hardware/cache-l2x0.h>
54#include <asm/traps.h> 54#include <asm/traps.h>
55 55
@@ -668,7 +668,6 @@ MACHINE_START(AG5EVM, "ag5evm")
668 .init_early = sh73a0_add_early_devices, 668 .init_early = sh73a0_add_early_devices,
669 .nr_irqs = NR_IRQS_LEGACY, 669 .nr_irqs = NR_IRQS_LEGACY,
670 .init_irq = sh73a0_init_irq, 670 .init_irq = sh73a0_init_irq,
671 .handle_irq = gic_handle_irq,
672 .init_machine = ag5evm_init, 671 .init_machine = ag5evm_init,
673 .init_late = shmobile_init_late, 672 .init_late = shmobile_init_late,
674 .init_time = sh73a0_earlytimer_init, 673 .init_time = sh73a0_earlytimer_init,
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 2f24994f2ef8..d759a9c2b9e8 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -35,6 +35,7 @@
35#include <linux/input/sh_keysc.h> 35#include <linux/input/sh_keysc.h>
36#include <linux/gpio_keys.h> 36#include <linux/gpio_keys.h>
37#include <linux/leds.h> 37#include <linux/leds.h>
38#include <linux/irqchip/arm-gic.h>
38#include <linux/platform_data/leds-renesas-tpu.h> 39#include <linux/platform_data/leds-renesas-tpu.h>
39#include <linux/mmc/host.h> 40#include <linux/mmc/host.h>
40#include <linux/mmc/sh_mmcif.h> 41#include <linux/mmc/sh_mmcif.h>
@@ -47,7 +48,6 @@
47#include <asm/mach-types.h> 48#include <asm/mach-types.h>
48#include <asm/mach/arch.h> 49#include <asm/mach/arch.h>
49#include <asm/mach/time.h> 50#include <asm/mach/time.h>
50#include <asm/hardware/gic.h>
51#include <asm/hardware/cache-l2x0.h> 51#include <asm/hardware/cache-l2x0.h>
52#include <asm/traps.h> 52#include <asm/traps.h>
53 53
@@ -550,7 +550,6 @@ MACHINE_START(KOTA2, "kota2")
550 .init_early = sh73a0_add_early_devices, 550 .init_early = sh73a0_add_early_devices,
551 .nr_irqs = NR_IRQS_LEGACY, 551 .nr_irqs = NR_IRQS_LEGACY,
552 .init_irq = sh73a0_init_irq, 552 .init_irq = sh73a0_init_irq,
553 .handle_irq = gic_handle_irq,
554 .init_machine = kota2_init, 553 .init_machine = kota2_init,
555 .init_late = shmobile_init_late, 554 .init_late = shmobile_init_late,
556 .init_time = sh73a0_earlytimer_init, 555 .init_time = sh73a0_earlytimer_init,
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 59be864f5992..c254782aa727 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -28,7 +28,6 @@
28#include <mach/emev2.h> 28#include <mach/emev2.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31#include <asm/hardware/gic.h>
32 31
33/* Dummy supplies, where voltage doesn't matter */ 32/* Dummy supplies, where voltage doesn't matter */
34static struct regulator_consumer_supply dummy_supplies[] = { 33static struct regulator_consumer_supply dummy_supplies[] = {
@@ -89,7 +88,6 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
89 .init_early = emev2_add_early_devices, 88 .init_early = emev2_add_early_devices,
90 .nr_irqs = NR_IRQS_LEGACY, 89 .nr_irqs = NR_IRQS_LEGACY,
91 .init_irq = emev2_init_irq, 90 .init_irq = emev2_init_irq,
92 .handle_irq = gic_handle_irq,
93 .init_machine = kzm9d_add_standard_devices, 91 .init_machine = kzm9d_add_standard_devices,
94 .init_late = shmobile_init_late, 92 .init_late = shmobile_init_late,
95 .init_time = shmobile_timer_init, 93 .init_time = shmobile_timer_init,
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index adb23ef51121..ac9428530d7b 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -25,6 +25,7 @@
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/i2c/pcf857x.h> 26#include <linux/i2c/pcf857x.h>
27#include <linux/input.h> 27#include <linux/input.h>
28#include <linux/irqchip/arm-gic.h>
28#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
29#include <linux/mmc/sh_mmcif.h> 30#include <linux/mmc/sh_mmcif.h>
30#include <linux/mmc/sh_mobile_sdhi.h> 31#include <linux/mmc/sh_mobile_sdhi.h>
@@ -42,7 +43,6 @@
42#include <mach/sh73a0.h> 43#include <mach/sh73a0.h>
43#include <mach/common.h> 44#include <mach/common.h>
44#include <asm/hardware/cache-l2x0.h> 45#include <asm/hardware/cache-l2x0.h>
45#include <asm/hardware/gic.h>
46#include <asm/mach-types.h> 46#include <asm/mach-types.h>
47#include <asm/mach/arch.h> 47#include <asm/mach/arch.h>
48#include <video/sh_mobile_lcdc.h> 48#include <video/sh_mobile_lcdc.h>
@@ -792,7 +792,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
792 .init_early = sh73a0_add_early_devices, 792 .init_early = sh73a0_add_early_devices,
793 .nr_irqs = NR_IRQS_LEGACY, 793 .nr_irqs = NR_IRQS_LEGACY,
794 .init_irq = sh73a0_init_irq, 794 .init_irq = sh73a0_init_irq,
795 .handle_irq = gic_handle_irq,
796 .init_machine = kzm_init, 795 .init_machine = kzm_init,
797 .init_late = shmobile_init_late, 796 .init_late = shmobile_init_late,
798 .init_time = sh73a0_earlytimer_init, 797 .init_time = sh73a0_earlytimer_init,
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index ca45a0c50afe..cdcb799e802f 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -44,7 +44,6 @@
44#include <mach/irqs.h> 44#include <mach/irqs.h>
45#include <asm/mach-types.h> 45#include <asm/mach-types.h>
46#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
47#include <asm/hardware/gic.h>
48#include <asm/traps.h> 47#include <asm/traps.h>
49 48
50/* Fixed 3.3V regulator to be used by SDHI0 */ 49/* Fixed 3.3V regulator to be used by SDHI0 */
@@ -382,7 +381,6 @@ MACHINE_START(MARZEN, "marzen")
382 .init_early = r8a7779_add_early_devices, 381 .init_early = r8a7779_add_early_devices,
383 .nr_irqs = NR_IRQS_LEGACY, 382 .nr_irqs = NR_IRQS_LEGACY,
384 .init_irq = r8a7779_init_irq, 383 .init_irq = r8a7779_init_irq,
385 .handle_irq = gic_handle_irq,
386 .init_machine = marzen_init, 384 .init_machine = marzen_init,
387 .init_late = marzen_init_late, 385 .init_late = marzen_init_late,
388 .init_time = r8a7779_earlytimer_init, 386 .init_time = r8a7779_earlytimer_init,
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index ef66f1a8aa2e..8807c27f71f9 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -22,10 +22,10 @@
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/irqchip/arm-gic.h>
25#include <mach/common.h> 26#include <mach/common.h>
26#include <mach/intc.h> 27#include <mach/intc.h>
27#include <mach/r8a7779.h> 28#include <mach/r8a7779.h>
28#include <asm/hardware/gic.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
31 31
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index f0c5e5190601..978369973be4 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -23,10 +23,10 @@
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/intc.h> 27#include <mach/intc.h>
27#include <mach/irqs.h> 28#include <mach/irqs.h>
28#include <mach/sh73a0.h> 29#include <mach/sh73a0.h>
29#include <asm/hardware/gic.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32 32
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index ed8d2351915e..1f958d7b0bac 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -12,7 +12,6 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <asm/hardware/gic.h>
16 15
17void __init shmobile_smp_init_cpus(unsigned int ncores) 16void __init shmobile_smp_init_cpus(unsigned int ncores)
18{ 17{
@@ -26,6 +25,4 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
26 25
27 for (i = 0; i < ncores; i++) 26 for (i = 0; i < ncores; i++)
28 set_cpu_possible(i, true); 27 set_cpu_possible(i, true);
29
30 set_smp_cross_call(gic_raise_softirq);
31} 28}
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index ea61cb657ac3..47662a581c0a 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -20,13 +20,14 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/irqchip.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/platform_data/gpio-em.h> 25#include <linux/platform_data/gpio-em.h>
25#include <linux/of_platform.h> 26#include <linux/of_platform.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
27#include <linux/input.h> 28#include <linux/input.h>
28#include <linux/io.h> 29#include <linux/io.h>
29#include <linux/of_irq.h> 30#include <linux/irqchip/arm-gic.h>
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31#include <mach/common.h> 32#include <mach/common.h>
32#include <mach/emev2.h> 33#include <mach/emev2.h>
@@ -35,7 +36,6 @@
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 37#include <asm/mach/map.h>
37#include <asm/mach/time.h> 38#include <asm/mach/time.h>
38#include <asm/hardware/gic.h>
39 39
40static struct map_desc emev2_io_desc[] __initdata = { 40static struct map_desc emev2_io_desc[] __initdata = {
41#ifdef CONFIG_SMP 41#ifdef CONFIG_SMP
@@ -445,27 +445,16 @@ void __init emev2_add_standard_devices_dt(void)
445 emev2_auxdata_lookup, NULL); 445 emev2_auxdata_lookup, NULL);
446} 446}
447 447
448static const struct of_device_id emev2_dt_irq_match[] = {
449 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
450 {},
451};
452
453static const char *emev2_boards_compat_dt[] __initdata = { 448static const char *emev2_boards_compat_dt[] __initdata = {
454 "renesas,emev2", 449 "renesas,emev2",
455 NULL, 450 NULL,
456}; 451};
457 452
458void __init emev2_init_irq_dt(void)
459{
460 of_irq_init(emev2_dt_irq_match);
461}
462
463DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 453DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
464 .smp = smp_ops(emev2_smp_ops), 454 .smp = smp_ops(emev2_smp_ops),
465 .init_early = emev2_init_delay, 455 .init_early = emev2_init_delay,
466 .nr_irqs = NR_IRQS_LEGACY, 456 .nr_irqs = NR_IRQS_LEGACY,
467 .init_irq = emev2_init_irq_dt, 457 .init_irq = irqchip_init,
468 .handle_irq = gic_handle_irq,
469 .init_machine = emev2_add_standard_devices_dt, 458 .init_machine = emev2_add_standard_devices_dt,
470 .init_time = shmobile_timer_init, 459 .init_time = shmobile_timer_init,
471 .dt_compat = emev2_boards_compat_dt, 460 .dt_compat = emev2_boards_compat_dt,
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index f67456286280..953eb1f9388d 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -23,11 +23,11 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/common.h> 27#include <mach/common.h>
27#include <mach/emev2.h> 28#include <mach/emev2.h>
28#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
29#include <asm/smp_scu.h> 30#include <asm/smp_scu.h>
30#include <asm/hardware/gic.h>
31#include <asm/cacheflush.h> 31#include <asm/cacheflush.h>
32 32
33#define EMEV2_SCU_BASE 0x1e000000 33#define EMEV2_SCU_BASE 0x1e000000
@@ -100,7 +100,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
100 /* Tell ROM loader about our vector (in headsmp.S) */ 100 /* Tell ROM loader about our vector (in headsmp.S) */
101 emev2_set_boot_vector(__pa(shmobile_secondary_vector)); 101 emev2_set_boot_vector(__pa(shmobile_secondary_vector));
102 102
103 gic_raise_softirq(cpumask_of(cpu), 0); 103 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
104 return 0; 104 return 0;
105} 105}
106 106
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 2ce6af9a6a37..3a4acf23edcf 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -23,12 +23,12 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/common.h> 27#include <mach/common.h>
27#include <mach/r8a7779.h> 28#include <mach/r8a7779.h>
28#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
29#include <asm/smp_scu.h> 30#include <asm/smp_scu.h>
30#include <asm/smp_twd.h> 31#include <asm/smp_twd.h>
31#include <asm/hardware/gic.h>
32 32
33#define AVECR IOMEM(0xfe700040) 33#define AVECR IOMEM(0xfe700040)
34 34
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 624f00f70abf..5c5bcb595350 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -23,12 +23,12 @@
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h>
26#include <mach/common.h> 27#include <mach/common.h>
27#include <asm/smp_plat.h> 28#include <asm/smp_plat.h>
28#include <mach/sh73a0.h> 29#include <mach/sh73a0.h>
29#include <asm/smp_scu.h> 30#include <asm/smp_scu.h>
30#include <asm/smp_twd.h> 31#include <asm/smp_twd.h>
31#include <asm/hardware/gic.h>
32 32
33#define WUPCR IOMEM(0xe6151010) 33#define WUPCR IOMEM(0xe6151010)
34#define SRESCR IOMEM(0xe6151018) 34#define SRESCR IOMEM(0xe6151018)
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index 68dd1b69512a..4e9e69d9e7de 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -22,9 +22,9 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_address.h> 24#include <linux/of_address.h>
25#include <linux/irqchip/arm-gic.h>
25 26
26#include <asm/cacheflush.h> 27#include <asm/cacheflush.h>
27#include <asm/hardware/gic.h>
28#include <asm/smp_scu.h> 28#include <asm/smp_scu.h>
29#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
30 30
@@ -83,8 +83,6 @@ static void __init socfpga_smp_init_cpus(void)
83 83
84 for (i = 0; i < ncores; i++) 84 for (i = 0; i < ncores; i++)
85 set_cpu_possible(i, true); 85 set_cpu_possible(i, true);
86
87 set_smp_cross_call(gic_raise_softirq);
88} 86}
89 87
90static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) 88static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index b54baea5f809..27d68468a027 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -15,12 +15,12 @@
15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */ 16 */
17#include <linux/dw_apb_timer.h> 17#include <linux/dw_apb_timer.h>
18#include <linux/irqchip.h>
18#include <linux/of_address.h> 19#include <linux/of_address.h>
19#include <linux/of_irq.h> 20#include <linux/of_irq.h>
20#include <linux/of_platform.h> 21#include <linux/of_platform.h>
21 22
22#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
23#include <asm/hardware/gic.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26 26
@@ -62,11 +62,6 @@ static void __init socfpga_map_io(void)
62 early_printk("Early printk initialized\n"); 62 early_printk("Early printk initialized\n");
63} 63}
64 64
65const static struct of_device_id irq_match[] = {
66 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
67 {}
68};
69
70void __init socfpga_sysmgr_init(void) 65void __init socfpga_sysmgr_init(void)
71{ 66{
72 struct device_node *np; 67 struct device_node *np;
@@ -78,9 +73,9 @@ void __init socfpga_sysmgr_init(void)
78 rst_manager_base_addr = of_iomap(np, 0); 73 rst_manager_base_addr = of_iomap(np, 0);
79} 74}
80 75
81static void __init gic_init_irq(void) 76static void __init socfpga_init_irq(void)
82{ 77{
83 of_irq_init(irq_match); 78 irqchip_init();
84 socfpga_sysmgr_init(); 79 socfpga_sysmgr_init();
85} 80}
86 81
@@ -105,8 +100,7 @@ static const char *altera_dt_match[] = {
105DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA") 100DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
106 .smp = smp_ops(socfpga_smp_ops), 101 .smp = smp_ops(socfpga_smp_ops),
107 .map_io = socfpga_map_io, 102 .map_io = socfpga_map_io,
108 .init_irq = gic_init_irq, 103 .init_irq = socfpga_init_irq,
109 .handle_irq = gic_handle_irq,
110 .init_time = dw_apb_timer_init, 104 .init_time = dw_apb_timer_init,
111 .init_machine = socfpga_cyclone5_init, 105 .init_machine = socfpga_cyclone5_init,
112 .restart = socfpga_cyclone5_restart, 106 .restart = socfpga_cyclone5_restart,
diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear13xx/include/mach/generic.h
index 35e8a0074639..633e678e01a3 100644
--- a/arch/arm/mach-spear13xx/include/mach/generic.h
+++ b/arch/arm/mach-spear13xx/include/mach/generic.h
@@ -28,7 +28,6 @@ extern struct dw_dma_slave nand_write_dma_priv;
28/* Add spear13xx family function declarations here */ 28/* Add spear13xx family function declarations here */
29void __init spear_setup_of_timer(void); 29void __init spear_setup_of_timer(void);
30void __init spear13xx_map_io(void); 30void __init spear13xx_map_io(void);
31void __init spear13xx_dt_init_irq(void);
32void __init spear13xx_l2x0_init(void); 31void __init spear13xx_l2x0_init(void);
33bool dw_dma_filter(struct dma_chan *chan, void *slave); 32bool dw_dma_filter(struct dma_chan *chan, void *slave);
34void spear_restart(char, const char *); 33void spear_restart(char, const char *);
diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c
index 2eaa3fa7b432..af4ade61cd95 100644
--- a/arch/arm/mach-spear13xx/platsmp.c
+++ b/arch/arm/mach-spear13xx/platsmp.c
@@ -15,8 +15,8 @@
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/irqchip/arm-gic.h>
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/hardware/gic.h>
20#include <asm/smp_scu.h> 20#include <asm/smp_scu.h>
21#include <mach/spear.h> 21#include <mach/spear.h>
22#include <mach/generic.h> 22#include <mach/generic.h>
@@ -104,8 +104,6 @@ static void __init spear13xx_smp_init_cpus(void)
104 104
105 for (i = 0; i < ncores; i++) 105 for (i = 0; i < ncores; i++)
106 set_cpu_possible(i, true); 106 set_cpu_possible(i, true);
107
108 set_smp_cross_call(gic_raise_softirq);
109} 107}
110 108
111static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus) 109static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c
index e77d05d48082..56214d1076ef 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear13xx/spear1310.c
@@ -14,9 +14,9 @@
14#define pr_fmt(fmt) "SPEAr1310: " fmt 14#define pr_fmt(fmt) "SPEAr1310: " fmt
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/irqchip.h>
17#include <linux/of_platform.h> 18#include <linux/of_platform.h>
18#include <linux/pata_arasan_cf_data.h> 19#include <linux/pata_arasan_cf_data.h>
19#include <asm/hardware/gic.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <asm/mach/map.h> 21#include <asm/mach/map.h>
22#include <mach/generic.h> 22#include <mach/generic.h>
@@ -90,8 +90,7 @@ static void __init spear1310_map_io(void)
90DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree") 90DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")
91 .smp = smp_ops(spear13xx_smp_ops), 91 .smp = smp_ops(spear13xx_smp_ops),
92 .map_io = spear1310_map_io, 92 .map_io = spear1310_map_io,
93 .init_irq = spear13xx_dt_init_irq, 93 .init_irq = irqchip_init,
94 .handle_irq = gic_handle_irq,
95 .init_time = spear13xx_timer_init, 94 .init_time = spear13xx_timer_init,
96 .init_machine = spear1310_dt_init, 95 .init_machine = spear1310_dt_init,
97 .restart = spear_restart, 96 .restart = spear_restart,
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c
index ebc254779069..9a28beb2a113 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear13xx/spear1340.c
@@ -18,7 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/dw_dmac.h> 19#include <linux/dw_dmac.h>
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <asm/hardware/gic.h> 21#include <linux/irqchip.h>
22#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/generic.h> 24#include <mach/generic.h>
@@ -184,8 +184,7 @@ static const char * const spear1340_dt_board_compat[] = {
184DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree") 184DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree")
185 .smp = smp_ops(spear13xx_smp_ops), 185 .smp = smp_ops(spear13xx_smp_ops),
186 .map_io = spear13xx_map_io, 186 .map_io = spear13xx_map_io,
187 .init_irq = spear13xx_dt_init_irq, 187 .init_irq = irqchip_init,
188 .handle_irq = gic_handle_irq,
189 .init_time = spear13xx_timer_init, 188 .init_time = spear13xx_timer_init,
190 .init_machine = spear1340_dt_init, 189 .init_machine = spear1340_dt_init,
191 .restart = spear_restart, 190 .restart = spear_restart,
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index 7f7acf775f07..c7d2b4a8d8cc 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -17,9 +17,8 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/dw_dmac.h> 18#include <linux/dw_dmac.h>
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/of_irq.h> 20#include <linux/of.h>
21#include <asm/hardware/cache-l2x0.h> 21#include <asm/hardware/cache-l2x0.h>
22#include <asm/hardware/gic.h>
23#include <asm/mach/map.h> 22#include <asm/mach/map.h>
24#include <asm/smp_twd.h> 23#include <asm/smp_twd.h>
25#include <mach/dma.h> 24#include <mach/dma.h>
@@ -182,13 +181,3 @@ void __init spear13xx_timer_init(void)
182 spear_setup_of_timer(); 181 spear_setup_of_timer();
183 twd_local_timer_of_register(); 182 twd_local_timer_of_register();
184} 183}
185
186static const struct of_device_id gic_of_match[] __initconst = {
187 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
188 { /* Sentinel */ }
189};
190
191void __init spear13xx_dt_init_irq(void)
192{
193 of_irq_init(gic_of_match);
194}
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 46b8f7e4d380..df310799e416 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -30,7 +30,6 @@ extern struct pl08x_platform_data pl080_plat_data;
30void __init spear_setup_of_timer(void); 30void __init spear_setup_of_timer(void);
31void __init spear3xx_clk_init(void); 31void __init spear3xx_clk_init(void);
32void __init spear3xx_map_io(void); 32void __init spear3xx_map_io(void);
33void __init spear3xx_dt_init_irq(void);
34 33
35void spear_restart(char, const char *); 34void spear_restart(char, const char *);
36 35
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 2630efa93f5e..bbc9b7e9c62c 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -14,8 +14,8 @@
14#define pr_fmt(fmt) "SPEAr300: " fmt 14#define pr_fmt(fmt) "SPEAr300: " fmt
15 15
16#include <linux/amba/pl08x.h> 16#include <linux/amba/pl08x.h>
17#include <linux/irqchip.h>
17#include <linux/of_platform.h> 18#include <linux/of_platform.h>
18#include <asm/hardware/vic.h>
19#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
20#include <mach/generic.h> 20#include <mach/generic.h>
21#include <mach/spear.h> 21#include <mach/spear.h>
@@ -212,8 +212,7 @@ static void __init spear300_map_io(void)
212 212
213DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree") 213DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
214 .map_io = spear300_map_io, 214 .map_io = spear300_map_io,
215 .init_irq = spear3xx_dt_init_irq, 215 .init_irq = irqchip_init,
216 .handle_irq = vic_handle_irq,
217 .init_time = spear3xx_timer_init, 216 .init_time = spear3xx_timer_init,
218 .init_machine = spear300_dt_init, 217 .init_machine = spear300_dt_init,
219 .restart = spear_restart, 218 .restart = spear_restart,
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index b6147eaebcde..c13a434a8195 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -15,8 +15,8 @@
15 15
16#include <linux/amba/pl08x.h> 16#include <linux/amba/pl08x.h>
17#include <linux/amba/serial.h> 17#include <linux/amba/serial.h>
18#include <linux/irqchip.h>
18#include <linux/of_platform.h> 19#include <linux/of_platform.h>
19#include <asm/hardware/vic.h>
20#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
21#include <mach/generic.h> 21#include <mach/generic.h>
22#include <mach/spear.h> 22#include <mach/spear.h>
@@ -254,8 +254,7 @@ static void __init spear310_map_io(void)
254 254
255DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree") 255DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
256 .map_io = spear310_map_io, 256 .map_io = spear310_map_io,
257 .init_irq = spear3xx_dt_init_irq, 257 .init_irq = irqchip_init,
258 .handle_irq = vic_handle_irq,
259 .init_time = spear3xx_timer_init, 258 .init_time = spear3xx_timer_init,
260 .init_machine = spear310_dt_init, 259 .init_machine = spear310_dt_init,
261 .restart = spear_restart, 260 .restart = spear_restart,
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 53160f713afe..e1c77079a3e5 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -16,8 +16,8 @@
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/amba/pl08x.h> 17#include <linux/amba/pl08x.h>
18#include <linux/amba/serial.h> 18#include <linux/amba/serial.h>
19#include <linux/irqchip.h>
19#include <linux/of_platform.h> 20#include <linux/of_platform.h>
20#include <asm/hardware/vic.h>
21#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
22#include <mach/generic.h> 22#include <mach/generic.h>
23#include <mach/spear.h> 23#include <mach/spear.h>
@@ -268,8 +268,7 @@ static void __init spear320_map_io(void)
268 268
269DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree") 269DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
270 .map_io = spear320_map_io, 270 .map_io = spear320_map_io,
271 .init_irq = spear3xx_dt_init_irq, 271 .init_irq = irqchip_init,
272 .handle_irq = vic_handle_irq,
273 .init_time = spear3xx_timer_init, 272 .init_time = spear3xx_timer_init,
274 .init_machine = spear320_dt_init, 273 .init_machine = spear320_dt_init,
275 .restart = spear_restart, 274 .restart = spear_restart,
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 89f4c58908e3..b2ba516ca2d4 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -15,11 +15,8 @@
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/amba/pl08x.h> 17#include <linux/amba/pl08x.h>
18#include <linux/irqchip/spear-shirq.h>
19#include <linux/of_irq.h>
20#include <linux/io.h> 18#include <linux/io.h>
21#include <asm/hardware/pl080.h> 19#include <asm/hardware/pl080.h>
22#include <asm/hardware/vic.h>
23#include <plat/pl080.h> 20#include <plat/pl080.h>
24#include <mach/generic.h> 21#include <mach/generic.h>
25#include <mach/spear.h> 22#include <mach/spear.h>
@@ -115,16 +112,3 @@ void __init spear3xx_timer_init(void)
115 112
116 spear_setup_of_timer(); 113 spear_setup_of_timer();
117} 114}
118
119static const struct of_device_id vic_of_match[] __initconst = {
120 { .compatible = "arm,pl190-vic", .data = vic_of_init, },
121 { .compatible = "st,spear300-shirq", .data = spear300_shirq_of_init, },
122 { .compatible = "st,spear310-shirq", .data = spear310_shirq_of_init, },
123 { .compatible = "st,spear320-shirq", .data = spear320_shirq_of_init, },
124 { /* Sentinel */ }
125};
126
127void __init spear3xx_dt_init_irq(void)
128{
129 of_irq_init(vic_of_match);
130}
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 1f85bc07c6cb..b8bd33ca88bd 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -16,12 +16,11 @@
16#include <linux/amba/pl08x.h> 16#include <linux/amba/pl08x.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/irqchip.h>
19#include <linux/of.h> 20#include <linux/of.h>
20#include <linux/of_address.h> 21#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
23#include <asm/hardware/pl080.h> 23#include <asm/hardware/pl080.h>
24#include <asm/hardware/vic.h>
25#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
26#include <asm/mach/time.h> 25#include <asm/mach/time.h>
27#include <asm/mach/map.h> 26#include <asm/mach/map.h>
@@ -421,20 +420,9 @@ static const char *spear600_dt_board_compat[] = {
421 NULL 420 NULL
422}; 421};
423 422
424static const struct of_device_id vic_of_match[] __initconst = {
425 { .compatible = "arm,pl190-vic", .data = vic_of_init, },
426 { /* Sentinel */ }
427};
428
429static void __init spear6xx_dt_init_irq(void)
430{
431 of_irq_init(vic_of_match);
432}
433
434DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)") 423DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
435 .map_io = spear6xx_map_io, 424 .map_io = spear6xx_map_io,
436 .init_irq = spear6xx_dt_init_irq, 425 .init_irq = irqchip_init,
437 .handle_irq = vic_handle_irq,
438 .init_time = spear6xx_timer_init, 426 .init_time = spear6xx_timer_init,
439 .init_machine = spear600_dt_init, 427 .init_machine = spear600_dt_init,
440 .restart = spear_restart, 428 .restart = spear_restart,
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index cba4cd3bf93a..fb8fbcecb17f 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -21,8 +21,6 @@
21 21
22#include <linux/irqchip/sunxi.h> 22#include <linux/irqchip/sunxi.h>
23 23
24#include <asm/hardware/vic.h>
25
26#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 25#include <asm/mach/map.h>
28 26
@@ -80,8 +78,8 @@ static void __init sunxi_dt_init(void)
80} 78}
81 79
82static const char * const sunxi_board_dt_compat[] = { 80static const char * const sunxi_board_dt_compat[] = {
83 "allwinner,sun4i", 81 "allwinner,sun4i-a10",
84 "allwinner,sun5i", 82 "allwinner,sun5i-a13",
85 NULL, 83 NULL,
86}; 84};
87 85
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 3b9956aabf5a..5ed81bab2d4b 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -25,7 +25,6 @@
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_address.h> 26#include <linux/of_address.h>
27#include <linux/of_fdt.h> 27#include <linux/of_fdt.h>
28#include <linux/of_irq.h>
29#include <linux/of_platform.h> 28#include <linux/of_platform.h>
30#include <linux/pda_power.h> 29#include <linux/pda_power.h>
31#include <linux/platform_data/tegra_usb.h> 30#include <linux/platform_data/tegra_usb.h>
@@ -34,7 +33,6 @@
34#include <linux/i2c-tegra.h> 33#include <linux/i2c-tegra.h>
35#include <linux/usb/tegra_usb_phy.h> 34#include <linux/usb/tegra_usb_phy.h>
36 35
37#include <asm/hardware/gic.h>
38#include <asm/mach-types.h> 36#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 37#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 38#include <asm/mach/time.h>
@@ -202,7 +200,6 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
202 .smp = smp_ops(tegra_smp_ops), 200 .smp = smp_ops(tegra_smp_ops),
203 .init_early = tegra20_init_early, 201 .init_early = tegra20_init_early,
204 .init_irq = tegra_dt_init_irq, 202 .init_irq = tegra_dt_init_irq,
205 .handle_irq = gic_handle_irq,
206 .init_time = tegra_init_timer, 203 .init_time = tegra_init_timer,
207 .init_machine = tegra_dt_init, 204 .init_machine = tegra_dt_init,
208 .init_late = tegra_dt_init_late, 205 .init_late = tegra_dt_init_late,
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index 381b2f25f0b4..12dc2ddeca64 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -31,7 +31,6 @@
31#include <linux/of_platform.h> 31#include <linux/of_platform.h>
32 32
33#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
34#include <asm/hardware/gic.h>
35 34
36#include "board.h" 35#include "board.h"
37#include "clock.h" 36#include "clock.h"
@@ -112,7 +111,6 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
112 .map_io = tegra_map_common_io, 111 .map_io = tegra_map_common_io,
113 .init_early = tegra30_init_early, 112 .init_early = tegra30_init_early,
114 .init_irq = tegra_dt_init_irq, 113 .init_irq = tegra_dt_init_irq,
115 .handle_irq = gic_handle_irq,
116 .init_time = tegra_init_timer, 114 .init_time = tegra_init_timer,
117 .init_machine = tegra30_dt_init, 115 .init_machine = tegra30_dt_init,
118 .init_late = tegra_init_late, 116 .init_late = tegra_init_late,
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index d54cfc54b9fe..3599959517b3 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -21,10 +21,9 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/of_irq.h> 24#include <linux/irqchip.h>
25 25
26#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
27#include <asm/hardware/gic.h>
28 27
29#include <mach/powergate.h> 28#include <mach/powergate.h>
30 29
@@ -57,15 +56,10 @@ u32 tegra_uart_config[4] = {
57}; 56};
58 57
59#ifdef CONFIG_OF 58#ifdef CONFIG_OF
60static const struct of_device_id tegra_dt_irq_match[] __initconst = {
61 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
62 { }
63};
64
65void __init tegra_dt_init_irq(void) 59void __init tegra_dt_init_irq(void)
66{ 60{
67 tegra_init_irq(); 61 tegra_init_irq();
68 of_irq_init(tegra_dt_irq_match); 62 irqchip_init();
69} 63}
70#endif 64#endif
71 65
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index b7886f183511..2ff2128cb9d8 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -22,8 +22,7 @@
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/of.h> 24#include <linux/of.h>
25 25#include <linux/irqchip/arm-gic.h>
26#include <asm/hardware/gic.h>
27 26
28#include "board.h" 27#include "board.h"
29#include "iomap.h" 28#include "iomap.h"
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 53d085871798..bffcd643d7a3 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -331,7 +331,7 @@ static struct pci_ops tegra_pcie_ops = {
331 .write = tegra_pcie_write_conf, 331 .write = tegra_pcie_write_conf,
332}; 332};
333 333
334static void __devinit tegra_pcie_fixup_bridge(struct pci_dev *dev) 334static void tegra_pcie_fixup_bridge(struct pci_dev *dev)
335{ 335{
336 u16 reg; 336 u16 reg;
337 337
@@ -345,7 +345,7 @@ static void __devinit tegra_pcie_fixup_bridge(struct pci_dev *dev)
345DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_fixup_bridge); 345DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_fixup_bridge);
346 346
347/* Tegra PCIE root complex wrongly reports device class */ 347/* Tegra PCIE root complex wrongly reports device class */
348static void __devinit tegra_pcie_fixup_class(struct pci_dev *dev) 348static void tegra_pcie_fixup_class(struct pci_dev *dev)
349{ 349{
350 dev->class = PCI_CLASS_BRIDGE_PCI << 8; 350 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
351} 351}
@@ -353,7 +353,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf0, tegra_pcie_fixup_class);
353DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class); 353DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class);
354 354
355/* Tegra PCIE requires relaxed ordering */ 355/* Tegra PCIE requires relaxed ordering */
356static void __devinit tegra_pcie_relax_enable(struct pci_dev *dev) 356static void tegra_pcie_relax_enable(struct pci_dev *dev)
357{ 357{
358 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN); 358 pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN);
359} 359}
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 1b926df99c4b..18d7290cf93b 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -18,9 +18,9 @@
18#include <linux/jiffies.h> 18#include <linux/jiffies.h>
19#include <linux/smp.h> 19#include <linux/smp.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/irqchip/arm-gic.h>
21 22
22#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
23#include <asm/hardware/gic.h>
24#include <asm/mach-types.h> 24#include <asm/mach-types.h>
25#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
26 26
@@ -159,8 +159,6 @@ static void __init tegra_smp_init_cpus(void)
159 159
160 for (i = 0; i < ncores; i++) 160 for (i = 0; i < ncores; i++)
161 set_cpu_possible(i, true); 161 set_cpu_possible(i, true);
162
163 set_smp_cross_call(gic_raise_softirq);
164} 162}
165 163
166static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) 164static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 837c7b9ea63b..e18aa2f83ebf 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -268,7 +268,7 @@ static struct tegra_emc_pdata *tegra_emc_dt_parse_pdata(
268} 268}
269#endif 269#endif
270 270
271static struct tegra_emc_pdata __devinit *tegra_emc_fill_pdata(struct platform_device *pdev) 271static struct tegra_emc_pdata *tegra_emc_fill_pdata(struct platform_device *pdev)
272{ 272{
273 struct clk *c = clk_get_sys(NULL, "emc"); 273 struct clk *c = clk_get_sys(NULL, "emc");
274 struct tegra_emc_pdata *pdata; 274 struct tegra_emc_pdata *pdata;
@@ -296,7 +296,7 @@ static struct tegra_emc_pdata __devinit *tegra_emc_fill_pdata(struct platform_de
296 return pdata; 296 return pdata;
297} 297}
298 298
299static int __devinit tegra_emc_probe(struct platform_device *pdev) 299static int tegra_emc_probe(struct platform_device *pdev)
300{ 300{
301 struct tegra_emc_pdata *pdata; 301 struct tegra_emc_pdata *pdata;
302 struct resource *res; 302 struct resource *res;
@@ -333,7 +333,7 @@ static int __devinit tegra_emc_probe(struct platform_device *pdev)
333 return 0; 333 return 0;
334} 334}
335 335
336static struct of_device_id tegra_emc_of_match[] __devinitdata = { 336static struct of_device_id tegra_emc_of_match[] = {
337 { .compatible = "nvidia,tegra20-emc", }, 337 { .compatible = "nvidia,tegra20-emc", },
338 { }, 338 { },
339}; 339};
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index b0036e519a15..eba0969ded19 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -259,14 +259,10 @@ void __init tegra_init_timer(void)
259 BUG(); 259 BUG();
260 } 260 }
261 261
262 clockevents_calc_mult_shift(&tegra_clockevent, 1000000, 5);
263 tegra_clockevent.max_delta_ns =
264 clockevent_delta2ns(0x1fffffff, &tegra_clockevent);
265 tegra_clockevent.min_delta_ns =
266 clockevent_delta2ns(0x1, &tegra_clockevent);
267 tegra_clockevent.cpumask = cpu_all_mask; 262 tegra_clockevent.cpumask = cpu_all_mask;
268 tegra_clockevent.irq = tegra_timer_irq.irq; 263 tegra_clockevent.irq = tegra_timer_irq.irq;
269 clockevents_register_device(&tegra_clockevent); 264 clockevents_config_and_register(&tegra_clockevent, 1000000,
265 0x1, 0x1fffffff);
270#ifdef CONFIG_HAVE_ARM_TWD 266#ifdef CONFIG_HAVE_ARM_TWD
271 twd_local_timer_of_register(); 267 twd_local_timer_of_register();
272#endif 268#endif
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 100a8b764dad..12060ae4e8f1 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -31,11 +31,11 @@
31#include <linux/dma-mapping.h> 31#include <linux/dma-mapping.h>
32#include <linux/platform_data/clk-u300.h> 32#include <linux/platform_data/clk-u300.h>
33#include <linux/platform_data/pinctrl-coh901.h> 33#include <linux/platform_data/pinctrl-coh901.h>
34#include <linux/irqchip/arm-vic.h>
34 35
35#include <asm/types.h> 36#include <asm/types.h>
36#include <asm/setup.h> 37#include <asm/setup.h>
37#include <asm/memory.h> 38#include <asm/memory.h>
38#include <asm/hardware/vic.h>
39#include <asm/mach/map.h> 39#include <asm/mach/map.h>
40#include <asm/mach-types.h> 40#include <asm/mach-types.h>
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
@@ -1779,7 +1779,6 @@ MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board")
1779 .map_io = u300_map_io, 1779 .map_io = u300_map_io,
1780 .nr_irqs = 0, 1780 .nr_irqs = 0,
1781 .init_irq = u300_init_irq, 1781 .init_irq = u300_init_irq,
1782 .handle_irq = vic_handle_irq,
1783 .init_time = u300_timer_init, 1782 .init_time = u300_timer_init,
1784 .init_machine = u300_init_machine, 1783 .init_machine = u300_init_machine,
1785 .restart = u300_restart, 1784 .restart = u300_restart,
diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c
index 03f793612594..2785cb67b5e8 100644
--- a/arch/arm/mach-u300/dummyspichip.c
+++ b/arch/arm/mach-u300/dummyspichip.c
@@ -222,7 +222,7 @@ static ssize_t dummy_looptest(struct device *dev,
222 222
223static DEVICE_ATTR(looptest, S_IRUGO, dummy_looptest, NULL); 223static DEVICE_ATTR(looptest, S_IRUGO, dummy_looptest, NULL);
224 224
225static int __devinit pl022_dummy_probe(struct spi_device *spi) 225static int pl022_dummy_probe(struct spi_device *spi)
226{ 226{
227 struct dummy *p_dummy; 227 struct dummy *p_dummy;
228 int status; 228 int status;
@@ -251,7 +251,7 @@ out_dev_create_looptest_failed:
251 return status; 251 return status;
252} 252}
253 253
254static int __devexit pl022_dummy_remove(struct spi_device *spi) 254static int pl022_dummy_remove(struct spi_device *spi)
255{ 255{
256 struct dummy *p_dummy = dev_get_drvdata(&spi->dev); 256 struct dummy *p_dummy = dev_get_drvdata(&spi->dev);
257 257
@@ -269,7 +269,7 @@ static struct spi_driver pl022_dummy_driver = {
269 .owner = THIS_MODULE, 269 .owner = THIS_MODULE,
270 }, 270 },
271 .probe = pl022_dummy_probe, 271 .probe = pl022_dummy_probe,
272 .remove = __devexit_p(pl022_dummy_remove), 272 .remove = pl022_dummy_remove,
273}; 273};
274 274
275static int __init pl022_init_dummy(void) 275static int __init pl022_init_dummy(void)
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index e1dfa24b4fb9..0e928d281759 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -40,7 +40,6 @@
40 40
41#include <asm/mach-types.h> 41#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 42#include <asm/mach/arch.h>
43#include <asm/hardware/gic.h>
44 43
45#include <mach/hardware.h> 44#include <mach/hardware.h>
46#include <mach/setup.h> 45#include <mach/setup.h>
@@ -752,7 +751,6 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
752 .init_irq = ux500_init_irq, 751 .init_irq = ux500_init_irq,
753 /* we re-use nomadik timer here */ 752 /* we re-use nomadik timer here */
754 .init_time = ux500_timer_init, 753 .init_time = ux500_timer_init,
755 .handle_irq = gic_handle_irq,
756 .init_machine = mop500_init_machine, 754 .init_machine = mop500_init_machine,
757 .init_late = ux500_init_late, 755 .init_late = ux500_init_late,
758MACHINE_END 756MACHINE_END
@@ -762,7 +760,6 @@ MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
762 .map_io = u8500_map_io, 760 .map_io = u8500_map_io,
763 .init_irq = ux500_init_irq, 761 .init_irq = ux500_init_irq,
764 .init_time = ux500_timer_init, 762 .init_time = ux500_timer_init,
765 .handle_irq = gic_handle_irq,
766 .init_machine = mop500_init_machine, 763 .init_machine = mop500_init_machine,
767 .init_late = ux500_init_late, 764 .init_late = ux500_init_late,
768MACHINE_END 765MACHINE_END
@@ -773,7 +770,6 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
773 .map_io = u8500_map_io, 770 .map_io = u8500_map_io,
774 .init_irq = ux500_init_irq, 771 .init_irq = ux500_init_irq,
775 .init_time = ux500_timer_init, 772 .init_time = ux500_timer_init,
776 .handle_irq = gic_handle_irq,
777 .init_machine = hrefv60_init_machine, 773 .init_machine = hrefv60_init_machine,
778 .init_late = ux500_init_late, 774 .init_late = ux500_init_late,
779MACHINE_END 775MACHINE_END
@@ -785,7 +781,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
785 .init_irq = ux500_init_irq, 781 .init_irq = ux500_init_irq,
786 /* we re-use nomadik timer here */ 782 /* we re-use nomadik timer here */
787 .init_time = ux500_timer_init, 783 .init_time = ux500_timer_init,
788 .handle_irq = gic_handle_irq,
789 .init_machine = snowball_init_machine, 784 .init_machine = snowball_init_machine,
790 .init_late = NULL, 785 .init_late = NULL,
791MACHINE_END 786MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 7875d3c85df1..218a6b1ada7e 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -27,7 +27,6 @@
27#include <asm/pmu.h> 27#include <asm/pmu.h>
28#include <asm/mach/map.h> 28#include <asm/mach/map.h>
29#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
30#include <asm/hardware/gic.h>
31 30
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <mach/setup.h> 32#include <mach/setup.h>
@@ -285,7 +284,8 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
285 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL), 284 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
286 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), 285 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
287 /* Requires device name bindings. */ 286 /* Requires device name bindings. */
288 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL), 287 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", U8500_PRCMU_BASE,
288 "pinctrl-db8500", NULL),
289 /* Requires clock name and DMA bindings. */ 289 /* Requires clock name and DMA bindings. */
290 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, 290 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
291 "ux500-msp-i2s.0", &msp0_platform_data), 291 "ux500-msp-i2s.0", &msp0_platform_data),
@@ -341,7 +341,6 @@ DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
341 .init_irq = ux500_init_irq, 341 .init_irq = ux500_init_irq,
342 /* we re-use nomadik timer here */ 342 /* we re-use nomadik timer here */
343 .init_time = ux500_timer_init, 343 .init_time = ux500_timer_init,
344 .handle_irq = gic_handle_irq,
345 .init_machine = u8500_init_machine, 344 .init_machine = u8500_init_machine,
346 .init_late = NULL, 345 .init_late = NULL,
347 .dt_compat = stericsson_dt_platform_compat, 346 .dt_compat = stericsson_dt_platform_compat,
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 721e7b4275f3..5dd90d31ffc3 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -17,9 +17,10 @@
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_irq.h> 18#include <linux/of_irq.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/irqchip.h>
21#include <linux/irqchip/arm-gic.h>
20#include <linux/platform_data/clk-ux500.h> 22#include <linux/platform_data/clk-ux500.h>
21 23
22#include <asm/hardware/gic.h>
23#include <asm/mach/map.h> 24#include <asm/mach/map.h>
24 25
25#include <mach/hardware.h> 26#include <mach/hardware.h>
@@ -42,11 +43,6 @@ void __iomem *_PRCMU_BASE;
42 * This feels fragile because it depends on the gpio device getting probed 43 * This feels fragile because it depends on the gpio device getting probed
43 * _before_ any device uses the gpio interrupts. 44 * _before_ any device uses the gpio interrupts.
44*/ 45*/
45static const struct of_device_id ux500_dt_irq_match[] = {
46 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
47 {},
48};
49
50void __init ux500_init_irq(void) 46void __init ux500_init_irq(void)
51{ 47{
52 void __iomem *dist_base; 48 void __iomem *dist_base;
@@ -62,7 +58,7 @@ void __init ux500_init_irq(void)
62 58
63#ifdef CONFIG_OF 59#ifdef CONFIG_OF
64 if (of_have_populated_dt()) 60 if (of_have_populated_dt())
65 of_irq_init(ux500_dt_irq_match); 61 irqchip_init();
66 else 62 else
67#endif 63#endif
68 gic_init(0, 29, dist_base, cpu_base); 64 gic_init(0, 29, dist_base, cpu_base);
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 3db7782f3afb..b8adac93421f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -16,9 +16,9 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/irqchip/arm-gic.h>
19 20
20#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
21#include <asm/hardware/gic.h>
22#include <asm/smp_plat.h> 22#include <asm/smp_plat.h>
23#include <asm/smp_scu.h> 23#include <asm/smp_scu.h>
24#include <mach/hardware.h> 24#include <mach/hardware.h>
@@ -91,7 +91,7 @@ static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *
91 */ 91 */
92 write_pen_release(cpu_logical_map(cpu)); 92 write_pen_release(cpu_logical_map(cpu));
93 93
94 smp_send_reschedule(cpu); 94 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
95 95
96 timeout = jiffies + (1 * HZ); 96 timeout = jiffies + (1 * HZ);
97 while (time_before(jiffies, timeout)) { 97 while (time_before(jiffies, timeout)) {
@@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)
155 155
156 for (i = 0; i < ncores; i++) 156 for (i = 0; i < ncores; i++)
157 set_cpu_possible(i, true); 157 set_cpu_possible(i, true);
158
159 set_smp_cross_call(gic_raise_softirq);
160} 158}
161 159
162static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) 160static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index d5ddc0c77f5b..a42b89083eb2 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -32,6 +32,7 @@
32#include <linux/amba/mmci.h> 32#include <linux/amba/mmci.h>
33#include <linux/amba/pl022.h> 33#include <linux/amba/pl022.h>
34#include <linux/io.h> 34#include <linux/io.h>
35#include <linux/irqchip/arm-vic.h>
35#include <linux/irqchip/versatile-fpga.h> 36#include <linux/irqchip/versatile-fpga.h>
36#include <linux/gfp.h> 37#include <linux/gfp.h>
37#include <linux/clkdev.h> 38#include <linux/clkdev.h>
@@ -40,7 +41,6 @@
40#include <asm/irq.h> 41#include <asm/irq.h>
41#include <asm/hardware/arm_timer.h> 42#include <asm/hardware/arm_timer.h>
42#include <asm/hardware/icst.h> 43#include <asm/hardware/icst.h>
43#include <asm/hardware/vic.h>
44#include <asm/mach-types.h> 44#include <asm/mach-types.h>
45 45
46#include <asm/mach/arch.h> 46#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h
index bf44c61bd1f6..0fd771ca617b 100644
--- a/arch/arm/mach-versatile/include/mach/irqs.h
+++ b/arch/arm/mach-versatile/include/mach/irqs.h
@@ -25,7 +25,7 @@
25 * IRQ interrupts definitions are the same as the INT definitions 25 * IRQ interrupts definitions are the same as the INT definitions
26 * held within platform.h 26 * held within platform.h
27 */ 27 */
28#define IRQ_VIC_START 0 28#define IRQ_VIC_START 32
29#define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT) 29#define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT)
30#define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT) 30#define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT)
31#define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx) 31#define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx)
@@ -100,7 +100,7 @@
100/* 100/*
101 * Secondary interrupt controller 101 * Secondary interrupt controller
102 */ 102 */
103#define IRQ_SIC_START 32 103#define IRQ_SIC_START 64
104#define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B) 104#define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B)
105#define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B) 105#define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B)
106#define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0) 106#define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0)
@@ -120,7 +120,7 @@
120#define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1) 120#define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1)
121#define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2) 121#define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2)
122#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) 122#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3)
123#define IRQ_SIC_END 63 123#define IRQ_SIC_END 95
124 124
125#define IRQ_GPIO0_START (IRQ_SIC_END + 1) 125#define IRQ_GPIO0_START (IRQ_SIC_END + 1)
126#define IRQ_GPIO0_END (IRQ_GPIO0_START + 31) 126#define IRQ_GPIO0_END (IRQ_GPIO0_START + 31)
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index 187c1da2c4bb..1caef1093793 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -26,7 +26,6 @@
26 26
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <asm/irq.h> 28#include <asm/irq.h>
29#include <asm/hardware/vic.h>
30#include <asm/mach-types.h> 29#include <asm/mach-types.h>
31 30
32#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -39,7 +38,6 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
39 .map_io = versatile_map_io, 38 .map_io = versatile_map_io,
40 .init_early = versatile_init_early, 39 .init_early = versatile_init_early,
41 .init_irq = versatile_init_irq, 40 .init_irq = versatile_init_irq,
42 .handle_irq = vic_handle_irq,
43 .init_time = versatile_timer_init, 41 .init_time = versatile_timer_init,
44 .init_machine = versatile_init, 42 .init_machine = versatile_init,
45 .restart = versatile_restart, 43 .restart = versatile_restart,
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index ccf9f8a92067..2558f2e957c3 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,7 +24,6 @@
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <asm/hardware/vic.h>
28#include <asm/mach-types.h> 27#include <asm/mach-types.h>
29#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
30 29
@@ -46,7 +45,6 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
46 .map_io = versatile_map_io, 45 .map_io = versatile_map_io,
47 .init_early = versatile_init_early, 46 .init_early = versatile_init_early,
48 .init_irq = versatile_init_irq, 47 .init_irq = versatile_init_irq,
49 .handle_irq = vic_handle_irq,
50 .init_time = versatile_timer_init, 48 .init_time = versatile_timer_init,
51 .init_machine = versatile_dt_init, 49 .init_machine = versatile_dt_init,
52 .dt_compat = versatile_dt_match, 50 .dt_compat = versatile_dt_match,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 1cabc0aa569d..611d140c8695 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -27,7 +27,6 @@
27#include <linux/io.h> 27#include <linux/io.h>
28 28
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/hardware/vic.h>
31#include <asm/irq.h> 30#include <asm/irq.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33 32
@@ -107,7 +106,6 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
107 .map_io = versatile_map_io, 106 .map_io = versatile_map_io,
108 .init_early = versatile_init_early, 107 .init_early = versatile_init_early,
109 .init_irq = versatile_init_irq, 108 .init_irq = versatile_init_irq,
110 .handle_irq = vic_handle_irq,
111 .init_time = versatile_timer_init, 109 .init_time = versatile_timer_init,
112 .init_machine = versatile_pb_init, 110 .init_machine = versatile_pb_init,
113 .restart = versatile_restart, 111 .restart = versatile_restart,
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 99e63f5f99d1..52d315b792c8 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -42,7 +42,6 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
42 bool "Enable A5 and A9 only errata work-arounds" 42 bool "Enable A5 and A9 only errata work-arounds"
43 default y 43 default y
44 select ARM_ERRATA_720789 44 select ARM_ERRATA_720789
45 select ARM_ERRATA_751472
46 select PL310_ERRATA_753970 if CACHE_PL310 45 select PL310_ERRATA_753970 if CACHE_PL310
47 help 46 help
48 Provides common dependencies for Versatile Express platforms 47 Provides common dependencies for Versatile Express platforms
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index 60838ddb8564..6f34497a4245 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -10,10 +10,10 @@
10#include <linux/amba/clcd.h> 10#include <linux/amba/clcd.h>
11#include <linux/clkdev.h> 11#include <linux/clkdev.h>
12#include <linux/vexpress.h> 12#include <linux/vexpress.h>
13#include <linux/irqchip/arm-gic.h>
13 14
14#include <asm/hardware/arm_timer.h> 15#include <asm/hardware/arm_timer.h>
15#include <asm/hardware/cache-l2x0.h> 16#include <asm/hardware/cache-l2x0.h>
16#include <asm/hardware/gic.h>
17#include <asm/smp_scu.h> 17#include <asm/smp_scu.h>
18#include <asm/smp_twd.h> 18#include <asm/smp_twd.h>
19 19
@@ -182,8 +182,6 @@ static void __init ct_ca9x4_init_cpu_map(void)
182 182
183 for (i = 0; i < ncores; ++i) 183 for (i = 0; i < ncores; ++i)
184 set_cpu_possible(i, true); 184 set_cpu_possible(i, true);
185
186 set_smp_cross_call(gic_raise_softirq);
187} 185}
188 186
189static void __init ct_ca9x4_smp_enable(unsigned int max_cpus) 187static void __init ct_ca9x4_smp_enable(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index c5d70de9bb4e..dc1ace55d557 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -16,7 +16,6 @@
16#include <linux/vexpress.h> 16#include <linux/vexpress.h>
17 17
18#include <asm/smp_scu.h> 18#include <asm/smp_scu.h>
19#include <asm/hardware/gic.h>
20#include <asm/mach/map.h> 19#include <asm/mach/map.h>
21 20
22#include <mach/motherboard.h> 21#include <mach/motherboard.h>
@@ -128,8 +127,6 @@ static void __init vexpress_dt_smp_init_cpus(void)
128 127
129 for (i = 0; i < ncores; ++i) 128 for (i = 0; i < ncores; ++i)
130 set_cpu_possible(i, true); 129 set_cpu_possible(i, true);
131
132 set_smp_cross_call(gic_raise_softirq);
133} 130}
134 131
135static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus) 132static void __init vexpress_dt_smp_prepare_cpus(unsigned int max_cpus)
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 08bd548ef144..915683cb67d6 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -7,6 +7,7 @@
7#include <linux/io.h> 7#include <linux/io.h>
8#include <linux/smp.h> 8#include <linux/smp.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/irqchip.h>
10#include <linux/of_address.h> 11#include <linux/of_address.h>
11#include <linux/of_fdt.h> 12#include <linux/of_fdt.h>
12#include <linux/of_irq.h> 13#include <linux/of_irq.h>
@@ -30,7 +31,6 @@
30#include <asm/mach/time.h> 31#include <asm/mach/time.h>
31#include <asm/hardware/arm_timer.h> 32#include <asm/hardware/arm_timer.h>
32#include <asm/hardware/cache-l2x0.h> 33#include <asm/hardware/cache-l2x0.h>
33#include <asm/hardware/gic.h>
34#include <asm/hardware/timer-sp.h> 34#include <asm/hardware/timer-sp.h>
35 35
36#include <mach/ct-ca9x4.h> 36#include <mach/ct-ca9x4.h>
@@ -373,7 +373,6 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
373 .init_early = v2m_init_early, 373 .init_early = v2m_init_early,
374 .init_irq = v2m_init_irq, 374 .init_irq = v2m_init_irq,
375 .init_time = v2m_timer_init, 375 .init_time = v2m_timer_init,
376 .handle_irq = gic_handle_irq,
377 .init_machine = v2m_init, 376 .init_machine = v2m_init,
378 .restart = vexpress_restart, 377 .restart = vexpress_restart,
379MACHINE_END 378MACHINE_END
@@ -430,16 +429,6 @@ void __init v2m_dt_init_early(void)
430 } 429 }
431} 430}
432 431
433static struct of_device_id vexpress_irq_match[] __initdata = {
434 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
435 {}
436};
437
438static void __init v2m_dt_init_irq(void)
439{
440 of_irq_init(vexpress_irq_match);
441}
442
443static void __init v2m_dt_timer_init(void) 432static void __init v2m_dt_timer_init(void)
444{ 433{
445 struct device_node *node = NULL; 434 struct device_node *node = NULL;
@@ -489,9 +478,8 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
489 .smp = smp_ops(vexpress_smp_ops), 478 .smp = smp_ops(vexpress_smp_ops),
490 .map_io = v2m_dt_map_io, 479 .map_io = v2m_dt_map_io,
491 .init_early = v2m_dt_init_early, 480 .init_early = v2m_dt_init_early,
492 .init_irq = v2m_dt_init_irq, 481 .init_irq = irqchip_init,
493 .init_time = v2m_dt_timer_init, 482 .init_time = v2m_dt_timer_init,
494 .init_machine = v2m_dt_init, 483 .init_machine = v2m_dt_init,
495 .handle_irq = gic_handle_irq,
496 .restart = vexpress_restart, 484 .restart = vexpress_restart,
497MACHINE_END 485MACHINE_END
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
index 2ed0b7d95db6..c0b1c604ccf8 100644
--- a/arch/arm/mach-vt8500/Kconfig
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -1,12 +1,34 @@
1config ARCH_VT8500 1config ARCH_VT8500
2 bool "VIA/WonderMedia 85xx" if ARCH_MULTI_V5 2 bool
3 default ARCH_VT8500_SINGLE
4 select ARCH_HAS_CPUFREQ 3 select ARCH_HAS_CPUFREQ
5 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
6 select CLKDEV_LOOKUP 5 select CLKDEV_LOOKUP
7 select CPU_ARM926T
8 select GENERIC_CLOCKEVENTS 6 select GENERIC_CLOCKEVENTS
9 select GENERIC_GPIO 7 select GENERIC_GPIO
10 select HAVE_CLK 8 select HAVE_CLK
9 select VT8500_TIMER
11 help 10 help
12 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 11 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
12
13config ARCH_WM8505
14 bool "VIA/Wondermedia 85xx and WM8650"
15 depends on ARCH_MULTI_V5
16 select ARCH_VT8500
17 select CPU_ARM926T
18 help
19
20config ARCH_WM8750
21 bool "WonderMedia WM8750"
22 depends on ARCH_MULTI_V6
23 select ARCH_VT8500
24 select CPU_V6
25 help
26 Support for WonderMedia WM8750 System-on-Chip.
27
28config ARCH_WM8850
29 bool "WonderMedia WM8850"
30 depends on ARCH_MULTI_V7
31 select ARCH_VT8500
32 select CPU_V7
33 help
34 Support for WonderMedia WM8850 System-on-Chip.
diff --git a/arch/arm/mach-vt8500/Makefile b/arch/arm/mach-vt8500/Makefile
index e035251cda48..92ceb2436b60 100644
--- a/arch/arm/mach-vt8500/Makefile
+++ b/arch/arm/mach-vt8500/Makefile
@@ -1 +1 @@
obj-$(CONFIG_ARCH_VT8500) += irq.o timer.o vt8500.o obj-$(CONFIG_ARCH_VT8500) += irq.o vt8500.o
diff --git a/arch/arm/mach-vt8500/common.h b/arch/arm/mach-vt8500/common.h
index 6f2b843115db..77611a6968d6 100644
--- a/arch/arm/mach-vt8500/common.h
+++ b/arch/arm/mach-vt8500/common.h
@@ -18,7 +18,6 @@
18 18
19#include <linux/of.h> 19#include <linux/of.h>
20 20
21void __init vt8500_timer_init(void);
22int __init vt8500_irq_init(struct device_node *node, 21int __init vt8500_irq_init(struct device_node *node,
23 struct device_node *parent); 22 struct device_node *parent);
24 23
diff --git a/arch/arm/mach-vt8500/include/mach/timex.h b/arch/arm/mach-vt8500/include/mach/timex.h
deleted file mode 100644
index 8487e4c690b7..000000000000
--- a/arch/arm/mach-vt8500/include/mach/timex.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/include/mach/timex.h
3 *
4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef MACH_TIMEX_H
22#define MACH_TIMEX_H
23
24#define CLOCK_TICK_RATE (3000000)
25
26#endif /* MACH_TIMEX_H */
diff --git a/arch/arm/mach-vt8500/include/mach/uncompress.h b/arch/arm/mach-vt8500/include/mach/uncompress.h
deleted file mode 100644
index e6e81fdaf109..000000000000
--- a/arch/arm/mach-vt8500/include/mach/uncompress.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/* arch/arm/mach-vt8500/include/mach/uncompress.h
2 *
3 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
4 *
5 * Based on arch/arm/mach-dove/include/mach/uncompress.h
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#define UART0_PHYS 0xd8200000
19#define UART0_ADDR(x) *(volatile unsigned char *)(UART0_PHYS + x)
20
21static void putc(const char c)
22{
23 while (UART0_ADDR(0x1c) & 0x2)
24 /* Tx busy, wait and poll */;
25
26 UART0_ADDR(0) = c;
27}
28
29static void flush(void)
30{
31}
32
33/*
34 * nothing to do
35 */
36#define arch_decomp_setup()
37#define arch_decomp_wdog()
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c
deleted file mode 100644
index 3dd21a47881f..000000000000
--- a/arch/arm/mach-vt8500/timer.c
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/timer.c
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22/*
23 * This file is copied and modified from the original timer.c provided by
24 * Alexey Charkov. Minor changes have been made for Device Tree Support.
25 */
26
27#include <linux/io.h>
28#include <linux/irq.h>
29#include <linux/interrupt.h>
30#include <linux/clocksource.h>
31#include <linux/clockchips.h>
32#include <linux/delay.h>
33#include <asm/mach/time.h>
34
35#include <linux/of.h>
36#include <linux/of_address.h>
37#include <linux/of_irq.h>
38
39#define VT8500_TIMER_OFFSET 0x0100
40#define VT8500_TIMER_HZ 3000000
41#define TIMER_MATCH_VAL 0x0000
42#define TIMER_COUNT_VAL 0x0010
43#define TIMER_STATUS_VAL 0x0014
44#define TIMER_IER_VAL 0x001c /* interrupt enable */
45#define TIMER_CTRL_VAL 0x0020
46#define TIMER_AS_VAL 0x0024 /* access status */
47#define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */
48#define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */
49#define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */
50
51#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
52
53static void __iomem *regbase;
54
55static cycle_t vt8500_timer_read(struct clocksource *cs)
56{
57 int loops = msecs_to_loops(10);
58 writel(3, regbase + TIMER_CTRL_VAL);
59 while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
60 && --loops)
61 cpu_relax();
62 return readl(regbase + TIMER_COUNT_VAL);
63}
64
65static struct clocksource clocksource = {
66 .name = "vt8500_timer",
67 .rating = 200,
68 .read = vt8500_timer_read,
69 .mask = CLOCKSOURCE_MASK(32),
70 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
71};
72
73static int vt8500_timer_set_next_event(unsigned long cycles,
74 struct clock_event_device *evt)
75{
76 int loops = msecs_to_loops(10);
77 cycle_t alarm = clocksource.read(&clocksource) + cycles;
78 while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
79 && --loops)
80 cpu_relax();
81 writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
82
83 if ((signed)(alarm - clocksource.read(&clocksource)) <= 16)
84 return -ETIME;
85
86 writel(1, regbase + TIMER_IER_VAL);
87
88 return 0;
89}
90
91static void vt8500_timer_set_mode(enum clock_event_mode mode,
92 struct clock_event_device *evt)
93{
94 switch (mode) {
95 case CLOCK_EVT_MODE_RESUME:
96 case CLOCK_EVT_MODE_PERIODIC:
97 break;
98 case CLOCK_EVT_MODE_ONESHOT:
99 case CLOCK_EVT_MODE_UNUSED:
100 case CLOCK_EVT_MODE_SHUTDOWN:
101 writel(readl(regbase + TIMER_CTRL_VAL) | 1,
102 regbase + TIMER_CTRL_VAL);
103 writel(0, regbase + TIMER_IER_VAL);
104 break;
105 }
106}
107
108static struct clock_event_device clockevent = {
109 .name = "vt8500_timer",
110 .features = CLOCK_EVT_FEAT_ONESHOT,
111 .rating = 200,
112 .set_next_event = vt8500_timer_set_next_event,
113 .set_mode = vt8500_timer_set_mode,
114};
115
116static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
117{
118 struct clock_event_device *evt = dev_id;
119 writel(0xf, regbase + TIMER_STATUS_VAL);
120 evt->event_handler(evt);
121
122 return IRQ_HANDLED;
123}
124
125static struct irqaction irq = {
126 .name = "vt8500_timer",
127 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
128 .handler = vt8500_timer_interrupt,
129 .dev_id = &clockevent,
130};
131
132static struct of_device_id vt8500_timer_ids[] = {
133 { .compatible = "via,vt8500-timer" },
134 { }
135};
136
137void __init vt8500_timer_init(void)
138{
139 struct device_node *np;
140 int timer_irq;
141
142 np = of_find_matching_node(NULL, vt8500_timer_ids);
143 if (!np) {
144 pr_err("%s: Timer description missing from Device Tree\n",
145 __func__);
146 return;
147 }
148 regbase = of_iomap(np, 0);
149 if (!regbase) {
150 pr_err("%s: Missing iobase description in Device Tree\n",
151 __func__);
152 of_node_put(np);
153 return;
154 }
155 timer_irq = irq_of_parse_and_map(np, 0);
156 if (!timer_irq) {
157 pr_err("%s: Missing irq description in Device Tree\n",
158 __func__);
159 of_node_put(np);
160 return;
161 }
162
163 writel(1, regbase + TIMER_CTRL_VAL);
164 writel(0xf, regbase + TIMER_STATUS_VAL);
165 writel(~0, regbase + TIMER_MATCH_VAL);
166
167 if (clocksource_register_hz(&clocksource, VT8500_TIMER_HZ))
168 pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
169 __func__, clocksource.name);
170
171 clockevents_calc_mult_shift(&clockevent, VT8500_TIMER_HZ, 4);
172
173 /* copy-pasted from mach-msm; no idea */
174 clockevent.max_delta_ns =
175 clockevent_delta2ns(0xf0000000, &clockevent);
176 clockevent.min_delta_ns = clockevent_delta2ns(4, &clockevent);
177 clockevent.cpumask = cpumask_of(0);
178
179 if (setup_irq(timer_irq, &irq))
180 pr_err("%s: setup_irq failed for %s\n", __func__,
181 clockevent.name);
182 clockevents_register_device(&clockevent);
183}
184
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index d5b9c6689c9d..6141868b9a3c 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -20,6 +20,7 @@
20 20
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/pm.h> 22#include <linux/pm.h>
23#include <linux/vt8500_timer.h>
23 24
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
@@ -179,6 +180,8 @@ static const char * const vt8500_dt_compat[] = {
179 "via,vt8500", 180 "via,vt8500",
180 "wm,wm8650", 181 "wm,wm8650",
181 "wm,wm8505", 182 "wm,wm8505",
183 "wm,wm8750",
184 "wm,wm8850",
182}; 185};
183 186
184DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)") 187DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index d9c3d6b801c7..30fbca844575 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -91,7 +91,6 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
91 91
92static struct clock_event_device nuc900_clockevent_device = { 92static struct clock_event_device nuc900_clockevent_device = {
93 .name = "nuc900-timer0", 93 .name = "nuc900-timer0",
94 .shift = 32,
95 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 94 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
96 .set_mode = nuc900_clockevent_setmode, 95 .set_mode = nuc900_clockevent_setmode,
97 .set_next_event = nuc900_clockevent_setnextevent, 96 .set_next_event = nuc900_clockevent_setnextevent,
@@ -133,15 +132,10 @@ static void __init nuc900_clockevents_init(void)
133 __raw_writel(RESETINT, REG_TISR); 132 __raw_writel(RESETINT, REG_TISR);
134 setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); 133 setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
135 134
136 nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
137 nuc900_clockevent_device.shift);
138 nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
139 &nuc900_clockevent_device);
140 nuc900_clockevent_device.min_delta_ns = clockevent_delta2ns(0xf,
141 &nuc900_clockevent_device);
142 nuc900_clockevent_device.cpumask = cpumask_of(0); 135 nuc900_clockevent_device.cpumask = cpumask_of(0);
143 136
144 clockevents_register_device(&nuc900_clockevent_device); 137 clockevents_config_and_register(&nuc900_clockevent_device, rate,
138 0xf, 0xffffffff);
145} 139}
146 140
147static void __init nuc900_clocksource_init(void) 141static void __init nuc900_clocksource_init(void)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 2ae4bce652b6..6472a69cbfe1 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -31,7 +31,6 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/page.h> 32#include <asm/page.h>
33#include <asm/pgtable.h> 33#include <asm/pgtable.h>
34#include <asm/hardware/gic.h>
35#include <asm/hardware/cache-l2x0.h> 34#include <asm/hardware/cache-l2x0.h>
36 35
37#include "common.h" 36#include "common.h"
@@ -55,19 +54,6 @@ static void __init xilinx_init_machine(void)
55 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); 54 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
56} 55}
57 56
58static struct of_device_id irq_match[] __initdata = {
59 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
60 { }
61};
62
63/**
64 * xilinx_irq_init() - Interrupt controller initialization for the GIC.
65 */
66static void __init xilinx_irq_init(void)
67{
68 of_irq_init(irq_match);
69}
70
71#define SCU_PERIPH_PHYS 0xF8F00000 57#define SCU_PERIPH_PHYS 0xF8F00000
72#define SCU_PERIPH_SIZE SZ_8K 58#define SCU_PERIPH_SIZE SZ_8K
73#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) 59#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
@@ -110,8 +96,7 @@ static const char *xilinx_dt_match[] = {
110 96
111MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") 97MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
112 .map_io = xilinx_map_io, 98 .map_io = xilinx_map_io,
113 .init_irq = xilinx_irq_init, 99 .init_irq = irqchip_init,
114 .handle_irq = gic_handle_irq,
115 .init_machine = xilinx_init_machine, 100 .init_machine = xilinx_init_machine,
116 .init_time = xilinx_zynq_timer_init, 101 .init_time = xilinx_zynq_timer_init,
117 .dt_compat = xilinx_dt_match, 102 .dt_compat = xilinx_dt_match,
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 6911b8b2745c..c2f37390308a 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -352,7 +352,8 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
352 /* Unmapped register. */ 352 /* Unmapped register. */
353 sync_reg_offset = L2X0_DUMMY_REG; 353 sync_reg_offset = L2X0_DUMMY_REG;
354#endif 354#endif
355 outer_cache.set_debug = pl310_set_debug; 355 if ((cache_id & L2X0_CACHE_ID_RTL_MASK) <= L2X0_CACHE_ID_RTL_R3P0)
356 outer_cache.set_debug = pl310_set_debug;
356 break; 357 break;
357 case L2X0_CACHE_ID_PART_L210: 358 case L2X0_CACHE_ID_PART_L210:
358 ways = (aux >> 13) & 0xf; 359 ways = (aux >> 13) & 0xf;
@@ -459,8 +460,8 @@ static void aurora_pa_range(unsigned long start, unsigned long end,
459 unsigned long flags; 460 unsigned long flags;
460 461
461 raw_spin_lock_irqsave(&l2x0_lock, flags); 462 raw_spin_lock_irqsave(&l2x0_lock, flags);
462 writel(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG); 463 writel_relaxed(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG);
463 writel(end, l2x0_base + offset); 464 writel_relaxed(end, l2x0_base + offset);
464 raw_spin_unlock_irqrestore(&l2x0_lock, flags); 465 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
465 466
466 cache_sync(); 467 cache_sync();
@@ -505,15 +506,21 @@ static void aurora_clean_range(unsigned long start, unsigned long end)
505 506
506static void aurora_flush_range(unsigned long start, unsigned long end) 507static void aurora_flush_range(unsigned long start, unsigned long end)
507{ 508{
508 if (!l2_wt_override) { 509 start &= ~(CACHE_LINE_SIZE - 1);
509 start &= ~(CACHE_LINE_SIZE - 1); 510 end = ALIGN(end, CACHE_LINE_SIZE);
510 end = ALIGN(end, CACHE_LINE_SIZE); 511 while (start != end) {
511 while (start != end) { 512 unsigned long range_end = calc_range_end(start, end);
512 unsigned long range_end = calc_range_end(start, end); 513 /*
514 * If L2 is forced to WT, the L2 will always be clean and we
515 * just need to invalidate.
516 */
517 if (l2_wt_override)
513 aurora_pa_range(start, range_end - CACHE_LINE_SIZE, 518 aurora_pa_range(start, range_end - CACHE_LINE_SIZE,
514 AURORA_FLUSH_RANGE_REG); 519 AURORA_INVAL_RANGE_REG);
515 start = range_end; 520 else
516 } 521 aurora_pa_range(start, range_end - CACHE_LINE_SIZE,
522 AURORA_FLUSH_RANGE_REG);
523 start = range_end;
517 } 524 }
518} 525}
519 526
@@ -668,8 +675,9 @@ static void pl310_resume(void)
668static void aurora_resume(void) 675static void aurora_resume(void)
669{ 676{
670 if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { 677 if (!(readl(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
671 writel(l2x0_saved_regs.aux_ctrl, l2x0_base + L2X0_AUX_CTRL); 678 writel_relaxed(l2x0_saved_regs.aux_ctrl,
672 writel(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL); 679 l2x0_base + L2X0_AUX_CTRL);
680 writel_relaxed(l2x0_saved_regs.ctrl, l2x0_base + L2X0_CTRL);
673 } 681 }
674} 682}
675 683
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 350f6a74992b..3a3c015f8d5c 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -169,6 +169,7 @@ __v7_ca15mp_setup:
169 orreq r0, r0, r10 @ Enable CPU-specific SMP bits 169 orreq r0, r0, r10 @ Enable CPU-specific SMP bits
170 mcreq p15, 0, r0, c1, c0, 1 170 mcreq p15, 0, r0, c1, c0, 1
171#endif 171#endif
172 b __v7_setup
172 173
173__v7_pj4b_setup: 174__v7_pj4b_setup:
174#ifdef CONFIG_CPU_PJ4B 175#ifdef CONFIG_CPU_PJ4B
@@ -245,7 +246,8 @@ __v7_setup:
245 ldr r10, =0x00000c08 @ Cortex-A8 primary part number 246 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
246 teq r0, r10 247 teq r0, r10
247 bne 2f 248 bne 2f
248#ifdef CONFIG_ARM_ERRATA_430973 249#if defined(CONFIG_ARM_ERRATA_430973) && !defined(CONFIG_ARCH_MULTIPLATFORM)
250
249 teq r5, #0x00100000 @ only present in r1p* 251 teq r5, #0x00100000 @ only present in r1p*
250 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register 252 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register
251 orreq r10, r10, #(1 << 6) @ set IBE to 1 253 orreq r10, r10, #(1 << 6) @ set IBE to 1
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index cbfbbe461788..837a2d52e9db 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -156,14 +156,9 @@ void __init iop_init_time(unsigned long tick_rate)
156 write_tmr0(timer_ctl & ~IOP_TMR_EN); 156 write_tmr0(timer_ctl & ~IOP_TMR_EN);
157 write_tisr(1); 157 write_tisr(1);
158 setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq); 158 setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
159 clockevents_calc_mult_shift(&iop_clockevent,
160 tick_rate, IOP_MIN_RANGE);
161 iop_clockevent.max_delta_ns =
162 clockevent_delta2ns(0xfffffffe, &iop_clockevent);
163 iop_clockevent.min_delta_ns =
164 clockevent_delta2ns(0xf, &iop_clockevent);
165 iop_clockevent.cpumask = cpumask_of(0); 159 iop_clockevent.cpumask = cpumask_of(0);
166 clockevents_register_device(&iop_clockevent); 160 clockevents_config_and_register(&iop_clockevent, tick_rate,
161 0xf, 0xfffffffe);
167 162
168 /* 163 /*
169 * Set up free-running clocksource timer 1. 164 * Set up free-running clocksource timer 1.
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 9d9aa2f55129..a14a78a2f149 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := sram.o dma.o fb.o counter_32k.o 6obj-y := sram.o dma.o counter_32k.o
7obj-m := 7obj-m :=
8obj-n := 8obj-n :=
9obj- := 9obj- :=
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f3771cdb9838..5b0b86bb34bb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,6 +22,8 @@
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23#include <asm/sched_clock.h> 23#include <asm/sched_clock.h>
24 24
25#include <plat/counter-32k.h>
26
25/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ 27/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
26#define OMAP2_32KSYNCNT_REV_OFF 0x0 28#define OMAP2_32KSYNCNT_REV_OFF 0x0
27#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) 29#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 37a488aaa2ba..4136b20cba3c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2000,7 +2000,7 @@ void omap_dma_global_context_restore(void)
2000 omap_clear_dma(ch); 2000 omap_clear_dma(ch);
2001} 2001}
2002 2002
2003static int __devinit omap_system_dma_probe(struct platform_device *pdev) 2003static int omap_system_dma_probe(struct platform_device *pdev)
2004{ 2004{
2005 int ch, ret = 0; 2005 int ch, ret = 0;
2006 int dma_irq; 2006 int dma_irq;
@@ -2116,7 +2116,7 @@ exit_dma_lch_fail:
2116 return ret; 2116 return ret;
2117} 2117}
2118 2118
2119static int __devexit omap_system_dma_remove(struct platform_device *pdev) 2119static int omap_system_dma_remove(struct platform_device *pdev)
2120{ 2120{
2121 int dma_irq; 2121 int dma_irq;
2122 2122
@@ -2140,7 +2140,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev)
2140 2140
2141static struct platform_driver omap_system_dma_driver = { 2141static struct platform_driver omap_system_dma_driver = {
2142 .probe = omap_system_dma_probe, 2142 .probe = omap_system_dma_probe,
2143 .remove = __devexit_p(omap_system_dma_remove), 2143 .remove = omap_system_dma_remove,
2144 .driver = { 2144 .driver = {
2145 .name = "omap_dma_system" 2145 .name = "omap_dma_system"
2146 }, 2146 },
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 89585c293554..7b433f3bddca 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -777,7 +777,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active);
777 * Called by driver framework at the end of device registration for all 777 * Called by driver framework at the end of device registration for all
778 * timer devices. 778 * timer devices.
779 */ 779 */
780static int __devinit omap_dm_timer_probe(struct platform_device *pdev) 780static int omap_dm_timer_probe(struct platform_device *pdev)
781{ 781{
782 unsigned long flags; 782 unsigned long flags;
783 struct omap_dm_timer *timer; 783 struct omap_dm_timer *timer;
@@ -864,7 +864,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
864 * In addition to freeing platform resources it also deletes the timer 864 * In addition to freeing platform resources it also deletes the timer
865 * entry from the local list. 865 * entry from the local list.
866 */ 866 */
867static int __devexit omap_dm_timer_remove(struct platform_device *pdev) 867static int omap_dm_timer_remove(struct platform_device *pdev)
868{ 868{
869 struct omap_dm_timer *timer; 869 struct omap_dm_timer *timer;
870 unsigned long flags; 870 unsigned long flags;
@@ -891,26 +891,15 @@ MODULE_DEVICE_TABLE(of, omap_timer_match);
891 891
892static struct platform_driver omap_dm_timer_driver = { 892static struct platform_driver omap_dm_timer_driver = {
893 .probe = omap_dm_timer_probe, 893 .probe = omap_dm_timer_probe,
894 .remove = __devexit_p(omap_dm_timer_remove), 894 .remove = omap_dm_timer_remove,
895 .driver = { 895 .driver = {
896 .name = "omap_timer", 896 .name = "omap_timer",
897 .of_match_table = of_match_ptr(omap_timer_match), 897 .of_match_table = of_match_ptr(omap_timer_match),
898 }, 898 },
899}; 899};
900 900
901static int __init omap_dm_timer_driver_init(void)
902{
903 return platform_driver_register(&omap_dm_timer_driver);
904}
905
906static void __exit omap_dm_timer_driver_exit(void)
907{
908 platform_driver_unregister(&omap_dm_timer_driver);
909}
910
911early_platform_init("earlytimer", &omap_dm_timer_driver); 901early_platform_init("earlytimer", &omap_dm_timer_driver);
912module_init(omap_dm_timer_driver_init); 902module_platform_driver(omap_dm_timer_driver);
913module_exit(omap_dm_timer_driver_exit);
914 903
915MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver"); 904MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
916MODULE_LICENSE("GPL"); 905MODULE_LICENSE("GPL");
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index b4516aba67ed..c9a66bf36c9a 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -32,8 +32,4 @@
32#include <mach/soc.h> 32#include <mach/soc.h>
33#endif 33#endif
34 34
35#ifdef CONFIG_ARCH_OMAP2PLUS
36#include "../../mach-omap2/soc.h"
37#endif
38
39#endif 35#endif
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 743fc2836f7a..a5bc92d7e476 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,6 +26,8 @@
26 26
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#include <plat/sram.h>
30
29#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) 31#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
30 32
31static void __iomem *omap_sram_base; 33static void __iomem *omap_sram_base;
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 0f4fa863dd55..5d5ac0f05422 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -156,7 +156,6 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
156static struct clock_event_device orion_clkevt = { 156static struct clock_event_device orion_clkevt = {
157 .name = "orion_tick", 157 .name = "orion_tick",
158 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, 158 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
159 .shift = 32,
160 .rating = 300, 159 .rating = 300,
161 .set_next_event = orion_clkevt_next_event, 160 .set_next_event = orion_clkevt_next_event,
162 .set_mode = orion_clkevt_mode, 161 .set_mode = orion_clkevt_mode,
@@ -221,9 +220,6 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
221 * Setup clockevent timer (interrupt-driven). 220 * Setup clockevent timer (interrupt-driven).
222 */ 221 */
223 setup_irq(irq, &orion_timer_irq); 222 setup_irq(irq, &orion_timer_irq);
224 orion_clkevt.mult = div_sc(tclk, NSEC_PER_SEC, orion_clkevt.shift);
225 orion_clkevt.max_delta_ns = clockevent_delta2ns(0xfffffffe, &orion_clkevt);
226 orion_clkevt.min_delta_ns = clockevent_delta2ns(1, &orion_clkevt);
227 orion_clkevt.cpumask = cpumask_of(0); 223 orion_clkevt.cpumask = cpumask_of(0);
228 clockevents_register_device(&orion_clkevt); 224 clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe);
229} 225}
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index 584c9bf8ed2d..8e11e96eab5e 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -72,7 +72,7 @@ void pxa_ssp_free(struct ssp_device *ssp)
72} 72}
73EXPORT_SYMBOL(pxa_ssp_free); 73EXPORT_SYMBOL(pxa_ssp_free);
74 74
75static int __devinit pxa_ssp_probe(struct platform_device *pdev) 75static int pxa_ssp_probe(struct platform_device *pdev)
76{ 76{
77 const struct platform_device_id *id = platform_get_device_id(pdev); 77 const struct platform_device_id *id = platform_get_device_id(pdev);
78 struct resource *res; 78 struct resource *res;
@@ -164,7 +164,7 @@ err_free:
164 return ret; 164 return ret;
165} 165}
166 166
167static int __devexit pxa_ssp_remove(struct platform_device *pdev) 167static int pxa_ssp_remove(struct platform_device *pdev)
168{ 168{
169 struct resource *res; 169 struct resource *res;
170 struct ssp_device *ssp; 170 struct ssp_device *ssp;
@@ -199,7 +199,7 @@ static const struct platform_device_id ssp_id_table[] = {
199 199
200static struct platform_driver pxa_ssp_driver = { 200static struct platform_driver pxa_ssp_driver = {
201 .probe = pxa_ssp_probe, 201 .probe = pxa_ssp_probe,
202 .remove = __devexit_p(pxa_ssp_remove), 202 .remove = pxa_ssp_remove,
203 .driver = { 203 .driver = {
204 .owner = THIS_MODULE, 204 .owner = THIS_MODULE,
205 .name = "pxa2xx-ssp", 205 .name = "pxa2xx-ssp",
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 37542c2689a2..2d676ab50f73 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -416,7 +416,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
416 return 0; 416 return 0;
417} 417}
418 418
419static int __devexit s3c_adc_remove(struct platform_device *pdev) 419static int s3c_adc_remove(struct platform_device *pdev)
420{ 420{
421 struct adc_device *adc = platform_get_drvdata(pdev); 421 struct adc_device *adc = platform_get_drvdata(pdev);
422 422
@@ -516,7 +516,7 @@ static struct platform_driver s3c_adc_driver = {
516 .pm = &adc_pm_ops, 516 .pm = &adc_pm_ops,
517 }, 517 },
518 .probe = s3c_adc_probe, 518 .probe = s3c_adc_probe,
519 .remove = __devexit_p(s3c_adc_remove), 519 .remove = s3c_adc_remove,
520}; 520};
521 521
522static int __init adc_init(void) 522static int __init adc_init(void)
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index e0667a1c137c..37703ef6dfc7 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,7 +43,7 @@ extern unsigned long samsung_cpu_id;
43#define EXYNOS4_CPU_MASK 0xFFFE0000 43#define EXYNOS4_CPU_MASK 0xFFFE0000
44 44
45#define EXYNOS5250_SOC_ID 0x43520000 45#define EXYNOS5250_SOC_ID 0x43520000
46#define EXYNOS5440_SOC_ID 0x54400000 46#define EXYNOS5440_SOC_ID 0xE5440000
47#define EXYNOS5_SOC_MASK 0xFFFFF000 47#define EXYNOS5_SOC_MASK 0xFFFFF000
48 48
49#define IS_SAMSUNG_CPU(name, id, mask) \ 49#define IS_SAMSUNG_CPU(name, id, mask) \
diff --git a/arch/arm/plat-samsung/s5p-irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c
index 33bd3f3d20f5..faa651602780 100644
--- a/arch/arm/plat-samsung/s5p-irq-eint.c
+++ b/arch/arm/plat-samsung/s5p-irq-eint.c
@@ -15,8 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18 18#include <linux/irqchip/arm-vic.h>
19#include <asm/hardware/vic.h>
20 19
21#include <plat/regs-irqtype.h> 20#include <plat/regs-irqtype.h>
22 21
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
index dfb47d638f03..103e371f5e35 100644
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -13,8 +13,7 @@
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/io.h> 15#include <linux/io.h>
16 16#include <linux/irqchip/arm-vic.h>
17#include <asm/hardware/vic.h>
18 17
19#include <mach/map.h> 18#include <mach/map.h>
20#include <plat/regs-timer.h> 19#include <plat/regs-timer.h>
diff --git a/arch/arm/plat-samsung/s5p-time.c b/arch/arm/plat-samsung/s5p-time.c
index dabede46c0ec..e92510cf82ee 100644
--- a/arch/arm/plat-samsung/s5p-time.c
+++ b/arch/arm/plat-samsung/s5p-time.c
@@ -274,15 +274,8 @@ static void __init s5p_clockevent_init(void)
274 clock_rate = clk_get_rate(tin_event); 274 clock_rate = clk_get_rate(tin_event);
275 clock_count_per_tick = clock_rate / HZ; 275 clock_count_per_tick = clock_rate / HZ;
276 276
277 clockevents_calc_mult_shift(&time_event_device,
278 clock_rate, S5PTIMER_MIN_RANGE);
279 time_event_device.max_delta_ns =
280 clockevent_delta2ns(-1, &time_event_device);
281 time_event_device.min_delta_ns =
282 clockevent_delta2ns(1, &time_event_device);
283
284 time_event_device.cpumask = cpumask_of(0); 277 time_event_device.cpumask = cpumask_of(0);
285 clockevents_register_device(&time_event_device); 278 clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
286 279
287 irq_number = timer_source.event_id + IRQ_TIMER0; 280 irq_number = timer_source.event_id + IRQ_TIMER0;
288 setup_irq(irq_number, &s5p_clock_event_irq); 281 setup_irq(irq_number, &s5p_clock_event_irq);
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 03321af5de9f..bd5c53cd6962 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -186,15 +186,9 @@ static void __init spear_clockevent_init(int irq)
186 tick_rate = clk_get_rate(gpt_clk); 186 tick_rate = clk_get_rate(gpt_clk);
187 tick_rate >>= CTRL_PRESCALER16; 187 tick_rate >>= CTRL_PRESCALER16;
188 188
189 clockevents_calc_mult_shift(&clkevt, tick_rate, SPEAR_MIN_RANGE);
190
191 clkevt.max_delta_ns = clockevent_delta2ns(0xfff0,
192 &clkevt);
193 clkevt.min_delta_ns = clockevent_delta2ns(3, &clkevt);
194
195 clkevt.cpumask = cpumask_of(0); 189 clkevt.cpumask = cpumask_of(0);
196 190
197 clockevents_register_device(&clkevt); 191 clockevents_config_and_register(&clkevt, tick_rate, 3, 0xfff0);
198 192
199 setup_irq(irq, &spear_timer_irq); 193 setup_irq(irq, &spear_timer_irq);
200} 194}
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 04ca4937d8ca..f2ac15561778 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -14,10 +14,10 @@
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/jiffies.h> 15#include <linux/jiffies.h>
16#include <linux/smp.h> 16#include <linux/smp.h>
17#include <linux/irqchip/arm-gic.h>
17 18
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
20#include <asm/hardware/gic.h>
21 21
22/* 22/*
23 * Write pen_release in a way that is guaranteed to be visible to all 23 * Write pen_release in a way that is guaranteed to be visible to all
@@ -79,7 +79,7 @@ int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idl
79 * the boot monitor to read the system wide flags register, 79 * the boot monitor to read the system wide flags register,
80 * and branch to the address found there. 80 * and branch to the address found there.
81 */ 81 */
82 gic_raise_softirq(cpumask_of(cpu), 0); 82 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
83 83
84 timeout = jiffies + (1 * HZ); 84 timeout = jiffies + (1 * HZ);
85 while (time_before(jiffies, timeout)) { 85 while (time_before(jiffies, timeout)) {