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-rw-r--r--arch/arm/mach-ep93xx/core.c68
-rw-r--r--arch/arm/mach-integrator/core.c46
2 files changed, 114 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 865427bfad7e..2d892e4daa07 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -30,7 +30,9 @@
30#include <linux/time.h> 30#include <linux/time.h>
31#include <linux/timex.h> 31#include <linux/timex.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/termios.h>
33#include <linux/amba/bus.h> 34#include <linux/amba/bus.h>
35#include <linux/amba/serial.h>
34 36
35#include <asm/types.h> 37#include <asm/types.h>
36#include <asm/setup.h> 38#include <asm/setup.h>
@@ -360,6 +362,68 @@ void __init ep93xx_init_irq(void)
360/************************************************************************* 362/*************************************************************************
361 * EP93xx peripheral handling 363 * EP93xx peripheral handling
362 *************************************************************************/ 364 *************************************************************************/
365#define EP93XX_UART_MCR_OFFSET (0x0100)
366
367static void ep93xx_uart_set_mctrl(struct amba_device *dev,
368 void __iomem *base, unsigned int mctrl)
369{
370 unsigned int mcr;
371
372 mcr = 0;
373 if (!(mctrl & TIOCM_RTS))
374 mcr |= 2;
375 if (!(mctrl & TIOCM_DTR))
376 mcr |= 1;
377
378 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
379}
380
381static struct amba_pl010_data ep93xx_uart_data = {
382 .set_mctrl = ep93xx_uart_set_mctrl,
383};
384
385static struct amba_device uart1_device = {
386 .dev = {
387 .bus_id = "apb:uart1",
388 .platform_data = &ep93xx_uart_data,
389 },
390 .res = {
391 .start = EP93XX_UART1_PHYS_BASE,
392 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
393 .flags = IORESOURCE_MEM,
394 },
395 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
396 .periphid = 0x00041010,
397};
398
399static struct amba_device uart2_device = {
400 .dev = {
401 .bus_id = "apb:uart2",
402 .platform_data = &ep93xx_uart_data,
403 },
404 .res = {
405 .start = EP93XX_UART2_PHYS_BASE,
406 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
407 .flags = IORESOURCE_MEM,
408 },
409 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
410 .periphid = 0x00041010,
411};
412
413static struct amba_device uart3_device = {
414 .dev = {
415 .bus_id = "apb:uart3",
416 .platform_data = &ep93xx_uart_data,
417 },
418 .res = {
419 .start = EP93XX_UART3_PHYS_BASE,
420 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
421 .flags = IORESOURCE_MEM,
422 },
423 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
424 .periphid = 0x00041010,
425};
426
363void __init ep93xx_init_devices(void) 427void __init ep93xx_init_devices(void)
364{ 428{
365 unsigned int v; 429 unsigned int v;
@@ -371,4 +435,8 @@ void __init ep93xx_init_devices(void)
371 v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE; 435 v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
372 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 436 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
373 __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG); 437 __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
438
439 amba_device_register(&uart1_device, &iomem_resource);
440 amba_device_register(&uart2_device, &iomem_resource);
441 amba_device_register(&uart3_device, &iomem_resource);
374} 442}
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 20071a2767cc..576a5e979c00 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -15,7 +15,9 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/termios.h>
18#include <linux/amba/bus.h> 19#include <linux/amba/bus.h>
20#include <linux/amba/serial.h>
19 21
20#include <asm/hardware.h> 22#include <asm/hardware.h>
21#include <asm/irq.h> 23#include <asm/irq.h>
@@ -28,6 +30,8 @@
28 30
29#include "common.h" 31#include "common.h"
30 32
33static struct amba_pl010_data integrator_uart_data;
34
31static struct amba_device rtc_device = { 35static struct amba_device rtc_device = {
32 .dev = { 36 .dev = {
33 .bus_id = "mb:15", 37 .bus_id = "mb:15",
@@ -44,6 +48,7 @@ static struct amba_device rtc_device = {
44static struct amba_device uart0_device = { 48static struct amba_device uart0_device = {
45 .dev = { 49 .dev = {
46 .bus_id = "mb:16", 50 .bus_id = "mb:16",
51 .platform_data = &integrator_uart_data,
47 }, 52 },
48 .res = { 53 .res = {
49 .start = INTEGRATOR_UART0_BASE, 54 .start = INTEGRATOR_UART0_BASE,
@@ -57,6 +62,7 @@ static struct amba_device uart0_device = {
57static struct amba_device uart1_device = { 62static struct amba_device uart1_device = {
58 .dev = { 63 .dev = {
59 .bus_id = "mb:17", 64 .bus_id = "mb:17",
65 .platform_data = &integrator_uart_data,
60 }, 66 },
61 .res = { 67 .res = {
62 .start = INTEGRATOR_UART1_BASE, 68 .start = INTEGRATOR_UART1_BASE,
@@ -115,6 +121,46 @@ static int __init integrator_init(void)
115 121
116arch_initcall(integrator_init); 122arch_initcall(integrator_init);
117 123
124/*
125 * On the Integrator platform, the port RTS and DTR are provided by
126 * bits in the following SC_CTRLS register bits:
127 * RTS DTR
128 * UART0 7 6
129 * UART1 5 4
130 */
131#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
132#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
133
134static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
135{
136 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
137
138 if (dev == &uart0_device) {
139 rts_mask = 1 << 4;
140 dtr_mask = 1 << 5;
141 } else {
142 rts_mask = 1 << 6;
143 dtr_mask = 1 << 7;
144 }
145
146 if (mctrl & TIOCM_RTS)
147 ctrlc |= rts_mask;
148 else
149 ctrls |= rts_mask;
150
151 if (mctrl & TIOCM_DTR)
152 ctrlc |= dtr_mask;
153 else
154 ctrls |= dtr_mask;
155
156 __raw_writel(ctrls, SC_CTRLS);
157 __raw_writel(ctrlc, SC_CTRLC);
158}
159
160static struct amba_pl010_data integrator_uart_data = {
161 .set_mctrl = integrator_uart_set_mctrl,
162};
163
118#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET 164#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
119 165
120static DEFINE_SPINLOCK(cm_lock); 166static DEFINE_SPINLOCK(cm_lock);