diff options
Diffstat (limited to 'arch/arm')
174 files changed, 2345 insertions, 2656 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 17b5ff0db1dc..2e86b8f62104 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -9,7 +9,7 @@ config ARM | |||
9 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) | 9 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
10 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) | 10 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
11 | select HAVE_ARCH_KGDB | 11 | select HAVE_ARCH_KGDB |
12 | select HAVE_KPROBES if (!XIP_KERNEL) | 12 | select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) |
13 | select HAVE_KRETPROBES if (HAVE_KPROBES) | 13 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
14 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) | 14 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
15 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) | 15 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
@@ -24,6 +24,7 @@ config ARM | |||
24 | select PERF_USE_VMALLOC | 24 | select PERF_USE_VMALLOC |
25 | select HAVE_REGS_AND_STACK_ACCESS_API | 25 | select HAVE_REGS_AND_STACK_ACCESS_API |
26 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) | 26 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
27 | select HAVE_C_RECORDMCOUNT | ||
27 | help | 28 | help |
28 | The ARM series is a line of low-power-consumption RISC chip designs | 29 | The ARM series is a line of low-power-consumption RISC chip designs |
29 | licensed by ARM Ltd and targeted at embedded applications and | 30 | licensed by ARM Ltd and targeted at embedded applications and |
@@ -1180,7 +1181,7 @@ config ISA_DMA_API | |||
1180 | bool | 1181 | bool |
1181 | 1182 | ||
1182 | config PCI | 1183 | config PCI |
1183 | bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX | 1184 | bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX || SA1100_NANOENGINE |
1184 | help | 1185 | help |
1185 | Find out whether you have a PCI motherboard. PCI is the name of a | 1186 | Find out whether you have a PCI motherboard. PCI is the name of a |
1186 | bus system, i.e. the way the CPU talks to the other stuff inside | 1187 | bus system, i.e. the way the CPU talks to the other stuff inside |
@@ -1191,6 +1192,12 @@ config PCI_DOMAINS | |||
1191 | bool | 1192 | bool |
1192 | depends on PCI | 1193 | depends on PCI |
1193 | 1194 | ||
1195 | config PCI_NANOENGINE | ||
1196 | bool "BSE nanoEngine PCI support" | ||
1197 | depends on SA1100_NANOENGINE | ||
1198 | help | ||
1199 | Enable PCI on the BSE nanoEngine board. | ||
1200 | |||
1194 | config PCI_SYSCALL | 1201 | config PCI_SYSCALL |
1195 | def_bool PCI | 1202 | def_bool PCI |
1196 | 1203 | ||
@@ -1329,7 +1336,7 @@ config HZ | |||
1329 | 1336 | ||
1330 | config THUMB2_KERNEL | 1337 | config THUMB2_KERNEL |
1331 | bool "Compile the kernel in Thumb-2 mode" | 1338 | bool "Compile the kernel in Thumb-2 mode" |
1332 | depends on CPU_V7 && EXPERIMENTAL | 1339 | depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL |
1333 | select AEABI | 1340 | select AEABI |
1334 | select ARM_ASM_UNIFIED | 1341 | select ARM_ASM_UNIFIED |
1335 | help | 1342 | help |
@@ -1668,6 +1675,19 @@ config ATAGS_PROC | |||
1668 | Should the atags used to boot the kernel be exported in an "atags" | 1675 | Should the atags used to boot the kernel be exported in an "atags" |
1669 | file in procfs. Useful with kexec. | 1676 | file in procfs. Useful with kexec. |
1670 | 1677 | ||
1678 | config CRASH_DUMP | ||
1679 | bool "Build kdump crash kernel (EXPERIMENTAL)" | ||
1680 | depends on EXPERIMENTAL | ||
1681 | help | ||
1682 | Generate crash dump after being started by kexec. This should | ||
1683 | be normally only set in special crash dump kernels which are | ||
1684 | loaded in the main kernel with kexec-tools into a specially | ||
1685 | reserved region and then later executed after a crash by | ||
1686 | kdump/kexec. The crash dump kernel must be compiled to a | ||
1687 | memory address not used by the main kernel | ||
1688 | |||
1689 | For more details see Documentation/kdump/kdump.txt | ||
1690 | |||
1671 | config AUTO_ZRELADDR | 1691 | config AUTO_ZRELADDR |
1672 | bool "Auto calculation of the decompressed kernel image address" | 1692 | bool "Auto calculation of the decompressed kernel image address" |
1673 | depends on !ZBOOT_ROM && !ARCH_U300 | 1693 | depends on !ZBOOT_ROM && !ARCH_U300 |
@@ -1777,7 +1797,7 @@ comment "At least one emulation must be selected" | |||
1777 | 1797 | ||
1778 | config FPE_NWFPE | 1798 | config FPE_NWFPE |
1779 | bool "NWFPE math emulation" | 1799 | bool "NWFPE math emulation" |
1780 | depends on !AEABI || OABI_COMPAT | 1800 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1781 | ---help--- | 1801 | ---help--- |
1782 | Say Y to include the NWFPE floating point emulator in the kernel. | 1802 | Say Y to include the NWFPE floating point emulator in the kernel. |
1783 | This is necessary to run most binaries. Linux does not currently | 1803 | This is necessary to run most binaries. Linux does not currently |
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 4a590f4113e2..4d26f2c52a75 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile | |||
@@ -70,12 +70,7 @@ else | |||
70 | $(obj)/uImage: LOADADDR=$(ZRELADDR) | 70 | $(obj)/uImage: LOADADDR=$(ZRELADDR) |
71 | endif | 71 | endif |
72 | 72 | ||
73 | ifeq ($(CONFIG_THUMB2_KERNEL),y) | ||
74 | # Set bit 0 to 1 so that "mov pc, rx" switches to Thumb-2 mode | ||
75 | $(obj)/uImage: STARTADDR=$(shell echo $(LOADADDR) | sed -e "s/.$$/1/") | ||
76 | else | ||
77 | $(obj)/uImage: STARTADDR=$(LOADADDR) | 73 | $(obj)/uImage: STARTADDR=$(LOADADDR) |
78 | endif | ||
79 | 74 | ||
80 | $(obj)/uImage: $(obj)/zImage FORCE | 75 | $(obj)/uImage: $(obj)/zImage FORCE |
81 | $(call if_changed,uimage) | 76 | $(call if_changed,uimage) |
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S index 8b0de41c3dcb..78b508075161 100644 --- a/arch/arm/boot/bootp/init.S +++ b/arch/arm/boot/bootp/init.S | |||
@@ -73,6 +73,8 @@ move: ldmia r4!, {r7 - r10} @ move 32-bytes at a time | |||
73 | 73 | ||
74 | .size _start, . - _start | 74 | .size _start, . - _start |
75 | 75 | ||
76 | .align | ||
77 | |||
76 | .type data,#object | 78 | .type data,#object |
77 | data: .word initrd_start @ source initrd address | 79 | data: .word initrd_start @ source initrd address |
78 | .word initrd_phys @ destination initrd address | 80 | .word initrd_phys @ destination initrd address |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 65a7c1c588a9..0a8f748e506a 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -45,6 +45,10 @@ else | |||
45 | endif | 45 | endif |
46 | endif | 46 | endif |
47 | 47 | ||
48 | ifeq ($(CONFIG_ARCH_SHMOBILE),y) | ||
49 | OBJS += head-shmobile.o | ||
50 | endif | ||
51 | |||
48 | # | 52 | # |
49 | # We now have a PIC decompressor implementation. Decompressors running | 53 | # We now have a PIC decompressor implementation. Decompressors running |
50 | # from RAM should not define ZTEXTADDR. Decompressors running directly | 54 | # from RAM should not define ZTEXTADDR. Decompressors running directly |
diff --git a/arch/arm/boot/compressed/head-shmobile.S b/arch/arm/boot/compressed/head-shmobile.S new file mode 100644 index 000000000000..30973b76e6ae --- /dev/null +++ b/arch/arm/boot/compressed/head-shmobile.S | |||
@@ -0,0 +1,53 @@ | |||
1 | /* | ||
2 | * The head-file for SH-Mobile ARM platforms | ||
3 | * | ||
4 | * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
5 | * Simon Horman <horms@verge.net.au> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | |||
21 | #ifdef CONFIG_ZBOOT_ROM | ||
22 | |||
23 | .section ".start", "ax" | ||
24 | |||
25 | /* load board-specific initialization code */ | ||
26 | #include <mach/zboot.h> | ||
27 | |||
28 | b 1f | ||
29 | __atags:@ tag #1 | ||
30 | .long 12 @ tag->hdr.size = tag_size(tag_core); | ||
31 | .long 0x54410001 @ tag->hdr.tag = ATAG_CORE; | ||
32 | .long 0 @ tag->u.core.flags = 0; | ||
33 | .long 0 @ tag->u.core.pagesize = 0; | ||
34 | .long 0 @ tag->u.core.rootdev = 0; | ||
35 | @ tag #2 | ||
36 | .long 8 @ tag->hdr.size = tag_size(tag_mem32); | ||
37 | .long 0x54410002 @ tag->hdr.tag = ATAG_MEM; | ||
38 | .long CONFIG_MEMORY_SIZE @ tag->u.mem.size = CONFIG_MEMORY_SIZE; | ||
39 | .long CONFIG_MEMORY_START @ @ tag->u.mem.start = CONFIG_MEMORY_START; | ||
40 | @ tag #3 | ||
41 | .long 0 @ tag->hdr.size = 0 | ||
42 | .long 0 @ tag->hdr.tag = ATAG_NONE; | ||
43 | 1: | ||
44 | |||
45 | /* Set board ID necessary for boot */ | ||
46 | ldr r7, 1f @ Set machine type register | ||
47 | adr r8, __atags @ Set atag register | ||
48 | b 2f | ||
49 | |||
50 | 1 : .long MACH_TYPE | ||
51 | 2 : | ||
52 | |||
53 | #endif /* CONFIG_ZBOOT_ROM */ | ||
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 9be21ba648cd..7193884ed8b0 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -125,9 +125,13 @@ wait: mrc p14, 0, pc, c0, c1, 0 | |||
125 | * sort out different calling conventions | 125 | * sort out different calling conventions |
126 | */ | 126 | */ |
127 | .align | 127 | .align |
128 | .arm @ Always enter in ARM state | ||
128 | start: | 129 | start: |
129 | .type start,#function | 130 | .type start,#function |
130 | .rept 8 | 131 | THUMB( adr r12, BSYM(1f) ) |
132 | THUMB( bx r12 ) | ||
133 | THUMB( .rept 6 ) | ||
134 | ARM( .rept 8 ) | ||
131 | mov r0, r0 | 135 | mov r0, r0 |
132 | .endr | 136 | .endr |
133 | 137 | ||
@@ -135,6 +139,7 @@ start: | |||
135 | .word 0x016f2818 @ Magic numbers to help the loader | 139 | .word 0x016f2818 @ Magic numbers to help the loader |
136 | .word start @ absolute load/run zImage address | 140 | .word start @ absolute load/run zImage address |
137 | .word _edata @ zImage end address | 141 | .word _edata @ zImage end address |
142 | THUMB( .thumb ) | ||
138 | 1: mov r7, r1 @ save architecture ID | 143 | 1: mov r7, r1 @ save architecture ID |
139 | mov r8, r2 @ save atags pointer | 144 | mov r8, r2 @ save atags pointer |
140 | 145 | ||
@@ -174,7 +179,8 @@ not_angel: | |||
174 | ldr sp, [r0, #28] | 179 | ldr sp, [r0, #28] |
175 | #ifdef CONFIG_AUTO_ZRELADDR | 180 | #ifdef CONFIG_AUTO_ZRELADDR |
176 | @ determine final kernel image address | 181 | @ determine final kernel image address |
177 | and r4, pc, #0xf8000000 | 182 | mov r4, pc |
183 | and r4, r4, #0xf8000000 | ||
178 | add r4, r4, #TEXT_OFFSET | 184 | add r4, r4, #TEXT_OFFSET |
179 | #else | 185 | #else |
180 | ldr r4, =zreladdr | 186 | ldr r4, =zreladdr |
@@ -445,7 +451,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size | |||
445 | */ | 451 | */ |
446 | mov r1, #0x1e | 452 | mov r1, #0x1e |
447 | orr r1, r1, #3 << 10 | 453 | orr r1, r1, #3 << 10 |
448 | mov r2, pc, lsr #20 | 454 | mov r2, pc |
455 | mov r2, r2, lsr #20 | ||
449 | orr r1, r1, r2, lsl #20 | 456 | orr r1, r1, r2, lsl #20 |
450 | add r0, r3, r2, lsl #2 | 457 | add r0, r3, r2, lsl #2 |
451 | str r1, [r0], #4 | 458 | str r1, [r0], #4 |
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index e6e8664a9413..e7521bca2c35 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
@@ -17,3 +17,4 @@ obj-$(CONFIG_ARCH_IXP2000) += uengine.o | |||
17 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o | 17 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o |
18 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o | 18 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o |
19 | obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o | 19 | obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o |
20 | obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o | ||
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 772f95f1aecd..0b89ef001330 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -35,6 +35,9 @@ | |||
35 | 35 | ||
36 | static DEFINE_SPINLOCK(irq_controller_lock); | 36 | static DEFINE_SPINLOCK(irq_controller_lock); |
37 | 37 | ||
38 | /* Address of GIC 0 CPU interface */ | ||
39 | void __iomem *gic_cpu_base_addr __read_mostly; | ||
40 | |||
38 | struct gic_chip_data { | 41 | struct gic_chip_data { |
39 | unsigned int irq_offset; | 42 | unsigned int irq_offset; |
40 | void __iomem *dist_base; | 43 | void __iomem *dist_base; |
@@ -45,7 +48,7 @@ struct gic_chip_data { | |||
45 | #define MAX_GIC_NR 1 | 48 | #define MAX_GIC_NR 1 |
46 | #endif | 49 | #endif |
47 | 50 | ||
48 | static struct gic_chip_data gic_data[MAX_GIC_NR]; | 51 | static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; |
49 | 52 | ||
50 | static inline void __iomem *gic_dist_base(unsigned int irq) | 53 | static inline void __iomem *gic_dist_base(unsigned int irq) |
51 | { | 54 | { |
@@ -146,9 +149,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) | |||
146 | unsigned int shift = (irq % 4) * 8; | 149 | unsigned int shift = (irq % 4) * 8; |
147 | unsigned int cpu = cpumask_first(mask_val); | 150 | unsigned int cpu = cpumask_first(mask_val); |
148 | u32 val; | 151 | u32 val; |
152 | struct irq_desc *desc; | ||
149 | 153 | ||
150 | spin_lock(&irq_controller_lock); | 154 | spin_lock(&irq_controller_lock); |
151 | irq_desc[irq].node = cpu; | 155 | desc = irq_to_desc(irq); |
156 | if (desc == NULL) { | ||
157 | spin_unlock(&irq_controller_lock); | ||
158 | return -EINVAL; | ||
159 | } | ||
160 | desc->node = cpu; | ||
152 | val = readl(reg) & ~(0xff << shift); | 161 | val = readl(reg) & ~(0xff << shift); |
153 | val |= 1 << (cpu + shift); | 162 | val |= 1 << (cpu + shift); |
154 | writel(val, reg); | 163 | writel(val, reg); |
@@ -207,68 +216,65 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) | |||
207 | set_irq_chained_handler(irq, gic_handle_cascade_irq); | 216 | set_irq_chained_handler(irq, gic_handle_cascade_irq); |
208 | } | 217 | } |
209 | 218 | ||
210 | void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, | 219 | static void __init gic_dist_init(struct gic_chip_data *gic, |
211 | unsigned int irq_start) | 220 | unsigned int irq_start) |
212 | { | 221 | { |
213 | unsigned int max_irq, i; | 222 | unsigned int gic_irqs, irq_limit, i; |
223 | void __iomem *base = gic->dist_base; | ||
214 | u32 cpumask = 1 << smp_processor_id(); | 224 | u32 cpumask = 1 << smp_processor_id(); |
215 | 225 | ||
216 | if (gic_nr >= MAX_GIC_NR) | ||
217 | BUG(); | ||
218 | |||
219 | cpumask |= cpumask << 8; | 226 | cpumask |= cpumask << 8; |
220 | cpumask |= cpumask << 16; | 227 | cpumask |= cpumask << 16; |
221 | 228 | ||
222 | gic_data[gic_nr].dist_base = base; | ||
223 | gic_data[gic_nr].irq_offset = (irq_start - 1) & ~31; | ||
224 | |||
225 | writel(0, base + GIC_DIST_CTRL); | 229 | writel(0, base + GIC_DIST_CTRL); |
226 | 230 | ||
227 | /* | 231 | /* |
228 | * Find out how many interrupts are supported. | 232 | * Find out how many interrupts are supported. |
229 | */ | ||
230 | max_irq = readl(base + GIC_DIST_CTR) & 0x1f; | ||
231 | max_irq = (max_irq + 1) * 32; | ||
232 | |||
233 | /* | ||
234 | * The GIC only supports up to 1020 interrupt sources. | 233 | * The GIC only supports up to 1020 interrupt sources. |
235 | * Limit this to either the architected maximum, or the | ||
236 | * platform maximum. | ||
237 | */ | 234 | */ |
238 | if (max_irq > max(1020, NR_IRQS)) | 235 | gic_irqs = readl(base + GIC_DIST_CTR) & 0x1f; |
239 | max_irq = max(1020, NR_IRQS); | 236 | gic_irqs = (gic_irqs + 1) * 32; |
237 | if (gic_irqs > 1020) | ||
238 | gic_irqs = 1020; | ||
240 | 239 | ||
241 | /* | 240 | /* |
242 | * Set all global interrupts to be level triggered, active low. | 241 | * Set all global interrupts to be level triggered, active low. |
243 | */ | 242 | */ |
244 | for (i = 32; i < max_irq; i += 16) | 243 | for (i = 32; i < gic_irqs; i += 16) |
245 | writel(0, base + GIC_DIST_CONFIG + i * 4 / 16); | 244 | writel(0, base + GIC_DIST_CONFIG + i * 4 / 16); |
246 | 245 | ||
247 | /* | 246 | /* |
248 | * Set all global interrupts to this CPU only. | 247 | * Set all global interrupts to this CPU only. |
249 | */ | 248 | */ |
250 | for (i = 32; i < max_irq; i += 4) | 249 | for (i = 32; i < gic_irqs; i += 4) |
251 | writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); | 250 | writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); |
252 | 251 | ||
253 | /* | 252 | /* |
254 | * Set priority on all global interrupts. | 253 | * Set priority on all global interrupts. |
255 | */ | 254 | */ |
256 | for (i = 32; i < max_irq; i += 4) | 255 | for (i = 32; i < gic_irqs; i += 4) |
257 | writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); | 256 | writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); |
258 | 257 | ||
259 | /* | 258 | /* |
260 | * Disable all interrupts. Leave the PPI and SGIs alone | 259 | * Disable all interrupts. Leave the PPI and SGIs alone |
261 | * as these enables are banked registers. | 260 | * as these enables are banked registers. |
262 | */ | 261 | */ |
263 | for (i = 32; i < max_irq; i += 32) | 262 | for (i = 32; i < gic_irqs; i += 32) |
264 | writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); | 263 | writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); |
265 | 264 | ||
266 | /* | 265 | /* |
266 | * Limit number of interrupts registered to the platform maximum | ||
267 | */ | ||
268 | irq_limit = gic->irq_offset + gic_irqs; | ||
269 | if (WARN_ON(irq_limit > NR_IRQS)) | ||
270 | irq_limit = NR_IRQS; | ||
271 | |||
272 | /* | ||
267 | * Setup the Linux IRQ subsystem. | 273 | * Setup the Linux IRQ subsystem. |
268 | */ | 274 | */ |
269 | for (i = irq_start; i < gic_data[gic_nr].irq_offset + max_irq; i++) { | 275 | for (i = irq_start; i < irq_limit; i++) { |
270 | set_irq_chip(i, &gic_chip); | 276 | set_irq_chip(i, &gic_chip); |
271 | set_irq_chip_data(i, &gic_data[gic_nr]); | 277 | set_irq_chip_data(i, gic); |
272 | set_irq_handler(i, handle_level_irq); | 278 | set_irq_handler(i, handle_level_irq); |
273 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 279 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
274 | } | 280 | } |
@@ -276,19 +282,12 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, | |||
276 | writel(1, base + GIC_DIST_CTRL); | 282 | writel(1, base + GIC_DIST_CTRL); |
277 | } | 283 | } |
278 | 284 | ||
279 | void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) | 285 | static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) |
280 | { | 286 | { |
281 | void __iomem *dist_base; | 287 | void __iomem *dist_base = gic->dist_base; |
288 | void __iomem *base = gic->cpu_base; | ||
282 | int i; | 289 | int i; |
283 | 290 | ||
284 | if (gic_nr >= MAX_GIC_NR) | ||
285 | BUG(); | ||
286 | |||
287 | dist_base = gic_data[gic_nr].dist_base; | ||
288 | BUG_ON(!dist_base); | ||
289 | |||
290 | gic_data[gic_nr].cpu_base = base; | ||
291 | |||
292 | /* | 291 | /* |
293 | * Deal with the banked PPI and SGI interrupts - disable all | 292 | * Deal with the banked PPI and SGI interrupts - disable all |
294 | * PPI interrupts, ensure all SGI interrupts are enabled. | 293 | * PPI interrupts, ensure all SGI interrupts are enabled. |
@@ -306,6 +305,42 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) | |||
306 | writel(1, base + GIC_CPU_CTRL); | 305 | writel(1, base + GIC_CPU_CTRL); |
307 | } | 306 | } |
308 | 307 | ||
308 | void __init gic_init(unsigned int gic_nr, unsigned int irq_start, | ||
309 | void __iomem *dist_base, void __iomem *cpu_base) | ||
310 | { | ||
311 | struct gic_chip_data *gic; | ||
312 | |||
313 | BUG_ON(gic_nr >= MAX_GIC_NR); | ||
314 | |||
315 | gic = &gic_data[gic_nr]; | ||
316 | gic->dist_base = dist_base; | ||
317 | gic->cpu_base = cpu_base; | ||
318 | gic->irq_offset = (irq_start - 1) & ~31; | ||
319 | |||
320 | if (gic_nr == 0) | ||
321 | gic_cpu_base_addr = cpu_base; | ||
322 | |||
323 | gic_dist_init(gic, irq_start); | ||
324 | gic_cpu_init(gic); | ||
325 | } | ||
326 | |||
327 | void __cpuinit gic_secondary_init(unsigned int gic_nr) | ||
328 | { | ||
329 | BUG_ON(gic_nr >= MAX_GIC_NR); | ||
330 | |||
331 | gic_cpu_init(&gic_data[gic_nr]); | ||
332 | } | ||
333 | |||
334 | void __cpuinit gic_enable_ppi(unsigned int irq) | ||
335 | { | ||
336 | unsigned long flags; | ||
337 | |||
338 | local_irq_save(flags); | ||
339 | irq_to_desc(irq)->status |= IRQ_NOPROBE; | ||
340 | gic_unmask_irq(irq); | ||
341 | local_irq_restore(flags); | ||
342 | } | ||
343 | |||
309 | #ifdef CONFIG_SMP | 344 | #ifdef CONFIG_SMP |
310 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) | 345 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) |
311 | { | 346 | { |
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 1bec96e85196..42ff90b46dfb 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -352,3 +352,4 @@ struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys) | |||
352 | return pci_scan_bus(nr, &it8152_ops, sys); | 352 | return pci_scan_bus(nr, &it8152_ops, sys); |
353 | } | 353 | } |
354 | 354 | ||
355 | EXPORT_SYMBOL(dma_set_coherent_mask); | ||
diff --git a/arch/arm/plat-versatile/timer-sp.c b/arch/arm/common/timer-sp.c index f09941b84381..6ef3342153b9 100644 --- a/arch/arm/plat-versatile/timer-sp.c +++ b/arch/arm/common/timer-sp.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/plat-versatile/timer-sp.c | 2 | * linux/arch/arm/common/timer-sp.c |
3 | * | 3 | * |
4 | * Copyright (C) 1999 - 2003 ARM Limited | 4 | * Copyright (C) 1999 - 2003 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
@@ -26,8 +26,6 @@ | |||
26 | 26 | ||
27 | #include <asm/hardware/arm_timer.h> | 27 | #include <asm/hardware/arm_timer.h> |
28 | 28 | ||
29 | #include <plat/timer-sp.h> | ||
30 | |||
31 | /* | 29 | /* |
32 | * These timers are currently always setup to be clocked at 1MHz. | 30 | * These timers are currently always setup to be clocked at 1MHz. |
33 | */ | 31 | */ |
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig new file mode 100644 index 000000000000..38cb7c985426 --- /dev/null +++ b/arch/arm/configs/at91rm9200_defconfig | |||
@@ -0,0 +1,341 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_IKCONFIG=y | ||
6 | CONFIG_IKCONFIG_PROC=y | ||
7 | CONFIG_LOG_BUF_SHIFT=14 | ||
8 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_MODULES=y | ||
11 | CONFIG_MODULE_FORCE_LOAD=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | CONFIG_MODVERSIONS=y | ||
14 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
15 | # CONFIG_BLK_DEV_BSG is not set | ||
16 | # CONFIG_IOSCHED_CFQ is not set | ||
17 | CONFIG_ARCH_AT91=y | ||
18 | CONFIG_MACH_ONEARM=y | ||
19 | CONFIG_ARCH_AT91RM9200DK=y | ||
20 | CONFIG_MACH_AT91RM9200EK=y | ||
21 | CONFIG_MACH_CSB337=y | ||
22 | CONFIG_MACH_CSB637=y | ||
23 | CONFIG_MACH_CARMEVA=y | ||
24 | CONFIG_MACH_ATEB9200=y | ||
25 | CONFIG_MACH_KB9200=y | ||
26 | CONFIG_MACH_PICOTUX2XX=y | ||
27 | CONFIG_MACH_KAFA=y | ||
28 | CONFIG_MACH_ECBAT91=y | ||
29 | CONFIG_MACH_YL9200=y | ||
30 | CONFIG_MACH_CPUAT91=y | ||
31 | CONFIG_MACH_ECO920=y | ||
32 | CONFIG_MTD_AT91_DATAFLASH_CARD=y | ||
33 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
34 | CONFIG_AT91_TIMER_HZ=100 | ||
35 | # CONFIG_ARM_THUMB is not set | ||
36 | CONFIG_PCCARD=y | ||
37 | CONFIG_AT91_CF=y | ||
38 | CONFIG_NO_HZ=y | ||
39 | CONFIG_HIGH_RES_TIMERS=y | ||
40 | CONFIG_PREEMPT=y | ||
41 | CONFIG_AEABI=y | ||
42 | CONFIG_LEDS=y | ||
43 | CONFIG_LEDS_CPU=y | ||
44 | CONFIG_ZBOOT_ROM_TEXT=0x10000000 | ||
45 | CONFIG_ZBOOT_ROM_BSS=0x20040000 | ||
46 | CONFIG_KEXEC=y | ||
47 | CONFIG_FPE_NWFPE=y | ||
48 | CONFIG_BINFMT_MISC=y | ||
49 | CONFIG_NET=y | ||
50 | CONFIG_PACKET=y | ||
51 | CONFIG_UNIX=y | ||
52 | CONFIG_XFRM_USER=m | ||
53 | CONFIG_INET=y | ||
54 | CONFIG_IP_MULTICAST=y | ||
55 | CONFIG_IP_PNP=y | ||
56 | CONFIG_IP_PNP_DHCP=y | ||
57 | CONFIG_IP_PNP_BOOTP=y | ||
58 | CONFIG_NET_IPIP=m | ||
59 | CONFIG_NET_IPGRE=m | ||
60 | CONFIG_INET_AH=m | ||
61 | CONFIG_INET_ESP=m | ||
62 | CONFIG_INET_IPCOMP=m | ||
63 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
64 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
65 | CONFIG_INET_XFRM_MODE_BEET=m | ||
66 | CONFIG_IPV6_PRIVACY=y | ||
67 | CONFIG_IPV6_ROUTER_PREF=y | ||
68 | CONFIG_IPV6_ROUTE_INFO=y | ||
69 | CONFIG_INET6_AH=m | ||
70 | CONFIG_INET6_ESP=m | ||
71 | CONFIG_INET6_IPCOMP=m | ||
72 | CONFIG_IPV6_MIP6=m | ||
73 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
74 | CONFIG_IPV6_TUNNEL=m | ||
75 | CONFIG_BRIDGE=m | ||
76 | CONFIG_VLAN_8021Q=m | ||
77 | CONFIG_BT=m | ||
78 | CONFIG_BT_L2CAP=m | ||
79 | CONFIG_BT_SCO=m | ||
80 | CONFIG_BT_RFCOMM=m | ||
81 | CONFIG_BT_RFCOMM_TTY=y | ||
82 | CONFIG_BT_BNEP=m | ||
83 | CONFIG_BT_BNEP_MC_FILTER=y | ||
84 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
85 | CONFIG_BT_HIDP=m | ||
86 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
87 | CONFIG_MTD=y | ||
88 | CONFIG_MTD_CONCAT=y | ||
89 | CONFIG_MTD_PARTITIONS=y | ||
90 | CONFIG_MTD_CMDLINE_PARTS=y | ||
91 | CONFIG_MTD_AFS_PARTS=y | ||
92 | CONFIG_MTD_CHAR=y | ||
93 | CONFIG_MTD_BLOCK=y | ||
94 | CONFIG_MTD_CFI=y | ||
95 | CONFIG_MTD_JEDECPROBE=y | ||
96 | CONFIG_MTD_CFI_INTELEXT=y | ||
97 | CONFIG_MTD_CFI_AMDSTD=y | ||
98 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
99 | CONFIG_MTD_PHYSMAP=y | ||
100 | CONFIG_MTD_PLATRAM=y | ||
101 | CONFIG_MTD_DATAFLASH=y | ||
102 | CONFIG_MTD_NAND=y | ||
103 | CONFIG_MTD_NAND_ATMEL=y | ||
104 | CONFIG_MTD_NAND_PLATFORM=y | ||
105 | CONFIG_MTD_UBI=y | ||
106 | CONFIG_MTD_UBI_GLUEBI=y | ||
107 | CONFIG_BLK_DEV_LOOP=y | ||
108 | CONFIG_BLK_DEV_NBD=y | ||
109 | CONFIG_BLK_DEV_RAM=y | ||
110 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
111 | CONFIG_ATMEL_TCLIB=y | ||
112 | CONFIG_EEPROM_LEGACY=m | ||
113 | CONFIG_SCSI=y | ||
114 | CONFIG_BLK_DEV_SD=y | ||
115 | CONFIG_BLK_DEV_SR=m | ||
116 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
117 | CONFIG_CHR_DEV_SG=m | ||
118 | CONFIG_SCSI_MULTI_LUN=y | ||
119 | # CONFIG_SCSI_LOWLEVEL is not set | ||
120 | CONFIG_NETDEVICES=y | ||
121 | CONFIG_TUN=m | ||
122 | CONFIG_PHYLIB=y | ||
123 | CONFIG_DAVICOM_PHY=y | ||
124 | CONFIG_SMSC_PHY=y | ||
125 | CONFIG_MICREL_PHY=y | ||
126 | CONFIG_NET_ETHERNET=y | ||
127 | CONFIG_ARM_AT91_ETHER=y | ||
128 | # CONFIG_NETDEV_1000 is not set | ||
129 | # CONFIG_NETDEV_10000 is not set | ||
130 | CONFIG_USB_CATC=m | ||
131 | CONFIG_USB_KAWETH=m | ||
132 | CONFIG_USB_PEGASUS=m | ||
133 | CONFIG_USB_RTL8150=m | ||
134 | CONFIG_USB_USBNET=m | ||
135 | CONFIG_USB_NET_DM9601=m | ||
136 | CONFIG_USB_NET_GL620A=m | ||
137 | CONFIG_USB_NET_PLUSB=m | ||
138 | CONFIG_USB_NET_RNDIS_HOST=m | ||
139 | CONFIG_USB_ALI_M5632=y | ||
140 | CONFIG_USB_AN2720=y | ||
141 | CONFIG_USB_EPSON2888=y | ||
142 | CONFIG_PPP=y | ||
143 | CONFIG_PPP_MULTILINK=y | ||
144 | CONFIG_PPP_FILTER=y | ||
145 | CONFIG_PPP_ASYNC=y | ||
146 | CONFIG_PPP_DEFLATE=y | ||
147 | CONFIG_PPP_BSDCOMP=y | ||
148 | CONFIG_PPP_MPPE=m | ||
149 | CONFIG_PPPOE=m | ||
150 | CONFIG_SLIP=m | ||
151 | CONFIG_SLIP_COMPRESSED=y | ||
152 | CONFIG_SLIP_SMART=y | ||
153 | CONFIG_SLIP_MODE_SLIP6=y | ||
154 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
155 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 | ||
156 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
157 | CONFIG_INPUT_EVDEV=y | ||
158 | CONFIG_KEYBOARD_GPIO=y | ||
159 | # CONFIG_INPUT_MOUSE is not set | ||
160 | CONFIG_INPUT_TOUCHSCREEN=y | ||
161 | CONFIG_SERIAL_ATMEL=y | ||
162 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
163 | CONFIG_LEGACY_PTY_COUNT=32 | ||
164 | CONFIG_HW_RANDOM=y | ||
165 | CONFIG_I2C=y | ||
166 | CONFIG_I2C_CHARDEV=y | ||
167 | CONFIG_I2C_GPIO=y | ||
168 | CONFIG_SPI=y | ||
169 | CONFIG_SPI_ATMEL=y | ||
170 | CONFIG_SPI_BITBANG=y | ||
171 | CONFIG_GPIO_SYSFS=y | ||
172 | CONFIG_HWMON=m | ||
173 | CONFIG_SENSORS_ADM1021=m | ||
174 | CONFIG_SENSORS_ADM1025=m | ||
175 | CONFIG_SENSORS_ADM1026=m | ||
176 | CONFIG_SENSORS_ADM1029=m | ||
177 | CONFIG_SENSORS_ADM1031=m | ||
178 | CONFIG_SENSORS_ADM9240=m | ||
179 | CONFIG_SENSORS_DS1621=m | ||
180 | CONFIG_SENSORS_GL518SM=m | ||
181 | CONFIG_SENSORS_GL520SM=m | ||
182 | CONFIG_SENSORS_IT87=m | ||
183 | CONFIG_SENSORS_LM63=m | ||
184 | CONFIG_SENSORS_LM73=m | ||
185 | CONFIG_SENSORS_LM75=m | ||
186 | CONFIG_SENSORS_LM77=m | ||
187 | CONFIG_SENSORS_LM78=m | ||
188 | CONFIG_SENSORS_LM80=m | ||
189 | CONFIG_SENSORS_LM83=m | ||
190 | CONFIG_SENSORS_LM85=m | ||
191 | CONFIG_SENSORS_LM87=m | ||
192 | CONFIG_SENSORS_LM90=m | ||
193 | CONFIG_SENSORS_LM92=m | ||
194 | CONFIG_SENSORS_MAX1619=m | ||
195 | CONFIG_SENSORS_PCF8591=m | ||
196 | CONFIG_SENSORS_SMSC47B397=m | ||
197 | CONFIG_SENSORS_W83781D=m | ||
198 | CONFIG_SENSORS_W83791D=m | ||
199 | CONFIG_SENSORS_W83792D=m | ||
200 | CONFIG_SENSORS_W83793=m | ||
201 | CONFIG_SENSORS_W83L785TS=m | ||
202 | CONFIG_WATCHDOG=y | ||
203 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
204 | CONFIG_AT91RM9200_WATCHDOG=y | ||
205 | CONFIG_FB=y | ||
206 | CONFIG_FB_MODE_HELPERS=y | ||
207 | CONFIG_FB_TILEBLITTING=y | ||
208 | CONFIG_FB_S1D13XXX=y | ||
209 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
210 | CONFIG_LCD_CLASS_DEVICE=y | ||
211 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
212 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
213 | CONFIG_DISPLAY_SUPPORT=y | ||
214 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
215 | CONFIG_FONTS=y | ||
216 | CONFIG_FONT_MINI_4x6=y | ||
217 | CONFIG_LOGO=y | ||
218 | # CONFIG_LOGO_LINUX_MONO is not set | ||
219 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
220 | CONFIG_USB=y | ||
221 | CONFIG_USB_DEVICEFS=y | ||
222 | # CONFIG_USB_DEVICE_CLASS is not set | ||
223 | CONFIG_USB_MON=y | ||
224 | CONFIG_USB_OHCI_HCD=y | ||
225 | CONFIG_USB_ACM=m | ||
226 | CONFIG_USB_PRINTER=m | ||
227 | CONFIG_USB_STORAGE=y | ||
228 | CONFIG_USB_SERIAL=y | ||
229 | CONFIG_USB_SERIAL_CONSOLE=y | ||
230 | CONFIG_USB_SERIAL_GENERIC=y | ||
231 | CONFIG_USB_SERIAL_FTDI_SIO=y | ||
232 | CONFIG_USB_SERIAL_KEYSPAN=y | ||
233 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
234 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
235 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
236 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
237 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
238 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
239 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
240 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
241 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
242 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
243 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
244 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
245 | CONFIG_USB_SERIAL_MCT_U232=y | ||
246 | CONFIG_USB_SERIAL_PL2303=y | ||
247 | CONFIG_USB_GADGET=y | ||
248 | CONFIG_USB_ETH=m | ||
249 | CONFIG_USB_MASS_STORAGE=m | ||
250 | CONFIG_MMC=y | ||
251 | CONFIG_MMC_AT91=y | ||
252 | CONFIG_NEW_LEDS=y | ||
253 | CONFIG_LEDS_CLASS=y | ||
254 | CONFIG_LEDS_GPIO=y | ||
255 | CONFIG_LEDS_TRIGGERS=y | ||
256 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
257 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
258 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
259 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
260 | CONFIG_RTC_CLASS=y | ||
261 | # CONFIG_RTC_HCTOSYS is not set | ||
262 | CONFIG_RTC_DRV_DS1307=y | ||
263 | CONFIG_RTC_DRV_PCF8563=y | ||
264 | CONFIG_RTC_DRV_AT91RM9200=y | ||
265 | CONFIG_EXT2_FS=y | ||
266 | CONFIG_EXT2_FS_XATTR=y | ||
267 | CONFIG_EXT3_FS=y | ||
268 | # CONFIG_EXT3_FS_XATTR is not set | ||
269 | CONFIG_REISERFS_FS=y | ||
270 | CONFIG_AUTOFS4_FS=y | ||
271 | CONFIG_ISO9660_FS=y | ||
272 | CONFIG_JOLIET=y | ||
273 | CONFIG_ZISOFS=y | ||
274 | CONFIG_UDF_FS=y | ||
275 | CONFIG_MSDOS_FS=y | ||
276 | CONFIG_VFAT_FS=y | ||
277 | CONFIG_NTFS_FS=m | ||
278 | CONFIG_TMPFS=y | ||
279 | CONFIG_CONFIGFS_FS=y | ||
280 | CONFIG_JFFS2_FS=y | ||
281 | CONFIG_JFFS2_SUMMARY=y | ||
282 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
283 | CONFIG_JFFS2_LZO=y | ||
284 | CONFIG_JFFS2_RUBIN=y | ||
285 | CONFIG_CRAMFS=y | ||
286 | CONFIG_MINIX_FS=y | ||
287 | CONFIG_NFS_FS=y | ||
288 | CONFIG_NFS_V3=y | ||
289 | CONFIG_NFS_V3_ACL=y | ||
290 | CONFIG_NFS_V4=y | ||
291 | CONFIG_ROOT_NFS=y | ||
292 | CONFIG_NFSD=y | ||
293 | CONFIG_SMB_FS=m | ||
294 | CONFIG_CIFS=m | ||
295 | CONFIG_PARTITION_ADVANCED=y | ||
296 | CONFIG_MAC_PARTITION=y | ||
297 | CONFIG_NLS_CODEPAGE_437=y | ||
298 | CONFIG_NLS_CODEPAGE_737=m | ||
299 | CONFIG_NLS_CODEPAGE_775=m | ||
300 | CONFIG_NLS_CODEPAGE_850=m | ||
301 | CONFIG_NLS_CODEPAGE_852=m | ||
302 | CONFIG_NLS_CODEPAGE_855=m | ||
303 | CONFIG_NLS_CODEPAGE_857=m | ||
304 | CONFIG_NLS_CODEPAGE_860=m | ||
305 | CONFIG_NLS_CODEPAGE_861=m | ||
306 | CONFIG_NLS_CODEPAGE_862=m | ||
307 | CONFIG_NLS_CODEPAGE_863=m | ||
308 | CONFIG_NLS_CODEPAGE_864=m | ||
309 | CONFIG_NLS_CODEPAGE_865=m | ||
310 | CONFIG_NLS_CODEPAGE_866=m | ||
311 | CONFIG_NLS_CODEPAGE_869=m | ||
312 | CONFIG_NLS_CODEPAGE_936=m | ||
313 | CONFIG_NLS_CODEPAGE_950=m | ||
314 | CONFIG_NLS_CODEPAGE_932=m | ||
315 | CONFIG_NLS_CODEPAGE_949=m | ||
316 | CONFIG_NLS_CODEPAGE_874=m | ||
317 | CONFIG_NLS_ISO8859_8=m | ||
318 | CONFIG_NLS_CODEPAGE_1250=m | ||
319 | CONFIG_NLS_CODEPAGE_1251=m | ||
320 | CONFIG_NLS_ASCII=m | ||
321 | CONFIG_NLS_ISO8859_1=y | ||
322 | CONFIG_NLS_ISO8859_2=m | ||
323 | CONFIG_NLS_ISO8859_3=m | ||
324 | CONFIG_NLS_ISO8859_4=m | ||
325 | CONFIG_NLS_ISO8859_5=m | ||
326 | CONFIG_NLS_ISO8859_6=m | ||
327 | CONFIG_NLS_ISO8859_7=m | ||
328 | CONFIG_NLS_ISO8859_9=m | ||
329 | CONFIG_NLS_ISO8859_13=m | ||
330 | CONFIG_NLS_ISO8859_14=m | ||
331 | CONFIG_NLS_ISO8859_15=m | ||
332 | CONFIG_NLS_KOI8_R=m | ||
333 | CONFIG_NLS_KOI8_U=m | ||
334 | CONFIG_NLS_UTF8=y | ||
335 | CONFIG_MAGIC_SYSRQ=y | ||
336 | CONFIG_DEBUG_FS=y | ||
337 | CONFIG_DEBUG_KERNEL=y | ||
338 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
339 | # CONFIG_FTRACE is not set | ||
340 | CONFIG_CRYPTO_PCBC=y | ||
341 | CONFIG_CRYPTO_SHA1=y | ||
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig deleted file mode 100644 index 4438e64f3bfb..000000000000 --- a/arch/arm/configs/at91rm9200dk_defconfig +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | # CONFIG_IOSCHED_DEADLINE is not set | ||
9 | # CONFIG_IOSCHED_CFQ is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_ARCH_AT91RM9200DK=y | ||
12 | CONFIG_MACH_ECO920=y | ||
13 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
14 | # CONFIG_ARM_THUMB is not set | ||
15 | CONFIG_PCCARD=y | ||
16 | CONFIG_AT91_CF=y | ||
17 | CONFIG_LEDS=y | ||
18 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
19 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
20 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
21 | CONFIG_FPE_NWFPE=y | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=y | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_PNP=y | ||
27 | CONFIG_IP_PNP_BOOTP=y | ||
28 | # CONFIG_IPV6 is not set | ||
29 | CONFIG_MTD=y | ||
30 | CONFIG_MTD_PARTITIONS=y | ||
31 | CONFIG_MTD_CMDLINE_PARTS=y | ||
32 | CONFIG_MTD_CHAR=y | ||
33 | CONFIG_MTD_BLOCK=y | ||
34 | CONFIG_MTD_CFI=y | ||
35 | CONFIG_MTD_JEDECPROBE=y | ||
36 | CONFIG_MTD_CFI_AMDSTD=y | ||
37 | CONFIG_MTD_PHYSMAP=y | ||
38 | CONFIG_BLK_DEV_RAM=y | ||
39 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
40 | CONFIG_NETDEVICES=y | ||
41 | CONFIG_NET_ETHERNET=y | ||
42 | CONFIG_ARM_AT91_ETHER=y | ||
43 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
44 | # CONFIG_INPUT_KEYBOARD is not set | ||
45 | # CONFIG_INPUT_MOUSE is not set | ||
46 | # CONFIG_SERIO is not set | ||
47 | CONFIG_SERIAL_ATMEL=y | ||
48 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
49 | CONFIG_I2C=y | ||
50 | CONFIG_I2C_CHARDEV=y | ||
51 | CONFIG_I2C_GPIO=y | ||
52 | CONFIG_WATCHDOG=y | ||
53 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
54 | CONFIG_AT91RM9200_WATCHDOG=y | ||
55 | # CONFIG_VGA_CONSOLE is not set | ||
56 | # CONFIG_USB_HID is not set | ||
57 | CONFIG_USB=y | ||
58 | CONFIG_USB_DEBUG=y | ||
59 | CONFIG_USB_DEVICEFS=y | ||
60 | CONFIG_USB_MON=y | ||
61 | CONFIG_USB_OHCI_HCD=y | ||
62 | CONFIG_USB_GADGET=y | ||
63 | CONFIG_MMC=y | ||
64 | CONFIG_RTC_CLASS=y | ||
65 | CONFIG_RTC_DRV_AT91RM9200=y | ||
66 | CONFIG_EXT2_FS=y | ||
67 | CONFIG_INOTIFY=y | ||
68 | CONFIG_TMPFS=y | ||
69 | CONFIG_CRAMFS=y | ||
70 | CONFIG_DEBUG_KERNEL=y | ||
71 | CONFIG_DEBUG_USER=y | ||
72 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig deleted file mode 100644 index ccd517c64bc7..000000000000 --- a/arch/arm/configs/at91rm9200ek_defconfig +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_IOSCHED_DEADLINE is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_AT91=y | ||
12 | CONFIG_MACH_AT91RM9200EK=y | ||
13 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
14 | # CONFIG_ARM_THUMB is not set | ||
15 | CONFIG_LEDS=y | ||
16 | CONFIG_LEDS_CPU=y | ||
17 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
18 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
19 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
20 | CONFIG_FPE_NWFPE=y | ||
21 | CONFIG_NET=y | ||
22 | CONFIG_PACKET=y | ||
23 | CONFIG_UNIX=y | ||
24 | CONFIG_INET=y | ||
25 | CONFIG_IP_PNP=y | ||
26 | CONFIG_IP_PNP_BOOTP=y | ||
27 | # CONFIG_IPV6 is not set | ||
28 | CONFIG_MTD=y | ||
29 | CONFIG_MTD_PARTITIONS=y | ||
30 | CONFIG_MTD_CMDLINE_PARTS=y | ||
31 | CONFIG_MTD_CHAR=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_MTD_CFI=y | ||
34 | CONFIG_MTD_JEDECPROBE=y | ||
35 | CONFIG_MTD_CFI_AMDSTD=y | ||
36 | CONFIG_MTD_PHYSMAP=y | ||
37 | CONFIG_BLK_DEV_RAM=y | ||
38 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
39 | CONFIG_NETDEVICES=y | ||
40 | CONFIG_NET_ETHERNET=y | ||
41 | CONFIG_ARM_AT91_ETHER=y | ||
42 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
43 | # CONFIG_INPUT_KEYBOARD is not set | ||
44 | # CONFIG_INPUT_MOUSE is not set | ||
45 | # CONFIG_SERIO is not set | ||
46 | CONFIG_SERIAL_ATMEL=y | ||
47 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
48 | CONFIG_I2C=y | ||
49 | CONFIG_I2C_CHARDEV=y | ||
50 | CONFIG_I2C_GPIO=y | ||
51 | CONFIG_WATCHDOG=y | ||
52 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
53 | CONFIG_AT91RM9200_WATCHDOG=y | ||
54 | CONFIG_FB=y | ||
55 | CONFIG_FB_S1D13XXX=y | ||
56 | # CONFIG_VGA_CONSOLE is not set | ||
57 | # CONFIG_USB_HID is not set | ||
58 | CONFIG_USB=y | ||
59 | CONFIG_USB_DEBUG=y | ||
60 | CONFIG_USB_DEVICEFS=y | ||
61 | CONFIG_USB_MON=y | ||
62 | CONFIG_USB_OHCI_HCD=y | ||
63 | CONFIG_USB_GADGET=y | ||
64 | CONFIG_MMC=y | ||
65 | CONFIG_RTC_CLASS=y | ||
66 | CONFIG_RTC_DRV_AT91RM9200=y | ||
67 | CONFIG_EXT2_FS=y | ||
68 | CONFIG_INOTIFY=y | ||
69 | CONFIG_TMPFS=y | ||
70 | CONFIG_CRAMFS=y | ||
71 | CONFIG_DEBUG_KERNEL=y | ||
72 | CONFIG_DEBUG_USER=y | ||
73 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig deleted file mode 100644 index 1b0e9a1689bb..000000000000 --- a/arch/arm/configs/ateb9200_defconfig +++ /dev/null | |||
@@ -1,131 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_LOG_BUF_SHIFT=14 | ||
4 | CONFIG_EMBEDDED=y | ||
5 | CONFIG_SLAB=y | ||
6 | CONFIG_PROFILING=y | ||
7 | CONFIG_OPROFILE=m | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_MACH_ATEB9200=y | ||
12 | CONFIG_PCCARD=m | ||
13 | CONFIG_AT91_CF=m | ||
14 | CONFIG_PREEMPT=y | ||
15 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
16 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
17 | CONFIG_FPE_NWFPE=y | ||
18 | CONFIG_PM=y | ||
19 | CONFIG_NET=y | ||
20 | CONFIG_PACKET=y | ||
21 | CONFIG_UNIX=y | ||
22 | CONFIG_NET_KEY=y | ||
23 | CONFIG_INET=y | ||
24 | # CONFIG_IPV6 is not set | ||
25 | CONFIG_BRIDGE=m | ||
26 | CONFIG_VLAN_8021Q=m | ||
27 | CONFIG_MTD=y | ||
28 | CONFIG_MTD_PARTITIONS=y | ||
29 | CONFIG_MTD_CMDLINE_PARTS=y | ||
30 | CONFIG_MTD_CHAR=y | ||
31 | CONFIG_MTD_BLOCK_RO=y | ||
32 | CONFIG_BLK_DEV_LOOP=m | ||
33 | CONFIG_BLK_DEV_NBD=m | ||
34 | CONFIG_SCSI=m | ||
35 | CONFIG_BLK_DEV_SD=m | ||
36 | CONFIG_BLK_DEV_SR=m | ||
37 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
38 | CONFIG_CHR_DEV_SG=m | ||
39 | CONFIG_SCSI_MULTI_LUN=y | ||
40 | CONFIG_NETDEVICES=y | ||
41 | CONFIG_DUMMY=m | ||
42 | CONFIG_TUN=m | ||
43 | CONFIG_PHYLIB=y | ||
44 | CONFIG_DAVICOM_PHY=y | ||
45 | CONFIG_NET_ETHERNET=y | ||
46 | CONFIG_ARM_AT91_ETHER=y | ||
47 | CONFIG_USB_USBNET=y | ||
48 | CONFIG_USB_NET_GL620A=y | ||
49 | CONFIG_USB_NET_PLUSB=y | ||
50 | CONFIG_USB_NET_RNDIS_HOST=y | ||
51 | CONFIG_USB_ALI_M5632=y | ||
52 | CONFIG_USB_AN2720=y | ||
53 | CONFIG_USB_EPSON2888=y | ||
54 | CONFIG_PPP=m | ||
55 | CONFIG_PPP_ASYNC=m | ||
56 | CONFIG_PPP_SYNC_TTY=m | ||
57 | CONFIG_PPP_DEFLATE=m | ||
58 | CONFIG_PPP_BSDCOMP=m | ||
59 | CONFIG_PPPOE=m | ||
60 | CONFIG_SERIAL_ATMEL=y | ||
61 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
62 | CONFIG_I2C=m | ||
63 | CONFIG_I2C_CHARDEV=m | ||
64 | CONFIG_I2C_GPIO=m | ||
65 | # CONFIG_VGA_CONSOLE is not set | ||
66 | CONFIG_SOUND=y | ||
67 | CONFIG_USB_HID=m | ||
68 | CONFIG_HID_PID=y | ||
69 | CONFIG_USB_HIDDEV=y | ||
70 | CONFIG_USB=y | ||
71 | CONFIG_USB_DEVICEFS=y | ||
72 | CONFIG_USB_MON=y | ||
73 | CONFIG_USB_OHCI_HCD=y | ||
74 | CONFIG_USB_ACM=m | ||
75 | CONFIG_USB_PRINTER=m | ||
76 | CONFIG_USB_STORAGE=m | ||
77 | CONFIG_USB_STORAGE_DATAFAB=m | ||
78 | CONFIG_USB_STORAGE_FREECOM=m | ||
79 | CONFIG_USB_STORAGE_USBAT=m | ||
80 | CONFIG_USB_STORAGE_SDDR09=m | ||
81 | CONFIG_USB_STORAGE_SDDR55=m | ||
82 | CONFIG_USB_STORAGE_JUMPSHOT=m | ||
83 | CONFIG_USB_SERIAL=m | ||
84 | CONFIG_USB_SERIAL_GENERIC=y | ||
85 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
86 | CONFIG_USB_SERIAL_PL2303=m | ||
87 | CONFIG_USB_GADGET=m | ||
88 | CONFIG_USB_ETH=m | ||
89 | CONFIG_USB_GADGETFS=m | ||
90 | CONFIG_USB_FILE_STORAGE=m | ||
91 | CONFIG_USB_G_SERIAL=m | ||
92 | CONFIG_MMC=m | ||
93 | CONFIG_MMC_DEBUG=y | ||
94 | CONFIG_RTC_CLASS=y | ||
95 | # CONFIG_RTC_HCTOSYS is not set | ||
96 | CONFIG_RTC_DRV_AT91RM9200=y | ||
97 | CONFIG_EXT2_FS=m | ||
98 | CONFIG_EXT3_FS=m | ||
99 | CONFIG_REISERFS_FS=m | ||
100 | CONFIG_INOTIFY=y | ||
101 | CONFIG_ISO9660_FS=m | ||
102 | CONFIG_JOLIET=y | ||
103 | CONFIG_ZISOFS=y | ||
104 | CONFIG_UDF_FS=m | ||
105 | CONFIG_MSDOS_FS=m | ||
106 | CONFIG_VFAT_FS=m | ||
107 | CONFIG_NTFS_FS=m | ||
108 | CONFIG_NTFS_RW=y | ||
109 | CONFIG_TMPFS=y | ||
110 | CONFIG_CRAMFS=y | ||
111 | CONFIG_NFS_FS=m | ||
112 | CONFIG_NFS_V3=y | ||
113 | CONFIG_NFS_V3_ACL=y | ||
114 | CONFIG_NFS_V4=y | ||
115 | CONFIG_NFSD=m | ||
116 | CONFIG_NFSD_V4=y | ||
117 | CONFIG_PARTITION_ADVANCED=y | ||
118 | CONFIG_MAC_PARTITION=y | ||
119 | CONFIG_BSD_DISKLABEL=y | ||
120 | CONFIG_MINIX_SUBPARTITION=y | ||
121 | CONFIG_SOLARIS_X86_PARTITION=y | ||
122 | CONFIG_UNIXWARE_DISKLABEL=y | ||
123 | CONFIG_NLS_CODEPAGE_932=m | ||
124 | CONFIG_NLS_ASCII=m | ||
125 | CONFIG_NLS_ISO8859_15=m | ||
126 | CONFIG_NLS_UTF8=m | ||
127 | CONFIG_CRYPTO_MD5=y | ||
128 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
129 | CONFIG_CRYPTO_ARC4=m | ||
130 | CONFIG_CRC16=m | ||
131 | CONFIG_LIBCRC32C=m | ||
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig deleted file mode 100644 index ac64dbd8a49c..000000000000 --- a/arch/arm/configs/carmeva_defconfig +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_LOG_BUF_SHIFT=14 | ||
3 | CONFIG_BLK_DEV_INITRD=y | ||
4 | CONFIG_EMBEDDED=y | ||
5 | # CONFIG_HOTPLUG is not set | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
9 | CONFIG_ARCH_AT91=y | ||
10 | CONFIG_MACH_CARMEVA=y | ||
11 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
12 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
13 | CONFIG_FPE_NWFPE=y | ||
14 | CONFIG_NET=y | ||
15 | CONFIG_UNIX=y | ||
16 | CONFIG_INET=y | ||
17 | CONFIG_IP_MULTICAST=y | ||
18 | CONFIG_IP_PNP=y | ||
19 | # CONFIG_IPV6 is not set | ||
20 | CONFIG_MTD=y | ||
21 | CONFIG_MTD_PARTITIONS=y | ||
22 | CONFIG_MTD_CMDLINE_PARTS=y | ||
23 | CONFIG_MTD_CHAR=y | ||
24 | CONFIG_MTD_BLOCK=y | ||
25 | CONFIG_BLK_DEV_RAM=y | ||
26 | CONFIG_NETDEVICES=y | ||
27 | CONFIG_NET_ETHERNET=y | ||
28 | CONFIG_ARM_AT91_ETHER=y | ||
29 | # CONFIG_INPUT_MOUSEDEV is not set | ||
30 | # CONFIG_INPUT_KEYBOARD is not set | ||
31 | # CONFIG_INPUT_MOUSE is not set | ||
32 | CONFIG_SERIO=m | ||
33 | CONFIG_SERIAL_ATMEL=y | ||
34 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
35 | # CONFIG_VGA_CONSOLE is not set | ||
36 | CONFIG_MMC=m | ||
37 | CONFIG_MMC_DEBUG=y | ||
38 | CONFIG_EXT2_FS=y | ||
39 | CONFIG_EXT2_FS_XATTR=y | ||
40 | # CONFIG_DNOTIFY is not set | ||
41 | CONFIG_JFFS2_FS=y | ||
42 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
43 | CONFIG_NFS_FS=y | ||
44 | CONFIG_NFS_V3=y | ||
45 | CONFIG_NFS_V4=y | ||
46 | CONFIG_ROOT_NFS=y | ||
47 | CONFIG_NFSD=y | ||
diff --git a/arch/arm/configs/cpuat91_defconfig b/arch/arm/configs/cpuat91_defconfig deleted file mode 100644 index 022aeb55b676..000000000000 --- a/arch/arm/configs/cpuat91_defconfig +++ /dev/null | |||
@@ -1,112 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_BLK_DEV_BSG is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_AT91=y | ||
12 | CONFIG_MACH_CPUAT91=y | ||
13 | CONFIG_AT91_TIMER_HZ=100 | ||
14 | # CONFIG_ARM_THUMB is not set | ||
15 | CONFIG_PREEMPT=y | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_NET=y | ||
19 | CONFIG_PACKET=y | ||
20 | CONFIG_UNIX=y | ||
21 | CONFIG_INET=y | ||
22 | CONFIG_IP_PNP=y | ||
23 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
24 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
25 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
26 | # CONFIG_IPV6 is not set | ||
27 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
28 | CONFIG_MTD=y | ||
29 | CONFIG_MTD_PARTITIONS=y | ||
30 | CONFIG_MTD_CMDLINE_PARTS=y | ||
31 | CONFIG_MTD_CHAR=y | ||
32 | CONFIG_MTD_BLOCK=y | ||
33 | CONFIG_MTD_CFI=y | ||
34 | CONFIG_MTD_CFI_INTELEXT=y | ||
35 | CONFIG_MTD_PHYSMAP=y | ||
36 | CONFIG_MTD_PLATRAM=y | ||
37 | CONFIG_BLK_DEV_LOOP=y | ||
38 | CONFIG_BLK_DEV_NBD=y | ||
39 | CONFIG_BLK_DEV_RAM=y | ||
40 | # CONFIG_MISC_DEVICES is not set | ||
41 | CONFIG_SCSI=y | ||
42 | CONFIG_BLK_DEV_SD=y | ||
43 | CONFIG_SCSI_MULTI_LUN=y | ||
44 | # CONFIG_SCSI_LOWLEVEL is not set | ||
45 | CONFIG_NETDEVICES=y | ||
46 | CONFIG_PHYLIB=y | ||
47 | CONFIG_NET_ETHERNET=y | ||
48 | CONFIG_ARM_AT91_ETHER=y | ||
49 | # CONFIG_NETDEV_1000 is not set | ||
50 | # CONFIG_NETDEV_10000 is not set | ||
51 | CONFIG_PPP=y | ||
52 | CONFIG_PPP_ASYNC=y | ||
53 | CONFIG_PPP_DEFLATE=y | ||
54 | CONFIG_PPP_BSDCOMP=y | ||
55 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
56 | # CONFIG_INPUT_KEYBOARD is not set | ||
57 | # CONFIG_INPUT_MOUSE is not set | ||
58 | # CONFIG_SERIO is not set | ||
59 | CONFIG_SERIAL_ATMEL=y | ||
60 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
61 | CONFIG_LEGACY_PTY_COUNT=32 | ||
62 | # CONFIG_HW_RANDOM is not set | ||
63 | CONFIG_I2C=y | ||
64 | CONFIG_I2C_CHARDEV=y | ||
65 | CONFIG_I2C_GPIO=y | ||
66 | CONFIG_GPIO_SYSFS=y | ||
67 | # CONFIG_HWMON is not set | ||
68 | CONFIG_WATCHDOG=y | ||
69 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
70 | CONFIG_AT91RM9200_WATCHDOG=y | ||
71 | # CONFIG_VGA_CONSOLE is not set | ||
72 | # CONFIG_HID_SUPPORT is not set | ||
73 | CONFIG_USB=y | ||
74 | # CONFIG_USB_DEVICE_CLASS is not set | ||
75 | CONFIG_USB_OHCI_HCD=y | ||
76 | CONFIG_USB_STORAGE=y | ||
77 | CONFIG_USB_GADGET=y | ||
78 | CONFIG_USB_ETH=m | ||
79 | CONFIG_MMC=y | ||
80 | CONFIG_MMC_AT91=m | ||
81 | CONFIG_NEW_LEDS=y | ||
82 | CONFIG_LEDS_CLASS=y | ||
83 | CONFIG_LEDS_GPIO=y | ||
84 | CONFIG_LEDS_TRIGGERS=y | ||
85 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
86 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
87 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
88 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
89 | CONFIG_RTC_CLASS=y | ||
90 | # CONFIG_RTC_HCTOSYS is not set | ||
91 | CONFIG_RTC_DRV_DS1307=y | ||
92 | CONFIG_RTC_DRV_PCF8563=y | ||
93 | CONFIG_EXT2_FS=y | ||
94 | CONFIG_EXT3_FS=y | ||
95 | # CONFIG_EXT3_FS_XATTR is not set | ||
96 | CONFIG_INOTIFY=y | ||
97 | CONFIG_AUTOFS4_FS=y | ||
98 | CONFIG_MSDOS_FS=y | ||
99 | CONFIG_VFAT_FS=y | ||
100 | CONFIG_TMPFS=y | ||
101 | CONFIG_JFFS2_FS=y | ||
102 | CONFIG_JFFS2_SUMMARY=y | ||
103 | CONFIG_CRAMFS=y | ||
104 | CONFIG_MINIX_FS=y | ||
105 | CONFIG_NFS_FS=y | ||
106 | CONFIG_NFS_V3=y | ||
107 | CONFIG_ROOT_NFS=y | ||
108 | CONFIG_PARTITION_ADVANCED=y | ||
109 | CONFIG_NLS_CODEPAGE_437=y | ||
110 | CONFIG_NLS_ISO8859_1=y | ||
111 | CONFIG_NLS_UTF8=y | ||
112 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig deleted file mode 100644 index a24c448840c4..000000000000 --- a/arch/arm/configs/csb337_defconfig +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | # CONFIG_BLK_DEV_BSG is not set | ||
9 | CONFIG_ARCH_AT91=y | ||
10 | CONFIG_MACH_CSB337=y | ||
11 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
12 | # CONFIG_ARM_THUMB is not set | ||
13 | CONFIG_PCCARD=y | ||
14 | CONFIG_AT91_CF=y | ||
15 | CONFIG_LEDS=y | ||
16 | CONFIG_LEDS_CPU=y | ||
17 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
18 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
19 | CONFIG_CMDLINE="mem=32M console=ttyS0,38400 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
20 | CONFIG_FPE_NWFPE=y | ||
21 | CONFIG_NET=y | ||
22 | CONFIG_PACKET=y | ||
23 | CONFIG_UNIX=y | ||
24 | CONFIG_INET=y | ||
25 | CONFIG_IP_PNP=y | ||
26 | CONFIG_IP_PNP_DHCP=y | ||
27 | CONFIG_IP_PNP_BOOTP=y | ||
28 | # CONFIG_INET_LRO is not set | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
31 | CONFIG_MTD=y | ||
32 | CONFIG_MTD_PARTITIONS=y | ||
33 | CONFIG_MTD_CMDLINE_PARTS=y | ||
34 | CONFIG_MTD_CHAR=y | ||
35 | CONFIG_MTD_BLOCK=y | ||
36 | CONFIG_MTD_CFI=y | ||
37 | CONFIG_MTD_CFI_INTELEXT=y | ||
38 | CONFIG_MTD_PHYSMAP=y | ||
39 | CONFIG_BLK_DEV_LOOP=y | ||
40 | CONFIG_BLK_DEV_RAM=y | ||
41 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
42 | CONFIG_ATMEL_SSC=y | ||
43 | CONFIG_SCSI=y | ||
44 | CONFIG_NETDEVICES=y | ||
45 | CONFIG_NET_ETHERNET=y | ||
46 | CONFIG_ARM_AT91_ETHER=y | ||
47 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
48 | # CONFIG_INPUT_KEYBOARD is not set | ||
49 | # CONFIG_INPUT_MOUSE is not set | ||
50 | # CONFIG_SERIO is not set | ||
51 | CONFIG_SERIAL_ATMEL=y | ||
52 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
53 | # CONFIG_HW_RANDOM is not set | ||
54 | CONFIG_I2C=y | ||
55 | CONFIG_I2C_CHARDEV=y | ||
56 | CONFIG_I2C_GPIO=y | ||
57 | # CONFIG_HWMON is not set | ||
58 | CONFIG_WATCHDOG=y | ||
59 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
60 | CONFIG_AT91RM9200_WATCHDOG=y | ||
61 | # CONFIG_VGA_CONSOLE is not set | ||
62 | # CONFIG_USB_HID is not set | ||
63 | CONFIG_USB=y | ||
64 | CONFIG_USB_DEBUG=y | ||
65 | CONFIG_USB_DEVICEFS=y | ||
66 | CONFIG_USB_MON=y | ||
67 | CONFIG_USB_OHCI_HCD=y | ||
68 | CONFIG_USB_STORAGE=y | ||
69 | CONFIG_USB_SERIAL=y | ||
70 | CONFIG_USB_SERIAL_CONSOLE=y | ||
71 | CONFIG_USB_SERIAL_GENERIC=y | ||
72 | CONFIG_USB_SERIAL_FTDI_SIO=y | ||
73 | CONFIG_USB_SERIAL_KEYSPAN=y | ||
74 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
75 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
76 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
77 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
78 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
79 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
80 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
81 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
82 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
83 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
84 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
85 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
86 | CONFIG_USB_SERIAL_MCT_U232=y | ||
87 | CONFIG_USB_GADGET=y | ||
88 | CONFIG_MMC=y | ||
89 | CONFIG_RTC_CLASS=y | ||
90 | CONFIG_RTC_HCTOSYS_DEVICE="rtc1" | ||
91 | # CONFIG_RTC_INTF_SYSFS is not set | ||
92 | CONFIG_RTC_DRV_DS1307=y | ||
93 | CONFIG_RTC_DRV_AT91RM9200=y | ||
94 | CONFIG_EXT2_FS=y | ||
95 | CONFIG_INOTIFY=y | ||
96 | CONFIG_TMPFS=y | ||
97 | CONFIG_CRAMFS=y | ||
98 | CONFIG_NFS_FS=y | ||
99 | CONFIG_NFS_V3=y | ||
100 | CONFIG_NFS_V4=y | ||
101 | CONFIG_ROOT_NFS=y | ||
102 | CONFIG_DEBUG_KERNEL=y | ||
103 | CONFIG_DEBUG_USER=y | ||
104 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig deleted file mode 100644 index 98552adac5fb..000000000000 --- a/arch/arm/configs/csb637_defconfig +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_BLK_DEV_BSG is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_MACH_CSB637=y | ||
12 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
13 | # CONFIG_ARM_THUMB is not set | ||
14 | CONFIG_PCCARD=y | ||
15 | CONFIG_AT91_CF=y | ||
16 | CONFIG_LEDS=y | ||
17 | CONFIG_LEDS_CPU=y | ||
18 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
19 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
20 | CONFIG_CMDLINE="mem=32M console=ttyS0,38400 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
21 | CONFIG_FPE_NWFPE=y | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=y | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_INET=y | ||
26 | CONFIG_IP_PNP=y | ||
27 | CONFIG_IP_PNP_DHCP=y | ||
28 | CONFIG_IP_PNP_BOOTP=y | ||
29 | # CONFIG_INET_LRO is not set | ||
30 | # CONFIG_IPV6 is not set | ||
31 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
32 | CONFIG_MTD=y | ||
33 | CONFIG_MTD_PARTITIONS=y | ||
34 | CONFIG_MTD_CMDLINE_PARTS=y | ||
35 | CONFIG_MTD_CHAR=y | ||
36 | CONFIG_MTD_BLOCK=y | ||
37 | CONFIG_MTD_CFI=y | ||
38 | CONFIG_MTD_CFI_INTELEXT=y | ||
39 | CONFIG_MTD_PHYSMAP=y | ||
40 | CONFIG_BLK_DEV_LOOP=y | ||
41 | CONFIG_BLK_DEV_RAM=y | ||
42 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
43 | CONFIG_SCSI=y | ||
44 | CONFIG_NETDEVICES=y | ||
45 | CONFIG_NET_ETHERNET=y | ||
46 | CONFIG_ARM_AT91_ETHER=y | ||
47 | # CONFIG_INPUT_KEYBOARD is not set | ||
48 | # CONFIG_INPUT_MOUSE is not set | ||
49 | # CONFIG_SERIO is not set | ||
50 | CONFIG_SERIAL_ATMEL=y | ||
51 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
52 | CONFIG_I2C=y | ||
53 | CONFIG_I2C_CHARDEV=y | ||
54 | CONFIG_WATCHDOG=y | ||
55 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
56 | CONFIG_AT91RM9200_WATCHDOG=y | ||
57 | # CONFIG_VGA_CONSOLE is not set | ||
58 | # CONFIG_USB_HID is not set | ||
59 | CONFIG_USB=y | ||
60 | CONFIG_USB_DEBUG=y | ||
61 | CONFIG_USB_DEVICEFS=y | ||
62 | CONFIG_USB_MON=y | ||
63 | CONFIG_USB_OHCI_HCD=y | ||
64 | CONFIG_USB_STORAGE=y | ||
65 | CONFIG_USB_SERIAL=y | ||
66 | CONFIG_USB_SERIAL_CONSOLE=y | ||
67 | CONFIG_USB_SERIAL_GENERIC=y | ||
68 | CONFIG_USB_SERIAL_FTDI_SIO=y | ||
69 | CONFIG_USB_SERIAL_KEYSPAN=y | ||
70 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
71 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
72 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
73 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
74 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
75 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
76 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
77 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
78 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
79 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
80 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
81 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
82 | CONFIG_USB_SERIAL_MCT_U232=y | ||
83 | CONFIG_NEW_LEDS=y | ||
84 | CONFIG_LEDS_CLASS=y | ||
85 | CONFIG_LEDS_GPIO=y | ||
86 | CONFIG_LEDS_TRIGGERS=y | ||
87 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
88 | CONFIG_EXT2_FS=y | ||
89 | CONFIG_INOTIFY=y | ||
90 | CONFIG_TMPFS=y | ||
91 | CONFIG_CRAMFS=y | ||
92 | CONFIG_NFS_FS=y | ||
93 | CONFIG_NFS_V3=y | ||
94 | CONFIG_NFS_V4=y | ||
95 | CONFIG_ROOT_NFS=y | ||
96 | CONFIG_DEBUG_KERNEL=y | ||
97 | CONFIG_DEBUG_USER=y | ||
98 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/ecbat91_defconfig b/arch/arm/configs/ecbat91_defconfig deleted file mode 100644 index 6bb6abdcea8c..000000000000 --- a/arch/arm/configs/ecbat91_defconfig +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SLAB=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_IOSCHED_DEADLINE is not set | ||
10 | # CONFIG_IOSCHED_CFQ is not set | ||
11 | CONFIG_ARCH_AT91=y | ||
12 | CONFIG_MACH_ECBAT91=y | ||
13 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
14 | CONFIG_PCCARD=y | ||
15 | CONFIG_AT91_CF=y | ||
16 | CONFIG_PREEMPT=y | ||
17 | CONFIG_LEDS=y | ||
18 | CONFIG_LEDS_CPU=y | ||
19 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
20 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
21 | CONFIG_CMDLINE="rootfstype=reiserfs root=/dev/mmcblk0p1 console=ttyS0,115200n8 rootdelay=1" | ||
22 | CONFIG_FPE_NWFPE=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_CFG80211=y | ||
31 | CONFIG_MAC80211=y | ||
32 | # CONFIG_STANDALONE is not set | ||
33 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
34 | CONFIG_MTD=y | ||
35 | CONFIG_MTD_PARTITIONS=y | ||
36 | CONFIG_MTD_CMDLINE_PARTS=y | ||
37 | CONFIG_MTD_AFS_PARTS=y | ||
38 | CONFIG_MTD_CHAR=y | ||
39 | CONFIG_MTD_BLOCK=y | ||
40 | CONFIG_MTD_DATAFLASH=y | ||
41 | CONFIG_BLK_DEV_LOOP=y | ||
42 | CONFIG_SCSI=y | ||
43 | CONFIG_BLK_DEV_SD=y | ||
44 | CONFIG_CHR_DEV_SG=y | ||
45 | CONFIG_NETDEVICES=y | ||
46 | CONFIG_NET_ETHERNET=y | ||
47 | CONFIG_ARM_AT91_ETHER=y | ||
48 | # CONFIG_NETDEV_1000 is not set | ||
49 | # CONFIG_NETDEV_10000 is not set | ||
50 | CONFIG_PPP=y | ||
51 | CONFIG_PPP_MULTILINK=y | ||
52 | CONFIG_PPP_FILTER=y | ||
53 | CONFIG_PPP_ASYNC=y | ||
54 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
55 | # CONFIG_INPUT_KEYBOARD is not set | ||
56 | # CONFIG_INPUT_MOUSE is not set | ||
57 | # CONFIG_SERIO is not set | ||
58 | CONFIG_SERIAL_ATMEL=y | ||
59 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
60 | CONFIG_HW_RANDOM=y | ||
61 | CONFIG_I2C=y | ||
62 | CONFIG_I2C_CHARDEV=y | ||
63 | CONFIG_SPI=y | ||
64 | CONFIG_SPI_BITBANG=y | ||
65 | CONFIG_WATCHDOG=y | ||
66 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
67 | # CONFIG_VGA_CONSOLE is not set | ||
68 | # CONFIG_USB_HID is not set | ||
69 | CONFIG_USB=y | ||
70 | CONFIG_USB_DEVICEFS=y | ||
71 | # CONFIG_USB_DEVICE_CLASS is not set | ||
72 | CONFIG_USB_OHCI_HCD=y | ||
73 | CONFIG_USB_PRINTER=y | ||
74 | CONFIG_USB_STORAGE=y | ||
75 | CONFIG_USB_GADGET=y | ||
76 | CONFIG_MMC=y | ||
77 | CONFIG_MMC_DEBUG=y | ||
78 | CONFIG_MMC_AT91=m | ||
79 | CONFIG_NEW_LEDS=y | ||
80 | CONFIG_LEDS_CLASS=y | ||
81 | CONFIG_RTC_CLASS=y | ||
82 | # CONFIG_RTC_HCTOSYS is not set | ||
83 | CONFIG_RTC_DRV_AT91RM9200=y | ||
84 | CONFIG_EXT2_FS=y | ||
85 | CONFIG_EXT3_FS=y | ||
86 | CONFIG_REISERFS_FS=y | ||
87 | CONFIG_INOTIFY=y | ||
88 | CONFIG_TMPFS=y | ||
89 | CONFIG_CONFIGFS_FS=y | ||
90 | CONFIG_CRAMFS=y | ||
91 | CONFIG_NFS_FS=y | ||
92 | CONFIG_NFS_V3=y | ||
93 | CONFIG_NFS_V3_ACL=y | ||
94 | CONFIG_NFS_V4=y | ||
95 | CONFIG_ROOT_NFS=y | ||
96 | CONFIG_PARTITION_ADVANCED=y | ||
97 | CONFIG_DEBUG_USER=y | ||
98 | CONFIG_CRYPTO_PCBC=y | ||
99 | CONFIG_CRYPTO_SHA1=y | ||
diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig deleted file mode 100644 index 896dbe00dc6e..000000000000 --- a/arch/arm/configs/kafa_defconfig +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SLAB=y | ||
7 | CONFIG_MODULES=y | ||
8 | CONFIG_MODULE_UNLOAD=y | ||
9 | # CONFIG_IOSCHED_CFQ is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_MACH_KAFA=y | ||
12 | # CONFIG_ARM_THUMB is not set | ||
13 | CONFIG_PREEMPT=y | ||
14 | CONFIG_LEDS=y | ||
15 | CONFIG_LEDS_CPU=y | ||
16 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
17 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
18 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20800000,10M root=/dev/ram0 rw" | ||
19 | CONFIG_FPE_NWFPE=y | ||
20 | CONFIG_BINFMT_MISC=y | ||
21 | CONFIG_NET=y | ||
22 | CONFIG_PACKET=y | ||
23 | CONFIG_UNIX=y | ||
24 | CONFIG_INET=y | ||
25 | # CONFIG_INET_DIAG is not set | ||
26 | # CONFIG_IPV6 is not set | ||
27 | CONFIG_MTD=y | ||
28 | CONFIG_MTD_PARTITIONS=y | ||
29 | CONFIG_MTD_CHAR=y | ||
30 | CONFIG_MTD_BLOCK_RO=y | ||
31 | CONFIG_NETDEVICES=y | ||
32 | CONFIG_PHYLIB=y | ||
33 | CONFIG_DAVICOM_PHY=y | ||
34 | CONFIG_NET_ETHERNET=y | ||
35 | CONFIG_ARM_AT91_ETHER=y | ||
36 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
37 | # CONFIG_INPUT_KEYBOARD is not set | ||
38 | # CONFIG_INPUT_MOUSE is not set | ||
39 | # CONFIG_SERIO is not set | ||
40 | CONFIG_SERIAL_ATMEL=y | ||
41 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
42 | CONFIG_LEGACY_PTY_COUNT=32 | ||
43 | CONFIG_I2C=y | ||
44 | CONFIG_I2C_CHARDEV=y | ||
45 | CONFIG_I2C_GPIO=y | ||
46 | # CONFIG_HWMON is not set | ||
47 | CONFIG_WATCHDOG=y | ||
48 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
49 | CONFIG_AT91RM9200_WATCHDOG=y | ||
50 | # CONFIG_VGA_CONSOLE is not set | ||
51 | CONFIG_RTC_CLASS=y | ||
52 | # CONFIG_RTC_HCTOSYS is not set | ||
53 | CONFIG_RTC_DRV_AT91RM9200=y | ||
54 | CONFIG_EXT3_FS=y | ||
55 | # CONFIG_EXT3_FS_XATTR is not set | ||
56 | CONFIG_TMPFS=y | ||
57 | CONFIG_CRAMFS=y | ||
58 | CONFIG_NFS_FS=m | ||
59 | CONFIG_NFS_V3=y | ||
60 | CONFIG_CRYPTO_MD5=y | ||
61 | CONFIG_CRYPTO_DES=y | ||
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig deleted file mode 100644 index 9f906a85f5c2..000000000000 --- a/arch/arm/configs/kb9202_defconfig +++ /dev/null | |||
@@ -1,127 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_POSIX_MQUEUE=y | ||
5 | CONFIG_BSD_PROCESS_ACCT=y | ||
6 | CONFIG_AUDIT=y | ||
7 | CONFIG_IKCONFIG=y | ||
8 | CONFIG_IKCONFIG_PROC=y | ||
9 | CONFIG_BLK_DEV_INITRD=y | ||
10 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
11 | CONFIG_MODULES=y | ||
12 | CONFIG_MODULE_UNLOAD=y | ||
13 | CONFIG_MODVERSIONS=y | ||
14 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
15 | # CONFIG_BLK_DEV_BSG is not set | ||
16 | # CONFIG_IOSCHED_DEADLINE is not set | ||
17 | CONFIG_ARCH_AT91=y | ||
18 | CONFIG_MACH_KB9200=y | ||
19 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
20 | CONFIG_NO_HZ=y | ||
21 | CONFIG_HIGH_RES_TIMERS=y | ||
22 | CONFIG_PREEMPT=y | ||
23 | CONFIG_AEABI=y | ||
24 | CONFIG_ZBOOT_ROM_TEXT=0x10000000 | ||
25 | CONFIG_ZBOOT_ROM_BSS=0x20040000 | ||
26 | CONFIG_CMDLINE="noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M" | ||
27 | CONFIG_KEXEC=y | ||
28 | CONFIG_FPE_NWFPE=y | ||
29 | CONFIG_BINFMT_MISC=y | ||
30 | CONFIG_NET=y | ||
31 | CONFIG_PACKET=y | ||
32 | CONFIG_UNIX=y | ||
33 | CONFIG_INET=y | ||
34 | CONFIG_IP_PNP=y | ||
35 | CONFIG_IP_PNP_DHCP=y | ||
36 | CONFIG_IP_PNP_BOOTP=y | ||
37 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
38 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
39 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
40 | # CONFIG_INET_LRO is not set | ||
41 | # CONFIG_INET_DIAG is not set | ||
42 | # CONFIG_IPV6 is not set | ||
43 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
44 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
45 | CONFIG_MTD=y | ||
46 | CONFIG_MTD_CONCAT=y | ||
47 | CONFIG_MTD_PARTITIONS=y | ||
48 | CONFIG_MTD_CMDLINE_PARTS=y | ||
49 | CONFIG_MTD_CHAR=y | ||
50 | CONFIG_MTD_BLOCK=y | ||
51 | CONFIG_MTD_CFI=y | ||
52 | CONFIG_MTD_CFI_INTELEXT=y | ||
53 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
54 | CONFIG_MTD_PHYSMAP=y | ||
55 | CONFIG_MTD_NAND=y | ||
56 | CONFIG_MTD_NAND_ATMEL=y | ||
57 | CONFIG_MTD_UBI=y | ||
58 | CONFIG_MTD_UBI_GLUEBI=y | ||
59 | CONFIG_BLK_DEV_LOOP=y | ||
60 | CONFIG_BLK_DEV_RAM=y | ||
61 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
62 | CONFIG_ATMEL_TCLIB=y | ||
63 | CONFIG_ATMEL_SSC=y | ||
64 | CONFIG_SCSI=y | ||
65 | CONFIG_BLK_DEV_SD=y | ||
66 | CONFIG_CHR_DEV_SG=y | ||
67 | CONFIG_SCSI_MULTI_LUN=y | ||
68 | CONFIG_SCSI_CONSTANTS=y | ||
69 | CONFIG_SCSI_LOGGING=y | ||
70 | CONFIG_SCSI_SPI_ATTRS=m | ||
71 | # CONFIG_SCSI_LOWLEVEL is not set | ||
72 | CONFIG_NETDEVICES=y | ||
73 | CONFIG_NET_ETHERNET=y | ||
74 | CONFIG_ARM_AT91_ETHER=y | ||
75 | # CONFIG_NETDEV_1000 is not set | ||
76 | # CONFIG_NETDEV_10000 is not set | ||
77 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
78 | # CONFIG_INPUT_KEYBOARD is not set | ||
79 | # CONFIG_INPUT_MOUSE is not set | ||
80 | # CONFIG_SERIO is not set | ||
81 | CONFIG_SERIAL_ATMEL=y | ||
82 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
83 | # CONFIG_LEGACY_PTYS is not set | ||
84 | # CONFIG_HW_RANDOM is not set | ||
85 | # CONFIG_HWMON is not set | ||
86 | CONFIG_WATCHDOG=y | ||
87 | CONFIG_AT91RM9200_WATCHDOG=y | ||
88 | CONFIG_FB=y | ||
89 | CONFIG_FB_MODE_HELPERS=y | ||
90 | CONFIG_FB_TILEBLITTING=y | ||
91 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
92 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
93 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
94 | # CONFIG_BACKLIGHT_GENERIC is not set | ||
95 | # CONFIG_VGA_CONSOLE is not set | ||
96 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
97 | CONFIG_FONTS=y | ||
98 | CONFIG_FONT_MINI_4x6=y | ||
99 | # CONFIG_HID_SUPPORT is not set | ||
100 | CONFIG_USB=y | ||
101 | CONFIG_USB_DEVICEFS=y | ||
102 | CONFIG_USB_OHCI_HCD=y | ||
103 | CONFIG_USB_STORAGE=y | ||
104 | CONFIG_USB_LIBUSUAL=y | ||
105 | CONFIG_MMC=y | ||
106 | CONFIG_MMC_AT91=m | ||
107 | CONFIG_RTC_CLASS=y | ||
108 | CONFIG_RTC_DRV_AT91RM9200=y | ||
109 | CONFIG_EXT2_FS=y | ||
110 | CONFIG_EXT3_FS=y | ||
111 | # CONFIG_DNOTIFY is not set | ||
112 | CONFIG_INOTIFY=y | ||
113 | CONFIG_VFAT_FS=y | ||
114 | CONFIG_TMPFS=y | ||
115 | CONFIG_CONFIGFS_FS=y | ||
116 | CONFIG_JFFS2_FS=y | ||
117 | CONFIG_NFS_FS=y | ||
118 | CONFIG_NFS_V3=y | ||
119 | CONFIG_ROOT_NFS=y | ||
120 | CONFIG_NLS_CODEPAGE_437=y | ||
121 | CONFIG_NLS_UTF8=y | ||
122 | CONFIG_MAGIC_SYSRQ=y | ||
123 | CONFIG_DEBUG_FS=y | ||
124 | CONFIG_DEBUG_KERNEL=y | ||
125 | # CONFIG_SCHED_DEBUG is not set | ||
126 | # CONFIG_DEBUG_PREEMPT is not set | ||
127 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig deleted file mode 100644 index 1579857aeeaa..000000000000 --- a/arch/arm/configs/onearm_defconfig +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_BLK_DEV_INITRD=y | ||
6 | CONFIG_EMBEDDED=y | ||
7 | CONFIG_SLAB=y | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | # CONFIG_IOSCHED_DEADLINE is not set | ||
11 | # CONFIG_IOSCHED_CFQ is not set | ||
12 | CONFIG_ARCH_AT91=y | ||
13 | CONFIG_MACH_ONEARM=y | ||
14 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
15 | # CONFIG_ARM_THUMB is not set | ||
16 | CONFIG_PCCARD=y | ||
17 | CONFIG_AT91_CF=y | ||
18 | CONFIG_LEDS=y | ||
19 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
20 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
21 | CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs ip=bootp mem=64M" | ||
22 | CONFIG_FPE_NWFPE=y | ||
23 | CONFIG_NET=y | ||
24 | CONFIG_PACKET=y | ||
25 | CONFIG_UNIX=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_BOOTP=y | ||
29 | CONFIG_IPV6=y | ||
30 | # CONFIG_INET6_XFRM_MODE_TRANSPORT is not set | ||
31 | # CONFIG_INET6_XFRM_MODE_TUNNEL is not set | ||
32 | # CONFIG_INET6_XFRM_MODE_BEET is not set | ||
33 | # CONFIG_IPV6_SIT is not set | ||
34 | CONFIG_MTD=y | ||
35 | CONFIG_MTD_PARTITIONS=y | ||
36 | CONFIG_MTD_CMDLINE_PARTS=y | ||
37 | CONFIG_MTD_CHAR=y | ||
38 | CONFIG_MTD_BLOCK=y | ||
39 | CONFIG_MTD_CFI=y | ||
40 | CONFIG_MTD_JEDECPROBE=y | ||
41 | CONFIG_MTD_CFI_AMDSTD=y | ||
42 | CONFIG_MTD_PHYSMAP=y | ||
43 | CONFIG_BLK_DEV_NBD=y | ||
44 | CONFIG_BLK_DEV_RAM=y | ||
45 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
46 | CONFIG_NETDEVICES=y | ||
47 | CONFIG_NET_ETHERNET=y | ||
48 | CONFIG_ARM_AT91_ETHER=y | ||
49 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
50 | # CONFIG_INPUT_KEYBOARD is not set | ||
51 | # CONFIG_INPUT_MOUSE is not set | ||
52 | # CONFIG_SERIO is not set | ||
53 | # CONFIG_VT is not set | ||
54 | CONFIG_SERIAL_ATMEL=y | ||
55 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
56 | # CONFIG_HW_RANDOM is not set | ||
57 | CONFIG_I2C=y | ||
58 | CONFIG_I2C_CHARDEV=y | ||
59 | CONFIG_WATCHDOG=y | ||
60 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
61 | CONFIG_AT91RM9200_WATCHDOG=y | ||
62 | # CONFIG_USB_HID is not set | ||
63 | CONFIG_USB=y | ||
64 | CONFIG_USB_DEBUG=y | ||
65 | CONFIG_USB_DEVICEFS=y | ||
66 | CONFIG_USB_MON=y | ||
67 | CONFIG_USB_OHCI_HCD=y | ||
68 | CONFIG_USB_GADGET=y | ||
69 | CONFIG_MMC=y | ||
70 | CONFIG_EXT2_FS=y | ||
71 | CONFIG_INOTIFY=y | ||
72 | CONFIG_TMPFS=y | ||
73 | CONFIG_CRAMFS=y | ||
74 | CONFIG_NFS_FS=y | ||
75 | CONFIG_NFS_V3=y | ||
76 | CONFIG_NFS_V3_ACL=y | ||
77 | CONFIG_ROOT_NFS=y | ||
78 | CONFIG_DEBUG_KERNEL=y | ||
79 | CONFIG_DEBUG_USER=y | ||
80 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig deleted file mode 100644 index 4c9afa478d57..000000000000 --- a/arch/arm/configs/picotux200_defconfig +++ /dev/null | |||
@@ -1,242 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=m | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_EMBEDDED=y | ||
7 | # CONFIG_KALLSYMS is not set | ||
8 | CONFIG_SLAB=y | ||
9 | CONFIG_MODULES=y | ||
10 | CONFIG_MODULE_UNLOAD=y | ||
11 | # CONFIG_IOSCHED_DEADLINE is not set | ||
12 | # CONFIG_IOSCHED_CFQ is not set | ||
13 | CONFIG_ARCH_AT91=y | ||
14 | CONFIG_MACH_PICOTUX2XX=y | ||
15 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
16 | CONFIG_AEABI=y | ||
17 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
18 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
19 | CONFIG_KEXEC=y | ||
20 | CONFIG_FPE_NWFPE=y | ||
21 | CONFIG_BINFMT_MISC=m | ||
22 | CONFIG_NET=y | ||
23 | CONFIG_PACKET=m | ||
24 | CONFIG_UNIX=y | ||
25 | CONFIG_XFRM_USER=m | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_BOOTP=y | ||
29 | CONFIG_NET_IPIP=m | ||
30 | CONFIG_NET_IPGRE=m | ||
31 | CONFIG_INET_AH=m | ||
32 | CONFIG_INET_ESP=m | ||
33 | CONFIG_INET_IPCOMP=m | ||
34 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
35 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
36 | CONFIG_INET_XFRM_MODE_BEET=m | ||
37 | CONFIG_INET_DIAG=m | ||
38 | CONFIG_IPV6_PRIVACY=y | ||
39 | CONFIG_IPV6_ROUTER_PREF=y | ||
40 | CONFIG_IPV6_ROUTE_INFO=y | ||
41 | CONFIG_INET6_AH=m | ||
42 | CONFIG_INET6_ESP=m | ||
43 | CONFIG_INET6_IPCOMP=m | ||
44 | CONFIG_IPV6_MIP6=m | ||
45 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
46 | CONFIG_IPV6_TUNNEL=m | ||
47 | CONFIG_BRIDGE=m | ||
48 | CONFIG_VLAN_8021Q=m | ||
49 | CONFIG_BT=m | ||
50 | CONFIG_BT_L2CAP=m | ||
51 | CONFIG_BT_SCO=m | ||
52 | CONFIG_BT_RFCOMM=m | ||
53 | CONFIG_BT_RFCOMM_TTY=y | ||
54 | CONFIG_BT_BNEP=m | ||
55 | CONFIG_BT_BNEP_MC_FILTER=y | ||
56 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
57 | CONFIG_BT_HIDP=m | ||
58 | CONFIG_FW_LOADER=m | ||
59 | CONFIG_MTD=y | ||
60 | CONFIG_MTD_PARTITIONS=y | ||
61 | CONFIG_MTD_CMDLINE_PARTS=y | ||
62 | CONFIG_MTD_CHAR=y | ||
63 | CONFIG_MTD_BLOCK=y | ||
64 | CONFIG_MTD_CFI=y | ||
65 | CONFIG_MTD_CFI_AMDSTD=y | ||
66 | CONFIG_MTD_PHYSMAP=y | ||
67 | CONFIG_BLK_DEV_LOOP=m | ||
68 | CONFIG_EEPROM_LEGACY=m | ||
69 | CONFIG_SCSI=m | ||
70 | CONFIG_BLK_DEV_SD=m | ||
71 | CONFIG_BLK_DEV_SR=m | ||
72 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
73 | CONFIG_CHR_DEV_SG=m | ||
74 | CONFIG_NETDEVICES=y | ||
75 | CONFIG_TUN=m | ||
76 | CONFIG_NET_ETHERNET=y | ||
77 | CONFIG_ARM_AT91_ETHER=y | ||
78 | CONFIG_USB_CATC=m | ||
79 | CONFIG_USB_KAWETH=m | ||
80 | CONFIG_USB_PEGASUS=m | ||
81 | CONFIG_USB_RTL8150=m | ||
82 | CONFIG_USB_USBNET=m | ||
83 | CONFIG_USB_NET_DM9601=m | ||
84 | CONFIG_USB_NET_GL620A=m | ||
85 | CONFIG_USB_NET_PLUSB=m | ||
86 | CONFIG_USB_NET_MCS7830=m | ||
87 | CONFIG_USB_NET_RNDIS_HOST=m | ||
88 | CONFIG_USB_ALI_M5632=y | ||
89 | CONFIG_USB_AN2720=y | ||
90 | CONFIG_USB_EPSON2888=y | ||
91 | CONFIG_USB_KC2190=y | ||
92 | CONFIG_PPP=m | ||
93 | CONFIG_PPP_FILTER=y | ||
94 | CONFIG_PPP_ASYNC=m | ||
95 | CONFIG_PPP_DEFLATE=m | ||
96 | CONFIG_PPP_BSDCOMP=m | ||
97 | CONFIG_PPP_MPPE=m | ||
98 | CONFIG_PPPOE=m | ||
99 | CONFIG_SLIP=m | ||
100 | CONFIG_SLIP_COMPRESSED=y | ||
101 | CONFIG_SLIP_SMART=y | ||
102 | CONFIG_SLIP_MODE_SLIP6=y | ||
103 | # CONFIG_INPUT_MOUSEDEV is not set | ||
104 | # CONFIG_INPUT_KEYBOARD is not set | ||
105 | # CONFIG_INPUT_MOUSE is not set | ||
106 | # CONFIG_SERIO is not set | ||
107 | # CONFIG_VT is not set | ||
108 | CONFIG_SERIAL_ATMEL=y | ||
109 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
110 | # CONFIG_LEGACY_PTYS is not set | ||
111 | CONFIG_I2C=m | ||
112 | CONFIG_I2C_CHARDEV=m | ||
113 | CONFIG_I2C_GPIO=m | ||
114 | CONFIG_HWMON=m | ||
115 | CONFIG_SENSORS_ADM1021=m | ||
116 | CONFIG_SENSORS_ADM1025=m | ||
117 | CONFIG_SENSORS_ADM1026=m | ||
118 | CONFIG_SENSORS_ADM1029=m | ||
119 | CONFIG_SENSORS_ADM1031=m | ||
120 | CONFIG_SENSORS_ADM9240=m | ||
121 | CONFIG_SENSORS_DS1621=m | ||
122 | CONFIG_SENSORS_GL518SM=m | ||
123 | CONFIG_SENSORS_GL520SM=m | ||
124 | CONFIG_SENSORS_IT87=m | ||
125 | CONFIG_SENSORS_LM63=m | ||
126 | CONFIG_SENSORS_LM75=m | ||
127 | CONFIG_SENSORS_LM77=m | ||
128 | CONFIG_SENSORS_LM78=m | ||
129 | CONFIG_SENSORS_LM80=m | ||
130 | CONFIG_SENSORS_LM83=m | ||
131 | CONFIG_SENSORS_LM85=m | ||
132 | CONFIG_SENSORS_LM87=m | ||
133 | CONFIG_SENSORS_LM90=m | ||
134 | CONFIG_SENSORS_LM92=m | ||
135 | CONFIG_SENSORS_MAX1619=m | ||
136 | CONFIG_SENSORS_PCF8591=m | ||
137 | CONFIG_SENSORS_SMSC47B397=m | ||
138 | CONFIG_SENSORS_W83781D=m | ||
139 | CONFIG_SENSORS_W83791D=m | ||
140 | CONFIG_SENSORS_W83792D=m | ||
141 | CONFIG_SENSORS_W83793=m | ||
142 | CONFIG_SENSORS_W83L785TS=m | ||
143 | CONFIG_WATCHDOG=y | ||
144 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
145 | CONFIG_AT91RM9200_WATCHDOG=m | ||
146 | CONFIG_HID=m | ||
147 | CONFIG_USB=m | ||
148 | CONFIG_USB_DEVICEFS=y | ||
149 | CONFIG_USB_OHCI_HCD=m | ||
150 | CONFIG_USB_ACM=m | ||
151 | CONFIG_USB_PRINTER=m | ||
152 | CONFIG_USB_STORAGE=m | ||
153 | CONFIG_USB_SERIAL=m | ||
154 | CONFIG_USB_SERIAL_GENERIC=y | ||
155 | CONFIG_USB_SERIAL_PL2303=m | ||
156 | CONFIG_MMC=m | ||
157 | CONFIG_MMC_AT91=m | ||
158 | CONFIG_RTC_CLASS=m | ||
159 | CONFIG_RTC_DRV_AT91RM9200=m | ||
160 | CONFIG_EXT2_FS=m | ||
161 | CONFIG_EXT3_FS=m | ||
162 | # CONFIG_EXT3_FS_XATTR is not set | ||
163 | CONFIG_INOTIFY=y | ||
164 | CONFIG_ISO9660_FS=m | ||
165 | CONFIG_JOLIET=y | ||
166 | CONFIG_UDF_FS=m | ||
167 | CONFIG_MSDOS_FS=m | ||
168 | CONFIG_VFAT_FS=m | ||
169 | CONFIG_NTFS_FS=m | ||
170 | CONFIG_TMPFS=y | ||
171 | CONFIG_JFFS2_FS=y | ||
172 | CONFIG_JFFS2_SUMMARY=y | ||
173 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
174 | CONFIG_NFS_FS=m | ||
175 | CONFIG_SMB_FS=m | ||
176 | CONFIG_CIFS=m | ||
177 | CONFIG_PARTITION_ADVANCED=y | ||
178 | CONFIG_AMIGA_PARTITION=y | ||
179 | CONFIG_NLS_DEFAULT="utf-8" | ||
180 | CONFIG_NLS_CODEPAGE_437=m | ||
181 | CONFIG_NLS_CODEPAGE_737=m | ||
182 | CONFIG_NLS_CODEPAGE_775=m | ||
183 | CONFIG_NLS_CODEPAGE_850=m | ||
184 | CONFIG_NLS_CODEPAGE_852=m | ||
185 | CONFIG_NLS_CODEPAGE_855=m | ||
186 | CONFIG_NLS_CODEPAGE_857=m | ||
187 | CONFIG_NLS_CODEPAGE_860=m | ||
188 | CONFIG_NLS_CODEPAGE_861=m | ||
189 | CONFIG_NLS_CODEPAGE_862=m | ||
190 | CONFIG_NLS_CODEPAGE_863=m | ||
191 | CONFIG_NLS_CODEPAGE_864=m | ||
192 | CONFIG_NLS_CODEPAGE_865=m | ||
193 | CONFIG_NLS_CODEPAGE_866=m | ||
194 | CONFIG_NLS_CODEPAGE_869=m | ||
195 | CONFIG_NLS_CODEPAGE_936=m | ||
196 | CONFIG_NLS_CODEPAGE_950=m | ||
197 | CONFIG_NLS_CODEPAGE_932=m | ||
198 | CONFIG_NLS_CODEPAGE_949=m | ||
199 | CONFIG_NLS_CODEPAGE_874=m | ||
200 | CONFIG_NLS_ISO8859_8=m | ||
201 | CONFIG_NLS_CODEPAGE_1250=m | ||
202 | CONFIG_NLS_CODEPAGE_1251=m | ||
203 | CONFIG_NLS_ASCII=m | ||
204 | CONFIG_NLS_ISO8859_1=m | ||
205 | CONFIG_NLS_ISO8859_2=m | ||
206 | CONFIG_NLS_ISO8859_3=m | ||
207 | CONFIG_NLS_ISO8859_4=m | ||
208 | CONFIG_NLS_ISO8859_5=m | ||
209 | CONFIG_NLS_ISO8859_6=m | ||
210 | CONFIG_NLS_ISO8859_7=m | ||
211 | CONFIG_NLS_ISO8859_9=m | ||
212 | CONFIG_NLS_ISO8859_13=m | ||
213 | CONFIG_NLS_ISO8859_14=m | ||
214 | CONFIG_NLS_ISO8859_15=m | ||
215 | CONFIG_NLS_KOI8_R=m | ||
216 | CONFIG_NLS_KOI8_U=m | ||
217 | CONFIG_NLS_UTF8=m | ||
218 | CONFIG_DEBUG_KERNEL=y | ||
219 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
220 | CONFIG_DEBUG_LL=y | ||
221 | CONFIG_CRYPTO_NULL=m | ||
222 | CONFIG_CRYPTO_TEST=m | ||
223 | CONFIG_CRYPTO_LRW=m | ||
224 | CONFIG_CRYPTO_PCBC=m | ||
225 | CONFIG_CRYPTO_XCBC=m | ||
226 | CONFIG_CRYPTO_MD4=m | ||
227 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
228 | CONFIG_CRYPTO_SHA256=m | ||
229 | CONFIG_CRYPTO_SHA512=m | ||
230 | CONFIG_CRYPTO_TGR192=m | ||
231 | CONFIG_CRYPTO_WP512=m | ||
232 | CONFIG_CRYPTO_ANUBIS=m | ||
233 | CONFIG_CRYPTO_BLOWFISH=m | ||
234 | CONFIG_CRYPTO_CAMELLIA=m | ||
235 | CONFIG_CRYPTO_CAST5=m | ||
236 | CONFIG_CRYPTO_CAST6=m | ||
237 | CONFIG_CRYPTO_FCRYPT=m | ||
238 | CONFIG_CRYPTO_KHAZAD=m | ||
239 | CONFIG_CRYPTO_SERPENT=m | ||
240 | CONFIG_CRYPTO_TEA=m | ||
241 | CONFIG_CRYPTO_TWOFISH=m | ||
242 | CONFIG_LIBCRC32C=m | ||
diff --git a/arch/arm/configs/yl9200_defconfig b/arch/arm/configs/yl9200_defconfig deleted file mode 100644 index 30c537f61089..000000000000 --- a/arch/arm/configs/yl9200_defconfig +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | # CONFIG_SWAP is not set | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_LOG_BUF_SHIFT=14 | ||
4 | CONFIG_BLK_DEV_INITRD=y | ||
5 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
6 | CONFIG_MODULES=y | ||
7 | CONFIG_MODULE_UNLOAD=y | ||
8 | # CONFIG_IOSCHED_DEADLINE is not set | ||
9 | # CONFIG_IOSCHED_CFQ is not set | ||
10 | CONFIG_ARCH_AT91=y | ||
11 | CONFIG_ARCH_AT91RM9200DK=y | ||
12 | CONFIG_MACH_YL9200=y | ||
13 | # CONFIG_ARM_THUMB is not set | ||
14 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
15 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
16 | CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" | ||
17 | CONFIG_FPE_NWFPE=y | ||
18 | CONFIG_NET=y | ||
19 | CONFIG_PACKET=y | ||
20 | CONFIG_UNIX=y | ||
21 | CONFIG_INET=y | ||
22 | CONFIG_IP_PNP=y | ||
23 | CONFIG_IP_PNP_DHCP=y | ||
24 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
25 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
26 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
27 | # CONFIG_INET_LRO is not set | ||
28 | # CONFIG_INET_DIAG is not set | ||
29 | # CONFIG_IPV6 is not set | ||
30 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
31 | CONFIG_MTD=y | ||
32 | CONFIG_MTD_CONCAT=y | ||
33 | CONFIG_MTD_PARTITIONS=y | ||
34 | CONFIG_MTD_CMDLINE_PARTS=y | ||
35 | CONFIG_MTD_CHAR=y | ||
36 | CONFIG_MTD_BLOCK=y | ||
37 | CONFIG_MTD_CFI=y | ||
38 | CONFIG_MTD_JEDECPROBE=y | ||
39 | CONFIG_MTD_CFI_INTELEXT=y | ||
40 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
41 | CONFIG_MTD_PHYSMAP=y | ||
42 | CONFIG_MTD_PLATRAM=y | ||
43 | CONFIG_MTD_NAND=y | ||
44 | CONFIG_MTD_NAND_ATMEL=y | ||
45 | CONFIG_MTD_NAND_PLATFORM=y | ||
46 | CONFIG_BLK_DEV_LOOP=y | ||
47 | CONFIG_BLK_DEV_RAM=y | ||
48 | CONFIG_BLK_DEV_RAM_COUNT=3 | ||
49 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
50 | # CONFIG_MISC_DEVICES is not set | ||
51 | CONFIG_BLK_DEV_SD=y | ||
52 | CONFIG_ATA=y | ||
53 | CONFIG_NETDEVICES=y | ||
54 | CONFIG_PHYLIB=y | ||
55 | CONFIG_DAVICOM_PHY=y | ||
56 | CONFIG_NET_ETHERNET=y | ||
57 | CONFIG_ARM_AT91_ETHER=y | ||
58 | # CONFIG_NETDEV_1000 is not set | ||
59 | # CONFIG_NETDEV_10000 is not set | ||
60 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
61 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 | ||
62 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
63 | CONFIG_INPUT_EVDEV=y | ||
64 | # CONFIG_KEYBOARD_ATKBD is not set | ||
65 | CONFIG_KEYBOARD_GPIO=y | ||
66 | CONFIG_INPUT_TOUCHSCREEN=y | ||
67 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
68 | # CONFIG_SERIO_SERPORT is not set | ||
69 | CONFIG_SERIAL_ATMEL=y | ||
70 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
71 | # CONFIG_HW_RANDOM is not set | ||
72 | CONFIG_I2C=y | ||
73 | CONFIG_SPI=y | ||
74 | CONFIG_SPI_DEBUG=y | ||
75 | CONFIG_SPI_ATMEL=y | ||
76 | CONFIG_FB=y | ||
77 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
78 | CONFIG_LCD_CLASS_DEVICE=y | ||
79 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
80 | CONFIG_DISPLAY_SUPPORT=y | ||
81 | # CONFIG_VGA_CONSOLE is not set | ||
82 | CONFIG_LOGO=y | ||
83 | # CONFIG_LOGO_LINUX_MONO is not set | ||
84 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
85 | CONFIG_USB=y | ||
86 | CONFIG_USB_DEBUG=y | ||
87 | CONFIG_USB_DEVICEFS=y | ||
88 | # CONFIG_USB_DEVICE_CLASS is not set | ||
89 | CONFIG_USB_MON=y | ||
90 | CONFIG_USB_OHCI_HCD=y | ||
91 | CONFIG_USB_STORAGE=y | ||
92 | CONFIG_USB_GADGET=y | ||
93 | CONFIG_USB_GADGET_M66592=y | ||
94 | CONFIG_USB_FILE_STORAGE=m | ||
95 | CONFIG_MMC=y | ||
96 | CONFIG_MMC_DEBUG=y | ||
97 | # CONFIG_MMC_BLOCK_BOUNCE is not set | ||
98 | CONFIG_MMC_AT91=m | ||
99 | CONFIG_NEW_LEDS=y | ||
100 | CONFIG_LEDS_CLASS=y | ||
101 | CONFIG_LEDS_GPIO=y | ||
102 | CONFIG_LEDS_TRIGGERS=y | ||
103 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
104 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
105 | CONFIG_RTC_CLASS=y | ||
106 | CONFIG_RTC_DRV_AT91RM9200=y | ||
107 | CONFIG_EXT2_FS=y | ||
108 | CONFIG_EXT2_FS_XATTR=y | ||
109 | CONFIG_EXT3_FS=y | ||
110 | CONFIG_REISERFS_FS=y | ||
111 | CONFIG_INOTIFY=y | ||
112 | CONFIG_ISO9660_FS=y | ||
113 | CONFIG_JOLIET=y | ||
114 | CONFIG_ZISOFS=y | ||
115 | CONFIG_UDF_FS=y | ||
116 | CONFIG_MSDOS_FS=y | ||
117 | CONFIG_VFAT_FS=y | ||
118 | CONFIG_TMPFS=y | ||
119 | CONFIG_JFFS2_FS=y | ||
120 | CONFIG_JFFS2_FS_DEBUG=1 | ||
121 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
122 | CONFIG_JFFS2_RUBIN=y | ||
123 | CONFIG_CRAMFS=y | ||
124 | CONFIG_PARTITION_ADVANCED=y | ||
125 | CONFIG_MAC_PARTITION=y | ||
126 | CONFIG_NLS_CODEPAGE_437=y | ||
127 | CONFIG_NLS_ISO8859_1=y | ||
128 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
129 | CONFIG_DEBUG_FS=y | ||
130 | CONFIG_DEBUG_KERNEL=y | ||
131 | CONFIG_SLUB_DEBUG_ON=y | ||
132 | CONFIG_DEBUG_KOBJECT=y | ||
133 | CONFIG_DEBUG_INFO=y | ||
134 | CONFIG_DEBUG_LIST=y | ||
135 | CONFIG_DEBUG_USER=y | ||
136 | CONFIG_DEBUG_ERRORS=y | ||
137 | CONFIG_DEBUG_LL=y | ||
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 8bb66bca2e3e..c3cd8755e648 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h | |||
@@ -99,6 +99,8 @@ struct elf32_hdr; | |||
99 | extern int elf_check_arch(const struct elf32_hdr *); | 99 | extern int elf_check_arch(const struct elf32_hdr *); |
100 | #define elf_check_arch elf_check_arch | 100 | #define elf_check_arch elf_check_arch |
101 | 101 | ||
102 | #define vmcore_elf64_check_arch(x) (0) | ||
103 | |||
102 | extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); | 104 | extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); |
103 | #define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) | 105 | #define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) |
104 | 106 | ||
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S new file mode 100644 index 000000000000..c115b82fe80a --- /dev/null +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S | |||
@@ -0,0 +1,75 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/hardware/entry-macro-gic.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for GIC | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <asm/hardware/gic.h> | ||
12 | |||
13 | #ifndef HAVE_GET_IRQNR_PREAMBLE | ||
14 | .macro get_irqnr_preamble, base, tmp | ||
15 | ldr \base, =gic_cpu_base_addr | ||
16 | ldr \base, [\base] | ||
17 | .endm | ||
18 | #endif | ||
19 | |||
20 | /* | ||
21 | * The interrupt numbering scheme is defined in the | ||
22 | * interrupt controller spec. To wit: | ||
23 | * | ||
24 | * Interrupts 0-15 are IPI | ||
25 | * 16-28 are reserved | ||
26 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
27 | * 32-1020 are global | ||
28 | * 1021-1022 are reserved | ||
29 | * 1023 is "spurious" (no interrupt) | ||
30 | * | ||
31 | * For now, we ignore all local interrupts so only return an interrupt if it's | ||
32 | * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | ||
33 | * | ||
34 | * A simple read from the controller will tell us the number of the highest | ||
35 | * priority enabled interrupt. We then just need to check whether it is in the | ||
36 | * valid range for an IRQ (30-1020 inclusive). | ||
37 | */ | ||
38 | |||
39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
40 | |||
41 | ldr \irqstat, [\base, #GIC_CPU_INTACK] | ||
42 | /* bits 12-10 = src CPU, 9-0 = int # */ | ||
43 | |||
44 | ldr \tmp, =1021 | ||
45 | bic \irqnr, \irqstat, #0x1c00 | ||
46 | cmp \irqnr, #29 | ||
47 | cmpcc \irqnr, \irqnr | ||
48 | cmpne \irqnr, \tmp | ||
49 | cmpcs \irqnr, \irqnr | ||
50 | .endm | ||
51 | |||
52 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
53 | * register) is preserved from the macro above. | ||
54 | * If there is an IPI, we immediately signal end of interrupt on the | ||
55 | * controller, since this requires the original irqstat value which | ||
56 | * we won't easily be able to recreate later. | ||
57 | */ | ||
58 | |||
59 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
60 | bic \irqnr, \irqstat, #0x1c00 | ||
61 | cmp \irqnr, #16 | ||
62 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
63 | cmpcs \irqnr, \irqnr | ||
64 | .endm | ||
65 | |||
66 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
67 | |||
68 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
69 | bic \irqnr, \irqstat, #0x1c00 | ||
70 | mov \tmp, #0 | ||
71 | cmp \irqnr, #29 | ||
72 | moveq \tmp, #1 | ||
73 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
74 | cmp \tmp, #0 | ||
75 | .endm | ||
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 7f34333bb545..84557d321001 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h | |||
@@ -33,10 +33,13 @@ | |||
33 | #define GIC_DIST_SOFTINT 0xf00 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
34 | 34 | ||
35 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
36 | void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start); | 36 | extern void __iomem *gic_cpu_base_addr; |
37 | void gic_cpu_init(unsigned int gic_nr, void __iomem *base); | 37 | |
38 | void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); | ||
39 | void gic_secondary_init(unsigned int); | ||
38 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); | 40 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
39 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); | 41 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); |
42 | void gic_enable_ppi(unsigned int); | ||
40 | #endif | 43 | #endif |
41 | 44 | ||
42 | #endif | 45 | #endif |
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index 21fa272301f8..b2f95c72287c 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h | |||
@@ -76,6 +76,7 @@ extern unsigned long it8152_base_address; | |||
76 | IT8152_PD_IRQ(0) Audio controller (ACR) | 76 | IT8152_PD_IRQ(0) Audio controller (ACR) |
77 | */ | 77 | */ |
78 | #define IT8152_IRQ(x) (IRQ_BOARD_START + (x)) | 78 | #define IT8152_IRQ(x) (IRQ_BOARD_START + (x)) |
79 | #define IT8152_LAST_IRQ (IRQ_BOARD_START + 40) | ||
79 | 80 | ||
80 | /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ | 81 | /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ |
81 | #define IT8152_LD_IRQ_COUNT 9 | 82 | #define IT8152_LD_IRQ_COUNT 9 |
diff --git a/arch/arm/plat-versatile/include/plat/timer-sp.h b/arch/arm/include/asm/hardware/timer-sp.h index 21e75e30d497..21e75e30d497 100644 --- a/arch/arm/plat-versatile/include/plat/timer-sp.h +++ b/arch/arm/include/asm/hardware/timer-sp.h | |||
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h index 1fc684e70ab6..7080e2c8fa62 100644 --- a/arch/arm/include/asm/highmem.h +++ b/arch/arm/include/asm/highmem.h | |||
@@ -25,9 +25,6 @@ extern void *kmap_high(struct page *page); | |||
25 | extern void *kmap_high_get(struct page *page); | 25 | extern void *kmap_high_get(struct page *page); |
26 | extern void kunmap_high(struct page *page); | 26 | extern void kunmap_high(struct page *page); |
27 | 27 | ||
28 | extern void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte); | ||
29 | extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte); | ||
30 | |||
31 | /* | 28 | /* |
32 | * The following functions are already defined by <linux/highmem.h> | 29 | * The following functions are already defined by <linux/highmem.h> |
33 | * when CONFIG_HIGHMEM is not set. | 30 | * when CONFIG_HIGHMEM is not set. |
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 815efa2d4e07..20e0f7c9e03e 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -241,18 +241,15 @@ extern void _memset_io(volatile void __iomem *, int, size_t); | |||
241 | * | 241 | * |
242 | */ | 242 | */ |
243 | #ifndef __arch_ioremap | 243 | #ifndef __arch_ioremap |
244 | #define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) | 244 | #define __arch_ioremap __arm_ioremap |
245 | #define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) | 245 | #define __arch_iounmap __iounmap |
246 | #define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) | 246 | #endif |
247 | #define ioremap_wc(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_WC) | 247 | |
248 | #define iounmap(cookie) __iounmap(cookie) | ||
249 | #else | ||
250 | #define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) | 248 | #define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) |
251 | #define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) | 249 | #define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) |
252 | #define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) | 250 | #define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) |
253 | #define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC) | 251 | #define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC) |
254 | #define iounmap(cookie) __arch_iounmap(cookie) | 252 | #define iounmap __arch_iounmap |
255 | #endif | ||
256 | 253 | ||
257 | /* | 254 | /* |
258 | * io{read,write}{8,16,32} macros | 255 | * io{read,write}{8,16,32} macros |
diff --git a/arch/arm/include/asm/kexec.h b/arch/arm/include/asm/kexec.h index 8ec9ef5c3c7b..c0094d8edae4 100644 --- a/arch/arm/include/asm/kexec.h +++ b/arch/arm/include/asm/kexec.h | |||
@@ -33,10 +33,20 @@ static inline void crash_setup_regs(struct pt_regs *newregs, | |||
33 | if (oldregs) { | 33 | if (oldregs) { |
34 | memcpy(newregs, oldregs, sizeof(*newregs)); | 34 | memcpy(newregs, oldregs, sizeof(*newregs)); |
35 | } else { | 35 | } else { |
36 | __asm__ __volatile__ ("stmia %0, {r0 - r15}" | 36 | __asm__ __volatile__ ( |
37 | : : "r" (&newregs->ARM_r0)); | 37 | "stmia %[regs_base], {r0-r12}\n\t" |
38 | __asm__ __volatile__ ("mrs %0, cpsr" | 38 | "mov %[_ARM_sp], sp\n\t" |
39 | : "=r" (newregs->ARM_cpsr)); | 39 | "str lr, %[_ARM_lr]\n\t" |
40 | "adr %[_ARM_pc], 1f\n\t" | ||
41 | "mrs %[_ARM_cpsr], cpsr\n\t" | ||
42 | "1:" | ||
43 | : [_ARM_pc] "=r" (newregs->ARM_pc), | ||
44 | [_ARM_cpsr] "=r" (newregs->ARM_cpsr), | ||
45 | [_ARM_sp] "=r" (newregs->ARM_sp), | ||
46 | [_ARM_lr] "=o" (newregs->ARM_lr) | ||
47 | : [regs_base] "r" (&newregs->ARM_r0) | ||
48 | : "memory" | ||
49 | ); | ||
40 | } | 50 | } |
41 | } | 51 | } |
42 | 52 | ||
diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h index cbb0bc295d2b..12c8e680cbff 100644 --- a/arch/arm/include/asm/module.h +++ b/arch/arm/include/asm/module.h | |||
@@ -8,11 +8,6 @@ | |||
8 | struct unwind_table; | 8 | struct unwind_table; |
9 | 9 | ||
10 | #ifdef CONFIG_ARM_UNWIND | 10 | #ifdef CONFIG_ARM_UNWIND |
11 | struct arm_unwind_mapping { | ||
12 | Elf_Shdr *unw_sec; | ||
13 | Elf_Shdr *sec_text; | ||
14 | struct unwind_table *unwind; | ||
15 | }; | ||
16 | enum { | 11 | enum { |
17 | ARM_SEC_INIT, | 12 | ARM_SEC_INIT, |
18 | ARM_SEC_DEVINIT, | 13 | ARM_SEC_DEVINIT, |
@@ -21,13 +16,13 @@ enum { | |||
21 | ARM_SEC_DEVEXIT, | 16 | ARM_SEC_DEVEXIT, |
22 | ARM_SEC_MAX, | 17 | ARM_SEC_MAX, |
23 | }; | 18 | }; |
19 | #endif | ||
20 | |||
24 | struct mod_arch_specific { | 21 | struct mod_arch_specific { |
25 | struct arm_unwind_mapping map[ARM_SEC_MAX]; | 22 | #ifdef CONFIG_ARM_UNWIND |
26 | }; | 23 | struct unwind_table *unwind[ARM_SEC_MAX]; |
27 | #else | ||
28 | struct mod_arch_specific { | ||
29 | }; | ||
30 | #endif | 24 | #endif |
25 | }; | ||
31 | 26 | ||
32 | /* | 27 | /* |
33 | * Include the ARM architecture version. | 28 | * Include the ARM architecture version. |
diff --git a/arch/arm/include/asm/sizes.h b/arch/arm/include/asm/sizes.h index 4fc1565e4f93..316bb2b2be3d 100644 --- a/arch/arm/include/asm/sizes.h +++ b/arch/arm/include/asm/sizes.h | |||
@@ -13,9 +13,6 @@ | |||
13 | * along with this program; if not, write to the Free Software | 13 | * along with this program; if not, write to the Free Software |
14 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 14 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
15 | */ | 15 | */ |
16 | /* DO NOT EDIT!! - this file automatically generated | ||
17 | * from .s file by awk -f s2h.awk | ||
18 | */ | ||
19 | /* Size definitions | 16 | /* Size definitions |
20 | * Copyright (C) ARM Limited 1998. All rights reserved. | 17 | * Copyright (C) ARM Limited 1998. All rights reserved. |
21 | */ | 18 | */ |
@@ -25,6 +22,9 @@ | |||
25 | 22 | ||
26 | /* handy sizes */ | 23 | /* handy sizes */ |
27 | #define SZ_16 0x00000010 | 24 | #define SZ_16 0x00000010 |
25 | #define SZ_32 0x00000020 | ||
26 | #define SZ_64 0x00000040 | ||
27 | #define SZ_128 0x00000080 | ||
28 | #define SZ_256 0x00000100 | 28 | #define SZ_256 0x00000100 |
29 | #define SZ_512 0x00000200 | 29 | #define SZ_512 0x00000200 |
30 | 30 | ||
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index ec4327a4653d..3222ab8b3447 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -155,6 +155,7 @@ extern unsigned int user_debug; | |||
155 | #define rmb() dmb() | 155 | #define rmb() dmb() |
156 | #define wmb() mb() | 156 | #define wmb() mb() |
157 | #else | 157 | #else |
158 | #include <asm/memory.h> | ||
158 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 159 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
159 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 160 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
160 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) | 161 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index c09e3573c5de..bb96a7d4bbf5 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -911,7 +911,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
911 | * A special ghost syscall is used for that (see traps.c). | 911 | * A special ghost syscall is used for that (see traps.c). |
912 | */ | 912 | */ |
913 | stmfd sp!, {r7, lr} | 913 | stmfd sp!, {r7, lr} |
914 | ldr r7, =1f @ it's 20 bits | 914 | ldr r7, 1f @ it's 20 bits |
915 | swi __ARM_NR_cmpxchg | 915 | swi __ARM_NR_cmpxchg |
916 | ldmfd sp!, {r7, pc} | 916 | ldmfd sp!, {r7, pc} |
917 | 1: .word __ARM_NR_cmpxchg | 917 | 1: .word __ARM_NR_cmpxchg |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index aae802ee12f8..1e7b04a40a31 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -29,6 +29,9 @@ ret_fast_syscall: | |||
29 | ldr r1, [tsk, #TI_FLAGS] | 29 | ldr r1, [tsk, #TI_FLAGS] |
30 | tst r1, #_TIF_WORK_MASK | 30 | tst r1, #_TIF_WORK_MASK |
31 | bne fast_work_pending | 31 | bne fast_work_pending |
32 | #if defined(CONFIG_IRQSOFF_TRACER) | ||
33 | asm_trace_hardirqs_on | ||
34 | #endif | ||
32 | 35 | ||
33 | /* perform architecture specific actions before user return */ | 36 | /* perform architecture specific actions before user return */ |
34 | arch_ret_to_user r1, lr | 37 | arch_ret_to_user r1, lr |
@@ -65,6 +68,9 @@ ret_slow_syscall: | |||
65 | tst r1, #_TIF_WORK_MASK | 68 | tst r1, #_TIF_WORK_MASK |
66 | bne work_pending | 69 | bne work_pending |
67 | no_work_pending: | 70 | no_work_pending: |
71 | #if defined(CONFIG_IRQSOFF_TRACER) | ||
72 | asm_trace_hardirqs_on | ||
73 | #endif | ||
68 | /* perform architecture specific actions before user return */ | 74 | /* perform architecture specific actions before user return */ |
69 | arch_ret_to_user r1, lr | 75 | arch_ret_to_user r1, lr |
70 | 76 | ||
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index dd6b369ac69c..6bd82d25683c 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -85,9 +85,11 @@ ENTRY(stext) | |||
85 | mrc p15, 0, r9, c0, c0 @ get processor id | 85 | mrc p15, 0, r9, c0, c0 @ get processor id |
86 | bl __lookup_processor_type @ r5=procinfo r9=cpuid | 86 | bl __lookup_processor_type @ r5=procinfo r9=cpuid |
87 | movs r10, r5 @ invalid processor (r5=0)? | 87 | movs r10, r5 @ invalid processor (r5=0)? |
88 | THUMB( it eq ) @ force fixup-able long branch encoding | ||
88 | beq __error_p @ yes, error 'p' | 89 | beq __error_p @ yes, error 'p' |
89 | bl __lookup_machine_type @ r5=machinfo | 90 | bl __lookup_machine_type @ r5=machinfo |
90 | movs r8, r5 @ invalid machine (r5=0)? | 91 | movs r8, r5 @ invalid machine (r5=0)? |
92 | THUMB( it eq ) @ force fixup-able long branch encoding | ||
91 | beq __error_a @ yes, error 'a' | 93 | beq __error_a @ yes, error 'a' |
92 | bl __vet_atags | 94 | bl __vet_atags |
93 | #ifdef CONFIG_SMP_ON_UP | 95 | #ifdef CONFIG_SMP_ON_UP |
@@ -262,6 +264,7 @@ __create_page_tables: | |||
262 | mov pc, lr | 264 | mov pc, lr |
263 | ENDPROC(__create_page_tables) | 265 | ENDPROC(__create_page_tables) |
264 | .ltorg | 266 | .ltorg |
267 | .align | ||
265 | __enable_mmu_loc: | 268 | __enable_mmu_loc: |
266 | .long . | 269 | .long . |
267 | .long __enable_mmu | 270 | .long __enable_mmu |
@@ -282,6 +285,7 @@ ENTRY(secondary_startup) | |||
282 | bl __lookup_processor_type | 285 | bl __lookup_processor_type |
283 | movs r10, r5 @ invalid processor? | 286 | movs r10, r5 @ invalid processor? |
284 | moveq r0, #'p' @ yes, error 'p' | 287 | moveq r0, #'p' @ yes, error 'p' |
288 | THUMB( it eq ) @ force fixup-able long branch encoding | ||
285 | beq __error_p | 289 | beq __error_p |
286 | 290 | ||
287 | /* | 291 | /* |
@@ -308,6 +312,8 @@ ENTRY(__secondary_switched) | |||
308 | b secondary_start_kernel | 312 | b secondary_start_kernel |
309 | ENDPROC(__secondary_switched) | 313 | ENDPROC(__secondary_switched) |
310 | 314 | ||
315 | .align | ||
316 | |||
311 | .type __secondary_data, %object | 317 | .type __secondary_data, %object |
312 | __secondary_data: | 318 | __secondary_data: |
313 | .long . | 319 | .long . |
@@ -413,6 +419,7 @@ __fixup_smp_on_up: | |||
413 | mov pc, lr | 419 | mov pc, lr |
414 | ENDPROC(__fixup_smp) | 420 | ENDPROC(__fixup_smp) |
415 | 421 | ||
422 | .align | ||
416 | 1: .word . | 423 | 1: .word . |
417 | .word __smpalt_begin | 424 | .word __smpalt_begin |
418 | .word __smpalt_end | 425 | .word __smpalt_end |
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index 3a8fd5140d7a..30ead135ff5f 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c | |||
@@ -23,6 +23,8 @@ extern unsigned long kexec_indirection_page; | |||
23 | extern unsigned long kexec_mach_type; | 23 | extern unsigned long kexec_mach_type; |
24 | extern unsigned long kexec_boot_atags; | 24 | extern unsigned long kexec_boot_atags; |
25 | 25 | ||
26 | static atomic_t waiting_for_crash_ipi; | ||
27 | |||
26 | /* | 28 | /* |
27 | * Provide a dummy crash_notes definition while crash dump arrives to arm. | 29 | * Provide a dummy crash_notes definition while crash dump arrives to arm. |
28 | * This prevents breakage of crash_notes attribute in kernel/ksysfs.c. | 30 | * This prevents breakage of crash_notes attribute in kernel/ksysfs.c. |
@@ -37,9 +39,37 @@ void machine_kexec_cleanup(struct kimage *image) | |||
37 | { | 39 | { |
38 | } | 40 | } |
39 | 41 | ||
42 | void machine_crash_nonpanic_core(void *unused) | ||
43 | { | ||
44 | struct pt_regs regs; | ||
45 | |||
46 | crash_setup_regs(®s, NULL); | ||
47 | printk(KERN_DEBUG "CPU %u will stop doing anything useful since another CPU has crashed\n", | ||
48 | smp_processor_id()); | ||
49 | crash_save_cpu(®s, smp_processor_id()); | ||
50 | flush_cache_all(); | ||
51 | |||
52 | atomic_dec(&waiting_for_crash_ipi); | ||
53 | while (1) | ||
54 | cpu_relax(); | ||
55 | } | ||
56 | |||
40 | void machine_crash_shutdown(struct pt_regs *regs) | 57 | void machine_crash_shutdown(struct pt_regs *regs) |
41 | { | 58 | { |
59 | unsigned long msecs; | ||
60 | |||
42 | local_irq_disable(); | 61 | local_irq_disable(); |
62 | |||
63 | atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); | ||
64 | smp_call_function(machine_crash_nonpanic_core, NULL, false); | ||
65 | msecs = 1000; /* Wait at most a second for the other cpus to stop */ | ||
66 | while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { | ||
67 | mdelay(1); | ||
68 | msecs--; | ||
69 | } | ||
70 | if (atomic_read(&waiting_for_crash_ipi) > 0) | ||
71 | printk(KERN_WARNING "Non-crashing CPUs did not react to IPI\n"); | ||
72 | |||
43 | crash_save_cpu(regs, smp_processor_id()); | 73 | crash_save_cpu(regs, smp_processor_id()); |
44 | 74 | ||
45 | printk(KERN_INFO "Loading crashdump kernel...\n"); | 75 | printk(KERN_INFO "Loading crashdump kernel...\n"); |
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index d9bd786ce23d..0c1bb68ff4a8 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c | |||
@@ -67,35 +67,6 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, | |||
67 | char *secstrings, | 67 | char *secstrings, |
68 | struct module *mod) | 68 | struct module *mod) |
69 | { | 69 | { |
70 | #ifdef CONFIG_ARM_UNWIND | ||
71 | Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; | ||
72 | struct arm_unwind_mapping *maps = mod->arch.map; | ||
73 | |||
74 | for (s = sechdrs; s < sechdrs_end; s++) { | ||
75 | char const *secname = secstrings + s->sh_name; | ||
76 | |||
77 | if (strcmp(".ARM.exidx.init.text", secname) == 0) | ||
78 | maps[ARM_SEC_INIT].unw_sec = s; | ||
79 | else if (strcmp(".ARM.exidx.devinit.text", secname) == 0) | ||
80 | maps[ARM_SEC_DEVINIT].unw_sec = s; | ||
81 | else if (strcmp(".ARM.exidx", secname) == 0) | ||
82 | maps[ARM_SEC_CORE].unw_sec = s; | ||
83 | else if (strcmp(".ARM.exidx.exit.text", secname) == 0) | ||
84 | maps[ARM_SEC_EXIT].unw_sec = s; | ||
85 | else if (strcmp(".ARM.exidx.devexit.text", secname) == 0) | ||
86 | maps[ARM_SEC_DEVEXIT].unw_sec = s; | ||
87 | else if (strcmp(".init.text", secname) == 0) | ||
88 | maps[ARM_SEC_INIT].sec_text = s; | ||
89 | else if (strcmp(".devinit.text", secname) == 0) | ||
90 | maps[ARM_SEC_DEVINIT].sec_text = s; | ||
91 | else if (strcmp(".text", secname) == 0) | ||
92 | maps[ARM_SEC_CORE].sec_text = s; | ||
93 | else if (strcmp(".exit.text", secname) == 0) | ||
94 | maps[ARM_SEC_EXIT].sec_text = s; | ||
95 | else if (strcmp(".devexit.text", secname) == 0) | ||
96 | maps[ARM_SEC_DEVEXIT].sec_text = s; | ||
97 | } | ||
98 | #endif | ||
99 | return 0; | 70 | return 0; |
100 | } | 71 | } |
101 | 72 | ||
@@ -300,41 +271,69 @@ apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab, | |||
300 | return -ENOEXEC; | 271 | return -ENOEXEC; |
301 | } | 272 | } |
302 | 273 | ||
303 | #ifdef CONFIG_ARM_UNWIND | 274 | struct mod_unwind_map { |
304 | static void register_unwind_tables(struct module *mod) | 275 | const Elf_Shdr *unw_sec; |
276 | const Elf_Shdr *txt_sec; | ||
277 | }; | ||
278 | |||
279 | int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, | ||
280 | struct module *mod) | ||
305 | { | 281 | { |
282 | #ifdef CONFIG_ARM_UNWIND | ||
283 | const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; | ||
284 | const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; | ||
285 | struct mod_unwind_map maps[ARM_SEC_MAX]; | ||
306 | int i; | 286 | int i; |
307 | for (i = 0; i < ARM_SEC_MAX; ++i) { | 287 | |
308 | struct arm_unwind_mapping *map = &mod->arch.map[i]; | 288 | memset(maps, 0, sizeof(maps)); |
309 | if (map->unw_sec && map->sec_text) | 289 | |
310 | map->unwind = unwind_table_add(map->unw_sec->sh_addr, | 290 | for (s = sechdrs; s < sechdrs_end; s++) { |
311 | map->unw_sec->sh_size, | 291 | const char *secname = secstrs + s->sh_name; |
312 | map->sec_text->sh_addr, | 292 | |
313 | map->sec_text->sh_size); | 293 | if (!(s->sh_flags & SHF_ALLOC)) |
294 | continue; | ||
295 | |||
296 | if (strcmp(".ARM.exidx.init.text", secname) == 0) | ||
297 | maps[ARM_SEC_INIT].unw_sec = s; | ||
298 | else if (strcmp(".ARM.exidx.devinit.text", secname) == 0) | ||
299 | maps[ARM_SEC_DEVINIT].unw_sec = s; | ||
300 | else if (strcmp(".ARM.exidx", secname) == 0) | ||
301 | maps[ARM_SEC_CORE].unw_sec = s; | ||
302 | else if (strcmp(".ARM.exidx.exit.text", secname) == 0) | ||
303 | maps[ARM_SEC_EXIT].unw_sec = s; | ||
304 | else if (strcmp(".ARM.exidx.devexit.text", secname) == 0) | ||
305 | maps[ARM_SEC_DEVEXIT].unw_sec = s; | ||
306 | else if (strcmp(".init.text", secname) == 0) | ||
307 | maps[ARM_SEC_INIT].txt_sec = s; | ||
308 | else if (strcmp(".devinit.text", secname) == 0) | ||
309 | maps[ARM_SEC_DEVINIT].txt_sec = s; | ||
310 | else if (strcmp(".text", secname) == 0) | ||
311 | maps[ARM_SEC_CORE].txt_sec = s; | ||
312 | else if (strcmp(".exit.text", secname) == 0) | ||
313 | maps[ARM_SEC_EXIT].txt_sec = s; | ||
314 | else if (strcmp(".devexit.text", secname) == 0) | ||
315 | maps[ARM_SEC_DEVEXIT].txt_sec = s; | ||
314 | } | 316 | } |
315 | } | ||
316 | 317 | ||
317 | static void unregister_unwind_tables(struct module *mod) | 318 | for (i = 0; i < ARM_SEC_MAX; i++) |
318 | { | 319 | if (maps[i].unw_sec && maps[i].txt_sec) |
319 | int i = ARM_SEC_MAX; | 320 | mod->arch.unwind[i] = |
320 | while (--i >= 0) | 321 | unwind_table_add(maps[i].unw_sec->sh_addr, |
321 | unwind_table_del(mod->arch.map[i].unwind); | 322 | maps[i].unw_sec->sh_size, |
322 | } | 323 | maps[i].txt_sec->sh_addr, |
323 | #else | 324 | maps[i].txt_sec->sh_size); |
324 | static inline void register_unwind_tables(struct module *mod) { } | ||
325 | static inline void unregister_unwind_tables(struct module *mod) { } | ||
326 | #endif | 325 | #endif |
327 | |||
328 | int | ||
329 | module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, | ||
330 | struct module *module) | ||
331 | { | ||
332 | register_unwind_tables(module); | ||
333 | return 0; | 326 | return 0; |
334 | } | 327 | } |
335 | 328 | ||
336 | void | 329 | void |
337 | module_arch_cleanup(struct module *mod) | 330 | module_arch_cleanup(struct module *mod) |
338 | { | 331 | { |
339 | unregister_unwind_tables(mod); | 332 | #ifdef CONFIG_ARM_UNWIND |
333 | int i; | ||
334 | |||
335 | for (i = 0; i < ARM_SEC_MAX; i++) | ||
336 | if (mod->arch.unwind[i]) | ||
337 | unwind_table_del(mod->arch.unwind[i]); | ||
338 | #endif | ||
340 | } | 339 | } |
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S index fd26f8d65151..9cf4cbf8f95b 100644 --- a/arch/arm/kernel/relocate_kernel.S +++ b/arch/arm/kernel/relocate_kernel.S | |||
@@ -59,6 +59,8 @@ relocate_new_kernel: | |||
59 | ldr r2,kexec_boot_atags | 59 | ldr r2,kexec_boot_atags |
60 | mov pc,lr | 60 | mov pc,lr |
61 | 61 | ||
62 | .align | ||
63 | |||
62 | .globl kexec_start_address | 64 | .globl kexec_start_address |
63 | kexec_start_address: | 65 | kexec_start_address: |
64 | .long 0x0 | 66 | .long 0x0 |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index bbca89872c18..b6b78b22031b 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -311,7 +311,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void) | |||
311 | * All kernel threads share the same mm context; grab a | 311 | * All kernel threads share the same mm context; grab a |
312 | * reference and switch to it. | 312 | * reference and switch to it. |
313 | */ | 313 | */ |
314 | atomic_inc(&mm->mm_users); | ||
315 | atomic_inc(&mm->mm_count); | 314 | atomic_inc(&mm->mm_count); |
316 | current->active_mm = mm; | 315 | current->active_mm = mm; |
317 | cpumask_set_cpu(cpu, mm_cpumask(mm)); | 316 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 35882fbf37f9..67f933ec4177 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -127,8 +127,6 @@ static void __cpuinit twd_calibrate_rate(void) | |||
127 | */ | 127 | */ |
128 | void __cpuinit twd_timer_setup(struct clock_event_device *clk) | 128 | void __cpuinit twd_timer_setup(struct clock_event_device *clk) |
129 | { | 129 | { |
130 | unsigned long flags; | ||
131 | |||
132 | twd_calibrate_rate(); | 130 | twd_calibrate_rate(); |
133 | 131 | ||
134 | clk->name = "local_timer"; | 132 | clk->name = "local_timer"; |
@@ -143,10 +141,7 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) | |||
143 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); | 141 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); |
144 | 142 | ||
145 | /* Make sure our local interrupt controller has this enabled */ | 143 | /* Make sure our local interrupt controller has this enabled */ |
146 | local_irq_save(flags); | 144 | gic_enable_ppi(clk->irq); |
147 | irq_to_desc(clk->irq)->status |= IRQ_NOPROBE; | ||
148 | get_irq_chip(clk->irq)->unmask(clk->irq); | ||
149 | local_irq_restore(flags); | ||
150 | 145 | ||
151 | clockevents_register_device(clk); | 146 | clockevents_register_device(clk); |
152 | } | 147 | } |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 821eb842795f..d13add71f72a 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -24,8 +24,8 @@ obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o | |||
24 | 24 | ||
25 | # AT91RM9200 board-specific support | 25 | # AT91RM9200 board-specific support |
26 | obj-$(CONFIG_MACH_ONEARM) += board-1arm.o | 26 | obj-$(CONFIG_MACH_ONEARM) += board-1arm.o |
27 | obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o | 27 | obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o |
28 | obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o | 28 | obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o |
29 | obj-$(CONFIG_MACH_CSB337) += board-csb337.o | 29 | obj-$(CONFIG_MACH_CSB337) += board-csb337.o |
30 | obj-$(CONFIG_MACH_CSB637) += board-csb637.o | 30 | obj-$(CONFIG_MACH_CSB637) += board-csb637.o |
31 | obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o | 31 | obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o |
@@ -65,7 +65,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o | |||
65 | obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o | 65 | obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o |
66 | obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o | 66 | obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o |
67 | obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o | 67 | obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o |
68 | obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o | 68 | obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o |
69 | 69 | ||
70 | # AT91SAM9260/AT91SAM9G20 board-specific support | 70 | # AT91SAM9260/AT91SAM9G20 board-specific support |
71 | obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o | 71 | obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 9338825cfcd7..7b539228e0ef 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -1106,51 +1106,6 @@ static inline void configure_usart3_pins(unsigned pins) | |||
1106 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 1106 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
1107 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 1107 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
1108 | 1108 | ||
1109 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) | ||
1110 | { | ||
1111 | int i; | ||
1112 | |||
1113 | /* Fill in list of supported UARTs */ | ||
1114 | for (i = 0; i < config->nr_tty; i++) { | ||
1115 | switch (config->tty_map[i]) { | ||
1116 | case 0: | ||
1117 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); | ||
1118 | at91_uarts[i] = &at91rm9200_uart0_device; | ||
1119 | at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); | ||
1120 | break; | ||
1121 | case 1: | ||
1122 | configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI); | ||
1123 | at91_uarts[i] = &at91rm9200_uart1_device; | ||
1124 | at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); | ||
1125 | break; | ||
1126 | case 2: | ||
1127 | configure_usart2_pins(0); | ||
1128 | at91_uarts[i] = &at91rm9200_uart2_device; | ||
1129 | at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); | ||
1130 | break; | ||
1131 | case 3: | ||
1132 | configure_usart3_pins(0); | ||
1133 | at91_uarts[i] = &at91rm9200_uart3_device; | ||
1134 | at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); | ||
1135 | break; | ||
1136 | case 4: | ||
1137 | configure_dbgu_pins(); | ||
1138 | at91_uarts[i] = &at91rm9200_dbgu_device; | ||
1139 | at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart"); | ||
1140 | break; | ||
1141 | default: | ||
1142 | continue; | ||
1143 | } | ||
1144 | at91_uarts[i]->id = i; /* update ID number to mapped ID */ | ||
1145 | } | ||
1146 | |||
1147 | /* Set serial console device */ | ||
1148 | if (config->console_tty < ATMEL_MAX_UART) | ||
1149 | atmel_default_console_device = at91_uarts[config->console_tty]; | ||
1150 | if (!atmel_default_console_device) | ||
1151 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1152 | } | ||
1153 | |||
1154 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | 1109 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) |
1155 | { | 1110 | { |
1156 | struct platform_device *pdev; | 1111 | struct platform_device *pdev; |
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 46bdc82d3fbf..8a3fc84847c1 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c | |||
@@ -39,24 +39,24 @@ | |||
39 | #include "generic.h" | 39 | #include "generic.h" |
40 | 40 | ||
41 | 41 | ||
42 | /* | ||
43 | * Serial port configuration. | ||
44 | * 0 .. 3 = USART0 .. USART3 | ||
45 | * 4 = DBGU | ||
46 | */ | ||
47 | static struct at91_uart_config __initdata onearm_uart_config = { | ||
48 | .console_tty = 0, /* ttyS0 */ | ||
49 | .nr_tty = 3, | ||
50 | .tty_map = { 4, 0, 1, -1, -1 }, /* ttyS0, ..., ttyS4 */ | ||
51 | }; | ||
52 | |||
53 | static void __init onearm_map_io(void) | 42 | static void __init onearm_map_io(void) |
54 | { | 43 | { |
55 | /* Initialize processor: 18.432 MHz crystal */ | 44 | /* Initialize processor: 18.432 MHz crystal */ |
56 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); | 45 | at91rm9200_initialize(18432000, AT91RM9200_PQFP); |
57 | 46 | ||
58 | /* Setup the serial ports and console */ | 47 | /* DBGU on ttyS0. (Rx & Tx only) */ |
59 | at91_init_serial(&onearm_uart_config); | 48 | at91_register_uart(0, 0, 0); |
49 | |||
50 | /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ | ||
51 | at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); | ||
52 | |||
53 | /* USART1 on ttyS2 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | ||
54 | at91_register_uart(AT91RM9200_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS | ||
55 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD | ||
56 | | ATMEL_UART_RI); | ||
57 | |||
58 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
59 | at91_set_serial_console(0); | ||
60 | } | 60 | } |
61 | 61 | ||
62 | static void __init onearm_init_irq(void) | 62 | static void __init onearm_init_irq(void) |
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index c0ce79d431a0..d2e1f4ec1fcc 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c | |||
@@ -39,17 +39,6 @@ | |||
39 | #include "generic.h" | 39 | #include "generic.h" |
40 | 40 | ||
41 | 41 | ||
42 | /* | ||
43 | * Serial port configuration. | ||
44 | * 0 .. 3 = USART0 .. USART3 | ||
45 | * 4 = DBGU | ||
46 | */ | ||
47 | static struct at91_uart_config __initdata kafa_uart_config = { | ||
48 | .console_tty = 0, /* ttyS0 */ | ||
49 | .nr_tty = 2, | ||
50 | .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ | ||
51 | }; | ||
52 | |||
53 | static void __init kafa_map_io(void) | 42 | static void __init kafa_map_io(void) |
54 | { | 43 | { |
55 | /* Initialize processor: 18.432 MHz crystal */ | 44 | /* Initialize processor: 18.432 MHz crystal */ |
@@ -58,8 +47,14 @@ static void __init kafa_map_io(void) | |||
58 | /* Set up the LEDs */ | 47 | /* Set up the LEDs */ |
59 | at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); | 48 | at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); |
60 | 49 | ||
61 | /* Setup the serial ports and console */ | 50 | /* DBGU on ttyS0. (Rx & Tx only) */ |
62 | at91_init_serial(&kafa_uart_config); | 51 | at91_register_uart(0, 0, 0); |
52 | |||
53 | /* USART0 on ttyS1 (Rx, Tx, CTS, RTS) */ | ||
54 | at91_register_uart(AT91RM9200_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); | ||
55 | |||
56 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
57 | at91_set_serial_console(0); | ||
63 | } | 58 | } |
64 | 59 | ||
65 | static void __init kafa_init_irq(void) | 60 | static void __init kafa_init_irq(void) |
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index bba5a560e02b..feb65787c30b 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include <mach/board.h> | 32 | #include <mach/board.h> |
33 | #include <mach/at91sam9_smc.h> | 33 | #include <mach/at91sam9_smc.h> |
34 | #include <mach/stamp9g20.h> | ||
34 | 35 | ||
35 | #include "sam9_smc.h" | 36 | #include "sam9_smc.h" |
36 | #include "generic.h" | 37 | #include "generic.h" |
@@ -38,11 +39,7 @@ | |||
38 | 39 | ||
39 | static void __init pcontrol_g20_map_io(void) | 40 | static void __init pcontrol_g20_map_io(void) |
40 | { | 41 | { |
41 | /* Initialize processor: 18.432 MHz crystal */ | 42 | stamp9g20_map_io(); |
42 | at91sam9260_initialize(18432000); | ||
43 | |||
44 | /* DGBU on ttyS0. (Rx, Tx) only TTL -> JTAG connector X7 17,19 ) */ | ||
45 | at91_register_uart(0, 0, 0); | ||
46 | 43 | ||
47 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ | 44 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ |
48 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | 45 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS |
@@ -54,9 +51,6 @@ static void __init pcontrol_g20_map_io(void) | |||
54 | 51 | ||
55 | /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ | 52 | /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ |
56 | at91_register_uart(AT91SAM9260_ID_US4, 3, 0); | 53 | at91_register_uart(AT91SAM9260_ID_US4, 3, 0); |
57 | |||
58 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
59 | at91_set_serial_console(0); | ||
60 | } | 54 | } |
61 | 55 | ||
62 | 56 | ||
@@ -66,38 +60,6 @@ static void __init init_irq(void) | |||
66 | } | 60 | } |
67 | 61 | ||
68 | 62 | ||
69 | /* | ||
70 | * NAND flash 512MiB 1,8V 8-bit, sector size 128 KiB | ||
71 | */ | ||
72 | static struct atmel_nand_data __initdata nand_data = { | ||
73 | .ale = 21, | ||
74 | .cle = 22, | ||
75 | .rdy_pin = AT91_PIN_PC13, | ||
76 | .enable_pin = AT91_PIN_PC14, | ||
77 | }; | ||
78 | |||
79 | /* | ||
80 | * Bus timings; unit = 7.57ns | ||
81 | */ | ||
82 | static struct sam9_smc_config __initdata nand_smc_config = { | ||
83 | .ncs_read_setup = 0, | ||
84 | .nrd_setup = 2, | ||
85 | .ncs_write_setup = 0, | ||
86 | .nwe_setup = 2, | ||
87 | |||
88 | .ncs_read_pulse = 4, | ||
89 | .nrd_pulse = 4, | ||
90 | .ncs_write_pulse = 4, | ||
91 | .nwe_pulse = 4, | ||
92 | |||
93 | .read_cycle = 7, | ||
94 | .write_cycle = 7, | ||
95 | |||
96 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | ||
97 | | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8, | ||
98 | .tdf_cycles = 3, | ||
99 | }; | ||
100 | |||
101 | static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { | 63 | static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { |
102 | .ncs_read_setup = 16, | 64 | .ncs_read_setup = 16, |
103 | .nrd_setup = 18, | 65 | .nrd_setup = 18, |
@@ -138,14 +100,6 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { | |||
138 | .tdf_cycles = 1, | 100 | .tdf_cycles = 1, |
139 | } }; | 101 | } }; |
140 | 102 | ||
141 | static void __init add_device_nand(void) | ||
142 | { | ||
143 | /* configure chip-select 3 (NAND) */ | ||
144 | sam9_smc_configure(3, &nand_smc_config); | ||
145 | at91_add_device_nand(&nand_data); | ||
146 | } | ||
147 | |||
148 | |||
149 | static void __init add_device_pcontrol(void) | 103 | static void __init add_device_pcontrol(void) |
150 | { | 104 | { |
151 | /* configure chip-select 4 (IO compatible to 8051 X4 ) */ | 105 | /* configure chip-select 4 (IO compatible to 8051 X4 ) */ |
@@ -156,23 +110,6 @@ static void __init add_device_pcontrol(void) | |||
156 | 110 | ||
157 | 111 | ||
158 | /* | 112 | /* |
159 | * MCI (SD/MMC) | ||
160 | * det_pin, wp_pin and vcc_pin are not connected | ||
161 | */ | ||
162 | #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) | ||
163 | static struct mci_platform_data __initdata mmc_data = { | ||
164 | .slot[0] = { | ||
165 | .bus_width = 4, | ||
166 | }, | ||
167 | }; | ||
168 | #else | ||
169 | static struct at91_mmc_data __initdata mmc_data = { | ||
170 | .wire4 = 1, | ||
171 | }; | ||
172 | #endif | ||
173 | |||
174 | |||
175 | /* | ||
176 | * USB Host port | 113 | * USB Host port |
177 | */ | 114 | */ |
178 | static struct at91_usbh_data __initdata usbh_data = { | 115 | static struct at91_usbh_data __initdata usbh_data = { |
@@ -265,42 +202,13 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = { | |||
265 | }; | 202 | }; |
266 | 203 | ||
267 | 204 | ||
268 | /* | ||
269 | * Dallas 1-Wire DS2431 | ||
270 | */ | ||
271 | static struct w1_gpio_platform_data w1_gpio_pdata = { | ||
272 | .pin = AT91_PIN_PA29, | ||
273 | .is_open_drain = 1, | ||
274 | }; | ||
275 | |||
276 | static struct platform_device w1_device = { | ||
277 | .name = "w1-gpio", | ||
278 | .id = -1, | ||
279 | .dev.platform_data = &w1_gpio_pdata, | ||
280 | }; | ||
281 | |||
282 | static void add_wire1(void) | ||
283 | { | ||
284 | at91_set_GPIO_periph(w1_gpio_pdata.pin, 1); | ||
285 | at91_set_multi_drive(w1_gpio_pdata.pin, 1); | ||
286 | platform_device_register(&w1_device); | ||
287 | } | ||
288 | |||
289 | |||
290 | static void __init pcontrol_g20_board_init(void) | 205 | static void __init pcontrol_g20_board_init(void) |
291 | { | 206 | { |
292 | at91_add_device_serial(); | 207 | stamp9g20_board_init(); |
293 | add_device_nand(); | ||
294 | #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE) | ||
295 | at91_add_device_mci(0, &mmc_data); | ||
296 | #else | ||
297 | at91_add_device_mmc(0, &mmc_data); | ||
298 | #endif | ||
299 | at91_add_device_usbh(&usbh_data); | 208 | at91_add_device_usbh(&usbh_data); |
300 | at91_add_device_eth(&macb_data); | 209 | at91_add_device_eth(&macb_data); |
301 | at91_add_device_i2c(pcontrol_g20_i2c_devices, | 210 | at91_add_device_i2c(pcontrol_g20_i2c_devices, |
302 | ARRAY_SIZE(pcontrol_g20_i2c_devices)); | 211 | ARRAY_SIZE(pcontrol_g20_i2c_devices)); |
303 | add_wire1(); | ||
304 | add_device_pcontrol(); | 212 | add_device_pcontrol(); |
305 | at91_add_device_spi(pcontrol_g20_spi_devices, | 213 | at91_add_device_spi(pcontrol_g20_spi_devices, |
306 | ARRAY_SIZE(pcontrol_g20_spi_devices)); | 214 | ARRAY_SIZE(pcontrol_g20_spi_devices)); |
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index 9d833bbc592d..55dad3a46547 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -43,24 +43,21 @@ | |||
43 | #include "generic.h" | 43 | #include "generic.h" |
44 | 44 | ||
45 | 45 | ||
46 | /* | ||
47 | * Serial port configuration. | ||
48 | * 0 .. 3 = USART0 .. USART3 | ||
49 | * 4 = DBGU | ||
50 | */ | ||
51 | static struct at91_uart_config __initdata picotux200_uart_config = { | ||
52 | .console_tty = 0, /* ttyS0 */ | ||
53 | .nr_tty = 2, | ||
54 | .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ | ||
55 | }; | ||
56 | |||
57 | static void __init picotux200_map_io(void) | 46 | static void __init picotux200_map_io(void) |
58 | { | 47 | { |
59 | /* Initialize processor: 18.432 MHz crystal */ | 48 | /* Initialize processor: 18.432 MHz crystal */ |
60 | at91rm9200_initialize(18432000, AT91RM9200_BGA); | 49 | at91rm9200_initialize(18432000, AT91RM9200_BGA); |
61 | 50 | ||
62 | /* Setup the serial ports and console */ | 51 | /* DBGU on ttyS0. (Rx & Tx only) */ |
63 | at91_init_serial(&picotux200_uart_config); | 52 | at91_register_uart(0, 0, 0); |
53 | |||
54 | /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | ||
55 | at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | ||
56 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD | ||
57 | | ATMEL_UART_RI); | ||
58 | |||
59 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
60 | at91_set_serial_console(0); | ||
64 | } | 61 | } |
65 | 62 | ||
66 | static void __init picotux200_init_irq(void) | 63 | static void __init picotux200_init_irq(void) |
@@ -77,11 +74,6 @@ static struct at91_usbh_data __initdata picotux200_usbh_data = { | |||
77 | .ports = 1, | 74 | .ports = 1, |
78 | }; | 75 | }; |
79 | 76 | ||
80 | // static struct at91_udc_data __initdata picotux200_udc_data = { | ||
81 | // .vbus_pin = AT91_PIN_PD4, | ||
82 | // .pullup_pin = AT91_PIN_PD5, | ||
83 | // }; | ||
84 | |||
85 | static struct at91_mmc_data __initdata picotux200_mmc_data = { | 77 | static struct at91_mmc_data __initdata picotux200_mmc_data = { |
86 | .det_pin = AT91_PIN_PB27, | 78 | .det_pin = AT91_PIN_PB27, |
87 | .slot_b = 0, | 79 | .slot_b = 0, |
@@ -89,21 +81,6 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = { | |||
89 | .wp_pin = AT91_PIN_PA17, | 81 | .wp_pin = AT91_PIN_PA17, |
90 | }; | 82 | }; |
91 | 83 | ||
92 | // static struct spi_board_info picotux200_spi_devices[] = { | ||
93 | // { /* DataFlash chip */ | ||
94 | // .modalias = "mtd_dataflash", | ||
95 | // .chip_select = 0, | ||
96 | // .max_speed_hz = 15 * 1000 * 1000, | ||
97 | // }, | ||
98 | // #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
99 | // { /* DataFlash card */ | ||
100 | // .modalias = "mtd_dataflash", | ||
101 | // .chip_select = 3, | ||
102 | // .max_speed_hz = 15 * 1000 * 1000, | ||
103 | // }, | ||
104 | // #endif | ||
105 | // }; | ||
106 | |||
107 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 | 84 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 |
108 | #define PICOTUX200_FLASH_SIZE SZ_4M | 85 | #define PICOTUX200_FLASH_SIZE SZ_4M |
109 | 86 | ||
@@ -135,21 +112,11 @@ static void __init picotux200_board_init(void) | |||
135 | at91_add_device_eth(&picotux200_eth_data); | 112 | at91_add_device_eth(&picotux200_eth_data); |
136 | /* USB Host */ | 113 | /* USB Host */ |
137 | at91_add_device_usbh(&picotux200_usbh_data); | 114 | at91_add_device_usbh(&picotux200_usbh_data); |
138 | /* USB Device */ | ||
139 | // at91_add_device_udc(&picotux200_udc_data); | ||
140 | // at91_set_multi_drive(picotux200_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */ | ||
141 | /* I2C */ | 115 | /* I2C */ |
142 | at91_add_device_i2c(NULL, 0); | 116 | at91_add_device_i2c(NULL, 0); |
143 | /* SPI */ | ||
144 | // at91_add_device_spi(picotux200_spi_devices, ARRAY_SIZE(picotux200_spi_devices)); | ||
145 | #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
146 | /* DataFlash card */ | ||
147 | at91_set_gpio_output(AT91_PIN_PB22, 0); | ||
148 | #else | ||
149 | /* MMC */ | 117 | /* MMC */ |
150 | at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ | 118 | at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ |
151 | at91_add_device_mmc(0, &picotux200_mmc_data); | 119 | at91_add_device_mmc(0, &picotux200_mmc_data); |
152 | #endif | ||
153 | /* NOR Flash */ | 120 | /* NOR Flash */ |
154 | platform_device_register(&picotux200_flash); | 121 | platform_device_register(&picotux200_flash); |
155 | } | 122 | } |
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-rm9200dk.c index e14f0e165680..4c1047c8200d 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-at91/board-dk.c | 2 | * linux/arch/arm/mach-at91/board-rm9200dk.c |
3 | * | 3 | * |
4 | * Copyright (C) 2005 SAN People | 4 | * Copyright (C) 2005 SAN People |
5 | * | 5 | * |
@@ -91,10 +91,12 @@ static struct at91_cf_data __initdata dk_cf_data = { | |||
91 | // .vcc_pin = ... always powered | 91 | // .vcc_pin = ... always powered |
92 | }; | 92 | }; |
93 | 93 | ||
94 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
94 | static struct at91_mmc_data __initdata dk_mmc_data = { | 95 | static struct at91_mmc_data __initdata dk_mmc_data = { |
95 | .slot_b = 0, | 96 | .slot_b = 0, |
96 | .wire4 = 1, | 97 | .wire4 = 1, |
97 | }; | 98 | }; |
99 | #endif | ||
98 | 100 | ||
99 | static struct spi_board_info dk_spi_devices[] = { | 101 | static struct spi_board_info dk_spi_devices[] = { |
100 | { /* DataFlash chip */ | 102 | { /* DataFlash chip */ |
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 56e92c4bbc2a..9df1be8818c0 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-at91/board-ek.c | 2 | * linux/arch/arm/mach-at91/board-rm9200ek.c |
3 | * | 3 | * |
4 | * Copyright (C) 2005 SAN People | 4 | * Copyright (C) 2005 SAN People |
5 | * | 5 | * |
@@ -84,12 +84,14 @@ static struct at91_udc_data __initdata ek_udc_data = { | |||
84 | .pullup_pin = AT91_PIN_PD5, | 84 | .pullup_pin = AT91_PIN_PD5, |
85 | }; | 85 | }; |
86 | 86 | ||
87 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD | ||
87 | static struct at91_mmc_data __initdata ek_mmc_data = { | 88 | static struct at91_mmc_data __initdata ek_mmc_data = { |
88 | .det_pin = AT91_PIN_PB27, | 89 | .det_pin = AT91_PIN_PB27, |
89 | .slot_b = 0, | 90 | .slot_b = 0, |
90 | .wire4 = 1, | 91 | .wire4 = 1, |
91 | .wp_pin = AT91_PIN_PA17, | 92 | .wp_pin = AT91_PIN_PA17, |
92 | }; | 93 | }; |
94 | #endif | ||
93 | 95 | ||
94 | static struct spi_board_info ek_spi_devices[] = { | 96 | static struct spi_board_info ek_spi_devices[] = { |
95 | { /* DataFlash chip */ | 97 | { /* DataFlash chip */ |
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 5206eef4a67e..f8902b118960 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include "generic.h" | 32 | #include "generic.h" |
33 | 33 | ||
34 | 34 | ||
35 | static void __init portuxg20_map_io(void) | 35 | void __init stamp9g20_map_io(void) |
36 | { | 36 | { |
37 | /* Initialize processor: 18.432 MHz crystal */ | 37 | /* Initialize processor: 18.432 MHz crystal */ |
38 | at91sam9260_initialize(18432000); | 38 | at91sam9260_initialize(18432000); |
@@ -40,6 +40,24 @@ static void __init portuxg20_map_io(void) | |||
40 | /* DGBU on ttyS0. (Rx & Tx only) */ | 40 | /* DGBU on ttyS0. (Rx & Tx only) */ |
41 | at91_register_uart(0, 0, 0); | 41 | at91_register_uart(0, 0, 0); |
42 | 42 | ||
43 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
44 | at91_set_serial_console(0); | ||
45 | } | ||
46 | |||
47 | static void __init stamp9g20evb_map_io(void) | ||
48 | { | ||
49 | stamp9g20_map_io(); | ||
50 | |||
51 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | ||
52 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | ||
53 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ||
54 | | ATMEL_UART_DCD | ATMEL_UART_RI); | ||
55 | } | ||
56 | |||
57 | static void __init portuxg20_map_io(void) | ||
58 | { | ||
59 | stamp9g20_map_io(); | ||
60 | |||
43 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | 61 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ |
44 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | 62 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS |
45 | | ATMEL_UART_DTR | ATMEL_UART_DSR | 63 | | ATMEL_UART_DTR | ATMEL_UART_DSR |
@@ -56,26 +74,6 @@ static void __init portuxg20_map_io(void) | |||
56 | 74 | ||
57 | /* USART5 on ttyS6. (Rx, Tx only) */ | 75 | /* USART5 on ttyS6. (Rx, Tx only) */ |
58 | at91_register_uart(AT91SAM9260_ID_US5, 6, 0); | 76 | at91_register_uart(AT91SAM9260_ID_US5, 6, 0); |
59 | |||
60 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
61 | at91_set_serial_console(0); | ||
62 | } | ||
63 | |||
64 | static void __init stamp9g20_map_io(void) | ||
65 | { | ||
66 | /* Initialize processor: 18.432 MHz crystal */ | ||
67 | at91sam9260_initialize(18432000); | ||
68 | |||
69 | /* DGBU on ttyS0. (Rx & Tx only) */ | ||
70 | at91_register_uart(0, 0, 0); | ||
71 | |||
72 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ | ||
73 | at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS | ||
74 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ||
75 | | ATMEL_UART_DCD | ATMEL_UART_RI); | ||
76 | |||
77 | /* set serial console to ttyS0 (ie, DBGU) */ | ||
78 | at91_set_serial_console(0); | ||
79 | } | 77 | } |
80 | 78 | ||
81 | static void __init init_irq(void) | 79 | static void __init init_irq(void) |
@@ -156,7 +154,7 @@ static struct at91_udc_data __initdata portuxg20_udc_data = { | |||
156 | .pullup_pin = 0, /* pull-up driven by UDC */ | 154 | .pullup_pin = 0, /* pull-up driven by UDC */ |
157 | }; | 155 | }; |
158 | 156 | ||
159 | static struct at91_udc_data __initdata stamp9g20_udc_data = { | 157 | static struct at91_udc_data __initdata stamp9g20evb_udc_data = { |
160 | .vbus_pin = AT91_PIN_PA22, | 158 | .vbus_pin = AT91_PIN_PA22, |
161 | .pullup_pin = 0, /* pull-up driven by UDC */ | 159 | .pullup_pin = 0, /* pull-up driven by UDC */ |
162 | }; | 160 | }; |
@@ -190,7 +188,7 @@ static struct gpio_led portuxg20_leds[] = { | |||
190 | } | 188 | } |
191 | }; | 189 | }; |
192 | 190 | ||
193 | static struct gpio_led stamp9g20_leds[] = { | 191 | static struct gpio_led stamp9g20evb_leds[] = { |
194 | { | 192 | { |
195 | .name = "D8", | 193 | .name = "D8", |
196 | .gpio = AT91_PIN_PB18, | 194 | .gpio = AT91_PIN_PB18, |
@@ -250,7 +248,7 @@ void add_w1(void) | |||
250 | } | 248 | } |
251 | 249 | ||
252 | 250 | ||
253 | static void __init generic_board_init(void) | 251 | void __init stamp9g20_board_init(void) |
254 | { | 252 | { |
255 | /* Serial */ | 253 | /* Serial */ |
256 | at91_add_device_serial(); | 254 | at91_add_device_serial(); |
@@ -262,34 +260,40 @@ static void __init generic_board_init(void) | |||
262 | #else | 260 | #else |
263 | at91_add_device_mmc(0, &mmc_data); | 261 | at91_add_device_mmc(0, &mmc_data); |
264 | #endif | 262 | #endif |
265 | /* USB Host */ | ||
266 | at91_add_device_usbh(&usbh_data); | ||
267 | /* Ethernet */ | ||
268 | at91_add_device_eth(&macb_data); | ||
269 | /* I2C */ | ||
270 | at91_add_device_i2c(NULL, 0); | ||
271 | /* W1 */ | 263 | /* W1 */ |
272 | add_w1(); | 264 | add_w1(); |
273 | } | 265 | } |
274 | 266 | ||
275 | static void __init portuxg20_board_init(void) | 267 | static void __init portuxg20_board_init(void) |
276 | { | 268 | { |
277 | generic_board_init(); | 269 | stamp9g20_board_init(); |
278 | /* SPI */ | 270 | /* USB Host */ |
279 | at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices)); | 271 | at91_add_device_usbh(&usbh_data); |
280 | /* USB Device */ | 272 | /* USB Device */ |
281 | at91_add_device_udc(&portuxg20_udc_data); | 273 | at91_add_device_udc(&portuxg20_udc_data); |
274 | /* Ethernet */ | ||
275 | at91_add_device_eth(&macb_data); | ||
276 | /* I2C */ | ||
277 | at91_add_device_i2c(NULL, 0); | ||
278 | /* SPI */ | ||
279 | at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices)); | ||
282 | /* LEDs */ | 280 | /* LEDs */ |
283 | at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds)); | 281 | at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds)); |
284 | } | 282 | } |
285 | 283 | ||
286 | static void __init stamp9g20_board_init(void) | 284 | static void __init stamp9g20evb_board_init(void) |
287 | { | 285 | { |
288 | generic_board_init(); | 286 | stamp9g20_board_init(); |
287 | /* USB Host */ | ||
288 | at91_add_device_usbh(&usbh_data); | ||
289 | /* USB Device */ | 289 | /* USB Device */ |
290 | at91_add_device_udc(&stamp9g20_udc_data); | 290 | at91_add_device_udc(&stamp9g20evb_udc_data); |
291 | /* Ethernet */ | ||
292 | at91_add_device_eth(&macb_data); | ||
293 | /* I2C */ | ||
294 | at91_add_device_i2c(NULL, 0); | ||
291 | /* LEDs */ | 295 | /* LEDs */ |
292 | at91_gpio_leds(stamp9g20_leds, ARRAY_SIZE(stamp9g20_leds)); | 296 | at91_gpio_leds(stamp9g20evb_leds, ARRAY_SIZE(stamp9g20evb_leds)); |
293 | } | 297 | } |
294 | 298 | ||
295 | MACHINE_START(PORTUXG20, "taskit PortuxG20") | 299 | MACHINE_START(PORTUXG20, "taskit PortuxG20") |
@@ -305,7 +309,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") | |||
305 | /* Maintainer: taskit GmbH */ | 309 | /* Maintainer: taskit GmbH */ |
306 | .boot_params = AT91_SDRAM_BASE + 0x100, | 310 | .boot_params = AT91_SDRAM_BASE + 0x100, |
307 | .timer = &at91sam926x_timer, | 311 | .timer = &at91sam926x_timer, |
308 | .map_io = stamp9g20_map_io, | 312 | .map_io = stamp9g20evb_map_io, |
309 | .init_irq = init_irq, | 313 | .init_irq = init_irq, |
310 | .init_machine = stamp9g20_board_init, | 314 | .init_machine = stamp9g20evb_board_init, |
311 | MACHINE_END | 315 | MACHINE_END |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 89df00a9d2f7..e0f0080eb639 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -387,7 +387,7 @@ static struct spi_board_info yl9200_spi_devices[] = { | |||
387 | * EPSON S1D13806 FB (discontinued chip) | 387 | * EPSON S1D13806 FB (discontinued chip) |
388 | * EPSON S1D13506 FB | 388 | * EPSON S1D13506 FB |
389 | */ | 389 | */ |
390 | #if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) | 390 | #if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE) |
391 | #include <video/s1d13xxxfb.h> | 391 | #include <video/s1d13xxxfb.h> |
392 | 392 | ||
393 | 393 | ||
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 7525cee3983f..9113da6845f1 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -658,7 +658,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock) | |||
658 | /* Now set uhpck values */ | 658 | /* Now set uhpck values */ |
659 | uhpck.parent = &utmi_clk; | 659 | uhpck.parent = &utmi_clk; |
660 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; | 660 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; |
661 | uhpck.rate_hz = utmi_clk.parent->rate_hz; | 661 | uhpck.rate_hz = utmi_clk.rate_hz; |
662 | uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); | 662 | uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); |
663 | } | 663 | } |
664 | 664 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h index 57f8ee154943..27ac6f550fe3 100644 --- a/arch/arm/mach-at91/include/mach/at91_mci.h +++ b/arch/arm/mach-at91/include/mach/at91_mci.h | |||
@@ -74,6 +74,8 @@ | |||
74 | #define AT91_MCI_TRTYP_BLOCK (0 << 19) | 74 | #define AT91_MCI_TRTYP_BLOCK (0 << 19) |
75 | #define AT91_MCI_TRTYP_MULTIPLE (1 << 19) | 75 | #define AT91_MCI_TRTYP_MULTIPLE (1 << 19) |
76 | #define AT91_MCI_TRTYP_STREAM (2 << 19) | 76 | #define AT91_MCI_TRTYP_STREAM (2 << 19) |
77 | #define AT91_MCI_TRTYP_SDIO_BYTE (4 << 19) | ||
78 | #define AT91_MCI_TRTYP_SDIO_BLOCK (5 << 19) | ||
77 | 79 | ||
78 | #define AT91_MCI_BLKR 0x18 /* Block Register */ | 80 | #define AT91_MCI_BLKR 0x18 /* Block Register */ |
79 | #define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ | 81 | #define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 58528aa9c8a8..2b499eb343a1 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -137,13 +137,7 @@ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_de | |||
137 | extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); | 137 | extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); |
138 | extern void __init at91_set_serial_console(unsigned portnr); | 138 | extern void __init at91_set_serial_console(unsigned portnr); |
139 | 139 | ||
140 | struct at91_uart_config { | ||
141 | unsigned short console_tty; /* tty number of serial console */ | ||
142 | unsigned short nr_tty; /* number of serial tty's */ | ||
143 | short tty_map[]; /* map UART to tty number */ | ||
144 | }; | ||
145 | extern struct platform_device *atmel_default_console_device; | 140 | extern struct platform_device *atmel_default_console_device; |
146 | extern void __init __deprecated at91_init_serial(struct at91_uart_config *config); | ||
147 | 141 | ||
148 | struct atmel_uart_data { | 142 | struct atmel_uart_data { |
149 | short use_dma_tx; /* use transmit DMA? */ | 143 | short use_dma_tx; /* use transmit DMA? */ |
diff --git a/arch/arm/mach-at91/include/mach/stamp9g20.h b/arch/arm/mach-at91/include/mach/stamp9g20.h new file mode 100644 index 000000000000..6120f9c46d59 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/stamp9g20.h | |||
@@ -0,0 +1,7 @@ | |||
1 | #ifndef __MACH_STAMP9G20_H | ||
2 | #define __MACH_STAMP9G20_H | ||
3 | |||
4 | void stamp9g20_map_io(void); | ||
5 | void stamp9g20_board_init(void); | ||
6 | |||
7 | #endif | ||
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 9ca4d581016f..da30078a80c1 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -69,13 +69,10 @@ void __init cns3xxx_map_io(void) | |||
69 | } | 69 | } |
70 | 70 | ||
71 | /* used by entry-macro.S */ | 71 | /* used by entry-macro.S */ |
72 | void __iomem *gic_cpu_base_addr; | ||
73 | |||
74 | void __init cns3xxx_init_irq(void) | 72 | void __init cns3xxx_init_irq(void) |
75 | { | 73 | { |
76 | gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT); | 74 | gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), |
77 | gic_dist_init(0, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 29); | 75 | __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT)); |
78 | gic_cpu_init(0, gic_cpu_base_addr); | ||
79 | } | 76 | } |
80 | 77 | ||
81 | void cns3xxx_power_off(void) | 78 | void cns3xxx_power_off(void) |
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index 6b33ec11346e..ef9e5116b1a9 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h | |||
@@ -11,7 +11,6 @@ | |||
11 | #ifndef __CNS3XXX_CORE_H | 11 | #ifndef __CNS3XXX_CORE_H |
12 | #define __CNS3XXX_CORE_H | 12 | #define __CNS3XXX_CORE_H |
13 | 13 | ||
14 | extern void __iomem *gic_cpu_base_addr; | ||
15 | extern struct sys_timer cns3xxx_timer; | 14 | extern struct sys_timer cns3xxx_timer; |
16 | 15 | ||
17 | void __init cns3xxx_map_io(void); | 16 | void __init cns3xxx_map_io(void); |
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S index 5e1c5545680f..6bd83ed90afe 100644 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S | |||
@@ -9,74 +9,10 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <mach/hardware.h> | 11 | #include <mach/hardware.h> |
12 | #include <asm/hardware/gic.h> | 12 | #include <asm/hardware/entry-macro-gic.S> |
13 | 13 | ||
14 | .macro disable_fiq | 14 | .macro disable_fiq |
15 | .endm | 15 | .endm |
16 | 16 | ||
17 | .macro get_irqnr_preamble, base, tmp | ||
18 | ldr \base, =gic_cpu_base_addr | ||
19 | ldr \base, [\base] | ||
20 | .endm | ||
21 | |||
22 | .macro arch_ret_to_user, tmp1, tmp2 | 17 | .macro arch_ret_to_user, tmp1, tmp2 |
23 | .endm | 18 | .endm |
24 | |||
25 | /* | ||
26 | * The interrupt numbering scheme is defined in the | ||
27 | * interrupt controller spec. To wit: | ||
28 | * | ||
29 | * Interrupts 0-15 are IPI | ||
30 | * 16-28 are reserved | ||
31 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
32 | * 32-1020 are global | ||
33 | * 1021-1022 are reserved | ||
34 | * 1023 is "spurious" (no interrupt) | ||
35 | * | ||
36 | * For now, we ignore all local interrupts so only return an interrupt if it's | ||
37 | * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | ||
38 | * | ||
39 | * A simple read from the controller will tell us the number of the highest | ||
40 | * priority enabled interrupt. We then just need to check whether it is in the | ||
41 | * valid range for an IRQ (30-1020 inclusive). | ||
42 | */ | ||
43 | |||
44 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
45 | |||
46 | ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ | ||
47 | |||
48 | ldr \tmp, =1021 | ||
49 | |||
50 | bic \irqnr, \irqstat, #0x1c00 | ||
51 | |||
52 | cmp \irqnr, #29 | ||
53 | cmpcc \irqnr, \irqnr | ||
54 | cmpne \irqnr, \tmp | ||
55 | cmpcs \irqnr, \irqnr | ||
56 | |||
57 | .endm | ||
58 | |||
59 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
60 | * register) is preserved from the macro above. | ||
61 | * If there is an IPI, we immediately signal end of interrupt on the | ||
62 | * controller, since this requires the original irqstat value which | ||
63 | * we won't easily be able to recreate later. | ||
64 | */ | ||
65 | |||
66 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
67 | bic \irqnr, \irqstat, #0x1c00 | ||
68 | cmp \irqnr, #16 | ||
69 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
70 | cmpcs \irqnr, \irqnr | ||
71 | .endm | ||
72 | |||
73 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
74 | |||
75 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
76 | bic \irqnr, \irqstat, #0x1c00 | ||
77 | mov \tmp, #0 | ||
78 | cmp \irqnr, #29 | ||
79 | moveq \tmp, #1 | ||
80 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
81 | cmp \tmp, #0 | ||
82 | .endm | ||
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c index 38088c36936c..78defd71a829 100644 --- a/arch/arm/mach-cns3xxx/pcie.c +++ b/arch/arm/mach-cns3xxx/pcie.c | |||
@@ -369,7 +369,7 @@ static int __init cns3xxx_pcie_init(void) | |||
369 | { | 369 | { |
370 | int i; | 370 | int i; |
371 | 371 | ||
372 | hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, | 372 | hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0, |
373 | "imprecise external abort"); | 373 | "imprecise external abort"); |
374 | 374 | ||
375 | for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { | 375 | for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) { |
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h index 62b0a90309ad..d1b954955c12 100644 --- a/arch/arm/mach-davinci/include/mach/io.h +++ b/arch/arm/mach-davinci/include/mach/io.h | |||
@@ -22,8 +22,8 @@ | |||
22 | #define __mem_isa(a) (a) | 22 | #define __mem_isa(a) (a) |
23 | 23 | ||
24 | #ifndef __ASSEMBLER__ | 24 | #ifndef __ASSEMBLER__ |
25 | #define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t) | 25 | #define __arch_ioremap davinci_ioremap |
26 | #define __arch_iounmap(v) davinci_iounmap(v) | 26 | #define __arch_iounmap davinci_iounmap |
27 | 27 | ||
28 | void __iomem *davinci_ioremap(unsigned long phys, size_t size, | 28 | void __iomem *davinci_ioremap(unsigned long phys, size_t size, |
29 | unsigned int type); | 29 | unsigned int type); |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 6258c90d020c..1713ecf0c95f 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -41,7 +41,7 @@ | |||
41 | #include <asm/mach/map.h> | 41 | #include <asm/mach/map.h> |
42 | #include <asm/mach/time.h> | 42 | #include <asm/mach/time.h> |
43 | 43 | ||
44 | #include <plat/timer-sp.h> | 44 | #include <asm/hardware/timer-sp.h> |
45 | 45 | ||
46 | #include "common.h" | 46 | #include "common.h" |
47 | 47 | ||
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h index a6e0f9e6ddcf..dffb234bb967 100644 --- a/arch/arm/mach-iop13xx/include/mach/io.h +++ b/arch/arm/mach-iop13xx/include/mach/io.h | |||
@@ -35,7 +35,7 @@ extern u32 iop13xx_atux_mem_base; | |||
35 | extern size_t iop13xx_atue_mem_size; | 35 | extern size_t iop13xx_atue_mem_size; |
36 | extern size_t iop13xx_atux_mem_size; | 36 | extern size_t iop13xx_atux_mem_size; |
37 | 37 | ||
38 | #define __arch_ioremap(a, s, f) __iop13xx_ioremap(a, s, f) | 38 | #define __arch_ioremap __iop13xx_ioremap |
39 | #define __arch_iounmap(a) __iop13xx_iounmap(a) | 39 | #define __arch_iounmap __iop13xx_iounmap |
40 | 40 | ||
41 | #endif | 41 | #endif |
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h index 339e5854728b..059c783ce0b2 100644 --- a/arch/arm/mach-iop32x/include/mach/io.h +++ b/arch/arm/mach-iop32x/include/mach/io.h | |||
@@ -21,7 +21,7 @@ extern void __iop3xx_iounmap(void __iomem *addr); | |||
21 | #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) | 21 | #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) |
22 | #define __mem_pci(a) (a) | 22 | #define __mem_pci(a) (a) |
23 | 23 | ||
24 | #define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f) | 24 | #define __arch_ioremap __iop3xx_ioremap |
25 | #define __arch_iounmap(a) __iop3xx_iounmap(a) | 25 | #define __arch_iounmap __iop3xx_iounmap |
26 | 26 | ||
27 | #endif | 27 | #endif |
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h index e99a7ed6d050..39e893e97c21 100644 --- a/arch/arm/mach-iop33x/include/mach/io.h +++ b/arch/arm/mach-iop33x/include/mach/io.h | |||
@@ -21,7 +21,7 @@ extern void __iop3xx_iounmap(void __iomem *addr); | |||
21 | #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) | 21 | #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) |
22 | #define __mem_pci(a) (a) | 22 | #define __mem_pci(a) (a) |
23 | 23 | ||
24 | #define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f) | 24 | #define __arch_ioremap __iop3xx_ioremap |
25 | #define __arch_iounmap(a) __iop3xx_iounmap(a) | 25 | #define __arch_iounmap __iop3xx_iounmap |
26 | 26 | ||
27 | #endif | 27 | #endif |
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h index fd9ef8e519f7..a1749d0fd896 100644 --- a/arch/arm/mach-ixp23xx/include/mach/io.h +++ b/arch/arm/mach-ixp23xx/include/mach/io.h | |||
@@ -45,8 +45,8 @@ ixp23xx_iounmap(void __iomem *addr) | |||
45 | __iounmap(addr); | 45 | __iounmap(addr); |
46 | } | 46 | } |
47 | 47 | ||
48 | #define __arch_ioremap(a,s,f) ixp23xx_ioremap(a,s,f) | 48 | #define __arch_ioremap ixp23xx_ioremap |
49 | #define __arch_iounmap(a) ixp23xx_iounmap(a) | 49 | #define __arch_iounmap ixp23xx_iounmap |
50 | 50 | ||
51 | 51 | ||
52 | #endif | 52 | #endif |
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 24498a932ba6..a54b3db80366 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -513,4 +513,4 @@ int dma_set_coherent_mask(struct device *dev, u64 mask) | |||
513 | 513 | ||
514 | EXPORT_SYMBOL(ixp4xx_pci_read); | 514 | EXPORT_SYMBOL(ixp4xx_pci_read); |
515 | EXPORT_SYMBOL(ixp4xx_pci_write); | 515 | EXPORT_SYMBOL(ixp4xx_pci_write); |
516 | 516 | EXPORT_SYMBOL(dma_set_coherent_mask); | |
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index de274a1f19d7..57b5410c31f4 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h | |||
@@ -74,8 +74,8 @@ static inline void __indirect_iounmap(void __iomem *addr) | |||
74 | __iounmap(addr); | 74 | __iounmap(addr); |
75 | } | 75 | } |
76 | 76 | ||
77 | #define __arch_ioremap(a, s, f) __indirect_ioremap(a, s, f) | 77 | #define __arch_ioremap __indirect_ioremap |
78 | #define __arch_iounmap(a) __indirect_iounmap(a) | 78 | #define __arch_iounmap __indirect_iounmap |
79 | 79 | ||
80 | #define writeb(v, p) __indirect_writeb(v, p) | 80 | #define writeb(v, p) __indirect_writeb(v, p) |
81 | #define writew(v, p) __indirect_writew(v, p) | 81 | #define writew(v, p) __indirect_writew(v, p) |
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h index 44e8be04f259..1aaddc364f2e 100644 --- a/arch/arm/mach-kirkwood/include/mach/io.h +++ b/arch/arm/mach-kirkwood/include/mach/io.h | |||
@@ -42,8 +42,8 @@ __arch_iounmap(void __iomem *addr) | |||
42 | __iounmap(addr); | 42 | __iounmap(addr); |
43 | } | 43 | } |
44 | 44 | ||
45 | #define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m) | 45 | #define __arch_ioremap __arch_ioremap |
46 | #define __arch_iounmap(a) __arch_iounmap(a) | 46 | #define __arch_iounmap __arch_iounmap |
47 | #define __io(a) __io(a) | 47 | #define __io(a) __io(a) |
48 | #define __mem_pci(a) (a) | 48 | #define __mem_pci(a) (a) |
49 | 49 | ||
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c index daf3993349f8..2e3dd08ccc3f 100644 --- a/arch/arm/mach-mmp/mmp2.c +++ b/arch/arm/mach-mmp/mmp2.c | |||
@@ -126,7 +126,6 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000); | |||
126 | static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); | 126 | static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); |
127 | static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); | 127 | static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); |
128 | static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); | 128 | static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); |
129 | static APBC_CLK(rtc, MMP2_RTC, 0, 32768); | ||
130 | 129 | ||
131 | static APMU_CLK(nand, NAND, 0xbf, 100000000); | 130 | static APMU_CLK(nand, NAND, 0xbf, 100000000); |
132 | 131 | ||
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 7486a681cc71..9b5eb2b4ae1b 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c | |||
@@ -28,8 +28,6 @@ | |||
28 | #include <mach/board.h> | 28 | #include <mach/board.h> |
29 | #include <mach/msm_iomap.h> | 29 | #include <mach/msm_iomap.h> |
30 | 30 | ||
31 | void __iomem *gic_cpu_base_addr; | ||
32 | |||
33 | unsigned long clk_get_max_axi_khz(void) | 31 | unsigned long clk_get_max_axi_khz(void) |
34 | { | 32 | { |
35 | return 0; | 33 | return 0; |
@@ -44,9 +42,8 @@ static void __init msm8x60_init_irq(void) | |||
44 | { | 42 | { |
45 | unsigned int i; | 43 | unsigned int i; |
46 | 44 | ||
47 | gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START); | 45 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, |
48 | gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; | 46 | (void *)MSM_QGIC_CPU_BASE); |
49 | gic_cpu_init(0, MSM_QGIC_CPU_BASE); | ||
50 | 47 | ||
51 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ | 48 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ |
52 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); | 49 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 86c9b2102952..9db9203667df 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
@@ -216,7 +216,7 @@ static struct omap2_hsmmc_info mmc[] __initdata = { | |||
216 | { | 216 | { |
217 | .name = "wl1271", | 217 | .name = "wl1271", |
218 | .mmc = 3, | 218 | .mmc = 3, |
219 | .caps = MMC_CAP_4_BIT_DATA, | 219 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, |
220 | .gpio_wp = -EINVAL, | 220 | .gpio_wp = -EINVAL, |
221 | .gpio_cd = -EINVAL, | 221 | .gpio_cd = -EINVAL, |
222 | .nonremovable = true, | 222 | .nonremovable = true, |
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 06e64e1fc28a..d54c4f89a8bd 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S | |||
@@ -105,6 +105,35 @@ omap_irq_base: .word 0 | |||
105 | 9999: | 105 | 9999: |
106 | .endm | 106 | .endm |
107 | 107 | ||
108 | #ifdef CONFIG_SMP | ||
109 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
110 | * register) is preserved from the macro above. | ||
111 | * If there is an IPI, we immediately signal end of interrupt | ||
112 | * on the controller, since this requires the original irqstat | ||
113 | * value which we won't easily be able to recreate later. | ||
114 | */ | ||
115 | |||
116 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
117 | bic \irqnr, \irqstat, #0x1c00 | ||
118 | cmp \irqnr, #16 | ||
119 | it cc | ||
120 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
121 | it cs | ||
122 | cmpcs \irqnr, \irqnr | ||
123 | .endm | ||
124 | |||
125 | /* As above, this assumes that irqstat and base are preserved */ | ||
126 | |||
127 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
128 | bic \irqnr, \irqstat, #0x1c00 | ||
129 | mov \tmp, #0 | ||
130 | cmp \irqnr, #29 | ||
131 | itt eq | ||
132 | moveq \tmp, #1 | ||
133 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
134 | cmp \tmp, #0 | ||
135 | .endm | ||
136 | #endif /* CONFIG_SMP */ | ||
108 | 137 | ||
109 | #else /* MULTI_OMAP2 */ | 138 | #else /* MULTI_OMAP2 */ |
110 | 139 | ||
@@ -141,74 +170,16 @@ omap_irq_base: .word 0 | |||
141 | 170 | ||
142 | 171 | ||
143 | #ifdef CONFIG_ARCH_OMAP4 | 172 | #ifdef CONFIG_ARCH_OMAP4 |
173 | #define HAVE_GET_IRQNR_PREAMBLE | ||
174 | #include <asm/hardware/entry-macro-gic.S> | ||
144 | 175 | ||
145 | .macro get_irqnr_preamble, base, tmp | 176 | .macro get_irqnr_preamble, base, tmp |
146 | ldr \base, =OMAP4_IRQ_BASE | 177 | ldr \base, =OMAP4_IRQ_BASE |
147 | .endm | 178 | .endm |
148 | 179 | ||
149 | /* | ||
150 | * The interrupt numbering scheme is defined in the | ||
151 | * interrupt controller spec. To wit: | ||
152 | * | ||
153 | * Interrupts 0-15 are IPI | ||
154 | * 16-28 are reserved | ||
155 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
156 | * 32-1020 are global | ||
157 | * 1021-1022 are reserved | ||
158 | * 1023 is "spurious" (no interrupt) | ||
159 | * | ||
160 | * For now, we ignore all local interrupts so only return an | ||
161 | * interrupt if it's between 30 and 1020. The test_for_ipi | ||
162 | * routine below will pick up on IPIs. | ||
163 | * A simple read from the controller will tell us the number | ||
164 | * of the highest priority enabled interrupt. | ||
165 | * We then just need to check whether it is in the | ||
166 | * valid range for an IRQ (30-1020 inclusive). | ||
167 | */ | ||
168 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
169 | ldr \irqstat, [\base, #GIC_CPU_INTACK] | ||
170 | |||
171 | ldr \tmp, =1021 | ||
172 | |||
173 | bic \irqnr, \irqstat, #0x1c00 | ||
174 | |||
175 | cmp \irqnr, #29 | ||
176 | cmpcc \irqnr, \irqnr | ||
177 | cmpne \irqnr, \tmp | ||
178 | cmpcs \irqnr, \irqnr | ||
179 | .endm | ||
180 | #endif | 180 | #endif |
181 | #endif /* MULTI_OMAP2 */ | ||
182 | |||
183 | #ifdef CONFIG_SMP | ||
184 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
185 | * register) is preserved from the macro above. | ||
186 | * If there is an IPI, we immediately signal end of interrupt | ||
187 | * on the controller, since this requires the original irqstat | ||
188 | * value which we won't easily be able to recreate later. | ||
189 | */ | ||
190 | 181 | ||
191 | .macro test_for_ipi, irqnr, irqstat, base, tmp | 182 | #endif /* MULTI_OMAP2 */ |
192 | bic \irqnr, \irqstat, #0x1c00 | ||
193 | cmp \irqnr, #16 | ||
194 | it cc | ||
195 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
196 | it cs | ||
197 | cmpcs \irqnr, \irqnr | ||
198 | .endm | ||
199 | |||
200 | /* As above, this assumes that irqstat and base are preserved */ | ||
201 | |||
202 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
203 | bic \irqnr, \irqstat, #0x1c00 | ||
204 | mov \tmp, #0 | ||
205 | cmp \irqnr, #29 | ||
206 | itt eq | ||
207 | moveq \tmp, #1 | ||
208 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
209 | cmp \tmp, #0 | ||
210 | .endm | ||
211 | #endif /* CONFIG_SMP */ | ||
212 | 183 | ||
213 | .macro irq_prio_table | 184 | .macro irq_prio_table |
214 | .endm | 185 | .endm |
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h index 2744dfee1ff4..5b0270b28934 100644 --- a/arch/arm/mach-omap2/include/mach/omap4-common.h +++ b/arch/arm/mach-omap2/include/mach/omap4-common.h | |||
@@ -24,7 +24,6 @@ | |||
24 | extern void __iomem *l2cache_base; | 24 | extern void __iomem *l2cache_base; |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | extern void __iomem *gic_cpu_base_addr; | ||
28 | extern void __iomem *gic_dist_base_addr; | 27 | extern void __iomem *gic_dist_base_addr; |
29 | 28 | ||
30 | extern void __init gic_init_irq(void); | 29 | extern void __init gic_init_irq(void); |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 40562ddd3ee4..a1939b1e6f82 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -297,7 +297,7 @@ static int __init _omap2_init_reprogram_sdrc(void) | |||
297 | return 0; | 297 | return 0; |
298 | 298 | ||
299 | dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck"); | 299 | dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck"); |
300 | if (!dpll3_m2_ck) | 300 | if (IS_ERR(dpll3_m2_ck)) |
301 | return -EINVAL; | 301 | return -EINVAL; |
302 | 302 | ||
303 | rate = clk_get_rate(dpll3_m2_ck); | 303 | rate = clk_get_rate(dpll3_m2_ck); |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 9e9f70e18e3c..9fbac2c39104 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -50,7 +50,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
50 | * core (e.g. timer irq), then they will not have been enabled | 50 | * core (e.g. timer irq), then they will not have been enabled |
51 | * for us: do so | 51 | * for us: do so |
52 | */ | 52 | */ |
53 | gic_cpu_init(0, gic_cpu_base_addr); | 53 | gic_secondary_init(0); |
54 | 54 | ||
55 | /* | 55 | /* |
56 | * Synchronise with the boot thread. | 56 | * Synchronise with the boot thread. |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 2f895553e6a8..666e852988d5 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -26,21 +26,22 @@ | |||
26 | void __iomem *l2cache_base; | 26 | void __iomem *l2cache_base; |
27 | #endif | 27 | #endif |
28 | 28 | ||
29 | void __iomem *gic_cpu_base_addr; | ||
30 | void __iomem *gic_dist_base_addr; | 29 | void __iomem *gic_dist_base_addr; |
31 | 30 | ||
32 | 31 | ||
33 | void __init gic_init_irq(void) | 32 | void __init gic_init_irq(void) |
34 | { | 33 | { |
34 | void __iomem *gic_cpu_base; | ||
35 | |||
35 | /* Static mapping, never released */ | 36 | /* Static mapping, never released */ |
36 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | 37 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); |
37 | BUG_ON(!gic_dist_base_addr); | 38 | BUG_ON(!gic_dist_base_addr); |
38 | gic_dist_init(0, gic_dist_base_addr, 29); | ||
39 | 39 | ||
40 | /* Static mapping, never released */ | 40 | /* Static mapping, never released */ |
41 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | 41 | gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); |
42 | BUG_ON(!gic_cpu_base_addr); | 42 | BUG_ON(!gic_cpu_base); |
43 | gic_cpu_init(0, gic_cpu_base_addr); | 43 | |
44 | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); | ||
44 | } | 45 | } |
45 | 46 | ||
46 | #ifdef CONFIG_CACHE_L2X0 | 47 | #ifdef CONFIG_CACHE_L2X0 |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 5e81517a7af2..a8afb610c7d8 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -161,6 +161,23 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) | |||
161 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); | 161 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); |
162 | } | 162 | } |
163 | 163 | ||
164 | void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) | ||
165 | { | ||
166 | u32 tick_rate, cycles; | ||
167 | |||
168 | if (!seconds && !milliseconds) | ||
169 | return; | ||
170 | |||
171 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); | ||
172 | cycles = tick_rate * seconds + tick_rate * milliseconds / 1000; | ||
173 | omap_dm_timer_stop(gptimer_wakeup); | ||
174 | omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles); | ||
175 | |||
176 | pr_info("PM: Resume timer in %u.%03u secs" | ||
177 | " (%d ticks at %d ticks/sec.)\n", | ||
178 | seconds, milliseconds, cycles, tick_rate); | ||
179 | } | ||
180 | |||
164 | #ifdef CONFIG_DEBUG_FS | 181 | #ifdef CONFIG_DEBUG_FS |
165 | #include <linux/debugfs.h> | 182 | #include <linux/debugfs.h> |
166 | #include <linux/seq_file.h> | 183 | #include <linux/seq_file.h> |
@@ -354,23 +371,6 @@ void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) | |||
354 | pwrdm->timer = t; | 371 | pwrdm->timer = t; |
355 | } | 372 | } |
356 | 373 | ||
357 | void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) | ||
358 | { | ||
359 | u32 tick_rate, cycles; | ||
360 | |||
361 | if (!seconds && !milliseconds) | ||
362 | return; | ||
363 | |||
364 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); | ||
365 | cycles = tick_rate * seconds + tick_rate * milliseconds / 1000; | ||
366 | omap_dm_timer_stop(gptimer_wakeup); | ||
367 | omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles); | ||
368 | |||
369 | pr_info("PM: Resume timer in %u.%03u secs" | ||
370 | " (%d ticks at %d ticks/sec.)\n", | ||
371 | seconds, milliseconds, cycles, tick_rate); | ||
372 | } | ||
373 | |||
374 | static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) | 374 | static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) |
375 | { | 375 | { |
376 | struct seq_file *s = (struct seq_file *)user; | 376 | struct seq_file *s = (struct seq_file *)user; |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index a40457d81927..aaeea49b9bdd 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/irq.h> | 30 | #include <linux/irq.h> |
31 | #include <linux/time.h> | 31 | #include <linux/time.h> |
32 | #include <linux/gpio.h> | 32 | #include <linux/gpio.h> |
33 | #include <linux/console.h> | ||
33 | 34 | ||
34 | #include <asm/mach/time.h> | 35 | #include <asm/mach/time.h> |
35 | #include <asm/mach/irq.h> | 36 | #include <asm/mach/irq.h> |
@@ -52,6 +53,19 @@ | |||
52 | #include <plat/powerdomain.h> | 53 | #include <plat/powerdomain.h> |
53 | #include <plat/clockdomain.h> | 54 | #include <plat/clockdomain.h> |
54 | 55 | ||
56 | #ifdef CONFIG_SUSPEND | ||
57 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | ||
58 | static inline bool is_suspending(void) | ||
59 | { | ||
60 | return (suspend_state != PM_SUSPEND_ON); | ||
61 | } | ||
62 | #else | ||
63 | static inline bool is_suspending(void) | ||
64 | { | ||
65 | return false; | ||
66 | } | ||
67 | #endif | ||
68 | |||
55 | static void (*omap2_sram_idle)(void); | 69 | static void (*omap2_sram_idle)(void); |
56 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, | 70 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, |
57 | void __iomem *sdrc_power); | 71 | void __iomem *sdrc_power); |
@@ -118,6 +132,11 @@ static void omap2_enter_full_retention(void) | |||
118 | if (omap_irq_pending()) | 132 | if (omap_irq_pending()) |
119 | goto no_sleep; | 133 | goto no_sleep; |
120 | 134 | ||
135 | /* Block console output in case it is on one of the OMAP UARTs */ | ||
136 | if (!is_suspending()) | ||
137 | if (try_acquire_console_sem()) | ||
138 | goto no_sleep; | ||
139 | |||
121 | omap_uart_prepare_idle(0); | 140 | omap_uart_prepare_idle(0); |
122 | omap_uart_prepare_idle(1); | 141 | omap_uart_prepare_idle(1); |
123 | omap_uart_prepare_idle(2); | 142 | omap_uart_prepare_idle(2); |
@@ -131,6 +150,9 @@ static void omap2_enter_full_retention(void) | |||
131 | omap_uart_resume_idle(1); | 150 | omap_uart_resume_idle(1); |
132 | omap_uart_resume_idle(0); | 151 | omap_uart_resume_idle(0); |
133 | 152 | ||
153 | if (!is_suspending()) | ||
154 | release_console_sem(); | ||
155 | |||
134 | no_sleep: | 156 | no_sleep: |
135 | if (omap2_pm_debug) { | 157 | if (omap2_pm_debug) { |
136 | unsigned long long tmp; | 158 | unsigned long long tmp; |
@@ -277,6 +299,12 @@ out: | |||
277 | local_irq_enable(); | 299 | local_irq_enable(); |
278 | } | 300 | } |
279 | 301 | ||
302 | static int omap2_pm_begin(suspend_state_t state) | ||
303 | { | ||
304 | suspend_state = state; | ||
305 | return 0; | ||
306 | } | ||
307 | |||
280 | static int omap2_pm_prepare(void) | 308 | static int omap2_pm_prepare(void) |
281 | { | 309 | { |
282 | /* We cannot sleep in idle until we have resumed */ | 310 | /* We cannot sleep in idle until we have resumed */ |
@@ -326,10 +354,17 @@ static void omap2_pm_finish(void) | |||
326 | enable_hlt(); | 354 | enable_hlt(); |
327 | } | 355 | } |
328 | 356 | ||
357 | static void omap2_pm_end(void) | ||
358 | { | ||
359 | suspend_state = PM_SUSPEND_ON; | ||
360 | } | ||
361 | |||
329 | static struct platform_suspend_ops omap_pm_ops = { | 362 | static struct platform_suspend_ops omap_pm_ops = { |
363 | .begin = omap2_pm_begin, | ||
330 | .prepare = omap2_pm_prepare, | 364 | .prepare = omap2_pm_prepare, |
331 | .enter = omap2_pm_enter, | 365 | .enter = omap2_pm_enter, |
332 | .finish = omap2_pm_finish, | 366 | .finish = omap2_pm_finish, |
367 | .end = omap2_pm_end, | ||
333 | .valid = suspend_valid_only_mem, | 368 | .valid = suspend_valid_only_mem, |
334 | }; | 369 | }; |
335 | 370 | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 75c0cd13ad8e..648b8c50d024 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
30 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
31 | #include <linux/console.h> | ||
31 | 32 | ||
32 | #include <plat/sram.h> | 33 | #include <plat/sram.h> |
33 | #include <plat/clockdomain.h> | 34 | #include <plat/clockdomain.h> |
@@ -49,6 +50,19 @@ | |||
49 | #include "sdrc.h" | 50 | #include "sdrc.h" |
50 | #include "control.h" | 51 | #include "control.h" |
51 | 52 | ||
53 | #ifdef CONFIG_SUSPEND | ||
54 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | ||
55 | static inline bool is_suspending(void) | ||
56 | { | ||
57 | return (suspend_state != PM_SUSPEND_ON); | ||
58 | } | ||
59 | #else | ||
60 | static inline bool is_suspending(void) | ||
61 | { | ||
62 | return false; | ||
63 | } | ||
64 | #endif | ||
65 | |||
52 | /* Scratchpad offsets */ | 66 | /* Scratchpad offsets */ |
53 | #define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4 | 67 | #define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4 |
54 | #define OMAP343X_TABLE_VALUE_OFFSET 0xc0 | 68 | #define OMAP343X_TABLE_VALUE_OFFSET 0xc0 |
@@ -385,6 +399,13 @@ void omap_sram_idle(void) | |||
385 | omap3_enable_io_chain(); | 399 | omap3_enable_io_chain(); |
386 | } | 400 | } |
387 | 401 | ||
402 | /* Block console output in case it is on one of the OMAP UARTs */ | ||
403 | if (!is_suspending()) | ||
404 | if (per_next_state < PWRDM_POWER_ON || | ||
405 | core_next_state < PWRDM_POWER_ON) | ||
406 | if (try_acquire_console_sem()) | ||
407 | goto console_still_active; | ||
408 | |||
388 | /* PER */ | 409 | /* PER */ |
389 | if (per_next_state < PWRDM_POWER_ON) { | 410 | if (per_next_state < PWRDM_POWER_ON) { |
390 | omap_uart_prepare_idle(2); | 411 | omap_uart_prepare_idle(2); |
@@ -463,6 +484,10 @@ void omap_sram_idle(void) | |||
463 | omap_uart_resume_idle(3); | 484 | omap_uart_resume_idle(3); |
464 | } | 485 | } |
465 | 486 | ||
487 | if (!is_suspending()) | ||
488 | release_console_sem(); | ||
489 | |||
490 | console_still_active: | ||
466 | /* Disable IO-PAD and IO-CHAIN wakeup */ | 491 | /* Disable IO-PAD and IO-CHAIN wakeup */ |
467 | if (omap3_has_io_wakeup() && | 492 | if (omap3_has_io_wakeup() && |
468 | (per_next_state < PWRDM_POWER_ON || | 493 | (per_next_state < PWRDM_POWER_ON || |
@@ -504,8 +529,6 @@ out: | |||
504 | } | 529 | } |
505 | 530 | ||
506 | #ifdef CONFIG_SUSPEND | 531 | #ifdef CONFIG_SUSPEND |
507 | static suspend_state_t suspend_state; | ||
508 | |||
509 | static int omap3_pm_prepare(void) | 532 | static int omap3_pm_prepare(void) |
510 | { | 533 | { |
511 | disable_hlt(); | 534 | disable_hlt(); |
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 298a22a754e2..f81acee4738d 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -243,13 +243,14 @@ | |||
243 | #define OMAP24XX_EN_GPT1_MASK (1 << 0) | 243 | #define OMAP24XX_EN_GPT1_MASK (1 << 0) |
244 | 244 | ||
245 | /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ | 245 | /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ |
246 | #define OMAP24XX_ST_GPIOS_SHIFT (1 << 2) | 246 | #define OMAP24XX_ST_GPIOS_SHIFT 2 |
247 | #define OMAP24XX_ST_GPIOS_MASK 2 | 247 | #define OMAP24XX_ST_GPIOS_MASK (1 << 2) |
248 | #define OMAP24XX_ST_GPT1_SHIFT (1 << 0) | 248 | #define OMAP24XX_ST_GPT1_SHIFT 0 |
249 | #define OMAP24XX_ST_GPT1_MASK 0 | 249 | #define OMAP24XX_ST_GPT1_MASK (1 << 0) |
250 | 250 | ||
251 | /* CM_IDLEST_MDM and PM_WKST_MDM shared bits */ | 251 | /* CM_IDLEST_MDM and PM_WKST_MDM shared bits */ |
252 | #define OMAP2430_ST_MDM_SHIFT (1 << 0) | 252 | #define OMAP2430_ST_MDM_SHIFT 0 |
253 | #define OMAP2430_ST_MDM_MASK (1 << 0) | ||
253 | 254 | ||
254 | 255 | ||
255 | /* 3430 register bits shared between CM & PRM registers */ | 256 | /* 3430 register bits shared between CM & PRM registers */ |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index becf0e38ef7e..d17960a1be25 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
28 | #include <linux/serial_8250.h> | 28 | #include <linux/serial_8250.h> |
29 | #include <linux/pm_runtime.h> | 29 | #include <linux/pm_runtime.h> |
30 | #include <linux/console.h> | ||
30 | 31 | ||
31 | #ifdef CONFIG_SERIAL_OMAP | 32 | #ifdef CONFIG_SERIAL_OMAP |
32 | #include <plat/omap-serial.h> | 33 | #include <plat/omap-serial.h> |
@@ -406,7 +407,7 @@ void omap_uart_resume_idle(int num) | |||
406 | struct omap_uart_state *uart; | 407 | struct omap_uart_state *uart; |
407 | 408 | ||
408 | list_for_each_entry(uart, &uart_list, node) { | 409 | list_for_each_entry(uart, &uart_list, node) { |
409 | if (num == uart->num) { | 410 | if (num == uart->num && uart->can_sleep) { |
410 | omap_uart_enable_clocks(uart); | 411 | omap_uart_enable_clocks(uart); |
411 | 412 | ||
412 | /* Check for IO pad wakeup */ | 413 | /* Check for IO pad wakeup */ |
@@ -807,6 +808,8 @@ void __init omap_serial_init_port(int port) | |||
807 | 808 | ||
808 | oh->dev_attr = uart; | 809 | oh->dev_attr = uart; |
809 | 810 | ||
811 | acquire_console_sem(); /* in case the earlycon is on the UART */ | ||
812 | |||
810 | /* | 813 | /* |
811 | * Because of early UART probing, UART did not get idled | 814 | * Because of early UART probing, UART did not get idled |
812 | * on init. Now that omap_device is ready, ensure full idle | 815 | * on init. Now that omap_device is ready, ensure full idle |
@@ -831,6 +834,8 @@ void __init omap_serial_init_port(int port) | |||
831 | omap_uart_block_sleep(uart); | 834 | omap_uart_block_sleep(uart); |
832 | uart->timeout = DEFAULT_TIMEOUT; | 835 | uart->timeout = DEFAULT_TIMEOUT; |
833 | 836 | ||
837 | release_console_sem(); | ||
838 | |||
834 | if ((cpu_is_omap34xx() && uart->padconf) || | 839 | if ((cpu_is_omap34xx() && uart->padconf) || |
835 | (uart->wk_en && uart->wk_mask)) { | 840 | (uart->wk_en && uart->wk_mask)) { |
836 | device_init_wakeup(&od->pdev.dev, true); | 841 | device_init_wakeup(&od->pdev.dev, true); |
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h index c47b033bd999..c5196101a237 100644 --- a/arch/arm/mach-orion5x/include/mach/io.h +++ b/arch/arm/mach-orion5x/include/mach/io.h | |||
@@ -38,8 +38,8 @@ __arch_iounmap(void __iomem *addr) | |||
38 | __iounmap(addr); | 38 | __iounmap(addr); |
39 | } | 39 | } |
40 | 40 | ||
41 | #define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m) | 41 | #define __arch_ioremap __arch_ioremap |
42 | #define __arch_iounmap(a) __arch_iounmap(a) | 42 | #define __arch_iounmap __arch_iounmap |
43 | #define __io(a) __typesafe_io(a) | 43 | #define __io(a) __typesafe_io(a) |
44 | #define __mem_pci(a) (a) | 44 | #define __mem_pci(a) (a) |
45 | 45 | ||
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index dd235ecc9d6c..c93e73d54dd1 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -540,6 +540,7 @@ config MACH_ICONTROL | |||
540 | config ARCH_PXA_ESERIES | 540 | config ARCH_PXA_ESERIES |
541 | bool "PXA based Toshiba e-series PDAs" | 541 | bool "PXA based Toshiba e-series PDAs" |
542 | select PXA25x | 542 | select PXA25x |
543 | select FB_W100 | ||
543 | 544 | ||
544 | config MACH_E330 | 545 | config MACH_E330 |
545 | bool "Toshiba e330" | 546 | bool "Toshiba e330" |
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index d2060a1d1d68..e5c9932b7588 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
@@ -241,7 +241,8 @@ static inline void palmtx_keys_init(void) {} | |||
241 | /****************************************************************************** | 241 | /****************************************************************************** |
242 | * NAND Flash | 242 | * NAND Flash |
243 | ******************************************************************************/ | 243 | ******************************************************************************/ |
244 | #if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) | 244 | #if defined(CONFIG_MTD_NAND_PLATFORM) || \ |
245 | defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | ||
245 | static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, | 246 | static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, |
246 | unsigned int ctrl) | 247 | unsigned int ctrl) |
247 | { | 248 | { |
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index 52c30b01a671..ae008110db4e 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
@@ -353,8 +353,8 @@ resume_turn_on_mmu: | |||
353 | 353 | ||
354 | @ Let us ensure we jump to resume_after_mmu only when the mcr above | 354 | @ Let us ensure we jump to resume_after_mmu only when the mcr above |
355 | @ actually took effect. They call it the "cpwait" operation. | 355 | @ actually took effect. They call it the "cpwait" operation. |
356 | mrc p15, 0, r1, c2, c0, 0 @ queue a dependency on CP15 | 356 | mrc p15, 0, r0, c2, c0, 0 @ queue a dependency on CP15 |
357 | sub pc, r2, r1, lsr #32 @ jump to virtual addr | 357 | sub pc, r2, r0, lsr #32 @ jump to virtual addr |
358 | nop | 358 | nop |
359 | nop | 359 | nop |
360 | nop | 360 | nop |
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 3d653e05b75d..aad806c5cb12 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c | |||
@@ -50,15 +50,12 @@ | |||
50 | #include <mach/clkdev.h> | 50 | #include <mach/clkdev.h> |
51 | #include <mach/platform.h> | 51 | #include <mach/platform.h> |
52 | #include <mach/irqs.h> | 52 | #include <mach/irqs.h> |
53 | #include <plat/timer-sp.h> | 53 | #include <asm/hardware/timer-sp.h> |
54 | 54 | ||
55 | #include <plat/sched_clock.h> | 55 | #include <plat/sched_clock.h> |
56 | 56 | ||
57 | #include "core.h" | 57 | #include "core.h" |
58 | 58 | ||
59 | /* used by entry-macro.S and platsmp.c */ | ||
60 | void __iomem *gic_cpu_base_addr; | ||
61 | |||
62 | #ifdef CONFIG_ZONE_DMA | 59 | #ifdef CONFIG_ZONE_DMA |
63 | /* | 60 | /* |
64 | * Adjust the zones if there are restrictions for DMA access. | 61 | * Adjust the zones if there are restrictions for DMA access. |
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 781bca68a9fa..693239ddc39e 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -53,7 +53,6 @@ extern struct platform_device realview_i2c_device; | |||
53 | extern struct mmci_platform_data realview_mmc0_plat_data; | 53 | extern struct mmci_platform_data realview_mmc0_plat_data; |
54 | extern struct mmci_platform_data realview_mmc1_plat_data; | 54 | extern struct mmci_platform_data realview_mmc1_plat_data; |
55 | extern struct clcd_board clcd_plat_data; | 55 | extern struct clcd_board clcd_plat_data; |
56 | extern void __iomem *gic_cpu_base_addr; | ||
57 | extern void __iomem *timer0_va_base; | 56 | extern void __iomem *timer0_va_base; |
58 | extern void __iomem *timer1_va_base; | 57 | extern void __iomem *timer1_va_base; |
59 | extern void __iomem *timer2_va_base; | 58 | extern void __iomem *timer2_va_base; |
diff --git a/arch/arm/mach-realview/headsmp.S b/arch/arm/mach-realview/headsmp.S index 4075473cf68a..b34be4554d40 100644 --- a/arch/arm/mach-realview/headsmp.S +++ b/arch/arm/mach-realview/headsmp.S | |||
@@ -35,5 +35,6 @@ pen: ldr r7, [r6] | |||
35 | */ | 35 | */ |
36 | b secondary_startup | 36 | b secondary_startup |
37 | 37 | ||
38 | .align | ||
38 | 1: .long . | 39 | 1: .long . |
39 | .long pen_release | 40 | .long pen_release |
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S index 340a5c276946..4071164aebaa 100644 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ b/arch/arm/mach-realview/include/mach/entry-macro.S | |||
@@ -8,74 +8,11 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | #include <asm/hardware/gic.h> | 11 | #include <asm/hardware/entry-macro-gic.S> |
12 | 12 | ||
13 | .macro disable_fiq | 13 | .macro disable_fiq |
14 | .endm | 14 | .endm |
15 | 15 | ||
16 | .macro get_irqnr_preamble, base, tmp | ||
17 | ldr \base, =gic_cpu_base_addr | ||
18 | ldr \base, [\base] | ||
19 | .endm | ||
20 | |||
21 | .macro arch_ret_to_user, tmp1, tmp2 | 16 | .macro arch_ret_to_user, tmp1, tmp2 |
22 | .endm | 17 | .endm |
23 | 18 | ||
24 | /* | ||
25 | * The interrupt numbering scheme is defined in the | ||
26 | * interrupt controller spec. To wit: | ||
27 | * | ||
28 | * Interrupts 0-15 are IPI | ||
29 | * 16-28 are reserved | ||
30 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
31 | * 32-1020 are global | ||
32 | * 1021-1022 are reserved | ||
33 | * 1023 is "spurious" (no interrupt) | ||
34 | * | ||
35 | * For now, we ignore all local interrupts so only return an interrupt if it's | ||
36 | * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | ||
37 | * | ||
38 | * A simple read from the controller will tell us the number of the highest | ||
39 | * priority enabled interrupt. We then just need to check whether it is in the | ||
40 | * valid range for an IRQ (30-1020 inclusive). | ||
41 | */ | ||
42 | |||
43 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
44 | |||
45 | ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ | ||
46 | |||
47 | ldr \tmp, =1021 | ||
48 | |||
49 | bic \irqnr, \irqstat, #0x1c00 | ||
50 | |||
51 | cmp \irqnr, #29 | ||
52 | cmpcc \irqnr, \irqnr | ||
53 | cmpne \irqnr, \tmp | ||
54 | cmpcs \irqnr, \irqnr | ||
55 | |||
56 | .endm | ||
57 | |||
58 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
59 | * register) is preserved from the macro above. | ||
60 | * If there is an IPI, we immediately signal end of interrupt on the | ||
61 | * controller, since this requires the original irqstat value which | ||
62 | * we won't easily be able to recreate later. | ||
63 | */ | ||
64 | |||
65 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
66 | bic \irqnr, \irqstat, #0x1c00 | ||
67 | cmp \irqnr, #16 | ||
68 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
69 | cmpcs \irqnr, \irqnr | ||
70 | .endm | ||
71 | |||
72 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
73 | |||
74 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
75 | bic \irqnr, \irqstat, #0x1c00 | ||
76 | mov \tmp, #0 | ||
77 | cmp \irqnr, #29 | ||
78 | moveq \tmp, #1 | ||
79 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
80 | cmp \tmp, #0 | ||
81 | .endm | ||
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 009265818d55..6da8a2e53c44 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c | |||
@@ -69,7 +69,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
69 | * core (e.g. timer irq), then they will not have been enabled | 69 | * core (e.g. timer irq), then they will not have been enabled |
70 | * for us: do so | 70 | * for us: do so |
71 | */ | 71 | */ |
72 | gic_cpu_init(0, gic_cpu_base_addr); | 72 | gic_secondary_init(0); |
73 | 73 | ||
74 | /* | 74 | /* |
75 | * let the primary processor know we're out of the | 75 | * let the primary processor know we're out of the |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index f2697106f809..6ef5c5e528b2 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -364,21 +364,19 @@ static void __init gic_init_irq(void) | |||
364 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); | 364 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); |
365 | 365 | ||
366 | /* core tile GIC, primary */ | 366 | /* core tile GIC, primary */ |
367 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); | 367 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), |
368 | gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); | 368 | __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); |
369 | gic_cpu_init(0, gic_cpu_base_addr); | ||
370 | 369 | ||
371 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB | 370 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
372 | /* board GIC, secondary */ | 371 | /* board GIC, secondary */ |
373 | gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64); | 372 | gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
374 | gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE)); | 373 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
375 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); | 374 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); |
376 | #endif | 375 | #endif |
377 | } else { | 376 | } else { |
378 | /* board GIC, primary */ | 377 | /* board GIC, primary */ |
379 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); | 378 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
380 | gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29); | 379 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
381 | gic_cpu_init(0, gic_cpu_base_addr); | ||
382 | } | 380 | } |
383 | } | 381 | } |
384 | 382 | ||
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index a4125619d71b..cbdc97a5685f 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -304,13 +304,14 @@ static struct platform_device char_lcd_device = { | |||
304 | static void __init gic_init_irq(void) | 304 | static void __init gic_init_irq(void) |
305 | { | 305 | { |
306 | /* ARM1176 DevChip GIC, primary */ | 306 | /* ARM1176 DevChip GIC, primary */ |
307 | gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE); | 307 | gic_init(0, IRQ_DC1176_GIC_START, |
308 | gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START); | 308 | __io_address(REALVIEW_DC1176_GIC_DIST_BASE), |
309 | gic_cpu_init(0, gic_cpu_base_addr); | 309 | __io_address(REALVIEW_DC1176_GIC_CPU_BASE)); |
310 | 310 | ||
311 | /* board GIC, secondary */ | 311 | /* board GIC, secondary */ |
312 | gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START); | 312 | gic_init(1, IRQ_PB1176_GIC_START, |
313 | gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE)); | 313 | __io_address(REALVIEW_PB1176_GIC_DIST_BASE), |
314 | __io_address(REALVIEW_PB1176_GIC_CPU_BASE)); | ||
314 | gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1); | 315 | gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1); |
315 | } | 316 | } |
316 | 317 | ||
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 117b95b2ca15..8e8ab7d29a6a 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -309,13 +309,13 @@ static void __init gic_init_irq(void) | |||
309 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); | 309 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); |
310 | 310 | ||
311 | /* ARM11MPCore test chip GIC, primary */ | 311 | /* ARM11MPCore test chip GIC, primary */ |
312 | gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE); | 312 | gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), |
313 | gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29); | 313 | __io_address(REALVIEW_TC11MP_GIC_CPU_BASE)); |
314 | gic_cpu_init(0, gic_cpu_base_addr); | ||
315 | 314 | ||
316 | /* board GIC, secondary */ | 315 | /* board GIC, secondary */ |
317 | gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START); | 316 | gic_init(1, IRQ_PB11MP_GIC_START, |
318 | gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE)); | 317 | __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), |
318 | __io_address(REALVIEW_PB11MP_GIC_CPU_BASE)); | ||
319 | gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); | 319 | gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); |
320 | } | 320 | } |
321 | 321 | ||
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 929b8dc12e81..841118e3e118 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -273,9 +273,9 @@ static struct platform_device pmu_device = { | |||
273 | static void __init gic_init_irq(void) | 273 | static void __init gic_init_irq(void) |
274 | { | 274 | { |
275 | /* ARM PB-A8 on-board GIC */ | 275 | /* ARM PB-A8 on-board GIC */ |
276 | gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE); | 276 | gic_init(0, IRQ_PBA8_GIC_START, |
277 | gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START); | 277 | __io_address(REALVIEW_PBA8_GIC_DIST_BASE), |
278 | gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); | 278 | __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); |
279 | } | 279 | } |
280 | 280 | ||
281 | static void __init realview_pba8_timer_init(void) | 281 | static void __init realview_pba8_timer_init(void) |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index b9f9e20031a7..02b755b009db 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -313,15 +313,12 @@ static void __init gic_init_irq(void) | |||
313 | { | 313 | { |
314 | /* ARM PBX on-board GIC */ | 314 | /* ARM PBX on-board GIC */ |
315 | if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { | 315 | if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { |
316 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE); | 316 | gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), |
317 | gic_dist_init(0, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), | 317 | __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); |
318 | 29); | ||
319 | gic_cpu_init(0, __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); | ||
320 | } else { | 318 | } else { |
321 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE); | 319 | gic_init(0, IRQ_PBX_GIC_START, |
322 | gic_dist_init(0, __io_address(REALVIEW_PBX_GIC_DIST_BASE), | 320 | __io_address(REALVIEW_PBX_GIC_DIST_BASE), |
323 | IRQ_PBX_GIC_START); | 321 | __io_address(REALVIEW_PBX_GIC_CPU_BASE)); |
324 | gic_cpu_init(0, __io_address(REALVIEW_PBX_GIC_CPU_BASE)); | ||
325 | } | 322 | } |
326 | } | 323 | } |
327 | 324 | ||
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 8aa2f1902a94..6b86a722a7db 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c | |||
@@ -77,13 +77,13 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) | |||
77 | 77 | ||
78 | /* Configures BT serial port GPIOs */ | 78 | /* Configures BT serial port GPIOs */ |
79 | s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); | 79 | s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); |
80 | s3c_gpio_cfgpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE); | 80 | s3c_gpio_setpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE); |
81 | s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); | 81 | s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); |
82 | s3c_gpio_cfgpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE); | 82 | s3c_gpio_setpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE); |
83 | s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); | 83 | s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); |
84 | s3c_gpio_cfgpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE); | 84 | s3c_gpio_setpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE); |
85 | s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); | 85 | s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); |
86 | s3c_gpio_cfgpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); | 86 | s3c_gpio_setpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); |
87 | 87 | ||
88 | 88 | ||
89 | rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, | 89 | rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, |
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index cef6a65637bd..6983cb4d4cae 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig | |||
@@ -16,7 +16,7 @@ config CPU_S3C2412 | |||
16 | config CPU_S3C2412_ONLY | 16 | config CPU_S3C2412_ONLY |
17 | bool | 17 | bool |
18 | depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ | 18 | depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ |
19 | !CPU_2416 && !CPU_S3C2440 && !CPU_S3C2442 && \ | 19 | !CPU_S3C2416 && !CPU_S3C2440 && !CPU_S3C2442 && \ |
20 | !CPU_S3C2443 && CPU_S3C2412 | 20 | !CPU_S3C2443 && CPU_S3C2412 |
21 | default y if CPU_S3C2412 | 21 | default y if CPU_S3C2412 |
22 | 22 | ||
@@ -28,9 +28,16 @@ config S3C2412_DMA | |||
28 | 28 | ||
29 | config S3C2412_PM | 29 | config S3C2412_PM |
30 | bool | 30 | bool |
31 | select S3C2412_PM_SLEEP | ||
31 | help | 32 | help |
32 | Internal config node to apply S3C2412 power management | 33 | Internal config node to apply S3C2412 power management |
33 | 34 | ||
35 | config S3C2412_PM_SLEEP | ||
36 | bool | ||
37 | help | ||
38 | Internal config node to apply sleep for S3C2412 power management. | ||
39 | Can be selected by another SoCs with similar sleep procedure. | ||
40 | |||
34 | # Note, the S3C2412 IOtiming support is in plat-s3c24xx | 41 | # Note, the S3C2412 IOtiming support is in plat-s3c24xx |
35 | 42 | ||
36 | config S3C2412_CPUFREQ | 43 | config S3C2412_CPUFREQ |
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile index 530ec46cbaea..6c48a91ea39e 100644 --- a/arch/arm/mach-s3c2412/Makefile +++ b/arch/arm/mach-s3c2412/Makefile | |||
@@ -14,7 +14,8 @@ obj-$(CONFIG_CPU_S3C2412) += irq.o | |||
14 | obj-$(CONFIG_CPU_S3C2412) += clock.o | 14 | obj-$(CONFIG_CPU_S3C2412) += clock.o |
15 | obj-$(CONFIG_CPU_S3C2412) += gpio.o | 15 | obj-$(CONFIG_CPU_S3C2412) += gpio.o |
16 | obj-$(CONFIG_S3C2412_DMA) += dma.o | 16 | obj-$(CONFIG_S3C2412_DMA) += dma.o |
17 | obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o | 17 | obj-$(CONFIG_S3C2412_PM) += pm.o |
18 | obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o | ||
18 | obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o | 19 | obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o |
19 | 20 | ||
20 | # Machine support | 21 | # Machine support |
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig index 87b9c9f003bd..df8d14974c90 100644 --- a/arch/arm/mach-s3c2416/Kconfig +++ b/arch/arm/mach-s3c2416/Kconfig | |||
@@ -27,6 +27,7 @@ config S3C2416_DMA | |||
27 | 27 | ||
28 | config S3C2416_PM | 28 | config S3C2416_PM |
29 | bool | 29 | bool |
30 | select S3C2412_PM_SLEEP | ||
30 | help | 31 | help |
31 | Internal config node to apply S3C2416 power management | 32 | Internal config node to apply S3C2416 power management |
32 | 33 | ||
@@ -35,9 +36,12 @@ menu "S3C2416 Machines" | |||
35 | config MACH_SMDK2416 | 36 | config MACH_SMDK2416 |
36 | bool "SMDK2416" | 37 | bool "SMDK2416" |
37 | select CPU_S3C2416 | 38 | select CPU_S3C2416 |
39 | select MACH_SMDK | ||
38 | select S3C_DEV_FB | 40 | select S3C_DEV_FB |
39 | select S3C_DEV_HSMMC | 41 | select S3C_DEV_HSMMC |
40 | select S3C_DEV_HSMMC1 | 42 | select S3C_DEV_HSMMC1 |
43 | select S3C_DEV_NAND | ||
44 | select S3C_DEV_USB_HOST | ||
41 | select S3C2416_PM if PM | 45 | select S3C2416_PM if PM |
42 | help | 46 | help |
43 | Say Y here if you are using an SMDK2416 | 47 | Say Y here if you are using an SMDK2416 |
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c index 084d121f368c..00174daf1526 100644 --- a/arch/arm/mach-s3c2416/irq.c +++ b/arch/arm/mach-s3c2416/irq.c | |||
@@ -168,12 +168,11 @@ static struct irq_chip s3c2416_irq_dma = { | |||
168 | 168 | ||
169 | static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) | 169 | static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) |
170 | { | 170 | { |
171 | s3c2416_irq_demux(IRQ_S3C2443_UART3, 3); | 171 | s3c2416_irq_demux(IRQ_S3C2443_RX3, 3); |
172 | } | 172 | } |
173 | 173 | ||
174 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) | 174 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) |
175 | #define SUBMSK_UART3 (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) | 175 | #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) |
176 | |||
177 | 176 | ||
178 | static void s3c2416_irq_uart3_mask(unsigned int irqno) | 177 | static void s3c2416_irq_uart3_mask(unsigned int irqno) |
179 | { | 178 | { |
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index ff024a6c0f85..a0cb2581894f 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
@@ -18,6 +18,7 @@ config CPU_S3C2440 | |||
18 | config CPU_S3C2442 | 18 | config CPU_S3C2442 |
19 | bool | 19 | bool |
20 | select CPU_ARM920T | 20 | select CPU_ARM920T |
21 | select S3C_GPIO_PULL_DOWN | ||
21 | select S3C2410_CLOCK | 22 | select S3C2410_CLOCK |
22 | select S3C2410_GPIO | 23 | select S3C2410_GPIO |
23 | select S3C2410_PM if PM | 24 | select S3C2410_PM if PM |
@@ -178,6 +179,9 @@ config MACH_MINI2440 | |||
178 | bool "MINI2440 development board" | 179 | bool "MINI2440 development board" |
179 | select CPU_S3C2440 | 180 | select CPU_S3C2440 |
180 | select EEPROM_AT24 | 181 | select EEPROM_AT24 |
182 | select NEW_LEDS | ||
183 | select LEDS_CLASS | ||
184 | select LEDS_TRIGGER | ||
181 | select LEDS_TRIGGER_BACKLIGHT | 185 | select LEDS_TRIGGER_BACKLIGHT |
182 | select S3C_DEV_NAND | 186 | select S3C_DEV_NAND |
183 | select S3C_DEV_USB_HOST | 187 | select S3C_DEV_USB_HOST |
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index d50f3ae6173d..f7663f731ea0 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c | |||
@@ -46,9 +46,6 @@ int __init s3c2440_init(void) | |||
46 | { | 46 | { |
47 | printk("S3C2440: Initialising architecture\n"); | 47 | printk("S3C2440: Initialising architecture\n"); |
48 | 48 | ||
49 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; | ||
50 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; | ||
51 | |||
52 | /* change irq for watchdog */ | 49 | /* change irq for watchdog */ |
53 | 50 | ||
54 | s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; | 51 | s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; |
@@ -58,3 +55,11 @@ int __init s3c2440_init(void) | |||
58 | 55 | ||
59 | return sysdev_register(&s3c2440_sysdev); | 56 | return sysdev_register(&s3c2440_sysdev); |
60 | } | 57 | } |
58 | |||
59 | void __init s3c2440_map_io(void) | ||
60 | { | ||
61 | s3c244x_map_io(); | ||
62 | |||
63 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; | ||
64 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; | ||
65 | } | ||
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c index 188ad1e57dc0..ecf813546554 100644 --- a/arch/arm/mach-s3c2440/s3c2442.c +++ b/arch/arm/mach-s3c2440/s3c2442.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
33 | #include <linux/ioport.h> | 33 | #include <linux/ioport.h> |
34 | #include <linux/mutex.h> | 34 | #include <linux/mutex.h> |
35 | #include <linux/gpio.h> | ||
35 | #include <linux/clk.h> | 36 | #include <linux/clk.h> |
36 | #include <linux/io.h> | 37 | #include <linux/io.h> |
37 | 38 | ||
@@ -43,6 +44,11 @@ | |||
43 | 44 | ||
44 | #include <plat/clock.h> | 45 | #include <plat/clock.h> |
45 | #include <plat/cpu.h> | 46 | #include <plat/cpu.h> |
47 | #include <plat/s3c244x.h> | ||
48 | |||
49 | #include <plat/gpio-core.h> | ||
50 | #include <plat/gpio-cfg.h> | ||
51 | #include <plat/gpio-cfg-helpers.h> | ||
46 | 52 | ||
47 | /* S3C2442 extended clock support */ | 53 | /* S3C2442 extended clock support */ |
48 | 54 | ||
@@ -163,3 +169,11 @@ int __init s3c2442_init(void) | |||
163 | 169 | ||
164 | return sysdev_register(&s3c2442_sysdev); | 170 | return sysdev_register(&s3c2442_sysdev); |
165 | } | 171 | } |
172 | |||
173 | void __init s3c2442_map_io(void) | ||
174 | { | ||
175 | s3c244x_map_io(); | ||
176 | |||
177 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1down; | ||
178 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1down; | ||
179 | } | ||
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig index 4fef723126fa..31babec90cec 100644 --- a/arch/arm/mach-s3c2443/Kconfig +++ b/arch/arm/mach-s3c2443/Kconfig | |||
@@ -5,6 +5,7 @@ | |||
5 | config CPU_S3C2443 | 5 | config CPU_S3C2443 |
6 | bool | 6 | bool |
7 | depends on ARCH_S3C2410 | 7 | depends on ARCH_S3C2410 |
8 | select CPU_ARM920T | ||
8 | select S3C2443_DMA if S3C2410_DMA | 9 | select S3C2443_DMA if S3C2410_DMA |
9 | select CPU_LLSERIAL_S3C2440 | 10 | select CPU_LLSERIAL_S3C2440 |
10 | select SAMSUNG_CLKSRC | 11 | select SAMSUNG_CLKSRC |
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index 0e0d693f3974..893424767ce1 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c | |||
@@ -166,12 +166,11 @@ static struct irq_chip s3c2443_irq_dma = { | |||
166 | 166 | ||
167 | static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) | 167 | static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) |
168 | { | 168 | { |
169 | s3c2443_irq_demux(IRQ_S3C2443_UART3, 3); | 169 | s3c2443_irq_demux(IRQ_S3C2443_RX3, 3); |
170 | } | 170 | } |
171 | 171 | ||
172 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) | 172 | #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) |
173 | #define SUBMSK_UART3 (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) | 173 | #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) |
174 | |||
175 | 174 | ||
176 | static void s3c2443_irq_uart3_mask(unsigned int irqno) | 175 | static void s3c2443_irq_uart3_mask(unsigned int irqno) |
177 | { | 176 | { |
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 249c62956471..89f35e02e883 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c | |||
@@ -45,7 +45,7 @@ | |||
45 | 45 | ||
46 | #include <video/platform_lcd.h> | 46 | #include <video/platform_lcd.h> |
47 | 47 | ||
48 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 48 | #define UCON S3C2410_UCON_DEFAULT |
49 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 49 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
50 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 50 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
51 | 51 | ||
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index f9ef9b5c5f5a..4957ab0a0d4a 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c | |||
@@ -46,7 +46,7 @@ | |||
46 | 46 | ||
47 | #include <video/platform_lcd.h> | 47 | #include <video/platform_lcd.h> |
48 | 48 | ||
49 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 49 | #define UCON S3C2410_UCON_DEFAULT |
50 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 50 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
51 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 51 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
52 | 52 | ||
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c index 28677caf3613..461aa035afc0 100644 --- a/arch/arm/mach-s5pv210/mach-aquila.c +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
@@ -378,6 +378,12 @@ static struct max8998_regulator_data aquila_regulators[] = { | |||
378 | static struct max8998_platform_data aquila_max8998_pdata = { | 378 | static struct max8998_platform_data aquila_max8998_pdata = { |
379 | .num_regulators = ARRAY_SIZE(aquila_regulators), | 379 | .num_regulators = ARRAY_SIZE(aquila_regulators), |
380 | .regulators = aquila_regulators, | 380 | .regulators = aquila_regulators, |
381 | .buck1_set1 = S5PV210_GPH0(3), | ||
382 | .buck1_set2 = S5PV210_GPH0(4), | ||
383 | .buck2_set3 = S5PV210_GPH0(5), | ||
384 | .buck1_max_voltage1 = 1200000, | ||
385 | .buck1_max_voltage2 = 1200000, | ||
386 | .buck2_max_voltage = 1200000, | ||
381 | }; | 387 | }; |
382 | #endif | 388 | #endif |
383 | 389 | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index b1dcf964a768..e22d5112fd44 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -518,6 +518,12 @@ static struct max8998_regulator_data goni_regulators[] = { | |||
518 | static struct max8998_platform_data goni_max8998_pdata = { | 518 | static struct max8998_platform_data goni_max8998_pdata = { |
519 | .num_regulators = ARRAY_SIZE(goni_regulators), | 519 | .num_regulators = ARRAY_SIZE(goni_regulators), |
520 | .regulators = goni_regulators, | 520 | .regulators = goni_regulators, |
521 | .buck1_set1 = S5PV210_GPH0(3), | ||
522 | .buck1_set2 = S5PV210_GPH0(4), | ||
523 | .buck2_set3 = S5PV210_GPH0(5), | ||
524 | .buck1_max_voltage1 = 1200000, | ||
525 | .buck1_max_voltage2 = 1200000, | ||
526 | .buck2_max_voltage = 1200000, | ||
521 | }; | 527 | }; |
522 | #endif | 528 | #endif |
523 | 529 | ||
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 0ad7924fe62e..5dd1681c069e 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/serial_core.h> | 14 | #include <linux/serial_core.h> |
15 | #include <linux/i2c.h> | 15 | #include <linux/i2c.h> |
16 | #include <linux/sysdev.h> | ||
16 | 17 | ||
17 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index bcd7a5d53401..1fbc45b2a432 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/i2c.h> | 13 | #include <linux/i2c.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/serial_core.h> | 15 | #include <linux/serial_core.h> |
16 | #include <linux/sysdev.h> | ||
16 | 17 | ||
17 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
18 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 82ce4aa6d61a..72ab289e7816 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -24,8 +24,6 @@ | |||
24 | 24 | ||
25 | #include <mach/regs-irq.h> | 25 | #include <mach/regs-irq.h> |
26 | 26 | ||
27 | void __iomem *gic_cpu_base_addr; | ||
28 | |||
29 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, | 27 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, |
30 | unsigned int irq_start); | 28 | unsigned int irq_start); |
31 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); | 29 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); |
@@ -122,9 +120,7 @@ void __init s5pv310_init_irq(void) | |||
122 | { | 120 | { |
123 | int irq; | 121 | int irq; |
124 | 122 | ||
125 | gic_cpu_base_addr = S5P_VA_GIC_CPU; | 123 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); |
126 | gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER); | ||
127 | gic_cpu_init(0, S5P_VA_GIC_CPU); | ||
128 | 124 | ||
129 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | 125 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
130 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), | 126 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), |
diff --git a/arch/arm/mach-s5pv310/include/mach/smp.h b/arch/arm/mach-s5pv310/include/mach/smp.h index b7ec252384f4..e1cc6a251c6a 100644 --- a/arch/arm/mach-s5pv310/include/mach/smp.h +++ b/arch/arm/mach-s5pv310/include/mach/smp.h | |||
@@ -9,8 +9,6 @@ | |||
9 | #include <asm/hardware/gic.h> | 9 | #include <asm/hardware/gic.h> |
10 | #include <asm/smp_mpidr.h> | 10 | #include <asm/smp_mpidr.h> |
11 | 11 | ||
12 | extern void __iomem *gic_cpu_base_addr; | ||
13 | |||
14 | /* | 12 | /* |
15 | * We use IRQ1 as the IPI | 13 | * We use IRQ1 as the IPI |
16 | */ | 14 | */ |
diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c index d357c198edee..15929c169f81 100644 --- a/arch/arm/mach-s5pv310/platsmp.c +++ b/arch/arm/mach-s5pv310/platsmp.c | |||
@@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
54 | * core (e.g. timer irq), then they will not have been enabled | 54 | * core (e.g. timer irq), then they will not have been enabled |
55 | * for us: do so | 55 | * for us: do so |
56 | */ | 56 | */ |
57 | gic_cpu_init(0, gic_cpu_base_addr); | 57 | gic_secondary_init(0); |
58 | 58 | ||
59 | /* | 59 | /* |
60 | * let the primary processor know we're out of the | 60 | * let the primary processor know we're out of the |
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index 5da8c35aa0de..42625e4d949a 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig | |||
@@ -118,6 +118,16 @@ config SA1100_LART | |||
118 | (also known as the LART). See <http://www.lartmaker.nl/> for | 118 | (also known as the LART). See <http://www.lartmaker.nl/> for |
119 | information on the LART. | 119 | information on the LART. |
120 | 120 | ||
121 | config SA1100_NANOENGINE | ||
122 | bool "nanoEngine" | ||
123 | select CPU_FREQ_SA1110 | ||
124 | select PCI | ||
125 | select PCI_NANOENGINE | ||
126 | help | ||
127 | Say Y here if you are using the Bright Star Engineering nanoEngine. | ||
128 | See <http://www.brightstareng.com/arm/nanoeng.htm> for information | ||
129 | on the BSE nanoEngine. | ||
130 | |||
121 | config SA1100_PLEB | 131 | config SA1100_PLEB |
122 | bool "PLEB" | 132 | bool "PLEB" |
123 | select CPU_FREQ_SA1100 | 133 | select CPU_FREQ_SA1100 |
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index 89349c1dd7a6..e697691eed28 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile | |||
@@ -37,6 +37,9 @@ obj-$(CONFIG_SA1100_JORNADA720_SSP) += jornada720_ssp.o | |||
37 | obj-$(CONFIG_SA1100_LART) += lart.o | 37 | obj-$(CONFIG_SA1100_LART) += lart.o |
38 | led-$(CONFIG_SA1100_LART) += leds-lart.o | 38 | led-$(CONFIG_SA1100_LART) += leds-lart.o |
39 | 39 | ||
40 | obj-$(CONFIG_SA1100_NANOENGINE) += nanoengine.o | ||
41 | obj-$(CONFIG_PCI_NANOENGINE) += pci-nanoengine.o | ||
42 | |||
40 | obj-$(CONFIG_SA1100_PLEB) += pleb.o | 43 | obj-$(CONFIG_SA1100_PLEB) += pleb.o |
41 | 44 | ||
42 | obj-$(CONFIG_SA1100_SHANNON) += shannon.o | 45 | obj-$(CONFIG_SA1100_SHANNON) += shannon.o |
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index 96f7dc103b59..07d4e8ba3719 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c | |||
@@ -94,48 +94,47 @@ | |||
94 | 94 | ||
95 | #include "generic.h" | 95 | #include "generic.h" |
96 | 96 | ||
97 | typedef struct { | 97 | struct sa1100_dram_regs { |
98 | int speed; | 98 | int speed; |
99 | u32 mdcnfg; | 99 | u32 mdcnfg; |
100 | u32 mdcas0; | 100 | u32 mdcas0; |
101 | u32 mdcas1; | 101 | u32 mdcas1; |
102 | u32 mdcas2; | 102 | u32 mdcas2; |
103 | } sa1100_dram_regs_t; | 103 | }; |
104 | 104 | ||
105 | 105 | ||
106 | static struct cpufreq_driver sa1100_driver; | 106 | static struct cpufreq_driver sa1100_driver; |
107 | 107 | ||
108 | static sa1100_dram_regs_t sa1100_dram_settings[] = | 108 | static struct sa1100_dram_regs sa1100_dram_settings[] = { |
109 | { | 109 | /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */ |
110 | /* speed, mdcnfg, mdcas0, mdcas1, mdcas2 clock frequency */ | 110 | { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */ |
111 | { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 59.0 MHz */ | 111 | { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */ |
112 | { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 73.7 MHz */ | 112 | { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */ |
113 | { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 88.5 MHz */ | 113 | {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */ |
114 | { 103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 103.2 MHz */ | 114 | {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */ |
115 | { 118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff }, /* 118.0 MHz */ | 115 | {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */ |
116 | { 132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff }, /* 132.7 MHz */ | 116 | {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */ |
117 | { 147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff }, /* 147.5 MHz */ | 117 | {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */ |
118 | { 162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff }, /* 162.2 MHz */ | 118 | {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */ |
119 | { 176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff }, /* 176.9 MHz */ | 119 | {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */ |
120 | { 191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff }, /* 191.7 MHz */ | 120 | {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */ |
121 | { 206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff }, /* 206.4 MHz */ | 121 | {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */ |
122 | { 221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff }, /* 221.2 MHz */ | 122 | {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */ |
123 | { 235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1 }, /* 235.9 MHz */ | 123 | {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */ |
124 | { 250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3 }, /* 250.7 MHz */ | 124 | {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */ |
125 | { 265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3 }, /* 265.4 MHz */ | 125 | {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */ |
126 | { 280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87 }, /* 280.2 MHz */ | ||
127 | { 0, 0, 0, 0, 0 } /* last entry */ | 126 | { 0, 0, 0, 0, 0 } /* last entry */ |
128 | }; | 127 | }; |
129 | 128 | ||
130 | static void sa1100_update_dram_timings(int current_speed, int new_speed) | 129 | static void sa1100_update_dram_timings(int current_speed, int new_speed) |
131 | { | 130 | { |
132 | sa1100_dram_regs_t *settings = sa1100_dram_settings; | 131 | struct sa1100_dram_regs *settings = sa1100_dram_settings; |
133 | 132 | ||
134 | /* find speed */ | 133 | /* find speed */ |
135 | while (settings->speed != 0) { | 134 | while (settings->speed != 0) { |
136 | if(new_speed == settings->speed) | 135 | if (new_speed == settings->speed) |
137 | break; | 136 | break; |
138 | 137 | ||
139 | settings++; | 138 | settings++; |
140 | } | 139 | } |
141 | 140 | ||
@@ -149,7 +148,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed) | |||
149 | /* We're going FASTER, so first relax the memory | 148 | /* We're going FASTER, so first relax the memory |
150 | * timings before changing the core frequency | 149 | * timings before changing the core frequency |
151 | */ | 150 | */ |
152 | 151 | ||
153 | /* Half the memory access clock */ | 152 | /* Half the memory access clock */ |
154 | MDCNFG |= MDCNFG_CDB2; | 153 | MDCNFG |= MDCNFG_CDB2; |
155 | 154 | ||
@@ -187,7 +186,7 @@ static int sa1100_target(struct cpufreq_policy *policy, | |||
187 | struct cpufreq_freqs freqs; | 186 | struct cpufreq_freqs freqs; |
188 | 187 | ||
189 | new_ppcr = sa11x0_freq_to_ppcr(target_freq); | 188 | new_ppcr = sa11x0_freq_to_ppcr(target_freq); |
190 | switch(relation){ | 189 | switch (relation) { |
191 | case CPUFREQ_RELATION_L: | 190 | case CPUFREQ_RELATION_L: |
192 | if (sa11x0_ppcr_to_freq(new_ppcr) > policy->max) | 191 | if (sa11x0_ppcr_to_freq(new_ppcr) > policy->max) |
193 | new_ppcr--; | 192 | new_ppcr--; |
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 7252874d328b..675bf8ef97e8 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c | |||
@@ -16,28 +16,24 @@ | |||
16 | * | 16 | * |
17 | * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type | 17 | * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type |
18 | */ | 18 | */ |
19 | #include <linux/moduleparam.h> | ||
20 | #include <linux/types.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/cpufreq.h> | 19 | #include <linux/cpufreq.h> |
24 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
25 | #include <linux/init.h> | 21 | #include <linux/init.h> |
26 | #include <linux/io.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/moduleparam.h> | ||
24 | #include <linux/types.h> | ||
27 | 25 | ||
28 | #include <mach/hardware.h> | ||
29 | #include <asm/cputype.h> | 26 | #include <asm/cputype.h> |
30 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
31 | #include <asm/system.h> | 28 | |
29 | #include <mach/hardware.h> | ||
32 | 30 | ||
33 | #include "generic.h" | 31 | #include "generic.h" |
34 | 32 | ||
35 | #undef DEBUG | 33 | #undef DEBUG |
36 | 34 | ||
37 | static struct cpufreq_driver sa1110_driver; | ||
38 | |||
39 | struct sdram_params { | 35 | struct sdram_params { |
40 | const char name[16]; | 36 | const char name[20]; |
41 | u_char rows; /* bits */ | 37 | u_char rows; /* bits */ |
42 | u_char cas_latency; /* cycles */ | 38 | u_char cas_latency; /* cycles */ |
43 | u_char tck; /* clock cycle time (ns) */ | 39 | u_char tck; /* clock cycle time (ns) */ |
@@ -107,6 +103,15 @@ static struct sdram_params sdram_tbl[] __initdata = { | |||
107 | .twr = 8, | 103 | .twr = 8, |
108 | .refresh = 64000, | 104 | .refresh = 64000, |
109 | .cas_latency = 3, | 105 | .cas_latency = 3, |
106 | }, { /* Micron MT48LC8M16A2TG-75 */ | ||
107 | .name = "MT48LC8M16A2TG-75", | ||
108 | .rows = 12, | ||
109 | .tck = 8, | ||
110 | .trcd = 20, | ||
111 | .trp = 20, | ||
112 | .twr = 8, | ||
113 | .refresh = 64000, | ||
114 | .cas_latency = 3, | ||
110 | }, | 115 | }, |
111 | }; | 116 | }; |
112 | 117 | ||
@@ -180,11 +185,13 @@ sdram_calculate_timing(struct sdram_info *sd, u_int cpu_khz, | |||
180 | sd->mdrefr |= MDREFR_K1DB2; | 185 | sd->mdrefr |= MDREFR_K1DB2; |
181 | 186 | ||
182 | /* initial number of '1's in MDCAS + 1 */ | 187 | /* initial number of '1's in MDCAS + 1 */ |
183 | set_mdcas(sd->mdcas, sd_khz >= 62000, ns_to_cycles(sdram->trcd, mem_khz)); | 188 | set_mdcas(sd->mdcas, sd_khz >= 62000, |
189 | ns_to_cycles(sdram->trcd, mem_khz)); | ||
184 | 190 | ||
185 | #ifdef DEBUG | 191 | #ifdef DEBUG |
186 | printk("MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n", | 192 | printk(KERN_DEBUG "MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n", |
187 | sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], sd->mdcas[2]); | 193 | sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], |
194 | sd->mdcas[2]); | ||
188 | #endif | 195 | #endif |
189 | } | 196 | } |
190 | 197 | ||
@@ -213,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram) | |||
213 | 220 | ||
214 | #ifdef DEBUG | 221 | #ifdef DEBUG |
215 | mdelay(250); | 222 | mdelay(250); |
216 | printk("new dri value = %d\n", dri); | 223 | printk(KERN_DEBUG "new dri value = %d\n", dri); |
217 | #endif | 224 | #endif |
218 | 225 | ||
219 | sdram_set_refresh(dri); | 226 | sdram_set_refresh(dri); |
@@ -232,7 +239,7 @@ static int sa1110_target(struct cpufreq_policy *policy, | |||
232 | unsigned long flags; | 239 | unsigned long flags; |
233 | unsigned int ppcr, unused; | 240 | unsigned int ppcr, unused; |
234 | 241 | ||
235 | switch(relation){ | 242 | switch (relation) { |
236 | case CPUFREQ_RELATION_L: | 243 | case CPUFREQ_RELATION_L: |
237 | ppcr = sa11x0_freq_to_ppcr(target_freq); | 244 | ppcr = sa11x0_freq_to_ppcr(target_freq); |
238 | if (sa11x0_ppcr_to_freq(ppcr) > policy->max) | 245 | if (sa11x0_ppcr_to_freq(ppcr) > policy->max) |
@@ -280,11 +287,10 @@ static int sa1110_target(struct cpufreq_policy *policy, | |||
280 | * We wait 20ms to be safe. | 287 | * We wait 20ms to be safe. |
281 | */ | 288 | */ |
282 | sdram_set_refresh(2); | 289 | sdram_set_refresh(2); |
283 | if (!irqs_disabled()) { | 290 | if (!irqs_disabled()) |
284 | msleep(20); | 291 | msleep(20); |
285 | } else { | 292 | else |
286 | mdelay(20); | 293 | mdelay(20); |
287 | } | ||
288 | 294 | ||
289 | /* | 295 | /* |
290 | * Reprogram the DRAM timings with interrupts disabled, and | 296 | * Reprogram the DRAM timings with interrupts disabled, and |
@@ -295,7 +301,7 @@ static int sa1110_target(struct cpufreq_policy *policy, | |||
295 | local_irq_save(flags); | 301 | local_irq_save(flags); |
296 | asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); | 302 | asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); |
297 | udelay(10); | 303 | udelay(10); |
298 | __asm__ __volatile__(" \n\ | 304 | __asm__ __volatile__("\n\ |
299 | b 2f \n\ | 305 | b 2f \n\ |
300 | .align 5 \n\ | 306 | .align 5 \n\ |
301 | 1: str %3, [%1, #0] @ MDCNFG \n\ | 307 | 1: str %3, [%1, #0] @ MDCNFG \n\ |
@@ -336,7 +342,9 @@ static int __init sa1110_cpu_init(struct cpufreq_policy *policy) | |||
336 | return 0; | 342 | return 0; |
337 | } | 343 | } |
338 | 344 | ||
339 | static struct cpufreq_driver sa1110_driver = { | 345 | /* sa1110_driver needs __refdata because it must remain after init registers |
346 | * it with cpufreq_register_driver() */ | ||
347 | static struct cpufreq_driver sa1110_driver __refdata = { | ||
340 | .flags = CPUFREQ_STICKY, | 348 | .flags = CPUFREQ_STICKY, |
341 | .verify = sa11x0_verify_speed, | 349 | .verify = sa11x0_verify_speed, |
342 | .target = sa1110_target, | 350 | .target = sa1110_target, |
@@ -349,7 +357,8 @@ static struct sdram_params *sa1110_find_sdram(const char *name) | |||
349 | { | 357 | { |
350 | struct sdram_params *sdram; | 358 | struct sdram_params *sdram; |
351 | 359 | ||
352 | for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); sdram++) | 360 | for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl); |
361 | sdram++) | ||
353 | if (strcmp(name, sdram->name) == 0) | 362 | if (strcmp(name, sdram->name) == 0) |
354 | return sdram; | 363 | return sdram; |
355 | 364 | ||
@@ -369,14 +378,14 @@ static int __init sa1110_clk_init(void) | |||
369 | if (!name[0]) { | 378 | if (!name[0]) { |
370 | if (machine_is_assabet()) | 379 | if (machine_is_assabet()) |
371 | name = "TC59SM716-CL3"; | 380 | name = "TC59SM716-CL3"; |
372 | |||
373 | if (machine_is_pt_system3()) | 381 | if (machine_is_pt_system3()) |
374 | name = "K4S641632D"; | 382 | name = "K4S641632D"; |
375 | |||
376 | if (machine_is_h3100()) | 383 | if (machine_is_h3100()) |
377 | name = "KM416S4030CT"; | 384 | name = "KM416S4030CT"; |
378 | if (machine_is_jornada720()) | 385 | if (machine_is_jornada720()) |
379 | name = "K4S281632B-1H"; | 386 | name = "K4S281632B-1H"; |
387 | if (machine_is_nanoengine()) | ||
388 | name = "MT48LC8M16A2TG-75"; | ||
380 | } | 389 | } |
381 | 390 | ||
382 | sdram = sa1110_find_sdram(name); | 391 | sdram = sa1110_find_sdram(name); |
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index fbc224d88e6f..59d14f0fdcf8 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c | |||
@@ -140,10 +140,15 @@ static void sa11x0_register_device(struct platform_device *dev, void *data) | |||
140 | 140 | ||
141 | static struct resource sa11x0udc_resources[] = { | 141 | static struct resource sa11x0udc_resources[] = { |
142 | [0] = { | 142 | [0] = { |
143 | .start = 0x80000000, | 143 | .start = __PREG(Ser0UDCCR), |
144 | .end = 0x8000ffff, | 144 | .end = __PREG(Ser0UDCCR) + 0xffff, |
145 | .flags = IORESOURCE_MEM, | 145 | .flags = IORESOURCE_MEM, |
146 | }, | 146 | }, |
147 | [1] = { | ||
148 | .start = IRQ_Ser0UDC, | ||
149 | .end = IRQ_Ser0UDC, | ||
150 | .flags = IORESOURCE_IRQ, | ||
151 | }, | ||
147 | }; | 152 | }; |
148 | 153 | ||
149 | static u64 sa11x0udc_dma_mask = 0xffffffffUL; | 154 | static u64 sa11x0udc_dma_mask = 0xffffffffUL; |
@@ -161,10 +166,15 @@ static struct platform_device sa11x0udc_device = { | |||
161 | 166 | ||
162 | static struct resource sa11x0uart1_resources[] = { | 167 | static struct resource sa11x0uart1_resources[] = { |
163 | [0] = { | 168 | [0] = { |
164 | .start = 0x80010000, | 169 | .start = __PREG(Ser1UTCR0), |
165 | .end = 0x8001ffff, | 170 | .end = __PREG(Ser1UTCR0) + 0xffff, |
166 | .flags = IORESOURCE_MEM, | 171 | .flags = IORESOURCE_MEM, |
167 | }, | 172 | }, |
173 | [1] = { | ||
174 | .start = IRQ_Ser1UART, | ||
175 | .end = IRQ_Ser1UART, | ||
176 | .flags = IORESOURCE_IRQ, | ||
177 | }, | ||
168 | }; | 178 | }; |
169 | 179 | ||
170 | static struct platform_device sa11x0uart1_device = { | 180 | static struct platform_device sa11x0uart1_device = { |
@@ -176,10 +186,15 @@ static struct platform_device sa11x0uart1_device = { | |||
176 | 186 | ||
177 | static struct resource sa11x0uart3_resources[] = { | 187 | static struct resource sa11x0uart3_resources[] = { |
178 | [0] = { | 188 | [0] = { |
179 | .start = 0x80050000, | 189 | .start = __PREG(Ser3UTCR0), |
180 | .end = 0x8005ffff, | 190 | .end = __PREG(Ser3UTCR0) + 0xffff, |
181 | .flags = IORESOURCE_MEM, | 191 | .flags = IORESOURCE_MEM, |
182 | }, | 192 | }, |
193 | [1] = { | ||
194 | .start = IRQ_Ser3UART, | ||
195 | .end = IRQ_Ser3UART, | ||
196 | .flags = IORESOURCE_IRQ, | ||
197 | }, | ||
183 | }; | 198 | }; |
184 | 199 | ||
185 | static struct platform_device sa11x0uart3_device = { | 200 | static struct platform_device sa11x0uart3_device = { |
@@ -191,10 +206,15 @@ static struct platform_device sa11x0uart3_device = { | |||
191 | 206 | ||
192 | static struct resource sa11x0mcp_resources[] = { | 207 | static struct resource sa11x0mcp_resources[] = { |
193 | [0] = { | 208 | [0] = { |
194 | .start = 0x80060000, | 209 | .start = __PREG(Ser4MCCR0), |
195 | .end = 0x8006ffff, | 210 | .end = __PREG(Ser4MCCR0) + 0xffff, |
196 | .flags = IORESOURCE_MEM, | 211 | .flags = IORESOURCE_MEM, |
197 | }, | 212 | }, |
213 | [1] = { | ||
214 | .start = IRQ_Ser4MCP, | ||
215 | .end = IRQ_Ser4MCP, | ||
216 | .flags = IORESOURCE_IRQ, | ||
217 | }, | ||
198 | }; | 218 | }; |
199 | 219 | ||
200 | static u64 sa11x0mcp_dma_mask = 0xffffffffUL; | 220 | static u64 sa11x0mcp_dma_mask = 0xffffffffUL; |
@@ -221,6 +241,11 @@ static struct resource sa11x0ssp_resources[] = { | |||
221 | .end = 0x8007ffff, | 241 | .end = 0x8007ffff, |
222 | .flags = IORESOURCE_MEM, | 242 | .flags = IORESOURCE_MEM, |
223 | }, | 243 | }, |
244 | [1] = { | ||
245 | .start = IRQ_Ser4SSP, | ||
246 | .end = IRQ_Ser4SSP, | ||
247 | .flags = IORESOURCE_IRQ, | ||
248 | }, | ||
224 | }; | 249 | }; |
225 | 250 | ||
226 | static u64 sa11x0ssp_dma_mask = 0xffffffffUL; | 251 | static u64 sa11x0ssp_dma_mask = 0xffffffffUL; |
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index 99f5856d8de4..967ae7684390 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h | |||
@@ -76,4 +76,12 @@ static inline unsigned long get_clock_tick_rate(void) | |||
76 | #include "SA-1101.h" | 76 | #include "SA-1101.h" |
77 | #endif | 77 | #endif |
78 | 78 | ||
79 | #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_PCI) | ||
80 | #define PCIBIOS_MIN_IO 0 | ||
81 | #define PCIBIOS_MIN_MEM 0 | ||
82 | #define pcibios_assign_all_busses() 1 | ||
83 | #define HAVE_ARCH_PCI_SET_DMA_MASK 1 | ||
84 | #endif | ||
85 | |||
86 | |||
79 | #endif /* _ASM_ARCH_HARDWARE_H */ | 87 | #endif /* _ASM_ARCH_HARDWARE_H */ |
diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h new file mode 100644 index 000000000000..14f8382d0665 --- /dev/null +++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h | |||
@@ -0,0 +1,52 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-sa1100/include/mach/nanoengine.h | ||
3 | * | ||
4 | * This file contains the hardware specific definitions for nanoEngine. | ||
5 | * Only include this file from SA1100-specific files. | ||
6 | * | ||
7 | * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | */ | ||
14 | #ifndef __ASM_ARCH_NANOENGINE_H | ||
15 | #define __ASM_ARCH_NANOENGINE_H | ||
16 | |||
17 | #include <mach/irqs.h> | ||
18 | |||
19 | #define GPIO_PC_READY0 GPIO_GPIO(11) /* ready for socket 0 (active high)*/ | ||
20 | #define GPIO_PC_READY1 GPIO_GPIO(12) /* ready for socket 1 (active high) */ | ||
21 | #define GPIO_PC_CD0 GPIO_GPIO(13) /* detect for socket 0 (active low) */ | ||
22 | #define GPIO_PC_CD1 GPIO_GPIO(14) /* detect for socket 1 (active low) */ | ||
23 | #define GPIO_PC_RESET0 GPIO_GPIO(15) /* reset socket 0 */ | ||
24 | #define GPIO_PC_RESET1 GPIO_GPIO(16) /* reset socket 1 */ | ||
25 | |||
26 | #define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0 | ||
27 | #define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11 | ||
28 | #define NANOENGINE_IRQ_GPIO_PC_READY1 IRQ_GPIO12 | ||
29 | #define NANOENGINE_IRQ_GPIO_PC_CD0 IRQ_GPIO13 | ||
30 | #define NANOENGINE_IRQ_GPIO_PC_CD1 IRQ_GPIO14 | ||
31 | |||
32 | /* | ||
33 | * nanoEngine Memory Map: | ||
34 | * | ||
35 | * 0000.0000 - 003F.0000 - 4 MB Flash | ||
36 | * C000.0000 - C1FF.FFFF - 32 MB SDRAM | ||
37 | * 1860.0000 - 186F.FFFF - 1 MB Internal PCI Memory Read/Write | ||
38 | * 18A1.0000 - 18A1.FFFF - 64 KB Internal PCI Config Space | ||
39 | * 4000.0000 - 47FF.FFFF - 128 MB External Bus I/O - Multiplexed Mode | ||
40 | * 4800.0000 - 4FFF.FFFF - 128 MB External Bus I/O - Non-Multiplexed Mode | ||
41 | * | ||
42 | */ | ||
43 | |||
44 | #define NANO_PCI_MEM_RW_PHYS 0x18600000 | ||
45 | #define NANO_PCI_MEM_RW_VIRT 0xf1000000 | ||
46 | #define NANO_PCI_MEM_RW_SIZE SZ_1M | ||
47 | #define NANO_PCI_CONFIG_SPACE_PHYS 0x18A10000 | ||
48 | #define NANO_PCI_CONFIG_SPACE_VIRT 0xf2000000 | ||
49 | #define NANO_PCI_CONFIG_SPACE_SIZE SZ_64K | ||
50 | |||
51 | #endif | ||
52 | |||
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c new file mode 100644 index 000000000000..72087f0658b7 --- /dev/null +++ b/arch/arm/mach-sa1100/nanoengine.c | |||
@@ -0,0 +1,119 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-sa1100/nanoengine.c | ||
3 | * | ||
4 | * Bright Star Engineering's nanoEngine board init code. | ||
5 | * | ||
6 | * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/mtd/mtd.h> | ||
17 | #include <linux/mtd/partitions.h> | ||
18 | #include <linux/root_dev.h> | ||
19 | |||
20 | #include <asm/mach-types.h> | ||
21 | #include <asm/setup.h> | ||
22 | |||
23 | #include <asm/mach/arch.h> | ||
24 | #include <asm/mach/flash.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/mach/serial_sa1100.h> | ||
27 | |||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/nanoengine.h> | ||
30 | |||
31 | #include "generic.h" | ||
32 | |||
33 | /* Flash bank 0 */ | ||
34 | static struct mtd_partition nanoengine_partitions[] = { | ||
35 | { | ||
36 | .name = "nanoEngine boot firmware and parameter table", | ||
37 | .size = 0x00010000, /* 32K */ | ||
38 | .offset = 0, | ||
39 | .mask_flags = MTD_WRITEABLE, | ||
40 | }, { | ||
41 | .name = "kernel/initrd reserved", | ||
42 | .size = 0x002f0000, | ||
43 | .offset = 0x00010000, | ||
44 | .mask_flags = MTD_WRITEABLE, | ||
45 | }, { | ||
46 | .name = "experimental filesystem allocation", | ||
47 | .size = 0x00100000, | ||
48 | .offset = 0x00300000, | ||
49 | .mask_flags = MTD_WRITEABLE, | ||
50 | } | ||
51 | }; | ||
52 | |||
53 | static struct flash_platform_data nanoengine_flash_data = { | ||
54 | .map_name = "jedec_probe", | ||
55 | .parts = nanoengine_partitions, | ||
56 | .nr_parts = ARRAY_SIZE(nanoengine_partitions), | ||
57 | }; | ||
58 | |||
59 | static struct resource nanoengine_flash_resources[] = { | ||
60 | { | ||
61 | .start = SA1100_CS0_PHYS, | ||
62 | .end = SA1100_CS0_PHYS + SZ_32M - 1, | ||
63 | .flags = IORESOURCE_MEM, | ||
64 | }, { | ||
65 | .start = SA1100_CS1_PHYS, | ||
66 | .end = SA1100_CS1_PHYS + SZ_32M - 1, | ||
67 | .flags = IORESOURCE_MEM, | ||
68 | } | ||
69 | }; | ||
70 | |||
71 | static struct map_desc nanoengine_io_desc[] __initdata = { | ||
72 | { | ||
73 | /* System Registers */ | ||
74 | .virtual = 0xf0000000, | ||
75 | .pfn = __phys_to_pfn(0x10000000), | ||
76 | .length = 0x00100000, | ||
77 | .type = MT_DEVICE | ||
78 | }, { | ||
79 | /* Internal PCI Memory Read/Write */ | ||
80 | .virtual = NANO_PCI_MEM_RW_VIRT, | ||
81 | .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS), | ||
82 | .length = NANO_PCI_MEM_RW_SIZE, | ||
83 | .type = MT_DEVICE | ||
84 | }, { | ||
85 | /* Internal PCI Config Space */ | ||
86 | .virtual = NANO_PCI_CONFIG_SPACE_VIRT, | ||
87 | .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS), | ||
88 | .length = NANO_PCI_CONFIG_SPACE_SIZE, | ||
89 | .type = MT_DEVICE | ||
90 | } | ||
91 | }; | ||
92 | |||
93 | static void __init nanoengine_map_io(void) | ||
94 | { | ||
95 | sa1100_map_io(); | ||
96 | iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc)); | ||
97 | |||
98 | sa1100_register_uart(0, 1); | ||
99 | sa1100_register_uart(1, 2); | ||
100 | sa1100_register_uart(2, 3); | ||
101 | Ser1SDCR0 |= SDCR0_UART; | ||
102 | /* disable IRDA -- UART2 is used as a normal serial port */ | ||
103 | Ser2UTCR4 = 0; | ||
104 | Ser2HSCR0 = 0; | ||
105 | } | ||
106 | |||
107 | static void __init nanoengine_init(void) | ||
108 | { | ||
109 | sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources, | ||
110 | ARRAY_SIZE(nanoengine_flash_resources)); | ||
111 | } | ||
112 | |||
113 | MACHINE_START(NANOENGINE, "BSE nanoEngine") | ||
114 | .boot_params = 0xc0000000, | ||
115 | .map_io = nanoengine_map_io, | ||
116 | .init_irq = sa1100_init_irq, | ||
117 | .timer = &sa1100_timer, | ||
118 | .init_machine = nanoengine_init, | ||
119 | MACHINE_END | ||
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c new file mode 100644 index 000000000000..fba7a913f12b --- /dev/null +++ b/arch/arm/mach-sa1100/pci-nanoengine.c | |||
@@ -0,0 +1,284 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-sa1100/pci-nanoengine.c | ||
3 | * | ||
4 | * PCI functions for BSE nanoEngine PCI | ||
5 | * | ||
6 | * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/irq.h> | ||
24 | #include <linux/pci.h> | ||
25 | #include <linux/spinlock.h> | ||
26 | |||
27 | #include <asm/mach/pci.h> | ||
28 | #include <asm/mach-types.h> | ||
29 | |||
30 | #include <mach/nanoengine.h> | ||
31 | |||
32 | static DEFINE_SPINLOCK(nano_lock); | ||
33 | |||
34 | static int nanoengine_get_pci_address(struct pci_bus *bus, | ||
35 | unsigned int devfn, int where, unsigned long *address) | ||
36 | { | ||
37 | int ret = PCIBIOS_DEVICE_NOT_FOUND; | ||
38 | unsigned int busnr = bus->number; | ||
39 | |||
40 | *address = NANO_PCI_CONFIG_SPACE_VIRT + | ||
41 | ((bus->number << 16) | (devfn << 8) | (where & ~3)); | ||
42 | |||
43 | ret = (busnr > 255 || devfn > 255 || where > 255) ? | ||
44 | PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; | ||
45 | |||
46 | return ret; | ||
47 | } | ||
48 | |||
49 | static int nanoengine_read_config(struct pci_bus *bus, unsigned int devfn, int where, | ||
50 | int size, u32 *val) | ||
51 | { | ||
52 | int ret; | ||
53 | unsigned long address; | ||
54 | unsigned long flags; | ||
55 | u32 v; | ||
56 | |||
57 | /* nanoEngine PCI bridge does not return -1 for a non-existing | ||
58 | * device. We must fake the answer. We know that the only valid | ||
59 | * device is device zero at bus 0, which is the network chip. */ | ||
60 | if (bus->number != 0 || (devfn >> 3) != 0) { | ||
61 | v = -1; | ||
62 | nanoengine_get_pci_address(bus, devfn, where, &address); | ||
63 | goto exit_function; | ||
64 | } | ||
65 | |||
66 | spin_lock_irqsave(&nano_lock, flags); | ||
67 | |||
68 | ret = nanoengine_get_pci_address(bus, devfn, where, &address); | ||
69 | if (ret != PCIBIOS_SUCCESSFUL) | ||
70 | return ret; | ||
71 | v = __raw_readl(address); | ||
72 | |||
73 | spin_unlock_irqrestore(&nano_lock, flags); | ||
74 | |||
75 | v >>= ((where & 3) * 8); | ||
76 | v &= (unsigned long)(-1) >> ((4 - size) * 8); | ||
77 | |||
78 | exit_function: | ||
79 | *val = v; | ||
80 | return PCIBIOS_SUCCESSFUL; | ||
81 | } | ||
82 | |||
83 | static int nanoengine_write_config(struct pci_bus *bus, unsigned int devfn, int where, | ||
84 | int size, u32 val) | ||
85 | { | ||
86 | int ret; | ||
87 | unsigned long address; | ||
88 | unsigned long flags; | ||
89 | unsigned shift; | ||
90 | u32 v; | ||
91 | |||
92 | shift = (where & 3) * 8; | ||
93 | |||
94 | spin_lock_irqsave(&nano_lock, flags); | ||
95 | |||
96 | ret = nanoengine_get_pci_address(bus, devfn, where, &address); | ||
97 | if (ret != PCIBIOS_SUCCESSFUL) | ||
98 | return ret; | ||
99 | v = __raw_readl(address); | ||
100 | switch (size) { | ||
101 | case 1: | ||
102 | v &= ~(0xFF << shift); | ||
103 | v |= val << shift; | ||
104 | break; | ||
105 | case 2: | ||
106 | v &= ~(0xFFFF << shift); | ||
107 | v |= val << shift; | ||
108 | break; | ||
109 | case 4: | ||
110 | v = val; | ||
111 | break; | ||
112 | } | ||
113 | __raw_writel(v, address); | ||
114 | |||
115 | spin_unlock_irqrestore(&nano_lock, flags); | ||
116 | |||
117 | return PCIBIOS_SUCCESSFUL; | ||
118 | } | ||
119 | |||
120 | static struct pci_ops pci_nano_ops = { | ||
121 | .read = nanoengine_read_config, | ||
122 | .write = nanoengine_write_config, | ||
123 | }; | ||
124 | |||
125 | static int __init pci_nanoengine_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
126 | { | ||
127 | return NANOENGINE_IRQ_GPIO_PCI; | ||
128 | } | ||
129 | |||
130 | struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys) | ||
131 | { | ||
132 | return pci_scan_bus(sys->busnr, &pci_nano_ops, sys); | ||
133 | } | ||
134 | |||
135 | static struct resource pci_io_ports = { | ||
136 | .name = "PCI IO", | ||
137 | .start = 0x400, | ||
138 | .end = 0x7FF, | ||
139 | .flags = IORESOURCE_IO, | ||
140 | }; | ||
141 | |||
142 | static struct resource pci_non_prefetchable_memory = { | ||
143 | .name = "PCI non-prefetchable", | ||
144 | .start = NANO_PCI_MEM_RW_PHYS, | ||
145 | /* nanoEngine documentation says there is a 1 Megabyte window here, | ||
146 | * but PCI reports just 128 + 8 kbytes. */ | ||
147 | .end = NANO_PCI_MEM_RW_PHYS + NANO_PCI_MEM_RW_SIZE - 1, | ||
148 | /* .end = NANO_PCI_MEM_RW_PHYS + SZ_128K + SZ_8K - 1,*/ | ||
149 | .flags = IORESOURCE_MEM, | ||
150 | }; | ||
151 | |||
152 | /* | ||
153 | * nanoEngine PCI reports 1 Megabyte of prefetchable memory, but it | ||
154 | * overlaps with previously defined memory. | ||
155 | * | ||
156 | * Here is what happens: | ||
157 | * | ||
158 | # dmesg | ||
159 | ... | ||
160 | pci 0000:00:00.0: [8086:1209] type 0 class 0x000200 | ||
161 | pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff] | ||
162 | pci 0000:00:00.0: reg 14: [io 0x0000-0x003f] | ||
163 | pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff] | ||
164 | pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref] | ||
165 | pci 0000:00:00.0: supports D1 D2 | ||
166 | pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot | ||
167 | pci 0000:00:00.0: PME# disabled | ||
168 | PCI: bus0: Fast back to back transfers enabled | ||
169 | pci 0000:00:00.0: BAR 6: can't assign mem pref (size 0x100000) | ||
170 | pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff] | ||
171 | pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff]) | ||
172 | pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff] | ||
173 | pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff]) | ||
174 | pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f] | ||
175 | pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f]) | ||
176 | * | ||
177 | * On the other hand, if we do not request the prefetchable memory resource, | ||
178 | * linux will alloc it first and the two non-prefetchable memory areas that | ||
179 | * are our real interest will not be mapped. So we choose to map it to an | ||
180 | * unused area. It gets recognized as expansion ROM, but becomes disabled. | ||
181 | * | ||
182 | * Here is what happens then: | ||
183 | * | ||
184 | # dmesg | ||
185 | ... | ||
186 | pci 0000:00:00.0: [8086:1209] type 0 class 0x000200 | ||
187 | pci 0000:00:00.0: reg 10: [mem 0x00021000-0x00021fff] | ||
188 | pci 0000:00:00.0: reg 14: [io 0x0000-0x003f] | ||
189 | pci 0000:00:00.0: reg 18: [mem 0x00000000-0x0001ffff] | ||
190 | pci 0000:00:00.0: reg 30: [mem 0x00000000-0x000fffff pref] | ||
191 | pci 0000:00:00.0: supports D1 D2 | ||
192 | pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot | ||
193 | pci 0000:00:00.0: PME# disabled | ||
194 | PCI: bus0: Fast back to back transfers enabled | ||
195 | pci 0000:00:00.0: BAR 6: assigned [mem 0x78000000-0x780fffff pref] | ||
196 | pci 0000:00:00.0: BAR 2: assigned [mem 0x18600000-0x1861ffff] | ||
197 | pci 0000:00:00.0: BAR 2: set to [mem 0x18600000-0x1861ffff] (PCI address [0x0-0x1ffff]) | ||
198 | pci 0000:00:00.0: BAR 0: assigned [mem 0x18620000-0x18620fff] | ||
199 | pci 0000:00:00.0: BAR 0: set to [mem 0x18620000-0x18620fff] (PCI address [0x20000-0x20fff]) | ||
200 | pci 0000:00:00.0: BAR 1: assigned [io 0x0400-0x043f] | ||
201 | pci 0000:00:00.0: BAR 1: set to [io 0x0400-0x043f] (PCI address [0x0-0x3f]) | ||
202 | |||
203 | # lspci -vv -s 0000:00:00.0 | ||
204 | 00:00.0 Class 0200: Device 8086:1209 (rev 09) | ||
205 | Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx- | ||
206 | Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR+ <PERR+ INTx- | ||
207 | Latency: 0 (2000ns min, 14000ns max), Cache Line Size: 32 bytes | ||
208 | Interrupt: pin A routed to IRQ 0 | ||
209 | Region 0: Memory at 18620000 (32-bit, non-prefetchable) [size=4K] | ||
210 | Region 1: I/O ports at 0400 [size=64] | ||
211 | Region 2: [virtual] Memory at 18600000 (32-bit, non-prefetchable) [size=128K] | ||
212 | [virtual] Expansion ROM at 78000000 [disabled] [size=1M] | ||
213 | Capabilities: [dc] Power Management version 2 | ||
214 | Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) | ||
215 | Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=2 PME- | ||
216 | Kernel driver in use: e100 | ||
217 | Kernel modules: e100 | ||
218 | * | ||
219 | */ | ||
220 | static struct resource pci_prefetchable_memory = { | ||
221 | .name = "PCI prefetchable", | ||
222 | .start = 0x78000000, | ||
223 | .end = 0x78000000 + NANO_PCI_MEM_RW_SIZE - 1, | ||
224 | .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH, | ||
225 | }; | ||
226 | |||
227 | static int __init pci_nanoengine_setup_resources(struct resource **resource) | ||
228 | { | ||
229 | if (request_resource(&ioport_resource, &pci_io_ports)) { | ||
230 | printk(KERN_ERR "PCI: unable to allocate io port region\n"); | ||
231 | return -EBUSY; | ||
232 | } | ||
233 | if (request_resource(&iomem_resource, &pci_non_prefetchable_memory)) { | ||
234 | release_resource(&pci_io_ports); | ||
235 | printk(KERN_ERR "PCI: unable to allocate non prefetchable\n"); | ||
236 | return -EBUSY; | ||
237 | } | ||
238 | if (request_resource(&iomem_resource, &pci_prefetchable_memory)) { | ||
239 | release_resource(&pci_io_ports); | ||
240 | release_resource(&pci_non_prefetchable_memory); | ||
241 | printk(KERN_ERR "PCI: unable to allocate prefetchable\n"); | ||
242 | return -EBUSY; | ||
243 | } | ||
244 | resource[0] = &pci_io_ports; | ||
245 | resource[1] = &pci_non_prefetchable_memory; | ||
246 | resource[2] = &pci_prefetchable_memory; | ||
247 | |||
248 | return 1; | ||
249 | } | ||
250 | |||
251 | int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys) | ||
252 | { | ||
253 | int ret = 0; | ||
254 | |||
255 | if (nr == 0) { | ||
256 | sys->mem_offset = NANO_PCI_MEM_RW_PHYS; | ||
257 | sys->io_offset = 0x400; | ||
258 | ret = pci_nanoengine_setup_resources(sys->resource); | ||
259 | /* Enable alternate memory bus master mode, see | ||
260 | * "Intel StrongARM SA1110 Developer's Manual", | ||
261 | * section 10.8, "Alternate Memory Bus Master Mode". */ | ||
262 | GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; | ||
263 | GAFR |= GPIO_MBGNT | GPIO_MBREQ; | ||
264 | TUCR |= TUCR_MBGPIO; | ||
265 | } | ||
266 | |||
267 | return ret; | ||
268 | } | ||
269 | |||
270 | static struct hw_pci nanoengine_pci __initdata = { | ||
271 | .map_irq = pci_nanoengine_map_irq, | ||
272 | .nr_controllers = 1, | ||
273 | .scan = pci_nanoengine_scan_bus, | ||
274 | .setup = pci_nanoengine_setup, | ||
275 | }; | ||
276 | |||
277 | static int __init nanoengine_pci_init(void) | ||
278 | { | ||
279 | if (machine_is_nanoengine()) | ||
280 | pci_common_init(&nanoengine_pci); | ||
281 | return 0; | ||
282 | } | ||
283 | |||
284 | subsys_initcall(nanoengine_pci_init); | ||
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 27692d0ffbe8..cfb76077bd25 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c | |||
@@ -166,9 +166,6 @@ static void __init simpad_map_io(void) | |||
166 | PCFR = 0; | 166 | PCFR = 0; |
167 | PSDR = 0; | 167 | PSDR = 0; |
168 | 168 | ||
169 | sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, | ||
170 | ARRAY_SIZE(simpad_flash_resources)); | ||
171 | sa11x0_register_mcp(&simpad_mcp_data); | ||
172 | } | 169 | } |
173 | 170 | ||
174 | static void simpad_power_off(void) | 171 | static void simpad_power_off(void) |
@@ -216,6 +213,10 @@ static int __init simpad_init(void) | |||
216 | 213 | ||
217 | pm_power_off = simpad_power_off; | 214 | pm_power_off = simpad_power_off; |
218 | 215 | ||
216 | sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, | ||
217 | ARRAY_SIZE(simpad_flash_resources)); | ||
218 | sa11x0_register_mcp(&simpad_mcp_data); | ||
219 | |||
219 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 220 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
220 | if(ret) | 221 | if(ret) |
221 | printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device"); | 222 | printk(KERN_WARNING "simpad: Unable to register mq200 framebuffer device"); |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index d3260542b943..ac429ff2c20d 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -61,6 +61,7 @@ | |||
61 | #include <asm/mach/arch.h> | 61 | #include <asm/mach/arch.h> |
62 | #include <asm/mach/map.h> | 62 | #include <asm/mach/map.h> |
63 | #include <asm/mach/time.h> | 63 | #include <asm/mach/time.h> |
64 | #include <asm/setup.h> | ||
64 | 65 | ||
65 | /* | 66 | /* |
66 | * Address Interface BusWidth note | 67 | * Address Interface BusWidth note |
@@ -567,38 +568,127 @@ static struct platform_device *qhd_devices[] __initdata = { | |||
567 | 568 | ||
568 | /* FSI */ | 569 | /* FSI */ |
569 | #define IRQ_FSI evt2irq(0x1840) | 570 | #define IRQ_FSI evt2irq(0x1840) |
571 | static int __fsi_set_rate(struct clk *clk, long rate, int enable) | ||
572 | { | ||
573 | int ret = 0; | ||
574 | |||
575 | if (rate <= 0) | ||
576 | return ret; | ||
577 | |||
578 | if (enable) { | ||
579 | ret = clk_set_rate(clk, rate); | ||
580 | if (0 == ret) | ||
581 | ret = clk_enable(clk); | ||
582 | } else { | ||
583 | clk_disable(clk); | ||
584 | } | ||
585 | |||
586 | return ret; | ||
587 | } | ||
588 | |||
589 | static int __fsi_set_round_rate(struct clk *clk, long rate, int enable) | ||
590 | { | ||
591 | return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable); | ||
592 | } | ||
570 | 593 | ||
571 | static int fsi_set_rate(int is_porta, int rate) | 594 | static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable) |
595 | { | ||
596 | struct clk *fsia_ick; | ||
597 | struct clk *fsiack; | ||
598 | int ret = -EIO; | ||
599 | |||
600 | fsia_ick = clk_get(dev, "icka"); | ||
601 | if (IS_ERR(fsia_ick)) | ||
602 | return PTR_ERR(fsia_ick); | ||
603 | |||
604 | /* | ||
605 | * FSIACK is connected to AK4642, | ||
606 | * and use external clock pin from it. | ||
607 | * it is parent of fsia_ick now. | ||
608 | */ | ||
609 | fsiack = clk_get_parent(fsia_ick); | ||
610 | if (!fsiack) | ||
611 | goto fsia_ick_out; | ||
612 | |||
613 | /* | ||
614 | * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick | ||
615 | * | ||
616 | ** FIXME ** | ||
617 | * Because the freq_table of external clk (fsiack) are all 0, | ||
618 | * the return value of clk_round_rate became 0. | ||
619 | * So, it use __fsi_set_rate here. | ||
620 | */ | ||
621 | ret = __fsi_set_rate(fsiack, rate, enable); | ||
622 | if (ret < 0) | ||
623 | goto fsiack_out; | ||
624 | |||
625 | ret = __fsi_set_round_rate(fsia_ick, rate, enable); | ||
626 | if ((ret < 0) && enable) | ||
627 | __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */ | ||
628 | |||
629 | fsiack_out: | ||
630 | clk_put(fsiack); | ||
631 | |||
632 | fsia_ick_out: | ||
633 | clk_put(fsia_ick); | ||
634 | |||
635 | return 0; | ||
636 | } | ||
637 | |||
638 | static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable) | ||
572 | { | 639 | { |
573 | struct clk *fsib_clk; | 640 | struct clk *fsib_clk; |
574 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; | 641 | struct clk *fdiv_clk = &sh7372_fsidivb_clk; |
642 | long fsib_rate = 0; | ||
643 | long fdiv_rate = 0; | ||
644 | int ackmd_bpfmd; | ||
575 | int ret; | 645 | int ret; |
576 | 646 | ||
577 | /* set_rate is not needed if port A */ | ||
578 | if (is_porta) | ||
579 | return 0; | ||
580 | |||
581 | fsib_clk = clk_get(NULL, "fsib_clk"); | ||
582 | if (IS_ERR(fsib_clk)) | ||
583 | return -EINVAL; | ||
584 | |||
585 | switch (rate) { | 647 | switch (rate) { |
586 | case 44100: | 648 | case 44100: |
587 | clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 11283000)); | 649 | fsib_rate = rate * 256; |
588 | ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | 650 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; |
589 | break; | 651 | break; |
590 | case 48000: | 652 | case 48000: |
591 | clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000)); | 653 | fsib_rate = 85428000; /* around 48kHz x 256 x 7 */ |
592 | clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000)); | 654 | fdiv_rate = rate * 256; |
593 | ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; | 655 | ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; |
594 | break; | 656 | break; |
595 | default: | 657 | default: |
596 | pr_err("unsupported rate in FSI2 port B\n"); | 658 | pr_err("unsupported rate in FSI2 port B\n"); |
597 | ret = -EINVAL; | 659 | return -EINVAL; |
598 | break; | ||
599 | } | 660 | } |
600 | 661 | ||
662 | /* FSI B setting */ | ||
663 | fsib_clk = clk_get(dev, "ickb"); | ||
664 | if (IS_ERR(fsib_clk)) | ||
665 | return -EIO; | ||
666 | |||
667 | ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable); | ||
601 | clk_put(fsib_clk); | 668 | clk_put(fsib_clk); |
669 | if (ret < 0) | ||
670 | return ret; | ||
671 | |||
672 | /* FSI DIV setting */ | ||
673 | ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable); | ||
674 | if (ret < 0) { | ||
675 | /* disable FSI B */ | ||
676 | if (enable) | ||
677 | __fsi_set_round_rate(fsib_clk, fsib_rate, 0); | ||
678 | return ret; | ||
679 | } | ||
680 | |||
681 | return ackmd_bpfmd; | ||
682 | } | ||
683 | |||
684 | static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable) | ||
685 | { | ||
686 | int ret; | ||
687 | |||
688 | if (is_porta) | ||
689 | ret = fsi_ak4642_set_rate(dev, rate, enable); | ||
690 | else | ||
691 | ret = fsi_hdmi_set_rate(dev, rate, enable); | ||
602 | 692 | ||
603 | return ret; | 693 | return ret; |
604 | } | 694 | } |
@@ -880,6 +970,11 @@ static int __init hdmi_init_pm_clock(void) | |||
880 | goto out; | 970 | goto out; |
881 | } | 971 | } |
882 | 972 | ||
973 | ret = clk_enable(&sh7372_pllc2_clk); | ||
974 | if (ret < 0) { | ||
975 | pr_err("Cannot enable pllc2 clock\n"); | ||
976 | goto out; | ||
977 | } | ||
883 | pr_debug("PLLC2 set frequency %lu\n", rate); | 978 | pr_debug("PLLC2 set frequency %lu\n", rate); |
884 | 979 | ||
885 | ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); | 980 | ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); |
@@ -896,23 +991,11 @@ out: | |||
896 | 991 | ||
897 | device_initcall(hdmi_init_pm_clock); | 992 | device_initcall(hdmi_init_pm_clock); |
898 | 993 | ||
899 | #define FSIACK_DUMMY_RATE 48000 | ||
900 | static int __init fsi_init_pm_clock(void) | 994 | static int __init fsi_init_pm_clock(void) |
901 | { | 995 | { |
902 | struct clk *fsia_ick; | 996 | struct clk *fsia_ick; |
903 | int ret; | 997 | int ret; |
904 | 998 | ||
905 | /* | ||
906 | * FSIACK is connected to AK4642, | ||
907 | * and the rate is depend on playing sound rate. | ||
908 | * So, set dummy rate (= 48k) here | ||
909 | */ | ||
910 | ret = clk_set_rate(&sh7372_fsiack_clk, FSIACK_DUMMY_RATE); | ||
911 | if (ret < 0) { | ||
912 | pr_err("Cannot set FSIACK dummy rate: %d\n", ret); | ||
913 | return ret; | ||
914 | } | ||
915 | |||
916 | fsia_ick = clk_get(&fsi_device.dev, "icka"); | 999 | fsia_ick = clk_get(&fsi_device.dev, "icka"); |
917 | if (IS_ERR(fsia_ick)) { | 1000 | if (IS_ERR(fsia_ick)) { |
918 | ret = PTR_ERR(fsia_ick); | 1001 | ret = PTR_ERR(fsia_ick); |
@@ -921,16 +1004,9 @@ static int __init fsi_init_pm_clock(void) | |||
921 | } | 1004 | } |
922 | 1005 | ||
923 | ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); | 1006 | ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); |
924 | if (ret < 0) { | ||
925 | pr_err("Cannot set FSI-A parent: %d\n", ret); | ||
926 | goto out; | ||
927 | } | ||
928 | |||
929 | ret = clk_set_rate(fsia_ick, FSIACK_DUMMY_RATE); | ||
930 | if (ret < 0) | 1007 | if (ret < 0) |
931 | pr_err("Cannot set FSI-A rate: %d\n", ret); | 1008 | pr_err("Cannot set FSI-A parent: %d\n", ret); |
932 | 1009 | ||
933 | out: | ||
934 | clk_put(fsia_ick); | 1010 | clk_put(fsia_ick); |
935 | 1011 | ||
936 | return ret; | 1012 | return ret; |
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index b25ce90a346e..3aa026069435 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c | |||
@@ -229,21 +229,13 @@ static int pllc2_set_rate(struct clk *clk, unsigned long rate) | |||
229 | if (idx < 0) | 229 | if (idx < 0) |
230 | return idx; | 230 | return idx; |
231 | 231 | ||
232 | if (rate == clk->parent->rate) { | 232 | if (rate == clk->parent->rate) |
233 | pllc2_disable(clk); | 233 | return -EINVAL; |
234 | return 0; | ||
235 | } | ||
236 | 234 | ||
237 | value = __raw_readl(PLLC2CR) & ~(0x3f << 24); | 235 | value = __raw_readl(PLLC2CR) & ~(0x3f << 24); |
238 | 236 | ||
239 | if (value & 0x80000000) | ||
240 | pllc2_disable(clk); | ||
241 | |||
242 | __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); | 237 | __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); |
243 | 238 | ||
244 | if (value & 0x80000000) | ||
245 | return pllc2_enable(clk); | ||
246 | |||
247 | return 0; | 239 | return 0; |
248 | } | 240 | } |
249 | 241 | ||
@@ -452,10 +444,8 @@ static int fsidiv_enable(struct clk *clk) | |||
452 | unsigned long value; | 444 | unsigned long value; |
453 | 445 | ||
454 | value = __raw_readl(clk->mapping->base) >> 16; | 446 | value = __raw_readl(clk->mapping->base) >> 16; |
455 | if (value < 2) { | 447 | if (value < 2) |
456 | fsidiv_disable(clk); | 448 | return -EIO; |
457 | return -ENOENT; | ||
458 | } | ||
459 | 449 | ||
460 | __raw_writel((value << 16) | 0x3, clk->mapping->base); | 450 | __raw_writel((value << 16) | 0x3, clk->mapping->base); |
461 | 451 | ||
@@ -466,17 +456,12 @@ static int fsidiv_set_rate(struct clk *clk, unsigned long rate) | |||
466 | { | 456 | { |
467 | int idx; | 457 | int idx; |
468 | 458 | ||
469 | if (clk->parent->rate == rate) { | ||
470 | fsidiv_disable(clk); | ||
471 | return 0; | ||
472 | } | ||
473 | |||
474 | idx = (clk->parent->rate / rate) & 0xffff; | 459 | idx = (clk->parent->rate / rate) & 0xffff; |
475 | if (idx < 2) | 460 | if (idx < 2) |
476 | return -ENOENT; | 461 | return -EINVAL; |
477 | 462 | ||
478 | __raw_writel(idx << 16, clk->mapping->base); | 463 | __raw_writel(idx << 16, clk->mapping->base); |
479 | return fsidiv_enable(clk); | 464 | return 0; |
480 | } | 465 | } |
481 | 466 | ||
482 | static struct clk_ops fsidiv_clk_ops = { | 467 | static struct clk_ops fsidiv_clk_ops = { |
@@ -607,8 +592,6 @@ static struct clk_lookup lookups[] = { | |||
607 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | 592 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), |
608 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), | 593 | CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), |
609 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), | 594 | CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), |
610 | CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FSIA]), | ||
611 | CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FSIB]), | ||
612 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), | 595 | CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), |
613 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), | 596 | CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), |
614 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), | 597 | CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), |
@@ -645,8 +628,8 @@ static struct clk_lookup lookups[] = { | |||
645 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ | 628 | CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ |
646 | CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ | 629 | CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ |
647 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ | 630 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ |
648 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */ | 631 | CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ |
649 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP323]), /* USB0 */ | 632 | CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */ |
650 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ | 633 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ |
651 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ | 634 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ |
652 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ | 635 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ |
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S index a285d13c7416..f428c4db2b60 100644 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S | |||
@@ -1,4 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2010 Magnus Damm | ||
2 | * Copyright (C) 2008 Renesas Solutions Corp. | 3 | * Copyright (C) 2008 Renesas Solutions Corp. |
3 | * | 4 | * |
4 | * This program is free software; you can redistribute it and/or modify | 5 | * This program is free software; you can redistribute it and/or modify |
@@ -14,24 +15,45 @@ | |||
14 | * along with this program; if not, write to the Free Software | 15 | * along with this program; if not, write to the Free Software |
15 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | 16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
16 | */ | 17 | */ |
17 | #include <mach/hardware.h> | ||
18 | #include <mach/irqs.h> | 18 | #include <mach/irqs.h> |
19 | 19 | ||
20 | #define INTCA_BASE 0xe6980000 | ||
21 | #define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */ | ||
22 | #define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */ | ||
23 | #define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */ | ||
24 | #define INTLVLB_OFFS 0x00000034 /* previous priority level */ | ||
25 | |||
20 | .macro disable_fiq | 26 | .macro disable_fiq |
21 | .endm | 27 | .endm |
22 | 28 | ||
23 | .macro get_irqnr_preamble, base, tmp | 29 | .macro get_irqnr_preamble, base, tmp |
24 | ldr \base, =INTFLGA | 30 | ldr \base, =INTCA_BASE |
25 | .endm | 31 | .endm |
26 | 32 | ||
27 | .macro arch_ret_to_user, tmp1, tmp2 | 33 | .macro arch_ret_to_user, tmp1, tmp2 |
28 | .endm | 34 | .endm |
29 | 35 | ||
30 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 36 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
31 | ldr \irqnr, [\base] | 37 | /* The single INTFLGA read access below results in the following: |
38 | * | ||
39 | * 1. INTLVLB is updated with old priority value from INTLVLA | ||
40 | * 2. Highest priority interrupt is accepted | ||
41 | * 3. INTLVLA is updated to contain priority of accepted interrupt | ||
42 | * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA | ||
43 | */ | ||
44 | ldr \irqnr, [\base, #INTFLGA_OFFS] | ||
45 | |||
46 | /* Restore INTLVLA with the value saved in INTLVLB. | ||
47 | * This is required to support interrupt priorities properly. | ||
48 | */ | ||
49 | ldrb \tmp, [\base, #INTLVLB_OFFS] | ||
50 | strb \tmp, [\base, #INTLVLA_OFFS] | ||
51 | |||
52 | /* Handle invalid vector number case */ | ||
32 | cmp \irqnr, #0 | 53 | cmp \irqnr, #0 |
33 | beq 1000f | 54 | beq 1000f |
34 | /* intevt to irq number */ | 55 | |
56 | /* Convert vector to irq number, same as the evt2irq() macro */ | ||
35 | lsr \irqnr, \irqnr, #0x5 | 57 | lsr \irqnr, \irqnr, #0x5 |
36 | subs \irqnr, \irqnr, #16 | 58 | subs \irqnr, \irqnr, #16 |
37 | 59 | ||
diff --git a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt new file mode 100644 index 000000000000..e3ebfa73956e --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt | |||
@@ -0,0 +1,87 @@ | |||
1 | LIST "partner-jet-setup.txt" | ||
2 | LIST "(C) Copyright 2010 Renesas Solutions Corp" | ||
3 | LIST "Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>" | ||
4 | |||
5 | LIST "RWT Setting" | ||
6 | EW 0xE6020004, 0xA500 | ||
7 | EW 0xE6030004, 0xA500 | ||
8 | |||
9 | DD 0x01001000, 0x01001000 | ||
10 | |||
11 | LIST "GPIO Setting" | ||
12 | EB 0xE6051013, 0xA2 | ||
13 | |||
14 | LIST "CPG" | ||
15 | ED 0xE6150080, 0x00000180 | ||
16 | ED 0xE61500C0, 0x00000002 | ||
17 | |||
18 | WAIT 1, 0xFE40009C | ||
19 | |||
20 | LIST "FRQCR" | ||
21 | ED 0xE6150000, 0x2D1305C3 | ||
22 | ED 0xE61500E0, 0x9E40358E | ||
23 | ED 0xE6150004, 0x80331050 | ||
24 | |||
25 | WAIT 1, 0xFE40009C | ||
26 | |||
27 | ED 0xE61500E4, 0x00002000 | ||
28 | |||
29 | WAIT 1, 0xFE40009C | ||
30 | |||
31 | LIST "PLL" | ||
32 | ED 0xE6150028, 0x00004000 | ||
33 | |||
34 | WAIT 1, 0xFE40009C | ||
35 | |||
36 | ED 0xE615002C, 0x93000040 | ||
37 | |||
38 | WAIT 1, 0xFE40009C | ||
39 | |||
40 | LIST "BSC" | ||
41 | ED 0xFEC10000, 0x00E0001B | ||
42 | |||
43 | LIST "SBSC1" | ||
44 | ED 0xFE400354, 0x01AD8000 | ||
45 | ED 0xFE400354, 0x01AD8001 | ||
46 | |||
47 | WAIT 5, 0xFE40009C | ||
48 | |||
49 | ED 0xFE400008, 0xBCC90151 | ||
50 | ED 0xFE400040, 0x41774113 | ||
51 | ED 0xFE400044, 0x2712E229 | ||
52 | ED 0xFE400048, 0x20C18505 | ||
53 | ED 0xFE40004C, 0x00110209 | ||
54 | ED 0xFE400010, 0x00000087 | ||
55 | |||
56 | WAIT 10, 0xFE40009C | ||
57 | |||
58 | ED 0xFE400084, 0x0000003F | ||
59 | EB 0xFE500000, 0x00 | ||
60 | |||
61 | WAIT 5, 0xFE40009C | ||
62 | |||
63 | ED 0xFE400084, 0x0000FF0A | ||
64 | EB 0xFE500000, 0x00 | ||
65 | |||
66 | WAIT 1, 0xFE40009C | ||
67 | |||
68 | ED 0xFE400084, 0x00002201 | ||
69 | EB 0xFE500000, 0x00 | ||
70 | ED 0xFE400084, 0x00000302 | ||
71 | EB 0xFE500000, 0x00 | ||
72 | EB 0xFE5C0000, 0x00 | ||
73 | ED 0xFE400008, 0xBCC90159 | ||
74 | ED 0xFE40008C, 0x88800004 | ||
75 | ED 0xFE400094, 0x00000004 | ||
76 | ED 0xFE400028, 0xA55A0032 | ||
77 | ED 0xFE40002C, 0xA55A000C | ||
78 | ED 0xFE400020, 0xA55A2048 | ||
79 | ED 0xFE400008, 0xBCC90959 | ||
80 | |||
81 | LIST "Change CPGA setting" | ||
82 | ED 0xE61500E0, 0x9E40352E | ||
83 | ED 0xE6150004, 0x80331050 | ||
84 | |||
85 | WAIT 1, 0xFE40009C | ||
86 | |||
87 | ED 0xE6150354, 0x00000002 | ||
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h index 4aecf6e3a859..2b8fd8b942fe 100644 --- a/arch/arm/mach-shmobile/include/mach/vmalloc.h +++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h | |||
@@ -2,6 +2,6 @@ | |||
2 | #define __ASM_MACH_VMALLOC_H | 2 | #define __ASM_MACH_VMALLOC_H |
3 | 3 | ||
4 | /* Vmalloc at ... - 0xe5ffffff */ | 4 | /* Vmalloc at ... - 0xe5ffffff */ |
5 | #define VMALLOC_END 0xe6000000 | 5 | #define VMALLOC_END 0xe6000000UL |
6 | 6 | ||
7 | #endif /* __ASM_MACH_VMALLOC_H */ | 7 | #endif /* __ASM_MACH_VMALLOC_H */ |
diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h new file mode 100644 index 000000000000..3ad86b7708e9 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/zboot.h | |||
@@ -0,0 +1,20 @@ | |||
1 | #ifndef ZBOOT_H | ||
2 | #define ZBOOT_H | ||
3 | |||
4 | #include <asm/mach-types.h> | ||
5 | #include <mach/zboot_macros.h> | ||
6 | |||
7 | /************************************************** | ||
8 | * | ||
9 | * board specific settings | ||
10 | * | ||
11 | **************************************************/ | ||
12 | |||
13 | #ifdef CONFIG_MACH_AP4EVB | ||
14 | #define MACH_TYPE MACH_TYPE_AP4EVB | ||
15 | #include "mach/head-ap4evb.txt" | ||
16 | #else | ||
17 | #error "unsupported board." | ||
18 | #endif | ||
19 | |||
20 | #endif /* ZBOOT_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/zboot_macros.h b/arch/arm/mach-shmobile/include/mach/zboot_macros.h new file mode 100644 index 000000000000..aa6111fbc989 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/zboot_macros.h | |||
@@ -0,0 +1,65 @@ | |||
1 | #ifndef __ZBOOT_MACRO_H | ||
2 | #define __ZBOOT_MACRO_H | ||
3 | |||
4 | /* The LIST command is used to include comments in the script */ | ||
5 | .macro LIST comment | ||
6 | .endm | ||
7 | |||
8 | /* The ED command is used to write a 32-bit word */ | ||
9 | .macro ED, addr, data | ||
10 | LDR r0, 1f | ||
11 | LDR r1, 2f | ||
12 | STR r1, [r0] | ||
13 | B 3f | ||
14 | 1 : .long \addr | ||
15 | 2 : .long \data | ||
16 | 3 : | ||
17 | .endm | ||
18 | |||
19 | /* The EW command is used to write a 16-bit word */ | ||
20 | .macro EW, addr, data | ||
21 | LDR r0, 1f | ||
22 | LDR r1, 2f | ||
23 | STRH r1, [r0] | ||
24 | B 3f | ||
25 | 1 : .long \addr | ||
26 | 2 : .long \data | ||
27 | 3 : | ||
28 | .endm | ||
29 | |||
30 | /* The EB command is used to write an 8-bit word */ | ||
31 | .macro EB, addr, data | ||
32 | LDR r0, 1f | ||
33 | LDR r1, 2f | ||
34 | STRB r1, [r0] | ||
35 | B 3f | ||
36 | 1 : .long \addr | ||
37 | 2 : .long \data | ||
38 | 3 : | ||
39 | .endm | ||
40 | |||
41 | /* The WAIT command is used to delay the execution */ | ||
42 | .macro WAIT, time, reg | ||
43 | LDR r1, 1f | ||
44 | LDR r0, 2f | ||
45 | STR r0, [r1] | ||
46 | 10 : | ||
47 | LDR r0, [r1] | ||
48 | CMP r0, #0x00000000 | ||
49 | BNE 10b | ||
50 | NOP | ||
51 | B 3f | ||
52 | 1 : .long \reg | ||
53 | 2 : .long \time * 100 | ||
54 | 3 : | ||
55 | .endm | ||
56 | |||
57 | /* The DD command is used to read a 32-bit word */ | ||
58 | .macro DD, start, end | ||
59 | LDR r1, 1f | ||
60 | B 2f | ||
61 | 1 : .long \start | ||
62 | 2 : | ||
63 | .endm | ||
64 | |||
65 | #endif /* __ZBOOT_MACRO_H */ | ||
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index 8ea3bffb4e00..a0e7c12868bd 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S | |||
@@ -21,8 +21,8 @@ | |||
21 | #include <mach/io.h> | 21 | #include <mach/io.h> |
22 | 22 | ||
23 | .macro addruart, rp, rv | 23 | .macro addruart, rp, rv |
24 | ldreq \rp, =IO_APB_PHYS @ physical | 24 | ldr \rp, =IO_APB_PHYS @ physical |
25 | ldrne \rv, =IO_APB_VIRT @ virtual | 25 | ldr \rv, =IO_APB_VIRT @ virtual |
26 | #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) | 26 | #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) |
27 | #error "A debug UART must be selected in the kernel config to use DEBUG_LL" | 27 | #error "A debug UART must be selected in the kernel config to use DEBUG_LL" |
28 | #elif defined(CONFIG_TEGRA_DEBUG_UARTA) | 28 | #elif defined(CONFIG_TEGRA_DEBUG_UARTA) |
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index 2ba9e5c9d2f6..dd165c53889d 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S | |||
@@ -16,8 +16,8 @@ | |||
16 | #include <mach/io.h> | 16 | #include <mach/io.h> |
17 | 17 | ||
18 | #if defined(CONFIG_ARM_GIC) | 18 | #if defined(CONFIG_ARM_GIC) |
19 | 19 | #define HAVE_GET_IRQNR_PREAMBLE | |
20 | #include <asm/hardware/gic.h> | 20 | #include <asm/hardware/entry-macro-gic.S> |
21 | 21 | ||
22 | /* Uses the GIC interrupt controller built into the cpu */ | 22 | /* Uses the GIC interrupt controller built into the cpu */ |
23 | #define ICTRL_BASE (IO_CPU_VIRT + 0x100) | 23 | #define ICTRL_BASE (IO_CPU_VIRT + 0x100) |
@@ -32,68 +32,6 @@ | |||
32 | 32 | ||
33 | .macro arch_ret_to_user, tmp1, tmp2 | 33 | .macro arch_ret_to_user, tmp1, tmp2 |
34 | .endm | 34 | .endm |
35 | |||
36 | /* | ||
37 | * The interrupt numbering scheme is defined in the | ||
38 | * interrupt controller spec. To wit: | ||
39 | * | ||
40 | * Interrupts 0-15 are IPI | ||
41 | * 16-28 are reserved | ||
42 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
43 | * 32-1020 are global | ||
44 | * 1021-1022 are reserved | ||
45 | * 1023 is "spurious" (no interrupt) | ||
46 | * | ||
47 | * For now, we ignore all local interrupts so only return an interrupt | ||
48 | * if it's between 30 and 1020. The test_for_ipi routine below will | ||
49 | * pick up on IPIs. | ||
50 | * | ||
51 | * A simple read from the controller will tell us the number of the | ||
52 | * highest priority enabled interrupt. We then just need to check | ||
53 | * whether it is in the valid range for an IRQ (30-1020 inclusive). | ||
54 | */ | ||
55 | |||
56 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
57 | |||
58 | /* bits 12-10 = src CPU, 9-0 = int # */ | ||
59 | ldr \irqstat, [\base, #GIC_CPU_INTACK] | ||
60 | |||
61 | ldr \tmp, =1021 | ||
62 | |||
63 | bic \irqnr, \irqstat, #0x1c00 | ||
64 | |||
65 | cmp \irqnr, #29 | ||
66 | cmpcc \irqnr, \irqnr | ||
67 | cmpne \irqnr, \tmp | ||
68 | cmpcs \irqnr, \irqnr | ||
69 | |||
70 | .endm | ||
71 | |||
72 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
73 | * register) is preserved from the macro above. | ||
74 | * If there is an IPI, we immediately signal end of interrupt on the | ||
75 | * controller, since this requires the original irqstat value which | ||
76 | * we won't easily be able to recreate later. | ||
77 | */ | ||
78 | |||
79 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
80 | bic \irqnr, \irqstat, #0x1c00 | ||
81 | cmp \irqnr, #16 | ||
82 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
83 | cmpcs \irqnr, \irqnr | ||
84 | .endm | ||
85 | |||
86 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
87 | |||
88 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
89 | bic \irqnr, \irqstat, #0x1c00 | ||
90 | mov \tmp, #0 | ||
91 | cmp \irqnr, #29 | ||
92 | moveq \tmp, #1 | ||
93 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
94 | cmp \tmp, #0 | ||
95 | .endm | ||
96 | |||
97 | #else | 35 | #else |
98 | /* legacy interrupt controller for AP16 */ | 36 | /* legacy interrupt controller for AP16 */ |
99 | .macro disable_fiq | 37 | .macro disable_fiq |
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h index f0981b1ac59e..4cea2230c8dc 100644 --- a/arch/arm/mach-tegra/include/mach/io.h +++ b/arch/arm/mach-tegra/include/mach/io.h | |||
@@ -65,8 +65,8 @@ | |||
65 | 65 | ||
66 | #ifndef __ASSEMBLER__ | 66 | #ifndef __ASSEMBLER__ |
67 | 67 | ||
68 | #define __arch_ioremap(p, s, t) tegra_ioremap(p, s, t) | 68 | #define __arch_ioremap tegra_ioremap |
69 | #define __arch_iounmap(v) tegra_iounmap(v) | 69 | #define __arch_iounmap tegra_iounmap |
70 | 70 | ||
71 | void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type); | 71 | void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type); |
72 | void tegra_iounmap(volatile void __iomem *addr); | 72 | void tegra_iounmap(volatile void __iomem *addr); |
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 50a8dfb9a0cf..5407de01abf0 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -94,8 +94,8 @@ void __init tegra_init_irq(void) | |||
94 | writel(0, ictlr_to_virt(i) + ICTLR_CPU_IEP_CLASS); | 94 | writel(0, ictlr_to_virt(i) + ICTLR_CPU_IEP_CLASS); |
95 | } | 95 | } |
96 | 96 | ||
97 | gic_dist_init(0, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 29); | 97 | gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), |
98 | gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); | 98 | IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); |
99 | 99 | ||
100 | gic = get_irq_chip(29); | 100 | gic = get_irq_chip(29); |
101 | gic_unmask_irq = gic->unmask; | 101 | gic_unmask_irq = gic->unmask; |
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 1c0fd92cab39..3b7376c4f356 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c | |||
@@ -48,7 +48,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
48 | * core (e.g. timer irq), then they will not have been enabled | 48 | * core (e.g. timer irq), then they will not have been enabled |
49 | * for us: do so | 49 | * for us: do so |
50 | */ | 50 | */ |
51 | gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x100); | 51 | gic_secondary_init(0); |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Synchronise with the boot thread. | 54 | * Synchronise with the boot thread. |
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 608a1372b172..7328c0179769 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -61,8 +61,8 @@ void __init ux500_init_devices(void) | |||
61 | 61 | ||
62 | void __init ux500_init_irq(void) | 62 | void __init ux500_init_irq(void) |
63 | { | 63 | { |
64 | gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); | 64 | gic_init(0, 29, __io_address(UX500_GIC_DIST_BASE), |
65 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); | 65 | __io_address(UX500_GIC_CPU_BASE)); |
66 | 66 | ||
67 | /* | 67 | /* |
68 | * Init clocks here so that they are available for system timer | 68 | * Init clocks here so that they are available for system timer |
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S index 60ea88db8283..a37f585a3ecb 100644 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ b/arch/arm/mach-ux500/include/mach/entry-macro.S | |||
@@ -11,7 +11,8 @@ | |||
11 | * warranty of any kind, whether express or implied. | 11 | * warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <asm/hardware/gic.h> | 14 | #define HAVE_GET_IRQNR_PREAMBLE |
15 | #include <asm/hardware/entry-macro-gic.S> | ||
15 | 16 | ||
16 | .macro disable_fiq | 17 | .macro disable_fiq |
17 | .endm | 18 | .endm |
@@ -22,68 +23,3 @@ | |||
22 | 23 | ||
23 | .macro arch_ret_to_user, tmp1, tmp2 | 24 | .macro arch_ret_to_user, tmp1, tmp2 |
24 | .endm | 25 | .endm |
25 | |||
26 | /* | ||
27 | * The interrupt numbering scheme is defined in the | ||
28 | * interrupt controller spec. To wit: | ||
29 | * | ||
30 | * Interrupts 0-15 are IPI | ||
31 | * 16-28 are reserved | ||
32 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
33 | * 32-1020 are global | ||
34 | * 1021-1022 are reserved | ||
35 | * 1023 is "spurious" (no interrupt) | ||
36 | * | ||
37 | * For now, we ignore all local interrupts so only return an | ||
38 | * interrupt if it's between 30 and 1020. The test_for_ipi | ||
39 | * routine below will pick up on IPIs. | ||
40 | * | ||
41 | * A simple read from the controller will tell us the number | ||
42 | * of the highest priority enabled interrupt. We then just | ||
43 | * need to check whether it is in the valid range for an | ||
44 | * IRQ (30-1020 inclusive). | ||
45 | */ | ||
46 | |||
47 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
48 | |||
49 | /* bits 12-10 = src CPU, 9-0 = int # */ | ||
50 | ldr \irqstat, [\base, #GIC_CPU_INTACK] | ||
51 | |||
52 | ldr \tmp, =1021 | ||
53 | |||
54 | bic \irqnr, \irqstat, #0x1c00 | ||
55 | |||
56 | cmp \irqnr, #29 | ||
57 | cmpcc \irqnr, \irqnr | ||
58 | cmpne \irqnr, \tmp | ||
59 | cmpcs \irqnr, \irqnr | ||
60 | |||
61 | .endm | ||
62 | |||
63 | /* We assume that irqstat (the raw value of the IRQ | ||
64 | * acknowledge register) is preserved from the macro above. | ||
65 | * If there is an IPI, we immediately signal end of | ||
66 | * interrupt on the controller, since this requires the | ||
67 | * original irqstat value which we won't easily be able | ||
68 | * to recreate later. | ||
69 | */ | ||
70 | |||
71 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
72 | bic \irqnr, \irqstat, #0x1c00 | ||
73 | cmp \irqnr, #16 | ||
74 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
75 | cmpcs \irqnr, \irqnr | ||
76 | .endm | ||
77 | |||
78 | /* As above, this assumes that irqstat and base | ||
79 | * are preserved.. | ||
80 | */ | ||
81 | |||
82 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
83 | bic \irqnr, \irqstat, #0x1c00 | ||
84 | mov \tmp, #0 | ||
85 | cmp \irqnr, #29 | ||
86 | moveq \tmp, #1 | ||
87 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
88 | cmp \tmp, #0 | ||
89 | .endm | ||
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 9e4c678de785..b5077b4c419f 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c | |||
@@ -44,7 +44,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
44 | * core (e.g. timer irq), then they will not have been enabled | 44 | * core (e.g. timer irq), then they will not have been enabled |
45 | * for us: do so | 45 | * for us: do so |
46 | */ | 46 | */ |
47 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); | 47 | gic_secondary_init(0); |
48 | 48 | ||
49 | /* | 49 | /* |
50 | * let the primary processor know we're out of the | 50 | * let the primary processor know we're out of the |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 56cdc2257424..40a024c71e4b 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -49,7 +49,7 @@ | |||
49 | #include <mach/clkdev.h> | 49 | #include <mach/clkdev.h> |
50 | #include <mach/hardware.h> | 50 | #include <mach/hardware.h> |
51 | #include <mach/platform.h> | 51 | #include <mach/platform.h> |
52 | #include <plat/timer-sp.h> | 52 | #include <asm/hardware/timer-sp.h> |
53 | 53 | ||
54 | #include <plat/sched_clock.h> | 54 | #include <plat/sched_clock.h> |
55 | 55 | ||
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index 57dd95ce41f9..362780d868de 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h | |||
@@ -22,5 +22,3 @@ struct map_desc; | |||
22 | 22 | ||
23 | void v2m_map_io(struct map_desc *tile, size_t num); | 23 | void v2m_map_io(struct map_desc *tile, size_t num); |
24 | extern struct sys_timer v2m_timer; | 24 | extern struct sys_timer v2m_timer; |
25 | |||
26 | extern void __iomem *gic_cpu_base_addr; | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index fd25ccd7272f..cb5793ef3ee0 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <mach/clkdev.h> | 21 | #include <mach/clkdev.h> |
22 | #include <mach/ct-ca9x4.h> | 22 | #include <mach/ct-ca9x4.h> |
23 | 23 | ||
24 | #include <plat/timer-sp.h> | 24 | #include <asm/hardware/timer-sp.h> |
25 | 25 | ||
26 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
@@ -60,13 +60,10 @@ static void __init ct_ca9x4_map_io(void) | |||
60 | v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); | 60 | v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); |
61 | } | 61 | } |
62 | 62 | ||
63 | void __iomem *gic_cpu_base_addr; | ||
64 | |||
65 | static void __init ct_ca9x4_init_irq(void) | 63 | static void __init ct_ca9x4_init_irq(void) |
66 | { | 64 | { |
67 | gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU); | 65 | gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), |
68 | gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29); | 66 | MMIO_P2V(A9_MPCORE_GIC_CPU)); |
69 | gic_cpu_init(0, gic_cpu_base_addr); | ||
70 | } | 67 | } |
71 | 68 | ||
72 | #if 0 | 69 | #if 0 |
diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/mach-vexpress/headsmp.S index 8a78ff68e1ee..7a3f0632947c 100644 --- a/arch/arm/mach-vexpress/headsmp.S +++ b/arch/arm/mach-vexpress/headsmp.S | |||
@@ -35,5 +35,6 @@ pen: ldr r7, [r6] | |||
35 | */ | 35 | */ |
36 | b secondary_startup | 36 | b secondary_startup |
37 | 37 | ||
38 | .align | ||
38 | 1: .long . | 39 | 1: .long . |
39 | .long pen_release | 40 | .long pen_release |
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S index 20e9fb514f0a..73c11297509e 100644 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S | |||
@@ -1,67 +1,7 @@ | |||
1 | #include <asm/hardware/gic.h> | 1 | #include <asm/hardware/entry-macro-gic.S> |
2 | 2 | ||
3 | .macro disable_fiq | 3 | .macro disable_fiq |
4 | .endm | 4 | .endm |
5 | 5 | ||
6 | .macro get_irqnr_preamble, base, tmp | ||
7 | ldr \base, =gic_cpu_base_addr | ||
8 | ldr \base, [\base] | ||
9 | .endm | ||
10 | |||
11 | .macro arch_ret_to_user, tmp1, tmp2 | 6 | .macro arch_ret_to_user, tmp1, tmp2 |
12 | .endm | 7 | .endm |
13 | |||
14 | /* | ||
15 | * The interrupt numbering scheme is defined in the | ||
16 | * interrupt controller spec. To wit: | ||
17 | * | ||
18 | * Interrupts 0-15 are IPI | ||
19 | * 16-28 are reserved | ||
20 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
21 | * 32-1020 are global | ||
22 | * 1021-1022 are reserved | ||
23 | * 1023 is "spurious" (no interrupt) | ||
24 | * | ||
25 | * For now, we ignore all local interrupts so only return an interrupt if it's | ||
26 | * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | ||
27 | * | ||
28 | * A simple read from the controller will tell us the number of the highest | ||
29 | * priority enabled interrupt. We then just need to check whether it is in the | ||
30 | * valid range for an IRQ (30-1020 inclusive). | ||
31 | */ | ||
32 | |||
33 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
34 | ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ | ||
35 | ldr \tmp, =1021 | ||
36 | bic \irqnr, \irqstat, #0x1c00 | ||
37 | cmp \irqnr, #29 | ||
38 | cmpcc \irqnr, \irqnr | ||
39 | cmpne \irqnr, \tmp | ||
40 | cmpcs \irqnr, \irqnr | ||
41 | .endm | ||
42 | |||
43 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
44 | * register) is preserved from the macro above. | ||
45 | * If there is an IPI, we immediately signal end of interrupt on the | ||
46 | * controller, since this requires the original irqstat value which | ||
47 | * we won't easily be able to recreate later. | ||
48 | */ | ||
49 | |||
50 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
51 | bic \irqnr, \irqstat, #0x1c00 | ||
52 | cmp \irqnr, #16 | ||
53 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
54 | cmpcs \irqnr, \irqnr | ||
55 | .endm | ||
56 | |||
57 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
58 | |||
59 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
60 | bic \irqnr, \irqstat, #0x1c00 | ||
61 | mov \tmp, #0 | ||
62 | cmp \irqnr, #29 | ||
63 | moveq \tmp, #1 | ||
64 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
65 | cmp \tmp, #0 | ||
66 | .endm | ||
67 | |||
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index 670970699ba9..dfb591031d17 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c | |||
@@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
51 | * core (e.g. timer irq), then they will not have been enabled | 51 | * core (e.g. timer irq), then they will not have been enabled |
52 | * for us: do so | 52 | * for us: do so |
53 | */ | 53 | */ |
54 | gic_cpu_init(0, gic_cpu_base_addr); | 54 | gic_secondary_init(0); |
55 | 55 | ||
56 | /* | 56 | /* |
57 | * let the primary processor know we're out of the | 57 | * let the primary processor know we're out of the |
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 8c283100a9a0..de13603dc028 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -18,14 +18,13 @@ | |||
18 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
19 | #include <asm/mach/time.h> | 19 | #include <asm/mach/time.h> |
20 | #include <asm/hardware/arm_timer.h> | 20 | #include <asm/hardware/arm_timer.h> |
21 | #include <asm/hardware/timer-sp.h> | ||
21 | 22 | ||
22 | #include <mach/clkdev.h> | 23 | #include <mach/clkdev.h> |
23 | #include <mach/motherboard.h> | 24 | #include <mach/motherboard.h> |
24 | 25 | ||
25 | #include <plat/sched_clock.h> | 26 | #include <plat/sched_clock.h> |
26 | 27 | ||
27 | #include <plat/timer-sp.h> | ||
28 | |||
29 | #include "core.h" | 28 | #include "core.h" |
30 | 29 | ||
31 | #define V2M_PA_CS0 0x40000000 | 30 | #define V2M_PA_CS0 0x40000000 |
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 6e77c042d8e9..e0b0e7a4ec68 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c | |||
@@ -13,13 +13,9 @@ | |||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/highmem.h> | ||
16 | #include <asm/cacheflush.h> | 17 | #include <asm/cacheflush.h> |
17 | #include <asm/kmap_types.h> | ||
18 | #include <asm/fixmap.h> | ||
19 | #include <asm/pgtable.h> | ||
20 | #include <asm/tlbflush.h> | ||
21 | #include <plat/cache-feroceon-l2.h> | 18 | #include <plat/cache-feroceon-l2.h> |
22 | #include "mm.h" | ||
23 | 19 | ||
24 | /* | 20 | /* |
25 | * Low-level cache maintenance operations. | 21 | * Low-level cache maintenance operations. |
@@ -39,27 +35,30 @@ | |||
39 | * between which we don't want to be preempted. | 35 | * between which we don't want to be preempted. |
40 | */ | 36 | */ |
41 | 37 | ||
42 | static inline unsigned long l2_start_va(unsigned long paddr) | 38 | static inline unsigned long l2_get_va(unsigned long paddr) |
43 | { | 39 | { |
44 | #ifdef CONFIG_HIGHMEM | 40 | #ifdef CONFIG_HIGHMEM |
45 | /* | 41 | /* |
46 | * Let's do our own fixmap stuff in a minimal way here. | ||
47 | * Because range ops can't be done on physical addresses, | 42 | * Because range ops can't be done on physical addresses, |
48 | * we simply install a virtual mapping for it only for the | 43 | * we simply install a virtual mapping for it only for the |
49 | * TLB lookup to occur, hence no need to flush the untouched | 44 | * TLB lookup to occur, hence no need to flush the untouched |
50 | * memory mapping. This is protected with the disabling of | 45 | * memory mapping afterwards (note: a cache flush may happen |
51 | * interrupts by the caller. | 46 | * in some circumstances depending on the path taken in kunmap_atomic). |
52 | */ | 47 | */ |
53 | unsigned long idx = KM_L2_CACHE + KM_TYPE_NR * smp_processor_id(); | 48 | void *vaddr = kmap_atomic_pfn(paddr >> PAGE_SHIFT); |
54 | unsigned long vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | 49 | return (unsigned long)vaddr + (paddr & ~PAGE_MASK); |
55 | set_pte_ext(TOP_PTE(vaddr), pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL), 0); | ||
56 | local_flush_tlb_kernel_page(vaddr); | ||
57 | return vaddr + (paddr & ~PAGE_MASK); | ||
58 | #else | 50 | #else |
59 | return __phys_to_virt(paddr); | 51 | return __phys_to_virt(paddr); |
60 | #endif | 52 | #endif |
61 | } | 53 | } |
62 | 54 | ||
55 | static inline void l2_put_va(unsigned long vaddr) | ||
56 | { | ||
57 | #ifdef CONFIG_HIGHMEM | ||
58 | kunmap_atomic((void *)vaddr); | ||
59 | #endif | ||
60 | } | ||
61 | |||
63 | static inline void l2_clean_pa(unsigned long addr) | 62 | static inline void l2_clean_pa(unsigned long addr) |
64 | { | 63 | { |
65 | __asm__("mcr p15, 1, %0, c15, c9, 3" : : "r" (addr)); | 64 | __asm__("mcr p15, 1, %0, c15, c9, 3" : : "r" (addr)); |
@@ -76,13 +75,14 @@ static inline void l2_clean_pa_range(unsigned long start, unsigned long end) | |||
76 | */ | 75 | */ |
77 | BUG_ON((start ^ end) >> PAGE_SHIFT); | 76 | BUG_ON((start ^ end) >> PAGE_SHIFT); |
78 | 77 | ||
79 | raw_local_irq_save(flags); | 78 | va_start = l2_get_va(start); |
80 | va_start = l2_start_va(start); | ||
81 | va_end = va_start + (end - start); | 79 | va_end = va_start + (end - start); |
80 | raw_local_irq_save(flags); | ||
82 | __asm__("mcr p15, 1, %0, c15, c9, 4\n\t" | 81 | __asm__("mcr p15, 1, %0, c15, c9, 4\n\t" |
83 | "mcr p15, 1, %1, c15, c9, 5" | 82 | "mcr p15, 1, %1, c15, c9, 5" |
84 | : : "r" (va_start), "r" (va_end)); | 83 | : : "r" (va_start), "r" (va_end)); |
85 | raw_local_irq_restore(flags); | 84 | raw_local_irq_restore(flags); |
85 | l2_put_va(va_start); | ||
86 | } | 86 | } |
87 | 87 | ||
88 | static inline void l2_clean_inv_pa(unsigned long addr) | 88 | static inline void l2_clean_inv_pa(unsigned long addr) |
@@ -106,13 +106,14 @@ static inline void l2_inv_pa_range(unsigned long start, unsigned long end) | |||
106 | */ | 106 | */ |
107 | BUG_ON((start ^ end) >> PAGE_SHIFT); | 107 | BUG_ON((start ^ end) >> PAGE_SHIFT); |
108 | 108 | ||
109 | raw_local_irq_save(flags); | 109 | va_start = l2_get_va(start); |
110 | va_start = l2_start_va(start); | ||
111 | va_end = va_start + (end - start); | 110 | va_end = va_start + (end - start); |
111 | raw_local_irq_save(flags); | ||
112 | __asm__("mcr p15, 1, %0, c15, c11, 4\n\t" | 112 | __asm__("mcr p15, 1, %0, c15, c11, 4\n\t" |
113 | "mcr p15, 1, %1, c15, c11, 5" | 113 | "mcr p15, 1, %1, c15, c11, 5" |
114 | : : "r" (va_start), "r" (va_end)); | 114 | : : "r" (va_start), "r" (va_end)); |
115 | raw_local_irq_restore(flags); | 115 | raw_local_irq_restore(flags); |
116 | l2_put_va(va_start); | ||
116 | } | 117 | } |
117 | 118 | ||
118 | static inline void l2_inv_all(void) | 119 | static inline void l2_inv_all(void) |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 99fa688dfadd..c96fa1b3f49f 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -203,6 +203,10 @@ ENTRY(v6_flush_kern_dcache_area) | |||
203 | * - end - virtual end address of region | 203 | * - end - virtual end address of region |
204 | */ | 204 | */ |
205 | v6_dma_inv_range: | 205 | v6_dma_inv_range: |
206 | #ifdef CONFIG_DMA_CACHE_RWFO | ||
207 | ldrb r2, [r0] @ read for ownership | ||
208 | strb r2, [r0] @ write for ownership | ||
209 | #endif | ||
206 | tst r0, #D_CACHE_LINE_SIZE - 1 | 210 | tst r0, #D_CACHE_LINE_SIZE - 1 |
207 | bic r0, r0, #D_CACHE_LINE_SIZE - 1 | 211 | bic r0, r0, #D_CACHE_LINE_SIZE - 1 |
208 | #ifdef HARVARD_CACHE | 212 | #ifdef HARVARD_CACHE |
@@ -211,6 +215,10 @@ v6_dma_inv_range: | |||
211 | mcrne p15, 0, r0, c7, c11, 1 @ clean unified line | 215 | mcrne p15, 0, r0, c7, c11, 1 @ clean unified line |
212 | #endif | 216 | #endif |
213 | tst r1, #D_CACHE_LINE_SIZE - 1 | 217 | tst r1, #D_CACHE_LINE_SIZE - 1 |
218 | #ifdef CONFIG_DMA_CACHE_RWFO | ||
219 | ldrneb r2, [r1, #-1] @ read for ownership | ||
220 | strneb r2, [r1, #-1] @ write for ownership | ||
221 | #endif | ||
214 | bic r1, r1, #D_CACHE_LINE_SIZE - 1 | 222 | bic r1, r1, #D_CACHE_LINE_SIZE - 1 |
215 | #ifdef HARVARD_CACHE | 223 | #ifdef HARVARD_CACHE |
216 | mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line | 224 | mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line |
@@ -218,10 +226,6 @@ v6_dma_inv_range: | |||
218 | mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line | 226 | mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line |
219 | #endif | 227 | #endif |
220 | 1: | 228 | 1: |
221 | #ifdef CONFIG_DMA_CACHE_RWFO | ||
222 | ldr r2, [r0] @ read for ownership | ||
223 | str r2, [r0] @ write for ownership | ||
224 | #endif | ||
225 | #ifdef HARVARD_CACHE | 229 | #ifdef HARVARD_CACHE |
226 | mcr p15, 0, r0, c7, c6, 1 @ invalidate D line | 230 | mcr p15, 0, r0, c7, c6, 1 @ invalidate D line |
227 | #else | 231 | #else |
@@ -229,6 +233,10 @@ v6_dma_inv_range: | |||
229 | #endif | 233 | #endif |
230 | add r0, r0, #D_CACHE_LINE_SIZE | 234 | add r0, r0, #D_CACHE_LINE_SIZE |
231 | cmp r0, r1 | 235 | cmp r0, r1 |
236 | #ifdef CONFIG_DMA_CACHE_RWFO | ||
237 | ldrlo r2, [r0] @ read for ownership | ||
238 | strlo r2, [r0] @ write for ownership | ||
239 | #endif | ||
232 | blo 1b | 240 | blo 1b |
233 | mov r0, #0 | 241 | mov r0, #0 |
234 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | 242 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer |
@@ -263,12 +271,12 @@ v6_dma_clean_range: | |||
263 | * - end - virtual end address of region | 271 | * - end - virtual end address of region |
264 | */ | 272 | */ |
265 | ENTRY(v6_dma_flush_range) | 273 | ENTRY(v6_dma_flush_range) |
266 | bic r0, r0, #D_CACHE_LINE_SIZE - 1 | ||
267 | 1: | ||
268 | #ifdef CONFIG_DMA_CACHE_RWFO | 274 | #ifdef CONFIG_DMA_CACHE_RWFO |
269 | ldr r2, [r0] @ read for ownership | 275 | ldrb r2, [r0] @ read for ownership |
270 | str r2, [r0] @ write for ownership | 276 | strb r2, [r0] @ write for ownership |
271 | #endif | 277 | #endif |
278 | bic r0, r0, #D_CACHE_LINE_SIZE - 1 | ||
279 | 1: | ||
272 | #ifdef HARVARD_CACHE | 280 | #ifdef HARVARD_CACHE |
273 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line | 281 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line |
274 | #else | 282 | #else |
@@ -276,6 +284,10 @@ ENTRY(v6_dma_flush_range) | |||
276 | #endif | 284 | #endif |
277 | add r0, r0, #D_CACHE_LINE_SIZE | 285 | add r0, r0, #D_CACHE_LINE_SIZE |
278 | cmp r0, r1 | 286 | cmp r0, r1 |
287 | #ifdef CONFIG_DMA_CACHE_RWFO | ||
288 | ldrlob r2, [r0] @ read for ownership | ||
289 | strlob r2, [r0] @ write for ownership | ||
290 | #endif | ||
279 | blo 1b | 291 | blo 1b |
280 | mov r0, #0 | 292 | mov r0, #0 |
281 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | 293 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index a3ebf7a4f49b..6136e68ce953 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -173,15 +173,22 @@ ENTRY(v7_coherent_user_range) | |||
173 | UNWIND(.fnstart ) | 173 | UNWIND(.fnstart ) |
174 | dcache_line_size r2, r3 | 174 | dcache_line_size r2, r3 |
175 | sub r3, r2, #1 | 175 | sub r3, r2, #1 |
176 | bic r0, r0, r3 | 176 | bic r12, r0, r3 |
177 | 1: | 177 | 1: |
178 | USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification | 178 | USER( mcr p15, 0, r12, c7, c11, 1 ) @ clean D line to the point of unification |
179 | add r12, r12, r2 | ||
180 | cmp r12, r1 | ||
181 | blo 1b | ||
179 | dsb | 182 | dsb |
180 | USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line | 183 | icache_line_size r2, r3 |
181 | add r0, r0, r2 | 184 | sub r3, r2, #1 |
185 | bic r12, r0, r3 | ||
182 | 2: | 186 | 2: |
183 | cmp r0, r1 | 187 | USER( mcr p15, 0, r12, c7, c5, 1 ) @ invalidate I line |
184 | blo 1b | 188 | add r12, r12, r2 |
189 | cmp r12, r1 | ||
190 | blo 2b | ||
191 | 3: | ||
185 | mov r0, #0 | 192 | mov r0, #0 |
186 | ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable | 193 | ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable |
187 | ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB | 194 | ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB |
@@ -194,10 +201,10 @@ ENTRY(v7_coherent_user_range) | |||
194 | * isn't mapped, just try the next page. | 201 | * isn't mapped, just try the next page. |
195 | */ | 202 | */ |
196 | 9001: | 203 | 9001: |
197 | mov r0, r0, lsr #12 | 204 | mov r12, r12, lsr #12 |
198 | mov r0, r0, lsl #12 | 205 | mov r12, r12, lsl #12 |
199 | add r0, r0, #4096 | 206 | add r12, r12, #4096 |
200 | b 2b | 207 | b 3b |
201 | UNWIND(.fnend ) | 208 | UNWIND(.fnend ) |
202 | ENDPROC(v7_coherent_kern_range) | 209 | ENDPROC(v7_coherent_kern_range) |
203 | ENDPROC(v7_coherent_user_range) | 210 | ENDPROC(v7_coherent_user_range) |
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index c3154928bccd..5a32020471e3 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c | |||
@@ -17,14 +17,10 @@ | |||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
18 | */ | 18 | */ |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/highmem.h> | ||
20 | #include <asm/system.h> | 21 | #include <asm/system.h> |
21 | #include <asm/cputype.h> | 22 | #include <asm/cputype.h> |
22 | #include <asm/cacheflush.h> | 23 | #include <asm/cacheflush.h> |
23 | #include <asm/kmap_types.h> | ||
24 | #include <asm/fixmap.h> | ||
25 | #include <asm/pgtable.h> | ||
26 | #include <asm/tlbflush.h> | ||
27 | #include "mm.h" | ||
28 | 24 | ||
29 | #define CR_L2 (1 << 26) | 25 | #define CR_L2 (1 << 26) |
30 | 26 | ||
@@ -71,16 +67,15 @@ static inline void xsc3_l2_inv_all(void) | |||
71 | dsb(); | 67 | dsb(); |
72 | } | 68 | } |
73 | 69 | ||
70 | static inline void l2_unmap_va(unsigned long va) | ||
71 | { | ||
74 | #ifdef CONFIG_HIGHMEM | 72 | #ifdef CONFIG_HIGHMEM |
75 | #define l2_map_save_flags(x) raw_local_save_flags(x) | 73 | if (va != -1) |
76 | #define l2_map_restore_flags(x) raw_local_irq_restore(x) | 74 | kunmap_atomic((void *)va); |
77 | #else | ||
78 | #define l2_map_save_flags(x) ((x) = 0) | ||
79 | #define l2_map_restore_flags(x) ((void)(x)) | ||
80 | #endif | 75 | #endif |
76 | } | ||
81 | 77 | ||
82 | static inline unsigned long l2_map_va(unsigned long pa, unsigned long prev_va, | 78 | static inline unsigned long l2_map_va(unsigned long pa, unsigned long prev_va) |
83 | unsigned long flags) | ||
84 | { | 79 | { |
85 | #ifdef CONFIG_HIGHMEM | 80 | #ifdef CONFIG_HIGHMEM |
86 | unsigned long va = prev_va & PAGE_MASK; | 81 | unsigned long va = prev_va & PAGE_MASK; |
@@ -89,17 +84,10 @@ static inline unsigned long l2_map_va(unsigned long pa, unsigned long prev_va, | |||
89 | /* | 84 | /* |
90 | * Switching to a new page. Because cache ops are | 85 | * Switching to a new page. Because cache ops are |
91 | * using virtual addresses only, we must put a mapping | 86 | * using virtual addresses only, we must put a mapping |
92 | * in place for it. We also enable interrupts for a | 87 | * in place for it. |
93 | * short while and disable them again to protect this | ||
94 | * mapping. | ||
95 | */ | 88 | */ |
96 | unsigned long idx; | 89 | l2_unmap_va(prev_va); |
97 | raw_local_irq_restore(flags); | 90 | va = (unsigned long)kmap_atomic_pfn(pa >> PAGE_SHIFT); |
98 | idx = KM_L2_CACHE + KM_TYPE_NR * smp_processor_id(); | ||
99 | va = __fix_to_virt(FIX_KMAP_BEGIN + idx); | ||
100 | raw_local_irq_restore(flags | PSR_I_BIT); | ||
101 | set_pte_ext(TOP_PTE(va), pfn_pte(pa >> PAGE_SHIFT, PAGE_KERNEL), 0); | ||
102 | local_flush_tlb_kernel_page(va); | ||
103 | } | 91 | } |
104 | return va + (pa_offset >> (32 - PAGE_SHIFT)); | 92 | return va + (pa_offset >> (32 - PAGE_SHIFT)); |
105 | #else | 93 | #else |
@@ -109,7 +97,7 @@ static inline unsigned long l2_map_va(unsigned long pa, unsigned long prev_va, | |||
109 | 97 | ||
110 | static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | 98 | static void xsc3_l2_inv_range(unsigned long start, unsigned long end) |
111 | { | 99 | { |
112 | unsigned long vaddr, flags; | 100 | unsigned long vaddr; |
113 | 101 | ||
114 | if (start == 0 && end == -1ul) { | 102 | if (start == 0 && end == -1ul) { |
115 | xsc3_l2_inv_all(); | 103 | xsc3_l2_inv_all(); |
@@ -117,13 +105,12 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
117 | } | 105 | } |
118 | 106 | ||
119 | vaddr = -1; /* to force the first mapping */ | 107 | vaddr = -1; /* to force the first mapping */ |
120 | l2_map_save_flags(flags); | ||
121 | 108 | ||
122 | /* | 109 | /* |
123 | * Clean and invalidate partial first cache line. | 110 | * Clean and invalidate partial first cache line. |
124 | */ | 111 | */ |
125 | if (start & (CACHE_LINE_SIZE - 1)) { | 112 | if (start & (CACHE_LINE_SIZE - 1)) { |
126 | vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr, flags); | 113 | vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr); |
127 | xsc3_l2_clean_mva(vaddr); | 114 | xsc3_l2_clean_mva(vaddr); |
128 | xsc3_l2_inv_mva(vaddr); | 115 | xsc3_l2_inv_mva(vaddr); |
129 | start = (start | (CACHE_LINE_SIZE - 1)) + 1; | 116 | start = (start | (CACHE_LINE_SIZE - 1)) + 1; |
@@ -133,7 +120,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
133 | * Invalidate all full cache lines between 'start' and 'end'. | 120 | * Invalidate all full cache lines between 'start' and 'end'. |
134 | */ | 121 | */ |
135 | while (start < (end & ~(CACHE_LINE_SIZE - 1))) { | 122 | while (start < (end & ~(CACHE_LINE_SIZE - 1))) { |
136 | vaddr = l2_map_va(start, vaddr, flags); | 123 | vaddr = l2_map_va(start, vaddr); |
137 | xsc3_l2_inv_mva(vaddr); | 124 | xsc3_l2_inv_mva(vaddr); |
138 | start += CACHE_LINE_SIZE; | 125 | start += CACHE_LINE_SIZE; |
139 | } | 126 | } |
@@ -142,31 +129,30 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) | |||
142 | * Clean and invalidate partial last cache line. | 129 | * Clean and invalidate partial last cache line. |
143 | */ | 130 | */ |
144 | if (start < end) { | 131 | if (start < end) { |
145 | vaddr = l2_map_va(start, vaddr, flags); | 132 | vaddr = l2_map_va(start, vaddr); |
146 | xsc3_l2_clean_mva(vaddr); | 133 | xsc3_l2_clean_mva(vaddr); |
147 | xsc3_l2_inv_mva(vaddr); | 134 | xsc3_l2_inv_mva(vaddr); |
148 | } | 135 | } |
149 | 136 | ||
150 | l2_map_restore_flags(flags); | 137 | l2_unmap_va(vaddr); |
151 | 138 | ||
152 | dsb(); | 139 | dsb(); |
153 | } | 140 | } |
154 | 141 | ||
155 | static void xsc3_l2_clean_range(unsigned long start, unsigned long end) | 142 | static void xsc3_l2_clean_range(unsigned long start, unsigned long end) |
156 | { | 143 | { |
157 | unsigned long vaddr, flags; | 144 | unsigned long vaddr; |
158 | 145 | ||
159 | vaddr = -1; /* to force the first mapping */ | 146 | vaddr = -1; /* to force the first mapping */ |
160 | l2_map_save_flags(flags); | ||
161 | 147 | ||
162 | start &= ~(CACHE_LINE_SIZE - 1); | 148 | start &= ~(CACHE_LINE_SIZE - 1); |
163 | while (start < end) { | 149 | while (start < end) { |
164 | vaddr = l2_map_va(start, vaddr, flags); | 150 | vaddr = l2_map_va(start, vaddr); |
165 | xsc3_l2_clean_mva(vaddr); | 151 | xsc3_l2_clean_mva(vaddr); |
166 | start += CACHE_LINE_SIZE; | 152 | start += CACHE_LINE_SIZE; |
167 | } | 153 | } |
168 | 154 | ||
169 | l2_map_restore_flags(flags); | 155 | l2_unmap_va(vaddr); |
170 | 156 | ||
171 | dsb(); | 157 | dsb(); |
172 | } | 158 | } |
@@ -193,7 +179,7 @@ static inline void xsc3_l2_flush_all(void) | |||
193 | 179 | ||
194 | static void xsc3_l2_flush_range(unsigned long start, unsigned long end) | 180 | static void xsc3_l2_flush_range(unsigned long start, unsigned long end) |
195 | { | 181 | { |
196 | unsigned long vaddr, flags; | 182 | unsigned long vaddr; |
197 | 183 | ||
198 | if (start == 0 && end == -1ul) { | 184 | if (start == 0 && end == -1ul) { |
199 | xsc3_l2_flush_all(); | 185 | xsc3_l2_flush_all(); |
@@ -201,17 +187,16 @@ static void xsc3_l2_flush_range(unsigned long start, unsigned long end) | |||
201 | } | 187 | } |
202 | 188 | ||
203 | vaddr = -1; /* to force the first mapping */ | 189 | vaddr = -1; /* to force the first mapping */ |
204 | l2_map_save_flags(flags); | ||
205 | 190 | ||
206 | start &= ~(CACHE_LINE_SIZE - 1); | 191 | start &= ~(CACHE_LINE_SIZE - 1); |
207 | while (start < end) { | 192 | while (start < end) { |
208 | vaddr = l2_map_va(start, vaddr, flags); | 193 | vaddr = l2_map_va(start, vaddr); |
209 | xsc3_l2_clean_mva(vaddr); | 194 | xsc3_l2_clean_mva(vaddr); |
210 | xsc3_l2_inv_mva(vaddr); | 195 | xsc3_l2_inv_mva(vaddr); |
211 | start += CACHE_LINE_SIZE; | 196 | start += CACHE_LINE_SIZE; |
212 | } | 197 | } |
213 | 198 | ||
214 | l2_map_restore_flags(flags); | 199 | l2_unmap_va(vaddr); |
215 | 200 | ||
216 | dsb(); | 201 | dsb(); |
217 | } | 202 | } |
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index ac6a36142fcd..809f1bf9fa29 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/device.h> | 18 | #include <linux/device.h> |
19 | #include <linux/dma-mapping.h> | 19 | #include <linux/dma-mapping.h> |
20 | #include <linux/highmem.h> | ||
20 | 21 | ||
21 | #include <asm/memory.h> | 22 | #include <asm/memory.h> |
22 | #include <asm/highmem.h> | 23 | #include <asm/highmem.h> |
@@ -480,10 +481,10 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset, | |||
480 | op(vaddr, len, dir); | 481 | op(vaddr, len, dir); |
481 | kunmap_high(page); | 482 | kunmap_high(page); |
482 | } else if (cache_is_vipt()) { | 483 | } else if (cache_is_vipt()) { |
483 | pte_t saved_pte; | 484 | /* unmapped pages might still be cached */ |
484 | vaddr = kmap_high_l1_vipt(page, &saved_pte); | 485 | vaddr = kmap_atomic(page); |
485 | op(vaddr + offset, len, dir); | 486 | op(vaddr + offset, len, dir); |
486 | kunmap_high_l1_vipt(page, saved_pte); | 487 | kunmap_atomic(vaddr); |
487 | } | 488 | } |
488 | } else { | 489 | } else { |
489 | vaddr = page_address(page) + offset; | 490 | vaddr = page_address(page) + offset; |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 391ffae75098..c29f2839f1d2 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
@@ -10,6 +10,7 @@ | |||
10 | #include <linux/module.h> | 10 | #include <linux/module.h> |
11 | #include <linux/mm.h> | 11 | #include <linux/mm.h> |
12 | #include <linux/pagemap.h> | 12 | #include <linux/pagemap.h> |
13 | #include <linux/highmem.h> | ||
13 | 14 | ||
14 | #include <asm/cacheflush.h> | 15 | #include <asm/cacheflush.h> |
15 | #include <asm/cachetype.h> | 16 | #include <asm/cachetype.h> |
@@ -180,10 +181,10 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page) | |||
180 | __cpuc_flush_dcache_area(addr, PAGE_SIZE); | 181 | __cpuc_flush_dcache_area(addr, PAGE_SIZE); |
181 | kunmap_high(page); | 182 | kunmap_high(page); |
182 | } else if (cache_is_vipt()) { | 183 | } else if (cache_is_vipt()) { |
183 | pte_t saved_pte; | 184 | /* unmapped pages might still be cached */ |
184 | addr = kmap_high_l1_vipt(page, &saved_pte); | 185 | addr = kmap_atomic(page); |
185 | __cpuc_flush_dcache_area(addr, PAGE_SIZE); | 186 | __cpuc_flush_dcache_area(addr, PAGE_SIZE); |
186 | kunmap_high_l1_vipt(page, saved_pte); | 187 | kunmap_atomic(addr); |
187 | } | 188 | } |
188 | } | 189 | } |
189 | 190 | ||
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index c435fd9e1da9..807c0573abbe 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -140,90 +140,3 @@ struct page *kmap_atomic_to_page(const void *ptr) | |||
140 | pte = TOP_PTE(vaddr); | 140 | pte = TOP_PTE(vaddr); |
141 | return pte_page(*pte); | 141 | return pte_page(*pte); |
142 | } | 142 | } |
143 | |||
144 | #ifdef CONFIG_CPU_CACHE_VIPT | ||
145 | |||
146 | #include <linux/percpu.h> | ||
147 | |||
148 | /* | ||
149 | * The VIVT cache of a highmem page is always flushed before the page | ||
150 | * is unmapped. Hence unmapped highmem pages need no cache maintenance | ||
151 | * in that case. | ||
152 | * | ||
153 | * However unmapped pages may still be cached with a VIPT cache, and | ||
154 | * it is not possible to perform cache maintenance on them using physical | ||
155 | * addresses unfortunately. So we have no choice but to set up a temporary | ||
156 | * virtual mapping for that purpose. | ||
157 | * | ||
158 | * Yet this VIPT cache maintenance may be triggered from DMA support | ||
159 | * functions which are possibly called from interrupt context. As we don't | ||
160 | * want to keep interrupt disabled all the time when such maintenance is | ||
161 | * taking place, we therefore allow for some reentrancy by preserving and | ||
162 | * restoring the previous fixmap entry before the interrupted context is | ||
163 | * resumed. If the reentrancy depth is 0 then there is no need to restore | ||
164 | * the previous fixmap, and leaving the current one in place allow it to | ||
165 | * be reused the next time without a TLB flush (common with DMA). | ||
166 | */ | ||
167 | |||
168 | static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth); | ||
169 | |||
170 | void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte) | ||
171 | { | ||
172 | unsigned int idx, cpu; | ||
173 | int *depth; | ||
174 | unsigned long vaddr, flags; | ||
175 | pte_t pte, *ptep; | ||
176 | |||
177 | if (!in_interrupt()) | ||
178 | preempt_disable(); | ||
179 | |||
180 | cpu = smp_processor_id(); | ||
181 | depth = &per_cpu(kmap_high_l1_vipt_depth, cpu); | ||
182 | |||
183 | idx = KM_L1_CACHE + KM_TYPE_NR * cpu; | ||
184 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | ||
185 | ptep = TOP_PTE(vaddr); | ||
186 | pte = mk_pte(page, kmap_prot); | ||
187 | |||
188 | raw_local_irq_save(flags); | ||
189 | (*depth)++; | ||
190 | if (pte_val(*ptep) == pte_val(pte)) { | ||
191 | *saved_pte = pte; | ||
192 | } else { | ||
193 | *saved_pte = *ptep; | ||
194 | set_pte_ext(ptep, pte, 0); | ||
195 | local_flush_tlb_kernel_page(vaddr); | ||
196 | } | ||
197 | raw_local_irq_restore(flags); | ||
198 | |||
199 | return (void *)vaddr; | ||
200 | } | ||
201 | |||
202 | void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte) | ||
203 | { | ||
204 | unsigned int idx, cpu = smp_processor_id(); | ||
205 | int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu); | ||
206 | unsigned long vaddr, flags; | ||
207 | pte_t pte, *ptep; | ||
208 | |||
209 | idx = KM_L1_CACHE + KM_TYPE_NR * cpu; | ||
210 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | ||
211 | ptep = TOP_PTE(vaddr); | ||
212 | pte = mk_pte(page, kmap_prot); | ||
213 | |||
214 | BUG_ON(pte_val(*ptep) != pte_val(pte)); | ||
215 | BUG_ON(*depth <= 0); | ||
216 | |||
217 | raw_local_irq_save(flags); | ||
218 | (*depth)--; | ||
219 | if (*depth != 0 && pte_val(pte) != pte_val(saved_pte)) { | ||
220 | set_pte_ext(ptep, saved_pte, 0); | ||
221 | local_flush_tlb_kernel_page(vaddr); | ||
222 | } | ||
223 | raw_local_irq_restore(flags); | ||
224 | |||
225 | if (!in_interrupt()) | ||
226 | preempt_enable(); | ||
227 | } | ||
228 | |||
229 | #endif /* CONFIG_CPU_CACHE_VIPT */ | ||
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 7d63beaf9745..b795afd0a2c6 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S | |||
@@ -61,17 +61,27 @@ | |||
61 | .endm | 61 | .endm |
62 | 62 | ||
63 | /* | 63 | /* |
64 | * cache_line_size - get the cache line size from the CSIDR register | 64 | * dcache_line_size - get the minimum D-cache line size from the CTR register |
65 | * (available on ARMv7+). It assumes that the CSSR register was configured | 65 | * on ARMv7. |
66 | * to access the L1 data cache CSIDR. | ||
67 | */ | 66 | */ |
68 | .macro dcache_line_size, reg, tmp | 67 | .macro dcache_line_size, reg, tmp |
69 | mrc p15, 1, \tmp, c0, c0, 0 @ read CSIDR | 68 | mrc p15, 0, \tmp, c0, c0, 1 @ read ctr |
70 | and \tmp, \tmp, #7 @ cache line size encoding | 69 | lsr \tmp, \tmp, #16 |
71 | mov \reg, #16 @ size offset | 70 | and \tmp, \tmp, #0xf @ cache line size encoding |
71 | mov \reg, #4 @ bytes per word | ||
72 | mov \reg, \reg, lsl \tmp @ actual cache line size | 72 | mov \reg, \reg, lsl \tmp @ actual cache line size |
73 | .endm | 73 | .endm |
74 | 74 | ||
75 | /* | ||
76 | * icache_line_size - get the minimum I-cache line size from the CTR register | ||
77 | * on ARMv7. | ||
78 | */ | ||
79 | .macro icache_line_size, reg, tmp | ||
80 | mrc p15, 0, \tmp, c0, c0, 1 @ read ctr | ||
81 | and \tmp, \tmp, #0xf @ cache line size encoding | ||
82 | mov \reg, #4 @ bytes per word | ||
83 | mov \reg, \reg, lsl \tmp @ actual cache line size | ||
84 | .endm | ||
75 | 85 | ||
76 | /* | 86 | /* |
77 | * Sanity check the PTE configuration for the code below - which makes | 87 | * Sanity check the PTE configuration for the code below - which makes |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 53cbe2225153..9b9ff5d949fd 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -381,7 +381,7 @@ __v7_ca9mp_proc_info: | |||
381 | PMD_SECT_XN | \ | 381 | PMD_SECT_XN | \ |
382 | PMD_SECT_AP_WRITE | \ | 382 | PMD_SECT_AP_WRITE | \ |
383 | PMD_SECT_AP_READ | 383 | PMD_SECT_AP_READ |
384 | b __v7_ca9mp_setup | 384 | W(b) __v7_ca9mp_setup |
385 | .long cpu_arch_name | 385 | .long cpu_arch_name |
386 | .long cpu_elf_name | 386 | .long cpu_elf_name |
387 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS | 387 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS |
@@ -413,7 +413,7 @@ __v7_proc_info: | |||
413 | PMD_SECT_XN | \ | 413 | PMD_SECT_XN | \ |
414 | PMD_SECT_AP_WRITE | \ | 414 | PMD_SECT_AP_WRITE | \ |
415 | PMD_SECT_AP_READ | 415 | PMD_SECT_AP_READ |
416 | b __v7_setup | 416 | W(b) __v7_setup |
417 | .long cpu_arch_name | 417 | .long cpu_arch_name |
418 | .long cpu_elf_name | 418 | .long cpu_elf_name |
419 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS | 419 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index 2db6e60d149d..07f23bb42bed 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
21 | #include <linux/timex.h> | 21 | #include <linux/timex.h> |
22 | #include <linux/sched.h> | ||
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
23 | #include <linux/clocksource.h> | 24 | #include <linux/clocksource.h> |
24 | #include <linux/clockchips.h> | 25 | #include <linux/clockchips.h> |
@@ -38,7 +39,7 @@ | |||
38 | /* | 39 | /* |
39 | * IOP clocksource (free-running timer 1). | 40 | * IOP clocksource (free-running timer 1). |
40 | */ | 41 | */ |
41 | static cycle_t iop_clocksource_read(struct clocksource *unused) | 42 | static cycle_t notrace iop_clocksource_read(struct clocksource *unused) |
42 | { | 43 | { |
43 | return 0xffffffffu - read_tcr1(); | 44 | return 0xffffffffu - read_tcr1(); |
44 | } | 45 | } |
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 1b558efbe732..ea4644021fb9 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/err.h> | ||
18 | #include <linux/io.h> | 19 | #include <linux/io.h> |
19 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
20 | 21 | ||
@@ -181,7 +182,7 @@ static int __init omap_init_clocksource_32k(void) | |||
181 | return -ENODEV; | 182 | return -ENODEV; |
182 | 183 | ||
183 | sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); | 184 | sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); |
184 | if (sync_32k_ick) | 185 | if (!IS_ERR(sync_32k_ick)) |
185 | clk_enable(sync_32k_ick); | 186 | clk_enable(sync_32k_ick); |
186 | 187 | ||
187 | offset_32k = clocksource_32k.read(&clocksource_32k); | 188 | offset_32k = clocksource_32k.read(&clocksource_32k); |
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 128b549c2796..204865f91d93 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h | |||
@@ -294,8 +294,8 @@ static inline void omap44xx_map_common_io(void) | |||
294 | extern void omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, | 294 | extern void omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, |
295 | struct omap_sdrc_params *sdrc_cs1); | 295 | struct omap_sdrc_params *sdrc_cs1); |
296 | 296 | ||
297 | #define __arch_ioremap(p,s,t) omap_ioremap(p,s,t) | 297 | #define __arch_ioremap omap_ioremap |
298 | #define __arch_iounmap(v) omap_iounmap(v) | 298 | #define __arch_iounmap omap_iounmap |
299 | 299 | ||
300 | void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type); | 300 | void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type); |
301 | void omap_iounmap(volatile void __iomem *addr); | 301 | void omap_iounmap(volatile void __iomem *addr); |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index e2c8eebe6b3a..74dac419d328 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -166,7 +166,7 @@ static void __init omap_detect_sram(void) | |||
166 | cpu_is_omap1710()) | 166 | cpu_is_omap1710()) |
167 | omap_sram_size = 0x4000; /* 16K */ | 167 | omap_sram_size = 0x4000; /* 16K */ |
168 | else if (cpu_is_omap1611()) | 168 | else if (cpu_is_omap1611()) |
169 | omap_sram_size = 0x3e800; /* 250K */ | 169 | omap_sram_size = SZ_256K; |
170 | else { | 170 | else { |
171 | printk(KERN_ERR "Could not detect SRAM size\n"); | 171 | printk(KERN_ERR "Could not detect SRAM size\n"); |
172 | omap_sram_size = 0x4000; | 172 | omap_sram_size = 0x4000; |
diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h index e49c5b6fc4e2..1ab332e37d7d 100644 --- a/arch/arm/plat-pxa/include/plat/sdhci.h +++ b/arch/arm/plat-pxa/include/plat/sdhci.h | |||
@@ -17,6 +17,9 @@ | |||
17 | /* Require clock free running */ | 17 | /* Require clock free running */ |
18 | #define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) | 18 | #define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) |
19 | 19 | ||
20 | /* Board design supports 8-bit data on SD/SDIO BUS */ | ||
21 | #define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2) | ||
22 | |||
20 | /* | 23 | /* |
21 | * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI | 24 | * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI |
22 | * @max_speed: the maximum speed supported | 25 | * @max_speed: the maximum speed supported |
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 5a27b1b538f2..eb105e61c746 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig | |||
@@ -8,7 +8,7 @@ config PLAT_S3C24XX | |||
8 | default y | 8 | default y |
9 | select NO_IOPORT | 9 | select NO_IOPORT |
10 | select ARCH_REQUIRE_GPIOLIB | 10 | select ARCH_REQUIRE_GPIOLIB |
11 | select S3C_DEVICE_NAND | 11 | select S3C_DEV_NAND |
12 | select S3C_GPIO_CFG_S3C24XX | 12 | select S3C_GPIO_CFG_S3C24XX |
13 | help | 13 | help |
14 | Base platform code for any Samsung S3C24XX device | 14 | Base platform code for any Samsung S3C24XX device |
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 76d0858c3cbb..4a10c0f684b2 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
88 | { | 88 | { |
89 | .idcode = 0x32440000, | 89 | .idcode = 0x32440000, |
90 | .idmask = 0xffffffff, | 90 | .idmask = 0xffffffff, |
91 | .map_io = s3c244x_map_io, | 91 | .map_io = s3c2440_map_io, |
92 | .init_clocks = s3c244x_init_clocks, | 92 | .init_clocks = s3c244x_init_clocks, |
93 | .init_uarts = s3c244x_init_uarts, | 93 | .init_uarts = s3c244x_init_uarts, |
94 | .init = s3c2440_init, | 94 | .init = s3c2440_init, |
@@ -97,7 +97,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
97 | { | 97 | { |
98 | .idcode = 0x32440001, | 98 | .idcode = 0x32440001, |
99 | .idmask = 0xffffffff, | 99 | .idmask = 0xffffffff, |
100 | .map_io = s3c244x_map_io, | 100 | .map_io = s3c2440_map_io, |
101 | .init_clocks = s3c244x_init_clocks, | 101 | .init_clocks = s3c244x_init_clocks, |
102 | .init_uarts = s3c244x_init_uarts, | 102 | .init_uarts = s3c244x_init_uarts, |
103 | .init = s3c2440_init, | 103 | .init = s3c2440_init, |
@@ -106,7 +106,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
106 | { | 106 | { |
107 | .idcode = 0x32440aaa, | 107 | .idcode = 0x32440aaa, |
108 | .idmask = 0xffffffff, | 108 | .idmask = 0xffffffff, |
109 | .map_io = s3c244x_map_io, | 109 | .map_io = s3c2442_map_io, |
110 | .init_clocks = s3c244x_init_clocks, | 110 | .init_clocks = s3c244x_init_clocks, |
111 | .init_uarts = s3c244x_init_uarts, | 111 | .init_uarts = s3c244x_init_uarts, |
112 | .init = s3c2442_init, | 112 | .init = s3c2442_init, |
@@ -115,7 +115,7 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
115 | { | 115 | { |
116 | .idcode = 0x32440aab, | 116 | .idcode = 0x32440aab, |
117 | .idmask = 0xffffffff, | 117 | .idmask = 0xffffffff, |
118 | .map_io = s3c244x_map_io, | 118 | .map_io = s3c2442_map_io, |
119 | .init_clocks = s3c244x_init_clocks, | 119 | .init_clocks = s3c244x_init_clocks, |
120 | .init_uarts = s3c244x_init_uarts, | 120 | .init_uarts = s3c244x_init_uarts, |
121 | .init = s3c2442_init, | 121 | .init = s3c2442_init, |
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 24c6f5a30596..243b6411050d 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c | |||
@@ -82,8 +82,6 @@ static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { | |||
82 | struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { | 82 | struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { |
83 | .set_config = s3c_gpio_setcfg_s3c24xx, | 83 | .set_config = s3c_gpio_setcfg_s3c24xx, |
84 | .get_config = s3c_gpio_getcfg_s3c24xx, | 84 | .get_config = s3c_gpio_getcfg_s3c24xx, |
85 | .set_pull = s3c_gpio_setpull_1up, | ||
86 | .get_pull = s3c_gpio_getpull_1up, | ||
87 | }; | 85 | }; |
88 | 86 | ||
89 | struct s3c_gpio_chip s3c24xx_gpios[] = { | 87 | struct s3c_gpio_chip s3c24xx_gpios[] = { |
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h index 307248d1ccbb..89e8d0a25f87 100644 --- a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h | |||
@@ -21,17 +21,22 @@ extern void s3c244x_init_clocks(int xtal); | |||
21 | #else | 21 | #else |
22 | #define s3c244x_init_clocks NULL | 22 | #define s3c244x_init_clocks NULL |
23 | #define s3c244x_init_uarts NULL | 23 | #define s3c244x_init_uarts NULL |
24 | #define s3c244x_map_io NULL | ||
25 | #endif | 24 | #endif |
26 | 25 | ||
27 | #ifdef CONFIG_CPU_S3C2440 | 26 | #ifdef CONFIG_CPU_S3C2440 |
28 | extern int s3c2440_init(void); | 27 | extern int s3c2440_init(void); |
28 | |||
29 | extern void s3c2440_map_io(void); | ||
29 | #else | 30 | #else |
30 | #define s3c2440_init NULL | 31 | #define s3c2440_init NULL |
32 | #define s3c2440_map_io NULL | ||
31 | #endif | 33 | #endif |
32 | 34 | ||
33 | #ifdef CONFIG_CPU_S3C2442 | 35 | #ifdef CONFIG_CPU_S3C2442 |
34 | extern int s3c2442_init(void); | 36 | extern int s3c2442_init(void); |
37 | |||
38 | extern void s3c2442_map_io(void); | ||
35 | #else | 39 | #else |
36 | #define s3c2442_init NULL | 40 | #define s3c2442_init NULL |
41 | #define s3c2442_map_io NULL | ||
37 | #endif | 42 | #endif |
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c index 9793544a6ace..704175b0573f 100644 --- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c +++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | |||
@@ -29,8 +29,8 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, | |||
29 | } else { | 29 | } else { |
30 | s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); | 30 | s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); |
31 | s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); | 31 | s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); |
32 | s3c_gpio_cfgpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); | 32 | s3c_gpio_setpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); |
33 | s3c_gpio_cfgpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); | 33 | s3c_gpio_setpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); |
34 | s3c_gpio_cfgpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); | 34 | s3c_gpio_setpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); |
35 | } | 35 | } |
36 | } | 36 | } |
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c index db9e9e477ec1..72457afd6255 100644 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | |||
@@ -31,8 +31,8 @@ void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, | |||
31 | } else { | 31 | } else { |
32 | s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); | 32 | s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); |
33 | s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); | 33 | s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); |
34 | s3c_gpio_cfgpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); | 34 | s3c_gpio_setpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); |
35 | s3c_gpio_cfgpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); | 35 | s3c_gpio_setpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); |
36 | s3c_gpio_cfgpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); | 36 | s3c_gpio_setpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); |
37 | } | 37 | } |
38 | } | 38 | } |
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c index 8ea663a438bb..c3972b645d13 100644 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c | |||
@@ -29,8 +29,8 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, | |||
29 | } else { | 29 | } else { |
30 | s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); | 30 | s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); |
31 | s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); | 31 | s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); |
32 | s3c_gpio_cfgpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); | 32 | s3c_gpio_setpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); |
33 | s3c_gpio_cfgpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); | 33 | s3c_gpio_setpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); |
34 | s3c_gpio_cfgpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); | 34 | s3c_gpio_setpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); |
35 | } | 35 | } |
36 | } | 36 | } |
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index b732b773b9af..0aa32f242ee4 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c | |||
@@ -280,18 +280,17 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, | |||
280 | } | 280 | } |
281 | #endif | 281 | #endif |
282 | 282 | ||
283 | #ifdef CONFIG_S3C_GPIO_PULL_UP | 283 | #if defined(CONFIG_S3C_GPIO_PULL_UP) || defined(CONFIG_S3C_GPIO_PULL_DOWN) |
284 | int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | 284 | static int s3c_gpio_setpull_1(struct s3c_gpio_chip *chip, |
285 | unsigned int off, s3c_gpio_pull_t pull) | 285 | unsigned int off, s3c_gpio_pull_t pull, |
286 | s3c_gpio_pull_t updown) | ||
286 | { | 287 | { |
287 | void __iomem *reg = chip->base + 0x08; | 288 | void __iomem *reg = chip->base + 0x08; |
288 | u32 pup = __raw_readl(reg); | 289 | u32 pup = __raw_readl(reg); |
289 | 290 | ||
290 | pup = __raw_readl(reg); | 291 | if (pull == updown) |
291 | |||
292 | if (pup == S3C_GPIO_PULL_UP) | ||
293 | pup &= ~(1 << off); | 292 | pup &= ~(1 << off); |
294 | else if (pup == S3C_GPIO_PULL_NONE) | 293 | else if (pull == S3C_GPIO_PULL_NONE) |
295 | pup |= (1 << off); | 294 | pup |= (1 << off); |
296 | else | 295 | else |
297 | return -EINVAL; | 296 | return -EINVAL; |
@@ -300,17 +299,45 @@ int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | |||
300 | return 0; | 299 | return 0; |
301 | } | 300 | } |
302 | 301 | ||
303 | s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, | 302 | static s3c_gpio_pull_t s3c_gpio_getpull_1(struct s3c_gpio_chip *chip, |
304 | unsigned int off) | 303 | unsigned int off, s3c_gpio_pull_t updown) |
305 | { | 304 | { |
306 | void __iomem *reg = chip->base + 0x08; | 305 | void __iomem *reg = chip->base + 0x08; |
307 | u32 pup = __raw_readl(reg); | 306 | u32 pup = __raw_readl(reg); |
308 | 307 | ||
309 | pup &= (1 << off); | 308 | pup &= (1 << off); |
310 | return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP; | 309 | return pup ? S3C_GPIO_PULL_NONE : updown; |
310 | } | ||
311 | #endif /* CONFIG_S3C_GPIO_PULL_UP || CONFIG_S3C_GPIO_PULL_DOWN */ | ||
312 | |||
313 | #ifdef CONFIG_S3C_GPIO_PULL_UP | ||
314 | s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, | ||
315 | unsigned int off) | ||
316 | { | ||
317 | return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP); | ||
318 | } | ||
319 | |||
320 | int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | ||
321 | unsigned int off, s3c_gpio_pull_t pull) | ||
322 | { | ||
323 | return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP); | ||
311 | } | 324 | } |
312 | #endif /* CONFIG_S3C_GPIO_PULL_UP */ | 325 | #endif /* CONFIG_S3C_GPIO_PULL_UP */ |
313 | 326 | ||
327 | #ifdef CONFIG_S3C_GPIO_PULL_DOWN | ||
328 | s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip, | ||
329 | unsigned int off) | ||
330 | { | ||
331 | return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN); | ||
332 | } | ||
333 | |||
334 | int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip, | ||
335 | unsigned int off, s3c_gpio_pull_t pull) | ||
336 | { | ||
337 | return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN); | ||
338 | } | ||
339 | #endif /* CONFIG_S3C_GPIO_PULL_DOWN */ | ||
340 | |||
314 | #ifdef CONFIG_S5P_GPIO_DRVSTR | 341 | #ifdef CONFIG_S5P_GPIO_DRVSTR |
315 | s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) | 342 | s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) |
316 | { | 343 | { |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h index 8fd65d8b5863..0d2c5703f1ee 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h | |||
@@ -210,6 +210,17 @@ extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, | |||
210 | unsigned int off); | 210 | unsigned int off); |
211 | 211 | ||
212 | /** | 212 | /** |
213 | * s3c_gpio_getpull_1down() - Get configuration for choice of down or none | ||
214 | * @chip: The gpio chip that the GPIO pin belongs to | ||
215 | * @off: The offset to the pin to get the configuration of. | ||
216 | * | ||
217 | * This helper function reads the state of the pull-down resistor for the | ||
218 | * given GPIO in the same case as s3c_gpio_setpull_1down. | ||
219 | */ | ||
220 | extern s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip, | ||
221 | unsigned int off); | ||
222 | |||
223 | /** | ||
213 | * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. | 224 | * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. |
214 | * @chip: The gpio chip that is being configured. | 225 | * @chip: The gpio chip that is being configured. |
215 | * @off: The offset for the GPIO being configured. | 226 | * @off: The offset for the GPIO being configured. |
diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile index 8bb6ba6d3572..16dde0819934 100644 --- a/arch/arm/plat-versatile/Makefile +++ b/arch/arm/plat-versatile/Makefile | |||
@@ -1,5 +1,4 @@ | |||
1 | obj-y := clock.o | 1 | obj-y := clock.o |
2 | obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o | ||
3 | ifneq ($(CONFIG_ARCH_INTEGRATOR),y) | 2 | ifneq ($(CONFIG_ARCH_INTEGRATOR),y) |
4 | obj-y += sched-clock.o | 3 | obj-y += sched-clock.o |
5 | endif | 4 | endif |
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 55590a4d87c9..2fea897ebeb1 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
@@ -12,7 +12,7 @@ | |||
12 | # | 12 | # |
13 | # http://www.arm.linux.org.uk/developer/machines/?action=new | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
14 | # | 14 | # |
15 | # Last update: Thu Sep 9 22:43:01 2010 | 15 | # Last update: Sun Dec 12 23:24:27 2010 |
16 | # | 16 | # |
17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
18 | # | 18 | # |
@@ -2321,7 +2321,7 @@ mx31txtr MACH_MX31TXTR MX31TXTR 2332 | |||
2321 | u380 MACH_U380 U380 2333 | 2321 | u380 MACH_U380 U380 2333 |
2322 | oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334 | 2322 | oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334 |
2323 | npcmx50 MACH_NPCMX50 NPCMX50 2335 | 2323 | npcmx50 MACH_NPCMX50 NPCMX50 2335 |
2324 | mx51_lange51 MACH_MX51_LANGE51 MX51_LANGE51 2336 | 2324 | mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336 |
2325 | mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337 | 2325 | mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337 |
2326 | riom MACH_RIOM RIOM 2338 | 2326 | riom MACH_RIOM RIOM 2338 |
2327 | comcas MACH_COMCAS COMCAS 2339 | 2327 | comcas MACH_COMCAS COMCAS 2339 |
@@ -2355,7 +2355,7 @@ at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366 | |||
2355 | csb732 MACH_CSB732 CSB732 2367 | 2355 | csb732 MACH_CSB732 CSB732 2367 |
2356 | u8500 MACH_U8500 U8500 2368 | 2356 | u8500 MACH_U8500 U8500 2368 |
2357 | huqiu MACH_HUQIU HUQIU 2369 | 2357 | huqiu MACH_HUQIU HUQIU 2369 |
2358 | mx51_kunlun MACH_MX51_KUNLUN MX51_KUNLUN 2370 | 2358 | mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370 |
2359 | pmt1g MACH_PMT1G PMT1G 2371 | 2359 | pmt1g MACH_PMT1G PMT1G 2371 |
2360 | htcelf MACH_HTCELF HTCELF 2372 | 2360 | htcelf MACH_HTCELF HTCELF 2372 |
2361 | armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373 | 2361 | armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373 |
@@ -2971,7 +2971,7 @@ premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 | |||
2971 | wasabi MACH_WASABI WASABI 2986 | 2971 | wasabi MACH_WASABI WASABI 2986 |
2972 | vivow MACH_VIVOW VIVOW 2987 | 2972 | vivow MACH_VIVOW VIVOW 2987 |
2973 | mx50_rdp MACH_MX50_RDP MX50_RDP 2988 | 2973 | mx50_rdp MACH_MX50_RDP MX50_RDP 2988 |
2974 | universal MACH_UNIVERSAL UNIVERSAL 2989 | 2974 | universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 |
2975 | real6410 MACH_REAL6410 REAL6410 2990 | 2975 | real6410 MACH_REAL6410 REAL6410 2990 |
2976 | spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 | 2976 | spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 |
2977 | ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 | 2977 | ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 |
@@ -3044,3 +3044,178 @@ harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059 | |||
3044 | msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 | 3044 | msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 |
3045 | spear900 MACH_SPEAR900 SPEAR900 3061 | 3045 | spear900 MACH_SPEAR900 SPEAR900 3061 |
3046 | pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 | 3046 | pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 |
3047 | rdstor MACH_RDSTOR RDSTOR 3063 | ||
3048 | usdloader MACH_USDLOADER USDLOADER 3064 | ||
3049 | tsoploader MACH_TSOPLOADER TSOPLOADER 3065 | ||
3050 | kronos MACH_KRONOS KRONOS 3066 | ||
3051 | ffcore MACH_FFCORE FFCORE 3067 | ||
3052 | mone MACH_MONE MONE 3068 | ||
3053 | unit2s MACH_UNIT2S UNIT2S 3069 | ||
3054 | acer_a5 MACH_ACER_A5 ACER_A5 3070 | ||
3055 | etherpro_isp MACH_ETHERPRO_ISP ETHERPRO_ISP 3071 | ||
3056 | stretchs7000 MACH_STRETCHS7000 STRETCHS7000 3072 | ||
3057 | p87_smartsim MACH_P87_SMARTSIM P87_SMARTSIM 3073 | ||
3058 | tulip MACH_TULIP TULIP 3074 | ||
3059 | sunflower MACH_SUNFLOWER SUNFLOWER 3075 | ||
3060 | rib MACH_RIB RIB 3076 | ||
3061 | clod MACH_CLOD CLOD 3077 | ||
3062 | rump MACH_RUMP RUMP 3078 | ||
3063 | tenderloin MACH_TENDERLOIN TENDERLOIN 3079 | ||
3064 | shortloin MACH_SHORTLOIN SHORTLOIN 3080 | ||
3065 | crespo MACH_CRESPO CRESPO 3081 | ||
3066 | antares MACH_ANTARES ANTARES 3082 | ||
3067 | wb40n MACH_WB40N WB40N 3083 | ||
3068 | herring MACH_HERRING HERRING 3084 | ||
3069 | naxy400 MACH_NAXY400 NAXY400 3085 | ||
3070 | naxy1200 MACH_NAXY1200 NAXY1200 3086 | ||
3071 | vpr200 MACH_VPR200 VPR200 3087 | ||
3072 | bug20 MACH_BUG20 BUG20 3088 | ||
3073 | goflexnet MACH_GOFLEXNET GOFLEXNET 3089 | ||
3074 | torbreck MACH_TORBRECK TORBRECK 3090 | ||
3075 | saarb_mg1 MACH_SAARB_MG1 SAARB_MG1 3091 | ||
3076 | callisto MACH_CALLISTO CALLISTO 3092 | ||
3077 | multhsu MACH_MULTHSU MULTHSU 3093 | ||
3078 | saluda MACH_SALUDA SALUDA 3094 | ||
3079 | pemp_omap3_apollo MACH_PEMP_OMAP3_APOLLO PEMP_OMAP3_APOLLO 3095 | ||
3080 | vc0718 MACH_VC0718 VC0718 3096 | ||
3081 | mvblx MACH_MVBLX MVBLX 3097 | ||
3082 | inhand_apeiron MACH_INHAND_APEIRON INHAND_APEIRON 3098 | ||
3083 | inhand_fury MACH_INHAND_FURY INHAND_FURY 3099 | ||
3084 | inhand_siren MACH_INHAND_SIREN INHAND_SIREN 3100 | ||
3085 | hdnvp MACH_HDNVP HDNVP 3101 | ||
3086 | softwinner MACH_SOFTWINNER SOFTWINNER 3102 | ||
3087 | prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 | ||
3088 | nas6210 MACH_NAS6210 NAS6210 3104 | ||
3089 | unisdev MACH_UNISDEV UNISDEV 3105 | ||
3090 | sbca11 MACH_SBCA11 SBCA11 3106 | ||
3091 | saga MACH_SAGA SAGA 3107 | ||
3092 | ns_k330 MACH_NS_K330 NS_K330 3108 | ||
3093 | tanna MACH_TANNA TANNA 3109 | ||
3094 | imate8502 MACH_IMATE8502 IMATE8502 3110 | ||
3095 | aspen MACH_ASPEN ASPEN 3111 | ||
3096 | daintree_cwac MACH_DAINTREE_CWAC DAINTREE_CWAC 3112 | ||
3097 | zmx25 MACH_ZMX25 ZMX25 3113 | ||
3098 | maple1 MACH_MAPLE1 MAPLE1 3114 | ||
3099 | qsd8x72_surf MACH_QSD8X72_SURF QSD8X72_SURF 3115 | ||
3100 | qsd8x72_ffa MACH_QSD8X72_FFA QSD8X72_FFA 3116 | ||
3101 | abilene MACH_ABILENE ABILENE 3117 | ||
3102 | eigen_ttr MACH_EIGEN_TTR EIGEN_TTR 3118 | ||
3103 | iomega_ix2_200 MACH_IOMEGA_IX2_200 IOMEGA_IX2_200 3119 | ||
3104 | coretec_vcx7400 MACH_CORETEC_VCX7400 CORETEC_VCX7400 3120 | ||
3105 | santiago MACH_SANTIAGO SANTIAGO 3121 | ||
3106 | mx257sol MACH_MX257SOL MX257SOL 3122 | ||
3107 | strasbourg MACH_STRASBOURG STRASBOURG 3123 | ||
3108 | msm8x60_fluid MACH_MSM8X60_FLUID MSM8X60_FLUID 3124 | ||
3109 | smartqv5 MACH_SMARTQV5 SMARTQV5 3125 | ||
3110 | smartqv3 MACH_SMARTQV3 SMARTQV3 3126 | ||
3111 | smartqv7 MACH_SMARTQV7 SMARTQV7 3127 | ||
3112 | paz00 MACH_PAZ00 PAZ00 3128 | ||
3113 | acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 | ||
3114 | htcwillow MACH_HTCWILLOW HTCWILLOW 3130 | ||
3115 | fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 | ||
3116 | hdgu MACH_HDGU HDGU 3132 | ||
3117 | pyramid MACH_PYRAMID PYRAMID 3133 | ||
3118 | epiphan MACH_EPIPHAN EPIPHAN 3134 | ||
3119 | omap_bender MACH_OMAP_BENDER OMAP_BENDER 3135 | ||
3120 | gurnard MACH_GURNARD GURNARD 3136 | ||
3121 | gtl_it5100 MACH_GTL_IT5100 GTL_IT5100 3137 | ||
3122 | bcm2708 MACH_BCM2708 BCM2708 3138 | ||
3123 | mx51_ggc MACH_MX51_GGC MX51_GGC 3139 | ||
3124 | sharespace MACH_SHARESPACE SHARESPACE 3140 | ||
3125 | haba_knx_explorer MACH_HABA_KNX_EXPLORER HABA_KNX_EXPLORER 3141 | ||
3126 | simtec_kirkmod MACH_SIMTEC_KIRKMOD SIMTEC_KIRKMOD 3142 | ||
3127 | crux MACH_CRUX CRUX 3143 | ||
3128 | mx51_bravo MACH_MX51_BRAVO MX51_BRAVO 3144 | ||
3129 | charon MACH_CHARON CHARON 3145 | ||
3130 | picocom3 MACH_PICOCOM3 PICOCOM3 3146 | ||
3131 | picocom4 MACH_PICOCOM4 PICOCOM4 3147 | ||
3132 | serrano MACH_SERRANO SERRANO 3148 | ||
3133 | doubleshot MACH_DOUBLESHOT DOUBLESHOT 3149 | ||
3134 | evsy MACH_EVSY EVSY 3150 | ||
3135 | huashan MACH_HUASHAN HUASHAN 3151 | ||
3136 | lausanne MACH_LAUSANNE LAUSANNE 3152 | ||
3137 | emerald MACH_EMERALD EMERALD 3153 | ||
3138 | tqma35 MACH_TQMA35 TQMA35 3154 | ||
3139 | marvel MACH_MARVEL MARVEL 3155 | ||
3140 | manuae MACH_MANUAE MANUAE 3156 | ||
3141 | chacha MACH_CHACHA CHACHA 3157 | ||
3142 | lemon MACH_LEMON LEMON 3158 | ||
3143 | csc MACH_CSC CSC 3159 | ||
3144 | gira_knxip_router MACH_GIRA_KNXIP_ROUTER GIRA_KNXIP_ROUTER 3160 | ||
3145 | t20 MACH_T20 T20 3161 | ||
3146 | hdmini MACH_HDMINI HDMINI 3162 | ||
3147 | sciphone_g2 MACH_SCIPHONE_G2 SCIPHONE_G2 3163 | ||
3148 | express MACH_EXPRESS EXPRESS 3164 | ||
3149 | express_kt MACH_EXPRESS_KT EXPRESS_KT 3165 | ||
3150 | maximasp MACH_MAXIMASP MAXIMASP 3166 | ||
3151 | nitrogen_imx51 MACH_NITROGEN_IMX51 NITROGEN_IMX51 3167 | ||
3152 | nitrogen_imx53 MACH_NITROGEN_IMX53 NITROGEN_IMX53 3168 | ||
3153 | sunfire MACH_SUNFIRE SUNFIRE 3169 | ||
3154 | arowana MACH_AROWANA AROWANA 3170 | ||
3155 | tegra_daytona MACH_TEGRA_DAYTONA TEGRA_DAYTONA 3171 | ||
3156 | tegra_swordfish MACH_TEGRA_SWORDFISH TEGRA_SWORDFISH 3172 | ||
3157 | edison MACH_EDISON EDISON 3173 | ||
3158 | svp8500v1 MACH_SVP8500V1 SVP8500V1 3174 | ||
3159 | svp8500v2 MACH_SVP8500V2 SVP8500V2 3175 | ||
3160 | svp5500 MACH_SVP5500 SVP5500 3176 | ||
3161 | b5500 MACH_B5500 B5500 3177 | ||
3162 | s5500 MACH_S5500 S5500 3178 | ||
3163 | icon MACH_ICON ICON 3179 | ||
3164 | elephant MACH_ELEPHANT ELEPHANT 3180 | ||
3165 | msm8x60_fusion MACH_MSM8X60_FUSION MSM8X60_FUSION 3181 | ||
3166 | shooter MACH_SHOOTER SHOOTER 3182 | ||
3167 | spade_lte MACH_SPADE_LTE SPADE_LTE 3183 | ||
3168 | philhwani MACH_PHILHWANI PHILHWANI 3184 | ||
3169 | gsncomm MACH_GSNCOMM GSNCOMM 3185 | ||
3170 | strasbourg_a2 MACH_STRASBOURG_A2 STRASBOURG_A2 3186 | ||
3171 | mmm MACH_MMM MMM 3187 | ||
3172 | davinci_dm365_bv MACH_DAVINCI_DM365_BV DAVINCI_DM365_BV 3188 | ||
3173 | ag5evm MACH_AG5EVM AG5EVM 3189 | ||
3174 | sc575plc MACH_SC575PLC SC575PLC 3190 | ||
3175 | sc575hmi MACH_SC575IPC SC575IPC 3191 | ||
3176 | omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 | ||
3177 | g7 MACH_G7 G7 3193 | ||
3178 | top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 | ||
3179 | top9000_su MACH_TOP9000_SU TOP9000_SU 3195 | ||
3180 | utm300 MACH_UTM300 UTM300 3196 | ||
3181 | tsunagi MACH_TSUNAGI TSUNAGI 3197 | ||
3182 | ts75xx MACH_TS75XX TS75XX 3198 | ||
3183 | msm8x60_fusn_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199 | ||
3184 | ts47xx MACH_TS47XX TS47XX 3200 | ||
3185 | da850_k5 MACH_DA850_K5 DA850_K5 3201 | ||
3186 | ax502 MACH_AX502 AX502 3202 | ||
3187 | igep0032 MACH_IGEP0032 IGEP0032 3203 | ||
3188 | antero MACH_ANTERO ANTERO 3204 | ||
3189 | synergy MACH_SYNERGY SYNERGY 3205 | ||
3190 | ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 | ||
3191 | wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 | ||
3192 | punica MACH_PUNICA PUNICA 3208 | ||
3193 | sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209 | ||
3194 | mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 | ||
3195 | mackerel MACH_MACKEREL MACKEREL 3211 | ||
3196 | fa9x27 MACH_FA9X27 FA9X27 3213 | ||
3197 | ns2816tb MACH_NS2816TB NS2816TB 3214 | ||
3198 | ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215 | ||
3199 | ns2816_ntnb MACH_NS2816_NTNB NS2816_NTNB 3216 | ||
3200 | kaen MACH_KAEN KAEN 3217 | ||
3201 | nv1000 MACH_NV1000 NV1000 3218 | ||
3202 | nuc950ts MACH_NUC950TS NUC950TS 3219 | ||
3203 | nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220 | ||
3204 | ast2200 MACH_AST2200 AST2200 3221 | ||
3205 | lead MACH_LEAD LEAD 3222 | ||
3206 | unino1 MACH_UNINO1 UNINO1 3223 | ||
3207 | greeco MACH_GREECO GREECO 3224 | ||
3208 | verdi MACH_VERDI VERDI 3225 | ||
3209 | dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226 | ||
3210 | quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227 | ||
3211 | abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228 | ||
3212 | svcid MACH_SVCID SVCID 3229 | ||
3213 | msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230 | ||
3214 | msm8960_rumi3 MACH_MSM8960_RUMI3 MSM8960_RUMI3 3231 | ||
3215 | icon_g MACH_ICON_G ICON_G 3232 | ||
3216 | mb3 MACH_MB3 MB3 3233 | ||
3217 | gsia18s MACH_GSIA18S GSIA18S 3234 | ||
3218 | pivicc MACH_PIVICC PIVICC 3235 | ||
3219 | pcm048 MACH_PCM048 PCM048 3236 | ||
3220 | dds MACH_DDS DDS 3237 | ||
3221 | chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238 | ||
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index d66cead97d28..9897dcfc16d6 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -206,6 +206,7 @@ ENTRY(vfp_save_state) | |||
206 | mov pc, lr | 206 | mov pc, lr |
207 | ENDPROC(vfp_save_state) | 207 | ENDPROC(vfp_save_state) |
208 | 208 | ||
209 | .align | ||
209 | last_VFP_context_address: | 210 | last_VFP_context_address: |
210 | .word last_VFP_context | 211 | .word last_VFP_context |
211 | 212 | ||