diff options
Diffstat (limited to 'arch/arm')
157 files changed, 1709 insertions, 753 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 233a222752c0..184a6bd54825 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -18,6 +18,8 @@ config ARM | |||
18 | select HAVE_KRETPROBES if (HAVE_KPROBES) | 18 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
19 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) | 19 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
20 | select HAVE_GENERIC_DMA_COHERENT | 20 | select HAVE_GENERIC_DMA_COHERENT |
21 | select HAVE_KERNEL_GZIP | ||
22 | select HAVE_KERNEL_LZO | ||
21 | help | 23 | help |
22 | The ARM series is a line of low-power-consumption RISC chip designs | 24 | The ARM series is a line of low-power-consumption RISC chip designs |
23 | licensed by ARM Ltd and targeted at embedded applications and | 25 | licensed by ARM Ltd and targeted at embedded applications and |
@@ -688,6 +690,7 @@ config ARCH_DAVINCI | |||
688 | select HAVE_IDE | 690 | select HAVE_IDE |
689 | select COMMON_CLKDEV | 691 | select COMMON_CLKDEV |
690 | select GENERIC_ALLOCATOR | 692 | select GENERIC_ALLOCATOR |
693 | select ARCH_HAS_HOLES_MEMORYMODEL | ||
691 | help | 694 | help |
692 | Support for TI's DaVinci platform. | 695 | Support for TI's DaVinci platform. |
693 | 696 | ||
@@ -699,6 +702,7 @@ config ARCH_OMAP | |||
699 | select ARCH_HAS_CPUFREQ | 702 | select ARCH_HAS_CPUFREQ |
700 | select GENERIC_TIME | 703 | select GENERIC_TIME |
701 | select GENERIC_CLOCKEVENTS | 704 | select GENERIC_CLOCKEVENTS |
705 | select ARCH_HAS_HOLES_MEMORYMODEL | ||
702 | help | 706 | help |
703 | Support for TI's OMAP platform (OMAP1 and OMAP2). | 707 | Support for TI's OMAP platform (OMAP1 and OMAP2). |
704 | 708 | ||
@@ -726,14 +730,26 @@ config ARCH_U8500 | |||
726 | 730 | ||
727 | endchoice | 731 | endchoice |
728 | 732 | ||
733 | source "arch/arm/mach-aaec2000/Kconfig" | ||
734 | |||
735 | source "arch/arm/mach-at91/Kconfig" | ||
736 | |||
737 | source "arch/arm/mach-bcmring/Kconfig" | ||
738 | |||
729 | source "arch/arm/mach-clps711x/Kconfig" | 739 | source "arch/arm/mach-clps711x/Kconfig" |
730 | 740 | ||
741 | source "arch/arm/mach-davinci/Kconfig" | ||
742 | |||
743 | source "arch/arm/mach-dove/Kconfig" | ||
744 | |||
731 | source "arch/arm/mach-ep93xx/Kconfig" | 745 | source "arch/arm/mach-ep93xx/Kconfig" |
732 | 746 | ||
733 | source "arch/arm/mach-footbridge/Kconfig" | 747 | source "arch/arm/mach-footbridge/Kconfig" |
734 | 748 | ||
735 | source "arch/arm/mach-gemini/Kconfig" | 749 | source "arch/arm/mach-gemini/Kconfig" |
736 | 750 | ||
751 | source "arch/arm/mach-h720x/Kconfig" | ||
752 | |||
737 | source "arch/arm/mach-integrator/Kconfig" | 753 | source "arch/arm/mach-integrator/Kconfig" |
738 | 754 | ||
739 | source "arch/arm/mach-iop32x/Kconfig" | 755 | source "arch/arm/mach-iop32x/Kconfig" |
@@ -748,16 +764,26 @@ source "arch/arm/mach-ixp2000/Kconfig" | |||
748 | 764 | ||
749 | source "arch/arm/mach-ixp23xx/Kconfig" | 765 | source "arch/arm/mach-ixp23xx/Kconfig" |
750 | 766 | ||
767 | source "arch/arm/mach-kirkwood/Kconfig" | ||
768 | |||
769 | source "arch/arm/mach-ks8695/Kconfig" | ||
770 | |||
771 | source "arch/arm/mach-lh7a40x/Kconfig" | ||
772 | |||
751 | source "arch/arm/mach-loki/Kconfig" | 773 | source "arch/arm/mach-loki/Kconfig" |
752 | 774 | ||
775 | source "arch/arm/mach-msm/Kconfig" | ||
776 | |||
753 | source "arch/arm/mach-mv78xx0/Kconfig" | 777 | source "arch/arm/mach-mv78xx0/Kconfig" |
754 | 778 | ||
755 | source "arch/arm/mach-pxa/Kconfig" | 779 | source "arch/arm/plat-mxc/Kconfig" |
756 | source "arch/arm/plat-pxa/Kconfig" | ||
757 | 780 | ||
758 | source "arch/arm/mach-mmp/Kconfig" | 781 | source "arch/arm/mach-netx/Kconfig" |
759 | 782 | ||
760 | source "arch/arm/mach-sa1100/Kconfig" | 783 | source "arch/arm/mach-nomadik/Kconfig" |
784 | source "arch/arm/plat-nomadik/Kconfig" | ||
785 | |||
786 | source "arch/arm/mach-ns9xxx/Kconfig" | ||
761 | 787 | ||
762 | source "arch/arm/plat-omap/Kconfig" | 788 | source "arch/arm/plat-omap/Kconfig" |
763 | 789 | ||
@@ -767,9 +793,14 @@ source "arch/arm/mach-omap2/Kconfig" | |||
767 | 793 | ||
768 | source "arch/arm/mach-orion5x/Kconfig" | 794 | source "arch/arm/mach-orion5x/Kconfig" |
769 | 795 | ||
770 | source "arch/arm/mach-kirkwood/Kconfig" | 796 | source "arch/arm/mach-pxa/Kconfig" |
797 | source "arch/arm/plat-pxa/Kconfig" | ||
771 | 798 | ||
772 | source "arch/arm/mach-dove/Kconfig" | 799 | source "arch/arm/mach-mmp/Kconfig" |
800 | |||
801 | source "arch/arm/mach-realview/Kconfig" | ||
802 | |||
803 | source "arch/arm/mach-sa1100/Kconfig" | ||
773 | 804 | ||
774 | source "arch/arm/plat-samsung/Kconfig" | 805 | source "arch/arm/plat-samsung/Kconfig" |
775 | source "arch/arm/plat-s3c24xx/Kconfig" | 806 | source "arch/arm/plat-s3c24xx/Kconfig" |
@@ -797,41 +828,14 @@ if ARCH_S5PC1XX | |||
797 | source "arch/arm/mach-s5pc100/Kconfig" | 828 | source "arch/arm/mach-s5pc100/Kconfig" |
798 | endif | 829 | endif |
799 | 830 | ||
800 | source "arch/arm/mach-lh7a40x/Kconfig" | 831 | source "arch/arm/mach-u300/Kconfig" |
801 | 832 | ||
802 | source "arch/arm/mach-h720x/Kconfig" | 833 | source "arch/arm/mach-ux500/Kconfig" |
803 | 834 | ||
804 | source "arch/arm/mach-versatile/Kconfig" | 835 | source "arch/arm/mach-versatile/Kconfig" |
805 | 836 | ||
806 | source "arch/arm/mach-aaec2000/Kconfig" | ||
807 | |||
808 | source "arch/arm/mach-realview/Kconfig" | ||
809 | |||
810 | source "arch/arm/mach-at91/Kconfig" | ||
811 | |||
812 | source "arch/arm/plat-mxc/Kconfig" | ||
813 | |||
814 | source "arch/arm/mach-nomadik/Kconfig" | ||
815 | source "arch/arm/plat-nomadik/Kconfig" | ||
816 | |||
817 | source "arch/arm/mach-netx/Kconfig" | ||
818 | |||
819 | source "arch/arm/mach-ns9xxx/Kconfig" | ||
820 | |||
821 | source "arch/arm/mach-davinci/Kconfig" | ||
822 | |||
823 | source "arch/arm/mach-ks8695/Kconfig" | ||
824 | |||
825 | source "arch/arm/mach-msm/Kconfig" | ||
826 | |||
827 | source "arch/arm/mach-u300/Kconfig" | ||
828 | |||
829 | source "arch/arm/mach-w90x900/Kconfig" | 837 | source "arch/arm/mach-w90x900/Kconfig" |
830 | 838 | ||
831 | source "arch/arm/mach-bcmring/Kconfig" | ||
832 | |||
833 | source "arch/arm/mach-ux500/Kconfig" | ||
834 | |||
835 | # Definitions to make life easier | 839 | # Definitions to make life easier |
836 | config ARCH_ACORN | 840 | config ARCH_ACORN |
837 | bool | 841 | bool |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index e9da08483b3c..356d702c0808 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -94,7 +94,7 @@ CFLAGS_ABI +=-funwind-tables | |||
94 | endif | 94 | endif |
95 | 95 | ||
96 | ifeq ($(CONFIG_THUMB2_KERNEL),y) | 96 | ifeq ($(CONFIG_THUMB2_KERNEL),y) |
97 | AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=thumb,-Wa$(comma)-mauto-it) | 97 | AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it) |
98 | AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) | 98 | AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W) |
99 | CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) | 99 | CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN) |
100 | AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb | 100 | AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb |
@@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1) := mx1 | |||
146 | machine-$(CONFIG_ARCH_MX2) := mx2 | 146 | machine-$(CONFIG_ARCH_MX2) := mx2 |
147 | machine-$(CONFIG_ARCH_MX25) := mx25 | 147 | machine-$(CONFIG_ARCH_MX25) := mx25 |
148 | machine-$(CONFIG_ARCH_MX3) := mx3 | 148 | machine-$(CONFIG_ARCH_MX3) := mx3 |
149 | machine-$(CONFIG_ARCH_MXC91231) := mxc91231 | ||
149 | machine-$(CONFIG_ARCH_NETX) := netx | 150 | machine-$(CONFIG_ARCH_NETX) := netx |
150 | machine-$(CONFIG_ARCH_NOMADIK) := nomadik | 151 | machine-$(CONFIG_ARCH_NOMADIK) := nomadik |
151 | machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx | 152 | machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx |
@@ -171,12 +172,12 @@ machine-$(CONFIG_ARCH_U8500) := ux500 | |||
171 | machine-$(CONFIG_ARCH_VERSATILE) := versatile | 172 | machine-$(CONFIG_ARCH_VERSATILE) := versatile |
172 | machine-$(CONFIG_ARCH_W90X900) := w90x900 | 173 | machine-$(CONFIG_ARCH_W90X900) := w90x900 |
173 | machine-$(CONFIG_FOOTBRIDGE) := footbridge | 174 | machine-$(CONFIG_FOOTBRIDGE) := footbridge |
174 | machine-$(CONFIG_ARCH_MXC91231) := mxc91231 | ||
175 | 175 | ||
176 | # Platform directory name. This list is sorted alphanumerically | 176 | # Platform directory name. This list is sorted alphanumerically |
177 | # by CONFIG_* macro name. | 177 | # by CONFIG_* macro name. |
178 | plat-$(CONFIG_ARCH_MXC) := mxc | 178 | plat-$(CONFIG_ARCH_MXC) := mxc |
179 | plat-$(CONFIG_ARCH_OMAP) := omap | 179 | plat-$(CONFIG_ARCH_OMAP) := omap |
180 | plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx | ||
180 | plat-$(CONFIG_PLAT_IOP) := iop | 181 | plat-$(CONFIG_PLAT_IOP) := iop |
181 | plat-$(CONFIG_PLAT_NOMADIK) := nomadik | 182 | plat-$(CONFIG_PLAT_NOMADIK) := nomadik |
182 | plat-$(CONFIG_PLAT_ORION) := orion | 183 | plat-$(CONFIG_PLAT_ORION) := orion |
@@ -184,7 +185,6 @@ plat-$(CONFIG_PLAT_PXA) := pxa | |||
184 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung | 185 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung |
185 | plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung | 186 | plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung |
186 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung | 187 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung |
187 | plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx | ||
188 | 188 | ||
189 | ifeq ($(CONFIG_ARCH_EBSA110),y) | 189 | ifeq ($(CONFIG_ARCH_EBSA110),y) |
190 | # This is what happens if you forget the IOCS16 line. | 190 | # This is what happens if you forget the IOCS16 line. |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index ce39dc540085..2d4d88ba73bf 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -63,8 +63,12 @@ endif | |||
63 | 63 | ||
64 | SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ | 64 | SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ |
65 | 65 | ||
66 | targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ | 66 | suffix_$(CONFIG_KERNEL_GZIP) = gzip |
67 | head.o misc.o $(OBJS) | 67 | suffix_$(CONFIG_KERNEL_LZO) = lzo |
68 | |||
69 | targets := vmlinux vmlinux.lds \ | ||
70 | piggy.$(suffix_y) piggy.$(suffix_y).o \ | ||
71 | font.o font.c head.o misc.o $(OBJS) | ||
68 | 72 | ||
69 | ifeq ($(CONFIG_FUNCTION_TRACER),y) | 73 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
70 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 74 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
@@ -87,22 +91,34 @@ endif | |||
87 | ifneq ($(PARAMS_PHYS),) | 91 | ifneq ($(PARAMS_PHYS),) |
88 | LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS) | 92 | LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS) |
89 | endif | 93 | endif |
90 | LDFLAGS_vmlinux += -p --no-undefined -X \ | 94 | # ? |
91 | $(shell $(CC) $(KBUILD_CFLAGS) --print-libgcc-file-name) -T | 95 | LDFLAGS_vmlinux += -p |
96 | # Report unresolved symbol references | ||
97 | LDFLAGS_vmlinux += --no-undefined | ||
98 | # Delete all temporary local symbols | ||
99 | LDFLAGS_vmlinux += -X | ||
100 | # Next argument is a linker script | ||
101 | LDFLAGS_vmlinux += -T | ||
102 | |||
103 | # For __aeabi_uidivmod | ||
104 | lib1funcs = $(obj)/lib1funcs.o | ||
105 | |||
106 | $(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE | ||
107 | $(call cmd,shipped) | ||
92 | 108 | ||
93 | # Don't allow any static data in misc.o, which | 109 | # Don't allow any static data in misc.o, which |
94 | # would otherwise mess up our GOT table | 110 | # would otherwise mess up our GOT table |
95 | CFLAGS_misc.o := -Dstatic= | 111 | CFLAGS_misc.o := -Dstatic= |
96 | 112 | ||
97 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.o \ | 113 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \ |
98 | $(addprefix $(obj)/, $(OBJS)) FORCE | 114 | $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE |
99 | $(call if_changed,ld) | 115 | $(call if_changed,ld) |
100 | @: | 116 | @: |
101 | 117 | ||
102 | $(obj)/piggy.gz: $(obj)/../Image FORCE | 118 | $(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE |
103 | $(call if_changed,gzip) | 119 | $(call if_changed,$(suffix_y)) |
104 | 120 | ||
105 | $(obj)/piggy.o: $(obj)/piggy.gz FORCE | 121 | $(obj)/piggy.$(suffix_y).o: $(obj)/piggy.$(suffix_y) FORCE |
106 | 122 | ||
107 | CFLAGS_font.o := -Dstatic= | 123 | CFLAGS_font.o := -Dstatic= |
108 | 124 | ||
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index d356af7cef82..4fddc509e78e 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -27,6 +27,14 @@ | |||
27 | .macro writeb, ch, rb | 27 | .macro writeb, ch, rb |
28 | mcr p14, 0, \ch, c0, c5, 0 | 28 | mcr p14, 0, \ch, c0, c5, 0 |
29 | .endm | 29 | .endm |
30 | #elif defined(CONFIG_CPU_V7) | ||
31 | .macro loadsp, rb | ||
32 | .endm | ||
33 | .macro writeb, ch, rb | ||
34 | wait: mrc p14, 0, pc, c0, c1, 0 | ||
35 | bcs wait | ||
36 | mcr p14, 0, \ch, c0, c5, 0 | ||
37 | .endm | ||
30 | #elif defined(CONFIG_CPU_XSCALE) | 38 | #elif defined(CONFIG_CPU_XSCALE) |
31 | .macro loadsp, rb | 39 | .macro loadsp, rb |
32 | .endm | 40 | .endm |
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index 17153b54613b..56a0d116d271 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c | |||
@@ -18,10 +18,15 @@ | |||
18 | 18 | ||
19 | unsigned int __machine_arch_type; | 19 | unsigned int __machine_arch_type; |
20 | 20 | ||
21 | #define _LINUX_STRING_H_ | ||
22 | |||
21 | #include <linux/compiler.h> /* for inline */ | 23 | #include <linux/compiler.h> /* for inline */ |
22 | #include <linux/types.h> /* for size_t */ | 24 | #include <linux/types.h> /* for size_t */ |
23 | #include <linux/stddef.h> /* for NULL */ | 25 | #include <linux/stddef.h> /* for NULL */ |
24 | #include <asm/string.h> | 26 | #include <asm/string.h> |
27 | #include <linux/linkage.h> | ||
28 | |||
29 | #include <asm/unaligned.h> | ||
25 | 30 | ||
26 | #ifdef STANDALONE_DEBUG | 31 | #ifdef STANDALONE_DEBUG |
27 | #define putstr printf | 32 | #define putstr printf |
@@ -48,6 +53,18 @@ static void icedcc_putc(int ch) | |||
48 | 53 | ||
49 | asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); | 54 | asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); |
50 | } | 55 | } |
56 | |||
57 | #elif defined(CONFIG_CPU_V7) | ||
58 | |||
59 | static void icedcc_putc(int ch) | ||
60 | { | ||
61 | asm( | ||
62 | "wait: mrc p14, 0, pc, c0, c1, 0 \n\ | ||
63 | bcs wait \n\ | ||
64 | mcr p14, 0, %0, c0, c5, 0 " | ||
65 | : : "r" (ch)); | ||
66 | } | ||
67 | |||
51 | #elif defined(CONFIG_CPU_XSCALE) | 68 | #elif defined(CONFIG_CPU_XSCALE) |
52 | 69 | ||
53 | static void icedcc_putc(int ch) | 70 | static void icedcc_putc(int ch) |
@@ -83,7 +100,6 @@ static void icedcc_putc(int ch) | |||
83 | #endif | 100 | #endif |
84 | 101 | ||
85 | #define putc(ch) icedcc_putc(ch) | 102 | #define putc(ch) icedcc_putc(ch) |
86 | #define flush() do { } while (0) | ||
87 | #endif | 103 | #endif |
88 | 104 | ||
89 | static void putstr(const char *ptr) | 105 | static void putstr(const char *ptr) |
@@ -188,34 +204,8 @@ static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src, | |||
188 | /* | 204 | /* |
189 | * gzip delarations | 205 | * gzip delarations |
190 | */ | 206 | */ |
191 | #define OF(args) args | ||
192 | #define STATIC static | 207 | #define STATIC static |
193 | 208 | ||
194 | typedef unsigned char uch; | ||
195 | typedef unsigned short ush; | ||
196 | typedef unsigned long ulg; | ||
197 | |||
198 | #define WSIZE 0x8000 /* Window size must be at least 32k, */ | ||
199 | /* and a power of two */ | ||
200 | |||
201 | static uch *inbuf; /* input buffer */ | ||
202 | static uch window[WSIZE]; /* Sliding window buffer */ | ||
203 | |||
204 | static unsigned insize; /* valid bytes in inbuf */ | ||
205 | static unsigned inptr; /* index of next byte to be processed in inbuf */ | ||
206 | static unsigned outcnt; /* bytes in output buffer */ | ||
207 | |||
208 | /* gzip flag byte */ | ||
209 | #define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */ | ||
210 | #define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ | ||
211 | #define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ | ||
212 | #define ORIG_NAME 0x08 /* bit 3 set: original file name present */ | ||
213 | #define COMMENT 0x10 /* bit 4 set: file comment present */ | ||
214 | #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ | ||
215 | #define RESERVED 0xC0 /* bit 6,7: reserved */ | ||
216 | |||
217 | #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) | ||
218 | |||
219 | /* Diagnostic functions */ | 209 | /* Diagnostic functions */ |
220 | #ifdef DEBUG | 210 | #ifdef DEBUG |
221 | # define Assert(cond,msg) {if(!(cond)) error(msg);} | 211 | # define Assert(cond,msg) {if(!(cond)) error(msg);} |
@@ -233,24 +223,20 @@ static unsigned outcnt; /* bytes in output buffer */ | |||
233 | # define Tracecv(c,x) | 223 | # define Tracecv(c,x) |
234 | #endif | 224 | #endif |
235 | 225 | ||
236 | static int fill_inbuf(void); | ||
237 | static void flush_window(void); | ||
238 | static void error(char *m); | 226 | static void error(char *m); |
239 | 227 | ||
240 | extern char input_data[]; | 228 | extern char input_data[]; |
241 | extern char input_data_end[]; | 229 | extern char input_data_end[]; |
242 | 230 | ||
243 | static uch *output_data; | 231 | static unsigned char *output_data; |
244 | static ulg output_ptr; | 232 | static unsigned long output_ptr; |
245 | static ulg bytes_out; | ||
246 | 233 | ||
247 | static void error(char *m); | 234 | static void error(char *m); |
248 | 235 | ||
249 | static void putstr(const char *); | 236 | static void putstr(const char *); |
250 | 237 | ||
251 | extern int end; | 238 | static unsigned long free_mem_ptr; |
252 | static ulg free_mem_ptr; | 239 | static unsigned long free_mem_end_ptr; |
253 | static ulg free_mem_end_ptr; | ||
254 | 240 | ||
255 | #ifdef STANDALONE_DEBUG | 241 | #ifdef STANDALONE_DEBUG |
256 | #define NO_INFLATE_MALLOC | 242 | #define NO_INFLATE_MALLOC |
@@ -258,46 +244,13 @@ static ulg free_mem_end_ptr; | |||
258 | 244 | ||
259 | #define ARCH_HAS_DECOMP_WDOG | 245 | #define ARCH_HAS_DECOMP_WDOG |
260 | 246 | ||
261 | #include "../../../../lib/inflate.c" | 247 | #ifdef CONFIG_KERNEL_GZIP |
262 | 248 | #include "../../../../lib/decompress_inflate.c" | |
263 | /* =========================================================================== | 249 | #endif |
264 | * Fill the input buffer. This is called only when the buffer is empty | ||
265 | * and at least one byte is really needed. | ||
266 | */ | ||
267 | int fill_inbuf(void) | ||
268 | { | ||
269 | if (insize != 0) | ||
270 | error("ran out of input data"); | ||
271 | |||
272 | inbuf = input_data; | ||
273 | insize = &input_data_end[0] - &input_data[0]; | ||
274 | |||
275 | inptr = 1; | ||
276 | return inbuf[0]; | ||
277 | } | ||
278 | 250 | ||
279 | /* =========================================================================== | 251 | #ifdef CONFIG_KERNEL_LZO |
280 | * Write the output window window[0..outcnt-1] and update crc and bytes_out. | 252 | #include "../../../../lib/decompress_unlzo.c" |
281 | * (Used for the decompressed data only.) | 253 | #endif |
282 | */ | ||
283 | void flush_window(void) | ||
284 | { | ||
285 | ulg c = crc; | ||
286 | unsigned n; | ||
287 | uch *in, *out, ch; | ||
288 | |||
289 | in = window; | ||
290 | out = &output_data[output_ptr]; | ||
291 | for (n = 0; n < outcnt; n++) { | ||
292 | ch = *out++ = *in++; | ||
293 | c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); | ||
294 | } | ||
295 | crc = c; | ||
296 | bytes_out += (ulg)outcnt; | ||
297 | output_ptr += (ulg)outcnt; | ||
298 | outcnt = 0; | ||
299 | putstr("."); | ||
300 | } | ||
301 | 254 | ||
302 | #ifndef arch_error | 255 | #ifndef arch_error |
303 | #define arch_error(x) | 256 | #define arch_error(x) |
@@ -314,22 +267,33 @@ static void error(char *x) | |||
314 | while(1); /* Halt */ | 267 | while(1); /* Halt */ |
315 | } | 268 | } |
316 | 269 | ||
270 | asmlinkage void __div0(void) | ||
271 | { | ||
272 | error("Attempting division by 0!"); | ||
273 | } | ||
274 | |||
317 | #ifndef STANDALONE_DEBUG | 275 | #ifndef STANDALONE_DEBUG |
318 | 276 | ||
319 | ulg | 277 | unsigned long |
320 | decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p, | 278 | decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p, |
321 | int arch_id) | 279 | unsigned long free_mem_ptr_end_p, |
280 | int arch_id) | ||
322 | { | 281 | { |
323 | output_data = (uch *)output_start; /* Points to kernel start */ | 282 | unsigned char *tmp; |
283 | |||
284 | output_data = (unsigned char *)output_start; | ||
324 | free_mem_ptr = free_mem_ptr_p; | 285 | free_mem_ptr = free_mem_ptr_p; |
325 | free_mem_end_ptr = free_mem_ptr_end_p; | 286 | free_mem_end_ptr = free_mem_ptr_end_p; |
326 | __machine_arch_type = arch_id; | 287 | __machine_arch_type = arch_id; |
327 | 288 | ||
328 | arch_decomp_setup(); | 289 | arch_decomp_setup(); |
329 | 290 | ||
330 | makecrc(); | 291 | tmp = (unsigned char *) (((unsigned long)input_data_end) - 4); |
292 | output_ptr = get_unaligned_le32(tmp); | ||
293 | |||
331 | putstr("Uncompressing Linux..."); | 294 | putstr("Uncompressing Linux..."); |
332 | gunzip(); | 295 | decompress(input_data, input_data_end - input_data, |
296 | NULL, NULL, output_data, NULL, error); | ||
333 | putstr(" done, booting the kernel.\n"); | 297 | putstr(" done, booting the kernel.\n"); |
334 | return output_ptr; | 298 | return output_ptr; |
335 | } | 299 | } |
@@ -341,11 +305,10 @@ int main() | |||
341 | { | 305 | { |
342 | output_data = output_buffer; | 306 | output_data = output_buffer; |
343 | 307 | ||
344 | makecrc(); | ||
345 | putstr("Uncompressing Linux..."); | 308 | putstr("Uncompressing Linux..."); |
346 | gunzip(); | 309 | decompress(input_data, input_data_end - input_data, |
310 | NULL, NULL, output_data, NULL, error); | ||
347 | putstr("done.\n"); | 311 | putstr("done.\n"); |
348 | return 0; | 312 | return 0; |
349 | } | 313 | } |
350 | #endif | 314 | #endif |
351 | |||
diff --git a/arch/arm/boot/compressed/piggy.gzip.S b/arch/arm/boot/compressed/piggy.gzip.S new file mode 100644 index 000000000000..a68adf91a165 --- /dev/null +++ b/arch/arm/boot/compressed/piggy.gzip.S | |||
@@ -0,0 +1,6 @@ | |||
1 | .section .piggydata,#alloc | ||
2 | .globl input_data | ||
3 | input_data: | ||
4 | .incbin "arch/arm/boot/compressed/piggy.gzip" | ||
5 | .globl input_data_end | ||
6 | input_data_end: | ||
diff --git a/arch/arm/boot/compressed/piggy.S b/arch/arm/boot/compressed/piggy.lzo.S index 54c951800ebd..a425ad95959a 100644 --- a/arch/arm/boot/compressed/piggy.S +++ b/arch/arm/boot/compressed/piggy.lzo.S | |||
@@ -1,6 +1,6 @@ | |||
1 | .section .piggydata,#alloc | 1 | .section .piggydata,#alloc |
2 | .globl input_data | 2 | .globl input_data |
3 | input_data: | 3 | input_data: |
4 | .incbin "arch/arm/boot/compressed/piggy.gz" | 4 | .incbin "arch/arm/boot/compressed/piggy.lzo" |
5 | .globl input_data_end | 5 | .globl input_data_end |
6 | input_data_end: | 6 | input_data_end: |
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig index 610ac3c47b0f..9155196e623b 100644 --- a/arch/arm/configs/u300_defconfig +++ b/arch/arm/configs/u300_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.32-rc5 | 3 | # Linux kernel version: 2.6.33-rc2 |
4 | # Sat Oct 17 23:32:24 2009 | 4 | # Wed Jan 6 00:01:36 2010 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
@@ -46,6 +46,7 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
46 | # | 46 | # |
47 | CONFIG_TREE_RCU=y | 47 | CONFIG_TREE_RCU=y |
48 | # CONFIG_TREE_PREEMPT_RCU is not set | 48 | # CONFIG_TREE_PREEMPT_RCU is not set |
49 | # CONFIG_TINY_RCU is not set | ||
49 | # CONFIG_RCU_TRACE is not set | 50 | # CONFIG_RCU_TRACE is not set |
50 | CONFIG_RCU_FANOUT=32 | 51 | CONFIG_RCU_FANOUT=32 |
51 | # CONFIG_RCU_FANOUT_EXACT is not set | 52 | # CONFIG_RCU_FANOUT_EXACT is not set |
@@ -119,14 +120,41 @@ CONFIG_BLOCK=y | |||
119 | # IO Schedulers | 120 | # IO Schedulers |
120 | # | 121 | # |
121 | CONFIG_IOSCHED_NOOP=y | 122 | CONFIG_IOSCHED_NOOP=y |
122 | # CONFIG_IOSCHED_AS is not set | ||
123 | CONFIG_IOSCHED_DEADLINE=y | 123 | CONFIG_IOSCHED_DEADLINE=y |
124 | # CONFIG_IOSCHED_CFQ is not set | 124 | # CONFIG_IOSCHED_CFQ is not set |
125 | # CONFIG_DEFAULT_AS is not set | ||
126 | CONFIG_DEFAULT_DEADLINE=y | 125 | CONFIG_DEFAULT_DEADLINE=y |
127 | # CONFIG_DEFAULT_CFQ is not set | 126 | # CONFIG_DEFAULT_CFQ is not set |
128 | # CONFIG_DEFAULT_NOOP is not set | 127 | # CONFIG_DEFAULT_NOOP is not set |
129 | CONFIG_DEFAULT_IOSCHED="deadline" | 128 | CONFIG_DEFAULT_IOSCHED="deadline" |
129 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
130 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
131 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
132 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
133 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
134 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
135 | # CONFIG_INLINE_SPIN_UNLOCK is not set | ||
136 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
137 | # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
138 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
139 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
140 | # CONFIG_INLINE_READ_LOCK is not set | ||
141 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
142 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
143 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
144 | # CONFIG_INLINE_READ_UNLOCK is not set | ||
145 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
146 | # CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
147 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
148 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
149 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
150 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
151 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
152 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
153 | # CONFIG_INLINE_WRITE_UNLOCK is not set | ||
154 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
155 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
156 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
157 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
130 | # CONFIG_FREEZER is not set | 158 | # CONFIG_FREEZER is not set |
131 | 159 | ||
132 | # | 160 | # |
@@ -155,6 +183,7 @@ CONFIG_MMU=y | |||
155 | # CONFIG_ARCH_IXP2000 is not set | 183 | # CONFIG_ARCH_IXP2000 is not set |
156 | # CONFIG_ARCH_IXP4XX is not set | 184 | # CONFIG_ARCH_IXP4XX is not set |
157 | # CONFIG_ARCH_L7200 is not set | 185 | # CONFIG_ARCH_L7200 is not set |
186 | # CONFIG_ARCH_DOVE is not set | ||
158 | # CONFIG_ARCH_KIRKWOOD is not set | 187 | # CONFIG_ARCH_KIRKWOOD is not set |
159 | # CONFIG_ARCH_LOKI is not set | 188 | # CONFIG_ARCH_LOKI is not set |
160 | # CONFIG_ARCH_MV78XX0 is not set | 189 | # CONFIG_ARCH_MV78XX0 is not set |
@@ -177,6 +206,7 @@ CONFIG_ARCH_U300=y | |||
177 | # CONFIG_ARCH_DAVINCI is not set | 206 | # CONFIG_ARCH_DAVINCI is not set |
178 | # CONFIG_ARCH_OMAP is not set | 207 | # CONFIG_ARCH_OMAP is not set |
179 | # CONFIG_ARCH_BCMRING is not set | 208 | # CONFIG_ARCH_BCMRING is not set |
209 | # CONFIG_ARCH_U8500 is not set | ||
180 | 210 | ||
181 | # | 211 | # |
182 | # ST-Ericsson AB U300/U330/U335/U365 Platform | 212 | # ST-Ericsson AB U300/U330/U335/U365 Platform |
@@ -265,12 +295,10 @@ CONFIG_FLATMEM_MANUAL=y | |||
265 | CONFIG_FLATMEM=y | 295 | CONFIG_FLATMEM=y |
266 | CONFIG_FLAT_NODE_MEM_MAP=y | 296 | CONFIG_FLAT_NODE_MEM_MAP=y |
267 | CONFIG_PAGEFLAGS_EXTENDED=y | 297 | CONFIG_PAGEFLAGS_EXTENDED=y |
268 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 298 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
269 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 299 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
270 | CONFIG_ZONE_DMA_FLAG=0 | 300 | CONFIG_ZONE_DMA_FLAG=0 |
271 | CONFIG_VIRT_TO_BUS=y | 301 | CONFIG_VIRT_TO_BUS=y |
272 | CONFIG_HAVE_MLOCK=y | ||
273 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
274 | # CONFIG_KSM is not set | 302 | # CONFIG_KSM is not set |
275 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 303 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
276 | CONFIG_ALIGNMENT_TRAP=y | 304 | CONFIG_ALIGNMENT_TRAP=y |
@@ -499,14 +527,21 @@ CONFIG_MTD_NAND_IDS=y | |||
499 | CONFIG_BLK_DEV=y | 527 | CONFIG_BLK_DEV=y |
500 | # CONFIG_BLK_DEV_COW_COMMON is not set | 528 | # CONFIG_BLK_DEV_COW_COMMON is not set |
501 | # CONFIG_BLK_DEV_LOOP is not set | 529 | # CONFIG_BLK_DEV_LOOP is not set |
530 | |||
531 | # | ||
532 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
533 | # | ||
502 | # CONFIG_BLK_DEV_NBD is not set | 534 | # CONFIG_BLK_DEV_NBD is not set |
503 | # CONFIG_BLK_DEV_RAM is not set | 535 | # CONFIG_BLK_DEV_RAM is not set |
504 | # CONFIG_CDROM_PKTCDVD is not set | 536 | # CONFIG_CDROM_PKTCDVD is not set |
505 | # CONFIG_ATA_OVER_ETH is not set | 537 | # CONFIG_ATA_OVER_ETH is not set |
506 | CONFIG_MISC_DEVICES=y | 538 | CONFIG_MISC_DEVICES=y |
539 | # CONFIG_AD525X_DPOT is not set | ||
507 | # CONFIG_ICS932S401 is not set | 540 | # CONFIG_ICS932S401 is not set |
508 | # CONFIG_ENCLOSURE_SERVICES is not set | 541 | # CONFIG_ENCLOSURE_SERVICES is not set |
509 | # CONFIG_ISL29003 is not set | 542 | # CONFIG_ISL29003 is not set |
543 | # CONFIG_DS1682 is not set | ||
544 | # CONFIG_TI_DAC7512 is not set | ||
510 | # CONFIG_C2PORT is not set | 545 | # CONFIG_C2PORT is not set |
511 | 546 | ||
512 | # | 547 | # |
@@ -517,6 +552,7 @@ CONFIG_MISC_DEVICES=y | |||
517 | # CONFIG_EEPROM_LEGACY is not set | 552 | # CONFIG_EEPROM_LEGACY is not set |
518 | # CONFIG_EEPROM_MAX6875 is not set | 553 | # CONFIG_EEPROM_MAX6875 is not set |
519 | # CONFIG_EEPROM_93CX6 is not set | 554 | # CONFIG_EEPROM_93CX6 is not set |
555 | # CONFIG_IWMC3200TOP is not set | ||
520 | CONFIG_HAVE_IDE=y | 556 | CONFIG_HAVE_IDE=y |
521 | # CONFIG_IDE is not set | 557 | # CONFIG_IDE is not set |
522 | 558 | ||
@@ -539,6 +575,7 @@ CONFIG_HAVE_IDE=y | |||
539 | CONFIG_INPUT=y | 575 | CONFIG_INPUT=y |
540 | # CONFIG_INPUT_FF_MEMLESS is not set | 576 | # CONFIG_INPUT_FF_MEMLESS is not set |
541 | # CONFIG_INPUT_POLLDEV is not set | 577 | # CONFIG_INPUT_POLLDEV is not set |
578 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
542 | 579 | ||
543 | # | 580 | # |
544 | # Userland interfaces | 581 | # Userland interfaces |
@@ -645,7 +682,6 @@ CONFIG_I2C_STU300=y | |||
645 | # | 682 | # |
646 | # Miscellaneous I2C Chip support | 683 | # Miscellaneous I2C Chip support |
647 | # | 684 | # |
648 | # CONFIG_DS1682 is not set | ||
649 | # CONFIG_SENSORS_TSL2550 is not set | 685 | # CONFIG_SENSORS_TSL2550 is not set |
650 | # CONFIG_I2C_DEBUG_CORE is not set | 686 | # CONFIG_I2C_DEBUG_CORE is not set |
651 | # CONFIG_I2C_DEBUG_ALGO is not set | 687 | # CONFIG_I2C_DEBUG_ALGO is not set |
@@ -661,6 +697,8 @@ CONFIG_SPI_MASTER=y | |||
661 | # CONFIG_SPI_BITBANG is not set | 697 | # CONFIG_SPI_BITBANG is not set |
662 | # CONFIG_SPI_GPIO is not set | 698 | # CONFIG_SPI_GPIO is not set |
663 | CONFIG_SPI_PL022=y | 699 | CONFIG_SPI_PL022=y |
700 | # CONFIG_SPI_XILINX is not set | ||
701 | # CONFIG_SPI_DESIGNWARE is not set | ||
664 | 702 | ||
665 | # | 703 | # |
666 | # SPI Protocol Masters | 704 | # SPI Protocol Masters |
@@ -708,6 +746,7 @@ CONFIG_SSB_POSSIBLE=y | |||
708 | # CONFIG_MFD_T7L66XB is not set | 746 | # CONFIG_MFD_T7L66XB is not set |
709 | # CONFIG_MFD_TC6387XB is not set | 747 | # CONFIG_MFD_TC6387XB is not set |
710 | # CONFIG_PMIC_DA903X is not set | 748 | # CONFIG_PMIC_DA903X is not set |
749 | # CONFIG_PMIC_ADP5520 is not set | ||
711 | # CONFIG_MFD_WM8400 is not set | 750 | # CONFIG_MFD_WM8400 is not set |
712 | # CONFIG_MFD_WM831X is not set | 751 | # CONFIG_MFD_WM831X is not set |
713 | # CONFIG_MFD_WM8350_I2C is not set | 752 | # CONFIG_MFD_WM8350_I2C is not set |
@@ -716,6 +755,8 @@ CONFIG_SSB_POSSIBLE=y | |||
716 | CONFIG_AB3100_CORE=y | 755 | CONFIG_AB3100_CORE=y |
717 | CONFIG_AB3100_OTP=y | 756 | CONFIG_AB3100_OTP=y |
718 | # CONFIG_EZX_PCAP is not set | 757 | # CONFIG_EZX_PCAP is not set |
758 | # CONFIG_MFD_88PM8607 is not set | ||
759 | # CONFIG_AB4500_CORE is not set | ||
719 | CONFIG_REGULATOR=y | 760 | CONFIG_REGULATOR=y |
720 | # CONFIG_REGULATOR_DEBUG is not set | 761 | # CONFIG_REGULATOR_DEBUG is not set |
721 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | 762 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
@@ -723,6 +764,7 @@ CONFIG_REGULATOR=y | |||
723 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | 764 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set |
724 | # CONFIG_REGULATOR_BQ24022 is not set | 765 | # CONFIG_REGULATOR_BQ24022 is not set |
725 | # CONFIG_REGULATOR_MAX1586 is not set | 766 | # CONFIG_REGULATOR_MAX1586 is not set |
767 | # CONFIG_REGULATOR_MAX8660 is not set | ||
726 | # CONFIG_REGULATOR_LP3971 is not set | 768 | # CONFIG_REGULATOR_LP3971 is not set |
727 | CONFIG_REGULATOR_AB3100=y | 769 | CONFIG_REGULATOR_AB3100=y |
728 | # CONFIG_REGULATOR_TPS65023 is not set | 770 | # CONFIG_REGULATOR_TPS65023 is not set |
@@ -840,7 +882,9 @@ CONFIG_LEDS_CLASS=y | |||
840 | # CONFIG_LEDS_LP3944 is not set | 882 | # CONFIG_LEDS_LP3944 is not set |
841 | # CONFIG_LEDS_PCA955X is not set | 883 | # CONFIG_LEDS_PCA955X is not set |
842 | # CONFIG_LEDS_DAC124S085 is not set | 884 | # CONFIG_LEDS_DAC124S085 is not set |
885 | # CONFIG_LEDS_REGULATOR is not set | ||
843 | # CONFIG_LEDS_BD2802 is not set | 886 | # CONFIG_LEDS_BD2802 is not set |
887 | # CONFIG_LEDS_LT3593 is not set | ||
844 | 888 | ||
845 | # | 889 | # |
846 | # LED Triggers | 890 | # LED Triggers |
@@ -882,6 +926,7 @@ CONFIG_RTC_INTF_DEV=y | |||
882 | # CONFIG_RTC_DRV_PCF8563 is not set | 926 | # CONFIG_RTC_DRV_PCF8563 is not set |
883 | # CONFIG_RTC_DRV_PCF8583 is not set | 927 | # CONFIG_RTC_DRV_PCF8583 is not set |
884 | # CONFIG_RTC_DRV_M41T80 is not set | 928 | # CONFIG_RTC_DRV_M41T80 is not set |
929 | # CONFIG_RTC_DRV_BQ32K is not set | ||
885 | # CONFIG_RTC_DRV_S35390A is not set | 930 | # CONFIG_RTC_DRV_S35390A is not set |
886 | # CONFIG_RTC_DRV_FM3130 is not set | 931 | # CONFIG_RTC_DRV_FM3130 is not set |
887 | # CONFIG_RTC_DRV_RX8581 is not set | 932 | # CONFIG_RTC_DRV_RX8581 is not set |
@@ -911,7 +956,9 @@ CONFIG_RTC_INTF_DEV=y | |||
911 | # CONFIG_RTC_DRV_M48T86 is not set | 956 | # CONFIG_RTC_DRV_M48T86 is not set |
912 | # CONFIG_RTC_DRV_M48T35 is not set | 957 | # CONFIG_RTC_DRV_M48T35 is not set |
913 | # CONFIG_RTC_DRV_M48T59 is not set | 958 | # CONFIG_RTC_DRV_M48T59 is not set |
959 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
914 | # CONFIG_RTC_DRV_BQ4802 is not set | 960 | # CONFIG_RTC_DRV_BQ4802 is not set |
961 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
915 | # CONFIG_RTC_DRV_V3020 is not set | 962 | # CONFIG_RTC_DRV_V3020 is not set |
916 | CONFIG_RTC_DRV_AB3100=y | 963 | CONFIG_RTC_DRV_AB3100=y |
917 | 964 | ||
@@ -926,6 +973,15 @@ CONFIG_DMADEVICES=y | |||
926 | # | 973 | # |
927 | # DMA Devices | 974 | # DMA Devices |
928 | # | 975 | # |
976 | CONFIG_COH901318=y | ||
977 | CONFIG_DMA_ENGINE=y | ||
978 | |||
979 | # | ||
980 | # DMA Clients | ||
981 | # | ||
982 | # CONFIG_NET_DMA is not set | ||
983 | # CONFIG_ASYNC_TX_DMA is not set | ||
984 | # CONFIG_DMATEST is not set | ||
929 | # CONFIG_AUXDISPLAY is not set | 985 | # CONFIG_AUXDISPLAY is not set |
930 | # CONFIG_UIO is not set | 986 | # CONFIG_UIO is not set |
931 | 987 | ||
@@ -1018,7 +1074,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
1018 | CONFIG_MSDOS_PARTITION=y | 1074 | CONFIG_MSDOS_PARTITION=y |
1019 | CONFIG_NLS=y | 1075 | CONFIG_NLS=y |
1020 | CONFIG_NLS_DEFAULT="iso8859-1" | 1076 | CONFIG_NLS_DEFAULT="iso8859-1" |
1021 | # CONFIG_NLS_CODEPAGE_437 is not set | 1077 | CONFIG_NLS_CODEPAGE_437=y |
1022 | # CONFIG_NLS_CODEPAGE_737 is not set | 1078 | # CONFIG_NLS_CODEPAGE_737 is not set |
1023 | # CONFIG_NLS_CODEPAGE_775 is not set | 1079 | # CONFIG_NLS_CODEPAGE_775 is not set |
1024 | # CONFIG_NLS_CODEPAGE_850 is not set | 1080 | # CONFIG_NLS_CODEPAGE_850 is not set |
@@ -1135,6 +1191,7 @@ CONFIG_ARM_UNWIND=y | |||
1135 | # CONFIG_DEBUG_ERRORS is not set | 1191 | # CONFIG_DEBUG_ERRORS is not set |
1136 | # CONFIG_DEBUG_STACK_USAGE is not set | 1192 | # CONFIG_DEBUG_STACK_USAGE is not set |
1137 | # CONFIG_DEBUG_LL is not set | 1193 | # CONFIG_DEBUG_LL is not set |
1194 | # CONFIG_OC_ETM is not set | ||
1138 | 1195 | ||
1139 | # | 1196 | # |
1140 | # Security options | 1197 | # Security options |
@@ -1142,7 +1199,11 @@ CONFIG_ARM_UNWIND=y | |||
1142 | # CONFIG_KEYS is not set | 1199 | # CONFIG_KEYS is not set |
1143 | # CONFIG_SECURITY is not set | 1200 | # CONFIG_SECURITY is not set |
1144 | # CONFIG_SECURITYFS is not set | 1201 | # CONFIG_SECURITYFS is not set |
1145 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1202 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
1203 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
1204 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
1205 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
1206 | CONFIG_DEFAULT_SECURITY="" | ||
1146 | # CONFIG_CRYPTO is not set | 1207 | # CONFIG_CRYPTO is not set |
1147 | # CONFIG_BINARY_PRINTF is not set | 1208 | # CONFIG_BINARY_PRINTF is not set |
1148 | 1209 | ||
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 730aefcfbee3..c77d2fa1f6e5 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -154,16 +154,16 @@ | |||
154 | * Please note that the implementation of these, and the required | 154 | * Please note that the implementation of these, and the required |
155 | * effects are cache-type (VIVT/VIPT/PIPT) specific. | 155 | * effects are cache-type (VIVT/VIPT/PIPT) specific. |
156 | * | 156 | * |
157 | * flush_cache_kern_all() | 157 | * flush_kern_all() |
158 | * | 158 | * |
159 | * Unconditionally clean and invalidate the entire cache. | 159 | * Unconditionally clean and invalidate the entire cache. |
160 | * | 160 | * |
161 | * flush_cache_user_mm(mm) | 161 | * flush_user_all() |
162 | * | 162 | * |
163 | * Clean and invalidate all user space cache entries | 163 | * Clean and invalidate all user space cache entries |
164 | * before a change of page tables. | 164 | * before a change of page tables. |
165 | * | 165 | * |
166 | * flush_cache_user_range(start, end, flags) | 166 | * flush_user_range(start, end, flags) |
167 | * | 167 | * |
168 | * Clean and invalidate a range of cache entries in the | 168 | * Clean and invalidate a range of cache entries in the |
169 | * specified address space before a change of page tables. | 169 | * specified address space before a change of page tables. |
@@ -179,6 +179,20 @@ | |||
179 | * - start - virtual start address | 179 | * - start - virtual start address |
180 | * - end - virtual end address | 180 | * - end - virtual end address |
181 | * | 181 | * |
182 | * coherent_user_range(start, end) | ||
183 | * | ||
184 | * Ensure coherency between the Icache and the Dcache in the | ||
185 | * region described by start, end. If you have non-snooping | ||
186 | * Harvard caches, you need to implement this function. | ||
187 | * - start - virtual start address | ||
188 | * - end - virtual end address | ||
189 | * | ||
190 | * flush_kern_dcache_area(kaddr, size) | ||
191 | * | ||
192 | * Ensure that the data held in page is written back. | ||
193 | * - kaddr - page address | ||
194 | * - size - region size | ||
195 | * | ||
182 | * DMA Cache Coherency | 196 | * DMA Cache Coherency |
183 | * =================== | 197 | * =================== |
184 | * | 198 | * |
diff --git a/arch/arm/include/asm/cpu.h b/arch/arm/include/asm/cpu.h index 634b2d7c612a..793968173bef 100644 --- a/arch/arm/include/asm/cpu.h +++ b/arch/arm/include/asm/cpu.h | |||
@@ -11,6 +11,7 @@ | |||
11 | #define __ASM_ARM_CPU_H | 11 | #define __ASM_ARM_CPU_H |
12 | 12 | ||
13 | #include <linux/percpu.h> | 13 | #include <linux/percpu.h> |
14 | #include <linux/cpu.h> | ||
14 | 15 | ||
15 | struct cpuinfo_arm { | 16 | struct cpuinfo_arm { |
16 | struct cpu cpu; | 17 | struct cpu cpu; |
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index 7edf3536df24..ca51143f97f1 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h | |||
@@ -138,12 +138,12 @@ extern int get_dma_residue(unsigned int chan); | |||
138 | #define NO_DMA 255 | 138 | #define NO_DMA 255 |
139 | #endif | 139 | #endif |
140 | 140 | ||
141 | #endif /* CONFIG_ISA_DMA_API */ | ||
142 | |||
141 | #ifdef CONFIG_PCI | 143 | #ifdef CONFIG_PCI |
142 | extern int isa_dma_bridge_buggy; | 144 | extern int isa_dma_bridge_buggy; |
143 | #else | 145 | #else |
144 | #define isa_dma_bridge_buggy (0) | 146 | #define isa_dma_bridge_buggy (0) |
145 | #endif | 147 | #endif |
146 | 148 | ||
147 | #endif /* CONFIG_ISA_DMA_API */ | ||
148 | |||
149 | #endif /* __ASM_ARM_DMA_H */ | 149 | #endif /* __ASM_ARM_DMA_H */ |
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index bbecccda76d0..eec6e897ceb2 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h | |||
@@ -97,9 +97,15 @@ | |||
97 | * stack during a system call. Note that sizeof(struct pt_regs) | 97 | * stack during a system call. Note that sizeof(struct pt_regs) |
98 | * has to be a multiple of 8. | 98 | * has to be a multiple of 8. |
99 | */ | 99 | */ |
100 | #ifndef __KERNEL__ | ||
100 | struct pt_regs { | 101 | struct pt_regs { |
101 | long uregs[18]; | 102 | long uregs[18]; |
102 | }; | 103 | }; |
104 | #else /* __KERNEL__ */ | ||
105 | struct pt_regs { | ||
106 | unsigned long uregs[18]; | ||
107 | }; | ||
108 | #endif /* __KERNEL__ */ | ||
103 | 109 | ||
104 | #define ARM_cpsr uregs[16] | 110 | #define ARM_cpsr uregs[16] |
105 | #define ARM_pc uregs[15] | 111 | #define ARM_pc uregs[15] |
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 4e506d09e5f9..cf9cdaa2d4d4 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h | |||
@@ -391,6 +391,7 @@ | |||
391 | #define __NR_pwritev (__NR_SYSCALL_BASE+362) | 391 | #define __NR_pwritev (__NR_SYSCALL_BASE+362) |
392 | #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) | 392 | #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) |
393 | #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) | 393 | #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) |
394 | #define __NR_recvmmsg (__NR_SYSCALL_BASE+365) | ||
394 | 395 | ||
395 | /* | 396 | /* |
396 | * The following SWIs are ARM private. | 397 | * The following SWIs are ARM private. |
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index b121b6053cce..5c91addcaebc 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S | |||
@@ -49,6 +49,26 @@ | |||
49 | 1002: | 49 | 1002: |
50 | .endm | 50 | .endm |
51 | 51 | ||
52 | #elif defined(CONFIG_CPU_V7) | ||
53 | |||
54 | .macro addruart, rx | ||
55 | .endm | ||
56 | |||
57 | .macro senduart, rd, rx | ||
58 | mcr p14, 0, \rd, c0, c5, 0 | ||
59 | .endm | ||
60 | |||
61 | .macro busyuart, rd, rx | ||
62 | busy: mrc p14, 0, pc, c0, c1, 0 | ||
63 | bcs busy | ||
64 | .endm | ||
65 | |||
66 | .macro waituart, rd, rx | ||
67 | wait: mrc p14, 0, pc, c0, c1, 0 | ||
68 | bcs wait | ||
69 | |||
70 | .endm | ||
71 | |||
52 | #elif defined(CONFIG_CPU_XSCALE) | 72 | #elif defined(CONFIG_CPU_XSCALE) |
53 | 73 | ||
54 | .macro addruart, rx | 74 | .macro addruart, rx |
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c index 950391f194c4..d4a0da1e48f4 100644 --- a/arch/arm/kernel/elf.c +++ b/arch/arm/kernel/elf.c | |||
@@ -78,15 +78,6 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) | |||
78 | return 1; | 78 | return 1; |
79 | if (cpu_architecture() < CPU_ARCH_ARMv6) | 79 | if (cpu_architecture() < CPU_ARCH_ARMv6) |
80 | return 1; | 80 | return 1; |
81 | #if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) | ||
82 | /* | ||
83 | * If we have support for OABI programs, we can never allow NX | ||
84 | * support - our signal syscall restart mechanism relies upon | ||
85 | * being able to execute code placed on the user stack. | ||
86 | */ | ||
87 | return 1; | ||
88 | #else | ||
89 | return 0; | 81 | return 0; |
90 | #endif | ||
91 | } | 82 | } |
92 | EXPORT_SYMBOL(arm_elf_read_implies_exec); | 83 | EXPORT_SYMBOL(arm_elf_read_implies_exec); |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index d2903e3bc861..6c5cf369183b 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -957,9 +957,7 @@ kuser_cmpxchg_fixup: | |||
957 | 957 | ||
958 | #else | 958 | #else |
959 | 959 | ||
960 | #ifdef CONFIG_SMP | 960 | smp_dmb |
961 | mcr p15, 0, r0, c7, c10, 5 @ dmb | ||
962 | #endif | ||
963 | 1: ldrex r3, [r2] | 961 | 1: ldrex r3, [r2] |
964 | subs r3, r3, r0 | 962 | subs r3, r3, r0 |
965 | strexeq r3, r1, [r2] | 963 | strexeq r3, r1, [r2] |
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 67304138a2ca..ba2adefa53f7 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -212,7 +212,8 @@ void __show_regs(struct pt_regs *regs) | |||
212 | char buf[64]; | 212 | char buf[64]; |
213 | 213 | ||
214 | printk("CPU: %d %s (%s %.*s)\n", | 214 | printk("CPU: %d %s (%s %.*s)\n", |
215 | smp_processor_id(), print_tainted(), init_utsname()->release, | 215 | raw_smp_processor_id(), print_tainted(), |
216 | init_utsname()->release, | ||
216 | (int)strcspn(init_utsname()->version, " "), | 217 | (int)strcspn(init_utsname()->version, " "), |
217 | init_utsname()->version); | 218 | init_utsname()->version); |
218 | print_symbol("PC is at %s\n", instruction_pointer(regs)); | 219 | print_symbol("PC is at %s\n", instruction_pointer(regs)); |
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index a9b650dcc172..077ecf4fecda 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -236,6 +236,7 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { | |||
236 | 236 | ||
237 | static struct vpfe_config vpfe_cfg = { | 237 | static struct vpfe_config vpfe_cfg = { |
238 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | 238 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), |
239 | .i2c_adapter_id = 1, | ||
239 | .sub_devs = vpfe_sub_devs, | 240 | .sub_devs = vpfe_sub_devs, |
240 | .card_name = "DM355 EVM", | 241 | .card_name = "DM355 EVM", |
241 | .ccdc = "DM355 CCDC", | 242 | .ccdc = "DM355 CCDC", |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 289fe1b7d25a..b476395d2cd4 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -192,7 +192,11 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
192 | .bus_delay = 0 /* usec */, | 192 | .bus_delay = 0 /* usec */, |
193 | }; | 193 | }; |
194 | 194 | ||
195 | #ifdef CONFIG_KEYBOARD_DAVINCI | 195 | static int dm365evm_keyscan_enable(struct device *dev) |
196 | { | ||
197 | return davinci_cfg_reg(DM365_KEYSCAN); | ||
198 | } | ||
199 | |||
196 | static unsigned short dm365evm_keymap[] = { | 200 | static unsigned short dm365evm_keymap[] = { |
197 | KEY_KP2, | 201 | KEY_KP2, |
198 | KEY_LEFT, | 202 | KEY_LEFT, |
@@ -214,6 +218,7 @@ static unsigned short dm365evm_keymap[] = { | |||
214 | }; | 218 | }; |
215 | 219 | ||
216 | static struct davinci_ks_platform_data dm365evm_ks_data = { | 220 | static struct davinci_ks_platform_data dm365evm_ks_data = { |
221 | .device_enable = dm365evm_keyscan_enable, | ||
217 | .keymap = dm365evm_keymap, | 222 | .keymap = dm365evm_keymap, |
218 | .keymapsize = ARRAY_SIZE(dm365evm_keymap), | 223 | .keymapsize = ARRAY_SIZE(dm365evm_keymap), |
219 | .rep = 1, | 224 | .rep = 1, |
@@ -222,7 +227,6 @@ static struct davinci_ks_platform_data dm365evm_ks_data = { | |||
222 | .interval = 0x2, | 227 | .interval = 0x2, |
223 | .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, | 228 | .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, |
224 | }; | 229 | }; |
225 | #endif | ||
226 | 230 | ||
227 | static int cpld_mmc_get_cd(int module) | 231 | static int cpld_mmc_get_cd(int module) |
228 | { | 232 | { |
@@ -511,10 +515,7 @@ static __init void dm365_evm_init(void) | |||
511 | 515 | ||
512 | dm365_init_asp(&dm365_evm_snd_data); | 516 | dm365_init_asp(&dm365_evm_snd_data); |
513 | dm365_init_rtc(); | 517 | dm365_init_rtc(); |
514 | |||
515 | #ifdef CONFIG_KEYBOARD_DAVINCI | ||
516 | dm365_init_ks(&dm365evm_ks_data); | 518 | dm365_init_ks(&dm365evm_ks_data); |
517 | #endif | ||
518 | } | 519 | } |
519 | 520 | ||
520 | static __init void dm365_evm_irq_init(void) | 521 | static __init void dm365_evm_irq_init(void) |
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index fd0398bc6db3..e9612cf727b7 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -247,6 +247,7 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { | |||
247 | 247 | ||
248 | static struct vpfe_config vpfe_cfg = { | 248 | static struct vpfe_config vpfe_cfg = { |
249 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | 249 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), |
250 | .i2c_adapter_id = 1, | ||
250 | .sub_devs = vpfe_sub_devs, | 251 | .sub_devs = vpfe_sub_devs, |
251 | .card_name = "DM6446 EVM", | 252 | .card_name = "DM6446 EVM", |
252 | .ccdc = "DM6446 CCDC", | 253 | .ccdc = "DM6446 CCDC", |
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index 52b287cf3a42..37311d1830eb 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c | |||
@@ -81,12 +81,23 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) | |||
81 | return 0; | 81 | return 0; |
82 | } | 82 | } |
83 | 83 | ||
84 | /* | ||
85 | * Faking this allows us to to work with suspend functions of | ||
86 | * generic drivers which call {enable|disable}_irq_wake for | ||
87 | * wake up interrupt sources (eg RTC on DA850). | ||
88 | */ | ||
89 | static int cp_intc_set_wake(unsigned int irq, unsigned int on) | ||
90 | { | ||
91 | return 0; | ||
92 | } | ||
93 | |||
84 | static struct irq_chip cp_intc_irq_chip = { | 94 | static struct irq_chip cp_intc_irq_chip = { |
85 | .name = "cp_intc", | 95 | .name = "cp_intc", |
86 | .ack = cp_intc_ack_irq, | 96 | .ack = cp_intc_ack_irq, |
87 | .mask = cp_intc_mask_irq, | 97 | .mask = cp_intc_mask_irq, |
88 | .unmask = cp_intc_unmask_irq, | 98 | .unmask = cp_intc_unmask_irq, |
89 | .set_type = cp_intc_set_irq_type, | 99 | .set_type = cp_intc_set_irq_type, |
100 | .set_wake = cp_intc_set_wake, | ||
90 | }; | 101 | }; |
91 | 102 | ||
92 | void __init cp_intc_init(void __iomem *base, unsigned short num_irq, | 103 | void __init cp_intc_init(void __iomem *base, unsigned short num_irq, |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index dd2d32c4ce86..a5105f03fd86 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -481,11 +481,18 @@ static struct platform_device da8xx_rtc_device = { | |||
481 | 481 | ||
482 | int da8xx_register_rtc(void) | 482 | int da8xx_register_rtc(void) |
483 | { | 483 | { |
484 | int ret; | ||
485 | |||
484 | /* Unlock the rtc's registers */ | 486 | /* Unlock the rtc's registers */ |
485 | __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); | 487 | __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); |
486 | __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); | 488 | __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); |
487 | 489 | ||
488 | return platform_device_register(&da8xx_rtc_device); | 490 | ret = platform_device_register(&da8xx_rtc_device); |
491 | if (!ret) | ||
492 | /* Atleast on DA850, RTC is a wakeup source */ | ||
493 | device_init_wakeup(&da8xx_rtc_device.dev, true); | ||
494 | |||
495 | return ret; | ||
489 | } | 496 | } |
490 | 497 | ||
491 | static struct resource da8xx_cpuidle_resources[] = { | 498 | static struct resource da8xx_cpuidle_resources[] = { |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 2ec619ec1657..f53735cb922e 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -993,7 +993,6 @@ void __init dm365_init_asp(struct snd_platform_data *pdata) | |||
993 | 993 | ||
994 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) | 994 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) |
995 | { | 995 | { |
996 | davinci_cfg_reg(DM365_KEYSCAN); | ||
997 | dm365_ks_device.dev.platform_data = pdata; | 996 | dm365_ks_device.dev.platform_data = pdata; |
998 | platform_device_register(&dm365_ks_device); | 997 | platform_device_register(&dm365_ks_device); |
999 | } | 998 | } |
diff --git a/arch/arm/mach-davinci/include/mach/keyscan.h b/arch/arm/mach-davinci/include/mach/keyscan.h index b4e21a2976d1..7a560e05bda8 100644 --- a/arch/arm/mach-davinci/include/mach/keyscan.h +++ b/arch/arm/mach-davinci/include/mach/keyscan.h | |||
@@ -29,6 +29,7 @@ enum davinci_matrix_types { | |||
29 | }; | 29 | }; |
30 | 30 | ||
31 | struct davinci_ks_platform_data { | 31 | struct davinci_ks_platform_data { |
32 | int (*device_enable)(struct device *dev); | ||
32 | unsigned short *keymap; | 33 | unsigned short *keymap; |
33 | u32 keymapsize; | 34 | u32 keymapsize; |
34 | u8 rep:1; | 35 | u8 rep:1; |
diff --git a/arch/arm/mach-gemini/include/mach/uncompress.h b/arch/arm/mach-gemini/include/mach/uncompress.h index 59c5df7e716c..5483f61a8061 100644 --- a/arch/arm/mach-gemini/include/mach/uncompress.h +++ b/arch/arm/mach-gemini/include/mach/uncompress.h | |||
@@ -30,7 +30,9 @@ static inline void putc(char c) | |||
30 | UART[UART_TX] = c; | 30 | UART[UART_TX] = c; |
31 | } | 31 | } |
32 | 32 | ||
33 | #define flush() do { } while (0) | 33 | static inline void flush(void) |
34 | { | ||
35 | } | ||
34 | 36 | ||
35 | /* | 37 | /* |
36 | * nothing to do | 38 | * nothing to do |
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index 8bf4153d0840..3bf6304158f6 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/ata_platform.h> | 14 | #include <linux/ata_platform.h> |
15 | #include <linux/mv643xx_eth.h> | 15 | #include <linux/mv643xx_eth.h> |
16 | #include <linux/gpio.h> | ||
16 | #include <linux/spi/flash.h> | 17 | #include <linux/spi/flash.h> |
17 | #include <linux/spi/spi.h> | 18 | #include <linux/spi/spi.h> |
18 | #include <linux/spi/orion_spi.h> | 19 | #include <linux/spi/orion_spi.h> |
@@ -53,6 +54,11 @@ static void __init rd88f6192_init(void) | |||
53 | */ | 54 | */ |
54 | kirkwood_init(); | 55 | kirkwood_init(); |
55 | 56 | ||
57 | orion_gpio_set_valid(RD88F6192_GPIO_USB_VBUS, 1); | ||
58 | if (gpio_request(RD88F6192_GPIO_USB_VBUS, "USB VBUS") != 0 || | ||
59 | gpio_direction_output(RD88F6192_GPIO_USB_VBUS, 1) != 0) | ||
60 | pr_err("RD-88F6192-NAS: failed to setup USB VBUS GPIO\n"); | ||
61 | |||
56 | kirkwood_ehci_init(); | 62 | kirkwood_ehci_init(); |
57 | kirkwood_ge00_init(&rd88f6192_ge00_data); | 63 | kirkwood_ge00_init(&rd88f6192_ge00_data); |
58 | kirkwood_sata_init(&rd88f6192_sata_data); | 64 | kirkwood_sata_init(&rd88f6192_sata_data); |
diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c index fcaf876f19b6..0651f96653f9 100644 --- a/arch/arm/mach-lh7a40x/clocks.c +++ b/arch/arm/mach-lh7a40x/clocks.c | |||
@@ -10,6 +10,8 @@ | |||
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | #include <mach/clocks.h> | 11 | #include <mach/clocks.h> |
12 | #include <linux/err.h> | 12 | #include <linux/err.h> |
13 | #include <linux/device.h> | ||
14 | #include <linux/string.h> | ||
13 | 15 | ||
14 | struct module; | 16 | struct module; |
15 | 17 | ||
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index 8f49b2b12608..b22dec4abf78 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
@@ -24,8 +24,6 @@ | |||
24 | 24 | ||
25 | #include "common.h" | 25 | #include "common.h" |
26 | 26 | ||
27 | #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) | ||
28 | |||
29 | static unsigned long ttc_dkb_pin_config[] __initdata = { | 27 | static unsigned long ttc_dkb_pin_config[] __initdata = { |
30 | /* UART2 */ | 28 | /* UART2 */ |
31 | GPIO47_UART2_RXD, | 29 | GPIO47_UART2_RXD, |
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c index 03dbbdc98955..8bcc1a5b8829 100644 --- a/arch/arm/mach-mx2/mxt_td60.c +++ b/arch/arm/mach-mx2/mxt_td60.c | |||
@@ -58,21 +58,6 @@ static unsigned int mxt_td60_pins[] __initdata = { | |||
58 | PE9_PF_UART3_RXD, | 58 | PE9_PF_UART3_RXD, |
59 | PE10_PF_UART3_CTS, | 59 | PE10_PF_UART3_CTS, |
60 | PE11_PF_UART3_RTS, | 60 | PE11_PF_UART3_RTS, |
61 | /* UART3 */ | ||
62 | PB26_AF_UART4_RTS, | ||
63 | PB28_AF_UART4_TXD, | ||
64 | PB29_AF_UART4_CTS, | ||
65 | PB31_AF_UART4_RXD, | ||
66 | /* UART4 */ | ||
67 | PB18_AF_UART5_TXD, | ||
68 | PB19_AF_UART5_RXD, | ||
69 | PB20_AF_UART5_CTS, | ||
70 | PB21_AF_UART5_RTS, | ||
71 | /* UART5 */ | ||
72 | PB10_AF_UART6_TXD, | ||
73 | PB12_AF_UART6_CTS, | ||
74 | PB11_AF_UART6_RXD, | ||
75 | PB13_AF_UART6_RTS, | ||
76 | /* FEC */ | 61 | /* FEC */ |
77 | PD0_AIN_FEC_TXD0, | 62 | PD0_AIN_FEC_TXD0, |
78 | PD1_AIN_FEC_TXD1, | 63 | PD1_AIN_FEC_TXD1, |
@@ -261,12 +246,6 @@ static struct imxuart_platform_data uart_pdata[] = { | |||
261 | .flags = IMXUART_HAVE_RTSCTS, | 246 | .flags = IMXUART_HAVE_RTSCTS, |
262 | }, { | 247 | }, { |
263 | .flags = IMXUART_HAVE_RTSCTS, | 248 | .flags = IMXUART_HAVE_RTSCTS, |
264 | }, { | ||
265 | .flags = IMXUART_HAVE_RTSCTS, | ||
266 | }, { | ||
267 | .flags = IMXUART_HAVE_RTSCTS, | ||
268 | }, { | ||
269 | .flags = IMXUART_HAVE_RTSCTS, | ||
270 | }, | 249 | }, |
271 | }; | 250 | }; |
272 | 251 | ||
@@ -278,9 +257,6 @@ static void __init mxt_td60_board_init(void) | |||
278 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | 257 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |
279 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | 258 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); |
280 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); | 259 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); |
281 | mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); | ||
282 | mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); | ||
283 | mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); | ||
284 | mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); | 260 | mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); |
285 | 261 | ||
286 | i2c_register_board_info(0, mxt_td60_i2c_devices, | 262 | i2c_register_board_info(0, mxt_td60_i2c_devices, |
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index ef26951a5275..6acc88bcdc40 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c | |||
@@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk) | |||
119 | return get_rate_per(8); | 119 | return get_rate_per(8); |
120 | } | 120 | } |
121 | 121 | ||
122 | static unsigned long get_rate_gpt(struct clk *clk) | ||
123 | { | ||
124 | return get_rate_per(5); | ||
125 | } | ||
126 | |||
122 | static unsigned long get_rate_otg(struct clk *clk) | 127 | static unsigned long get_rate_otg(struct clk *clk) |
123 | { | 128 | { |
124 | return 48000000; /* FIXME */ | 129 | return 48000000; /* FIXME */ |
@@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk) | |||
144 | __raw_writel(reg, clk->enable_reg); | 149 | __raw_writel(reg, clk->enable_reg); |
145 | } | 150 | } |
146 | 151 | ||
147 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ | 152 | #define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \ |
148 | static struct clk name = { \ | 153 | static struct clk name = { \ |
149 | .id = i, \ | 154 | .id = i, \ |
150 | .enable_reg = CRM_BASE + er, \ | 155 | .enable_reg = CRM_BASE + er, \ |
@@ -153,26 +158,30 @@ static void clk_cgcr_disable(struct clk *clk) | |||
153 | .set_rate = sr, \ | 158 | .set_rate = sr, \ |
154 | .enable = clk_cgcr_enable, \ | 159 | .enable = clk_cgcr_enable, \ |
155 | .disable = clk_cgcr_disable, \ | 160 | .disable = clk_cgcr_disable, \ |
161 | .secondary = s, \ | ||
156 | } | 162 | } |
157 | 163 | ||
158 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL); | 164 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL); |
159 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL); | 165 | DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL); |
160 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL); | 166 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); |
161 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL); | 167 | DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); |
162 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL); | 168 | DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); |
163 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL); | 169 | DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL); |
164 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL); | 170 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk); |
165 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL); | 171 | DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk); |
166 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL); | 172 | DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk); |
167 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL); | 173 | DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk); |
168 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL); | 174 | DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk); |
169 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL); | 175 | DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL); |
170 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL); | 176 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL); |
171 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL); | 177 | DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL); |
172 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL); | 178 | DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL); |
173 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); | 179 | DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL); |
174 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); | 180 | DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL); |
175 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); | 181 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL); |
182 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL); | ||
183 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL); | ||
184 | DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk); | ||
176 | 185 | ||
177 | #define _REGISTER_CLOCK(d, n, c) \ | 186 | #define _REGISTER_CLOCK(d, n, c) \ |
178 | { \ | 187 | { \ |
@@ -204,15 +213,24 @@ static struct clk_lookup lookups[] = { | |||
204 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) | 213 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) |
205 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) | 214 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) |
206 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) | 215 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) |
216 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | ||
207 | }; | 217 | }; |
208 | 218 | ||
209 | int __init mx25_clocks_init(unsigned long fref) | 219 | int __init mx25_clocks_init(void) |
210 | { | 220 | { |
211 | int i; | 221 | int i; |
212 | 222 | ||
213 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | 223 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
214 | clkdev_add(&lookups[i]); | 224 | clkdev_add(&lookups[i]); |
215 | 225 | ||
226 | /* Turn off all clocks except the ones we need to survive, namely: | ||
227 | * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM, | ||
228 | * SCC | ||
229 | */ | ||
230 | __raw_writel((1 << 19), CRM_BASE + CCM_CGCR0); | ||
231 | __raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1); | ||
232 | __raw_writel((1 << 5), CRM_BASE + CCM_CGCR2); | ||
233 | |||
216 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | 234 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); |
217 | 235 | ||
218 | return 0; | 236 | return 0; |
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 63511de3a559..9fdeea1c083b 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c | |||
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void) | |||
419 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); | 419 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); |
420 | } | 420 | } |
421 | 421 | ||
422 | static struct resource mx25_fec_resources[] = { | ||
423 | { | ||
424 | .start = MX25_FEC_BASE_ADDR, | ||
425 | .end = MX25_FEC_BASE_ADDR + 0xfff, | ||
426 | .flags = IORESOURCE_MEM, | ||
427 | }, | ||
428 | { | ||
429 | .start = MX25_INT_FEC, | ||
430 | .end = MX25_INT_FEC, | ||
431 | .flags = IORESOURCE_IRQ, | ||
432 | }, | ||
433 | }; | ||
434 | |||
435 | struct platform_device mx25_fec_device = { | ||
436 | .name = "fec", | ||
437 | .id = 0, | ||
438 | .num_resources = ARRAY_SIZE(mx25_fec_resources), | ||
439 | .resource = mx25_fec_resources, | ||
440 | }; | ||
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index fe6bf88ad1dd..fe5420fcd11f 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h | |||
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device; | |||
17 | extern struct platform_device mxc_i2c_device0; | 17 | extern struct platform_device mxc_i2c_device0; |
18 | extern struct platform_device mxc_i2c_device1; | 18 | extern struct platform_device mxc_i2c_device1; |
19 | extern struct platform_device mxc_i2c_device2; | 19 | extern struct platform_device mxc_i2c_device2; |
20 | extern struct platform_device mx25_fec_device; | ||
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c index d23ae571c03f..6f06089246eb 100644 --- a/arch/arm/mach-mx25/mx25pdk.c +++ b/arch/arm/mach-mx25/mx25pdk.c | |||
@@ -18,10 +18,11 @@ | |||
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/types.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/delay.h> | ||
21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
22 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
23 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
24 | #include <linux/smsc911x.h> | 25 | #include <linux/fec.h> |
25 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
26 | 27 | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
@@ -35,21 +36,62 @@ | |||
35 | #include <mach/mx25.h> | 36 | #include <mach/mx25.h> |
36 | #include <mach/mxc_nand.h> | 37 | #include <mach/mxc_nand.h> |
37 | #include "devices.h" | 38 | #include "devices.h" |
38 | #include <mach/iomux-v3.h> | 39 | #include <mach/iomux.h> |
39 | 40 | ||
40 | static struct imxuart_platform_data uart_pdata = { | 41 | static struct imxuart_platform_data uart_pdata = { |
41 | .flags = IMXUART_HAVE_RTSCTS, | 42 | .flags = IMXUART_HAVE_RTSCTS, |
42 | }; | 43 | }; |
43 | 44 | ||
45 | static struct pad_desc mx25pdk_pads[] = { | ||
46 | MX25_PAD_FEC_MDC__FEC_MDC, | ||
47 | MX25_PAD_FEC_MDIO__FEC_MDIO, | ||
48 | MX25_PAD_FEC_TDATA0__FEC_TDATA0, | ||
49 | MX25_PAD_FEC_TDATA1__FEC_TDATA1, | ||
50 | MX25_PAD_FEC_TX_EN__FEC_TX_EN, | ||
51 | MX25_PAD_FEC_RDATA0__FEC_RDATA0, | ||
52 | MX25_PAD_FEC_RDATA1__FEC_RDATA1, | ||
53 | MX25_PAD_FEC_RX_DV__FEC_RX_DV, | ||
54 | MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, | ||
55 | MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */ | ||
56 | MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */ | ||
57 | }; | ||
58 | |||
59 | static struct fec_platform_data mx25_fec_pdata = { | ||
60 | .phy = PHY_INTERFACE_MODE_RMII, | ||
61 | }; | ||
62 | |||
63 | #define FEC_ENABLE_GPIO 35 | ||
64 | #define FEC_RESET_B_GPIO 104 | ||
65 | |||
66 | static void __init mx25pdk_fec_reset(void) | ||
67 | { | ||
68 | gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable"); | ||
69 | gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset"); | ||
70 | |||
71 | gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */ | ||
72 | gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */ | ||
73 | udelay(2); | ||
74 | |||
75 | /* turn on PHY power and lift reset */ | ||
76 | gpio_set_value(FEC_ENABLE_GPIO, 1); | ||
77 | gpio_set_value(FEC_RESET_B_GPIO, 1); | ||
78 | } | ||
79 | |||
44 | static void __init mx25pdk_init(void) | 80 | static void __init mx25pdk_init(void) |
45 | { | 81 | { |
82 | mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, | ||
83 | ARRAY_SIZE(mx25pdk_pads)); | ||
84 | |||
46 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 85 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
47 | mxc_register_device(&mxc_usbh2, NULL); | 86 | mxc_register_device(&mxc_usbh2, NULL); |
87 | |||
88 | mx25pdk_fec_reset(); | ||
89 | mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); | ||
48 | } | 90 | } |
49 | 91 | ||
50 | static void __init mx25pdk_timer_init(void) | 92 | static void __init mx25pdk_timer_init(void) |
51 | { | 93 | { |
52 | mx25_clocks_init(26000000); | 94 | mx25_clocks_init(); |
53 | } | 95 | } |
54 | 96 | ||
55 | static struct sys_timer mx25pdk_timer = { | 97 | static struct sys_timer mx25pdk_timer = { |
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index ea8ed109a7c2..28294416b0af 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
@@ -49,6 +49,7 @@ config MACH_PCM037_EET | |||
49 | config MACH_MX31LITE | 49 | config MACH_MX31LITE |
50 | bool "Support MX31 LITEKIT (LogicPD)" | 50 | bool "Support MX31 LITEKIT (LogicPD)" |
51 | select ARCH_MX31 | 51 | select ARCH_MX31 |
52 | select MXC_ULPI if USB_ULPI | ||
52 | help | 53 | help |
53 | Include support for MX31 LITEKIT platform. This includes specific | 54 | Include support for MX31 LITEKIT platform. This includes specific |
54 | configurations for the board and its peripherals. | 55 | configurations for the board and its peripherals. |
@@ -63,7 +64,7 @@ config MACH_MX31_3DS | |||
63 | config MACH_MX31MOBOARD | 64 | config MACH_MX31MOBOARD |
64 | bool "Support mx31moboard platforms (EPFL Mobots group)" | 65 | bool "Support mx31moboard platforms (EPFL Mobots group)" |
65 | select ARCH_MX31 | 66 | select ARCH_MX31 |
66 | select MXC_ULPI | 67 | select MXC_ULPI if USB_ULPI |
67 | help | 68 | help |
68 | Include support for mx31moboard platform. This includes specific | 69 | Include support for mx31moboard platform. This includes specific |
69 | configurations for the board and its peripherals. | 70 | configurations for the board and its peripherals. |
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index bedf5b8d976a..6858a4f9806c 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -65,6 +65,11 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
65 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | 65 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), |
66 | .length = AIPS2_SIZE, | 66 | .length = AIPS2_SIZE, |
67 | .type = MT_DEVICE_NONSHARED | 67 | .type = MT_DEVICE_NONSHARED |
68 | }, { | ||
69 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
70 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
71 | .length = SPBA0_SIZE, | ||
72 | .type = MT_DEVICE_NONSHARED | ||
68 | }, | 73 | }, |
69 | }; | 74 | }; |
70 | 75 | ||
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 0497c152be18..938c549767dc 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq) | |||
173 | } | 173 | } |
174 | 174 | ||
175 | static struct irq_chip expio_irq_chip = { | 175 | static struct irq_chip expio_irq_chip = { |
176 | .name = "EXPIO(CPLD)", | ||
176 | .ack = expio_ack_irq, | 177 | .ack = expio_ack_irq, |
177 | .mask = expio_mask_irq, | 178 | .mask = expio_mask_irq, |
178 | .unmask = expio_unmask_irq, | 179 | .unmask = expio_unmask_irq, |
@@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = { | |||
302 | .min_uV = 2800000, | 303 | .min_uV = 2800000, |
303 | .max_uV = 2800000, | 304 | .max_uV = 2800000, |
304 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | 305 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
306 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
305 | .apply_uV = 1, | 307 | .apply_uV = 1, |
306 | }, | 308 | }, |
307 | }; | 309 | }; |
@@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = { | |||
322 | .min_uV = 3300000, | 324 | .min_uV = 3300000, |
323 | .max_uV = 3300000, | 325 | .max_uV = 3300000, |
324 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | 326 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
327 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
325 | .apply_uV = 1, | 328 | .apply_uV = 1, |
326 | }, | 329 | }, |
327 | .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), | 330 | .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), |
@@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350) | |||
459 | 462 | ||
460 | static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { | 463 | static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { |
461 | .init = mx31_wm8350_init, | 464 | .init = mx31_wm8350_init, |
465 | .irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES, | ||
462 | }; | 466 | }; |
463 | #endif | 467 | #endif |
464 | 468 | ||
@@ -494,11 +498,6 @@ static void mxc_init_i2c(void) | |||
494 | */ | 498 | */ |
495 | static struct map_desc mx31ads_io_desc[] __initdata = { | 499 | static struct map_desc mx31ads_io_desc[] __initdata = { |
496 | { | 500 | { |
497 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
498 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
499 | .length = SPBA0_SIZE, | ||
500 | .type = MT_DEVICE_NONSHARED | ||
501 | }, { | ||
502 | .virtual = CS4_BASE_ADDR_VIRT, | 501 | .virtual = CS4_BASE_ADDR_VIRT, |
503 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | 502 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
504 | .length = CS4_SIZE / 2, | 503 | .length = CS4_SIZE / 2, |
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index def6b6736594..789b20d1730f 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c | |||
@@ -135,6 +135,7 @@ static struct spi_board_info mc13783_spi_dev __initdata = { | |||
135 | * USB | 135 | * USB |
136 | */ | 136 | */ |
137 | 137 | ||
138 | #if defined(CONFIG_USB_ULPI) | ||
138 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | 139 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
139 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | 140 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) |
140 | 141 | ||
@@ -180,6 +181,7 @@ static struct mxc_usbh_platform_data usbh2_pdata = { | |||
180 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | 181 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
181 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | 182 | .flags = MXC_EHCI_POWER_PINS_ENABLED, |
182 | }; | 183 | }; |
184 | #endif | ||
183 | 185 | ||
184 | /* | 186 | /* |
185 | * NOR flash | 187 | * NOR flash |
@@ -212,11 +214,6 @@ static struct platform_device physmap_flash_device = { | |||
212 | */ | 214 | */ |
213 | static struct map_desc mx31lite_io_desc[] __initdata = { | 215 | static struct map_desc mx31lite_io_desc[] __initdata = { |
214 | { | 216 | { |
215 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
216 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
217 | .length = SPBA0_SIZE, | ||
218 | .type = MT_DEVICE_NONSHARED | ||
219 | }, { | ||
220 | .virtual = CS4_BASE_ADDR_VIRT, | 217 | .virtual = CS4_BASE_ADDR_VIRT, |
221 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | 218 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
222 | .length = CS4_SIZE, | 219 | .length = CS4_SIZE, |
@@ -261,11 +258,13 @@ static void __init mxc_board_init(void) | |||
261 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); | 258 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); |
262 | spi_register_board_info(&mc13783_spi_dev, 1); | 259 | spi_register_board_info(&mc13783_spi_dev, 1); |
263 | 260 | ||
261 | #if defined(CONFIG_USB_ULPI) | ||
264 | /* USB */ | 262 | /* USB */ |
265 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | 263 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, |
266 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | 264 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); |
267 | 265 | ||
268 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); | 266 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); |
267 | #endif | ||
269 | 268 | ||
270 | /* SMSC9117 IRQ pin */ | 269 | /* SMSC9117 IRQ pin */ |
271 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); | 270 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 8fc624f141cb..438428eaf769 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
@@ -179,7 +179,7 @@ static int __init devboard_usbh1_init(void) | |||
179 | 179 | ||
180 | usbh1_pdata.otg = otg; | 180 | usbh1_pdata.otg = otg; |
181 | 181 | ||
182 | return mxc_register_device(&mx31_usbh1, &usbh1_pdata); | 182 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
183 | } | 183 | } |
184 | 184 | ||
185 | /* | 185 | /* |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index 85184a35e674..1f44b9ccbb0f 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
@@ -294,7 +294,7 @@ static int __init marxbot_usbh1_init(void) | |||
294 | 294 | ||
295 | usbh1_pdata.otg = otg; | 295 | usbh1_pdata.otg = otg; |
296 | 296 | ||
297 | return mxc_register_device(&mx31_usbh1, &usbh1_pdata); | 297 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
298 | } | 298 | } |
299 | 299 | ||
300 | /* | 300 | /* |
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index b70529145936..cfd605d078ec 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
@@ -346,6 +346,8 @@ static struct fsl_usb2_platform_data usb_pdata = { | |||
346 | .phy_mode = FSL_USB2_PHY_ULPI, | 346 | .phy_mode = FSL_USB2_PHY_ULPI, |
347 | }; | 347 | }; |
348 | 348 | ||
349 | #if defined(CONFIG_USB_ULPI) | ||
350 | |||
349 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) | 351 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
350 | 352 | ||
351 | static int moboard_usbh2_hw_init(struct platform_device *pdev) | 353 | static int moboard_usbh2_hw_init(struct platform_device *pdev) |
@@ -392,8 +394,11 @@ static int __init moboard_usbh2_init(void) | |||
392 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | 394 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, |
393 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | 395 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); |
394 | 396 | ||
395 | return mxc_register_device(&mx31_usbh2, &usbh2_pdata); | 397 | return mxc_register_device(&mxc_usbh2, &usbh2_pdata); |
396 | } | 398 | } |
399 | #else | ||
400 | static inline int moboard_usbh2_init(void) { return 0; } | ||
401 | #endif | ||
397 | 402 | ||
398 | 403 | ||
399 | static struct gpio_led mx31moboard_leds[] = { | 404 | static struct gpio_led mx31moboard_leds[] = { |
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c index 0f7a2f06bc2d..18715f1aa7eb 100644 --- a/arch/arm/mach-mx3/mx31pdk.c +++ b/arch/arm/mach-mx3/mx31pdk.c | |||
@@ -211,11 +211,6 @@ static int __init mx31pdk_init_expio(void) | |||
211 | */ | 211 | */ |
212 | static struct map_desc mx31pdk_io_desc[] __initdata = { | 212 | static struct map_desc mx31pdk_io_desc[] __initdata = { |
213 | { | 213 | { |
214 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
215 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
216 | .length = SPBA0_SIZE, | ||
217 | .type = MT_DEVICE_NONSHARED, | ||
218 | }, { | ||
219 | .virtual = CS5_BASE_ADDR_VIRT, | 214 | .virtual = CS5_BASE_ADDR_VIRT, |
220 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), | 215 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), |
221 | .length = CS5_SIZE, | 216 | .length = CS5_SIZE, |
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 6cbaabedf386..5be396917c99 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c | |||
@@ -322,16 +322,25 @@ static int pcm037_camera_power(struct device *dev, int on) | |||
322 | return 0; | 322 | return 0; |
323 | } | 323 | } |
324 | 324 | ||
325 | static struct i2c_board_info pcm037_i2c_2_devices[] = { | 325 | static struct i2c_board_info pcm037_i2c_camera[] = { |
326 | { | 326 | { |
327 | I2C_BOARD_INFO("mt9t031", 0x5d), | 327 | I2C_BOARD_INFO("mt9t031", 0x5d), |
328 | }, { | ||
329 | I2C_BOARD_INFO("mt9v022", 0x48), | ||
328 | }, | 330 | }, |
329 | }; | 331 | }; |
330 | 332 | ||
331 | static struct soc_camera_link iclink = { | 333 | static struct soc_camera_link iclink_mt9v022 = { |
334 | .bus_id = 0, /* Must match with the camera ID */ | ||
335 | .board_info = &pcm037_i2c_camera[1], | ||
336 | .i2c_adapter_id = 2, | ||
337 | .module_name = "mt9v022", | ||
338 | }; | ||
339 | |||
340 | static struct soc_camera_link iclink_mt9t031 = { | ||
332 | .bus_id = 0, /* Must match with the camera ID */ | 341 | .bus_id = 0, /* Must match with the camera ID */ |
333 | .power = pcm037_camera_power, | 342 | .power = pcm037_camera_power, |
334 | .board_info = &pcm037_i2c_2_devices[0], | 343 | .board_info = &pcm037_i2c_camera[0], |
335 | .i2c_adapter_id = 2, | 344 | .i2c_adapter_id = 2, |
336 | .module_name = "mt9t031", | 345 | .module_name = "mt9t031", |
337 | }; | 346 | }; |
@@ -345,11 +354,19 @@ static struct i2c_board_info pcm037_i2c_devices[] = { | |||
345 | } | 354 | } |
346 | }; | 355 | }; |
347 | 356 | ||
348 | static struct platform_device pcm037_camera = { | 357 | static struct platform_device pcm037_mt9t031 = { |
349 | .name = "soc-camera-pdrv", | 358 | .name = "soc-camera-pdrv", |
350 | .id = 0, | 359 | .id = 0, |
351 | .dev = { | 360 | .dev = { |
352 | .platform_data = &iclink, | 361 | .platform_data = &iclink_mt9t031, |
362 | }, | ||
363 | }; | ||
364 | |||
365 | static struct platform_device pcm037_mt9v022 = { | ||
366 | .name = "soc-camera-pdrv", | ||
367 | .id = 1, | ||
368 | .dev = { | ||
369 | .platform_data = &iclink_mt9v022, | ||
353 | }, | 370 | }, |
354 | }; | 371 | }; |
355 | 372 | ||
@@ -449,7 +466,8 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size) | |||
449 | static struct platform_device *devices[] __initdata = { | 466 | static struct platform_device *devices[] __initdata = { |
450 | &pcm037_flash, | 467 | &pcm037_flash, |
451 | &pcm037_sram_device, | 468 | &pcm037_sram_device, |
452 | &pcm037_camera, | 469 | &pcm037_mt9t031, |
470 | &pcm037_mt9v022, | ||
453 | }; | 471 | }; |
454 | 472 | ||
455 | static struct ipu_platform_data mx3_ipu_data = { | 473 | static struct ipu_platform_data mx3_ipu_data = { |
@@ -599,7 +617,7 @@ static void __init mxc_board_init(void) | |||
599 | if (!ret) | 617 | if (!ret) |
600 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); | 618 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); |
601 | else | 619 | else |
602 | iclink.power = NULL; | 620 | iclink_mt9t031.power = NULL; |
603 | 621 | ||
604 | if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) | 622 | if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) |
605 | mxc_register_device(&mx3_camera, &camera_pdata); | 623 | mxc_register_device(&mx3_camera, &camera_pdata); |
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 2ba9ab953731..04f1d29cba2c 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -214,8 +214,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate) | |||
214 | struct mpu_rate * ptr; | 214 | struct mpu_rate * ptr; |
215 | unsigned long dpll1_rate, ref_rate; | 215 | unsigned long dpll1_rate, ref_rate; |
216 | 216 | ||
217 | dpll1_rate = clk_get_rate(ck_dpll1_p); | 217 | dpll1_rate = ck_dpll1_p->rate; |
218 | ref_rate = clk_get_rate(ck_ref_p); | 218 | ref_rate = ck_ref_p->rate; |
219 | 219 | ||
220 | for (ptr = omap1_rate_table; ptr->rate; ptr++) { | 220 | for (ptr = omap1_rate_table; ptr->rate; ptr++) { |
221 | if (ptr->xtal != ref_rate) | 221 | if (ptr->xtal != ref_rate) |
@@ -306,7 +306,7 @@ long omap1_round_to_table_rate(struct clk *clk, unsigned long rate) | |||
306 | long highest_rate; | 306 | long highest_rate; |
307 | unsigned long ref_rate; | 307 | unsigned long ref_rate; |
308 | 308 | ||
309 | ref_rate = clk_get_rate(ck_ref_p); | 309 | ref_rate = ck_ref_p->rate; |
310 | 310 | ||
311 | highest_rate = -EINVAL; | 311 | highest_rate = -EINVAL; |
312 | 312 | ||
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index ab995a9c606c..65e7b5b85d83 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -599,7 +599,7 @@ static struct clk i2c_ick = { | |||
599 | static struct omap_clk omap_clks[] = { | 599 | static struct omap_clk omap_clks[] = { |
600 | /* non-ULPD clocks */ | 600 | /* non-ULPD clocks */ |
601 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), | 601 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
602 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), | 602 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
603 | /* CK_GEN1 clocks */ | 603 | /* CK_GEN1 clocks */ |
604 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), | 604 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), |
605 | CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), | 605 | CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), |
@@ -627,7 +627,7 @@ static struct omap_clk omap_clks[] = { | |||
627 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), | 627 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), |
628 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), | 628 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), |
629 | CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), | 629 | CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), |
630 | CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310), | 630 | CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
631 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), | 631 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), |
632 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), | 632 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), |
633 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), | 633 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), |
@@ -658,6 +658,10 @@ static struct omap_clk omap_clks[] = { | |||
658 | CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), | 658 | CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
659 | CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), | 659 | CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), |
660 | CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), | 660 | CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), |
661 | CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), | ||
662 | CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), | ||
663 | CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), | ||
664 | CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX), | ||
661 | CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), | 665 | CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), |
662 | CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), | 666 | CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), |
663 | CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), | 667 | CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), |
@@ -674,7 +678,7 @@ static struct omap_clk omap_clks[] = { | |||
674 | * init | 678 | * init |
675 | */ | 679 | */ |
676 | 680 | ||
677 | static struct clk_functions omap1_clk_functions __initdata = { | 681 | static struct clk_functions omap1_clk_functions = { |
678 | .clk_enable = omap1_clk_enable, | 682 | .clk_enable = omap1_clk_enable, |
679 | .clk_disable = omap1_clk_disable, | 683 | .clk_disable = omap1_clk_disable, |
680 | .clk_round_rate = omap1_clk_round_rate, | 684 | .clk_round_rate = omap1_clk_round_rate, |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 23ded2d49600..a2d07aa75c9e 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/spi/spi.h> | ||
17 | 18 | ||
18 | #include <mach/hardware.h> | 19 | #include <mach/hardware.h> |
19 | #include <asm/mach/map.h> | 20 | #include <asm/mach/map.h> |
@@ -23,6 +24,7 @@ | |||
23 | #include <plat/mux.h> | 24 | #include <plat/mux.h> |
24 | #include <mach/gpio.h> | 25 | #include <mach/gpio.h> |
25 | #include <plat/mmc.h> | 26 | #include <plat/mmc.h> |
27 | #include <plat/omap7xx.h> | ||
26 | 28 | ||
27 | /*-------------------------------------------------------------------------*/ | 29 | /*-------------------------------------------------------------------------*/ |
28 | 30 | ||
@@ -196,6 +198,38 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |||
196 | 198 | ||
197 | /*-------------------------------------------------------------------------*/ | 199 | /*-------------------------------------------------------------------------*/ |
198 | 200 | ||
201 | /* OMAP7xx SPI support */ | ||
202 | #if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE) | ||
203 | |||
204 | struct platform_device omap_spi1 = { | ||
205 | .name = "omap1_spi100k", | ||
206 | .id = 1, | ||
207 | }; | ||
208 | |||
209 | struct platform_device omap_spi2 = { | ||
210 | .name = "omap1_spi100k", | ||
211 | .id = 2, | ||
212 | }; | ||
213 | |||
214 | static void omap_init_spi100k(void) | ||
215 | { | ||
216 | omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); | ||
217 | if (omap_spi1.dev.platform_data) | ||
218 | platform_device_register(&omap_spi1); | ||
219 | |||
220 | omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); | ||
221 | if (omap_spi2.dev.platform_data) | ||
222 | platform_device_register(&omap_spi2); | ||
223 | } | ||
224 | |||
225 | #else | ||
226 | static inline void omap_init_spi100k(void) | ||
227 | { | ||
228 | } | ||
229 | #endif | ||
230 | |||
231 | /*-------------------------------------------------------------------------*/ | ||
232 | |||
199 | #if defined(CONFIG_OMAP_STI) | 233 | #if defined(CONFIG_OMAP_STI) |
200 | 234 | ||
201 | #define OMAP1_STI_BASE 0xfffea000 | 235 | #define OMAP1_STI_BASE 0xfffea000 |
@@ -263,6 +297,7 @@ static int __init omap1_init_devices(void) | |||
263 | 297 | ||
264 | omap_init_mbox(); | 298 | omap_init_mbox(); |
265 | omap_init_rtc(); | 299 | omap_init_rtc(); |
300 | omap_init_spi100k(); | ||
266 | omap_init_sti(); | 301 | omap_init_sti(); |
267 | 302 | ||
268 | return 0; | 303 | return 0; |
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 07212cc621ae..84341377232d 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c | |||
@@ -62,6 +62,14 @@ MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) | |||
62 | /* I2C interface */ | 62 | /* I2C interface */ |
63 | MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) | 63 | MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) |
64 | MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) | 64 | MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) |
65 | |||
66 | /* SPI pins */ | ||
67 | MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0) | ||
68 | MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0) | ||
69 | MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) | ||
70 | MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) | ||
71 | MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) | ||
72 | MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) | ||
65 | }; | 73 | }; |
66 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) | 74 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) |
67 | #else | 75 | #else |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 10eafa70a909..606bf04f51b6 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -80,6 +80,7 @@ config MACH_OVERO | |||
80 | config MACH_OMAP3EVM | 80 | config MACH_OMAP3EVM |
81 | bool "OMAP 3530 EVM board" | 81 | bool "OMAP 3530 EVM board" |
82 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 82 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
83 | select OMAP_PACKAGE_CBB | ||
83 | 84 | ||
84 | config MACH_OMAP3517EVM | 85 | config MACH_OMAP3517EVM |
85 | bool "OMAP3517/ AM3517 EVM board" | 86 | bool "OMAP3517/ AM3517 EVM board" |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 8dd277c36661..1e3dfb652acc 100755 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
@@ -63,21 +63,21 @@ static int board_keymap[] = { | |||
63 | KEY(5, 1, KEY_H), | 63 | KEY(5, 1, KEY_H), |
64 | KEY(5, 2, KEY_J), | 64 | KEY(5, 2, KEY_J), |
65 | KEY(5, 3, KEY_F3), | 65 | KEY(5, 3, KEY_F3), |
66 | KEY(5, 4, KEY_UNKNOWN), | ||
66 | KEY(5, 5, KEY_VOLUMEDOWN), | 67 | KEY(5, 5, KEY_VOLUMEDOWN), |
67 | KEY(5, 6, KEY_M), | 68 | KEY(5, 6, KEY_M), |
68 | KEY(5, 7, KEY_ENTER), | 69 | KEY(5, 7, KEY_RIGHT), |
69 | KEY(6, 0, KEY_Q), | 70 | KEY(6, 0, KEY_Q), |
70 | KEY(6, 1, KEY_A), | 71 | KEY(6, 1, KEY_A), |
71 | KEY(6, 2, KEY_N), | 72 | KEY(6, 2, KEY_N), |
72 | KEY(6, 3, KEY_BACKSPACE), | 73 | KEY(6, 3, KEY_BACKSPACE), |
73 | KEY(6, 6, KEY_P), | 74 | KEY(6, 6, KEY_P), |
74 | KEY(6, 7, KEY_SELECT), | 75 | KEY(6, 7, KEY_UP), |
75 | KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ | 76 | KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ |
76 | KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ | 77 | KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ |
77 | KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ | 78 | KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ |
78 | KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ | 79 | KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ |
79 | KEY(7, 5, KEY_RIGHT), | 80 | KEY(7, 6, KEY_SELECT), |
80 | KEY(7, 6, KEY_UP), | ||
81 | KEY(7, 7, KEY_DOWN) | 81 | KEY(7, 7, KEY_DOWN) |
82 | }; | 82 | }; |
83 | 83 | ||
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index d0e3fb7f9298..5420356eb407 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c | |||
@@ -449,40 +449,78 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |||
449 | #ifdef CONFIG_CPU_FREQ | 449 | #ifdef CONFIG_CPU_FREQ |
450 | /* | 450 | /* |
451 | * Walk PRCM rate table and fillout cpufreq freq_table | 451 | * Walk PRCM rate table and fillout cpufreq freq_table |
452 | * XXX This should be replaced by an OPP layer in the near future | ||
452 | */ | 453 | */ |
453 | static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; | 454 | static struct cpufreq_frequency_table *freq_table; |
454 | 455 | ||
455 | void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | 456 | void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) |
456 | { | 457 | { |
457 | struct prcm_config *prcm; | 458 | const struct prcm_config *prcm; |
459 | long sys_ck_rate; | ||
458 | int i = 0; | 460 | int i = 0; |
461 | int tbl_sz = 0; | ||
462 | |||
463 | sys_ck_rate = clk_get_rate(sclk); | ||
459 | 464 | ||
460 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | 465 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { |
461 | if (!(prcm->flags & cpu_mask)) | 466 | if (!(prcm->flags & cpu_mask)) |
462 | continue; | 467 | continue; |
463 | if (prcm->xtal_speed != sys_ck.rate) | 468 | if (prcm->xtal_speed != sys_ck_rate) |
464 | continue; | 469 | continue; |
465 | 470 | ||
466 | /* don't put bypass rates in table */ | 471 | /* don't put bypass rates in table */ |
467 | if (prcm->dpll_speed == prcm->xtal_speed) | 472 | if (prcm->dpll_speed == prcm->xtal_speed) |
468 | continue; | 473 | continue; |
469 | 474 | ||
470 | freq_table[i].index = i; | 475 | tbl_sz++; |
471 | freq_table[i].frequency = prcm->mpu_speed / 1000; | ||
472 | i++; | ||
473 | } | 476 | } |
474 | 477 | ||
475 | if (i == 0) { | 478 | /* |
476 | printk(KERN_WARNING "%s: failed to initialize frequency " | 479 | * XXX Ensure that we're doing what CPUFreq expects for this error |
477 | "table\n", __func__); | 480 | * case and the following one |
481 | */ | ||
482 | if (tbl_sz == 0) { | ||
483 | pr_warning("%s: no matching entries in rate_table\n", | ||
484 | __func__); | ||
485 | return; | ||
486 | } | ||
487 | |||
488 | /* Include the CPUFREQ_TABLE_END terminator entry */ | ||
489 | tbl_sz++; | ||
490 | |||
491 | freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz, | ||
492 | GFP_ATOMIC); | ||
493 | if (!freq_table) { | ||
494 | pr_err("%s: could not kzalloc frequency table\n", __func__); | ||
478 | return; | 495 | return; |
479 | } | 496 | } |
480 | 497 | ||
498 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
499 | if (!(prcm->flags & cpu_mask)) | ||
500 | continue; | ||
501 | if (prcm->xtal_speed != sys_ck_rate) | ||
502 | continue; | ||
503 | |||
504 | /* don't put bypass rates in table */ | ||
505 | if (prcm->dpll_speed == prcm->xtal_speed) | ||
506 | continue; | ||
507 | |||
508 | freq_table[i].index = i; | ||
509 | freq_table[i].frequency = prcm->mpu_speed / 1000; | ||
510 | i++; | ||
511 | } | ||
512 | |||
481 | freq_table[i].index = i; | 513 | freq_table[i].index = i; |
482 | freq_table[i].frequency = CPUFREQ_TABLE_END; | 514 | freq_table[i].frequency = CPUFREQ_TABLE_END; |
483 | 515 | ||
484 | *table = &freq_table[0]; | 516 | *table = &freq_table[0]; |
485 | } | 517 | } |
518 | |||
519 | void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
520 | { | ||
521 | kfree(freq_table); | ||
522 | } | ||
523 | |||
486 | #endif | 524 | #endif |
487 | 525 | ||
488 | struct clk_functions omap2_clk_functions = { | 526 | struct clk_functions omap2_clk_functions = { |
@@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = { | |||
494 | .clk_disable_unused = omap2_clk_disable_unused, | 532 | .clk_disable_unused = omap2_clk_disable_unused, |
495 | #ifdef CONFIG_CPU_FREQ | 533 | #ifdef CONFIG_CPU_FREQ |
496 | .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, | 534 | .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, |
535 | .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table, | ||
497 | #endif | 536 | #endif |
498 | }; | 537 | }; |
499 | 538 | ||
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index ded32364f32b..d4217b93e10b 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <asm/div64.h> | 34 | #include <asm/div64.h> |
35 | #include <asm/clkdev.h> | 35 | #include <asm/clkdev.h> |
36 | 36 | ||
37 | #include <plat/sdrc.h> | ||
38 | #include "clock.h" | 37 | #include "clock.h" |
39 | #include "clock34xx.h" | 38 | #include "clock34xx.h" |
40 | #include "sdrc.h" | 39 | #include "sdrc.h" |
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index 8bdcc9cc7f9a..74930e3158e3 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c | |||
@@ -671,7 +671,6 @@ static struct clk dpll4_m3x2_ck = { | |||
671 | .name = "dpll4_m3x2_ck", | 671 | .name = "dpll4_m3x2_ck", |
672 | .ops = &clkops_omap2_dflt_wait, | 672 | .ops = &clkops_omap2_dflt_wait, |
673 | .parent = &dpll4_m3_ck, | 673 | .parent = &dpll4_m3_ck, |
674 | .init = &omap2_init_clksel_parent, | ||
675 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 674 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
676 | .enable_bit = OMAP3430_PWRDN_TV_SHIFT, | 675 | .enable_bit = OMAP3430_PWRDN_TV_SHIFT, |
677 | .flags = INVERT_ENABLE, | 676 | .flags = INVERT_ENABLE, |
@@ -776,6 +775,8 @@ static struct clk dpll4_m5_ck = { | |||
776 | .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, | 775 | .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, |
777 | .clksel = div16_dpll4_clksel, | 776 | .clksel = div16_dpll4_clksel, |
778 | .clkdm_name = "dpll4_clkdm", | 777 | .clkdm_name = "dpll4_clkdm", |
778 | .set_rate = &omap2_clksel_set_rate, | ||
779 | .round_rate = &omap2_clksel_round_rate, | ||
779 | .recalc = &omap2_clksel_recalc, | 780 | .recalc = &omap2_clksel_recalc, |
780 | }; | 781 | }; |
781 | 782 | ||
@@ -809,7 +810,6 @@ static struct clk dpll4_m6x2_ck = { | |||
809 | .name = "dpll4_m6x2_ck", | 810 | .name = "dpll4_m6x2_ck", |
810 | .ops = &clkops_omap2_dflt_wait, | 811 | .ops = &clkops_omap2_dflt_wait, |
811 | .parent = &dpll4_m6_ck, | 812 | .parent = &dpll4_m6_ck, |
812 | .init = &omap2_init_clksel_parent, | ||
813 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), | 813 | .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), |
814 | .enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT, | 814 | .enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT, |
815 | .flags = INVERT_ENABLE, | 815 | .flags = INVERT_ENABLE, |
@@ -1045,7 +1045,6 @@ static struct clk iva2_ck = { | |||
1045 | .name = "iva2_ck", | 1045 | .name = "iva2_ck", |
1046 | .ops = &clkops_omap2_dflt_wait, | 1046 | .ops = &clkops_omap2_dflt_wait, |
1047 | .parent = &dpll2_m2_ck, | 1047 | .parent = &dpll2_m2_ck, |
1048 | .init = &omap2_init_clksel_parent, | ||
1049 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), | 1048 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), |
1050 | .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, | 1049 | .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, |
1051 | .clkdm_name = "iva2_clkdm", | 1050 | .clkdm_name = "iva2_clkdm", |
@@ -1119,7 +1118,6 @@ static struct clk gfx_l3_ck = { | |||
1119 | .name = "gfx_l3_ck", | 1118 | .name = "gfx_l3_ck", |
1120 | .ops = &clkops_omap2_dflt_wait, | 1119 | .ops = &clkops_omap2_dflt_wait, |
1121 | .parent = &l3_ick, | 1120 | .parent = &l3_ick, |
1122 | .init = &omap2_init_clksel_parent, | ||
1123 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), | 1121 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), |
1124 | .enable_bit = OMAP_EN_GFX_SHIFT, | 1122 | .enable_bit = OMAP_EN_GFX_SHIFT, |
1125 | .recalc = &followparent_recalc, | 1123 | .recalc = &followparent_recalc, |
@@ -1500,6 +1498,7 @@ static struct clk uart2_fck = { | |||
1500 | .parent = &core_48m_fck, | 1498 | .parent = &core_48m_fck, |
1501 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1499 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1502 | .enable_bit = OMAP3430_EN_UART2_SHIFT, | 1500 | .enable_bit = OMAP3430_EN_UART2_SHIFT, |
1501 | .clkdm_name = "core_l4_clkdm", | ||
1503 | .recalc = &followparent_recalc, | 1502 | .recalc = &followparent_recalc, |
1504 | }; | 1503 | }; |
1505 | 1504 | ||
@@ -1509,6 +1508,7 @@ static struct clk uart1_fck = { | |||
1509 | .parent = &core_48m_fck, | 1508 | .parent = &core_48m_fck, |
1510 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1509 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1511 | .enable_bit = OMAP3430_EN_UART1_SHIFT, | 1510 | .enable_bit = OMAP3430_EN_UART1_SHIFT, |
1511 | .clkdm_name = "core_l4_clkdm", | ||
1512 | .recalc = &followparent_recalc, | 1512 | .recalc = &followparent_recalc, |
1513 | }; | 1513 | }; |
1514 | 1514 | ||
@@ -2745,7 +2745,7 @@ static struct clk mcbsp4_ick = { | |||
2745 | }; | 2745 | }; |
2746 | 2746 | ||
2747 | static const struct clksel mcbsp_234_clksel[] = { | 2747 | static const struct clksel mcbsp_234_clksel[] = { |
2748 | { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates }, | 2748 | { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, |
2749 | { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, | 2749 | { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, |
2750 | { .parent = NULL } | 2750 | { .parent = NULL } |
2751 | }; | 2751 | }; |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 2210e227d78a..9d882bcb56e3 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -346,37 +346,37 @@ static struct clk aess_fclk = { | |||
346 | }; | 346 | }; |
347 | 347 | ||
348 | static const struct clksel_rate div31_1to31_rates[] = { | 348 | static const struct clksel_rate div31_1to31_rates[] = { |
349 | { .div = 1, .val = 0, .flags = RATE_IN_4430 }, | 349 | { .div = 1, .val = 1, .flags = RATE_IN_4430 }, |
350 | { .div = 2, .val = 1, .flags = RATE_IN_4430 }, | 350 | { .div = 2, .val = 2, .flags = RATE_IN_4430 }, |
351 | { .div = 3, .val = 2, .flags = RATE_IN_4430 }, | 351 | { .div = 3, .val = 3, .flags = RATE_IN_4430 }, |
352 | { .div = 4, .val = 3, .flags = RATE_IN_4430 }, | 352 | { .div = 4, .val = 4, .flags = RATE_IN_4430 }, |
353 | { .div = 5, .val = 4, .flags = RATE_IN_4430 }, | 353 | { .div = 5, .val = 5, .flags = RATE_IN_4430 }, |
354 | { .div = 6, .val = 5, .flags = RATE_IN_4430 }, | 354 | { .div = 6, .val = 6, .flags = RATE_IN_4430 }, |
355 | { .div = 7, .val = 6, .flags = RATE_IN_4430 }, | 355 | { .div = 7, .val = 7, .flags = RATE_IN_4430 }, |
356 | { .div = 8, .val = 7, .flags = RATE_IN_4430 }, | 356 | { .div = 8, .val = 8, .flags = RATE_IN_4430 }, |
357 | { .div = 9, .val = 8, .flags = RATE_IN_4430 }, | 357 | { .div = 9, .val = 9, .flags = RATE_IN_4430 }, |
358 | { .div = 10, .val = 9, .flags = RATE_IN_4430 }, | 358 | { .div = 10, .val = 10, .flags = RATE_IN_4430 }, |
359 | { .div = 11, .val = 10, .flags = RATE_IN_4430 }, | 359 | { .div = 11, .val = 11, .flags = RATE_IN_4430 }, |
360 | { .div = 12, .val = 11, .flags = RATE_IN_4430 }, | 360 | { .div = 12, .val = 12, .flags = RATE_IN_4430 }, |
361 | { .div = 13, .val = 12, .flags = RATE_IN_4430 }, | 361 | { .div = 13, .val = 13, .flags = RATE_IN_4430 }, |
362 | { .div = 14, .val = 13, .flags = RATE_IN_4430 }, | 362 | { .div = 14, .val = 14, .flags = RATE_IN_4430 }, |
363 | { .div = 15, .val = 14, .flags = RATE_IN_4430 }, | 363 | { .div = 15, .val = 15, .flags = RATE_IN_4430 }, |
364 | { .div = 16, .val = 15, .flags = RATE_IN_4430 }, | 364 | { .div = 16, .val = 16, .flags = RATE_IN_4430 }, |
365 | { .div = 17, .val = 16, .flags = RATE_IN_4430 }, | 365 | { .div = 17, .val = 17, .flags = RATE_IN_4430 }, |
366 | { .div = 18, .val = 17, .flags = RATE_IN_4430 }, | 366 | { .div = 18, .val = 18, .flags = RATE_IN_4430 }, |
367 | { .div = 19, .val = 18, .flags = RATE_IN_4430 }, | 367 | { .div = 19, .val = 19, .flags = RATE_IN_4430 }, |
368 | { .div = 20, .val = 19, .flags = RATE_IN_4430 }, | 368 | { .div = 20, .val = 20, .flags = RATE_IN_4430 }, |
369 | { .div = 21, .val = 20, .flags = RATE_IN_4430 }, | 369 | { .div = 21, .val = 21, .flags = RATE_IN_4430 }, |
370 | { .div = 22, .val = 21, .flags = RATE_IN_4430 }, | 370 | { .div = 22, .val = 22, .flags = RATE_IN_4430 }, |
371 | { .div = 23, .val = 22, .flags = RATE_IN_4430 }, | 371 | { .div = 23, .val = 23, .flags = RATE_IN_4430 }, |
372 | { .div = 24, .val = 23, .flags = RATE_IN_4430 }, | 372 | { .div = 24, .val = 24, .flags = RATE_IN_4430 }, |
373 | { .div = 25, .val = 24, .flags = RATE_IN_4430 }, | 373 | { .div = 25, .val = 25, .flags = RATE_IN_4430 }, |
374 | { .div = 26, .val = 25, .flags = RATE_IN_4430 }, | 374 | { .div = 26, .val = 26, .flags = RATE_IN_4430 }, |
375 | { .div = 27, .val = 26, .flags = RATE_IN_4430 }, | 375 | { .div = 27, .val = 27, .flags = RATE_IN_4430 }, |
376 | { .div = 28, .val = 27, .flags = RATE_IN_4430 }, | 376 | { .div = 28, .val = 28, .flags = RATE_IN_4430 }, |
377 | { .div = 29, .val = 28, .flags = RATE_IN_4430 }, | 377 | { .div = 29, .val = 29, .flags = RATE_IN_4430 }, |
378 | { .div = 30, .val = 29, .flags = RATE_IN_4430 }, | 378 | { .div = 30, .val = 30, .flags = RATE_IN_4430 }, |
379 | { .div = 31, .val = 30, .flags = RATE_IN_4430 }, | 379 | { .div = 31, .val = 31, .flags = RATE_IN_4430 }, |
380 | { .div = 0 }, | 380 | { .div = 0 }, |
381 | }; | 381 | }; |
382 | 382 | ||
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 1a45ed1e8ba1..dd285f001467 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
559 | * downstream clocks for debugging purposes? | 559 | * downstream clocks for debugging purposes? |
560 | */ | 560 | */ |
561 | 561 | ||
562 | if (!clkdm || !clk) | 562 | if (!clkdm || !clk || !clkdm->clktrctrl_mask) |
563 | return -EINVAL; | 563 | return -EINVAL; |
564 | 564 | ||
565 | if (atomic_inc_return(&clkdm->usecount) > 1) | 565 | if (atomic_inc_return(&clkdm->usecount) > 1) |
@@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
610 | * downstream clocks for debugging purposes? | 610 | * downstream clocks for debugging purposes? |
611 | */ | 611 | */ |
612 | 612 | ||
613 | if (!clkdm || !clk) | 613 | if (!clkdm || !clk || !clkdm->clktrctrl_mask) |
614 | return -EINVAL; | 614 | return -EINVAL; |
615 | 615 | ||
616 | #ifdef DEBUG | 616 | #ifdef DEBUG |
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index a26d6a08ae3f..12f0cbfc2894 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c | |||
@@ -137,7 +137,7 @@ return_sleep_time: | |||
137 | local_irq_enable(); | 137 | local_irq_enable(); |
138 | local_fiq_enable(); | 138 | local_fiq_enable(); |
139 | 139 | ||
140 | return (u32)timespec_to_ns(&ts_idle)/1000; | 140 | return ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * USEC_PER_SEC; |
141 | } | 141 | } |
142 | 142 | ||
143 | /** | 143 | /** |
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index bd8cb5974726..7027cdc1ba49 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c | |||
@@ -505,7 +505,7 @@ static void __init gpmc_mem_init(void) | |||
505 | void __init gpmc_init(void) | 505 | void __init gpmc_init(void) |
506 | { | 506 | { |
507 | u32 l; | 507 | u32 l; |
508 | char *ck; | 508 | char *ck = NULL; |
509 | 509 | ||
510 | if (cpu_is_omap24xx()) { | 510 | if (cpu_is_omap24xx()) { |
511 | ck = "core_l3_ck"; | 511 | ck = "core_l3_ck"; |
@@ -521,6 +521,9 @@ void __init gpmc_init(void) | |||
521 | l = OMAP44XX_GPMC_BASE; | 521 | l = OMAP44XX_GPMC_BASE; |
522 | } | 522 | } |
523 | 523 | ||
524 | if (WARN_ON(!ck)) | ||
525 | return; | ||
526 | |||
524 | gpmc_l3_clk = clk_get(NULL, ck); | 527 | gpmc_l3_clk = clk_get(NULL, ck); |
525 | if (IS_ERR(gpmc_l3_clk)) { | 528 | if (IS_ERR(gpmc_l3_clk)) { |
526 | printk(KERN_ERR "Could not get GPMC clock %s\n", ck); | 529 | printk(KERN_ERR "Could not get GPMC clock %s\n", ck); |
@@ -534,6 +537,8 @@ void __init gpmc_init(void) | |||
534 | BUG(); | 537 | BUG(); |
535 | } | 538 | } |
536 | 539 | ||
540 | clk_enable(gpmc_l3_clk); | ||
541 | |||
537 | l = gpmc_read_reg(GPMC_REVISION); | 542 | l = gpmc_read_reg(GPMC_REVISION); |
538 | printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); | 543 | printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); |
539 | /* Set smart idle mode and automatic L3 clock gating */ | 544 | /* Set smart idle mode and automatic L3 clock gating */ |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index a091b53657b9..3d65c50bd017 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -188,6 +188,8 @@ void __init omap3_check_revision(void) | |||
188 | u16 hawkeye; | 188 | u16 hawkeye; |
189 | u8 rev; | 189 | u8 rev; |
190 | 190 | ||
191 | omap_chip.oc = CHIP_IS_OMAP3430; | ||
192 | |||
191 | /* | 193 | /* |
192 | * We cannot access revision registers on ES1.0. | 194 | * We cannot access revision registers on ES1.0. |
193 | * If the processor type is Cortex-A8 and the revision is 0x0 | 195 | * If the processor type is Cortex-A8 and the revision is 0x0 |
@@ -196,6 +198,7 @@ void __init omap3_check_revision(void) | |||
196 | cpuid = read_cpuid(CPUID_ID); | 198 | cpuid = read_cpuid(CPUID_ID); |
197 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { | 199 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { |
198 | omap_revision = OMAP3430_REV_ES1_0; | 200 | omap_revision = OMAP3430_REV_ES1_0; |
201 | omap_chip.oc |= CHIP_IS_OMAP3430ES1; | ||
199 | return; | 202 | return; |
200 | } | 203 | } |
201 | 204 | ||
@@ -216,18 +219,28 @@ void __init omap3_check_revision(void) | |||
216 | case 0: /* Take care of early samples */ | 219 | case 0: /* Take care of early samples */ |
217 | case 1: | 220 | case 1: |
218 | omap_revision = OMAP3430_REV_ES2_0; | 221 | omap_revision = OMAP3430_REV_ES2_0; |
222 | omap_chip.oc |= CHIP_IS_OMAP3430ES2; | ||
219 | break; | 223 | break; |
220 | case 2: | 224 | case 2: |
221 | omap_revision = OMAP3430_REV_ES2_1; | 225 | omap_revision = OMAP3430_REV_ES2_1; |
226 | omap_chip.oc |= CHIP_IS_OMAP3430ES2; | ||
222 | break; | 227 | break; |
223 | case 3: | 228 | case 3: |
224 | omap_revision = OMAP3430_REV_ES3_0; | 229 | omap_revision = OMAP3430_REV_ES3_0; |
230 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; | ||
225 | break; | 231 | break; |
226 | case 4: | 232 | case 4: |
233 | omap_revision = OMAP3430_REV_ES3_1; | ||
234 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | ||
235 | break; | ||
236 | case 7: | ||
227 | /* FALLTHROUGH */ | 237 | /* FALLTHROUGH */ |
228 | default: | 238 | default: |
229 | /* Use the latest known revision as default */ | 239 | /* Use the latest known revision as default */ |
230 | omap_revision = OMAP3430_REV_ES3_1; | 240 | omap_revision = OMAP3430_REV_ES3_1_2; |
241 | |||
242 | /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ | ||
243 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | ||
231 | } | 244 | } |
232 | break; | 245 | break; |
233 | case 0xb868: | 246 | case 0xb868: |
@@ -235,14 +248,18 @@ void __init omap3_check_revision(void) | |||
235 | * | 248 | * |
236 | * Set the device to be OMAP3505 here. Actual device | 249 | * Set the device to be OMAP3505 here. Actual device |
237 | * is identified later based on the features. | 250 | * is identified later based on the features. |
251 | * | ||
252 | * REVISIT: AM3505/AM3517 should have their own CHIP_IS | ||
238 | */ | 253 | */ |
239 | omap_revision = OMAP3505_REV(rev); | 254 | omap_revision = OMAP3505_REV(rev); |
255 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | ||
240 | break; | 256 | break; |
241 | case 0xb891: | 257 | case 0xb891: |
242 | /* FALLTHROUGH */ | 258 | /* FALLTHROUGH */ |
243 | default: | 259 | default: |
244 | /* Unknown default to latest silicon rev as default*/ | 260 | /* Unknown default to latest silicon rev as default*/ |
245 | omap_revision = OMAP3630_REV_ES1_0; | 261 | omap_revision = OMAP3630_REV_ES1_0; |
262 | omap_chip.oc |= CHIP_IS_OMAP3630ES1; | ||
246 | } | 263 | } |
247 | } | 264 | } |
248 | 265 | ||
@@ -360,6 +377,7 @@ void __init omap2_check_revision(void) | |||
360 | omap3_check_revision(); | 377 | omap3_check_revision(); |
361 | omap3_check_features(); | 378 | omap3_check_features(); |
362 | omap3_cpuinfo(); | 379 | omap3_cpuinfo(); |
380 | return; | ||
363 | } else if (cpu_is_omap44xx()) { | 381 | } else if (cpu_is_omap44xx()) { |
364 | omap4_check_revision(); | 382 | omap4_check_revision(); |
365 | return; | 383 | return; |
@@ -374,27 +392,14 @@ void __init omap2_check_revision(void) | |||
374 | if (cpu_is_omap243x()) { | 392 | if (cpu_is_omap243x()) { |
375 | /* Currently only supports 2430ES2.1 and 2430-all */ | 393 | /* Currently only supports 2430ES2.1 and 2430-all */ |
376 | omap_chip.oc |= CHIP_IS_OMAP2430; | 394 | omap_chip.oc |= CHIP_IS_OMAP2430; |
395 | return; | ||
377 | } else if (cpu_is_omap242x()) { | 396 | } else if (cpu_is_omap242x()) { |
378 | /* Currently only supports 2420ES2.1.1 and 2420-all */ | 397 | /* Currently only supports 2420ES2.1.1 and 2420-all */ |
379 | omap_chip.oc |= CHIP_IS_OMAP2420; | 398 | omap_chip.oc |= CHIP_IS_OMAP2420; |
380 | } else if (cpu_is_omap3505() || cpu_is_omap3517()) { | 399 | return; |
381 | omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1; | ||
382 | } else if (cpu_is_omap343x()) { | ||
383 | omap_chip.oc = CHIP_IS_OMAP3430; | ||
384 | if (omap_rev() == OMAP3430_REV_ES1_0) | ||
385 | omap_chip.oc |= CHIP_IS_OMAP3430ES1; | ||
386 | else if (omap_rev() >= OMAP3430_REV_ES2_0 && | ||
387 | omap_rev() <= OMAP3430_REV_ES2_1) | ||
388 | omap_chip.oc |= CHIP_IS_OMAP3430ES2; | ||
389 | else if (omap_rev() == OMAP3430_REV_ES3_0) | ||
390 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; | ||
391 | else if (omap_rev() == OMAP3430_REV_ES3_1) | ||
392 | omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; | ||
393 | else if (omap_rev() == OMAP3630_REV_ES1_0) | ||
394 | omap_chip.oc |= CHIP_IS_OMAP3630ES1; | ||
395 | } else { | ||
396 | pr_err("Uninitialized omap_chip, please fix!\n"); | ||
397 | } | 400 | } |
401 | |||
402 | pr_err("Uninitialized omap_chip, please fix!\n"); | ||
398 | } | 403 | } |
399 | 404 | ||
400 | /* | 405 | /* |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index a8749e8017b9..5a7996402c53 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -33,7 +33,6 @@ | |||
33 | #include <plat/sdrc.h> | 33 | #include <plat/sdrc.h> |
34 | #include <plat/gpmc.h> | 34 | #include <plat/gpmc.h> |
35 | #include <plat/serial.h> | 35 | #include <plat/serial.h> |
36 | #include <plat/mux.h> | ||
37 | #include <plat/vram.h> | 36 | #include <plat/vram.h> |
38 | 37 | ||
39 | #include "clock.h" | 38 | #include "clock.h" |
@@ -73,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = { | |||
73 | #ifdef CONFIG_ARCH_OMAP2420 | 72 | #ifdef CONFIG_ARCH_OMAP2420 |
74 | static struct map_desc omap242x_io_desc[] __initdata = { | 73 | static struct map_desc omap242x_io_desc[] __initdata = { |
75 | { | 74 | { |
76 | .virtual = DSP_MEM_24XX_VIRT, | 75 | .virtual = DSP_MEM_2420_VIRT, |
77 | .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), | 76 | .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS), |
78 | .length = DSP_MEM_24XX_SIZE, | 77 | .length = DSP_MEM_2420_SIZE, |
79 | .type = MT_DEVICE | 78 | .type = MT_DEVICE |
80 | }, | 79 | }, |
81 | { | 80 | { |
82 | .virtual = DSP_IPI_24XX_VIRT, | 81 | .virtual = DSP_IPI_2420_VIRT, |
83 | .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), | 82 | .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS), |
84 | .length = DSP_IPI_24XX_SIZE, | 83 | .length = DSP_IPI_2420_SIZE, |
85 | .type = MT_DEVICE | 84 | .type = MT_DEVICE |
86 | }, | 85 | }, |
87 | { | 86 | { |
88 | .virtual = DSP_MMU_24XX_VIRT, | 87 | .virtual = DSP_MMU_2420_VIRT, |
89 | .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), | 88 | .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS), |
90 | .length = DSP_MMU_24XX_SIZE, | 89 | .length = DSP_MMU_2420_SIZE, |
91 | .type = MT_DEVICE | 90 | .type = MT_DEVICE |
92 | }, | 91 | }, |
93 | }; | 92 | }; |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index e9bc782fa414..26aeef560aa3 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -194,7 +194,7 @@ void __init omap_init_irq(void) | |||
194 | int i; | 194 | int i; |
195 | 195 | ||
196 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { | 196 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { |
197 | unsigned long base; | 197 | unsigned long base = 0; |
198 | struct omap_irq_bank *bank = irq_banks + i; | 198 | struct omap_irq_bank *bank = irq_banks + i; |
199 | 199 | ||
200 | if (cpu_is_omap24xx()) | 200 | if (cpu_is_omap24xx()) |
@@ -202,6 +202,8 @@ void __init omap_init_irq(void) | |||
202 | else if (cpu_is_omap34xx()) | 202 | else if (cpu_is_omap34xx()) |
203 | base = OMAP34XX_IC_BASE; | 203 | base = OMAP34XX_IC_BASE; |
204 | 204 | ||
205 | BUG_ON(!base); | ||
206 | |||
205 | /* Static mapping, never released */ | 207 | /* Static mapping, never released */ |
206 | bank->base_reg = ioremap(base, SZ_4K); | 208 | bank->base_reg = ioremap(base, SZ_4K); |
207 | if (!bank->base_reg) { | 209 | if (!bank->base_reg) { |
@@ -274,4 +276,22 @@ void omap_intc_restore_context(void) | |||
274 | } | 276 | } |
275 | /* MIRs are saved and restore with other PRCM registers */ | 277 | /* MIRs are saved and restore with other PRCM registers */ |
276 | } | 278 | } |
279 | |||
280 | void omap3_intc_suspend(void) | ||
281 | { | ||
282 | /* A pending interrupt would prevent OMAP from entering suspend */ | ||
283 | omap_ack_irq(0); | ||
284 | } | ||
285 | |||
286 | void omap3_intc_prepare_idle(void) | ||
287 | { | ||
288 | /* Disable autoidle as it can stall interrupt controller */ | ||
289 | intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG); | ||
290 | } | ||
291 | |||
292 | void omap3_intc_resume_idle(void) | ||
293 | { | ||
294 | /* Re-enable autoidle */ | ||
295 | intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG); | ||
296 | } | ||
277 | #endif /* CONFIG_ARCH_OMAP3 */ | 297 | #endif /* CONFIG_ARCH_OMAP3 */ |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index e071b3fd1878..5fedc50c58e4 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -51,7 +51,7 @@ struct omap_mux_entry { | |||
51 | static unsigned long mux_phys; | 51 | static unsigned long mux_phys; |
52 | static void __iomem *mux_base; | 52 | static void __iomem *mux_base; |
53 | 53 | ||
54 | static inline u16 omap_mux_read(u16 reg) | 54 | u16 omap_mux_read(u16 reg) |
55 | { | 55 | { |
56 | if (cpu_is_omap24xx()) | 56 | if (cpu_is_omap24xx()) |
57 | return __raw_readb(mux_base + reg); | 57 | return __raw_readb(mux_base + reg); |
@@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg) | |||
59 | return __raw_readw(mux_base + reg); | 59 | return __raw_readw(mux_base + reg); |
60 | } | 60 | } |
61 | 61 | ||
62 | static inline void omap_mux_write(u16 val, u16 reg) | 62 | void omap_mux_write(u16 val, u16 reg) |
63 | { | 63 | { |
64 | if (cpu_is_omap24xx()) | 64 | if (cpu_is_omap24xx()) |
65 | __raw_writeb(val, mux_base + reg); | 65 | __raw_writeb(val, mux_base + reg); |
@@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg) | |||
67 | __raw_writew(val, mux_base + reg); | 67 | __raw_writew(val, mux_base + reg); |
68 | } | 68 | } |
69 | 69 | ||
70 | void omap_mux_write_array(struct omap_board_mux *board_mux) | ||
71 | { | ||
72 | while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { | ||
73 | omap_mux_write(board_mux->value, board_mux->reg_offset); | ||
74 | board_mux++; | ||
75 | } | ||
76 | } | ||
77 | |||
70 | #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) | 78 | #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX) |
71 | 79 | ||
72 | static struct omap_mux_cfg arch_mux_cfg; | 80 | static struct omap_mux_cfg arch_mux_cfg; |
@@ -478,7 +486,7 @@ int __init omap_mux_init_signal(char *muxname, int val) | |||
478 | static inline void omap_mux_decode(struct seq_file *s, u16 val) | 486 | static inline void omap_mux_decode(struct seq_file *s, u16 val) |
479 | { | 487 | { |
480 | char *flags[OMAP_MUX_MAX_NR_FLAGS]; | 488 | char *flags[OMAP_MUX_MAX_NR_FLAGS]; |
481 | char mode[14]; | 489 | char mode[sizeof("OMAP_MUX_MODE") + 1]; |
482 | int i = -1; | 490 | int i = -1; |
483 | 491 | ||
484 | sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); | 492 | sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); |
@@ -545,6 +553,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) | |||
545 | if (!m0_name) | 553 | if (!m0_name) |
546 | continue; | 554 | continue; |
547 | 555 | ||
556 | /* REVISIT: Needs to be updated if mode0 names get longer */ | ||
548 | for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { | 557 | for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { |
549 | if (m0_name[i] == '\0') { | 558 | if (m0_name[i] == '\0') { |
550 | m0_def[i] = m0_name[i]; | 559 | m0_def[i] = m0_name[i]; |
@@ -833,14 +842,6 @@ static void __init omap_mux_set_cmdline_signals(void) | |||
833 | kfree(options); | 842 | kfree(options); |
834 | } | 843 | } |
835 | 844 | ||
836 | static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux) | ||
837 | { | ||
838 | while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { | ||
839 | omap_mux_write(board_mux->value, board_mux->reg_offset); | ||
840 | board_mux++; | ||
841 | } | ||
842 | } | ||
843 | |||
844 | static int __init omap_mux_copy_names(struct omap_mux *src, | 845 | static int __init omap_mux_copy_names(struct omap_mux *src, |
845 | struct omap_mux *dst) | 846 | struct omap_mux *dst) |
846 | { | 847 | { |
@@ -968,6 +969,13 @@ static void __init omap_mux_init_list(struct omap_mux *superset) | |||
968 | } | 969 | } |
969 | #endif | 970 | #endif |
970 | 971 | ||
972 | #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) | ||
973 | if (!superset->muxnames || !superset->muxnames[0]) { | ||
974 | superset++; | ||
975 | continue; | ||
976 | } | ||
977 | #endif | ||
978 | |||
971 | entry = omap_mux_list_add(superset); | 979 | entry = omap_mux_list_add(superset); |
972 | if (!entry) { | 980 | if (!entry) { |
973 | printk(KERN_ERR "mux: Could not add entry\n"); | 981 | printk(KERN_ERR "mux: Could not add entry\n"); |
@@ -994,14 +1002,19 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, | |||
994 | } | 1002 | } |
995 | 1003 | ||
996 | #ifdef CONFIG_OMAP_MUX | 1004 | #ifdef CONFIG_OMAP_MUX |
997 | omap_mux_package_fixup(package_subset, superset); | 1005 | if (package_subset) |
998 | omap_mux_package_init_balls(package_balls, superset); | 1006 | omap_mux_package_fixup(package_subset, superset); |
999 | omap_mux_set_cmdline_signals(); | 1007 | if (package_balls) |
1000 | omap_mux_set_board_signals(board_mux); | 1008 | omap_mux_package_init_balls(package_balls, superset); |
1001 | #endif | 1009 | #endif |
1002 | 1010 | ||
1003 | omap_mux_init_list(superset); | 1011 | omap_mux_init_list(superset); |
1004 | 1012 | ||
1013 | #ifdef CONFIG_OMAP_MUX | ||
1014 | omap_mux_set_cmdline_signals(); | ||
1015 | omap_mux_write_array(board_mux); | ||
1016 | #endif | ||
1017 | |||
1005 | return 0; | 1018 | return 0; |
1006 | } | 1019 | } |
1007 | 1020 | ||
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h index d8b4d5ad2278..f8c2e7a8f063 100644 --- a/arch/arm/mach-omap2/mux.h +++ b/arch/arm/mach-omap2/mux.h | |||
@@ -147,6 +147,30 @@ u16 omap_mux_get_gpio(int gpio); | |||
147 | void omap_mux_set_gpio(u16 val, int gpio); | 147 | void omap_mux_set_gpio(u16 val, int gpio); |
148 | 148 | ||
149 | /** | 149 | /** |
150 | * omap_mux_read() - read mux register | ||
151 | * @mux_offset: Offset of the mux register | ||
152 | * | ||
153 | */ | ||
154 | u16 omap_mux_read(u16 mux_offset); | ||
155 | |||
156 | /** | ||
157 | * omap_mux_write() - write mux register | ||
158 | * @val: New mux register value | ||
159 | * @mux_offset: Offset of the mux register | ||
160 | * | ||
161 | * This should be only needed for dynamic remuxing of non-gpio signals. | ||
162 | */ | ||
163 | void omap_mux_write(u16 val, u16 mux_offset); | ||
164 | |||
165 | /** | ||
166 | * omap_mux_write_array() - write an array of mux registers | ||
167 | * @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR | ||
168 | * | ||
169 | * This should be only needed for dynamic remuxing of non-gpio signals. | ||
170 | */ | ||
171 | void omap_mux_write_array(struct omap_board_mux *board_mux); | ||
172 | |||
173 | /** | ||
150 | * omap3_mux_init() - initialize mux system with board specific set | 174 | * omap3_mux_init() - initialize mux system with board specific set |
151 | * @board_mux: Board specific mux table | 175 | * @board_mux: Board specific mux table |
152 | * @flags: OMAP package type used for the board | 176 | * @flags: OMAP package type used for the board |
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 68e0a595f9a1..07aa7b3c95f7 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c | |||
@@ -649,6 +649,53 @@ static struct omap_mux __initdata omap3_muxmodes[] = { | |||
649 | _OMAP3_MUXENTRY(UART3_TX_IRTX, 166, | 649 | _OMAP3_MUXENTRY(UART3_TX_IRTX, 166, |
650 | "uart3_tx_irtx", NULL, NULL, NULL, | 650 | "uart3_tx_irtx", NULL, NULL, NULL, |
651 | "gpio_166", NULL, NULL, "safe_mode"), | 651 | "gpio_166", NULL, NULL, "safe_mode"), |
652 | |||
653 | /* Only on 3630, see omap36xx_cbp_subset for the signals */ | ||
654 | _OMAP3_MUXENTRY(GPMC_A11, 0, | ||
655 | NULL, NULL, NULL, NULL, | ||
656 | NULL, NULL, NULL, NULL), | ||
657 | _OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0, | ||
658 | NULL, NULL, NULL, NULL, | ||
659 | NULL, NULL, NULL, NULL), | ||
660 | _OMAP3_MUXENTRY(SAD2D_MREAD, 0, | ||
661 | NULL, NULL, NULL, NULL, | ||
662 | NULL, NULL, NULL, NULL), | ||
663 | _OMAP3_MUXENTRY(SAD2D_MWRITE, 0, | ||
664 | NULL, NULL, NULL, NULL, | ||
665 | NULL, NULL, NULL, NULL), | ||
666 | _OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0, | ||
667 | NULL, NULL, NULL, NULL, | ||
668 | NULL, NULL, NULL, NULL), | ||
669 | _OMAP3_MUXENTRY(SAD2D_SREAD, 0, | ||
670 | NULL, NULL, NULL, NULL, | ||
671 | NULL, NULL, NULL, NULL), | ||
672 | _OMAP3_MUXENTRY(SAD2D_SWRITE, 0, | ||
673 | NULL, NULL, NULL, NULL, | ||
674 | NULL, NULL, NULL, NULL), | ||
675 | _OMAP3_MUXENTRY(GPMC_A11, 0, | ||
676 | NULL, NULL, NULL, NULL, | ||
677 | NULL, NULL, NULL, NULL), | ||
678 | _OMAP3_MUXENTRY(SAD2D_MCAD28, 0, | ||
679 | NULL, NULL, NULL, NULL, | ||
680 | NULL, NULL, NULL, NULL), | ||
681 | _OMAP3_MUXENTRY(SAD2D_MCAD29, 0, | ||
682 | NULL, NULL, NULL, NULL, | ||
683 | NULL, NULL, NULL, NULL), | ||
684 | _OMAP3_MUXENTRY(SAD2D_MCAD32, 0, | ||
685 | NULL, NULL, NULL, NULL, | ||
686 | NULL, NULL, NULL, NULL), | ||
687 | _OMAP3_MUXENTRY(SAD2D_MCAD33, 0, | ||
688 | NULL, NULL, NULL, NULL, | ||
689 | NULL, NULL, NULL, NULL), | ||
690 | _OMAP3_MUXENTRY(SAD2D_MCAD34, 0, | ||
691 | NULL, NULL, NULL, NULL, | ||
692 | NULL, NULL, NULL, NULL), | ||
693 | _OMAP3_MUXENTRY(SAD2D_MCAD35, 0, | ||
694 | NULL, NULL, NULL, NULL, | ||
695 | NULL, NULL, NULL, NULL), | ||
696 | _OMAP3_MUXENTRY(SAD2D_MCAD36, 0, | ||
697 | NULL, NULL, NULL, NULL, | ||
698 | NULL, NULL, NULL, NULL), | ||
652 | { .reg_offset = OMAP_MUX_TERMINATOR }, | 699 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
653 | }; | 700 | }; |
654 | 701 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d8c8545875b1..478ae585ca39 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -94,7 +94,8 @@ static int _update_sysc_cache(struct omap_hwmod *oh) | |||
94 | 94 | ||
95 | oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); | 95 | oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); |
96 | 96 | ||
97 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; | 97 | if (!(oh->sysconfig->sysc_flags & SYSC_NO_CACHE)) |
98 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; | ||
98 | 99 | ||
99 | return 0; | 100 | return 0; |
100 | } | 101 | } |
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c index 126a9396b3a8..e6dda694fd5c 100644 --- a/arch/arm/mach-omap2/opp2420_data.c +++ b/arch/arm/mach-omap2/opp2420_data.c | |||
@@ -9,45 +9,47 @@ | |||
9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. | 9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. |
10 | * These configurations are characterized by voltage and speed for clocks. | 10 | * These configurations are characterized by voltage and speed for clocks. |
11 | * The device is only validated for certain combinations. One way to express | 11 | * The device is only validated for certain combinations. One way to express |
12 | * these combinations is via the 'ratio's' which the clocks operate with | 12 | * these combinations is via the 'ratios' which the clocks operate with |
13 | * respect to each other. These ratio sets are for a given voltage/DPLL | 13 | * respect to each other. These ratio sets are for a given voltage/DPLL |
14 | * setting. All configurations can be described by a DPLL setting and a ratio | 14 | * setting. All configurations can be described by a DPLL setting and a ratio. |
15 | * There are 3 ratio sets for the 2430 and X ratio sets for 2420. | ||
16 | * | ||
17 | * 2430 differs from 2420 in that there are no more phase synchronizers used. | ||
18 | * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs | ||
19 | * 2430 (iva2.1, NOdsp, mdm) | ||
20 | * | 15 | * |
21 | * XXX Missing voltage data. | 16 | * XXX Missing voltage data. |
17 | * XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810) | ||
22 | * | 18 | * |
23 | * THe format described in this file is deprecated. Once a reasonable | 19 | * THe format described in this file is deprecated. Once a reasonable |
24 | * OPP API exists, the data in this file should be converted to use it. | 20 | * OPP API exists, the data in this file should be converted to use it. |
25 | * | 21 | * |
26 | * This is technically part of the OMAP2xxx clock code. | 22 | * This is technically part of the OMAP2xxx clock code. |
23 | * | ||
24 | * Considerable work is still needed to fully support dynamic frequency | ||
25 | * changes on OMAP2xxx-series chips. Readers interested in such a | ||
26 | * project are encouraged to review the Maemo Diablo RX-34 and RX-44 | ||
27 | * kernel source at: | ||
28 | * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ | ||
27 | */ | 29 | */ |
28 | 30 | ||
29 | #include "opp2xxx.h" | 31 | #include "opp2xxx.h" |
30 | #include "sdrc.h" | 32 | #include "sdrc.h" |
31 | #include "clock.h" | 33 | #include "clock.h" |
32 | 34 | ||
33 | /*------------------------------------------------------------------------- | 35 | /* |
34 | * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. | 36 | * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated. |
35 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, | 37 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, |
36 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, | 38 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, |
37 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM | 39 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM |
38 | * | 40 | * |
39 | * Filling in table based on H4 boards and 2430-SDPs variants available. | 41 | * Filling in table based on H4 boards available. There are quite a |
40 | * There are quite a few more rates combinations which could be defined. | 42 | * few more rate combinations which could be defined. |
41 | * | 43 | * |
42 | * When multiple values are defined the start up will try and choose the | 44 | * When multiple values are defined the start up will try and choose |
43 | * fastest one. If a 'fast' value is defined, then automatically, the /2 | 45 | * the fastest one. If a 'fast' value is defined, then automatically, |
44 | * one should be included as it can be used. Generally having more that | 46 | * the /2 one should be included as it can be used. Generally having |
45 | * one fast set does not make sense, as static timings need to be changed | 47 | * more than one fast set does not make sense, as static timings need |
46 | * to change the set. The exception is the bypass setting which is | 48 | * to be changed to change the set. The exception is the bypass |
47 | * availble for low power bypass. | 49 | * setting which is available for low power bypass. |
48 | * | 50 | * |
49 | * Note: This table needs to be sorted, fastest to slowest. | 51 | * Note: This table needs to be sorted, fastest to slowest. |
50 | *-------------------------------------------------------------------------*/ | 52 | **/ |
51 | const struct prcm_config omap2420_rate_table[] = { | 53 | const struct prcm_config omap2420_rate_table[] = { |
52 | /* PRCM I - FAST */ | 54 | /* PRCM I - FAST */ |
53 | {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ | 55 | {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ |
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c index edb81672c844..1b9596ae201e 100644 --- a/arch/arm/mach-omap2/opp2430_data.c +++ b/arch/arm/mach-omap2/opp2430_data.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * opp2420_data.c - old-style "OPP" table for OMAP2420 | 2 | * opp2430_data.c - old-style "OPP" table for OMAP2430 |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. | 4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. |
5 | * Copyright (C) 2004-2009 Nokia Corporation | 5 | * Copyright (C) 2004-2009 Nokia Corporation |
@@ -9,16 +9,16 @@ | |||
9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. | 9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. |
10 | * These configurations are characterized by voltage and speed for clocks. | 10 | * These configurations are characterized by voltage and speed for clocks. |
11 | * The device is only validated for certain combinations. One way to express | 11 | * The device is only validated for certain combinations. One way to express |
12 | * these combinations is via the 'ratio's' which the clocks operate with | 12 | * these combinations is via the 'ratios' which the clocks operate with |
13 | * respect to each other. These ratio sets are for a given voltage/DPLL | 13 | * respect to each other. These ratio sets are for a given voltage/DPLL |
14 | * setting. All configurations can be described by a DPLL setting and a ratio | 14 | * setting. All configurations can be described by a DPLL setting and a ratio. |
15 | * There are 3 ratio sets for the 2430 and X ratio sets for 2420. | ||
16 | * | 15 | * |
17 | * 2430 differs from 2420 in that there are no more phase synchronizers used. | 16 | * 2430 differs from 2420 in that there are no more phase synchronizers used. |
18 | * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs | 17 | * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs |
19 | * 2430 (iva2.1, NOdsp, mdm) | 18 | * 2430 (iva2.1, NOdsp, mdm) |
20 | * | 19 | * |
21 | * XXX Missing voltage data. | 20 | * XXX Missing voltage data. |
21 | * XXX Missing 19.2MHz sys_clk rate sets. | ||
22 | * | 22 | * |
23 | * THe format described in this file is deprecated. Once a reasonable | 23 | * THe format described in this file is deprecated. Once a reasonable |
24 | * OPP API exists, the data in this file should be converted to use it. | 24 | * OPP API exists, the data in this file should be converted to use it. |
@@ -30,24 +30,24 @@ | |||
30 | #include "sdrc.h" | 30 | #include "sdrc.h" |
31 | #include "clock.h" | 31 | #include "clock.h" |
32 | 32 | ||
33 | /*------------------------------------------------------------------------- | 33 | /* |
34 | * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. | 34 | * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated. |
35 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, | 35 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, |
36 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, | 36 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, |
37 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM | 37 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM |
38 | * | 38 | * |
39 | * Filling in table based on H4 boards and 2430-SDPs variants available. | 39 | * Filling in table based on 2430-SDPs variants available. There are |
40 | * There are quite a few more rates combinations which could be defined. | 40 | * quite a few more rate combinations which could be defined. |
41 | * | 41 | * |
42 | * When multiple values are defined the start up will try and choose the | 42 | * When multiple values are defined the start up will try and choose |
43 | * fastest one. If a 'fast' value is defined, then automatically, the /2 | 43 | * the fastest one. If a 'fast' value is defined, then automatically, |
44 | * one should be included as it can be used. Generally having more that | 44 | * the /2 one should be included as it can be used. Generally having |
45 | * one fast set does not make sense, as static timings need to be changed | 45 | * more than one fast set does not make sense, as static timings need |
46 | * to change the set. The exception is the bypass setting which is | 46 | * to be changed to change the set. The exception is the bypass |
47 | * availble for low power bypass. | 47 | * setting which is available for low power bypass. |
48 | * | 48 | * |
49 | * Note: This table needs to be sorted, fastest to slowest. | 49 | * Note: This table needs to be sorted, fastest to slowest. |
50 | *-------------------------------------------------------------------------*/ | 50 | */ |
51 | const struct prcm_config omap2430_rate_table[] = { | 51 | const struct prcm_config omap2430_rate_table[] = { |
52 | /* PRCM #4 - ratio2 (ES2.1) - FAST */ | 52 | /* PRCM #4 - ratio2 (ES2.1) - FAST */ |
53 | {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ | 53 | {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 860b755d2220..a0866268aa41 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -54,8 +54,6 @@ int omap2_pm_debug; | |||
54 | regs[reg_count++].val = \ | 54 | regs[reg_count++].val = \ |
55 | __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off))) | 55 | __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off))) |
56 | 56 | ||
57 | static int __init pm_dbg_init(void); | ||
58 | |||
59 | void omap2_pm_dump(int mode, int resume, unsigned int us) | 57 | void omap2_pm_dump(int mode, int resume, unsigned int us) |
60 | { | 58 | { |
61 | struct reg { | 59 | struct reg { |
@@ -167,6 +165,8 @@ struct dentry *pm_dbg_dir; | |||
167 | 165 | ||
168 | static int pm_dbg_init_done; | 166 | static int pm_dbg_init_done; |
169 | 167 | ||
168 | static int __init pm_dbg_init(void); | ||
169 | |||
170 | enum { | 170 | enum { |
171 | DEBUG_FILE_COUNTERS = 0, | 171 | DEBUG_FILE_COUNTERS = 0, |
172 | DEBUG_FILE_TIMERS, | 172 | DEBUG_FILE_TIMERS, |
@@ -488,9 +488,11 @@ int pm_dbg_regset_init(int reg_set) | |||
488 | 488 | ||
489 | static int pwrdm_suspend_get(void *data, u64 *val) | 489 | static int pwrdm_suspend_get(void *data, u64 *val) |
490 | { | 490 | { |
491 | *val = omap3_pm_get_suspend_state((struct powerdomain *)data); | 491 | int ret; |
492 | ret = omap3_pm_get_suspend_state((struct powerdomain *)data); | ||
493 | *val = ret; | ||
492 | 494 | ||
493 | if (*val >= 0) | 495 | if (ret >= 0) |
494 | return 0; | 496 | return 0; |
495 | return *val; | 497 | return *val; |
496 | } | 498 | } |
@@ -604,6 +606,4 @@ static int __init pm_dbg_init(void) | |||
604 | } | 606 | } |
605 | arch_initcall(pm_dbg_init); | 607 | arch_initcall(pm_dbg_init); |
606 | 608 | ||
607 | #else | ||
608 | void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {} | ||
609 | #endif | 609 | #endif |
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 0bf345db7147..7a9c2d004511 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -32,12 +32,16 @@ extern struct omap_dm_timer *gptimer_wakeup; | |||
32 | #ifdef CONFIG_PM_DEBUG | 32 | #ifdef CONFIG_PM_DEBUG |
33 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | 33 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); |
34 | extern int omap2_pm_debug; | 34 | extern int omap2_pm_debug; |
35 | #else | ||
36 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | ||
37 | #define omap2_pm_debug 0 | ||
38 | #endif | ||
39 | |||
40 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) | ||
35 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); | 41 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
36 | extern int pm_dbg_regset_save(int reg_set); | 42 | extern int pm_dbg_regset_save(int reg_set); |
37 | extern int pm_dbg_regset_init(int reg_set); | 43 | extern int pm_dbg_regset_init(int reg_set); |
38 | #else | 44 | #else |
39 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | ||
40 | #define omap2_pm_debug 0 | ||
41 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); | 45 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); |
42 | #define pm_dbg_regset_save(reg_set) do {} while (0); | 46 | #define pm_dbg_regset_save(reg_set) do {} while (0); |
43 | #define pm_dbg_regset_init(reg_set) do {} while (0); | 47 | #define pm_dbg_regset_init(reg_set) do {} while (0); |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 81ed252a0f8a..910a7acf542d 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/err.h> | 26 | #include <linux/err.h> |
27 | #include <linux/gpio.h> | 27 | #include <linux/gpio.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/delay.h> | ||
29 | 30 | ||
30 | #include <plat/sram.h> | 31 | #include <plat/sram.h> |
31 | #include <plat/clockdomain.h> | 32 | #include <plat/clockdomain.h> |
@@ -124,9 +125,17 @@ static void omap3_core_save_context(void) | |||
124 | control_padconf_off |= START_PADCONF_SAVE; | 125 | control_padconf_off |= START_PADCONF_SAVE; |
125 | omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); | 126 | omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); |
126 | /* wait for the save to complete */ | 127 | /* wait for the save to complete */ |
127 | while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) | 128 | while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) |
128 | & PADCONF_SAVE_DONE) | 129 | & PADCONF_SAVE_DONE)) |
129 | ; | 130 | udelay(1); |
131 | |||
132 | /* | ||
133 | * Force write last pad into memory, as this can fail in some | ||
134 | * cases according to erratas 1.157, 1.185 | ||
135 | */ | ||
136 | omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), | ||
137 | OMAP343X_CONTROL_MEM_WKUP + 0x2a0); | ||
138 | |||
130 | /* Save the Interrupt controller context */ | 139 | /* Save the Interrupt controller context */ |
131 | omap_intc_save_context(); | 140 | omap_intc_save_context(); |
132 | /* Save the GPMC context */ | 141 | /* Save the GPMC context */ |
@@ -392,6 +401,7 @@ void omap_sram_idle(void) | |||
392 | prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); | 401 | prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN); |
393 | omap3_enable_io_chain(); | 402 | omap3_enable_io_chain(); |
394 | } | 403 | } |
404 | omap3_intc_prepare_idle(); | ||
395 | 405 | ||
396 | /* | 406 | /* |
397 | * On EMU/HS devices ROM code restores a SRDC value | 407 | * On EMU/HS devices ROM code restores a SRDC value |
@@ -438,6 +448,7 @@ void omap_sram_idle(void) | |||
438 | OMAP3430_GR_MOD, | 448 | OMAP3430_GR_MOD, |
439 | OMAP3_PRM_VOLTCTRL_OFFSET); | 449 | OMAP3_PRM_VOLTCTRL_OFFSET); |
440 | } | 450 | } |
451 | omap3_intc_resume_idle(); | ||
441 | 452 | ||
442 | /* PER */ | 453 | /* PER */ |
443 | if (per_next_state < PWRDM_POWER_ON) { | 454 | if (per_next_state < PWRDM_POWER_ON) { |
@@ -578,6 +589,8 @@ static int omap3_pm_suspend(void) | |||
578 | } | 589 | } |
579 | 590 | ||
580 | omap_uart_prepare_suspend(); | 591 | omap_uart_prepare_suspend(); |
592 | omap3_intc_suspend(); | ||
593 | |||
581 | omap_sram_idle(); | 594 | omap_sram_idle(); |
582 | 595 | ||
583 | restore: | 596 | restore: |
@@ -835,6 +848,8 @@ static void __init prcm_setup_regs(void) | |||
835 | CM_AUTOIDLE); | 848 | CM_AUTOIDLE); |
836 | } | 849 | } |
837 | 850 | ||
851 | omap_ctrl_writel(OMAP3430_AUTOIDLE, OMAP2_CONTROL_SYSCONFIG); | ||
852 | |||
838 | /* | 853 | /* |
839 | * Set all plls to autoidle. This is needed until autoidle is | 854 | * Set all plls to autoidle. This is needed until autoidle is |
840 | * enabled by clockfw | 855 | * enabled by clockfw |
@@ -875,15 +890,23 @@ static void __init prcm_setup_regs(void) | |||
875 | prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, | 890 | prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, |
876 | OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); | 891 | OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); |
877 | 892 | ||
893 | /* Enable PM_WKEN to support DSS LPR */ | ||
894 | prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS, | ||
895 | OMAP3430_DSS_MOD, PM_WKEN); | ||
896 | |||
878 | /* Enable wakeups in PER */ | 897 | /* Enable wakeups in PER */ |
879 | prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | | 898 | prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | |
880 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | | 899 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | |
881 | OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3, | 900 | OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3 | |
901 | OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 | | ||
902 | OMAP3430_EN_MCBSP4, | ||
882 | OMAP3430_PER_MOD, PM_WKEN); | 903 | OMAP3430_PER_MOD, PM_WKEN); |
883 | /* and allow them to wake up MPU */ | 904 | /* and allow them to wake up MPU */ |
884 | prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | | 905 | prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | |
885 | OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | | 906 | OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | |
886 | OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3, | 907 | OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3 | |
908 | OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 | | ||
909 | OMAP3430_EN_MCBSP4, | ||
887 | OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); | 910 | OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); |
888 | 911 | ||
889 | /* Don't attach IVA interrupts */ | 912 | /* Don't attach IVA interrupts */ |
@@ -904,24 +927,6 @@ static void __init prcm_setup_regs(void) | |||
904 | /* Clear any pending PRCM interrupts */ | 927 | /* Clear any pending PRCM interrupts */ |
905 | prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | 928 | prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); |
906 | 929 | ||
907 | /* Don't attach IVA interrupts */ | ||
908 | prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); | ||
909 | prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); | ||
910 | prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3); | ||
911 | prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL); | ||
912 | |||
913 | /* Clear any pending 'reset' flags */ | ||
914 | prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST); | ||
915 | prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST); | ||
916 | prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, RM_RSTST); | ||
917 | prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, RM_RSTST); | ||
918 | prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, RM_RSTST); | ||
919 | prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, RM_RSTST); | ||
920 | prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, RM_RSTST); | ||
921 | |||
922 | /* Clear any pending PRCM interrupts */ | ||
923 | prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
924 | |||
925 | omap3_iva_idle(); | 930 | omap3_iva_idle(); |
926 | omap3_d2d_idle(); | 931 | omap3_d2d_idle(); |
927 | } | 932 | } |
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 3ea8177ffb25..cf466ea1dffc 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -44,7 +44,6 @@ struct omap3_prcm_regs { | |||
44 | u32 iva2_cm_clksel2; | 44 | u32 iva2_cm_clksel2; |
45 | u32 cm_sysconfig; | 45 | u32 cm_sysconfig; |
46 | u32 sgx_cm_clksel; | 46 | u32 sgx_cm_clksel; |
47 | u32 wkup_cm_clksel; | ||
48 | u32 dss_cm_clksel; | 47 | u32 dss_cm_clksel; |
49 | u32 cam_cm_clksel; | 48 | u32 cam_cm_clksel; |
50 | u32 per_cm_clksel; | 49 | u32 per_cm_clksel; |
@@ -53,7 +52,6 @@ struct omap3_prcm_regs { | |||
53 | u32 pll_cm_autoidle2; | 52 | u32 pll_cm_autoidle2; |
54 | u32 pll_cm_clksel4; | 53 | u32 pll_cm_clksel4; |
55 | u32 pll_cm_clksel5; | 54 | u32 pll_cm_clksel5; |
56 | u32 pll_cm_clken; | ||
57 | u32 pll_cm_clken2; | 55 | u32 pll_cm_clken2; |
58 | u32 cm_polctrl; | 56 | u32 cm_polctrl; |
59 | u32 iva2_cm_fclken; | 57 | u32 iva2_cm_fclken; |
@@ -77,7 +75,6 @@ struct omap3_prcm_regs { | |||
77 | u32 usbhost_cm_iclken; | 75 | u32 usbhost_cm_iclken; |
78 | u32 iva2_cm_autiidle2; | 76 | u32 iva2_cm_autiidle2; |
79 | u32 mpu_cm_autoidle2; | 77 | u32 mpu_cm_autoidle2; |
80 | u32 pll_cm_autoidle; | ||
81 | u32 iva2_cm_clkstctrl; | 78 | u32 iva2_cm_clkstctrl; |
82 | u32 mpu_cm_clkstctrl; | 79 | u32 mpu_cm_clkstctrl; |
83 | u32 core_cm_clkstctrl; | 80 | u32 core_cm_clkstctrl; |
@@ -274,7 +271,6 @@ void omap3_prcm_save_context(void) | |||
274 | prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); | 271 | prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); |
275 | prcm_context.sgx_cm_clksel = | 272 | prcm_context.sgx_cm_clksel = |
276 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); | 273 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); |
277 | prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | ||
278 | prcm_context.dss_cm_clksel = | 274 | prcm_context.dss_cm_clksel = |
279 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); | 275 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); |
280 | prcm_context.cam_cm_clksel = | 276 | prcm_context.cam_cm_clksel = |
@@ -291,8 +287,6 @@ void omap3_prcm_save_context(void) | |||
291 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); | 287 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); |
292 | prcm_context.pll_cm_clksel5 = | 288 | prcm_context.pll_cm_clksel5 = |
293 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); | 289 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); |
294 | prcm_context.pll_cm_clken = | ||
295 | cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
296 | prcm_context.pll_cm_clken2 = | 290 | prcm_context.pll_cm_clken2 = |
297 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); | 291 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); |
298 | prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); | 292 | prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); |
@@ -338,8 +332,6 @@ void omap3_prcm_save_context(void) | |||
338 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); | 332 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); |
339 | prcm_context.mpu_cm_autoidle2 = | 333 | prcm_context.mpu_cm_autoidle2 = |
340 | cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); | 334 | cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); |
341 | prcm_context.pll_cm_autoidle = | ||
342 | cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); | ||
343 | prcm_context.iva2_cm_clkstctrl = | 335 | prcm_context.iva2_cm_clkstctrl = |
344 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); | 336 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); |
345 | prcm_context.mpu_cm_clkstctrl = | 337 | prcm_context.mpu_cm_clkstctrl = |
@@ -431,7 +423,6 @@ void omap3_prcm_restore_context(void) | |||
431 | __raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); | 423 | __raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); |
432 | cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, | 424 | cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, |
433 | CM_CLKSEL); | 425 | CM_CLKSEL); |
434 | cm_write_mod_reg(prcm_context.wkup_cm_clksel, WKUP_MOD, CM_CLKSEL); | ||
435 | cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD, | 426 | cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD, |
436 | CM_CLKSEL); | 427 | CM_CLKSEL); |
437 | cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD, | 428 | cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD, |
@@ -448,7 +439,6 @@ void omap3_prcm_restore_context(void) | |||
448 | OMAP3430ES2_CM_CLKSEL4); | 439 | OMAP3430ES2_CM_CLKSEL4); |
449 | cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD, | 440 | cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD, |
450 | OMAP3430ES2_CM_CLKSEL5); | 441 | OMAP3430ES2_CM_CLKSEL5); |
451 | cm_write_mod_reg(prcm_context.pll_cm_clken, PLL_MOD, CM_CLKEN); | ||
452 | cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD, | 442 | cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD, |
453 | OMAP3430ES2_CM_CLKEN2); | 443 | OMAP3430ES2_CM_CLKEN2); |
454 | __raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL); | 444 | __raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL); |
@@ -487,7 +477,6 @@ void omap3_prcm_restore_context(void) | |||
487 | cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD, | 477 | cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD, |
488 | CM_AUTOIDLE2); | 478 | CM_AUTOIDLE2); |
489 | cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); | 479 | cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); |
490 | cm_write_mod_reg(prcm_context.pll_cm_autoidle, PLL_MOD, CM_AUTOIDLE); | ||
491 | cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, | 480 | cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, |
492 | CM_CLKSTCTRL); | 481 | CM_CLKSTCTRL); |
493 | cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); | 482 | cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); |
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index ea050ce188a7..40f006285163 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h | |||
@@ -24,6 +24,8 @@ | |||
24 | OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) | 24 | OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) |
25 | #define OMAP44XX_PRM_REGADDR(module, reg) \ | 25 | #define OMAP44XX_PRM_REGADDR(module, reg) \ |
26 | OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (module) + (reg)) | 26 | OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (module) + (reg)) |
27 | #define OMAP44XX_CHIRONSS_REGADDR(module, reg) \ | ||
28 | OMAP2_L4_IO_ADDRESS(OMAP4430_CHIRONSS_BASE + (module) + (reg)) | ||
27 | 29 | ||
28 | #include "prm44xx.h" | 30 | #include "prm44xx.h" |
29 | 31 | ||
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 89be97f0589d..adb2558bb121 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h | |||
@@ -386,26 +386,26 @@ | |||
386 | 386 | ||
387 | 387 | ||
388 | /* CHIRON_PRCM.CHIRONSS_OCP_SOCKET_PRCM register offsets */ | 388 | /* CHIRON_PRCM.CHIRONSS_OCP_SOCKET_PRCM register offsets */ |
389 | #define OMAP4430_REVISION_PRCM OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000) | 389 | #define OMAP4430_REVISION_PRCM OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000) |
390 | 390 | ||
391 | /* CHIRON_PRCM.CHIRONSS_DEVICE_PRM register offsets */ | 391 | /* CHIRON_PRCM.CHIRONSS_DEVICE_PRM register offsets */ |
392 | #define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000) | 392 | #define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000) |
393 | 393 | ||
394 | /* CHIRON_PRCM.CHIRONSS_CPU0 register offsets */ | 394 | /* CHIRON_PRCM.CHIRONSS_CPU0 register offsets */ |
395 | #define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000) | 395 | #define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000) |
396 | #define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004) | 396 | #define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004) |
397 | #define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008) | 397 | #define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008) |
398 | #define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c) | 398 | #define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c) |
399 | #define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010) | 399 | #define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010) |
400 | #define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014) | 400 | #define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014) |
401 | #define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018) | 401 | #define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018) |
402 | 402 | ||
403 | /* CHIRON_PRCM.CHIRONSS_CPU1 register offsets */ | 403 | /* CHIRON_PRCM.CHIRONSS_CPU1 register offsets */ |
404 | #define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000) | 404 | #define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000) |
405 | #define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004) | 405 | #define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004) |
406 | #define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008) | 406 | #define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008) |
407 | #define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c) | 407 | #define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c) |
408 | #define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010) | 408 | #define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010) |
409 | #define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014) | 409 | #define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014) |
410 | #define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018) | 410 | #define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018) |
411 | #endif | 411 | #endif |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 19805a7de06c..e10a02df6e1d 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -36,7 +36,13 @@ | |||
36 | #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 | 36 | #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52 |
37 | #define UART_OMAP_WER 0x17 /* Wake-up enable register */ | 37 | #define UART_OMAP_WER 0x17 /* Wake-up enable register */ |
38 | 38 | ||
39 | #define DEFAULT_TIMEOUT (5 * HZ) | 39 | /* |
40 | * NOTE: By default the serial timeout is disabled as it causes lost characters | ||
41 | * over the serial ports. This means that the UART clocks will stay on until | ||
42 | * disabled via sysfs. This also causes that any deeper omap sleep states are | ||
43 | * blocked. | ||
44 | */ | ||
45 | #define DEFAULT_TIMEOUT 0 | ||
40 | 46 | ||
41 | struct omap_uart_state { | 47 | struct omap_uart_state { |
42 | int num; | 48 | int num; |
@@ -125,6 +131,13 @@ static struct plat_serial8250_port serial_platform_data3[] = { | |||
125 | } | 131 | } |
126 | }; | 132 | }; |
127 | #endif | 133 | #endif |
134 | static inline unsigned int __serial_read_reg(struct uart_port *up, | ||
135 | int offset) | ||
136 | { | ||
137 | offset <<= up->regshift; | ||
138 | return (unsigned int)__raw_readb(up->membase + offset); | ||
139 | } | ||
140 | |||
128 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, | 141 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, |
129 | int offset) | 142 | int offset) |
130 | { | 143 | { |
@@ -415,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) | |||
415 | uart->timeout = DEFAULT_TIMEOUT; | 428 | uart->timeout = DEFAULT_TIMEOUT; |
416 | setup_timer(&uart->timer, omap_uart_idle_timer, | 429 | setup_timer(&uart->timer, omap_uart_idle_timer, |
417 | (unsigned long) uart); | 430 | (unsigned long) uart); |
418 | mod_timer(&uart->timer, jiffies + uart->timeout); | 431 | if (uart->timeout) |
432 | mod_timer(&uart->timer, jiffies + uart->timeout); | ||
419 | omap_uart_smart_idle_enable(uart, 0); | 433 | omap_uart_smart_idle_enable(uart, 0); |
420 | 434 | ||
421 | if (cpu_is_omap34xx()) { | 435 | if (cpu_is_omap34xx()) { |
@@ -583,11 +597,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset) | |||
583 | { | 597 | { |
584 | if (UART_RX == offset) { | 598 | if (UART_RX == offset) { |
585 | unsigned int lsr; | 599 | unsigned int lsr; |
586 | lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR); | 600 | lsr = __serial_read_reg(up, UART_LSR); |
587 | if (!(lsr & UART_LSR_DR)) | 601 | if (!(lsr & UART_LSR_DR)) |
588 | return -EPERM; | 602 | return -EPERM; |
589 | } | 603 | } |
590 | return serial_read_reg(omap_uart[up->line].p, offset); | 604 | |
605 | return __serial_read_reg(up, offset); | ||
591 | } | 606 | } |
592 | 607 | ||
593 | void __init omap_serial_early_init(void) | 608 | void __init omap_serial_early_init(void) |
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 15268f8b61de..c3626ea48143 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S | |||
@@ -245,7 +245,8 @@ restore: | |||
245 | mov r1, #0 @ set task id for ROM code in r1 | 245 | mov r1, #0 @ set task id for ROM code in r1 |
246 | mov r2, #4 @ set some flags in r2, r6 | 246 | mov r2, #4 @ set some flags in r2, r6 |
247 | mov r6, #0xff | 247 | mov r6, #0xff |
248 | adr r3, write_aux_control_params @ r3 points to parameters | 248 | ldr r4, scratchpad_base |
249 | ldr r3, [r4, #0xBC] @ r3 points to parameters | ||
249 | mcr p15, 0, r0, c7, c10, 4 @ data write barrier | 250 | mcr p15, 0, r0, c7, c10, 4 @ data write barrier |
250 | mcr p15, 0, r0, c7, c10, 5 @ data memory barrier | 251 | mcr p15, 0, r0, c7, c10, 5 @ data memory barrier |
251 | .word 0xE1600071 @ call SMI monitor (smi #1) | 252 | .word 0xE1600071 @ call SMI monitor (smi #1) |
@@ -253,14 +254,14 @@ restore: | |||
253 | b logic_l1_restore | 254 | b logic_l1_restore |
254 | l2_inv_api_params: | 255 | l2_inv_api_params: |
255 | .word 0x1, 0x00 | 256 | .word 0x1, 0x00 |
256 | write_aux_control_params: | ||
257 | .word 0x1, 0x72 | ||
258 | l2_inv_gp: | 257 | l2_inv_gp: |
259 | /* Execute smi to invalidate L2 cache */ | 258 | /* Execute smi to invalidate L2 cache */ |
260 | mov r12, #0x1 @ set up to invalide L2 | 259 | mov r12, #0x1 @ set up to invalide L2 |
261 | smi: .word 0xE1600070 @ Call SMI monitor (smieq) | 260 | smi: .word 0xE1600070 @ Call SMI monitor (smieq) |
262 | /* Write to Aux control register to set some bits */ | 261 | /* Write to Aux control register to set some bits */ |
263 | mov r0, #0x72 | 262 | ldr r4, scratchpad_base |
263 | ldr r3, [r4,#0xBC] | ||
264 | ldr r0, [r3,#4] | ||
264 | mov r12, #0x3 | 265 | mov r12, #0x3 |
265 | .word 0xE1600070 @ Call SMI monitor (smieq) | 266 | .word 0xE1600070 @ Call SMI monitor (smieq) |
266 | logic_l1_restore: | 267 | logic_l1_restore: |
@@ -271,6 +272,7 @@ logic_l1_restore: | |||
271 | 272 | ||
272 | ldr r4, scratchpad_base | 273 | ldr r4, scratchpad_base |
273 | ldr r3, [r4,#0xBC] | 274 | ldr r3, [r4,#0xBC] |
275 | adds r3, r3, #8 | ||
274 | ldmia r3!, {r4-r6} | 276 | ldmia r3!, {r4-r6} |
275 | mov sp, r4 | 277 | mov sp, r4 |
276 | msr spsr_cxsf, r5 | 278 | msr spsr_cxsf, r5 |
@@ -387,6 +389,9 @@ usettbr0: | |||
387 | save_context_wfi: | 389 | save_context_wfi: |
388 | /*b save_context_wfi*/ @ enable to debug save code | 390 | /*b save_context_wfi*/ @ enable to debug save code |
389 | mov r8, r0 /* Store SDRAM address in r8 */ | 391 | mov r8, r0 /* Store SDRAM address in r8 */ |
392 | mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register | ||
393 | mov r4, #0x1 @ Number of parameters for restore call | ||
394 | stmia r8!, {r4-r5} | ||
390 | /* Check what that target sleep state is:stored in r1*/ | 395 | /* Check what that target sleep state is:stored in r1*/ |
391 | /* 1 - Only L1 and logic lost */ | 396 | /* 1 - Only L1 and logic lost */ |
392 | /* 2 - Only L2 lost */ | 397 | /* 2 - Only L2 lost */ |
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index b31ca4cef365..8f159db4d08a 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/delay.h> | ||
15 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
16 | #include <linux/pci.h> | 17 | #include <linux/pci.h> |
17 | #include <linux/irq.h> | 18 | #include <linux/irq.h> |
@@ -32,6 +33,7 @@ | |||
32 | 33 | ||
33 | #define DNS323_GPIO_LED_RIGHT_AMBER 1 | 34 | #define DNS323_GPIO_LED_RIGHT_AMBER 1 |
34 | #define DNS323_GPIO_LED_LEFT_AMBER 2 | 35 | #define DNS323_GPIO_LED_LEFT_AMBER 2 |
36 | #define DNS323_GPIO_SYSTEM_UP 3 | ||
35 | #define DNS323_GPIO_LED_POWER 5 | 37 | #define DNS323_GPIO_LED_POWER 5 |
36 | #define DNS323_GPIO_OVERTEMP 6 | 38 | #define DNS323_GPIO_OVERTEMP 6 |
37 | #define DNS323_GPIO_RTC 7 | 39 | #define DNS323_GPIO_RTC 7 |
@@ -239,7 +241,7 @@ static struct gpio_led dns323_leds[] = { | |||
239 | { | 241 | { |
240 | .name = "power:blue", | 242 | .name = "power:blue", |
241 | .gpio = DNS323_GPIO_LED_POWER, | 243 | .gpio = DNS323_GPIO_LED_POWER, |
242 | .active_low = 1, | 244 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
243 | }, { | 245 | }, { |
244 | .name = "right:amber", | 246 | .name = "right:amber", |
245 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, | 247 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, |
@@ -334,7 +336,7 @@ static struct orion5x_mpp_mode dns323_mv88f5182_mpp_modes[] __initdata = { | |||
334 | { 0, MPP_UNUSED }, | 336 | { 0, MPP_UNUSED }, |
335 | { 1, MPP_GPIO }, /* right amber LED (sata ch0) */ | 337 | { 1, MPP_GPIO }, /* right amber LED (sata ch0) */ |
336 | { 2, MPP_GPIO }, /* left amber LED (sata ch1) */ | 338 | { 2, MPP_GPIO }, /* left amber LED (sata ch1) */ |
337 | { 3, MPP_UNUSED }, | 339 | { 3, MPP_GPIO }, /* system up flag */ |
338 | { 4, MPP_GPIO }, /* power button LED */ | 340 | { 4, MPP_GPIO }, /* power button LED */ |
339 | { 5, MPP_GPIO }, /* power button LED */ | 341 | { 5, MPP_GPIO }, /* power button LED */ |
340 | { 6, MPP_GPIO }, /* GMT G751-2f overtemp */ | 342 | { 6, MPP_GPIO }, /* GMT G751-2f overtemp */ |
@@ -372,13 +374,23 @@ static struct i2c_board_info __initdata dns323_i2c_devices[] = { | |||
372 | }, | 374 | }, |
373 | }; | 375 | }; |
374 | 376 | ||
375 | /* DNS-323 specific power off method */ | 377 | /* DNS-323 rev. A specific power off method */ |
376 | static void dns323_power_off(void) | 378 | static void dns323a_power_off(void) |
377 | { | 379 | { |
378 | pr_info("%s: triggering power-off...\n", __func__); | 380 | pr_info("%s: triggering power-off...\n", __func__); |
379 | gpio_set_value(DNS323_GPIO_POWER_OFF, 1); | 381 | gpio_set_value(DNS323_GPIO_POWER_OFF, 1); |
380 | } | 382 | } |
381 | 383 | ||
384 | /* DNS-323 rev B specific power off method */ | ||
385 | static void dns323b_power_off(void) | ||
386 | { | ||
387 | pr_info("%s: triggering power-off...\n", __func__); | ||
388 | /* Pin has to be changed to 1 and back to 0 to do actual power off. */ | ||
389 | gpio_set_value(DNS323_GPIO_POWER_OFF, 1); | ||
390 | mdelay(100); | ||
391 | gpio_set_value(DNS323_GPIO_POWER_OFF, 0); | ||
392 | } | ||
393 | |||
382 | static void __init dns323_init(void) | 394 | static void __init dns323_init(void) |
383 | { | 395 | { |
384 | /* Setup basic Orion functions. Need to be called early. */ | 396 | /* Setup basic Orion functions. Need to be called early. */ |
@@ -424,11 +436,20 @@ static void __init dns323_init(void) | |||
424 | if (dns323_dev_id() == MV88F5182_DEV_ID) | 436 | if (dns323_dev_id() == MV88F5182_DEV_ID) |
425 | orion5x_sata_init(&dns323_sata_data); | 437 | orion5x_sata_init(&dns323_sata_data); |
426 | 438 | ||
427 | /* register dns323 specific power-off method */ | 439 | /* The 5182 has flag to indicate the system is up. Without this flag |
440 | * set, power LED will flash and cannot be controlled via leds-gpio. | ||
441 | */ | ||
442 | if (dns323_dev_id() == MV88F5182_DEV_ID) | ||
443 | gpio_set_value(DNS323_GPIO_SYSTEM_UP, 1); | ||
444 | |||
445 | /* Register dns323 specific power-off method */ | ||
428 | if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 || | 446 | if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 || |
429 | gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0) | 447 | gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0) |
430 | pr_err("DNS323: failed to setup power-off GPIO\n"); | 448 | pr_err("DNS323: failed to setup power-off GPIO\n"); |
431 | pm_power_off = dns323_power_off; | 449 | if (dns323_dev_id() == MV88F5182_DEV_ID) |
450 | pm_power_off = dns323b_power_off; | ||
451 | else | ||
452 | pm_power_off = dns323a_power_off; | ||
432 | } | 453 | } |
433 | 454 | ||
434 | /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */ | 455 | /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */ |
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index 1b4ad9d5e2eb..cb0feca193d4 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c | |||
@@ -15,6 +15,9 @@ | |||
15 | #include <linux/mtd/physmap.h> | 15 | #include <linux/mtd/physmap.h> |
16 | #include <linux/mv643xx_eth.h> | 16 | #include <linux/mv643xx_eth.h> |
17 | #include <linux/ethtool.h> | 17 | #include <linux/ethtool.h> |
18 | #include <linux/leds.h> | ||
19 | #include <linux/gpio_keys.h> | ||
20 | #include <linux/input.h> | ||
18 | #include <net/dsa.h> | 21 | #include <net/dsa.h> |
19 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
20 | #include <asm/gpio.h> | 23 | #include <asm/gpio.h> |
@@ -24,6 +27,80 @@ | |||
24 | #include "common.h" | 27 | #include "common.h" |
25 | #include "mpp.h" | 28 | #include "mpp.h" |
26 | 29 | ||
30 | /* | ||
31 | * LEDs attached to GPIO | ||
32 | */ | ||
33 | static struct gpio_led wrt350n_v2_led_pins[] = { | ||
34 | { | ||
35 | .name = "wrt350nv2:green:power", | ||
36 | .gpio = 0, | ||
37 | .active_low = 1, | ||
38 | }, { | ||
39 | .name = "wrt350nv2:green:security", | ||
40 | .gpio = 1, | ||
41 | .active_low = 1, | ||
42 | }, { | ||
43 | .name = "wrt350nv2:orange:power", | ||
44 | .gpio = 5, | ||
45 | .active_low = 1, | ||
46 | }, { | ||
47 | .name = "wrt350nv2:green:usb", | ||
48 | .gpio = 6, | ||
49 | .active_low = 1, | ||
50 | }, { | ||
51 | .name = "wrt350nv2:green:wireless", | ||
52 | .gpio = 7, | ||
53 | .active_low = 1, | ||
54 | }, | ||
55 | }; | ||
56 | |||
57 | static struct gpio_led_platform_data wrt350n_v2_led_data = { | ||
58 | .leds = wrt350n_v2_led_pins, | ||
59 | .num_leds = ARRAY_SIZE(wrt350n_v2_led_pins), | ||
60 | }; | ||
61 | |||
62 | static struct platform_device wrt350n_v2_leds = { | ||
63 | .name = "leds-gpio", | ||
64 | .id = -1, | ||
65 | .dev = { | ||
66 | .platform_data = &wrt350n_v2_led_data, | ||
67 | }, | ||
68 | }; | ||
69 | |||
70 | /* | ||
71 | * Buttons attached to GPIO | ||
72 | */ | ||
73 | static struct gpio_keys_button wrt350n_v2_buttons[] = { | ||
74 | { | ||
75 | .code = KEY_RESTART, | ||
76 | .gpio = 3, | ||
77 | .desc = "Reset Button", | ||
78 | .active_low = 1, | ||
79 | }, { | ||
80 | .code = KEY_WLAN, | ||
81 | .gpio = 2, | ||
82 | .desc = "WPS Button", | ||
83 | .active_low = 1, | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static struct gpio_keys_platform_data wrt350n_v2_button_data = { | ||
88 | .buttons = wrt350n_v2_buttons, | ||
89 | .nbuttons = ARRAY_SIZE(wrt350n_v2_buttons), | ||
90 | }; | ||
91 | |||
92 | static struct platform_device wrt350n_v2_button_device = { | ||
93 | .name = "gpio-keys", | ||
94 | .id = -1, | ||
95 | .num_resources = 0, | ||
96 | .dev = { | ||
97 | .platform_data = &wrt350n_v2_button_data, | ||
98 | }, | ||
99 | }; | ||
100 | |||
101 | /* | ||
102 | * General setup | ||
103 | */ | ||
27 | static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = { | 104 | static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = { |
28 | { 0, MPP_GPIO }, /* Power LED green (0=on) */ | 105 | { 0, MPP_GPIO }, /* Power LED green (0=on) */ |
29 | { 1, MPP_GPIO }, /* Security LED (0=on) */ | 106 | { 1, MPP_GPIO }, /* Security LED (0=on) */ |
@@ -140,6 +217,8 @@ static void __init wrt350n_v2_init(void) | |||
140 | orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE, | 217 | orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE, |
141 | WRT350N_V2_NOR_BOOT_SIZE); | 218 | WRT350N_V2_NOR_BOOT_SIZE); |
142 | platform_device_register(&wrt350n_v2_nor_flash); | 219 | platform_device_register(&wrt350n_v2_nor_flash); |
220 | platform_device_register(&wrt350n_v2_leds); | ||
221 | platform_device_register(&wrt350n_v2_button_device); | ||
143 | } | 222 | } |
144 | 223 | ||
145 | static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 224 | static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 8a0837ea0294..dee92182749b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -37,6 +37,8 @@ config MACH_ZYLONITE320 | |||
37 | config MACH_LITTLETON | 37 | config MACH_LITTLETON |
38 | bool "PXA3xx Form Factor Platform (aka Littleton)" | 38 | bool "PXA3xx Form Factor Platform (aka Littleton)" |
39 | select PXA3xx | 39 | select PXA3xx |
40 | select CPU_PXA300 | ||
41 | select CPU_PXA310 | ||
40 | select PXA_SSP | 42 | select PXA_SSP |
41 | 43 | ||
42 | config MACH_TAVOREVB | 44 | config MACH_TAVOREVB |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 74446cf8ae69..da3156d8690b 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -457,6 +457,7 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = { | |||
457 | * USB Device Controller | 457 | * USB Device Controller |
458 | */ | 458 | */ |
459 | static struct pxa2xx_udc_mach_info udc_info __initdata = { | 459 | static struct pxa2xx_udc_mach_info udc_info __initdata = { |
460 | .gpio_vbus = -1, | ||
460 | /* no connect GPIO; corgi can't tell connection status */ | 461 | /* no connect GPIO; corgi can't tell connection status */ |
461 | .gpio_pullup = CORGI_GPIO_USB_PULLUP, | 462 | .gpio_pullup = CORGI_GPIO_USB_PULLUP, |
462 | }; | 463 | }; |
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 50f1297bf5ac..e741bf1bfb2d 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h | |||
@@ -250,20 +250,17 @@ | |||
250 | 250 | ||
251 | #define cpu_is_pxa930() \ | 251 | #define cpu_is_pxa930() \ |
252 | ({ \ | 252 | ({ \ |
253 | unsigned int id = read_cpuid(CPUID_ID); \ | 253 | __cpu_is_pxa930(read_cpuid_id()); \ |
254 | __cpu_is_pxa930(id); \ | ||
255 | }) | 254 | }) |
256 | 255 | ||
257 | #define cpu_is_pxa935() \ | 256 | #define cpu_is_pxa935() \ |
258 | ({ \ | 257 | ({ \ |
259 | unsigned int id = read_cpuid(CPUID_ID); \ | 258 | __cpu_is_pxa935(read_cpuid_id()); \ |
260 | __cpu_is_pxa935(id); \ | ||
261 | }) | 259 | }) |
262 | 260 | ||
263 | #define cpu_is_pxa950() \ | 261 | #define cpu_is_pxa950() \ |
264 | ({ \ | 262 | ({ \ |
265 | unsigned int id = read_cpuid(CPUID_ID); \ | 263 | __cpu_is_pxa950(read_cpuid_id()); \ |
266 | __cpu_is_pxa950(id); \ | ||
267 | }) | 264 | }) |
268 | 265 | ||
269 | 266 | ||
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h index b13dc0269a6d..9c787855cf24 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h | |||
@@ -169,7 +169,6 @@ | |||
169 | #define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH) | 169 | #define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH) |
170 | #define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH) | 170 | #define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH) |
171 | #define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH) | 171 | #define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH) |
172 | #define GPIO89_nACRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH) | ||
173 | 172 | ||
174 | /* USB */ | 173 | /* USB */ |
175 | #define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1) | 174 | #define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1) |
@@ -186,6 +185,9 @@ | |||
186 | #define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW) | 185 | #define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW) |
187 | #define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1) | 186 | #define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1) |
188 | #define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW) | 187 | #define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW) |
189 | #endif | 188 | |
189 | /* AC97 */ | ||
190 | #define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH) | ||
191 | #endif /* CONFIG_CPU_PXA26x */ | ||
190 | 192 | ||
191 | #endif /* __ASM_ARCH_MFP_PXA25X_H */ | 193 | #endif /* __ASM_ARCH_MFP_PXA25X_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h index bf6785adccf4..9edf645368d6 100644 --- a/arch/arm/mach-pxa/include/mach/zylonite.h +++ b/arch/arm/mach-pxa/include/mach/zylonite.h | |||
@@ -8,13 +8,6 @@ | |||
8 | /* the following variables are processor specific and initialized | 8 | /* the following variables are processor specific and initialized |
9 | * by the corresponding zylonite_pxa3xx_init() | 9 | * by the corresponding zylonite_pxa3xx_init() |
10 | */ | 10 | */ |
11 | struct platform_mmc_slot { | ||
12 | int gpio_cd; | ||
13 | int gpio_wp; | ||
14 | }; | ||
15 | |||
16 | extern struct platform_mmc_slot zylonite_mmc_slot[]; | ||
17 | |||
18 | extern int gpio_eth_irq; | 11 | extern int gpio_eth_irq; |
19 | extern int gpio_debug_led1; | 12 | extern int gpio_debug_led1; |
20 | extern int gpio_debug_led2; | 13 | extern int gpio_debug_led2; |
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 6112af431fa4..1beb40f692fc 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -164,8 +164,11 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) | |||
164 | saved_icmr[i] = _ICMR(irq); | 164 | saved_icmr[i] = _ICMR(irq); |
165 | _ICMR(irq) = 0; | 165 | _ICMR(irq) = 0; |
166 | } | 166 | } |
167 | for (i = 0; i < pxa_internal_irq_nr; i++) | 167 | |
168 | saved_ipr[i] = IPR(i); | 168 | if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { |
169 | for (i = 0; i < pxa_internal_irq_nr; i++) | ||
170 | saved_ipr[i] = IPR(i); | ||
171 | } | ||
169 | 172 | ||
170 | return 0; | 173 | return 0; |
171 | } | 174 | } |
@@ -174,12 +177,15 @@ static int pxa_irq_resume(struct sys_device *dev) | |||
174 | { | 177 | { |
175 | int i, irq = PXA_IRQ(0); | 178 | int i, irq = PXA_IRQ(0); |
176 | 179 | ||
180 | if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { | ||
181 | for (i = 0; i < pxa_internal_irq_nr; i++) | ||
182 | IPR(i) = saved_ipr[i]; | ||
183 | } | ||
184 | |||
177 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { | 185 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { |
178 | _ICMR(irq) = saved_icmr[i]; | 186 | _ICMR(irq) = saved_icmr[i]; |
179 | _ICLR(irq) = 0; | 187 | _ICLR(irq) = 0; |
180 | } | 188 | } |
181 | for (i = 0; i < pxa_internal_irq_nr; i++) | ||
182 | IPR(i) = saved_ipr[i]; | ||
183 | 189 | ||
184 | ICCR = 1; | 190 | ICCR = 1; |
185 | return 0; | 191 | return 0; |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index f28c1715b910..fa527b258d61 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -110,6 +110,12 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = { | |||
110 | GPIO7_MMC1_CLK, | 110 | GPIO7_MMC1_CLK, |
111 | GPIO8_MMC1_CMD, | 111 | GPIO8_MMC1_CMD, |
112 | GPIO15_GPIO, /* card detect */ | 112 | GPIO15_GPIO, /* card detect */ |
113 | |||
114 | /* UART3 */ | ||
115 | GPIO107_UART3_CTS, | ||
116 | GPIO108_UART3_RTS, | ||
117 | GPIO109_UART3_TXD, | ||
118 | GPIO110_UART3_RXD, | ||
113 | }; | 119 | }; |
114 | 120 | ||
115 | static struct resource smc91x_resources[] = { | 121 | static struct resource smc91x_resources[] = { |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 8a38d604dc77..189f330719a2 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -381,7 +381,7 @@ err: | |||
381 | return ret; | 381 | return ret; |
382 | } | 382 | } |
383 | 383 | ||
384 | static int magician_backlight_notify(int brightness) | 384 | static int magician_backlight_notify(struct device *dev, int brightness) |
385 | { | 385 | { |
386 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER, brightness); | 386 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER, brightness); |
387 | if (brightness >= 200) { | 387 | if (brightness >= 200) { |
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 59140217890a..e100af78b166 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c | |||
@@ -270,7 +270,7 @@ err: | |||
270 | return ret; | 270 | return ret; |
271 | } | 271 | } |
272 | 272 | ||
273 | static int palmld_backlight_notify(int brightness) | 273 | static int palmld_backlight_notify(struct device *dev, int brightness) |
274 | { | 274 | { |
275 | gpio_set_value(GPIO_NR_PALMLD_BL_POWER, brightness); | 275 | gpio_set_value(GPIO_NR_PALMLD_BL_POWER, brightness); |
276 | gpio_set_value(GPIO_NR_PALMLD_LCD_POWER, brightness); | 276 | gpio_set_value(GPIO_NR_PALMLD_LCD_POWER, brightness); |
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 7f89ca20f13a..8fe3ec27568f 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c | |||
@@ -209,7 +209,7 @@ err: | |||
209 | return ret; | 209 | return ret; |
210 | } | 210 | } |
211 | 211 | ||
212 | static int palmt5_backlight_notify(int brightness) | 212 | static int palmt5_backlight_notify(struct device *dev, int brightness) |
213 | { | 213 | { |
214 | gpio_set_value(GPIO_NR_PALMT5_BL_POWER, brightness); | 214 | gpio_set_value(GPIO_NR_PALMT5_BL_POWER, brightness); |
215 | gpio_set_value(GPIO_NR_PALMT5_LCD_POWER, brightness); | 215 | gpio_set_value(GPIO_NR_PALMT5_LCD_POWER, brightness); |
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 308417592007..b992f07ece21 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c | |||
@@ -185,7 +185,7 @@ err: | |||
185 | return ret; | 185 | return ret; |
186 | } | 186 | } |
187 | 187 | ||
188 | static int palmtc_backlight_notify(int brightness) | 188 | static int palmtc_backlight_notify(struct device *dev, int brightness) |
189 | { | 189 | { |
190 | /* backlight is on when GPIO16 AF0 is high */ | 190 | /* backlight is on when GPIO16 AF0 is high */ |
191 | gpio_set_value(GPIO_NR_PALMTC_BL_POWER, brightness); | 191 | gpio_set_value(GPIO_NR_PALMTC_BL_POWER, brightness); |
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 265d62bae7de..dc728d6ab94e 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c | |||
@@ -181,7 +181,7 @@ err: | |||
181 | return ret; | 181 | return ret; |
182 | } | 182 | } |
183 | 183 | ||
184 | static int palmte2_backlight_notify(int brightness) | 184 | static int palmte2_backlight_notify(struct device *dev, int brightness) |
185 | { | 185 | { |
186 | gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness); | 186 | gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness); |
187 | gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness); | 187 | gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness); |
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 606eb7e8a17e..b433bb496711 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c | |||
@@ -375,7 +375,7 @@ err: | |||
375 | return ret; | 375 | return ret; |
376 | } | 376 | } |
377 | 377 | ||
378 | static int treo_backlight_notify(int brightness) | 378 | static int treo_backlight_notify(struct device *dev, int brightness) |
379 | { | 379 | { |
380 | gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness); | 380 | gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness); |
381 | return TREO_MAX_INTENSITY - brightness; | 381 | return TREO_MAX_INTENSITY - brightness; |
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 7bf18c2f002f..b37a025c0b7b 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
@@ -269,7 +269,7 @@ err: | |||
269 | return ret; | 269 | return ret; |
270 | } | 270 | } |
271 | 271 | ||
272 | static int palmtx_backlight_notify(int brightness) | 272 | static int palmtx_backlight_notify(struct device *dev, int brightness) |
273 | { | 273 | { |
274 | gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness); | 274 | gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness); |
275 | gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness); | 275 | gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness); |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index d787ac7cfdd8..1c5d68a94511 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
@@ -196,7 +196,7 @@ err: | |||
196 | return ret; | 196 | return ret; |
197 | } | 197 | } |
198 | 198 | ||
199 | static int palmz72_backlight_notify(int brightness) | 199 | static int palmz72_backlight_notify(struct device *dev, int brightness) |
200 | { | 200 | { |
201 | gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness); | 201 | gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness); |
202 | gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness); | 202 | gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness); |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index e5eeb3a62d01..c2b938a4d5c9 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -293,7 +293,7 @@ static struct pxamci_platform_data poodle_mci_platform_data = { | |||
293 | .init = poodle_mci_init, | 293 | .init = poodle_mci_init, |
294 | .setpower = poodle_mci_setpower, | 294 | .setpower = poodle_mci_setpower, |
295 | .exit = poodle_mci_exit, | 295 | .exit = poodle_mci_exit, |
296 | .gpio_card_detect = POODLE_IRQ_GPIO_nSD_DETECT, | 296 | .gpio_card_detect = POODLE_GPIO_nSD_DETECT, |
297 | .gpio_card_ro = POODLE_GPIO_nSD_WP, | 297 | .gpio_card_ro = POODLE_GPIO_nSD_WP, |
298 | .gpio_power = -1, | 298 | .gpio_power = -1, |
299 | }; | 299 | }; |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 4b50f144fa48..28352c0b8c34 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -389,13 +389,13 @@ static struct gpio_keys_button spitz_gpio_keys[] = { | |||
389 | .type = EV_SW, | 389 | .type = EV_SW, |
390 | .code = 0, | 390 | .code = 0, |
391 | .gpio = SPITZ_GPIO_SWA, | 391 | .gpio = SPITZ_GPIO_SWA, |
392 | .desc = "Display Down", | 392 | .desc = "Display Down", |
393 | }, | 393 | }, |
394 | { | 394 | { |
395 | .type = EV_SW, | 395 | .type = EV_SW, |
396 | .code = 1, | 396 | .code = 1, |
397 | .gpio = SPITZ_GPIO_SWB, | 397 | .gpio = SPITZ_GPIO_SWB, |
398 | .desc = "Lid Closed", | 398 | .desc = "Lid Closed", |
399 | }, | 399 | }, |
400 | }; | 400 | }; |
401 | 401 | ||
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 5352b4e5a7dd..89f258c9e126 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c | |||
@@ -379,7 +379,7 @@ err_request_bckl: | |||
379 | return ret; | 379 | return ret; |
380 | } | 380 | } |
381 | 381 | ||
382 | static int viper_backlight_notify(int brightness) | 382 | static int viper_backlight_notify(struct device *dev, int brightness) |
383 | { | 383 | { |
384 | gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); | 384 | gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness); |
385 | gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); | 385 | gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness); |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 5b986a8bd9e6..75f2a37f945d 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/i2c.h> | 26 | #include <linux/i2c.h> |
27 | #include <linux/i2c/pca953x.h> | 27 | #include <linux/i2c/pca953x.h> |
28 | #include <linux/apm-emulation.h> | ||
28 | 29 | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
30 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
@@ -626,8 +627,27 @@ static void zeus_power_off(void) | |||
626 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); | 627 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); |
627 | } | 628 | } |
628 | 629 | ||
629 | int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio, | 630 | #ifdef CONFIG_APM_EMULATION |
630 | unsigned ngpio, void *context) | 631 | static void zeus_get_power_status(struct apm_power_info *info) |
632 | { | ||
633 | /* Power supply is always present */ | ||
634 | info->ac_line_status = APM_AC_ONLINE; | ||
635 | info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; | ||
636 | info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT; | ||
637 | } | ||
638 | |||
639 | static inline void zeus_setup_apm(void) | ||
640 | { | ||
641 | apm_get_power_status = zeus_get_power_status; | ||
642 | } | ||
643 | #else | ||
644 | static inline void zeus_setup_apm(void) | ||
645 | { | ||
646 | } | ||
647 | #endif | ||
648 | |||
649 | static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio, | ||
650 | unsigned ngpio, void *context) | ||
631 | { | 651 | { |
632 | int i; | 652 | int i; |
633 | u8 pcb_info = 0; | 653 | u8 pcb_info = 0; |
@@ -726,9 +746,18 @@ static mfp_cfg_t zeus_pin_config[] __initdata = { | |||
726 | GPIO99_GPIO, /* CF RDY */ | 746 | GPIO99_GPIO, /* CF RDY */ |
727 | }; | 747 | }; |
728 | 748 | ||
749 | /* | ||
750 | * DM9k MSCx settings: SRAM, 16 bits | ||
751 | * 17 cycles delay first access | ||
752 | * 5 cycles delay next access | ||
753 | * 13 cycles recovery time | ||
754 | * faster device | ||
755 | */ | ||
756 | #define DM9K_MSC_VALUE 0xe4c9 | ||
757 | |||
729 | static void __init zeus_init(void) | 758 | static void __init zeus_init(void) |
730 | { | 759 | { |
731 | u16 dm9000_msc = 0xe279; | 760 | u16 dm9000_msc = DM9K_MSC_VALUE; |
732 | 761 | ||
733 | system_rev = __raw_readw(ZEUS_CPLD_VERSION); | 762 | system_rev = __raw_readw(ZEUS_CPLD_VERSION); |
734 | pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); | 763 | pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); |
@@ -738,6 +767,7 @@ static void __init zeus_init(void) | |||
738 | MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; | 767 | MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; |
739 | 768 | ||
740 | pm_power_off = zeus_power_off; | 769 | pm_power_off = zeus_power_off; |
770 | zeus_setup_apm(); | ||
741 | 771 | ||
742 | pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config)); | 772 | pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config)); |
743 | 773 | ||
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index b66e9e2d06e7..2b4043c04d0c 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -36,9 +36,6 @@ | |||
36 | #include "devices.h" | 36 | #include "devices.h" |
37 | #include "generic.h" | 37 | #include "generic.h" |
38 | 38 | ||
39 | #define MAX_SLOTS 3 | ||
40 | struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; | ||
41 | |||
42 | int gpio_eth_irq; | 39 | int gpio_eth_irq; |
43 | int gpio_debug_led1; | 40 | int gpio_debug_led1; |
44 | int gpio_debug_led2; | 41 | int gpio_debug_led2; |
@@ -220,84 +217,28 @@ static inline void zylonite_init_lcd(void) {} | |||
220 | #endif | 217 | #endif |
221 | 218 | ||
222 | #if defined(CONFIG_MMC) | 219 | #if defined(CONFIG_MMC) |
223 | static int zylonite_mci_ro(struct device *dev) | ||
224 | { | ||
225 | struct platform_device *pdev = to_platform_device(dev); | ||
226 | |||
227 | return gpio_get_value(zylonite_mmc_slot[pdev->id].gpio_wp); | ||
228 | } | ||
229 | |||
230 | static int zylonite_mci_init(struct device *dev, | ||
231 | irq_handler_t zylonite_detect_int, | ||
232 | void *data) | ||
233 | { | ||
234 | struct platform_device *pdev = to_platform_device(dev); | ||
235 | int err, cd_irq, gpio_cd, gpio_wp; | ||
236 | |||
237 | cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); | ||
238 | gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; | ||
239 | gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; | ||
240 | |||
241 | /* | ||
242 | * setup GPIO for Zylonite MMC controller | ||
243 | */ | ||
244 | err = gpio_request(gpio_cd, "mmc card detect"); | ||
245 | if (err) | ||
246 | goto err_request_cd; | ||
247 | gpio_direction_input(gpio_cd); | ||
248 | |||
249 | err = gpio_request(gpio_wp, "mmc write protect"); | ||
250 | if (err) | ||
251 | goto err_request_wp; | ||
252 | gpio_direction_input(gpio_wp); | ||
253 | |||
254 | err = request_irq(cd_irq, zylonite_detect_int, | ||
255 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
256 | "MMC card detect", data); | ||
257 | if (err) { | ||
258 | printk(KERN_ERR "%s: MMC/SD/SDIO: " | ||
259 | "can't request card detect IRQ\n", __func__); | ||
260 | goto err_request_irq; | ||
261 | } | ||
262 | |||
263 | return 0; | ||
264 | |||
265 | err_request_irq: | ||
266 | gpio_free(gpio_wp); | ||
267 | err_request_wp: | ||
268 | gpio_free(gpio_cd); | ||
269 | err_request_cd: | ||
270 | return err; | ||
271 | } | ||
272 | |||
273 | static void zylonite_mci_exit(struct device *dev, void *data) | ||
274 | { | ||
275 | struct platform_device *pdev = to_platform_device(dev); | ||
276 | int cd_irq, gpio_cd, gpio_wp; | ||
277 | |||
278 | cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); | ||
279 | gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; | ||
280 | gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; | ||
281 | |||
282 | free_irq(cd_irq, data); | ||
283 | gpio_free(gpio_cd); | ||
284 | gpio_free(gpio_wp); | ||
285 | } | ||
286 | |||
287 | static struct pxamci_platform_data zylonite_mci_platform_data = { | 220 | static struct pxamci_platform_data zylonite_mci_platform_data = { |
288 | .detect_delay = 20, | 221 | .detect_delay = 20, |
289 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 222 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
290 | .init = zylonite_mci_init, | 223 | .gpio_card_detect = EXT_GPIO(0), |
291 | .exit = zylonite_mci_exit, | 224 | .gpio_card_ro = EXT_GPIO(2), |
292 | .get_ro = zylonite_mci_ro, | ||
293 | .gpio_card_detect = -1, | ||
294 | .gpio_card_ro = -1, | ||
295 | .gpio_power = -1, | 225 | .gpio_power = -1, |
296 | }; | 226 | }; |
297 | 227 | ||
298 | static struct pxamci_platform_data zylonite_mci2_platform_data = { | 228 | static struct pxamci_platform_data zylonite_mci2_platform_data = { |
299 | .detect_delay = 20, | 229 | .detect_delay = 20, |
300 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 230 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
231 | .gpio_card_detect = EXT_GPIO(1), | ||
232 | .gpio_card_ro = EXT_GPIO(3), | ||
233 | .gpio_power = -1, | ||
234 | }; | ||
235 | |||
236 | static struct pxamci_platform_data zylonite_mci3_platform_data = { | ||
237 | .detect_delay = 20, | ||
238 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
239 | .gpio_card_detect = EXT_GPIO(30), | ||
240 | .gpio_card_ro = EXT_GPIO(31), | ||
241 | .gpio_power = -1, | ||
301 | }; | 242 | }; |
302 | 243 | ||
303 | static void __init zylonite_init_mmc(void) | 244 | static void __init zylonite_init_mmc(void) |
@@ -305,7 +246,7 @@ static void __init zylonite_init_mmc(void) | |||
305 | pxa_set_mci_info(&zylonite_mci_platform_data); | 246 | pxa_set_mci_info(&zylonite_mci_platform_data); |
306 | pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); | 247 | pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); |
307 | if (cpu_is_pxa310()) | 248 | if (cpu_is_pxa310()) |
308 | pxa3xx_set_mci3_info(&zylonite_mci_platform_data); | 249 | pxa3xx_set_mci3_info(&zylonite_mci3_platform_data); |
309 | } | 250 | } |
310 | #else | 251 | #else |
311 | static inline void zylonite_init_mmc(void) {} | 252 | static inline void zylonite_init_mmc(void) {} |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 84095440a878..3aa73b3e33f2 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
@@ -129,8 +129,8 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
129 | GPIO22_I2C_SDA, | 129 | GPIO22_I2C_SDA, |
130 | 130 | ||
131 | /* GPIO */ | 131 | /* GPIO */ |
132 | GPIO18_GPIO, /* GPIO Expander #0 INT_N */ | 132 | GPIO18_GPIO | MFP_PULL_HIGH, /* GPIO Expander #0 INT_N */ |
133 | GPIO19_GPIO, /* GPIO Expander #1 INT_N */ | 133 | GPIO19_GPIO | MFP_PULL_HIGH, /* GPIO Expander #1 INT_N */ |
134 | }; | 134 | }; |
135 | 135 | ||
136 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { | 136 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { |
@@ -258,10 +258,6 @@ void __init zylonite_pxa300_init(void) | |||
258 | /* detect LCD panel */ | 258 | /* detect LCD panel */ |
259 | zylonite_detect_lcd_panel(); | 259 | zylonite_detect_lcd_panel(); |
260 | 260 | ||
261 | /* MMC card detect & write protect for controller 0 */ | ||
262 | zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0); | ||
263 | zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2); | ||
264 | |||
265 | /* WM9713 IRQ */ | 261 | /* WM9713 IRQ */ |
266 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); | 262 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); |
267 | 263 | ||
@@ -276,10 +272,6 @@ void __init zylonite_pxa300_init(void) | |||
276 | if (cpu_is_pxa310()) { | 272 | if (cpu_is_pxa310()) { |
277 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); | 273 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); |
278 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); | 274 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); |
279 | |||
280 | /* MMC card detect & write protect for controller 2 */ | ||
281 | zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30); | ||
282 | zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31); | ||
283 | } | 275 | } |
284 | 276 | ||
285 | /* GPIOs for Debug LEDs */ | 277 | /* GPIOs for Debug LEDs */ |
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 60d08f23f5e4..9942bac4cf7d 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
@@ -209,10 +209,6 @@ void __init zylonite_pxa320_init(void) | |||
209 | gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); | 209 | gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); |
210 | gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); | 210 | gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); |
211 | 211 | ||
212 | /* MMC card detect & write protect for controller 0 */ | ||
213 | zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1); | ||
214 | zylonite_mmc_slot[0].gpio_wp = mfp_to_gpio(MFP_PIN_GPIO5); | ||
215 | |||
216 | /* WM9713 IRQ */ | 212 | /* WM9713 IRQ */ |
217 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15); | 213 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15); |
218 | } | 214 | } |
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h index 34b80b7d40b8..2f5ccb298858 100644 --- a/arch/arm/mach-realview/include/mach/board-pb1176.h +++ b/arch/arm/mach-realview/include/mach/board-pb1176.h | |||
@@ -74,8 +74,8 @@ | |||
74 | #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ | 74 | #define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ |
75 | 75 | ||
76 | /* | 76 | /* |
77 | * Control register SYS_RESETCTL is set to 1 to force a soft reset | 77 | * Control register SYS_RESETCTL Bit 8 is set to 1 to force a soft reset |
78 | */ | 78 | */ |
79 | #define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100 | 79 | #define REALVIEW_PB1176_SYS_SOFT_RESET 0x0100 |
80 | 80 | ||
81 | #endif /* __ASM_ARCH_BOARD_PB1176_H */ | 81 | #endif /* __ASM_ARCH_BOARD_PB1176_H */ |
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h index 4f46bf71e752..86c0c4435a46 100644 --- a/arch/arm/mach-realview/include/mach/platform.h +++ b/arch/arm/mach-realview/include/mach/platform.h | |||
@@ -140,7 +140,7 @@ | |||
140 | * SYS_CLD, SYS_BOOTCS | 140 | * SYS_CLD, SYS_BOOTCS |
141 | */ | 141 | */ |
142 | #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) | 142 | #define REALVIEW_SYS_LOCK_LOCKED (1 << 16) |
143 | #define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */ | 143 | #define REALVIEW_SYS_LOCK_VAL 0xA05F /* Enable write access */ |
144 | 144 | ||
145 | /* | 145 | /* |
146 | * REALVIEW_SYS_FLASH | 146 | * REALVIEW_SYS_FLASH |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 917f8ca3abff..7d857d300558 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -381,6 +381,20 @@ static struct sys_timer realview_eb_timer = { | |||
381 | .init = realview_eb_timer_init, | 381 | .init = realview_eb_timer_init, |
382 | }; | 382 | }; |
383 | 383 | ||
384 | static void realview_eb_reset(char mode) | ||
385 | { | ||
386 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | ||
387 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | ||
388 | |||
389 | /* | ||
390 | * To reset, we hit the on-board reset register | ||
391 | * in the system FPGA | ||
392 | */ | ||
393 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | ||
394 | if (core_tile_eb11mp()) | ||
395 | __raw_writel(0x0008, reset_ctrl); | ||
396 | } | ||
397 | |||
384 | static void __init realview_eb_init(void) | 398 | static void __init realview_eb_init(void) |
385 | { | 399 | { |
386 | int i; | 400 | int i; |
@@ -408,6 +422,7 @@ static void __init realview_eb_init(void) | |||
408 | #ifdef CONFIG_LEDS | 422 | #ifdef CONFIG_LEDS |
409 | leds_event = realview_leds_event; | 423 | leds_event = realview_leds_event; |
410 | #endif | 424 | #endif |
425 | realview_reset = realview_eb_reset; | ||
411 | } | 426 | } |
412 | 427 | ||
413 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") | 428 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 7fb726d5f8b9..44392e51dd50 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -292,12 +292,10 @@ static struct sys_timer realview_pb1176_timer = { | |||
292 | 292 | ||
293 | static void realview_pb1176_reset(char mode) | 293 | static void realview_pb1176_reset(char mode) |
294 | { | 294 | { |
295 | void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + | 295 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
296 | REALVIEW_SYS_RESETCTL_OFFSET; | 296 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
297 | void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + | 297 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
298 | REALVIEW_SYS_LOCK_OFFSET; | 298 | __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); |
299 | __raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl); | ||
300 | __raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl); | ||
301 | } | 299 | } |
302 | 300 | ||
303 | static void realview_pb1176_fixup(struct machine_desc *mdesc, | 301 | static void realview_pb1176_fixup(struct machine_desc *mdesc, |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 9bbbfc05f225..3e02731af959 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -301,17 +301,16 @@ static struct sys_timer realview_pb11mp_timer = { | |||
301 | 301 | ||
302 | static void realview_pb11mp_reset(char mode) | 302 | static void realview_pb11mp_reset(char mode) |
303 | { | 303 | { |
304 | void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + | 304 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
305 | REALVIEW_SYS_RESETCTL_OFFSET; | 305 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
306 | unsigned int val; | ||
307 | 306 | ||
308 | /* | 307 | /* |
309 | * To reset, we hit the on-board reset register | 308 | * To reset, we hit the on-board reset register |
310 | * in the system FPGA | 309 | * in the system FPGA |
311 | */ | 310 | */ |
312 | val = __raw_readl(hdr_ctrl); | 311 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
313 | val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR; | 312 | __raw_writel(0x0000, reset_ctrl); |
314 | __raw_writel(val, hdr_ctrl); | 313 | __raw_writel(0x0004, reset_ctrl); |
315 | } | 314 | } |
316 | 315 | ||
317 | static void __init realview_pb11mp_init(void) | 316 | static void __init realview_pb11mp_init(void) |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index fe861e96c566..fe4e25c4201a 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -272,6 +272,20 @@ static struct sys_timer realview_pba8_timer = { | |||
272 | .init = realview_pba8_timer_init, | 272 | .init = realview_pba8_timer_init, |
273 | }; | 273 | }; |
274 | 274 | ||
275 | static void realview_pba8_reset(char mode) | ||
276 | { | ||
277 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | ||
278 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | ||
279 | |||
280 | /* | ||
281 | * To reset, we hit the on-board reset register | ||
282 | * in the system FPGA | ||
283 | */ | ||
284 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | ||
285 | __raw_writel(0x0000, reset_ctrl); | ||
286 | __raw_writel(0x0004, reset_ctrl); | ||
287 | } | ||
288 | |||
275 | static void __init realview_pba8_init(void) | 289 | static void __init realview_pba8_init(void) |
276 | { | 290 | { |
277 | int i; | 291 | int i; |
@@ -291,6 +305,7 @@ static void __init realview_pba8_init(void) | |||
291 | #ifdef CONFIG_LEDS | 305 | #ifdef CONFIG_LEDS |
292 | leds_event = realview_leds_event; | 306 | leds_event = realview_leds_event; |
293 | #endif | 307 | #endif |
308 | realview_reset = realview_pba8_reset; | ||
294 | } | 309 | } |
295 | 310 | ||
296 | MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") | 311 | MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index ec39488e2b42..d94857eb0690 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -324,6 +324,20 @@ static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags, | |||
324 | #endif | 324 | #endif |
325 | } | 325 | } |
326 | 326 | ||
327 | static void realview_pbx_reset(char mode) | ||
328 | { | ||
329 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | ||
330 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | ||
331 | |||
332 | /* | ||
333 | * To reset, we hit the on-board reset register | ||
334 | * in the system FPGA | ||
335 | */ | ||
336 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | ||
337 | __raw_writel(0x00F0, reset_ctrl); | ||
338 | __raw_writel(0x00F4, reset_ctrl); | ||
339 | } | ||
340 | |||
327 | static void __init realview_pbx_init(void) | 341 | static void __init realview_pbx_init(void) |
328 | { | 342 | { |
329 | int i; | 343 | int i; |
@@ -358,6 +372,7 @@ static void __init realview_pbx_init(void) | |||
358 | #ifdef CONFIG_LEDS | 372 | #ifdef CONFIG_LEDS |
359 | leds_event = realview_leds_event; | 373 | leds_event = realview_leds_event; |
360 | #endif | 374 | #endif |
375 | realview_reset = realview_pbx_reset; | ||
361 | } | 376 | } |
362 | 377 | ||
363 | MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") | 378 | MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") |
diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h b/arch/arm/mach-s3c2410/include/mach/ts.h new file mode 100644 index 000000000000..dc361700d695 --- /dev/null +++ b/arch/arm/mach-s3c2410/include/mach/ts.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* linux/include/asm/arch-s3c2410/ts.h | ||
2 | * | ||
3 | * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #ifndef __ASM_ARM_TS_H | ||
11 | #define __ASM_ARM_TS_H | ||
12 | |||
13 | struct s3c2410_ts_mach_info { | ||
14 | int delay; | ||
15 | int presc; | ||
16 | int oversampling_shift; | ||
17 | }; | ||
18 | |||
19 | extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *); | ||
20 | |||
21 | #endif /* __ASM_ARM_TS_H */ | ||
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 4c79ac8a6c33..97162fdd0590 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -279,6 +279,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = { | |||
279 | .name = "SmartMedia", | 279 | .name = "SmartMedia", |
280 | .nr_chips = 1, | 280 | .nr_chips = 1, |
281 | .nr_map = smartmedia_map, | 281 | .nr_map = smartmedia_map, |
282 | .options = NAND_SCAN_SILENT_NODEV, | ||
282 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | 283 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
283 | .partitions = bast_default_nand_part, | 284 | .partitions = bast_default_nand_part, |
284 | }, | 285 | }, |
@@ -293,6 +294,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = { | |||
293 | .name = "chip1", | 294 | .name = "chip1", |
294 | .nr_chips = 1, | 295 | .nr_chips = 1, |
295 | .nr_map = chip1_map, | 296 | .nr_map = chip1_map, |
297 | .options = NAND_SCAN_SILENT_NODEV, | ||
296 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | 298 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
297 | .partitions = bast_default_nand_part, | 299 | .partitions = bast_default_nand_part, |
298 | }, | 300 | }, |
@@ -300,6 +302,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = { | |||
300 | .name = "chip2", | 302 | .name = "chip2", |
301 | .nr_chips = 1, | 303 | .nr_chips = 1, |
302 | .nr_map = chip2_map, | 304 | .nr_map = chip2_map, |
305 | .options = NAND_SCAN_SILENT_NODEV, | ||
303 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | 306 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
304 | .partitions = bast_default_nand_part, | 307 | .partitions = bast_default_nand_part, |
305 | } | 308 | } |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 49053254c98d..1e34abe1a19e 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <mach/h1940.h> | 46 | #include <mach/h1940.h> |
47 | #include <mach/h1940-latch.h> | 47 | #include <mach/h1940-latch.h> |
48 | #include <mach/fb.h> | 48 | #include <mach/fb.h> |
49 | #include <mach/ts.h> | ||
49 | #include <plat/udc.h> | 50 | #include <plat/udc.h> |
50 | #include <plat/iic.h> | 51 | #include <plat/iic.h> |
51 | 52 | ||
@@ -140,6 +141,11 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |||
140 | .vbus_pin_inverted = 1, | 141 | .vbus_pin_inverted = 1, |
141 | }; | 142 | }; |
142 | 143 | ||
144 | static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { | ||
145 | .delay = 10000, | ||
146 | .presc = 49, | ||
147 | .oversampling_shift = 2, | ||
148 | }; | ||
143 | 149 | ||
144 | /** | 150 | /** |
145 | * Set lcd on or off | 151 | * Set lcd on or off |
@@ -265,6 +271,7 @@ static struct platform_device h1940_lcd_powerdev = { | |||
265 | }; | 271 | }; |
266 | 272 | ||
267 | static struct platform_device *h1940_devices[] __initdata = { | 273 | static struct platform_device *h1940_devices[] __initdata = { |
274 | &s3c_device_ts, | ||
268 | &s3c_device_usb, | 275 | &s3c_device_usb, |
269 | &s3c_device_lcd, | 276 | &s3c_device_lcd, |
270 | &s3c_device_wdt, | 277 | &s3c_device_wdt, |
@@ -305,6 +312,7 @@ static void __init h1940_init(void) | |||
305 | 312 | ||
306 | s3c24xx_fb_set_platdata(&h1940_fb_info); | 313 | s3c24xx_fb_set_platdata(&h1940_fb_info); |
307 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); | 314 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
315 | s3c24xx_ts_set_platdata(&h1940_ts_cfg); | ||
308 | s3c_i2c0_set_platdata(NULL); | 316 | s3c_i2c0_set_platdata(NULL); |
309 | 317 | ||
310 | s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; | 318 | s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index 547d4fc99131..2068e9096a43 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
@@ -288,7 +288,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = { | |||
288 | 288 | ||
289 | /* DM9000AEP 10/100 ethernet controller */ | 289 | /* DM9000AEP 10/100 ethernet controller */ |
290 | 290 | ||
291 | static struct resource mini2440_dm9k_resource[] __initdata = { | 291 | static struct resource mini2440_dm9k_resource[] = { |
292 | [0] = { | 292 | [0] = { |
293 | .start = MACH_MINI2440_DM9K_BASE, | 293 | .start = MACH_MINI2440_DM9K_BASE, |
294 | .end = MACH_MINI2440_DM9K_BASE + 3, | 294 | .end = MACH_MINI2440_DM9K_BASE + 3, |
@@ -310,11 +310,11 @@ static struct resource mini2440_dm9k_resource[] __initdata = { | |||
310 | * The DM9000 has no eeprom, and it's MAC address is set by | 310 | * The DM9000 has no eeprom, and it's MAC address is set by |
311 | * the bootloader before starting the kernel. | 311 | * the bootloader before starting the kernel. |
312 | */ | 312 | */ |
313 | static struct dm9000_plat_data mini2440_dm9k_pdata __initdata = { | 313 | static struct dm9000_plat_data mini2440_dm9k_pdata = { |
314 | .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), | 314 | .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), |
315 | }; | 315 | }; |
316 | 316 | ||
317 | static struct platform_device mini2440_device_eth __initdata = { | 317 | static struct platform_device mini2440_device_eth = { |
318 | .name = "dm9000", | 318 | .name = "dm9000", |
319 | .id = -1, | 319 | .id = -1, |
320 | .num_resources = ARRAY_SIZE(mini2440_dm9k_resource), | 320 | .num_resources = ARRAY_SIZE(mini2440_dm9k_resource), |
@@ -341,7 +341,7 @@ static struct platform_device mini2440_device_eth __initdata = { | |||
341 | * | | +----+ +----+ | 341 | * | | +----+ +----+ |
342 | * ..... | 342 | * ..... |
343 | */ | 343 | */ |
344 | static struct gpio_keys_button mini2440_buttons[] __initdata = { | 344 | static struct gpio_keys_button mini2440_buttons[] = { |
345 | { | 345 | { |
346 | .gpio = S3C2410_GPG(0), /* K1 */ | 346 | .gpio = S3C2410_GPG(0), /* K1 */ |
347 | .code = KEY_F1, | 347 | .code = KEY_F1, |
@@ -384,12 +384,12 @@ static struct gpio_keys_button mini2440_buttons[] __initdata = { | |||
384 | #endif | 384 | #endif |
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct gpio_keys_platform_data mini2440_button_data __initdata = { | 387 | static struct gpio_keys_platform_data mini2440_button_data = { |
388 | .buttons = mini2440_buttons, | 388 | .buttons = mini2440_buttons, |
389 | .nbuttons = ARRAY_SIZE(mini2440_buttons), | 389 | .nbuttons = ARRAY_SIZE(mini2440_buttons), |
390 | }; | 390 | }; |
391 | 391 | ||
392 | static struct platform_device mini2440_button_device __initdata = { | 392 | static struct platform_device mini2440_button_device = { |
393 | .name = "gpio-keys", | 393 | .name = "gpio-keys", |
394 | .id = -1, | 394 | .id = -1, |
395 | .dev = { | 395 | .dev = { |
@@ -399,41 +399,41 @@ static struct platform_device mini2440_button_device __initdata = { | |||
399 | 399 | ||
400 | /* LEDS */ | 400 | /* LEDS */ |
401 | 401 | ||
402 | static struct s3c24xx_led_platdata mini2440_led1_pdata __initdata = { | 402 | static struct s3c24xx_led_platdata mini2440_led1_pdata = { |
403 | .name = "led1", | 403 | .name = "led1", |
404 | .gpio = S3C2410_GPB(5), | 404 | .gpio = S3C2410_GPB(5), |
405 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, | 405 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, |
406 | .def_trigger = "heartbeat", | 406 | .def_trigger = "heartbeat", |
407 | }; | 407 | }; |
408 | 408 | ||
409 | static struct s3c24xx_led_platdata mini2440_led2_pdata __initdata = { | 409 | static struct s3c24xx_led_platdata mini2440_led2_pdata = { |
410 | .name = "led2", | 410 | .name = "led2", |
411 | .gpio = S3C2410_GPB(6), | 411 | .gpio = S3C2410_GPB(6), |
412 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, | 412 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, |
413 | .def_trigger = "nand-disk", | 413 | .def_trigger = "nand-disk", |
414 | }; | 414 | }; |
415 | 415 | ||
416 | static struct s3c24xx_led_platdata mini2440_led3_pdata __initdata = { | 416 | static struct s3c24xx_led_platdata mini2440_led3_pdata = { |
417 | .name = "led3", | 417 | .name = "led3", |
418 | .gpio = S3C2410_GPB(7), | 418 | .gpio = S3C2410_GPB(7), |
419 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, | 419 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, |
420 | .def_trigger = "mmc0", | 420 | .def_trigger = "mmc0", |
421 | }; | 421 | }; |
422 | 422 | ||
423 | static struct s3c24xx_led_platdata mini2440_led4_pdata __initdata = { | 423 | static struct s3c24xx_led_platdata mini2440_led4_pdata = { |
424 | .name = "led4", | 424 | .name = "led4", |
425 | .gpio = S3C2410_GPB(8), | 425 | .gpio = S3C2410_GPB(8), |
426 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, | 426 | .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, |
427 | .def_trigger = "", | 427 | .def_trigger = "", |
428 | }; | 428 | }; |
429 | 429 | ||
430 | static struct s3c24xx_led_platdata mini2440_led_backlight_pdata __initdata = { | 430 | static struct s3c24xx_led_platdata mini2440_led_backlight_pdata = { |
431 | .name = "backlight", | 431 | .name = "backlight", |
432 | .gpio = S3C2410_GPG(4), | 432 | .gpio = S3C2410_GPG(4), |
433 | .def_trigger = "backlight", | 433 | .def_trigger = "backlight", |
434 | }; | 434 | }; |
435 | 435 | ||
436 | static struct platform_device mini2440_led1 __initdata = { | 436 | static struct platform_device mini2440_led1 = { |
437 | .name = "s3c24xx_led", | 437 | .name = "s3c24xx_led", |
438 | .id = 1, | 438 | .id = 1, |
439 | .dev = { | 439 | .dev = { |
@@ -441,7 +441,7 @@ static struct platform_device mini2440_led1 __initdata = { | |||
441 | }, | 441 | }, |
442 | }; | 442 | }; |
443 | 443 | ||
444 | static struct platform_device mini2440_led2 __initdata = { | 444 | static struct platform_device mini2440_led2 = { |
445 | .name = "s3c24xx_led", | 445 | .name = "s3c24xx_led", |
446 | .id = 2, | 446 | .id = 2, |
447 | .dev = { | 447 | .dev = { |
@@ -449,7 +449,7 @@ static struct platform_device mini2440_led2 __initdata = { | |||
449 | }, | 449 | }, |
450 | }; | 450 | }; |
451 | 451 | ||
452 | static struct platform_device mini2440_led3 __initdata = { | 452 | static struct platform_device mini2440_led3 = { |
453 | .name = "s3c24xx_led", | 453 | .name = "s3c24xx_led", |
454 | .id = 3, | 454 | .id = 3, |
455 | .dev = { | 455 | .dev = { |
@@ -457,7 +457,7 @@ static struct platform_device mini2440_led3 __initdata = { | |||
457 | }, | 457 | }, |
458 | }; | 458 | }; |
459 | 459 | ||
460 | static struct platform_device mini2440_led4 __initdata = { | 460 | static struct platform_device mini2440_led4 = { |
461 | .name = "s3c24xx_led", | 461 | .name = "s3c24xx_led", |
462 | .id = 4, | 462 | .id = 4, |
463 | .dev = { | 463 | .dev = { |
@@ -465,7 +465,7 @@ static struct platform_device mini2440_led4 __initdata = { | |||
465 | }, | 465 | }, |
466 | }; | 466 | }; |
467 | 467 | ||
468 | static struct platform_device mini2440_led_backlight __initdata = { | 468 | static struct platform_device mini2440_led_backlight = { |
469 | .name = "s3c24xx_led", | 469 | .name = "s3c24xx_led", |
470 | .id = 5, | 470 | .id = 5, |
471 | .dev = { | 471 | .dev = { |
@@ -475,14 +475,14 @@ static struct platform_device mini2440_led_backlight __initdata = { | |||
475 | 475 | ||
476 | /* AUDIO */ | 476 | /* AUDIO */ |
477 | 477 | ||
478 | static struct s3c24xx_uda134x_platform_data mini2440_audio_pins __initdata = { | 478 | static struct s3c24xx_uda134x_platform_data mini2440_audio_pins = { |
479 | .l3_clk = S3C2410_GPB(4), | 479 | .l3_clk = S3C2410_GPB(4), |
480 | .l3_mode = S3C2410_GPB(2), | 480 | .l3_mode = S3C2410_GPB(2), |
481 | .l3_data = S3C2410_GPB(3), | 481 | .l3_data = S3C2410_GPB(3), |
482 | .model = UDA134X_UDA1341 | 482 | .model = UDA134X_UDA1341 |
483 | }; | 483 | }; |
484 | 484 | ||
485 | static struct platform_device mini2440_audio __initdata = { | 485 | static struct platform_device mini2440_audio = { |
486 | .name = "s3c24xx_uda134x", | 486 | .name = "s3c24xx_uda134x", |
487 | .id = 0, | 487 | .id = 0, |
488 | .dev = { | 488 | .dev = { |
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 015dfb2a80da..f35371db33f5 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
@@ -208,6 +208,7 @@ static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { | |||
208 | .name = "External", | 208 | .name = "External", |
209 | .nr_chips = 1, | 209 | .nr_chips = 1, |
210 | .nr_map = external_map, | 210 | .nr_map = external_map, |
211 | .options = NAND_SCAN_SILENT_NODEV, | ||
211 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 212 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
212 | .partitions = osiris_default_nand_part, | 213 | .partitions = osiris_default_nand_part, |
213 | }, | 214 | }, |
@@ -222,6 +223,7 @@ static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { | |||
222 | .name = "chip1", | 223 | .name = "chip1", |
223 | .nr_chips = 1, | 224 | .nr_chips = 1, |
224 | .nr_map = chip1_map, | 225 | .nr_map = chip1_map, |
226 | .options = NAND_SCAN_SILENT_NODEV, | ||
225 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 227 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
226 | .partitions = osiris_default_nand_part, | 228 | .partitions = osiris_default_nand_part, |
227 | }, | 229 | }, |
diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c6410/mach-hmt.c index cdd4b5378552..7619456f2ae8 100644 --- a/arch/arm/mach-s3c6410/mach-hmt.c +++ b/arch/arm/mach-s3c6410/mach-hmt.c | |||
@@ -82,7 +82,7 @@ static int hmt_bl_init(struct device *dev) | |||
82 | return ret; | 82 | return ret; |
83 | } | 83 | } |
84 | 84 | ||
85 | static int hmt_bl_notify(int brightness) | 85 | static int hmt_bl_notify(struct device *dev, int brightness) |
86 | { | 86 | { |
87 | /* | 87 | /* |
88 | * translate from CIELUV/CIELAB L*->brightness, E.G. from | 88 | * translate from CIELUV/CIELAB L*->brightness, E.G. from |
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c index 480d297c1de2..8969fe73b83f 100644 --- a/arch/arm/mach-s3c6410/mach-smdk6410.c +++ b/arch/arm/mach-s3c6410/mach-smdk6410.c | |||
@@ -211,6 +211,7 @@ static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = { | |||
211 | .supply_name = "B_PWR_5V", | 211 | .supply_name = "B_PWR_5V", |
212 | .microvolts = 5000000, | 212 | .microvolts = 5000000, |
213 | .init_data = &smdk6410_b_pwr_5v_data, | 213 | .init_data = &smdk6410_b_pwr_5v_data, |
214 | .gpio = -EINVAL, | ||
214 | }; | 215 | }; |
215 | 216 | ||
216 | static struct platform_device smdk6410_b_pwr_5v = { | 217 | static struct platform_device smdk6410_b_pwr_5v = { |
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h index 940640066857..ce228bdc66dd 100644 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ b/arch/arm/mach-w90x900/include/mach/system.h | |||
@@ -15,7 +15,15 @@ | |||
15 | * | 15 | * |
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <linux/io.h> | ||
18 | #include <asm/proc-fns.h> | 19 | #include <asm/proc-fns.h> |
20 | #include <mach/map.h> | ||
21 | #include <mach/regs-timer.h> | ||
22 | |||
23 | #define WTCR (TMR_BA + 0x1C) | ||
24 | #define WTCLK (1 << 10) | ||
25 | #define WTE (1 << 7) | ||
26 | #define WTRE (1 << 1) | ||
19 | 27 | ||
20 | static void arch_idle(void) | 28 | static void arch_idle(void) |
21 | { | 29 | { |
@@ -23,6 +31,11 @@ static void arch_idle(void) | |||
23 | 31 | ||
24 | static void arch_reset(char mode, const char *cmd) | 32 | static void arch_reset(char mode, const char *cmd) |
25 | { | 33 | { |
26 | cpu_reset(0); | 34 | if (mode == 's') { |
35 | /* Jump into ROM at address 0 */ | ||
36 | cpu_reset(0); | ||
37 | } else { | ||
38 | __raw_writel(WTE | WTRE | WTCLK, WTCR); | ||
39 | } | ||
27 | } | 40 | } |
28 | 41 | ||
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c index 4128af870b41..b80f769bc135 100644 --- a/arch/arm/mach-w90x900/time.c +++ b/arch/arm/mach-w90x900/time.c | |||
@@ -42,7 +42,10 @@ | |||
42 | #define TICKS_PER_SEC 100 | 42 | #define TICKS_PER_SEC 100 |
43 | #define PRESCALE 0x63 /* Divider = prescale + 1 */ | 43 | #define PRESCALE 0x63 /* Divider = prescale + 1 */ |
44 | 44 | ||
45 | unsigned int timer0_load; | 45 | #define TDR_SHIFT 24 |
46 | #define TDR_MASK ((1 << TDR_SHIFT) - 1) | ||
47 | |||
48 | static unsigned int timer0_load; | ||
46 | 49 | ||
47 | static void nuc900_clockevent_setmode(enum clock_event_mode mode, | 50 | static void nuc900_clockevent_setmode(enum clock_event_mode mode, |
48 | struct clock_event_device *clk) | 51 | struct clock_event_device *clk) |
@@ -88,7 +91,7 @@ static int nuc900_clockevent_setnextevent(unsigned long evt, | |||
88 | static struct clock_event_device nuc900_clockevent_device = { | 91 | static struct clock_event_device nuc900_clockevent_device = { |
89 | .name = "nuc900-timer0", | 92 | .name = "nuc900-timer0", |
90 | .shift = 32, | 93 | .shift = 32, |
91 | .features = CLOCK_EVT_MODE_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 94 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
92 | .set_mode = nuc900_clockevent_setmode, | 95 | .set_mode = nuc900_clockevent_setmode, |
93 | .set_next_event = nuc900_clockevent_setnextevent, | 96 | .set_next_event = nuc900_clockevent_setnextevent, |
94 | .rating = 300, | 97 | .rating = 300, |
@@ -112,8 +115,23 @@ static struct irqaction nuc900_timer0_irq = { | |||
112 | .handler = nuc900_timer0_interrupt, | 115 | .handler = nuc900_timer0_interrupt, |
113 | }; | 116 | }; |
114 | 117 | ||
115 | static void __init nuc900_clockevents_init(unsigned int rate) | 118 | static void __init nuc900_clockevents_init(void) |
116 | { | 119 | { |
120 | unsigned int rate; | ||
121 | struct clk *clk = clk_get(NULL, "timer0"); | ||
122 | |||
123 | BUG_ON(IS_ERR(clk)); | ||
124 | |||
125 | __raw_writel(0x00, REG_TCSR0); | ||
126 | |||
127 | clk_enable(clk); | ||
128 | rate = clk_get_rate(clk) / (PRESCALE + 1); | ||
129 | |||
130 | timer0_load = (rate / TICKS_PER_SEC); | ||
131 | |||
132 | __raw_writel(RESETINT, REG_TISR); | ||
133 | setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); | ||
134 | |||
117 | nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC, | 135 | nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC, |
118 | nuc900_clockevent_device.shift); | 136 | nuc900_clockevent_device.shift); |
119 | nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff, | 137 | nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff, |
@@ -127,26 +145,35 @@ static void __init nuc900_clockevents_init(unsigned int rate) | |||
127 | 145 | ||
128 | static cycle_t nuc900_get_cycles(struct clocksource *cs) | 146 | static cycle_t nuc900_get_cycles(struct clocksource *cs) |
129 | { | 147 | { |
130 | return ~__raw_readl(REG_TDR1); | 148 | return (~__raw_readl(REG_TDR1)) & TDR_MASK; |
131 | } | 149 | } |
132 | 150 | ||
133 | static struct clocksource clocksource_nuc900 = { | 151 | static struct clocksource clocksource_nuc900 = { |
134 | .name = "nuc900-timer1", | 152 | .name = "nuc900-timer1", |
135 | .rating = 200, | 153 | .rating = 200, |
136 | .read = nuc900_get_cycles, | 154 | .read = nuc900_get_cycles, |
137 | .mask = CLOCKSOURCE_MASK(32), | 155 | .mask = CLOCKSOURCE_MASK(TDR_SHIFT), |
138 | .shift = 20, | 156 | .shift = 10, |
139 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 157 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
140 | }; | 158 | }; |
141 | 159 | ||
142 | static void __init nuc900_clocksource_init(unsigned int rate) | 160 | static void __init nuc900_clocksource_init(void) |
143 | { | 161 | { |
144 | unsigned int val; | 162 | unsigned int val; |
163 | unsigned int rate; | ||
164 | struct clk *clk = clk_get(NULL, "timer1"); | ||
165 | |||
166 | BUG_ON(IS_ERR(clk)); | ||
167 | |||
168 | __raw_writel(0x00, REG_TCSR1); | ||
169 | |||
170 | clk_enable(clk); | ||
171 | rate = clk_get_rate(clk) / (PRESCALE + 1); | ||
145 | 172 | ||
146 | __raw_writel(0xffffffff, REG_TICR1); | 173 | __raw_writel(0xffffffff, REG_TICR1); |
147 | 174 | ||
148 | val = __raw_readl(REG_TCSR1); | 175 | val = __raw_readl(REG_TCSR1); |
149 | val |= (COUNTEN | PERIOD); | 176 | val |= (COUNTEN | PERIOD | PRESCALE); |
150 | __raw_writel(val, REG_TCSR1); | 177 | __raw_writel(val, REG_TCSR1); |
151 | 178 | ||
152 | clocksource_nuc900.mult = | 179 | clocksource_nuc900.mult = |
@@ -156,25 +183,8 @@ static void __init nuc900_clocksource_init(unsigned int rate) | |||
156 | 183 | ||
157 | static void __init nuc900_timer_init(void) | 184 | static void __init nuc900_timer_init(void) |
158 | { | 185 | { |
159 | struct clk *ck_ext = clk_get(NULL, "ext"); | 186 | nuc900_clocksource_init(); |
160 | unsigned int rate; | 187 | nuc900_clockevents_init(); |
161 | |||
162 | BUG_ON(IS_ERR(ck_ext)); | ||
163 | |||
164 | rate = clk_get_rate(ck_ext); | ||
165 | clk_put(ck_ext); | ||
166 | rate = rate / (PRESCALE + 0x01); | ||
167 | |||
168 | /* set a known state */ | ||
169 | __raw_writel(0x00, REG_TCSR0); | ||
170 | __raw_writel(0x00, REG_TCSR1); | ||
171 | __raw_writel(RESETINT, REG_TISR); | ||
172 | timer0_load = (rate / TICKS_PER_SEC); | ||
173 | |||
174 | setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); | ||
175 | |||
176 | nuc900_clocksource_init(rate); | ||
177 | nuc900_clockevents_init(rate); | ||
178 | } | 188 | } |
179 | 189 | ||
180 | struct sys_timer nuc900_timer = { | 190 | struct sys_timer nuc900_timer = { |
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 827e238e5d4a..e8d34a80851c 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile | |||
@@ -27,6 +27,9 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o | |||
27 | obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o | 27 | obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o |
28 | obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o | 28 | obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o |
29 | 29 | ||
30 | AFLAGS_abort-ev6.o :=-Wa,-march=armv6k | ||
31 | AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a | ||
32 | |||
30 | obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o | 33 | obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o |
31 | obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o | 34 | obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o |
32 | obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o | 35 | obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o |
@@ -39,6 +42,9 @@ obj-$(CONFIG_CPU_CACHE_V6) += cache-v6.o | |||
39 | obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o | 42 | obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o |
40 | obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o | 43 | obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o |
41 | 44 | ||
45 | AFLAGS_cache-v6.o :=-Wa,-march=armv6 | ||
46 | AFLAGS_cache-v7.o :=-Wa,-march=armv7-a | ||
47 | |||
42 | obj-$(CONFIG_CPU_COPY_V3) += copypage-v3.o | 48 | obj-$(CONFIG_CPU_COPY_V3) += copypage-v3.o |
43 | obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o | 49 | obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o |
44 | obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o | 50 | obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o |
@@ -58,6 +64,9 @@ obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o | |||
58 | obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o | 64 | obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o |
59 | obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o | 65 | obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o |
60 | 66 | ||
67 | AFLAGS_tlb-v6.o :=-Wa,-march=armv6 | ||
68 | AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a | ||
69 | |||
61 | obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o | 70 | obj-$(CONFIG_CPU_ARM610) += proc-arm6_7.o |
62 | obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o | 71 | obj-$(CONFIG_CPU_ARM710) += proc-arm6_7.o |
63 | obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o | 72 | obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o |
@@ -84,6 +93,9 @@ obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o | |||
84 | obj-$(CONFIG_CPU_V6) += proc-v6.o | 93 | obj-$(CONFIG_CPU_V6) += proc-v6.o |
85 | obj-$(CONFIG_CPU_V7) += proc-v7.o | 94 | obj-$(CONFIG_CPU_V7) += proc-v7.o |
86 | 95 | ||
96 | AFLAGS_proc-v6.o :=-Wa,-march=armv6 | ||
97 | AFLAGS_proc-v7.o :=-Wa,-march=armv7-a | ||
98 | |||
87 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o | 99 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o |
88 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o | 100 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o |
89 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o | 101 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o |
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index 5d180cb0bd94..c3154928bccd 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c | |||
@@ -221,15 +221,14 @@ static int __init xsc3_l2_init(void) | |||
221 | if (!cpu_is_xsc3() || !xsc3_l2_present()) | 221 | if (!cpu_is_xsc3() || !xsc3_l2_present()) |
222 | return 0; | 222 | return 0; |
223 | 223 | ||
224 | if (!(get_cr() & CR_L2)) { | 224 | if (get_cr() & CR_L2) { |
225 | pr_info("XScale3 L2 cache enabled.\n"); | 225 | pr_info("XScale3 L2 cache enabled.\n"); |
226 | adjust_cr(CR_L2, CR_L2); | ||
227 | xsc3_l2_inv_all(); | 226 | xsc3_l2_inv_all(); |
228 | } | ||
229 | 227 | ||
230 | outer_cache.inv_range = xsc3_l2_inv_range; | 228 | outer_cache.inv_range = xsc3_l2_inv_range; |
231 | outer_cache.clean_range = xsc3_l2_clean_range; | 229 | outer_cache.clean_range = xsc3_l2_clean_range; |
232 | outer_cache.flush_range = xsc3_l2_flush_range; | 230 | outer_cache.flush_range = xsc3_l2_flush_range; |
231 | } | ||
233 | 232 | ||
234 | return 0; | 233 | return 0; |
235 | } | 234 | } |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 52c40d155672..a04ffbbbe253 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -616,7 +616,7 @@ void __init mem_init(void) | |||
616 | "%dK data, %dK init, %luK highmem)\n", | 616 | "%dK data, %dK init, %luK highmem)\n", |
617 | nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10, | 617 | nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10, |
618 | datasize >> 10, initsize >> 10, | 618 | datasize >> 10, initsize >> 10, |
619 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | 619 | totalhigh_pages << (PAGE_SHIFT-10)); |
620 | 620 | ||
621 | if (PAGE_SIZE >= 16384 && num_physpages <= 128) { | 621 | if (PAGE_SIZE >= 16384 && num_physpages <= 128) { |
622 | extern int sysctl_overcommit_memory; | 622 | extern int sysctl_overcommit_memory; |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 1708da82da96..761ffede6a23 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -1067,4 +1067,6 @@ void setup_mm_for_reboot(char mode) | |||
1067 | pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))); | 1067 | pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1))); |
1068 | flush_pmd_entry(pmd); | 1068 | flush_pmd_entry(pmd); |
1069 | } | 1069 | } |
1070 | |||
1071 | local_flush_tlb_all(); | ||
1070 | } | 1072 | } |
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index 3f9cd3d8f6d5..795dc615f43b 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S | |||
@@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area) | |||
41 | ENTRY(cpu_arm7_data_abort) | 41 | ENTRY(cpu_arm7_data_abort) |
42 | mrc p15, 0, r1, c5, c0, 0 @ get FSR | 42 | mrc p15, 0, r1, c5, c0, 0 @ get FSR |
43 | mrc p15, 0, r0, c6, c0, 0 @ get FAR | 43 | mrc p15, 0, r0, c6, c0, 0 @ get FAR |
44 | ldr r8, [r0] @ read arm instruction | 44 | ldr r8, [r2] @ read arm instruction |
45 | tst r8, #1 << 20 @ L = 0 -> write? | 45 | tst r8, #1 << 20 @ L = 0 -> write? |
46 | orreq r1, r1, #1 << 11 @ yes. | 46 | orreq r1, r1, #1 << 11 @ yes. |
47 | and r7, r8, #15 << 24 | 47 | and r7, r8, #15 << 24 |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 395cc90c6613..7a5337ed7d68 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -59,8 +59,6 @@ ENTRY(cpu_v6_proc_fin) | |||
59 | * to what would be the reset vector. | 59 | * to what would be the reset vector. |
60 | * | 60 | * |
61 | * - loc - location to jump to for soft reset | 61 | * - loc - location to jump to for soft reset |
62 | * | ||
63 | * It is assumed that: | ||
64 | */ | 62 | */ |
65 | .align 5 | 63 | .align 5 |
66 | ENTRY(cpu_v6_reset) | 64 | ENTRY(cpu_v6_reset) |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 3a285218fd15..7aaf88a3b7aa 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -45,7 +45,14 @@ ENTRY(cpu_v7_proc_init) | |||
45 | ENDPROC(cpu_v7_proc_init) | 45 | ENDPROC(cpu_v7_proc_init) |
46 | 46 | ||
47 | ENTRY(cpu_v7_proc_fin) | 47 | ENTRY(cpu_v7_proc_fin) |
48 | mov pc, lr | 48 | stmfd sp!, {lr} |
49 | cpsid if @ disable interrupts | ||
50 | bl v7_flush_kern_cache_all | ||
51 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register | ||
52 | bic r0, r0, #0x1000 @ ...i............ | ||
53 | bic r0, r0, #0x0006 @ .............ca. | ||
54 | mcr p15, 0, r0, c1, c0, 0 @ disable caches | ||
55 | ldmfd sp!, {pc} | ||
49 | ENDPROC(cpu_v7_proc_fin) | 56 | ENDPROC(cpu_v7_proc_fin) |
50 | 57 | ||
51 | /* | 58 | /* |
@@ -56,8 +63,6 @@ ENDPROC(cpu_v7_proc_fin) | |||
56 | * to what would be the reset vector. | 63 | * to what would be the reset vector. |
57 | * | 64 | * |
58 | * - loc - location to jump to for soft reset | 65 | * - loc - location to jump to for soft reset |
59 | * | ||
60 | * It is assumed that: | ||
61 | */ | 66 | */ |
62 | .align 5 | 67 | .align 5 |
63 | ENTRY(cpu_v7_reset) | 68 | ENTRY(cpu_v7_reset) |
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 96456f548798..8e4f6dca8997 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -407,6 +407,13 @@ __xsc3_setup: | |||
407 | 407 | ||
408 | adr r5, xsc3_crval | 408 | adr r5, xsc3_crval |
409 | ldmia r5, {r5, r6} | 409 | ldmia r5, {r5, r6} |
410 | |||
411 | #ifdef CONFIG_CACHE_XSC3L2 | ||
412 | mrc p15, 1, r0, c0, c0, 1 @ get L2 present information | ||
413 | ands r0, r0, #0xf8 | ||
414 | orrne r6, r6, #(1 << 26) @ enable L2 if present | ||
415 | #endif | ||
416 | |||
410 | mrc p15, 0, r0, c1, c0, 0 @ get control register | 417 | mrc p15, 0, r0, c1, c0, 0 @ get control register |
411 | bic r0, r0, r5 @ ..V. ..R. .... ..A. | 418 | bic r0, r0, r5 @ ..V. ..R. .... ..A. |
412 | orr r0, r0, r6 @ ..VI Z..S .... .C.M (mmu) | 419 | orr r0, r0, r6 @ ..VI Z..S .... .C.M (mmu) |
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index a26a605b73bd..0cb1848bd876 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S | |||
@@ -40,7 +40,6 @@ ENTRY(v7wbi_flush_user_tlb_range) | |||
40 | asid r3, r3 @ mask ASID | 40 | asid r3, r3 @ mask ASID |
41 | orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA | 41 | orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA |
42 | mov r1, r1, lsl #PAGE_SHIFT | 42 | mov r1, r1, lsl #PAGE_SHIFT |
43 | vma_vm_flags r2, r2 @ get vma->vm_flags | ||
44 | 1: | 43 | 1: |
45 | #ifdef CONFIG_SMP | 44 | #ifdef CONFIG_SMP |
46 | mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) | 45 | mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) |
diff --git a/arch/arm/plat-mxc/audmux-v2.c b/arch/arm/plat-mxc/audmux-v2.c index 6f21096086fd..b06954a84436 100644 --- a/arch/arm/plat-mxc/audmux-v2.c +++ b/arch/arm/plat-mxc/audmux-v2.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/err.h> | 23 | #include <linux/err.h> |
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/debugfs.h> | ||
26 | #include <mach/audmux.h> | 27 | #include <mach/audmux.h> |
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | 29 | ||
@@ -32,6 +33,140 @@ static void __iomem *audmux_base; | |||
32 | #define MXC_AUDMUX_V2_PTCR(x) ((x) * 8) | 33 | #define MXC_AUDMUX_V2_PTCR(x) ((x) * 8) |
33 | #define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) | 34 | #define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4) |
34 | 35 | ||
36 | #ifdef CONFIG_DEBUG_FS | ||
37 | static struct dentry *audmux_debugfs_root; | ||
38 | |||
39 | static int audmux_open_file(struct inode *inode, struct file *file) | ||
40 | { | ||
41 | file->private_data = inode->i_private; | ||
42 | return 0; | ||
43 | } | ||
44 | |||
45 | /* There is an annoying discontinuity in the SSI numbering with regard | ||
46 | * to the Linux number of the devices */ | ||
47 | static const char *audmux_port_string(int port) | ||
48 | { | ||
49 | switch (port) { | ||
50 | case MX31_AUDMUX_PORT1_SSI0: | ||
51 | return "imx-ssi.0"; | ||
52 | case MX31_AUDMUX_PORT2_SSI1: | ||
53 | return "imx-ssi.1"; | ||
54 | case MX31_AUDMUX_PORT3_SSI_PINS_3: | ||
55 | return "SSI3"; | ||
56 | case MX31_AUDMUX_PORT4_SSI_PINS_4: | ||
57 | return "SSI4"; | ||
58 | case MX31_AUDMUX_PORT5_SSI_PINS_5: | ||
59 | return "SSI5"; | ||
60 | case MX31_AUDMUX_PORT6_SSI_PINS_6: | ||
61 | return "SSI6"; | ||
62 | default: | ||
63 | return "UNKNOWN"; | ||
64 | } | ||
65 | } | ||
66 | |||
67 | static ssize_t audmux_read_file(struct file *file, char __user *user_buf, | ||
68 | size_t count, loff_t *ppos) | ||
69 | { | ||
70 | ssize_t ret; | ||
71 | char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); | ||
72 | int port = (int)file->private_data; | ||
73 | u32 pdcr, ptcr; | ||
74 | |||
75 | if (!buf) | ||
76 | return -ENOMEM; | ||
77 | |||
78 | if (audmux_clk) | ||
79 | clk_enable(audmux_clk); | ||
80 | |||
81 | ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port)); | ||
82 | pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port)); | ||
83 | |||
84 | if (audmux_clk) | ||
85 | clk_disable(audmux_clk); | ||
86 | |||
87 | ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n", | ||
88 | pdcr, ptcr); | ||
89 | |||
90 | if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR) | ||
91 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
92 | "TxFS output from %s, ", | ||
93 | audmux_port_string((ptcr >> 27) & 0x7)); | ||
94 | else | ||
95 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
96 | "TxFS input, "); | ||
97 | |||
98 | if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR) | ||
99 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
100 | "TxClk output from %s", | ||
101 | audmux_port_string((ptcr >> 22) & 0x7)); | ||
102 | else | ||
103 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
104 | "TxClk input"); | ||
105 | |||
106 | ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n"); | ||
107 | |||
108 | if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) { | ||
109 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
110 | "Port is symmetric"); | ||
111 | } else { | ||
112 | if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR) | ||
113 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
114 | "RxFS output from %s, ", | ||
115 | audmux_port_string((ptcr >> 17) & 0x7)); | ||
116 | else | ||
117 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
118 | "RxFS input, "); | ||
119 | |||
120 | if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR) | ||
121 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
122 | "RxClk output from %s", | ||
123 | audmux_port_string((ptcr >> 12) & 0x7)); | ||
124 | else | ||
125 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
126 | "RxClk input"); | ||
127 | } | ||
128 | |||
129 | ret += snprintf(buf + ret, PAGE_SIZE - ret, | ||
130 | "\nData received from %s\n", | ||
131 | audmux_port_string((pdcr >> 13) & 0x7)); | ||
132 | |||
133 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); | ||
134 | |||
135 | kfree(buf); | ||
136 | |||
137 | return ret; | ||
138 | } | ||
139 | |||
140 | static const struct file_operations audmux_debugfs_fops = { | ||
141 | .open = audmux_open_file, | ||
142 | .read = audmux_read_file, | ||
143 | }; | ||
144 | |||
145 | static void audmux_debugfs_init(void) | ||
146 | { | ||
147 | int i; | ||
148 | char buf[20]; | ||
149 | |||
150 | audmux_debugfs_root = debugfs_create_dir("audmux", NULL); | ||
151 | if (!audmux_debugfs_root) { | ||
152 | pr_warning("Failed to create AUDMUX debugfs root\n"); | ||
153 | return; | ||
154 | } | ||
155 | |||
156 | for (i = 1; i < 8; i++) { | ||
157 | snprintf(buf, sizeof(buf), "ssi%d", i); | ||
158 | if (!debugfs_create_file(buf, 0444, audmux_debugfs_root, | ||
159 | (void *)i, &audmux_debugfs_fops)) | ||
160 | pr_warning("Failed to create AUDMUX port %d debugfs file\n", | ||
161 | i); | ||
162 | } | ||
163 | } | ||
164 | #else | ||
165 | static inline void audmux_debugfs_init(void) | ||
166 | { | ||
167 | } | ||
168 | #endif | ||
169 | |||
35 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, | 170 | int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr, |
36 | unsigned int pdcr) | 171 | unsigned int pdcr) |
37 | { | 172 | { |
@@ -68,6 +203,8 @@ static int mxc_audmux_v2_init(void) | |||
68 | if (cpu_is_mx31() || cpu_is_mx35()) | 203 | if (cpu_is_mx31() || cpu_is_mx35()) |
69 | audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); | 204 | audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR); |
70 | 205 | ||
206 | audmux_debugfs_init(); | ||
207 | |||
71 | return 0; | 208 | return 0; |
72 | } | 209 | } |
73 | 210 | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/plat-mxc/include/mach/board-mx31lite.h index 0184b638c268..2b2da0367578 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31lite.h | |||
@@ -25,7 +25,7 @@ | |||
25 | 25 | ||
26 | #ifndef __ASSEMBLY__ | 26 | #ifndef __ASSEMBLY__ |
27 | 27 | ||
28 | enum mx31lilly_boards { | 28 | enum mx31lite_boards { |
29 | MX31LITE_NOBOARD = 0, | 29 | MX31LITE_NOBOARD = 0, |
30 | MX31LITE_DB = 1, | 30 | MX31LITE_DB = 1, |
31 | }; | 31 | }; |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 286cb9b0a25b..4bf1068ffad9 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -32,7 +32,7 @@ extern void mxc91231_init_irq(void); | |||
32 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); | 32 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); |
33 | extern int mx1_clocks_init(unsigned long fref); | 33 | extern int mx1_clocks_init(unsigned long fref); |
34 | extern int mx21_clocks_init(unsigned long lref, unsigned long fref); | 34 | extern int mx21_clocks_init(unsigned long lref, unsigned long fref); |
35 | extern int mx25_clocks_init(unsigned long fref); | 35 | extern int mx25_clocks_init(void); |
36 | extern int mx27_clocks_init(unsigned long fref); | 36 | extern int mx27_clocks_init(unsigned long fref); |
37 | extern int mx31_clocks_init(unsigned long fref); | 37 | extern int mx31_clocks_init(unsigned long fref); |
38 | extern int mx35_clocks_init(void); | 38 | extern int mx35_clocks_init(void); |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h index 810c47f56e77..9af494f0ab3d 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h | |||
@@ -58,19 +58,19 @@ | |||
58 | 58 | ||
59 | #define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL) | 59 | #define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL) |
60 | #define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL) | 60 | #define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL) |
61 | #define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL) | 61 | #define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL) |
62 | 62 | ||
63 | #define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL) | 63 | #define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL) |
64 | #define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL) | 64 | #define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL) |
65 | #define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL) | 65 | #define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL) |
66 | 66 | ||
67 | #define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL) | 67 | #define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL) |
68 | #define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL) | 68 | #define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL) |
69 | #define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL) | 69 | #define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL) |
70 | 70 | ||
71 | #define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL) | 71 | #define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL) |
72 | #define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL) | 72 | #define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL) |
73 | #define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL) | 73 | #define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL) |
74 | 74 | ||
75 | #define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL) | 75 | #define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL) |
76 | #define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL) | 76 | #define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL) |
@@ -80,11 +80,11 @@ | |||
80 | 80 | ||
81 | #define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL) | 81 | #define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL) |
82 | #define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL) | 82 | #define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL) |
83 | #define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL) | 83 | #define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL) |
84 | 84 | ||
85 | #define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL) | 85 | #define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL) |
86 | #define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL) | 86 | #define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL) |
87 | #define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL) | 87 | #define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL) |
88 | 88 | ||
89 | #define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL) | 89 | #define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL) |
90 | #define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL) | 90 | #define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL) |
@@ -112,7 +112,7 @@ | |||
112 | #define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL) | 112 | #define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL) |
113 | #define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL) | 113 | #define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL) |
114 | 114 | ||
115 | #define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL) | 115 | #define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL) |
116 | #define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL) | 116 | #define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL) |
117 | 117 | ||
118 | #define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL) | 118 | #define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL) |
@@ -229,28 +229,28 @@ | |||
229 | #define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) | 229 | #define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) |
230 | 230 | ||
231 | #define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) | 231 | #define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) |
232 | #define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL) | 232 | #define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL) |
233 | 233 | ||
234 | #define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) | 234 | #define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) |
235 | #define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL) | 235 | #define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL) |
236 | 236 | ||
237 | #define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) | 237 | #define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) |
238 | #define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL) | 238 | #define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL) |
239 | 239 | ||
240 | #define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) | 240 | #define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) |
241 | #define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL) | 241 | #define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL) |
242 | 242 | ||
243 | #define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) | 243 | #define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) |
244 | #define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL) | 244 | #define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL) |
245 | 245 | ||
246 | #define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) | 246 | #define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) |
247 | #define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL) | 247 | #define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL) |
248 | 248 | ||
249 | #define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) | 249 | #define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) |
250 | #define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL) | 250 | #define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL) |
251 | 251 | ||
252 | #define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) | 252 | #define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) |
253 | #define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL) | 253 | #define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL) |
254 | 254 | ||
255 | #define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) | 255 | #define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) |
256 | #define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL) | 256 | #define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL) |
@@ -265,7 +265,7 @@ | |||
265 | #define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL) | 265 | #define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL) |
266 | 266 | ||
267 | #define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL) | 267 | #define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL) |
268 | #define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL) | 268 | #define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL) |
269 | 269 | ||
270 | #define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL) | 270 | #define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL) |
271 | #define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL) | 271 | #define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL) |
@@ -354,19 +354,19 @@ | |||
354 | #define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL) | 354 | #define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL) |
355 | 355 | ||
356 | #define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL) | 356 | #define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL) |
357 | #define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL) | 357 | #define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL) |
358 | #define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL) | 358 | #define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL) |
359 | 359 | ||
360 | #define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL) | 360 | #define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL) |
361 | #define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL) | 361 | #define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL) |
362 | #define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL) | 362 | #define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL) |
363 | 363 | ||
364 | #define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 364 | #define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
365 | #define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL) | 365 | #define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL) |
366 | #define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL) | 366 | #define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL) |
367 | 367 | ||
368 | #define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 368 | #define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
369 | #define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL) | 369 | #define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL) |
370 | #define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL) | 370 | #define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL) |
371 | 371 | ||
372 | #define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 372 | #define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
@@ -377,11 +377,11 @@ | |||
377 | #define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL) | 377 | #define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL) |
378 | 378 | ||
379 | #define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 379 | #define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
380 | #define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL) | 380 | #define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL) |
381 | #define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL) | 381 | #define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL) |
382 | 382 | ||
383 | #define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 383 | #define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
384 | #define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL) | 384 | #define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL) |
385 | #define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL) | 385 | #define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL) |
386 | 386 | ||
387 | #define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE) | 387 | #define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE) |
@@ -410,7 +410,7 @@ | |||
410 | #define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE) | 410 | #define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE) |
411 | #define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL) | 411 | #define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL) |
412 | 412 | ||
413 | #define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL) | 413 | #define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL) |
414 | #define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL) | 414 | #define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL) |
415 | #define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL) | 415 | #define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL) |
416 | 416 | ||
@@ -418,23 +418,23 @@ | |||
418 | #define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL) | 418 | #define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL) |
419 | #define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL) | 419 | #define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL) |
420 | 420 | ||
421 | #define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL) | 421 | #define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL) |
422 | #define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL) | 422 | #define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL) |
423 | 423 | ||
424 | #define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL) | 424 | #define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL) |
425 | #define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL) | 425 | #define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL) |
426 | #define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL) | 426 | #define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL) |
427 | 427 | ||
428 | #define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL) | 428 | #define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL) |
429 | #define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL) | 429 | #define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL) |
430 | 430 | ||
431 | #define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) | 431 | #define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL) |
432 | #define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL) | 432 | #define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL) |
433 | 433 | ||
434 | #define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) | 434 | #define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL) |
435 | #define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL) | 435 | #define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL) |
436 | 436 | ||
437 | #define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) | 437 | #define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL) |
438 | #define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP) | 438 | #define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP) |
439 | #define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL) | 439 | #define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL) |
440 | 440 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h index 00b0ac1db225..c88d40795f7a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h | |||
@@ -671,7 +671,7 @@ | |||
671 | #define MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 IOMUX_PAD(0x634, 0x1d0, 6, 0x0, 0, NO_PAD_CTRL) | 671 | #define MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 IOMUX_PAD(0x634, 0x1d0, 6, 0x0, 0, NO_PAD_CTRL) |
672 | 672 | ||
673 | #define MX35_PAD_LD9__IPU_DISPB_DAT_9 IOMUX_PAD(0x638, 0x1d4, 0, 0x0, 0, NO_PAD_CTRL) | 673 | #define MX35_PAD_LD9__IPU_DISPB_DAT_9 IOMUX_PAD(0x638, 0x1d4, 0, 0x0, 0, NO_PAD_CTRL) |
674 | #define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4 0, NO_PAD_CTRL) | 674 | #define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4, 0, NO_PAD_CTRL) |
675 | #define MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 IOMUX_PAD(0x638, 0x1d4, 6, 0x0, 0, NO_PAD_CTRL) | 675 | #define MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 IOMUX_PAD(0x638, 0x1d4, 6, 0x0, 0, NO_PAD_CTRL) |
676 | 676 | ||
677 | #define MX35_PAD_LD10__IPU_DISPB_DAT_10 IOMUX_PAD(0x63c, 0x1d8, 0, 0x0, 0, NO_PAD_CTRL) | 677 | #define MX35_PAD_LD10__IPU_DISPB_DAT_10 IOMUX_PAD(0x63c, 0x1d8, 0, 0x0, 0, NO_PAD_CTRL) |
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index ead9d592168d..0cb347645db4 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h | |||
@@ -37,7 +37,12 @@ | |||
37 | * within sensible limits. | 37 | * within sensible limits. |
38 | */ | 38 | */ |
39 | #define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) | 39 | #define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) |
40 | |||
41 | #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 | ||
42 | #define MXC_BOARD_IRQS 80 | ||
43 | #else | ||
40 | #define MXC_BOARD_IRQS 16 | 44 | #define MXC_BOARD_IRQS 16 |
45 | #endif | ||
41 | 46 | ||
42 | #define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) | 47 | #define MXC_IPU_IRQ_START (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) |
43 | 48 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 91e738144804..854e2dc58481 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h | |||
@@ -41,4 +41,8 @@ | |||
41 | #define UART1_BASE_ADDR 0x43f90000 | 41 | #define UART1_BASE_ADDR 0x43f90000 |
42 | #define UART2_BASE_ADDR 0x43f94000 | 42 | #define UART2_BASE_ADDR 0x43f94000 |
43 | 43 | ||
44 | #define MX25_FEC_BASE_ADDR 0x50038000 | ||
45 | |||
46 | #define MX25_INT_FEC 57 | ||
47 | |||
44 | #endif /* __MACH_MX25_H__ */ | 48 | #endif /* __MACH_MX25_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index 4d5d395ad63b..d49384cb1e97 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h | |||
@@ -60,7 +60,9 @@ static void putc(int ch) | |||
60 | UART(TXR) = ch; | 60 | UART(TXR) = ch; |
61 | } | 61 | } |
62 | 62 | ||
63 | #define flush() do { } while (0) | 63 | static inline void flush(void) |
64 | { | ||
65 | } | ||
64 | 66 | ||
65 | #define MX1_UART1_BASE_ADDR 0x00206000 | 67 | #define MX1_UART1_BASE_ADDR 0x00206000 |
66 | #define MX25_UART1_BASE_ADDR 0x43f90000 | 68 | #define MX25_UART1_BASE_ADDR 0x43f90000 |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 89cafc937249..4becbdd1935c 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -36,10 +36,6 @@ static struct clk_functions *arch_clock; | |||
36 | * Standard clock functions defined in include/linux/clk.h | 36 | * Standard clock functions defined in include/linux/clk.h |
37 | *-------------------------------------------------------------------------*/ | 37 | *-------------------------------------------------------------------------*/ |
38 | 38 | ||
39 | /* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since | ||
40 | * clock framework is not up , it is defined here to avoid rework in | ||
41 | * every driver. Also dummy prcm reset function is added */ | ||
42 | |||
43 | int clk_enable(struct clk *clk) | 39 | int clk_enable(struct clk *clk) |
44 | { | 40 | { |
45 | unsigned long flags; | 41 | unsigned long flags; |
@@ -305,7 +301,6 @@ void clk_enable_init_clocks(void) | |||
305 | clk_enable(clkp); | 301 | clk_enable(clkp); |
306 | } | 302 | } |
307 | } | 303 | } |
308 | EXPORT_SYMBOL(clk_enable_init_clocks); | ||
309 | 304 | ||
310 | /* | 305 | /* |
311 | * Low level helpers | 306 | * Low level helpers |
@@ -334,7 +329,16 @@ void clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | |||
334 | arch_clock->clk_init_cpufreq_table(table); | 329 | arch_clock->clk_init_cpufreq_table(table); |
335 | spin_unlock_irqrestore(&clockfw_lock, flags); | 330 | spin_unlock_irqrestore(&clockfw_lock, flags); |
336 | } | 331 | } |
337 | EXPORT_SYMBOL(clk_init_cpufreq_table); | 332 | |
333 | void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
334 | { | ||
335 | unsigned long flags; | ||
336 | |||
337 | spin_lock_irqsave(&clockfw_lock, flags); | ||
338 | if (arch_clock->clk_exit_cpufreq_table) | ||
339 | arch_clock->clk_exit_cpufreq_table(table); | ||
340 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
341 | } | ||
338 | #endif | 342 | #endif |
339 | 343 | ||
340 | /*-------------------------------------------------------------------------*/ | 344 | /*-------------------------------------------------------------------------*/ |
@@ -387,7 +391,7 @@ static struct dentry *clk_debugfs_root; | |||
387 | static int clk_debugfs_register_one(struct clk *c) | 391 | static int clk_debugfs_register_one(struct clk *c) |
388 | { | 392 | { |
389 | int err; | 393 | int err; |
390 | struct dentry *d, *child; | 394 | struct dentry *d, *child, *child_tmp; |
391 | struct clk *pa = c->parent; | 395 | struct clk *pa = c->parent; |
392 | char s[255]; | 396 | char s[255]; |
393 | char *p = s; | 397 | char *p = s; |
@@ -419,7 +423,7 @@ static int clk_debugfs_register_one(struct clk *c) | |||
419 | 423 | ||
420 | err_out: | 424 | err_out: |
421 | d = c->dent; | 425 | d = c->dent; |
422 | list_for_each_entry(child, &d->d_subdirs, d_u.d_child) | 426 | list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child) |
423 | debugfs_remove(child); | 427 | debugfs_remove(child); |
424 | debugfs_remove(c->dent); | 428 | debugfs_remove(c->dent); |
425 | return err; | 429 | return err; |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index bf1eaf3a27d4..dddc0273bc8b 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
@@ -172,6 +172,32 @@ unsigned long long sched_clock(void) | |||
172 | clocksource_32k.mult, clocksource_32k.shift); | 172 | clocksource_32k.mult, clocksource_32k.shift); |
173 | } | 173 | } |
174 | 174 | ||
175 | /** | ||
176 | * read_persistent_clock - Return time from a persistent clock. | ||
177 | * | ||
178 | * Reads the time from a source which isn't disabled during PM, the | ||
179 | * 32k sync timer. Convert the cycles elapsed since last read into | ||
180 | * nsecs and adds to a monotonically increasing timespec. | ||
181 | */ | ||
182 | static struct timespec persistent_ts; | ||
183 | static cycles_t cycles, last_cycles; | ||
184 | void read_persistent_clock(struct timespec *ts) | ||
185 | { | ||
186 | unsigned long long nsecs; | ||
187 | cycles_t delta; | ||
188 | struct timespec *tsp = &persistent_ts; | ||
189 | |||
190 | last_cycles = cycles; | ||
191 | cycles = clocksource_32k.read(&clocksource_32k); | ||
192 | delta = cycles - last_cycles; | ||
193 | |||
194 | nsecs = clocksource_cyc2ns(delta, | ||
195 | clocksource_32k.mult, clocksource_32k.shift); | ||
196 | |||
197 | timespec_add_ns(tsp, nsecs); | ||
198 | *ts = *tsp; | ||
199 | } | ||
200 | |||
175 | static int __init omap_init_clocksource_32k(void) | 201 | static int __init omap_init_clocksource_32k(void) |
176 | { | 202 | { |
177 | static char err[] __initdata = KERN_ERR | 203 | static char err[] __initdata = KERN_ERR |
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index f8ddbdd8b076..6d3d33360056 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c | |||
@@ -134,6 +134,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) | |||
134 | 134 | ||
135 | static int omap_cpu_exit(struct cpufreq_policy *policy) | 135 | static int omap_cpu_exit(struct cpufreq_policy *policy) |
136 | { | 136 | { |
137 | clk_exit_cpufreq_table(&freq_table); | ||
137 | clk_put(mpu_clk); | 138 | clk_put(mpu_clk); |
138 | return 0; | 139 | return 0; |
139 | } | 140 | } |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 09d82b3c66ce..728c64204184 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue) | |||
1183 | } | 1183 | } |
1184 | 1184 | ||
1185 | if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || | 1185 | if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || |
1186 | (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) { | 1186 | (dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) { |
1187 | printk(KERN_ERR "omap_dma: You need to stop the DMA channels " | 1187 | printk(KERN_ERR "omap_dma: You need to stop the DMA channels " |
1188 | "before unlinking\n"); | 1188 | "before unlinking\n"); |
1189 | dump_stack(); | 1189 | dump_stack(); |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 64f407ee0f4e..08ccf8922520 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -551,6 +551,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer) | |||
551 | if (l & OMAP_TIMER_CTRL_ST) { | 551 | if (l & OMAP_TIMER_CTRL_ST) { |
552 | l &= ~0x1; | 552 | l &= ~0x1; |
553 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); | 553 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
554 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | ||
555 | defined(CONFIG_ARCH_OMAP4) | ||
556 | /* Readback to make sure write has completed */ | ||
557 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); | ||
558 | /* | ||
559 | * Wait for functional clock period x 3.5 to make sure that | ||
560 | * timer is stopped | ||
561 | */ | ||
562 | udelay(3500000 / clk_get_rate(timer->fclk) + 1); | ||
563 | /* Ack possibly pending interrupt */ | ||
564 | omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, | ||
565 | OMAP_TIMER_INT_OVERFLOW); | ||
566 | #endif | ||
554 | } | 567 | } |
555 | } | 568 | } |
556 | EXPORT_SYMBOL_GPL(omap_dm_timer_stop); | 569 | EXPORT_SYMBOL_GPL(omap_dm_timer_stop); |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 04846811d0aa..d2422c766cca 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -192,6 +192,7 @@ struct gpio_bank { | |||
192 | u32 saved_risingdetect; | 192 | u32 saved_risingdetect; |
193 | #endif | 193 | #endif |
194 | u32 level_mask; | 194 | u32 level_mask; |
195 | u32 toggle_mask; | ||
195 | spinlock_t lock; | 196 | spinlock_t lock; |
196 | struct gpio_chip chip; | 197 | struct gpio_chip chip; |
197 | struct clk *dbck; | 198 | struct clk *dbck; |
@@ -749,6 +750,44 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
749 | } | 750 | } |
750 | #endif | 751 | #endif |
751 | 752 | ||
753 | #ifdef CONFIG_ARCH_OMAP1 | ||
754 | /* | ||
755 | * This only applies to chips that can't do both rising and falling edge | ||
756 | * detection at once. For all other chips, this function is a noop. | ||
757 | */ | ||
758 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) | ||
759 | { | ||
760 | void __iomem *reg = bank->base; | ||
761 | u32 l = 0; | ||
762 | |||
763 | switch (bank->method) { | ||
764 | case METHOD_MPUIO: | ||
765 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | ||
766 | break; | ||
767 | #ifdef CONFIG_ARCH_OMAP15XX | ||
768 | case METHOD_GPIO_1510: | ||
769 | reg += OMAP1510_GPIO_INT_CONTROL; | ||
770 | break; | ||
771 | #endif | ||
772 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | ||
773 | case METHOD_GPIO_7XX: | ||
774 | reg += OMAP7XX_GPIO_INT_CONTROL; | ||
775 | break; | ||
776 | #endif | ||
777 | default: | ||
778 | return; | ||
779 | } | ||
780 | |||
781 | l = __raw_readl(reg); | ||
782 | if ((l >> gpio) & 1) | ||
783 | l &= ~(1 << gpio); | ||
784 | else | ||
785 | l |= 1 << gpio; | ||
786 | |||
787 | __raw_writel(l, reg); | ||
788 | } | ||
789 | #endif | ||
790 | |||
752 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | 791 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) |
753 | { | 792 | { |
754 | void __iomem *reg = bank->base; | 793 | void __iomem *reg = bank->base; |
@@ -759,6 +798,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
759 | case METHOD_MPUIO: | 798 | case METHOD_MPUIO: |
760 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 799 | reg += OMAP_MPUIO_GPIO_INT_EDGE; |
761 | l = __raw_readl(reg); | 800 | l = __raw_readl(reg); |
801 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
802 | bank->toggle_mask |= 1 << gpio; | ||
762 | if (trigger & IRQ_TYPE_EDGE_RISING) | 803 | if (trigger & IRQ_TYPE_EDGE_RISING) |
763 | l |= 1 << gpio; | 804 | l |= 1 << gpio; |
764 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 805 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
@@ -771,6 +812,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
771 | case METHOD_GPIO_1510: | 812 | case METHOD_GPIO_1510: |
772 | reg += OMAP1510_GPIO_INT_CONTROL; | 813 | reg += OMAP1510_GPIO_INT_CONTROL; |
773 | l = __raw_readl(reg); | 814 | l = __raw_readl(reg); |
815 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
816 | bank->toggle_mask |= 1 << gpio; | ||
774 | if (trigger & IRQ_TYPE_EDGE_RISING) | 817 | if (trigger & IRQ_TYPE_EDGE_RISING) |
775 | l |= 1 << gpio; | 818 | l |= 1 << gpio; |
776 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 819 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
@@ -803,6 +846,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
803 | case METHOD_GPIO_7XX: | 846 | case METHOD_GPIO_7XX: |
804 | reg += OMAP7XX_GPIO_INT_CONTROL; | 847 | reg += OMAP7XX_GPIO_INT_CONTROL; |
805 | l = __raw_readl(reg); | 848 | l = __raw_readl(reg); |
849 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
850 | bank->toggle_mask |= 1 << gpio; | ||
806 | if (trigger & IRQ_TYPE_EDGE_RISING) | 851 | if (trigger & IRQ_TYPE_EDGE_RISING) |
807 | l |= 1 << gpio; | 852 | l |= 1 << gpio; |
808 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 853 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
@@ -1072,7 +1117,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena | |||
1072 | */ | 1117 | */ |
1073 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | 1118 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
1074 | { | 1119 | { |
1075 | unsigned long flags; | 1120 | unsigned long uninitialized_var(flags); |
1076 | 1121 | ||
1077 | switch (bank->method) { | 1122 | switch (bank->method) { |
1078 | #ifdef CONFIG_ARCH_OMAP16XX | 1123 | #ifdef CONFIG_ARCH_OMAP16XX |
@@ -1217,7 +1262,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1217 | { | 1262 | { |
1218 | void __iomem *isr_reg = NULL; | 1263 | void __iomem *isr_reg = NULL; |
1219 | u32 isr; | 1264 | u32 isr; |
1220 | unsigned int gpio_irq; | 1265 | unsigned int gpio_irq, gpio_index; |
1221 | struct gpio_bank *bank; | 1266 | struct gpio_bank *bank; |
1222 | u32 retrigger = 0; | 1267 | u32 retrigger = 0; |
1223 | int unmasked = 0; | 1268 | int unmasked = 0; |
@@ -1284,9 +1329,23 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1284 | 1329 | ||
1285 | gpio_irq = bank->virtual_irq_start; | 1330 | gpio_irq = bank->virtual_irq_start; |
1286 | for (; isr != 0; isr >>= 1, gpio_irq++) { | 1331 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
1332 | gpio_index = get_gpio_index(irq_to_gpio(gpio_irq)); | ||
1333 | |||
1287 | if (!(isr & 1)) | 1334 | if (!(isr & 1)) |
1288 | continue; | 1335 | continue; |
1289 | 1336 | ||
1337 | #ifdef CONFIG_ARCH_OMAP1 | ||
1338 | /* | ||
1339 | * Some chips can't respond to both rising and falling | ||
1340 | * at the same time. If this irq was requested with | ||
1341 | * both flags, we need to flip the ICR data for the IRQ | ||
1342 | * to respond to the IRQ for the opposite direction. | ||
1343 | * This will be indicated in the bank toggle_mask. | ||
1344 | */ | ||
1345 | if (bank->toggle_mask & (1 << gpio_index)) | ||
1346 | _toggle_gpio_edge_triggering(bank, gpio_index); | ||
1347 | #endif | ||
1348 | |||
1290 | generic_handle_irq(gpio_irq); | 1349 | generic_handle_irq(gpio_irq); |
1291 | } | 1350 | } |
1292 | } | 1351 | } |
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h index 376ce18216ff..5cd622039da0 100644 --- a/arch/arm/plat-omap/include/plat/board.h +++ b/arch/arm/plat-omap/include/plat/board.h | |||
@@ -99,7 +99,6 @@ struct fb_info; | |||
99 | struct omap_backlight_config { | 99 | struct omap_backlight_config { |
100 | int default_intensity; | 100 | int default_intensity; |
101 | int (*set_power)(struct device *dev, int state); | 101 | int (*set_power)(struct device *dev, int state); |
102 | int (*check_fb)(struct fb_info *fb); | ||
103 | }; | 102 | }; |
104 | 103 | ||
105 | struct omap_fbmem_config { | 104 | struct omap_fbmem_config { |
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 309b6d1dccdb..94fe2a0ce40a 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
@@ -119,6 +119,7 @@ struct clk_functions { | |||
119 | void (*clk_disable_unused)(struct clk *clk); | 119 | void (*clk_disable_unused)(struct clk *clk); |
120 | #ifdef CONFIG_CPU_FREQ | 120 | #ifdef CONFIG_CPU_FREQ |
121 | void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); | 121 | void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); |
122 | void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **); | ||
122 | #endif | 123 | #endif |
123 | }; | 124 | }; |
124 | 125 | ||
@@ -135,6 +136,7 @@ extern unsigned long followparent_recalc(struct clk *clk); | |||
135 | extern void clk_enable_init_clocks(void); | 136 | extern void clk_enable_init_clocks(void); |
136 | #ifdef CONFIG_CPU_FREQ | 137 | #ifdef CONFIG_CPU_FREQ |
137 | extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | 138 | extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); |
139 | extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | ||
138 | #endif | 140 | #endif |
139 | 141 | ||
140 | extern const struct clkops clkops_null; | 142 | extern const struct clkops clkops_null; |
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 2ae884378638..a745d62fad0d 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h | |||
@@ -147,7 +147,7 @@ | |||
147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ | 149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ |
150 | + ((i) >> 1) * 4 + (!(i) & 1) * 2) | 150 | + ((i) >> 1) * 4 + (!((i) & 1)) * 2) |
151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) | 151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) |
152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) | 152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) |
153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) | 153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) |
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 9a028bdebb06..a162f585b1e3 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h | |||
@@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517) | |||
434 | #define OMAP3430_REV_ES2_1 0x34302034 | 434 | #define OMAP3430_REV_ES2_1 0x34302034 |
435 | #define OMAP3430_REV_ES3_0 0x34303034 | 435 | #define OMAP3430_REV_ES3_0 0x34303034 |
436 | #define OMAP3430_REV_ES3_1 0x34304034 | 436 | #define OMAP3430_REV_ES3_1 0x34304034 |
437 | #define OMAP3430_REV_ES3_1_2 0x34305034 | ||
437 | 438 | ||
438 | #define OMAP3630_REV_ES1_0 0x36300034 | 439 | #define OMAP3630_REV_ES1_0 0x36300034 |
439 | 440 | ||
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 7e5319f907d1..a3e7b471bcba 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h | |||
@@ -122,16 +122,21 @@ | |||
122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) | 122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) |
123 | #define OMAP243X_SMS_SIZE SZ_1M | 123 | #define OMAP243X_SMS_SIZE SZ_1M |
124 | 124 | ||
125 | /* DSP */ | 125 | /* 2420 IVA */ |
126 | #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ | 126 | #define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE |
127 | #define DSP_MEM_24XX_VIRT 0xe0000000 | 127 | /* 0x58000000 --> 0xfc100000 */ |
128 | #define DSP_MEM_24XX_SIZE 0x28000 | 128 | #define DSP_MEM_2420_VIRT 0xfc100000 |
129 | #define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ | 129 | #define DSP_MEM_2420_SIZE 0x28000 |
130 | #define DSP_IPI_24XX_VIRT 0xe1000000 | 130 | #define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE |
131 | #define DSP_IPI_24XX_SIZE SZ_4K | 131 | /* 0x59000000 --> 0xfc128000 */ |
132 | #define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ | 132 | #define DSP_IPI_2420_VIRT 0xfc128000 |
133 | #define DSP_MMU_24XX_VIRT 0xe2000000 | 133 | #define DSP_IPI_2420_SIZE SZ_4K |
134 | #define DSP_MMU_24XX_SIZE SZ_4K | 134 | #define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE |
135 | /* 0x5a000000 --> 0xfc129000 */ | ||
136 | #define DSP_MMU_2420_VIRT 0xfc129000 | ||
137 | #define DSP_MMU_2420_SIZE SZ_4K | ||
138 | |||
139 | /* 2430 IVA2.1 - currently unmapped */ | ||
135 | 140 | ||
136 | /* | 141 | /* |
137 | * ---------------------------------------------------------------------------- | 142 | * ---------------------------------------------------------------------------- |
@@ -182,16 +187,7 @@ | |||
182 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) | 187 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) |
183 | #define OMAP343X_SDRC_SIZE SZ_1M | 188 | #define OMAP343X_SDRC_SIZE SZ_1M |
184 | 189 | ||
185 | /* DSP */ | 190 | /* 3430 IVA - currently unmapped */ |
186 | #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ | ||
187 | #define DSP_MEM_34XX_VIRT 0xe0000000 | ||
188 | #define DSP_MEM_34XX_SIZE 0x28000 | ||
189 | #define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ | ||
190 | #define DSP_IPI_34XX_VIRT 0xe1000000 | ||
191 | #define DSP_IPI_34XX_SIZE SZ_4K | ||
192 | #define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ | ||
193 | #define DSP_MMU_34XX_VIRT 0xe2000000 | ||
194 | #define DSP_MMU_34XX_SIZE SZ_4K | ||
195 | 191 | ||
196 | /* | 192 | /* |
197 | * ---------------------------------------------------------------------------- | 193 | * ---------------------------------------------------------------------------- |
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 97d6c50c3dcb..c0ab7c80f72e 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h | |||
@@ -499,6 +499,9 @@ extern void omap_init_irq(void); | |||
499 | extern int omap_irq_pending(void); | 499 | extern int omap_irq_pending(void); |
500 | void omap_intc_save_context(void); | 500 | void omap_intc_save_context(void); |
501 | void omap_intc_restore_context(void); | 501 | void omap_intc_restore_context(void); |
502 | void omap3_intc_suspend(void); | ||
503 | void omap3_intc_prepare_idle(void); | ||
504 | void omap3_intc_resume_idle(void); | ||
502 | #endif | 505 | #endif |
503 | 506 | ||
504 | #include <mach/hardware.h> | 507 | #include <mach/hardware.h> |
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h index 8f069cc80350..692c90e89ac3 100644 --- a/arch/arm/plat-omap/include/plat/mux.h +++ b/arch/arm/plat-omap/include/plat/mux.h | |||
@@ -183,6 +183,14 @@ enum omap7xx_index { | |||
183 | /* I2C */ | 183 | /* I2C */ |
184 | I2C_7XX_SCL, | 184 | I2C_7XX_SCL, |
185 | I2C_7XX_SDA, | 185 | I2C_7XX_SDA, |
186 | |||
187 | /* SPI */ | ||
188 | SPI_7XX_1, | ||
189 | SPI_7XX_2, | ||
190 | SPI_7XX_3, | ||
191 | SPI_7XX_4, | ||
192 | SPI_7XX_5, | ||
193 | SPI_7XX_6, | ||
186 | }; | 194 | }; |
187 | 195 | ||
188 | enum omap1xxx_index { | 196 | enum omap1xxx_index { |
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/plat-omap/include/plat/omap7xx.h index 53f52414b0e9..48e4757e1e30 100644 --- a/arch/arm/plat-omap/include/plat/omap7xx.h +++ b/arch/arm/plat-omap/include/plat/omap7xx.h | |||
@@ -46,6 +46,9 @@ | |||
46 | #define OMAP7XX_DSPREG_SIZE SZ_128K | 46 | #define OMAP7XX_DSPREG_SIZE SZ_128K |
47 | #define OMAP7XX_DSPREG_START 0xE1000000 | 47 | #define OMAP7XX_DSPREG_START 0xE1000000 |
48 | 48 | ||
49 | #define OMAP7XX_SPI1_BASE 0xfffc0800 | ||
50 | #define OMAP7XX_SPI2_BASE 0xfffc1000 | ||
51 | |||
49 | /* | 52 | /* |
50 | * ---------------------------------------------------------------------------- | 53 | * ---------------------------------------------------------------------------- |
51 | * OMAP7XX specific configuration registers | 54 | * OMAP7XX specific configuration registers |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 007935a921ea..33933256a226 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -227,6 +227,7 @@ struct omap_hwmod_ocp_if { | |||
227 | #define SYSC_HAS_SIDLEMODE (1 << 5) | 227 | #define SYSC_HAS_SIDLEMODE (1 << 5) |
228 | #define SYSC_HAS_MIDLEMODE (1 << 6) | 228 | #define SYSC_HAS_MIDLEMODE (1 << 6) |
229 | #define SYSS_MISSING (1 << 7) | 229 | #define SYSS_MISSING (1 << 7) |
230 | #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ | ||
230 | 231 | ||
231 | /* omap_hwmod_sysconfig.clockact flags */ | 232 | /* omap_hwmod_sysconfig.clockact flags */ |
232 | #define CLOCKACT_TEST_BOTH 0x0 | 233 | #define CLOCKACT_TEST_BOTH 0x0 |
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 11f5d7961c73..0cfd54f519c4 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c | |||
@@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
66 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); | 66 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); |
67 | } | 67 | } |
68 | if (cpu_is_omap2420()) { | 68 | if (cpu_is_omap2420()) { |
69 | if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) | 69 | if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE)) |
70 | return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); | 70 | return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT); |
71 | if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) | 71 | if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE)) |
72 | return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); | 72 | return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE); |
73 | if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) | 73 | if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE)) |
74 | return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); | 74 | return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT); |
75 | } | 75 | } |
76 | if (cpu_is_omap2430()) { | 76 | if (cpu_is_omap2430()) { |
77 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) | 77 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) |
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index c0ff1e39d893..463d6386aff2 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c | |||
@@ -827,7 +827,7 @@ EXPORT_SYMBOL_GPL(iommu_get); | |||
827 | **/ | 827 | **/ |
828 | void iommu_put(struct iommu *obj) | 828 | void iommu_put(struct iommu *obj) |
829 | { | 829 | { |
830 | if (!obj && IS_ERR(obj)) | 830 | if (!obj || IS_ERR(obj)) |
831 | return; | 831 | return; |
832 | 832 | ||
833 | mutex_lock(&obj->iommu_lock); | 833 | mutex_lock(&obj->iommu_lock); |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 2cc1cc328bac..f75767278fc3 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -436,7 +436,7 @@ int omap_mcbsp_request(unsigned int id) | |||
436 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " | 436 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " |
437 | "for McBSP%d\n", mcbsp->tx_irq, | 437 | "for McBSP%d\n", mcbsp->tx_irq, |
438 | mcbsp->id); | 438 | mcbsp->id); |
439 | return err; | 439 | goto error; |
440 | } | 440 | } |
441 | 441 | ||
442 | init_completion(&mcbsp->rx_irq_completion); | 442 | init_completion(&mcbsp->rx_irq_completion); |
@@ -446,12 +446,26 @@ int omap_mcbsp_request(unsigned int id) | |||
446 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " | 446 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " |
447 | "for McBSP%d\n", mcbsp->rx_irq, | 447 | "for McBSP%d\n", mcbsp->rx_irq, |
448 | mcbsp->id); | 448 | mcbsp->id); |
449 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | 449 | goto tx_irq; |
450 | return err; | ||
451 | } | 450 | } |
452 | } | 451 | } |
453 | 452 | ||
454 | return 0; | 453 | return 0; |
454 | tx_irq: | ||
455 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
456 | error: | ||
457 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) | ||
458 | mcbsp->pdata->ops->free(id); | ||
459 | |||
460 | /* Do procedure specific to omap34xx arch, if applicable */ | ||
461 | omap34xx_mcbsp_free(mcbsp); | ||
462 | |||
463 | clk_disable(mcbsp->fclk); | ||
464 | clk_disable(mcbsp->iclk); | ||
465 | |||
466 | mcbsp->free = 1; | ||
467 | |||
468 | return err; | ||
455 | } | 469 | } |
456 | EXPORT_SYMBOL(omap_mcbsp_request); | 470 | EXPORT_SYMBOL(omap_mcbsp_request); |
457 | 471 | ||
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 1e5648d3e3d8..2ed72013c2e2 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
@@ -89,16 +89,6 @@ | |||
89 | #define USE_WAKEUP_LAT 0 | 89 | #define USE_WAKEUP_LAT 0 |
90 | #define IGNORE_WAKEUP_LAT 1 | 90 | #define IGNORE_WAKEUP_LAT 1 |
91 | 91 | ||
92 | /* XXX this should be moved into a separate file */ | ||
93 | #if defined(CONFIG_ARCH_OMAP2420) | ||
94 | # define OMAP_32KSYNCT_BASE 0x48004000 | ||
95 | #elif defined(CONFIG_ARCH_OMAP2430) | ||
96 | # define OMAP_32KSYNCT_BASE 0x49020000 | ||
97 | #elif defined(CONFIG_ARCH_OMAP3430) | ||
98 | # define OMAP_32KSYNCT_BASE 0x48320000 | ||
99 | #else | ||
100 | # error Unknown OMAP device | ||
101 | #endif | ||
102 | 92 | ||
103 | /* Private functions */ | 93 | /* Private functions */ |
104 | 94 | ||
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index d41d41d78ad9..54c84a492a0f 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c | |||
@@ -133,6 +133,12 @@ static void __init orion_pcie_setup_wins(void __iomem *base, | |||
133 | } | 133 | } |
134 | 134 | ||
135 | /* | 135 | /* |
136 | * Round up 'size' to the nearest power of two. | ||
137 | */ | ||
138 | if ((size & (size - 1)) != 0) | ||
139 | size = 1 << fls(size); | ||
140 | |||
141 | /* | ||
136 | * Setup BAR[1] to all DRAM banks. | 142 | * Setup BAR[1] to all DRAM banks. |
137 | */ | 143 | */ |
138 | writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1)); | 144 | writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1)); |
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c index a9eabdcfa163..51dc5c8106c0 100644 --- a/arch/arm/plat-pxa/pwm.c +++ b/arch/arm/plat-pxa/pwm.c | |||
@@ -204,14 +204,14 @@ static int __devinit pwm_probe(struct platform_device *pdev) | |||
204 | goto err_free_clk; | 204 | goto err_free_clk; |
205 | } | 205 | } |
206 | 206 | ||
207 | r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); | 207 | r = request_mem_region(r->start, resource_size(r), pdev->name); |
208 | if (r == NULL) { | 208 | if (r == NULL) { |
209 | dev_err(&pdev->dev, "failed to request memory resource\n"); | 209 | dev_err(&pdev->dev, "failed to request memory resource\n"); |
210 | ret = -EBUSY; | 210 | ret = -EBUSY; |
211 | goto err_free_clk; | 211 | goto err_free_clk; |
212 | } | 212 | } |
213 | 213 | ||
214 | pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); | 214 | pwm->mmio_base = ioremap(r->start, resource_size(r)); |
215 | if (pwm->mmio_base == NULL) { | 215 | if (pwm->mmio_base == NULL) { |
216 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | 216 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); |
217 | ret = -ENODEV; | 217 | ret = -ENODEV; |
@@ -241,7 +241,7 @@ static int __devinit pwm_probe(struct platform_device *pdev) | |||
241 | return 0; | 241 | return 0; |
242 | 242 | ||
243 | err_free_mem: | 243 | err_free_mem: |
244 | release_mem_region(r->start, r->end - r->start + 1); | 244 | release_mem_region(r->start, resource_size(r)); |
245 | err_free_clk: | 245 | err_free_clk: |
246 | clk_put(pwm->clk); | 246 | clk_put(pwm->clk); |
247 | err_free: | 247 | err_free: |
@@ -271,7 +271,7 @@ static int __devexit pwm_remove(struct platform_device *pdev) | |||
271 | iounmap(pwm->mmio_base); | 271 | iounmap(pwm->mmio_base); |
272 | 272 | ||
273 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 273 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
274 | release_mem_region(r->start, r->end - r->start + 1); | 274 | release_mem_region(r->start, resource_size(r)); |
275 | 275 | ||
276 | clk_put(pwm->clk); | 276 | clk_put(pwm->clk); |
277 | kfree(pwm); | 277 | kfree(pwm); |
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-s3c/dev-nand.c index e771e77dcd54..a52fb6cf618f 100644 --- a/arch/arm/plat-s3c/dev-nand.c +++ b/arch/arm/plat-s3c/dev-nand.c | |||
@@ -58,8 +58,8 @@ static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | |||
58 | return -ENOMEM; | 58 | return -ENOMEM; |
59 | } | 59 | } |
60 | 60 | ||
61 | size = sizeof(int) * set->nr_chips; | 61 | if (set->nr_map && set->nr_chips) { |
62 | if (size) { | 62 | size = sizeof(int) * set->nr_chips; |
63 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | 63 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); |
64 | set->nr_map = ptr; | 64 | set->nr_map = ptr; |
65 | 65 | ||
@@ -114,7 +114,7 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |||
114 | 114 | ||
115 | for (i = 0; i < npd->nr_sets; i++) { | 115 | for (i = 0; i < npd->nr_sets; i++) { |
116 | ret = s3c_nand_copy_set(to); | 116 | ret = s3c_nand_copy_set(to); |
117 | if (!ret) { | 117 | if (ret) { |
118 | printk(KERN_ERR "%s: failed to copy set %d\n", | 118 | printk(KERN_ERR "%s: failed to copy set %d\n", |
119 | __func__, i); | 119 | __func__, i); |
120 | return; | 120 | return; |
@@ -122,6 +122,8 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |||
122 | to++; | 122 | to++; |
123 | } | 123 | } |
124 | } | 124 | } |
125 | |||
126 | s3c_device_nand.dev.platform_data = npd; | ||
125 | } | 127 | } |
126 | 128 | ||
127 | EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); | 129 | EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); |
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 932cbbbb4273..c1c20b023917 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h | |||
@@ -31,6 +31,7 @@ extern struct platform_device s3c64xx_device_iisv4; | |||
31 | extern struct platform_device s3c64xx_device_pcm0; | 31 | extern struct platform_device s3c64xx_device_pcm0; |
32 | extern struct platform_device s3c64xx_device_pcm1; | 32 | extern struct platform_device s3c64xx_device_pcm1; |
33 | 33 | ||
34 | extern struct platform_device s3c_device_ts; | ||
34 | extern struct platform_device s3c_device_fb; | 35 | extern struct platform_device s3c_device_fb; |
35 | extern struct platform_device s3c_device_usb; | 36 | extern struct platform_device s3c_device_usb; |
36 | extern struct platform_device s3c_device_lcd; | 37 | extern struct platform_device s3c_device_lcd; |
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index f52a92ce8dda..7f686a31e672 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c | |||
@@ -37,6 +37,8 @@ | |||
37 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
38 | #include <plat/regs-spi.h> | 38 | #include <plat/regs-spi.h> |
39 | 39 | ||
40 | #include <mach/ts.h> | ||
41 | |||
40 | /* Serial port registrations */ | 42 | /* Serial port registrations */ |
41 | 43 | ||
42 | static struct resource s3c2410_uart0_resource[] = { | 44 | static struct resource s3c2410_uart0_resource[] = { |
@@ -182,6 +184,22 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |||
182 | } | 184 | } |
183 | } | 185 | } |
184 | 186 | ||
187 | /* Touchscreen */ | ||
188 | struct platform_device s3c_device_ts = { | ||
189 | .name = "s3c2410-ts", | ||
190 | .id = -1, | ||
191 | }; | ||
192 | EXPORT_SYMBOL(s3c_device_ts); | ||
193 | |||
194 | static struct s3c2410_ts_mach_info s3c2410ts_info; | ||
195 | |||
196 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | ||
197 | { | ||
198 | memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info)); | ||
199 | s3c_device_ts.dev.platform_data = &s3c2410ts_info; | ||
200 | } | ||
201 | EXPORT_SYMBOL(s3c24xx_ts_set_platdata); | ||
202 | |||
185 | /* USB Device (Gadget)*/ | 203 | /* USB Device (Gadget)*/ |
186 | 204 | ||
187 | static struct resource s3c_usbgadget_resource[] = { | 205 | static struct resource s3c_usbgadget_resource[] = { |
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index 1364317d421e..12623a474b54 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c | |||
@@ -70,6 +70,7 @@ void __init s3c244x_map_io(void) | |||
70 | s3c_device_sdi.name = "s3c2440-sdi"; | 70 | s3c_device_sdi.name = "s3c2440-sdi"; |
71 | s3c_device_i2c0.name = "s3c2440-i2c"; | 71 | s3c_device_i2c0.name = "s3c2440-i2c"; |
72 | s3c_device_nand.name = "s3c2440-nand"; | 72 | s3c_device_nand.name = "s3c2440-nand"; |
73 | s3c_device_ts.name = "s3c2440-ts"; | ||
73 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; | 74 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; |
74 | } | 75 | } |
75 | 76 | ||
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index 6ffa21eb1b91..ffd56deb9e81 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c | |||
@@ -46,6 +46,7 @@ static struct clk clk_ext_xtal_mux = { | |||
46 | #define clk_fin_epll clk_ext_xtal_mux | 46 | #define clk_fin_epll clk_ext_xtal_mux |
47 | 47 | ||
48 | #define clk_fout_mpll clk_mpll | 48 | #define clk_fout_mpll clk_mpll |
49 | #define clk_fout_epll clk_epll | ||
49 | 50 | ||
50 | struct clk_sources { | 51 | struct clk_sources { |
51 | unsigned int nr_sources; | 52 | unsigned int nr_sources; |
@@ -88,11 +89,6 @@ static struct clksrc_clk clk_mout_apll = { | |||
88 | .sources = &clk_src_apll, | 89 | .sources = &clk_src_apll, |
89 | }; | 90 | }; |
90 | 91 | ||
91 | static struct clk clk_fout_epll = { | ||
92 | .name = "fout_epll", | ||
93 | .id = -1, | ||
94 | }; | ||
95 | |||
96 | static struct clk *clk_src_epll_list[] = { | 92 | static struct clk *clk_src_epll_list[] = { |
97 | [0] = &clk_fin_epll, | 93 | [0] = &clk_fin_epll, |
98 | [1] = &clk_fout_epll, | 94 | [1] = &clk_fout_epll, |
@@ -715,7 +711,6 @@ static struct clk *clks[] __initdata = { | |||
715 | &clk_iis_cd1, | 711 | &clk_iis_cd1, |
716 | &clk_pcm_cd, | 712 | &clk_pcm_cd, |
717 | &clk_mout_epll.clk, | 713 | &clk_mout_epll.clk, |
718 | &clk_fout_epll, | ||
719 | &clk_mout_mpll.clk, | 714 | &clk_mout_mpll.clk, |
720 | &clk_dout_mpll, | 715 | &clk_dout_mpll, |
721 | &clk_mmc0.clk, | 716 | &clk_mmc0.clk, |
@@ -760,7 +755,4 @@ void __init s3c6400_register_clocks(unsigned armclk_divlimit) | |||
760 | clkp->name, ret); | 755 | clkp->name, ret); |
761 | } | 756 | } |
762 | } | 757 | } |
763 | |||
764 | clk_mpll.parent = &clk_mout_mpll.clk; | ||
765 | clk_epll.parent = &clk_mout_epll.clk; | ||
766 | } | 758 | } |
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index c3a74ce24ef6..5a79fc6ee818 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
@@ -12,7 +12,7 @@ | |||
12 | # | 12 | # |
13 | # http://www.arm.linux.org.uk/developer/machines/?action=new | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
14 | # | 14 | # |
15 | # Last update: Wed Dec 16 20:06:34 2009 | 15 | # Last update: Thu Jan 28 22:15:54 2010 |
16 | # | 16 | # |
17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
18 | # | 18 | # |
@@ -2536,6 +2536,7 @@ davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 | |||
2536 | c3ax03 MACH_C3AX03 C3AX03 2549 | 2536 | c3ax03 MACH_C3AX03 C3AX03 2549 |
2537 | mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 | 2537 | mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 |
2538 | esyx MACH_ESYX ESYX 2551 | 2538 | esyx MACH_ESYX ESYX 2551 |
2539 | dove_db2 MACH_DOVE_DB2 DOVE_DB2 2552 | ||
2539 | bulldog MACH_BULLDOG BULLDOG 2553 | 2540 | bulldog MACH_BULLDOG BULLDOG 2553 |
2540 | derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554 | 2541 | derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554 |
2541 | bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555 | 2542 | bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555 |
@@ -2555,6 +2556,7 @@ iseo MACH_ISEO ISEO 2568 | |||
2555 | cezanne MACH_CEZANNE CEZANNE 2569 | 2556 | cezanne MACH_CEZANNE CEZANNE 2569 |
2556 | lucca MACH_LUCCA LUCCA 2570 | 2557 | lucca MACH_LUCCA LUCCA 2570 |
2557 | supersmart MACH_SUPERSMART SUPERSMART 2571 | 2558 | supersmart MACH_SUPERSMART SUPERSMART 2571 |
2559 | arm11_board MACH_CS_MISANO CS_MISANO 2572 | ||
2558 | magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573 | 2560 | magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573 |
2559 | emxx MACH_EMXX EMXX 2574 | 2561 | emxx MACH_EMXX EMXX 2574 |
2560 | outlaw MACH_OUTLAW OUTLAW 2575 | 2562 | outlaw MACH_OUTLAW OUTLAW 2575 |
@@ -2578,3 +2580,59 @@ glacier MACH_GLACIER GLACIER 2592 | |||
2578 | phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593 | 2580 | phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593 |
2579 | omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594 | 2581 | omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594 |
2580 | pca101 MACH_PCA101 PCA101 2595 | 2582 | pca101 MACH_PCA101 PCA101 2595 |
2583 | buzzc MACH_BUZZC BUZZC 2596 | ||
2584 | sasie2 MACH_SASIE2 SASIE2 2597 | ||
2585 | davinci_cio MACH_DAVINCI_CIO DAVINCI_CIO 2598 | ||
2586 | smartmeter_dl MACH_SMARTMETER_DL SMARTMETER_DL 2599 | ||
2587 | wzl6410 MACH_WZL6410 WZL6410 2600 | ||
2588 | wzl6410m MACH_WZL6410M WZL6410M 2601 | ||
2589 | wzl6410f MACH_WZL6410F WZL6410F 2602 | ||
2590 | wzl6410i MACH_WZL6410I WZL6410I 2603 | ||
2591 | spacecom1 MACH_SPACECOM1 SPACECOM1 2604 | ||
2592 | pingu920 MACH_PINGU920 PINGU920 2605 | ||
2593 | bravoc MACH_BRAVOC BRAVOC 2606 | ||
2594 | cybo2440 MACH_CYBO2440 CYBO2440 2607 | ||
2595 | vdssw MACH_VDSSW VDSSW 2608 | ||
2596 | romulus MACH_ROMULUS ROMULUS 2609 | ||
2597 | omap_magic MACH_OMAP_MAGIC OMAP_MAGIC 2610 | ||
2598 | eltd100 MACH_ELTD100 ELTD100 2611 | ||
2599 | capc7117 MACH_CAPC7117 CAPC7117 2612 | ||
2600 | swan MACH_SWAN SWAN 2613 | ||
2601 | veu MACH_VEU VEU 2614 | ||
2602 | rm2 MACH_RM2 RM2 2615 | ||
2603 | tt2100 MACH_TT2100 TT2100 2616 | ||
2604 | venice MACH_VENICE VENICE 2617 | ||
2605 | pc7323 MACH_PC7323 PC7323 2618 | ||
2606 | masp MACH_MASP MASP 2619 | ||
2607 | fujitsu_tvstbsoc0 MACH_FUJITSU_TVSTBSOC FUJITSU_TVSTBSOC 2620 | ||
2608 | fujitsu_tvstbsoc1 MACH_FUJITSU_TVSTBSOC1 FUJITSU_TVSTBSOC1 2621 | ||
2609 | lexikon MACH_LEXIKON LEXIKON 2622 | ||
2610 | mini2440v2 MACH_MINI2440V2 MINI2440V2 2623 | ||
2611 | icontrol MACH_ICONTROL ICONTROL 2624 | ||
2612 | sheevad MACH_SHEEVAD SHEEVAD 2625 | ||
2613 | qsd8x50a_st1_1 MACH_QSD8X50A_ST1_1 QSD8X50A_ST1_1 2626 | ||
2614 | qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 | ||
2615 | bee MACH_BEE BEE 2628 | ||
2616 | mx23evk MACH_MX23EVK MX23EVK 2629 | ||
2617 | ap4evb MACH_AP4EVB AP4EVB 2630 | ||
2618 | stockholm MACH_STOCKHOLM STOCKHOLM 2631 | ||
2619 | lpc_h3131 MACH_LPC_H3131 LPC_H3131 2632 | ||
2620 | stingray MACH_STINGRAY STINGRAY 2633 | ||
2621 | kraken MACH_KRAKEN KRAKEN 2634 | ||
2622 | gw2388 MACH_GW2388 GW2388 2635 | ||
2623 | jadecpu MACH_JADECPU JADECPU 2636 | ||
2624 | carlisle MACH_CARLISLE CARLISLE 2637 | ||
2625 | lux_sf9 MACH_LUX_SFT9 LUX_SFT9 2638 | ||
2626 | nemid_tb MACH_NEMID_TB NEMID_TB 2639 | ||
2627 | terrier MACH_TERRIER TERRIER 2640 | ||
2628 | turbot MACH_TURBOT TURBOT 2641 | ||
2629 | sanddab MACH_SANDDAB SANDDAB 2642 | ||
2630 | mx35_cicada MACH_MX35_CICADA MX35_CICADA 2643 | ||
2631 | ghi2703d MACH_GHI2703D GHI2703D 2644 | ||
2632 | lux_sfx9 MACH_LUX_SFX9 LUX_SFX9 2645 | ||
2633 | lux_sf9g MACH_LUX_SF9G LUX_SF9G 2646 | ||
2634 | lux_edk9 MACH_LUX_EDK9 LUX_EDK9 2647 | ||
2635 | hw90240 MACH_HW90240 HW90240 2648 | ||
2636 | dm365_leopard MACH_DM365_LEOPARD DM365_LEOPARD 2649 | ||
2637 | mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 | ||
2638 | scat110 MACH_SCAT110 SCAT110 2651 | ||
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index f60a5400a25b..a63c4be99b36 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -197,10 +197,13 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ | |||
197 | } | 197 | } |
198 | 198 | ||
199 | /* | 199 | /* |
200 | * Update the FPSCR with the additional exception flags. | 200 | * If any of the status flags are set, update the FPSCR. |
201 | * Comparison instructions always return at least one of | 201 | * Comparison instructions always return at least one of |
202 | * these flags set. | 202 | * these flags set. |
203 | */ | 203 | */ |
204 | if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) | ||
205 | fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); | ||
206 | |||
204 | fpscr |= exceptions; | 207 | fpscr |= exceptions; |
205 | 208 | ||
206 | fmxr(FPSCR, fpscr); | 209 | fmxr(FPSCR, fpscr); |