diff options
Diffstat (limited to 'arch/arm')
36 files changed, 294 insertions, 100 deletions
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index f2aa09eb658e..9137df539b61 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile | |||
@@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y) | |||
33 | 33 | ||
34 | $(obj)/xipImage: vmlinux FORCE | 34 | $(obj)/xipImage: vmlinux FORCE |
35 | $(call if_changed,objcopy) | 35 | $(call if_changed,objcopy) |
36 | $(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' | 36 | @$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))' |
37 | 37 | ||
38 | $(obj)/Image $(obj)/zImage: FORCE | 38 | $(obj)/Image $(obj)/zImage: FORCE |
39 | @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' | 39 | @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)' |
@@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE | |||
48 | 48 | ||
49 | $(obj)/Image: vmlinux FORCE | 49 | $(obj)/Image: vmlinux FORCE |
50 | $(call if_changed,objcopy) | 50 | $(call if_changed,objcopy) |
51 | $(kecho) ' Kernel: $@ is ready' | 51 | @$(kecho) ' Kernel: $@ is ready' |
52 | 52 | ||
53 | $(obj)/compressed/vmlinux: $(obj)/Image FORCE | 53 | $(obj)/compressed/vmlinux: $(obj)/Image FORCE |
54 | $(Q)$(MAKE) $(build)=$(obj)/compressed $@ | 54 | $(Q)$(MAKE) $(build)=$(obj)/compressed $@ |
55 | 55 | ||
56 | $(obj)/zImage: $(obj)/compressed/vmlinux FORCE | 56 | $(obj)/zImage: $(obj)/compressed/vmlinux FORCE |
57 | $(call if_changed,objcopy) | 57 | $(call if_changed,objcopy) |
58 | $(kecho) ' Kernel: $@ is ready' | 58 | @$(kecho) ' Kernel: $@ is ready' |
59 | 59 | ||
60 | endif | 60 | endif |
61 | 61 | ||
@@ -90,7 +90,7 @@ fi | |||
90 | $(obj)/uImage: $(obj)/zImage FORCE | 90 | $(obj)/uImage: $(obj)/zImage FORCE |
91 | @$(check_for_multiple_loadaddr) | 91 | @$(check_for_multiple_loadaddr) |
92 | $(call if_changed,uimage) | 92 | $(call if_changed,uimage) |
93 | $(kecho) ' Image $@ is ready' | 93 | @$(kecho) ' Image $@ is ready' |
94 | 94 | ||
95 | $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE | 95 | $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE |
96 | $(Q)$(MAKE) $(build)=$(obj)/bootp $@ | 96 | $(Q)$(MAKE) $(build)=$(obj)/bootp $@ |
@@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE | |||
98 | 98 | ||
99 | $(obj)/bootpImage: $(obj)/bootp/bootp FORCE | 99 | $(obj)/bootpImage: $(obj)/bootp/bootp FORCE |
100 | $(call if_changed,objcopy) | 100 | $(call if_changed,objcopy) |
101 | $(kecho) ' Kernel: $@ is ready' | 101 | @$(kecho) ' Kernel: $@ is ready' |
102 | 102 | ||
103 | PHONY += initrd FORCE | 103 | PHONY += initrd FORCE |
104 | initrd: | 104 | initrd: |
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index b1497c7d7d68..df7f2270fc91 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -73,8 +73,8 @@ | |||
73 | 73 | ||
74 | pinmux: pinmux { | 74 | pinmux: pinmux { |
75 | compatible = "nvidia,tegra30-pinmux"; | 75 | compatible = "nvidia,tegra30-pinmux"; |
76 | reg = <0x70000868 0xd0 /* Pad control registers */ | 76 | reg = <0x70000868 0xd4 /* Pad control registers */ |
77 | 0x70003000 0x3e0>; /* Mux registers */ | 77 | 0x70003000 0x3e4>; /* Mux registers */ |
78 | }; | 78 | }; |
79 | 79 | ||
80 | serial@70006000 { | 80 | serial@70006000 { |
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 35c1ed89b936..42f042ee4ada 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h | |||
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); | |||
64 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) | 64 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) |
65 | { | 65 | { |
66 | asm volatile("strh %1, %0" | 66 | asm volatile("strh %1, %0" |
67 | : "+Qo" (*(volatile u16 __force *)addr) | 67 | : "+Q" (*(volatile u16 __force *)addr) |
68 | : "r" (val)); | 68 | : "r" (val)); |
69 | } | 69 | } |
70 | 70 | ||
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) | |||
72 | { | 72 | { |
73 | u16 val; | 73 | u16 val; |
74 | asm volatile("ldrh %1, %0" | 74 | asm volatile("ldrh %1, %0" |
75 | : "+Qo" (*(volatile u16 __force *)addr), | 75 | : "+Q" (*(volatile u16 __force *)addr), |
76 | "=r" (val)); | 76 | "=r" (val)); |
77 | return val; | 77 | return val; |
78 | } | 78 | } |
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index 05b8e82ec9f5..e3f757263438 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h | |||
@@ -10,7 +10,5 @@ | |||
10 | 10 | ||
11 | extern void sched_clock_postinit(void); | 11 | extern void sched_clock_postinit(void); |
12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); | 12 | extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); |
13 | extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, | ||
14 | unsigned long rate); | ||
15 | 13 | ||
16 | #endif | 14 | #endif |
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index 6a6f1e485f41..301c1db3e99b 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h | |||
@@ -27,9 +27,9 @@ | |||
27 | #if __LINUX_ARM_ARCH__ <= 6 | 27 | #if __LINUX_ARM_ARCH__ <= 6 |
28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 28 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
29 | ldr \tmp, [\tmp, #0] | 29 | ldr \tmp, [\tmp, #0] |
30 | tst \tmp, #HWCAP_VFPv3D16 | 30 | tst \tmp, #HWCAP_VFPD32 |
31 | ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} | 31 | ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
32 | addne \base, \base, #32*4 @ step over unused register space | 32 | addeq \base, \base, #32*4 @ step over unused register space |
33 | #else | 33 | #else |
34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 34 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 35 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
@@ -51,9 +51,9 @@ | |||
51 | #if __LINUX_ARM_ARCH__ <= 6 | 51 | #if __LINUX_ARM_ARCH__ <= 6 |
52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs | 52 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
53 | ldr \tmp, [\tmp, #0] | 53 | ldr \tmp, [\tmp, #0] |
54 | tst \tmp, #HWCAP_VFPv3D16 | 54 | tst \tmp, #HWCAP_VFPD32 |
55 | stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} | 55 | stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
56 | addne \base, \base, #32*4 @ step over unused register space | 56 | addeq \base, \base, #32*4 @ step over unused register space |
57 | #else | 57 | #else |
58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | 58 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | 59 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index f254f6503cce..3688fd15a32d 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h | |||
@@ -18,11 +18,12 @@ | |||
18 | #define HWCAP_THUMBEE (1 << 11) | 18 | #define HWCAP_THUMBEE (1 << 11) |
19 | #define HWCAP_NEON (1 << 12) | 19 | #define HWCAP_NEON (1 << 12) |
20 | #define HWCAP_VFPv3 (1 << 13) | 20 | #define HWCAP_VFPv3 (1 << 13) |
21 | #define HWCAP_VFPv3D16 (1 << 14) | 21 | #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ |
22 | #define HWCAP_TLS (1 << 15) | 22 | #define HWCAP_TLS (1 << 15) |
23 | #define HWCAP_VFPv4 (1 << 16) | 23 | #define HWCAP_VFPv4 (1 << 16) |
24 | #define HWCAP_IDIVA (1 << 17) | 24 | #define HWCAP_IDIVA (1 << 17) |
25 | #define HWCAP_IDIVT (1 << 18) | 25 | #define HWCAP_IDIVT (1 << 18) |
26 | #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ | ||
26 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) | 27 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) |
27 | 28 | ||
28 | 29 | ||
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index e21bac20d90d..fc6692e2b603 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c | |||
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks) | |||
107 | update_sched_clock(); | 107 | update_sched_clock(); |
108 | } | 108 | } |
109 | 109 | ||
110 | void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, | ||
111 | unsigned long rate) | ||
112 | { | ||
113 | setup_sched_clock(read, bits, rate); | ||
114 | cd.needs_suspend = true; | ||
115 | } | ||
116 | |||
117 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) | 110 | void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) |
118 | { | 111 | { |
119 | unsigned long r, w; | 112 | unsigned long r, w; |
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void) | |||
189 | static int sched_clock_suspend(void) | 182 | static int sched_clock_suspend(void) |
190 | { | 183 | { |
191 | sched_clock_poll(sched_clock_timer.data); | 184 | sched_clock_poll(sched_clock_timer.data); |
192 | if (cd.needs_suspend) | 185 | cd.suspended = true; |
193 | cd.suspended = true; | ||
194 | return 0; | 186 | return 0; |
195 | } | 187 | } |
196 | 188 | ||
197 | static void sched_clock_resume(void) | 189 | static void sched_clock_resume(void) |
198 | { | 190 | { |
199 | if (cd.needs_suspend) { | 191 | cd.epoch_cyc = read_sched_clock(); |
200 | cd.epoch_cyc = read_sched_clock(); | 192 | cd.epoch_cyc_copy = cd.epoch_cyc; |
201 | cd.epoch_cyc_copy = cd.epoch_cyc; | 193 | cd.suspended = false; |
202 | cd.suspended = false; | ||
203 | } | ||
204 | } | 194 | } |
205 | 195 | ||
206 | static struct syscore_ops sched_clock_ops = { | 196 | static struct syscore_ops sched_clock_ops = { |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 1e122bcd7845..3cee0e6ea7c3 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
68 | 68 | ||
69 | /* Enable overcurrent notification */ | 69 | /* Enable overcurrent notification */ |
70 | for (i = 0; i < data->ports; i++) { | 70 | for (i = 0; i < data->ports; i++) { |
71 | if (data->overcurrent_pin[i]) | 71 | if (gpio_is_valid(data->overcurrent_pin[i])) |
72 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | 72 | at91_set_gpio_input(data->overcurrent_pin[i], 1); |
73 | } | 73 | } |
74 | 74 | ||
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index aa1e58729885..414bd855fb0c 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
72 | 72 | ||
73 | /* Enable overcurrent notification */ | 73 | /* Enable overcurrent notification */ |
74 | for (i = 0; i < data->ports; i++) { | 74 | for (i = 0; i < data->ports; i++) { |
75 | if (data->overcurrent_pin[i]) | 75 | if (gpio_is_valid(data->overcurrent_pin[i])) |
76 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | 76 | at91_set_gpio_input(data->overcurrent_pin[i], 1); |
77 | } | 77 | } |
78 | 78 | ||
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index b9487696b7be..cd604aad8e96 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
72 | 72 | ||
73 | /* Enable overcurrent notification */ | 73 | /* Enable overcurrent notification */ |
74 | for (i = 0; i < data->ports; i++) { | 74 | for (i = 0; i < data->ports; i++) { |
75 | if (data->overcurrent_pin[i]) | 75 | if (gpio_is_valid(data->overcurrent_pin[i])) |
76 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | 76 | at91_set_gpio_input(data->overcurrent_pin[i], 1); |
77 | } | 77 | } |
78 | 78 | ||
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index cb85da2eccea..9c61e59a2104 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
78 | 78 | ||
79 | /* Enable overcurrent notification */ | 79 | /* Enable overcurrent notification */ |
80 | for (i = 0; i < data->ports; i++) { | 80 | for (i = 0; i < data->ports; i++) { |
81 | if (data->overcurrent_pin[i]) | 81 | if (gpio_is_valid(data->overcurrent_pin[i])) |
82 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | 82 | at91_set_gpio_input(data->overcurrent_pin[i], 1); |
83 | } | 83 | } |
84 | 84 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index b1596072dcc2..fcd233cb33d2 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = { | |||
1841 | .flags = IORESOURCE_MEM, | 1841 | .flags = IORESOURCE_MEM, |
1842 | }, | 1842 | }, |
1843 | [1] = { | 1843 | [1] = { |
1844 | .start = AT91SAM9G45_ID_AESTDESSHA, | 1844 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, |
1845 | .end = AT91SAM9G45_ID_AESTDESSHA, | 1845 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, |
1846 | .flags = IORESOURCE_IRQ, | 1846 | .flags = IORESOURCE_IRQ, |
1847 | }, | 1847 | }, |
1848 | }; | 1848 | }; |
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = { | |||
1874 | .flags = IORESOURCE_MEM, | 1874 | .flags = IORESOURCE_MEM, |
1875 | }, | 1875 | }, |
1876 | [1] = { | 1876 | [1] = { |
1877 | .start = AT91SAM9G45_ID_AESTDESSHA, | 1877 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, |
1878 | .end = AT91SAM9G45_ID_AESTDESSHA, | 1878 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, |
1879 | .flags = IORESOURCE_IRQ, | 1879 | .flags = IORESOURCE_IRQ, |
1880 | }, | 1880 | }, |
1881 | }; | 1881 | }; |
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = { | |||
1910 | .flags = IORESOURCE_MEM, | 1910 | .flags = IORESOURCE_MEM, |
1911 | }, | 1911 | }, |
1912 | [1] = { | 1912 | [1] = { |
1913 | .start = AT91SAM9G45_ID_AESTDESSHA, | 1913 | .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, |
1914 | .end = AT91SAM9G45_ID_AESTDESSHA, | 1914 | .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA, |
1915 | .flags = IORESOURCE_IRQ, | 1915 | .flags = IORESOURCE_IRQ, |
1916 | }, | 1916 | }, |
1917 | }; | 1917 | }; |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index cd0c8b1e1ecf..14e9947bad6e 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type, | |||
713 | break; | 713 | break; |
714 | case VPBE_ENC_CUSTOM_TIMINGS: | 714 | case VPBE_ENC_CUSTOM_TIMINGS: |
715 | if (pclock <= 27000000) { | 715 | if (pclock <= 27000000) { |
716 | v |= DM644X_VPSS_MUXSEL_PLL2_MODE | | 716 | v |= DM644X_VPSS_DACCLKEN; |
717 | DM644X_VPSS_DACCLKEN; | ||
718 | writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); | 717 | writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); |
719 | } else { | 718 | } else { |
720 | /* | 719 | /* |
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index 21d568b3b149..87e07d6fc615 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void) | |||
275 | exynos_pdma1_pdata.nr_valid_peri = | 275 | exynos_pdma1_pdata.nr_valid_peri = |
276 | ARRAY_SIZE(exynos4210_pdma1_peri); | 276 | ARRAY_SIZE(exynos4210_pdma1_peri); |
277 | exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; | 277 | exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; |
278 | |||
279 | if (samsung_rev() == EXYNOS4210_REV_0) | ||
280 | exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1; | ||
278 | } else if (soc_is_exynos4212() || soc_is_exynos4412()) { | 281 | } else if (soc_is_exynos4212() || soc_is_exynos4412()) { |
279 | exynos_pdma0_pdata.nr_valid_peri = | 282 | exynos_pdma0_pdata.nr_valid_peri = |
280 | ARRAY_SIZE(exynos4212_pdma0_peri); | 283 | ARRAY_SIZE(exynos4212_pdma0_peri); |
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 8480849affb9..ed4da4544cd2 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h | |||
@@ -90,6 +90,7 @@ | |||
90 | 90 | ||
91 | #define EXYNOS4_PA_MDMA0 0x10810000 | 91 | #define EXYNOS4_PA_MDMA0 0x10810000 |
92 | #define EXYNOS4_PA_MDMA1 0x12850000 | 92 | #define EXYNOS4_PA_MDMA1 0x12850000 |
93 | #define EXYNOS4_PA_S_MDMA1 0x12840000 | ||
93 | #define EXYNOS4_PA_PDMA0 0x12680000 | 94 | #define EXYNOS4_PA_PDMA0 0x12680000 |
94 | #define EXYNOS4_PA_PDMA1 0x12690000 | 95 | #define EXYNOS4_PA_PDMA1 0x12690000 |
95 | #define EXYNOS5_PA_MDMA0 0x10800000 | 96 | #define EXYNOS5_PA_MDMA0 0x10800000 |
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index 82c27230d4a9..86e37cd9376c 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c | |||
@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd) | |||
28 | hignbank_set_pwr_soft_reset(); | 28 | hignbank_set_pwr_soft_reset(); |
29 | 29 | ||
30 | scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); | 30 | scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); |
31 | cpu_do_idle(); | 31 | while (1) |
32 | cpu_do_idle(); | ||
32 | } | 33 | } |
33 | 34 | ||
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c index 3c1b8ff9a0a6..cc49c7ae186e 100644 --- a/arch/arm/mach-imx/clk-gate2.c +++ b/arch/arm/mach-imx/clk-gate2.c | |||
@@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name, | |||
112 | 112 | ||
113 | clk = clk_register(dev, &gate->hw); | 113 | clk = clk_register(dev, &gate->hw); |
114 | if (IS_ERR(clk)) | 114 | if (IS_ERR(clk)) |
115 | kfree(clk); | 115 | kfree(gate); |
116 | 116 | ||
117 | return clk; | 117 | return clk; |
118 | } | 118 | } |
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c index 412c583a24b0..576af7446952 100644 --- a/arch/arm/mach-imx/ehci-imx25.c +++ b/arch/arm/mach-imx/ehci-imx25.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #define MX25_H1_SIC_SHIFT 21 | 30 | #define MX25_H1_SIC_SHIFT 21 |
31 | #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) | 31 | #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) |
32 | #define MX25_H1_PP_BIT (1 << 18) | 32 | #define MX25_H1_PP_BIT (1 << 18) |
33 | #define MX25_H1_PM_BIT (1 << 8) | 33 | #define MX25_H1_PM_BIT (1 << 16) |
34 | #define MX25_H1_IPPUE_UP_BIT (1 << 7) | 34 | #define MX25_H1_IPPUE_UP_BIT (1 << 7) |
35 | #define MX25_H1_IPPUE_DOWN_BIT (1 << 6) | 35 | #define MX25_H1_IPPUE_DOWN_BIT (1 << 6) |
36 | #define MX25_H1_TLL_BIT (1 << 5) | 36 | #define MX25_H1_TLL_BIT (1 << 5) |
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c index 779e16eb65cb..293397852e4e 100644 --- a/arch/arm/mach-imx/ehci-imx35.c +++ b/arch/arm/mach-imx/ehci-imx35.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #define MX35_H1_SIC_SHIFT 21 | 30 | #define MX35_H1_SIC_SHIFT 21 |
31 | #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) | 31 | #define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) |
32 | #define MX35_H1_PP_BIT (1 << 18) | 32 | #define MX35_H1_PP_BIT (1 << 18) |
33 | #define MX35_H1_PM_BIT (1 << 8) | 33 | #define MX35_H1_PM_BIT (1 << 16) |
34 | #define MX35_H1_IPPUE_UP_BIT (1 << 7) | 34 | #define MX35_H1_IPPUE_UP_BIT (1 << 7) |
35 | #define MX35_H1_IPPUE_DOWN_BIT (1 << 6) | 35 | #define MX35_H1_IPPUE_DOWN_BIT (1 << 6) |
36 | #define MX35_H1_TLL_BIT (1 << 5) | 36 | #define MX35_H1_TLL_BIT (1 << 5) |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 48d5e41dfbfa..378590694447 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void) | |||
580 | } else | 580 | } else |
581 | return; | 581 | return; |
582 | 582 | ||
583 | /* Make sure that the GPIO pins are muxed correctly */ | ||
584 | omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT); | ||
585 | omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT); | ||
586 | omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT); | ||
587 | |||
583 | err = gpio_request_array(igep_wlan_bt_gpios, | 588 | err = gpio_request_array(igep_wlan_bt_gpios, |
584 | ARRAY_SIZE(igep_wlan_bt_gpios)); | 589 | ARRAY_SIZE(igep_wlan_bt_gpios)); |
585 | if (err) { | 590 | if (err) { |
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index b56d06b48782..95192a062d5d 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c | |||
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = { | |||
359 | .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS, | 359 | .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS, |
360 | .wkdep_srcs = iss_wkup_sleep_deps, | 360 | .wkdep_srcs = iss_wkup_sleep_deps, |
361 | .sleepdep_srcs = iss_wkup_sleep_deps, | 361 | .sleepdep_srcs = iss_wkup_sleep_deps, |
362 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 362 | .flags = CLKDM_CAN_SWSUP, |
363 | }; | 363 | }; |
364 | 364 | ||
365 | static struct clockdomain l3_dss_44xx_clkdm = { | 365 | static struct clockdomain l3_dss_44xx_clkdm = { |
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index 48daac2581b4..84551f205e46 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c | |||
@@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | |||
64 | struct spi_board_info *spi_bi = &ads7846_spi_board_info; | 64 | struct spi_board_info *spi_bi = &ads7846_spi_board_info; |
65 | int err; | 65 | int err; |
66 | 66 | ||
67 | err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); | 67 | /* |
68 | if (err) { | 68 | * If a board defines get_pendown_state() function, request the pendown |
69 | pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); | 69 | * GPIO and set the GPIO debounce time. |
70 | return; | 70 | * If a board does not define the get_pendown_state() function, then |
71 | } | 71 | * the ads7846 driver will setup the pendown GPIO itself. |
72 | */ | ||
73 | if (board_pdata && board_pdata->get_pendown_state) { | ||
74 | err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown"); | ||
75 | if (err) { | ||
76 | pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err); | ||
77 | return; | ||
78 | } | ||
72 | 79 | ||
73 | if (gpio_debounce) | 80 | if (gpio_debounce) |
74 | gpio_set_debounce(gpio_pendown, gpio_debounce); | 81 | gpio_set_debounce(gpio_pendown, gpio_debounce); |
82 | |||
83 | gpio_export(gpio_pendown, 0); | ||
84 | } | ||
75 | 85 | ||
76 | spi_bi->bus_num = bus_num; | 86 | spi_bi->bus_num = bus_num; |
77 | spi_bi->irq = gpio_to_irq(gpio_pendown); | 87 | spi_bi->irq = gpio_to_irq(gpio_pendown); |
78 | 88 | ||
89 | ads7846_config.gpio_pendown = gpio_pendown; | ||
90 | |||
79 | if (board_pdata) { | 91 | if (board_pdata) { |
80 | board_pdata->gpio_pendown = gpio_pendown; | 92 | board_pdata->gpio_pendown = gpio_pendown; |
93 | board_pdata->gpio_pendown_debounce = gpio_debounce; | ||
81 | spi_bi->platform_data = board_pdata; | 94 | spi_bi->platform_data = board_pdata; |
82 | if (board_pdata->get_pendown_state) | ||
83 | gpio_export(gpio_pendown, 0); | ||
84 | } else { | ||
85 | ads7846_config.gpio_pendown = gpio_pendown; | ||
86 | } | 95 | } |
87 | 96 | ||
88 | if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state)) | ||
89 | gpio_free(gpio_pendown); | ||
90 | |||
91 | spi_register_board_info(&ads7846_spi_board_info, 1); | 97 | spi_register_board_info(&ads7846_spi_board_info, 1); |
92 | } | 98 | } |
93 | #else | 99 | #else |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index cba60e05e32e..c72b5a727720 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/pinctrl/machine.h> | 20 | #include <linux/pinctrl/machine.h> |
21 | #include <linux/platform_data/omap4-keypad.h> | 21 | #include <linux/platform_data/omap4-keypad.h> |
22 | #include <linux/platform_data/omap_ocp2scp.h> | ||
22 | 23 | ||
23 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
24 | #include <asm/mach/map.h> | 25 | #include <asm/mach/map.h> |
@@ -613,6 +614,83 @@ static void omap_init_vout(void) | |||
613 | static inline void omap_init_vout(void) {} | 614 | static inline void omap_init_vout(void) {} |
614 | #endif | 615 | #endif |
615 | 616 | ||
617 | #if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE) | ||
618 | static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev) | ||
619 | { | ||
620 | int cnt = 0; | ||
621 | |||
622 | while (ocp2scp_dev->drv_name != NULL) { | ||
623 | cnt++; | ||
624 | ocp2scp_dev++; | ||
625 | } | ||
626 | |||
627 | return cnt; | ||
628 | } | ||
629 | |||
630 | static void omap_init_ocp2scp(void) | ||
631 | { | ||
632 | struct omap_hwmod *oh; | ||
633 | struct platform_device *pdev; | ||
634 | int bus_id = -1, dev_cnt = 0, i; | ||
635 | struct omap_ocp2scp_dev *ocp2scp_dev; | ||
636 | const char *oh_name, *name; | ||
637 | struct omap_ocp2scp_platform_data *pdata; | ||
638 | |||
639 | if (!cpu_is_omap44xx()) | ||
640 | return; | ||
641 | |||
642 | oh_name = "ocp2scp_usb_phy"; | ||
643 | name = "omap-ocp2scp"; | ||
644 | |||
645 | oh = omap_hwmod_lookup(oh_name); | ||
646 | if (!oh) { | ||
647 | pr_err("%s: could not find omap_hwmod for %s\n", __func__, | ||
648 | oh_name); | ||
649 | return; | ||
650 | } | ||
651 | |||
652 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | ||
653 | if (!pdata) { | ||
654 | pr_err("%s: No memory for ocp2scp pdata\n", __func__); | ||
655 | return; | ||
656 | } | ||
657 | |||
658 | ocp2scp_dev = oh->dev_attr; | ||
659 | dev_cnt = count_ocp2scp_devices(ocp2scp_dev); | ||
660 | |||
661 | if (!dev_cnt) { | ||
662 | pr_err("%s: No devices connected to ocp2scp\n", __func__); | ||
663 | kfree(pdata); | ||
664 | return; | ||
665 | } | ||
666 | |||
667 | pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *) | ||
668 | * dev_cnt, GFP_KERNEL); | ||
669 | if (!pdata->devices) { | ||
670 | pr_err("%s: No memory for ocp2scp pdata devices\n", __func__); | ||
671 | kfree(pdata); | ||
672 | return; | ||
673 | } | ||
674 | |||
675 | for (i = 0; i < dev_cnt; i++, ocp2scp_dev++) | ||
676 | pdata->devices[i] = ocp2scp_dev; | ||
677 | |||
678 | pdata->dev_cnt = dev_cnt; | ||
679 | |||
680 | pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL, | ||
681 | 0, false); | ||
682 | if (IS_ERR(pdev)) { | ||
683 | pr_err("Could not build omap_device for %s %s\n", | ||
684 | name, oh_name); | ||
685 | kfree(pdata->devices); | ||
686 | kfree(pdata); | ||
687 | return; | ||
688 | } | ||
689 | } | ||
690 | #else | ||
691 | static inline void omap_init_ocp2scp(void) { } | ||
692 | #endif | ||
693 | |||
616 | /*-------------------------------------------------------------------------*/ | 694 | /*-------------------------------------------------------------------------*/ |
617 | 695 | ||
618 | static int __init omap2_init_devices(void) | 696 | static int __init omap2_init_devices(void) |
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void) | |||
640 | omap_init_sham(); | 718 | omap_init_sham(); |
641 | omap_init_aes(); | 719 | omap_init_aes(); |
642 | omap_init_vout(); | 720 | omap_init_vout(); |
721 | omap_init_ocp2scp(); | ||
643 | 722 | ||
644 | return 0; | 723 | return 0; |
645 | } | 724 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b969ab1d258b..87cc6d058de2 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -422,6 +422,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v) | |||
422 | } | 422 | } |
423 | 423 | ||
424 | /** | 424 | /** |
425 | * _wait_softreset_complete - wait for an OCP softreset to complete | ||
426 | * @oh: struct omap_hwmod * to wait on | ||
427 | * | ||
428 | * Wait until the IP block represented by @oh reports that its OCP | ||
429 | * softreset is complete. This can be triggered by software (see | ||
430 | * _ocp_softreset()) or by hardware upon returning from off-mode (one | ||
431 | * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT | ||
432 | * microseconds. Returns the number of microseconds waited. | ||
433 | */ | ||
434 | static int _wait_softreset_complete(struct omap_hwmod *oh) | ||
435 | { | ||
436 | struct omap_hwmod_class_sysconfig *sysc; | ||
437 | u32 softrst_mask; | ||
438 | int c = 0; | ||
439 | |||
440 | sysc = oh->class->sysc; | ||
441 | |||
442 | if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) | ||
443 | omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) | ||
444 | & SYSS_RESETDONE_MASK), | ||
445 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
446 | else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { | ||
447 | softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); | ||
448 | omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) | ||
449 | & softrst_mask), | ||
450 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
451 | } | ||
452 | |||
453 | return c; | ||
454 | } | ||
455 | |||
456 | /** | ||
425 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v | 457 | * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v |
426 | * @oh: struct omap_hwmod * | 458 | * @oh: struct omap_hwmod * |
427 | * | 459 | * |
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh) | |||
1282 | if (!oh->class->sysc) | 1314 | if (!oh->class->sysc) |
1283 | return; | 1315 | return; |
1284 | 1316 | ||
1317 | /* | ||
1318 | * Wait until reset has completed, this is needed as the IP | ||
1319 | * block is reset automatically by hardware in some cases | ||
1320 | * (off-mode for example), and the drivers require the | ||
1321 | * IP to be ready when they access it | ||
1322 | */ | ||
1323 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) | ||
1324 | _enable_optional_clocks(oh); | ||
1325 | _wait_softreset_complete(oh); | ||
1326 | if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) | ||
1327 | _disable_optional_clocks(oh); | ||
1328 | |||
1285 | v = oh->_sysc_cache; | 1329 | v = oh->_sysc_cache; |
1286 | sf = oh->class->sysc->sysc_flags; | 1330 | sf = oh->class->sysc->sysc_flags; |
1287 | 1331 | ||
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh) | |||
1804 | */ | 1848 | */ |
1805 | static int _ocp_softreset(struct omap_hwmod *oh) | 1849 | static int _ocp_softreset(struct omap_hwmod *oh) |
1806 | { | 1850 | { |
1807 | u32 v, softrst_mask; | 1851 | u32 v; |
1808 | int c = 0; | 1852 | int c = 0; |
1809 | int ret = 0; | 1853 | int ret = 0; |
1810 | 1854 | ||
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh) | |||
1834 | if (oh->class->sysc->srst_udelay) | 1878 | if (oh->class->sysc->srst_udelay) |
1835 | udelay(oh->class->sysc->srst_udelay); | 1879 | udelay(oh->class->sysc->srst_udelay); |
1836 | 1880 | ||
1837 | if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) | 1881 | c = _wait_softreset_complete(oh); |
1838 | omap_test_timeout((omap_hwmod_read(oh, | ||
1839 | oh->class->sysc->syss_offs) | ||
1840 | & SYSS_RESETDONE_MASK), | ||
1841 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
1842 | else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { | ||
1843 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); | ||
1844 | omap_test_timeout(!(omap_hwmod_read(oh, | ||
1845 | oh->class->sysc->sysc_offs) | ||
1846 | & softrst_mask), | ||
1847 | MAX_MODULE_SOFTRESET_WAIT, c); | ||
1848 | } | ||
1849 | |||
1850 | if (c == MAX_MODULE_SOFTRESET_WAIT) | 1882 | if (c == MAX_MODULE_SOFTRESET_WAIT) |
1851 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", | 1883 | pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", |
1852 | oh->name, MAX_MODULE_SOFTRESET_WAIT); | 1884 | oh->name, MAX_MODULE_SOFTRESET_WAIT); |
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh) | |||
2352 | if (oh->_state != _HWMOD_STATE_INITIALIZED) | 2384 | if (oh->_state != _HWMOD_STATE_INITIALIZED) |
2353 | return -EINVAL; | 2385 | return -EINVAL; |
2354 | 2386 | ||
2387 | if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) | ||
2388 | return -EPERM; | ||
2389 | |||
2355 | if (oh->rst_lines_cnt == 0) { | 2390 | if (oh->rst_lines_cnt == 0) { |
2356 | r = _enable(oh); | 2391 | r = _enable(oh); |
2357 | if (r) { | 2392 | if (r) { |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 652d0285bd6d..0b1249e00398 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/platform_data/gpio-omap.h> | 22 | #include <linux/platform_data/gpio-omap.h> |
23 | #include <linux/power/smartreflex.h> | 23 | #include <linux/power/smartreflex.h> |
24 | #include <linux/platform_data/omap_ocp2scp.h> | ||
24 | 25 | ||
25 | #include <plat/omap_hwmod.h> | 26 | #include <plat/omap_hwmod.h> |
26 | #include <plat/i2c.h> | 27 | #include <plat/i2c.h> |
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | |||
2125 | .name = "mcpdm", | 2126 | .name = "mcpdm", |
2126 | .class = &omap44xx_mcpdm_hwmod_class, | 2127 | .class = &omap44xx_mcpdm_hwmod_class, |
2127 | .clkdm_name = "abe_clkdm", | 2128 | .clkdm_name = "abe_clkdm", |
2129 | /* | ||
2130 | * It's suspected that the McPDM requires an off-chip main | ||
2131 | * functional clock, controlled via I2C. This IP block is | ||
2132 | * currently reset very early during boot, before I2C is | ||
2133 | * available, so it doesn't seem that we have any choice in | ||
2134 | * the kernel other than to avoid resetting it. | ||
2135 | */ | ||
2136 | .flags = HWMOD_EXT_OPT_MAIN_CLK, | ||
2128 | .mpu_irqs = omap44xx_mcpdm_irqs, | 2137 | .mpu_irqs = omap44xx_mcpdm_irqs, |
2129 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, | 2138 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, |
2130 | .main_clk = "mcpdm_fck", | 2139 | .main_clk = "mcpdm_fck", |
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = { | |||
2681 | .sysc = &omap44xx_ocp2scp_sysc, | 2690 | .sysc = &omap44xx_ocp2scp_sysc, |
2682 | }; | 2691 | }; |
2683 | 2692 | ||
2693 | /* ocp2scp dev_attr */ | ||
2694 | static struct resource omap44xx_usb_phy_and_pll_addrs[] = { | ||
2695 | { | ||
2696 | .name = "usb_phy", | ||
2697 | .start = 0x4a0ad080, | ||
2698 | .end = 0x4a0ae000, | ||
2699 | .flags = IORESOURCE_MEM, | ||
2700 | }, | ||
2701 | { | ||
2702 | /* XXX: Remove this once control module driver is in place */ | ||
2703 | .name = "ctrl_dev", | ||
2704 | .start = 0x4a002300, | ||
2705 | .end = 0x4a002303, | ||
2706 | .flags = IORESOURCE_MEM, | ||
2707 | }, | ||
2708 | { } | ||
2709 | }; | ||
2710 | |||
2711 | static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = { | ||
2712 | { | ||
2713 | .drv_name = "omap-usb2", | ||
2714 | .res = omap44xx_usb_phy_and_pll_addrs, | ||
2715 | }, | ||
2716 | { } | ||
2717 | }; | ||
2718 | |||
2684 | /* ocp2scp_usb_phy */ | 2719 | /* ocp2scp_usb_phy */ |
2685 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | 2720 | static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { |
2686 | .name = "ocp2scp_usb_phy", | 2721 | .name = "ocp2scp_usb_phy", |
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { | |||
2694 | .modulemode = MODULEMODE_HWCTRL, | 2729 | .modulemode = MODULEMODE_HWCTRL, |
2695 | }, | 2730 | }, |
2696 | }, | 2731 | }, |
2732 | .dev_attr = ocp2scp_dev_attr, | ||
2697 | }; | 2733 | }; |
2698 | 2734 | ||
2699 | /* | 2735 | /* |
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index 635e109f5ad3..a256135d8e48 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c | |||
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type, | |||
73 | { | 73 | { |
74 | /* PMIC part*/ | 74 | /* PMIC part*/ |
75 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); | 75 | omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); |
76 | omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT); | ||
76 | omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); | 77 | omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data); |
77 | 78 | ||
78 | /* Register additional devices on i2c1 bus if needed */ | 79 | /* Register additional devices on i2c1 bus if needed */ |
@@ -366,7 +367,7 @@ static struct regulator_init_data omap4_clk32kg_idata = { | |||
366 | }; | 367 | }; |
367 | 368 | ||
368 | static struct regulator_consumer_supply omap4_vdd1_supply[] = { | 369 | static struct regulator_consumer_supply omap4_vdd1_supply[] = { |
369 | REGULATOR_SUPPLY("vcc", "mpu.0"), | 370 | REGULATOR_SUPPLY("vcc", "cpu0"), |
370 | }; | 371 | }; |
371 | 372 | ||
372 | static struct regulator_consumer_supply omap4_vdd2_supply[] = { | 373 | static struct regulator_consumer_supply omap4_vdd2_supply[] = { |
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 880249b17012..75878c37959b 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c | |||
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) | |||
264 | 264 | ||
265 | if (initialized) { | 265 | if (initialized) { |
266 | if (voltdm->pmic->i2c_high_speed != i2c_high_speed) | 266 | if (voltdm->pmic->i2c_high_speed != i2c_high_speed) |
267 | pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).", | 267 | pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n", |
268 | __func__, voltdm->name, i2c_high_speed); | 268 | __func__, voltdm->name, i2c_high_speed); |
269 | return; | 269 | return; |
270 | } | 270 | } |
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index 5ecbd17b5641..e2c6391863fe 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/mfd/asic3.h> | 28 | #include <linux/mfd/asic3.h> |
29 | #include <linux/mtd/physmap.h> | 29 | #include <linux/mtd/physmap.h> |
30 | #include <linux/pda_power.h> | 30 | #include <linux/pda_power.h> |
31 | #include <linux/pwm.h> | ||
31 | #include <linux/pwm_backlight.h> | 32 | #include <linux/pwm_backlight.h> |
32 | #include <linux/regulator/driver.h> | 33 | #include <linux/regulator/driver.h> |
33 | #include <linux/regulator/gpio-regulator.h> | 34 | #include <linux/regulator/gpio-regulator.h> |
@@ -556,7 +557,7 @@ static struct platform_device hx4700_lcd = { | |||
556 | */ | 557 | */ |
557 | 558 | ||
558 | static struct platform_pwm_backlight_data backlight_data = { | 559 | static struct platform_pwm_backlight_data backlight_data = { |
559 | .pwm_id = 1, | 560 | .pwm_id = -1, /* Superseded by pwm_lookup */ |
560 | .max_brightness = 200, | 561 | .max_brightness = 200, |
561 | .dft_brightness = 100, | 562 | .dft_brightness = 100, |
562 | .pwm_period_ns = 30923, | 563 | .pwm_period_ns = 30923, |
@@ -571,6 +572,10 @@ static struct platform_device backlight = { | |||
571 | }, | 572 | }, |
572 | }; | 573 | }; |
573 | 574 | ||
575 | static struct pwm_lookup hx4700_pwm_lookup[] = { | ||
576 | PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL), | ||
577 | }; | ||
578 | |||
574 | /* | 579 | /* |
575 | * USB "Transceiver" | 580 | * USB "Transceiver" |
576 | */ | 581 | */ |
@@ -872,6 +877,7 @@ static void __init hx4700_init(void) | |||
872 | pxa_set_stuart_info(NULL); | 877 | pxa_set_stuart_info(NULL); |
873 | 878 | ||
874 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 879 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
880 | pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup)); | ||
875 | 881 | ||
876 | pxa_set_ficp_info(&ficp_info); | 882 | pxa_set_ficp_info(&ficp_info); |
877 | pxa27x_set_i2c_power_info(NULL); | 883 | pxa27x_set_i2c_power_info(NULL); |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 438f02fe122a..842596d4d31e 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -86,10 +86,7 @@ static void spitz_discharge1(int on) | |||
86 | gpio_set_value(SPITZ_GPIO_LED_GREEN, on); | 86 | gpio_set_value(SPITZ_GPIO_LED_GREEN, on); |
87 | } | 87 | } |
88 | 88 | ||
89 | static unsigned long gpio18_config[] = { | 89 | static unsigned long gpio18_config = GPIO18_GPIO; |
90 | GPIO18_RDY, | ||
91 | GPIO18_GPIO, | ||
92 | }; | ||
93 | 90 | ||
94 | static void spitz_presuspend(void) | 91 | static void spitz_presuspend(void) |
95 | { | 92 | { |
@@ -112,7 +109,7 @@ static void spitz_presuspend(void) | |||
112 | PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; | 109 | PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT; |
113 | PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); | 110 | PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0); |
114 | 111 | ||
115 | pxa2xx_mfp_config(&gpio18_config[0], 1); | 112 | pxa2xx_mfp_config(&gpio18_config, 1); |
116 | gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown"); | 113 | gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown"); |
117 | gpio_free(18); | 114 | gpio_free(18); |
118 | 115 | ||
@@ -131,7 +128,6 @@ static void spitz_presuspend(void) | |||
131 | 128 | ||
132 | static void spitz_postsuspend(void) | 129 | static void spitz_postsuspend(void) |
133 | { | 130 | { |
134 | pxa2xx_mfp_config(&gpio18_config[1], 1); | ||
135 | } | 131 | } |
136 | 132 | ||
137 | static int spitz_should_wakeup(unsigned int resume_on_alarm) | 133 | static int spitz_should_wakeup(unsigned int resume_on_alarm) |
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 023f443784ec..b820edaf3184 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c | |||
@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, | |||
745 | static int | 745 | static int |
746 | do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | 746 | do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
747 | { | 747 | { |
748 | union offset_union offset; | 748 | union offset_union uninitialized_var(offset); |
749 | unsigned long instr = 0, instrptr; | 749 | unsigned long instr = 0, instrptr; |
750 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); | 750 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); |
751 | unsigned int type; | 751 | unsigned int type; |
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index a5683a84c6ee..6013831a043e 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c | |||
@@ -26,12 +26,14 @@ | |||
26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
29 | #include <linux/i2c-omap.h> | ||
29 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
30 | #include <linux/err.h> | 31 | #include <linux/err.h> |
31 | #include <linux/clk.h> | 32 | #include <linux/clk.h> |
32 | 33 | ||
33 | #include <mach/irqs.h> | 34 | #include <mach/irqs.h> |
34 | #include <plat/i2c.h> | 35 | #include <plat/i2c.h> |
36 | #include <plat/omap-pm.h> | ||
35 | #include <plat/omap_device.h> | 37 | #include <plat/omap_device.h> |
36 | 38 | ||
37 | #define OMAP_I2C_SIZE 0x3f | 39 | #define OMAP_I2C_SIZE 0x3f |
@@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id) | |||
127 | 129 | ||
128 | 130 | ||
129 | #ifdef CONFIG_ARCH_OMAP2PLUS | 131 | #ifdef CONFIG_ARCH_OMAP2PLUS |
132 | /* | ||
133 | * XXX This function is a temporary compatibility wrapper - only | ||
134 | * needed until the I2C driver can be converted to call | ||
135 | * omap_pm_set_max_dev_wakeup_lat() and handle a return code. | ||
136 | */ | ||
137 | static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t) | ||
138 | { | ||
139 | omap_pm_set_max_mpu_wakeup_lat(dev, t); | ||
140 | } | ||
141 | |||
130 | static inline int omap2_i2c_add_bus(int bus_id) | 142 | static inline int omap2_i2c_add_bus(int bus_id) |
131 | { | 143 | { |
132 | int l; | 144 | int l; |
@@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id) | |||
158 | dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; | 170 | dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; |
159 | pdata->flags = dev_attr->flags; | 171 | pdata->flags = dev_attr->flags; |
160 | 172 | ||
173 | /* | ||
174 | * When waiting for completion of a i2c transfer, we need to | ||
175 | * set a wake up latency constraint for the MPU. This is to | ||
176 | * ensure quick enough wakeup from idle, when transfer | ||
177 | * completes. | ||
178 | * Only omap3 has support for constraints | ||
179 | */ | ||
180 | if (cpu_is_omap34xx()) | ||
181 | pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; | ||
161 | pdev = omap_device_build(name, bus_id, oh, pdata, | 182 | pdev = omap_device_build(name, bus_id, oh, pdata, |
162 | sizeof(struct omap_i2c_bus_platform_data), | 183 | sizeof(struct omap_i2c_bus_platform_data), |
163 | NULL, 0, 0); | 184 | NULL, 0, 0); |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index b3349f7b1a2c..1db029438022 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm { | |||
443 | * in order to complete the reset. Optional clocks will be disabled | 443 | * in order to complete the reset. Optional clocks will be disabled |
444 | * again after the reset. | 444 | * again after the reset. |
445 | * HWMOD_16BIT_REG: Module has 16bit registers | 445 | * HWMOD_16BIT_REG: Module has 16bit registers |
446 | * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for | ||
447 | * this IP block comes from an off-chip source and is not always | ||
448 | * enabled. This prevents the hwmod code from being able to | ||
449 | * enable and reset the IP block early. XXX Eventually it should | ||
450 | * be possible to query the clock framework for this information. | ||
446 | */ | 451 | */ |
447 | #define HWMOD_SWSUP_SIDLE (1 << 0) | 452 | #define HWMOD_SWSUP_SIDLE (1 << 0) |
448 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) | 453 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) |
@@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm { | |||
453 | #define HWMOD_NO_IDLEST (1 << 6) | 458 | #define HWMOD_NO_IDLEST (1 << 6) |
454 | #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) | 459 | #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) |
455 | #define HWMOD_16BIT_REG (1 << 8) | 460 | #define HWMOD_16BIT_REG (1 << 8) |
461 | #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) | ||
456 | 462 | ||
457 | /* | 463 | /* |
458 | * omap_hwmod._int_flags definitions | 464 | * omap_hwmod._int_flags definitions |
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile index cd60a81163e9..32d05c8219dc 100644 --- a/arch/arm/tools/Makefile +++ b/arch/arm/tools/Makefile | |||
@@ -5,6 +5,6 @@ | |||
5 | # | 5 | # |
6 | 6 | ||
7 | include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types | 7 | include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types |
8 | $(kecho) ' Generating $@' | 8 | @$(kecho) ' Generating $@' |
9 | @mkdir -p $(dir $@) | 9 | @mkdir -p $(dir $@) |
10 | $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } | 10 | $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index c834b32af275..3b44e0dd0a93 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -701,11 +701,14 @@ static int __init vfp_init(void) | |||
701 | elf_hwcap |= HWCAP_VFPv3; | 701 | elf_hwcap |= HWCAP_VFPv3; |
702 | 702 | ||
703 | /* | 703 | /* |
704 | * Check for VFPv3 D16. CPUs in this configuration | 704 | * Check for VFPv3 D16 and VFPv4 D16. CPUs in |
705 | * only have 16 x 64bit registers. | 705 | * this configuration only have 16 x 64bit |
706 | * registers. | ||
706 | */ | 707 | */ |
707 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) | 708 | if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) |
708 | elf_hwcap |= HWCAP_VFPv3D16; | 709 | elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */ |
710 | else | ||
711 | elf_hwcap |= HWCAP_VFPD32; | ||
709 | } | 712 | } |
710 | #endif | 713 | #endif |
711 | /* | 714 | /* |
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c index 59bcb96ac369..f57609275449 100644 --- a/arch/arm/xen/enlighten.c +++ b/arch/arm/xen/enlighten.c | |||
@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages) | |||
166 | *pages = NULL; | 166 | *pages = NULL; |
167 | } | 167 | } |
168 | EXPORT_SYMBOL_GPL(free_xenballooned_pages); | 168 | EXPORT_SYMBOL_GPL(free_xenballooned_pages); |
169 | |||
170 | /* In the hypervisor.S file. */ | ||
171 | EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op); | ||
172 | EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op); | ||
173 | EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version); | ||
174 | EXPORT_SYMBOL_GPL(HYPERVISOR_console_io); | ||
175 | EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op); | ||
176 | EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op); | ||
177 | EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op); | ||
178 | EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op); | ||
179 | EXPORT_SYMBOL_GPL(privcmd_call); | ||
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S index 074f5ed101b9..71f723984cbd 100644 --- a/arch/arm/xen/hypercall.S +++ b/arch/arm/xen/hypercall.S | |||
@@ -48,20 +48,16 @@ | |||
48 | 48 | ||
49 | #include <linux/linkage.h> | 49 | #include <linux/linkage.h> |
50 | #include <asm/assembler.h> | 50 | #include <asm/assembler.h> |
51 | #include <asm/opcodes-virt.h> | ||
51 | #include <xen/interface/xen.h> | 52 | #include <xen/interface/xen.h> |
52 | 53 | ||
53 | 54 | ||
54 | /* HVC 0xEA1 */ | 55 | #define XEN_IMM 0xEA1 |
55 | #ifdef CONFIG_THUMB2_KERNEL | ||
56 | #define xen_hvc .word 0xf7e08ea1 | ||
57 | #else | ||
58 | #define xen_hvc .word 0xe140ea71 | ||
59 | #endif | ||
60 | 56 | ||
61 | #define HYPERCALL_SIMPLE(hypercall) \ | 57 | #define HYPERCALL_SIMPLE(hypercall) \ |
62 | ENTRY(HYPERVISOR_##hypercall) \ | 58 | ENTRY(HYPERVISOR_##hypercall) \ |
63 | mov r12, #__HYPERVISOR_##hypercall; \ | 59 | mov r12, #__HYPERVISOR_##hypercall; \ |
64 | xen_hvc; \ | 60 | __HVC(XEN_IMM); \ |
65 | mov pc, lr; \ | 61 | mov pc, lr; \ |
66 | ENDPROC(HYPERVISOR_##hypercall) | 62 | ENDPROC(HYPERVISOR_##hypercall) |
67 | 63 | ||
@@ -76,7 +72,7 @@ ENTRY(HYPERVISOR_##hypercall) \ | |||
76 | stmdb sp!, {r4} \ | 72 | stmdb sp!, {r4} \ |
77 | ldr r4, [sp, #4] \ | 73 | ldr r4, [sp, #4] \ |
78 | mov r12, #__HYPERVISOR_##hypercall; \ | 74 | mov r12, #__HYPERVISOR_##hypercall; \ |
79 | xen_hvc \ | 75 | __HVC(XEN_IMM); \ |
80 | ldm sp!, {r4} \ | 76 | ldm sp!, {r4} \ |
81 | mov pc, lr \ | 77 | mov pc, lr \ |
82 | ENDPROC(HYPERVISOR_##hypercall) | 78 | ENDPROC(HYPERVISOR_##hypercall) |
@@ -100,7 +96,7 @@ ENTRY(privcmd_call) | |||
100 | mov r2, r3 | 96 | mov r2, r3 |
101 | ldr r3, [sp, #8] | 97 | ldr r3, [sp, #8] |
102 | ldr r4, [sp, #4] | 98 | ldr r4, [sp, #4] |
103 | xen_hvc | 99 | __HVC(XEN_IMM) |
104 | ldm sp!, {r4} | 100 | ldm sp!, {r4} |
105 | mov pc, lr | 101 | mov pc, lr |
106 | ENDPROC(privcmd_call); | 102 | ENDPROC(privcmd_call); |