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-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S1
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/system.h1
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c2
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c10
-rw-r--r--arch/arm/mach-omap2/clockdomain.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c1
-rw-r--r--arch/arm/mach-omap2/pm.c2
-rw-r--r--arch/arm/mach-omap2/powerdomain.c25
10 files changed, 31 insertions, 16 deletions
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index 6bd83ed90afe..d87bfc397d39 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,7 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <mach/hardware.h>
12#include <asm/hardware/entry-macro-gic.S> 11#include <asm/hardware/entry-macro-gic.S>
13 12
14 .macro disable_fiq 13 .macro disable_fiq
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 58bb03ae3cf4..4f16c9b79f78 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -13,7 +13,6 @@
13 13
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/proc-fns.h> 15#include <asm/proc-fns.h>
16#include <mach/hardware.h>
17 16
18static inline void arch_idle(void) 17static inline void arch_idle(void)
19{ 18{
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
index de8ead9b91f7..a91b6058ab4f 100644
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
+++ b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
@@ -8,7 +8,6 @@
8 */ 8 */
9 9
10#include <asm/mach-types.h> 10#include <asm/mach-types.h>
11#include <mach/hardware.h>
12#include <mach/cns3xxx.h> 11#include <mach/cns3xxx.h>
13 12
14#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 13#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 06fd25d70aec..0f8fca48a5ed 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -49,7 +49,7 @@ static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata)
49 return &cns3xxx_pcie[root->domain]; 49 return &cns3xxx_pcie[root->domain];
50} 50}
51 51
52static struct cns3xxx_pcie *pdev_to_cnspci(struct pci_dev *dev) 52static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev)
53{ 53{
54 return sysdata_to_cnspci(dev->sysdata); 54 return sysdata_to_cnspci(dev->sysdata);
55} 55}
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index ffd55b1c4396..b9b844683147 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3078,6 +3078,7 @@ static struct clk gpt12_fck = {
3078 .name = "gpt12_fck", 3078 .name = "gpt12_fck",
3079 .ops = &clkops_null, 3079 .ops = &clkops_null,
3080 .parent = &secure_32k_fck, 3080 .parent = &secure_32k_fck,
3081 .clkdm_name = "wkup_clkdm",
3081 .recalc = &followparent_recalc, 3082 .recalc = &followparent_recalc,
3082}; 3083};
3083 3084
@@ -3085,6 +3086,7 @@ static struct clk wdt1_fck = {
3085 .name = "wdt1_fck", 3086 .name = "wdt1_fck",
3086 .ops = &clkops_null, 3087 .ops = &clkops_null,
3087 .parent = &secure_32k_fck, 3088 .parent = &secure_32k_fck,
3089 .clkdm_name = "wkup_clkdm",
3088 .recalc = &followparent_recalc, 3090 .recalc = &followparent_recalc,
3089}; 3091};
3090 3092
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2af0e3f00ce1..c0b6fbda3408 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3376,10 +3376,18 @@ int __init omap4xxx_clk_init(void)
3376 } else if (cpu_is_omap446x()) { 3376 } else if (cpu_is_omap446x()) {
3377 cpu_mask = RATE_IN_4460; 3377 cpu_mask = RATE_IN_4460;
3378 cpu_clkflg = CK_446X; 3378 cpu_clkflg = CK_446X;
3379 } else {
3380 return 0;
3379 } 3381 }
3380 3382
3381 clk_init(&omap2_clk_functions); 3383 clk_init(&omap2_clk_functions);
3382 omap2_clk_disable_clkdm_control(); 3384
3385 /*
3386 * Must stay commented until all OMAP SoC drivers are
3387 * converted to runtime PM, or drivers may start crashing
3388 *
3389 * omap2_clk_disable_clkdm_control();
3390 */
3383 3391
3384 for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); 3392 for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
3385 c++) 3393 c++)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index ab7db083f97f..8f0890685d7b 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -747,6 +747,7 @@ int clkdm_wakeup(struct clockdomain *clkdm)
747 spin_lock_irqsave(&clkdm->lock, flags); 747 spin_lock_irqsave(&clkdm->lock, flags);
748 clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; 748 clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
749 ret = arch_clkdm->clkdm_wakeup(clkdm); 749 ret = arch_clkdm->clkdm_wakeup(clkdm);
750 ret |= pwrdm_state_switch(clkdm->pwrdm.ptr);
750 spin_unlock_irqrestore(&clkdm->lock, flags); 751 spin_unlock_irqrestore(&clkdm->lock, flags);
751 return ret; 752 return ret;
752} 753}
@@ -818,6 +819,7 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
818 spin_lock_irqsave(&clkdm->lock, flags); 819 spin_lock_irqsave(&clkdm->lock, flags);
819 clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; 820 clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
820 arch_clkdm->clkdm_deny_idle(clkdm); 821 arch_clkdm->clkdm_deny_idle(clkdm);
822 pwrdm_state_switch(clkdm->pwrdm.ptr);
821 spin_unlock_irqrestore(&clkdm->lock, flags); 823 spin_unlock_irqrestore(&clkdm->lock, flags);
822} 824}
823 825
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 16743c7d6e8e..408193d8e044 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -192,6 +192,7 @@ static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
192 .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, 192 .pa_end = OMAP243X_HS_BASE + SZ_4K - 1,
193 .flags = ADDR_TYPE_RT 193 .flags = ADDR_TYPE_RT
194 }, 194 },
195 { }
195}; 196};
196 197
197/* l4_core ->usbhsotg interface */ 198/* l4_core ->usbhsotg interface */
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 3feb35911a32..472bf22d5e84 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -130,7 +130,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
130 } else { 130 } else {
131 hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); 131 hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
132 clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); 132 clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
133 pwrdm_wait_transition(pwrdm);
134 sleep_switch = FORCEWAKEUP_SWITCH; 133 sleep_switch = FORCEWAKEUP_SWITCH;
135 } 134 }
136 } 135 }
@@ -156,7 +155,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
156 return ret; 155 return ret;
157 } 156 }
158 157
159 pwrdm_wait_transition(pwrdm);
160 pwrdm_state_switch(pwrdm); 158 pwrdm_state_switch(pwrdm);
161err: 159err:
162 return ret; 160 return ret;
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 9af08473bf10..ef71fdd40fc4 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -195,28 +195,35 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
195 195
196/** 196/**
197 * pwrdm_init - set up the powerdomain layer 197 * pwrdm_init - set up the powerdomain layer
198 * @pwrdm_list: array of struct powerdomain pointers to register 198 * @pwrdms: array of struct powerdomain pointers to register
199 * @custom_funcs: func pointers for arch specific implementations 199 * @custom_funcs: func pointers for arch specific implementations
200 * 200 *
201 * Loop through the array of powerdomains @pwrdm_list, registering all 201 * Loop through the array of powerdomains @pwrdms, registering all
202 * that are available on the current CPU. If pwrdm_list is supplied 202 * that are available on the current CPU. Also, program all
203 * and not null, all of the referenced powerdomains will be 203 * powerdomain target state as ON; this is to prevent domains from
204 * registered. No return value. XXX pwrdm_list is not really a 204 * hitting low power states (if bootloader has target states set to
205 * "list"; it is an array. Rename appropriately. 205 * something other than ON) and potentially even losing context while
206 * PM is not fully initialized. The PM late init code can then program
207 * the desired target state for all the power domains. No return
208 * value.
206 */ 209 */
207void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs) 210void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs)
208{ 211{
209 struct powerdomain **p = NULL; 212 struct powerdomain **p = NULL;
213 struct powerdomain *temp_p;
210 214
211 if (!custom_funcs) 215 if (!custom_funcs)
212 WARN(1, "powerdomain: No custom pwrdm functions registered\n"); 216 WARN(1, "powerdomain: No custom pwrdm functions registered\n");
213 else 217 else
214 arch_pwrdm = custom_funcs; 218 arch_pwrdm = custom_funcs;
215 219
216 if (pwrdm_list) { 220 if (pwrdms) {
217 for (p = pwrdm_list; *p; p++) 221 for (p = pwrdms; *p; p++)
218 _pwrdm_register(*p); 222 _pwrdm_register(*p);
219 } 223 }
224
225 list_for_each_entry(temp_p, &pwrdm_list, node)
226 pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON);
220} 227}
221 228
222/** 229/**