17 files changed, 103 insertions, 56 deletions

diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 3e1714c6523f..664c7b8b1ba8 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -109,7 +109,7 @@ static void gic_unmask_irq(unsigned int irq)
 }
 
 #ifdef CONFIG_SMP
-static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
+static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
 {
         void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
         unsigned int shift = (irq % 4) * 8;
@@ -122,6 +122,8 @@ static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
         val |= 1 << (cpu + shift);
         writel(val, reg);
         spin_unlock(&irq_controller_lock);
+
+        return 0;
 }
 #endif
 
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 16b52f397983..9e07fe507029 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -249,6 +249,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__before_atomic_inc()     smp_mb()
 #define smp_mb__after_atomic_inc()      smp_mb()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif
 #endif
diff --git a/arch/arm/include/asm/bitsperlong.h b/arch/arm/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/arm/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index cb7a9e97fd7e..feaa75f0013e 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -7,4 +7,20 @@
 #define L1_CACHE_SHIFT          5
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
 
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+
+/*
+ * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
+ */
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
+#define ARCH_SLAB_MINALIGN 8
+#endif
+
 #endif
diff --git a/arch/arm/include/asm/mman.h b/arch/arm/include/asm/mman.h
index 54570d2e95b7..fc26976d8e3a 100644
--- a/arch/arm/include/asm/mman.h
+++ b/arch/arm/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __ARM_MMAN_H__
 #define __ARM_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index e6eb8a67b807..be962c1349c4 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -202,13 +202,6 @@ typedef struct page *pgtable_t;
         (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
          VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-/*
- * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
- */
-#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
-#define ARCH_SLAB_MINALIGN 8
-#endif
-
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif
diff --git a/arch/arm/include/asm/signal.h b/arch/arm/include/asm/signal.h
index d0fb487aba4f..43ba0fb1c8ad 100644
--- a/arch/arm/include/asm/signal.h
+++ b/arch/arm/include/asm/signal.h
@@ -111,7 +111,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
deleted file mode 100644
index cf0d0bdee74d..000000000000
--- a/arch/arm/include/asm/suspend.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef _ASMARM_SUSPEND_H
-#define _ASMARM_SUSPEND_H
-
-#endif
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 999d013e06e3..e4b08ca804ea 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -890,7 +890,7 @@ static struct clk clko_clk = {
                 .con_id = n, \
                 .clk = &c, \
         },
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
 /* It's unlikely that any driver wants one of them directly:
         _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
         _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 3f7280c490f0..2c971442f3f2 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -621,7 +621,7 @@ DEFINE_CLOCK1(csi_clk,     0, 0,      0, parent, &csi_clk1, &per4_clk);
                 .clk = &c, \
         },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
         _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
         _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 53a112d4e04a..3c1e06f56dd6 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -404,7 +404,7 @@ DEFINE_CLOCK(gpu2d_clk,  0, CCM_CGR3,  4, NULL, NULL);
                 .clk = &c,              \
         },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
         _REGISTER_CLOCK(NULL, "ata", ata_clk)
         _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 9957a11533a4..a68fcf981edf 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -516,7 +516,7 @@ DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
                 .clk = &c, \
         },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "emi", emi_clk)
         _REGISTER_CLOCK(NULL, "cspi", cspi1_clk)
         _REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index d245e59c51b1..29970f703f3c 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -72,7 +72,10 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
 }
 
 
-static struct pxa2xx_udc_mach_info pxa_udc_info;
+static struct pxa2xx_udc_mach_info pxa_udc_info = {
+        .gpio_pullup = -1,
+        .gpio_vbus   = -1,
+};
 
 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
 {
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 2121309b2474..2b27336c29f1 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -412,7 +412,7 @@ static struct platform_device imote2_flash_device = {
  */
 static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
         { /* UCAM sensor board */
-                .type = "max1238",
+                .type = "max1239",
                 .addr = 0x35,
         }, { /* ITS400 Sensor board only */
                 .type = "max1363",
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 3397f1e64d76..a08d9d2380d3 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -184,23 +184,37 @@ __v7_setup:
         stmia   r12, {r0-r5, r7, r9, r11, lr}
         bl      v7_flush_dcache_all
         ldmia   r12, {r0-r5, r7, r9, r11, lr}
+
+        mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
+        and     r10, r0, #0xff000000            @ ARM?
+        teq     r10, #0x41000000
+        bne     2f
+        and     r5, r0, #0x00f00000             @ variant
+        and     r6, r0, #0x0000000f             @ revision
+        orr     r0, r6, r5, lsr #20-4           @ combine variant and revision
+
 #ifdef CONFIG_ARM_ERRATA_430973
-        mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-        orr     r10, r10, #(1 << 6)             @ set IBE to 1
-        mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+        teq     r5, #0x00100000                 @ only present in r1p*
+        mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+        orreq   r10, r10, #(1 << 6)             @ set IBE to 1
+        mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_458693
-        mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-        orr     r10, r10, #(1 << 5)             @ set L1NEON to 1
-        orr     r10, r10, #(1 << 9)             @ set PLDNOP to 1
-        mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+        teq     r0, #0x20                       @ only present in r2p0
+        mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+        orreq   r10, r10, #(1 << 5)             @ set L1NEON to 1
+        orreq   r10, r10, #(1 << 9)             @ set PLDNOP to 1
+        mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_460075
-        mrc     p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
-        orr     r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
-        mcr     p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
+        teq     r0, #0x20                       @ only present in r2p0
+        mrceq   p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
+        tsteq   r10, #1 << 22
+        orreq   r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
+        mcreq   p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
 #endif
-        mov     r10, #0
+
+2:      mov     r10, #0
 #ifdef HARVARD_CACHE
         mcr     p15, 0, r10, c7, c5, 0          @ I+BTB cache invalidate
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/imx-uart.h b/arch/arm/plat-mxc/include/mach/imx-uart.h
index 599217b2e13f..f9bd17dd8dd7 100644
--- a/arch/arm/plat-mxc/include/mach/imx-uart.h
+++ b/arch/arm/plat-mxc/include/mach/imx-uart.h
@@ -20,11 +20,16 @@
 #define ASMARM_ARCH_UART_H
 
 #define IMXUART_HAVE_RTSCTS (1<<0)
+#define IMXUART_IRDA        (1<<1)
 
 struct imxuart_platform_data {
         int (*init)(struct platform_device *pdev);
         int (*exit)(struct platform_device *pdev);
         unsigned int flags;
+        void (*irda_enable)(int enable);
+        unsigned int irda_inv_rx:1;
+        unsigned int irda_inv_tx:1;
+        unsigned short transceiver_delay;
 };
 
 #endif
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 0abfbaa59871..40424edae939 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -147,24 +147,40 @@ static int __mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void *arg)
         return ret;
 }
 
+struct omap_msg_tx_data {
+        mbox_msg_t      msg;
+        void            *arg;
+};
+
+static void omap_msg_tx_end_io(struct request *rq, int error)
+{
+        kfree(rq->special);
+        __blk_put_request(rq->q, rq);
+}
+
 int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void* arg)
 {
+        struct omap_msg_tx_data *tx_data;
         struct request *rq;
         struct request_queue *q = mbox->txq->queue;
-        int ret = 0;
+
+        tx_data = kmalloc(sizeof(*tx_data), GFP_ATOMIC);
+        if (unlikely(!tx_data))
+                return -ENOMEM;
 
         rq = blk_get_request(q, WRITE, GFP_ATOMIC);
         if (unlikely(!rq)) {
-                ret = -ENOMEM;
-                goto fail;
+                kfree(tx_data);
+                return -ENOMEM;
         }
 
-        rq->data = (void *)msg;
-        blk_insert_request(q, rq, 0, arg);
+        tx_data->msg = msg;
+        tx_data->arg = arg;
+        rq->end_io = omap_msg_tx_end_io;
+        blk_insert_request(q, rq, 0, tx_data);
 
         schedule_work(&mbox->txq->work);
- fail:
-        return ret;
+        return 0;
 }
 EXPORT_SYMBOL(omap_mbox_msg_send);
 
@@ -178,22 +194,28 @@ static void mbox_tx_work(struct work_struct *work)
         struct request_queue *q = mbox->txq->queue;
 
         while (1) {
+                struct omap_msg_tx_data *tx_data;
+
                 spin_lock(q->queue_lock);
-                rq = elv_next_request(q);
+                rq = blk_fetch_request(q);
                 spin_unlock(q->queue_lock);
 
                 if (!rq)
                         break;
 
-                ret = __mbox_msg_send(mbox, (mbox_msg_t) rq->data, rq->special);
+                tx_data = rq->special;
+
+                ret = __mbox_msg_send(mbox, tx_data->msg, tx_data->arg);
                 if (ret) {
                         enable_mbox_irq(mbox, IRQ_TX);
+                        spin_lock(q->queue_lock);
+                        blk_requeue_request(q, rq);
+                        spin_unlock(q->queue_lock);
                         return;
                 }
 
                 spin_lock(q->queue_lock);
-                if (__blk_end_request(rq, 0, 0))
-                        BUG();
+                __blk_end_request_all(rq, 0);
                 spin_unlock(q->queue_lock);
         }
 }
@@ -218,16 +240,13 @@ static void mbox_rx_work(struct work_struct *work)
 
         while (1) {
                 spin_lock_irqsave(q->queue_lock, flags);
-                rq = elv_next_request(q);
+                rq = blk_fetch_request(q);
                 spin_unlock_irqrestore(q->queue_lock, flags);
                 if (!rq)
                         break;
 
-                msg = (mbox_msg_t) rq->data;
-
-                if (blk_end_request(rq, 0, 0))
-                        BUG();
-
+                msg = (mbox_msg_t)rq->special;
+                blk_end_request_all(rq, 0);
                 mbox->rxq->callback((void *)msg);
         }
 }
@@ -264,7 +283,6 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
                         goto nomem;
 
                 msg = mbox_fifo_read(mbox);
-                rq->data = (void *)msg;
 
                 if (unlikely(mbox_seq_test(mbox, msg))) {
                         pr_info("mbox: Illegal seq bit!(%08x)\n", msg);
@@ -272,7 +290,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
                                 mbox->err_notify();
                 }
 
-                blk_insert_request(q, rq, 0, NULL);
+                blk_insert_request(q, rq, 0, (void *)msg);
                 if (mbox->ops->type == OMAP_MBOX_TYPE1)
                         break;
         }
@@ -329,16 +347,15 @@ omap_mbox_read(struct device *dev, struct device_attribute *attr, char *buf)
 
         while (1) {
                 spin_lock_irqsave(q->queue_lock, flags);
-                rq = elv_next_request(q);
+                rq = blk_fetch_request(q);
                 spin_unlock_irqrestore(q->queue_lock, flags);
 
                 if (!rq)
                         break;
 
-                *p = (mbox_msg_t) rq->data;
+                *p = (mbox_msg_t)rq->special;
 
-                if (blk_end_request(rq, 0, 0))
-                        BUG();
+                blk_end_request_all(rq, 0);
 
                 if (unlikely(mbox_seq_test(mbox, *p))) {
                         pr_info("mbox: Illegal seq bit!(%08x) ignored\n", *p);