80 files changed, 530 insertions, 2992 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f4b7dfacf2d0..f59758dd86cf 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -732,16 +732,6 @@ config ARCH_S5P64X0
          Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
          SMDK6450.
-config ARCH_S5P6442
-        bool "Samsung S5P6442"
-        select CPU_V6
-        select GENERIC_GPIO
-        select HAVE_CLK
-        select ARCH_USES_GETTIMEOFFSET
-        select HAVE_S3C2410_WATCHDOG if WATCHDOG
-        help
-          Samsung S5P6442 CPU based systems
 config ARCH_S5PC100
        bool "Samsung S5PC100"
        select GENERIC_GPIO
@@ -993,8 +983,6 @@ endif
 source "arch/arm/mach-s5p64x0/Kconfig"
-source "arch/arm/mach-s5p6442/Kconfig"
 source "arch/arm/mach-s5pc100/Kconfig"
 source "arch/arm/mach-s5pv210/Kconfig"
@@ -1422,7 +1410,7 @@ source kernel/Kconfig.preempt
 config HZ
        int
        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
-                ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
+                ARCH_S5PV210 || ARCH_EXYNOS4
        default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
        default AT91_TIMER_HZ if ARCH_AT91
        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
@@ -1685,6 +1673,13 @@ endmenu
 menu "Boot options"
+config USE_OF
+        bool "Flattened Device Tree support"
+        select OF
+        select OF_EARLY_FLATTREE
+        help
+          Include support for flattened device tree machine descriptions.
 # Compressed boot loader in ROM.  Yes, we really want to ask about
 # TEXT and BSS so we preserve their values in the config files.
 config ZBOOT_ROM_TEXT
@@ -2023,7 +2018,7 @@ menu "Power management options"
 source "kernel/power/Kconfig"
 config ARCH_SUSPEND_POSSIBLE
-        depends on !ARCH_S5P64X0 && !ARCH_S5P6442 && !ARCH_S5PC100
+        depends on !ARCH_S5P64X0 && !ARCH_S5PC100
        depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
                CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
        def_bool y
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 25750bcb3397..f5b2b390c8f2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -176,7 +176,6 @@ machine-$(CONFIG_ARCH_S3C2410)		:= s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c24
 machine-$(CONFIG_ARCH_S3C24A0)          := s3c24a0
 machine-$(CONFIG_ARCH_S3C64XX)          := s3c64xx
 machine-$(CONFIG_ARCH_S5P64X0)          := s5p64x0
-machine-$(CONFIG_ARCH_S5P6442)          := s5p6442
 machine-$(CONFIG_ARCH_S5PC100)          := s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          := s5pv210
 machine-$(CONFIG_ARCH_EXYNOS4)          := exynos4
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index ea5ee4d067f3..4b71766fb21d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -7,7 +7,7 @@ config ARM_VIC
 config ARM_VIC_NR
        int
        default 4 if ARCH_S5PV210
-        default 3 if ARCH_S5P6442 || ARCH_S5PC100
+        default 3 if ARCH_S5PC100
        default 2
        depends on ARM_VIC
        help
diff --git a/arch/arm/configs/exynos4_defconfig b/arch/arm/configs/exynos4_defconfig
index 2ffba24d2e2a..da53ff3b4d70 100644
--- a/arch/arm/configs/exynos4_defconfig
+++ b/arch/arm/configs/exynos4_defconfig
@@ -8,7 +8,9 @@ CONFIG_ARCH_EXYNOS4=y
 CONFIG_S3C_LOWLEVEL_UART_PORT=1
 CONFIG_MACH_SMDKC210=y
 CONFIG_MACH_SMDKV310=y
+CONFIG_MACH_ARMLEX4210=y
 CONFIG_MACH_UNIVERSAL_C210=y
+CONFIG_MACH_NURI=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SMP=y
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
deleted file mode 100644
index 0e92a784af66..000000000000
--- a/arch/arm/configs/s5p6442_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5P6442=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDK6442=y
-CONFIG_CPU_32v6K=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_ARM_UNWIND is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index bf13b814c1b8..946f4d778f71 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -18,6 +18,8 @@ struct machine_desc {
        unsigned int            nr;             /* architecture number  */
        const char              *name;          /* architecture name    */
        unsigned long           boot_params;    /* tagged list          */
+        const char              **dt_compat;    /* array of device tree
+                                                 * 'compatible' strings */
        unsigned int            nr_irqs;        /* number of IRQs */
@@ -48,6 +50,13 @@ struct machine_desc {
 extern struct machine_desc *machine_desc;
 /*
+ * Machine type table - also only accessible during boot
+ */
+extern struct machine_desc __arch_info_begin[], __arch_info_end[];
+#define for_each_machine_desc(p)                        \
+        for (p = __arch_info_begin; p < __arch_info_end; p++)
+/*
 * Set of macros to define architecture features.  This is built into
 * a table by the linker.
 */
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
new file mode 100644
index 000000000000..11b8708fc4db
--- /dev/null
+++ b/arch/arm/include/asm/prom.h
@@ -0,0 +1,37 @@
+/*
+ *  arch/arm/include/asm/prom.h
+ *
+ *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ASMARM_PROM_H
+#define __ASMARM_PROM_H
+#ifdef CONFIG_OF
+#include <asm/setup.h>
+#include <asm/irq.h>
+static inline void irq_dispose_mapping(unsigned int virq)
+{
+        return;
+}
+extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
+extern void arm_dt_memblock_reserve(void);
+#else /* CONFIG_OF */
+static inline struct machine_desc *setup_machine_fdt(unsigned int dt_phys)
+{
+        return NULL;
+}
+static inline void arm_dt_memblock_reserve(void) { }
+#endif /* CONFIG_OF */
+#endif /* ASMARM_PROM_H */
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 95176af3df8c..ee2ad8ae07af 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -217,6 +217,10 @@ extern struct meminfo meminfo;
 #define bank_phys_end(bank)     ((bank)->start + (bank)->size)
 #define bank_phys_size(bank)    (bank)->size
+extern int arm_add_memory(phys_addr_t start, unsigned long size);
+extern void early_print(const char *str, ...);
+extern void dump_machine_table(void);
 #endif  /*  __KERNEL__  */
 #endif
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 8d95446150a3..908c78cb1d1c 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_ARM_THUMBEE)	+= thumbee.o
 obj-$(CONFIG_KGDB)              += kgdb.o
 obj-$(CONFIG_ARM_UNWIND)        += unwind.o
 obj-$(CONFIG_HAVE_TCM)          += tcm.o
+obj-$(CONFIG_OF)                += devtree.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
 obj-$(CONFIG_SWP_EMULATE)       += swp_emulate.o
 CFLAGS_swp_emulate.o            := -Wa,-march=armv7-a
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
new file mode 100644
index 000000000000..a701e4226a6c
--- /dev/null
+++ b/arch/arm/kernel/devtree.c
@@ -0,0 +1,145 @@
+/*
+ *  linux/arch/arm/kernel/devtree.c
+ *
+ *  Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/bootmem.h>
+#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+        arm_add_memory(base, size);
+}
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+{
+        return alloc_bootmem_align(size, align);
+}
+void __init arm_dt_memblock_reserve(void)
+{
+        u64 *reserve_map, base, size;
+        if (!initial_boot_params)
+                return;
+        /* Reserve the dtb region */
+        memblock_reserve(virt_to_phys(initial_boot_params),
+                         be32_to_cpu(initial_boot_params->totalsize));
+        /*
+         * Process the reserve map.  This will probably overlap the initrd
+         * and dtb locations which are already reserved, but overlaping
+         * doesn't hurt anything
+         */
+        reserve_map = ((void*)initial_boot_params) +
+                        be32_to_cpu(initial_boot_params->off_mem_rsvmap);
+        while (1) {
+                base = be64_to_cpup(reserve_map++);
+                size = be64_to_cpup(reserve_map++);
+                if (!size)
+                        break;
+                memblock_reserve(base, size);
+        }
+}
+/**
+ * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
+ * @dt_phys: physical address of dt blob
+ *
+ * If a dtb was passed to the kernel in r2, then use it to choose the
+ * correct machine_desc and to setup the system.
+ */
+struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
+{
+        struct boot_param_header *devtree;
+        struct machine_desc *mdesc, *mdesc_best = NULL;
+        unsigned int score, mdesc_score = ~1;
+        unsigned long dt_root;
+        const char *model;
+        devtree = phys_to_virt(dt_phys);
+        /* check device tree validity */
+        if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
+                return NULL;
+        /* Search the mdescs for the 'best' compatible value match */
+        initial_boot_params = devtree;
+        dt_root = of_get_flat_dt_root();
+        for_each_machine_desc(mdesc) {
+                score = of_flat_dt_match(dt_root, mdesc->dt_compat);
+                if (score > 0 && score < mdesc_score) {
+                        mdesc_best = mdesc;
+                        mdesc_score = score;
+                }
+        }
+        if (!mdesc_best) {
+                const char *prop;
+                long size;
+                early_print("\nError: unrecognized/unsupported "
+                            "device tree compatible list:\n[ ");
+                prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
+                while (size > 0) {
+                        early_print("'%s' ", prop);
+                        size -= strlen(prop) + 1;
+                        prop += strlen(prop) + 1;
+                }
+                early_print("]\n\n");
+                dump_machine_table(); /* does not return */
+        }
+        model = of_get_flat_dt_prop(dt_root, "model", NULL);
+        if (!model)
+                model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
+        if (!model)
+                model = "<unknown>";
+        pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
+        /* Retrieve various information from the /chosen node */
+        of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
+        /* Initialize {size,address}-cells info */
+        of_scan_flat_dt(early_init_dt_scan_root, NULL);
+        /* Setup memory, calling early_init_dt_add_memory_arch */
+        of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+        /* Change machine number to match the mdesc we're using */
+        __machine_arch_type = mdesc_best->nr;
+        return mdesc_best;
+}
+/**
+ * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
+ *
+ * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
+ * mapped 1:1 onto Linux irq numbers.  Cascaded irq controllers are not
+ * supported.
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+                                   const u32 *intspec, unsigned int intsize)
+{
+        return intspec[0];
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index c84b57d27d07..854bd22380d3 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -15,6 +15,12 @@
 #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
 #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define OF_DT_MAGIC 0xd00dfeed
+#else
+#define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
+#endif
 /*
 * Exception handling.  Something went wrong and we can't proceed.  We
 * ought to tell the user, but since we don't have any guarantee that
@@ -28,20 +34,26 @@
 /* Determine validity of the r2 atags pointer.  The heuristic requires
 * that the pointer be aligned, in the first 16k of physical RAM and
- * that the ATAG_CORE marker is first and present.  Future revisions
+ * that the ATAG_CORE marker is first and present.  If CONFIG_OF_FLATTREE
+ * is selected, then it will also accept a dtb pointer.  Future revisions
 * of this function may be more lenient with the physical address and
 * may also be able to move the ATAGS block if necessary.
 *
 * Returns:
- *  r2 either valid atags pointer, or zero
+ *  r2 either valid atags pointer, valid dtb pointer, or zero
 *  r5, r6 corrupted
 */
 __vet_atags:
        tst     r2, #0x3                        @ aligned?
        bne     1f
-        ldr     r5, [r2, #0]                    @ is first tag ATAG_CORE?
+        ldr     r5, [r2, #0]
-        cmp     r5, #ATAG_CORE_SIZE
+#ifdef CONFIG_OF_FLATTREE
+        ldr     r6, =OF_DT_MAGIC                @ is it a DTB?
+        cmp     r5, r6
+        beq     2f
+#endif
+        cmp     r5, #ATAG_CORE_SIZE             @ is first tag ATAG_CORE?
        cmpne   r5, #ATAG_CORE_SIZE_EMPTY
        bne     1f
        ldr     r5, [r2, #4]
@@ -49,7 +61,7 @@ __vet_atags:
        cmp     r5, r6
        bne     1f
-        mov     pc, lr                          @ atag pointer is ok
+2:      mov     pc, lr                          @ atag/dtb pointer is ok
 1:      mov     r2, #0
        mov     pc, lr
@@ -61,7 +73,7 @@ ENDPROC(__vet_atags)
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags/dtb pointer
 *  r9  = processor ID
 */
        __INIT
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index c9173cfbbc74..a5e5c5b9b48e 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -59,7 +59,7 @@
 *
 * This is normally called from the decompressor code.  The requirements
 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
- * r1 = machine nr, r2 = atags pointer.
+ * r1 = machine nr, r2 = atags or dtb pointer.
 *
 * This code is mostly position independent, so if you link the kernel at
 * 0xc0008000, you call this at __pa(0xc0008000).
@@ -91,7 +91,7 @@ ENTRY(stext)
 #endif
        /*
-         * r1 = machine no, r2 = atags,
+         * r1 = machine no, r2 = atags or dtb,
         * r8 = phys_offset, r9 = cpuid, r10 = procinfo
         */
        bl      __vet_atags
@@ -339,7 +339,7 @@ __secondary_data:
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags or dtb pointer
 *  r4  = page table pointer
 *  r9  = processor ID
 *  r13 = *virtual* address to jump to upon completion
@@ -376,7 +376,7 @@ ENDPROC(__enable_mmu)
 *
 *  r0  = cp#15 control register
 *  r1  = machine ID
- *  r2  = atags pointer
+ *  r2  = atags or dtb pointer
 *  r9  = processor ID
 *  r13 = *virtual* address to jump to upon completion
 *
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6dce209a623b..ed11fb08b05a 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -20,6 +20,7 @@
 #include <linux/screen_info.h>
 #include <linux/init.h>
 #include <linux/kexec.h>
+#include <linux/of_fdt.h>
 #include <linux/crash_dump.h>
 #include <linux/root_dev.h>
 #include <linux/cpu.h>
@@ -42,6 +43,7 @@
 #include <asm/cachetype.h>
 #include <asm/tlbflush.h>
+#include <asm/prom.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
@@ -309,7 +311,7 @@ static void __init cacheid_init(void)
 */
 extern struct proc_info_list *lookup_processor_type(unsigned int);
-static void __init early_print(const char *str, ...)
+void __init early_print(const char *str, ...)
 {
        extern void printascii(const char *);
        char buf[256];
@@ -439,25 +441,12 @@ void cpu_init(void)
            : "r14");
 }
-static struct machine_desc * __init setup_machine(unsigned int nr)
+void __init dump_machine_table(void)
 {
-        extern struct machine_desc __arch_info_begin[], __arch_info_end[];
        struct machine_desc *p;
-        /*
+        early_print("Available machine support:\n\nID (hex)\tNAME\n");
-         * locate machine in the list of supported machines.
+        for_each_machine_desc(p)
-         */
-        for (p = __arch_info_begin; p < __arch_info_end; p++)
-                if (nr == p->nr) {
-                        printk("Machine: %s\n", p->name);
-                        return p;
-                }
-        early_print("\n"
-                "Error: unrecognized/unsupported machine ID (r1 = 0x%08x).\n\n"
-                "Available machine support:\n\nID (hex)\tNAME\n", nr);
-        for (p = __arch_info_begin; p < __arch_info_end; p++)
                early_print("%08x\t%s\n", p->nr, p->name);
        early_print("\nPlease check your kernel config and/or bootloader.\n");
@@ -466,7 +455,7 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
                /* can't use cpu_relax() here as it may require MMU setup */;
 }
-static int __init arm_add_memory(phys_addr_t start, unsigned long size)
+int __init arm_add_memory(phys_addr_t start, unsigned long size)
 {
        struct membank *bank = &meminfo.bank[meminfo.nr_banks];
@@ -801,23 +790,29 @@ static void __init squash_mem_tags(struct tag *tag)
                        tag->hdr.tag = ATAG_NONE;
 }
-void __init setup_arch(char **cmdline_p)
+static struct machine_desc * __init setup_machine_tags(unsigned int nr)
 {
        struct tag *tags = (struct tag *)&init_tags;
-        struct machine_desc *mdesc;
+        struct machine_desc *mdesc = NULL, *p;
        char *from = default_command_line;
        init_tags.mem.start = PHYS_OFFSET;
-        unwind_init();
+        /*
+         * locate machine in the list of supported machines.
-        setup_processor();
+         */
-        mdesc = setup_machine(machine_arch_type);
+        for_each_machine_desc(p)
-        machine_desc = mdesc;
+                if (nr == p->nr) {
-        machine_name = mdesc->name;
+                        printk("Machine: %s\n", p->name);
+                        mdesc = p;
+                        break;
+                }
-        if (mdesc->soft_reboot)
+        if (!mdesc) {
-                reboot_setup("s");
+                early_print("\nError: unrecognized/unsupported machine ID"
+                        " (r1 = 0x%08x).\n\n", nr);
+                dump_machine_table(); /* does not return */
+        }
        if (__atags_pointer)
                tags = phys_to_virt(__atags_pointer);
@@ -849,8 +844,17 @@ void __init setup_arch(char **cmdline_p)
        if (tags->hdr.tag != ATAG_CORE)
                convert_to_tag_list(tags);
 #endif
-        if (tags->hdr.tag != ATAG_CORE)
+        if (tags->hdr.tag != ATAG_CORE) {
+#if defined(CONFIG_OF)
+                /*
+                 * If CONFIG_OF is set, then assume this is a reasonably
+                 * modern system that should pass boot parameters
+                 */
+                early_print("Warning: Neither atags nor dtb found\n");
+#endif
                tags = (struct tag *)&init_tags;
+        }
        if (mdesc->fixup)
                mdesc->fixup(mdesc, tags, &from, &meminfo);
@@ -862,14 +866,34 @@ void __init setup_arch(char **cmdline_p)
                parse_tags(tags);
        }
+        /* parse_early_param needs a boot_command_line */
+        strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
+        return mdesc;
+}
+void __init setup_arch(char **cmdline_p)
+{
+        struct machine_desc *mdesc;
+        unwind_init();
+        setup_processor();
+        mdesc = setup_machine_fdt(__atags_pointer);
+        if (!mdesc)
+                mdesc = setup_machine_tags(machine_arch_type);
+        machine_desc = mdesc;
+        machine_name = mdesc->name;
+        if (mdesc->soft_reboot)
+                reboot_setup("s");
        init_mm.start_code = (unsigned long) _text;
        init_mm.end_code   = (unsigned long) _etext;
        init_mm.end_data   = (unsigned long) _edata;
        init_mm.brk        = (unsigned long) _end;
-        /* parse_early_param needs a boot_command_line */
-        strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
        /* populate cmd_line too for later use, preserving boot_command_line */
        strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
        *cmdline_p = cmd_line;
@@ -881,6 +905,8 @@ void __init setup_arch(char **cmdline_p)
        paging_init(mdesc);
        request_standard_resources(mdesc);
+        unflatten_device_tree();
 #ifdef CONFIG_SMP
        if (is_smp())
                smp_init_cpus();
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b95b9196deed..133aac405853 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1055,7 +1055,7 @@ int da850_register_pm(struct platform_device *pdev)
        if (!pdata->cpupll_reg_base)
                return -ENOMEM;
-        pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K);
+        pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
        if (!pdata->ddrpll_reg_base) {
                ret = -ENOMEM;
                goto no_ddrpll_mem;
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 58a02dc7b15a..4e66881c7aee 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,23 +24,25 @@
 #include "clock.h"
 #define DA8XX_TPCC_BASE                 0x01c00000
-#define DA850_MMCSD1_BASE               0x01e1b000
-#define DA850_TPCC1_BASE                0x01e30000
 #define DA8XX_TPTC0_BASE                0x01c08000
 #define DA8XX_TPTC1_BASE                0x01c08400
-#define DA850_TPTC2_BASE                0x01e38000
 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
 #define DA8XX_I2C0_BASE                 0x01c22000
-#define DA8XX_RTC_BASE                  0x01C23000
+#define DA8XX_RTC_BASE                  0x01c23000
+#define DA8XX_MMCSD0_BASE               0x01c40000
+#define DA8XX_SPI0_BASE                 0x01c41000
+#define DA830_SPI1_BASE                 0x01e12000
+#define DA8XX_LCD_CNTRL_BASE            0x01e13000
+#define DA850_MMCSD1_BASE               0x01e1b000
 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
 #define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
 #define DA8XX_EMAC_MDIO_BASE            0x01e24000
-#define DA8XX_GPIO_BASE                 0x01e26000
 #define DA8XX_I2C1_BASE                 0x01e28000
-#define DA8XX_SPI0_BASE                 0x01c41000
+#define DA850_TPCC1_BASE                0x01e30000
-#define DA830_SPI1_BASE                 0x01e12000
+#define DA850_TPTC2_BASE                0x01e38000
 #define DA850_SPI1_BASE                 0x01f0e000
+#define DA8XX_DDR2_CTL_BASE             0xb0000000
 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 22ebc64bc9d9..8f4f736aa267 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -33,6 +33,9 @@
 #define DM365_MMCSD0_BASE            0x01D11000
 #define DM365_MMCSD1_BASE            0x01D00000
+/* System control register offsets */
+#define DM64XX_VDD3P3V_PWDN     0x48
 static struct resource i2c_resources[] = {
        {
                .start          = DAVINCI_I2C_BASE,
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af8500e..ad64da713fc8 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -64,13 +64,9 @@ extern unsigned int da850_max_speed;
 #define DA8XX_TIMER64P1_BASE    0x01c21000
 #define DA8XX_GPIO_BASE         0x01e26000
 #define DA8XX_PSC1_BASE         0x01e27000
-#define DA8XX_LCD_CNTRL_BASE    0x01e13000
-#define DA8XX_PLL1_BASE         0x01e1a000
-#define DA8XX_MMCSD0_BASE       0x01c40000
 #define DA8XX_AEMIF_CS2_BASE    0x60000000
 #define DA8XX_AEMIF_CS3_BASE    0x62000000
 #define DA8XX_AEMIF_CTL_BASE    0x68000000
-#define DA8XX_DDR2_CTL_BASE     0xb0000000
 #define DA8XX_ARM_RAM_BASE      0xffff0000
 void __init da830_init(void);
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index c45ba1f62a11..414e0b93e741 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -21,9 +21,6 @@
 */
 #define DAVINCI_SYSTEM_MODULE_BASE        0x01C40000
-/* System control register offsets */
-#define DM64XX_VDD3P3V_PWDN     0x48
 /*
 * I/O mapping
 */
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 805196207ce8..b92c1e557145 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -169,9 +169,11 @@ config MACH_NURI
        select S3C_DEV_HSMMC2
        select S3C_DEV_HSMMC3
        select S3C_DEV_I2C1
+        select S3C_DEV_I2C3
        select S3C_DEV_I2C5
        select S5P_DEV_USB_EHCI
        select EXYNOS4_SETUP_I2C1
+        select EXYNOS4_SETUP_I2C3
        select EXYNOS4_SETUP_I2C5
        select EXYNOS4_SETUP_SDHCI
        select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 777897551e42..683fc387c8af 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_EXYNOS4210)	+= cpu.o init.o clock.o irq-combiner.o
 obj-$(CONFIG_CPU_EXYNOS4210)    += setup-i2c0.o gpiolib.o irq-eint.o dma.o
 obj-$(CONFIG_PM)                += pm.o sleep.o
 obj-$(CONFIG_CPU_FREQ)          += cpufreq.o
+obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
diff --git a/arch/arm/mach-exynos4/cpuidle.c b/arch/arm/mach-exynos4/cpuidle.c
new file mode 100644
index 000000000000..bf7e96f2793a
--- /dev/null
+++ b/arch/arm/mach-exynos4/cpuidle.c
@@ -0,0 +1,86 @@
+/* linux/arch/arm/mach-exynos4/cpuidle.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/cpuidle.h>
+#include <linux/io.h>
+#include <asm/proc-fns.h>
+static int exynos4_enter_idle(struct cpuidle_device *dev,
+                              struct cpuidle_state *state);
+static struct cpuidle_state exynos4_cpuidle_set[] = {
+        [0] = {
+                .enter                  = exynos4_enter_idle,
+                .exit_latency           = 1,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "IDLE",
+                .desc                   = "ARM clock gating(WFI)",
+        },
+};
+static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
+static struct cpuidle_driver exynos4_idle_driver = {
+        .name           = "exynos4_idle",
+        .owner          = THIS_MODULE,
+};
+static int exynos4_enter_idle(struct cpuidle_device *dev,
+                              struct cpuidle_state *state)
+{
+        struct timeval before, after;
+        int idle_time;
+        local_irq_disable();
+        do_gettimeofday(&before);
+        cpu_do_idle();
+        do_gettimeofday(&after);
+        local_irq_enable();
+        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+                    (after.tv_usec - before.tv_usec);
+        return idle_time;
+}
+static int __init exynos4_init_cpuidle(void)
+{
+        int i, max_cpuidle_state, cpu_id;
+        struct cpuidle_device *device;
+        cpuidle_register_driver(&exynos4_idle_driver);
+        for_each_cpu(cpu_id, cpu_online_mask) {
+                device = &per_cpu(exynos4_cpuidle_device, cpu_id);
+                device->cpu = cpu_id;
+                device->state_count = (sizeof(exynos4_cpuidle_set) /
+                                               sizeof(struct cpuidle_state));
+                max_cpuidle_state = device->state_count;
+                for (i = 0; i < max_cpuidle_state; i++) {
+                        memcpy(&device->states[i], &exynos4_cpuidle_set[i],
+                                        sizeof(struct cpuidle_state));
+                }
+                if (cpuidle_register_device(device)) {
+                        printk(KERN_ERR "CPUidle register device failed\n,");
+                        return -EIO;
+                }
+        }
+        return 0;
+}
+device_initcall(exynos4_init_cpuidle);
diff --git a/arch/arm/mach-exynos4/mach-nuri.c b/arch/arm/mach-exynos4/mach-nuri.c
index bb5d12f43af8..642702bb5b12 100644
--- a/arch/arm/mach-exynos4/mach-nuri.c
+++ b/arch/arm/mach-exynos4/mach-nuri.c
@@ -12,6 +12,7 @@
 #include <linux/serial_core.h>
 #include <linux/input.h>
 #include <linux/i2c.h>
+#include <linux/i2c/atmel_mxt_ts.h>
 #include <linux/gpio_keys.h>
 #include <linux/gpio.h>
 #include <linux/regulator/machine.h>
@@ -32,6 +33,8 @@
 #include <plat/sdhci.h>
 #include <plat/ehci.h>
 #include <plat/clock.h>
+#include <plat/gpio-cfg.h>
+#include <plat/iic.h>
 #include <mach/map.h>
@@ -259,6 +262,88 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
        /* Gyro, To be updated */
 };
+/* TSP */
+static u8 mxt_init_vals[] = {
+        /* MXT_GEN_COMMAND(6) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_GEN_POWER(7) */
+        0x20, 0xff, 0x32,
+        /* MXT_GEN_ACQUIRE(8) */
+        0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
+        /* MXT_TOUCH_MULTI(9) */
+        0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
+        0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00,
+        /* MXT_TOUCH_KEYARRAY(15) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+        0x00,
+        /* MXT_SPT_GPIOPWM(19) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_PROCI_GRIPFACE(20) */
+        0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
+        0x0f, 0x0a,
+        /* MXT_PROCG_NOISE(22) */
+        0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
+        0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
+        /* MXT_TOUCH_PROXIMITY(23) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_PROCI_ONETOUCH(24) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_SPT_SELFTEST(25) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00,
+        /* MXT_PROCI_TWOTOUCH(27) */
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        /* MXT_SPT_CTECONFIG(28) */
+        0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
+};
+static struct mxt_platform_data mxt_platform_data = {
+        .config                 = mxt_init_vals,
+        .config_length          = ARRAY_SIZE(mxt_init_vals),
+        .x_line                 = 18,
+        .y_line                 = 11,
+        .x_size                 = 1024,
+        .y_size                 = 600,
+        .blen                   = 0x1,
+        .threshold              = 0x28,
+        .voltage                = 2800000,              /* 2.8V */
+        .orient                 = MXT_DIAGONAL_COUNTER,
+        .irqflags               = IRQF_TRIGGER_FALLING,
+};
+static struct s3c2410_platform_i2c i2c3_data __initdata = {
+        .flags          = 0,
+        .bus_num        = 3,
+        .slave_addr     = 0x10,
+        .frequency      = 400 * 1000,
+        .sda_delay      = 100,
+};
+static struct i2c_board_info i2c3_devs[] __initdata = {
+        {
+                I2C_BOARD_INFO("atmel_mxt_ts", 0x4a),
+                .platform_data  = &mxt_platform_data,
+                .irq            = IRQ_EINT(4),
+        },
+};
+static void __init nuri_tsp_init(void)
+{
+        int gpio;
+        /* TOUCH_INT: XEINT_4 */
+        gpio = EXYNOS4_GPX0(4);
+        gpio_request(gpio, "TOUCH_INT");
+        s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
+        s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
+}
 /* GPIO I2C 5 (PMIC) */
 static struct i2c_board_info i2c5_devs[] __initdata = {
        /* max8997, To be updated */
@@ -283,6 +368,7 @@ static struct platform_device *nuri_devices[] __initdata = {
        &s3c_device_wdt,
        &s3c_device_timer[0],
        &s5p_device_ehci,
+        &s3c_device_i2c3,
        /* NURI Devices */
        &nuri_gpio_keys,
@@ -300,8 +386,11 @@ static void __init nuri_map_io(void)
 static void __init nuri_machine_init(void)
 {
        nuri_sdhci_init();
+        nuri_tsp_init();
        i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
+        s3c_i2c3_set_platdata(&i2c3_data);
+        i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
        i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
        nuri_ehci_init();
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 405e62128917..82db072cb836 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -16,7 +16,6 @@
 #include <mach/dma.h>
 #include <mach/map.h>
-#include <mach/gpio-bank-c.h>
 #include <mach/spi-clocks.h>
 #include <mach/irqs.h>
@@ -40,23 +39,15 @@ static char *spi_src_clks[] = {
 */
 static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
 {
+        unsigned int base;
        switch (pdev->id) {
        case 0:
-                s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);
+                base = S3C64XX_GPC(0);
-                s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);
-                s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);
-                s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);
                break;
        case 1:
-                s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);
+                base = S3C64XX_GPC(4);
-                s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);
-                s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);
-                s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);
-                s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);
                break;
        default:
@@ -64,6 +55,9 @@ static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
                return -EINVAL;
        }
+        s3c_gpio_cfgall_range(base, 3,
+                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
        return 0;
 }
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
deleted file mode 100644
index 34212e1a7e81..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank A register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPACON                  (S3C64XX_GPA_BASE + 0x00)
-#define S3C64XX_GPADAT                  (S3C64XX_GPA_BASE + 0x04)
-#define S3C64XX_GPAPUD                  (S3C64XX_GPA_BASE + 0x08)
-#define S3C64XX_GPACONSLP               (S3C64XX_GPA_BASE + 0x0c)
-#define S3C64XX_GPAPUDSLP               (S3C64XX_GPA_BASE + 0x10)
-#define S3C64XX_GPA_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPA_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPA_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPA0_UART_RXD0          (0x02 << 0)
-#define S3C64XX_GPA0_EINT_G1_0          (0x07 << 0)
-#define S3C64XX_GPA1_UART_TXD0          (0x02 << 4)
-#define S3C64XX_GPA1_EINT_G1_1          (0x07 << 4)
-#define S3C64XX_GPA2_UART_nCTS0         (0x02 << 8)
-#define S3C64XX_GPA2_EINT_G1_2          (0x07 << 8)
-#define S3C64XX_GPA3_UART_nRTS0         (0x02 << 12)
-#define S3C64XX_GPA3_EINT_G1_3          (0x07 << 12)
-#define S3C64XX_GPA4_UART_RXD1          (0x02 << 16)
-#define S3C64XX_GPA4_EINT_G1_4          (0x07 << 16)
-#define S3C64XX_GPA5_UART_TXD1          (0x02 << 20)
-#define S3C64XX_GPA5_EINT_G1_5          (0x07 << 20)
-#define S3C64XX_GPA6_UART_nCTS1         (0x02 << 24)
-#define S3C64XX_GPA6_EINT_G1_6          (0x07 << 24)
-#define S3C64XX_GPA7_UART_nRTS1         (0x02 << 28)
-#define S3C64XX_GPA7_EINT_G1_7          (0x07 << 28)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
deleted file mode 100644
index 7232c037e642..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank B register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPBCON                  (S3C64XX_GPB_BASE + 0x00)
-#define S3C64XX_GPBDAT                  (S3C64XX_GPB_BASE + 0x04)
-#define S3C64XX_GPBPUD                  (S3C64XX_GPB_BASE + 0x08)
-#define S3C64XX_GPBCONSLP               (S3C64XX_GPB_BASE + 0x0c)
-#define S3C64XX_GPBPUDSLP               (S3C64XX_GPB_BASE + 0x10)
-#define S3C64XX_GPB_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPB_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPB_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPB0_UART_RXD2          (0x02 << 0)
-#define S3C64XX_GPB0_EXTDMA_REQ         (0x03 << 0)
-#define S3C64XX_GPB0_IrDA_RXD           (0x04 << 0)
-#define S3C64XX_GPB0_ADDR_CF0           (0x05 << 0)
-#define S3C64XX_GPB0_EINT_G1_8          (0x07 << 0)
-#define S3C64XX_GPB1_UART_TXD2          (0x02 << 4)
-#define S3C64XX_GPB1_EXTDMA_ACK         (0x03 << 4)
-#define S3C64XX_GPB1_IrDA_TXD           (0x04 << 4)
-#define S3C64XX_GPB1_ADDR_CF1           (0x05 << 4)
-#define S3C64XX_GPB1_EINT_G1_9          (0x07 << 4)
-#define S3C64XX_GPB2_UART_RXD3          (0x02 << 8)
-#define S3C64XX_GPB2_IrDA_RXD           (0x03 << 8)
-#define S3C64XX_GPB2_EXTDMA_REQ         (0x04 << 8)
-#define S3C64XX_GPB2_ADDR_CF2           (0x05 << 8)
-#define S3C64XX_GPB2_I2C_SCL1           (0x06 << 8)
-#define S3C64XX_GPB2_EINT_G1_10         (0x07 << 8)
-#define S3C64XX_GPB3_UART_TXD3          (0x02 << 12)
-#define S3C64XX_GPB3_IrDA_TXD           (0x03 << 12)
-#define S3C64XX_GPB3_EXTDMA_ACK         (0x04 << 12)
-#define S3C64XX_GPB3_I2C_SDA1           (0x06 << 12)
-#define S3C64XX_GPB3_EINT_G1_11         (0x07 << 12)
-#define S3C64XX_GPB4_IrDA_SDBW          (0x02 << 16)
-#define S3C64XX_GPB4_CAM_FIELD          (0x03 << 16)
-#define S3C64XX_GPB4_CF_DATA_DIR        (0x04 << 16)
-#define S3C64XX_GPB4_EINT_G1_12         (0x07 << 16)
-#define S3C64XX_GPB5_I2C_SCL0           (0x02 << 20)
-#define S3C64XX_GPB5_EINT_G1_13         (0x07 << 20)
-#define S3C64XX_GPB6_I2C_SDA0           (0x02 << 24)
-#define S3C64XX_GPB6_EINT_G1_14         (0x07 << 24)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
deleted file mode 100644
index db189ab1639a..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank C register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPCCON                  (S3C64XX_GPC_BASE + 0x00)
-#define S3C64XX_GPCDAT                  (S3C64XX_GPC_BASE + 0x04)
-#define S3C64XX_GPCPUD                  (S3C64XX_GPC_BASE + 0x08)
-#define S3C64XX_GPCCONSLP               (S3C64XX_GPC_BASE + 0x0c)
-#define S3C64XX_GPCPUDSLP               (S3C64XX_GPC_BASE + 0x10)
-#define S3C64XX_GPC_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPC_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPC_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPC0_SPI_MISO0          (0x02 << 0)
-#define S3C64XX_GPC0_EINT_G2_0          (0x07 << 0)
-#define S3C64XX_GPC1_SPI_CLKO           (0x02 << 4)
-#define S3C64XX_GPC1_EINT_G2_1          (0x07 << 4)
-#define S3C64XX_GPC2_SPI_MOSIO          (0x02 << 8)
-#define S3C64XX_GPC2_EINT_G2_2          (0x07 << 8)
-#define S3C64XX_GPC3_SPI_nCSO           (0x02 << 12)
-#define S3C64XX_GPC3_EINT_G2_3          (0x07 << 12)
-#define S3C64XX_GPC4_SPI_MISO1          (0x02 << 16)
-#define S3C64XX_GPC4_MMC2_CMD           (0x03 << 16)
-#define S3C64XX_GPC4_I2S_V40_DO0        (0x05 << 16)
-#define S3C64XX_GPC4_EINT_G2_4          (0x07 << 16)
-#define S3C64XX_GPC5_SPI_CLK1           (0x02 << 20)
-#define S3C64XX_GPC5_MMC2_CLK           (0x03 << 20)
-#define S3C64XX_GPC5_I2S_V40_DO1        (0x05 << 20)
-#define S3C64XX_GPC5_EINT_G2_5          (0x07 << 20)
-#define S3C64XX_GPC6_SPI_MOSI1          (0x02 << 24)
-#define S3C64XX_GPC6_EINT_G2_6          (0x07 << 24)
-#define S3C64XX_GPC7_SPI_nCS1           (0x02 << 28)
-#define S3C64XX_GPC7_I2S_V40_DO2        (0x05 << 28)
-#define S3C64XX_GPC7_EINT_G2_7          (0x07 << 28)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
deleted file mode 100644
index 1a01cee7aca3..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank D register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPDCON                  (S3C64XX_GPD_BASE + 0x00)
-#define S3C64XX_GPDDAT                  (S3C64XX_GPD_BASE + 0x04)
-#define S3C64XX_GPDPUD                  (S3C64XX_GPD_BASE + 0x08)
-#define S3C64XX_GPDCONSLP               (S3C64XX_GPD_BASE + 0x0c)
-#define S3C64XX_GPDPUDSLP               (S3C64XX_GPD_BASE + 0x10)
-#define S3C64XX_GPD_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPD_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPD_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPD0_PCM0_SCLK          (0x02 << 0)
-#define S3C64XX_GPD0_I2S0_CLK           (0x03 << 0)
-#define S3C64XX_GPD0_AC97_BITCLK        (0x04 << 0)
-#define S3C64XX_GPD0_EINT_G3_0          (0x07 << 0)
-#define S3C64XX_GPD1_PCM0_EXTCLK        (0x02 << 4)
-#define S3C64XX_GPD1_I2S0_CDCLK         (0x03 << 4)
-#define S3C64XX_GPD1_AC97_nRESET        (0x04 << 4)
-#define S3C64XX_GPD1_EINT_G3_1          (0x07 << 4)
-#define S3C64XX_GPD2_PCM0_FSYNC         (0x02 << 8)
-#define S3C64XX_GPD2_I2S0_LRCLK         (0x03 << 8)
-#define S3C64XX_GPD2_AC97_SYNC          (0x04 << 8)
-#define S3C64XX_GPD2_EINT_G3_2          (0x07 << 8)
-#define S3C64XX_GPD3_PCM0_SIN           (0x02 << 12)
-#define S3C64XX_GPD3_I2S0_DI            (0x03 << 12)
-#define S3C64XX_GPD3_AC97_SDI           (0x04 << 12)
-#define S3C64XX_GPD3_EINT_G3_3          (0x07 << 12)
-#define S3C64XX_GPD4_PCM0_SOUT          (0x02 << 16)
-#define S3C64XX_GPD4_I2S0_D0            (0x03 << 16)
-#define S3C64XX_GPD4_AC97_SDO           (0x04 << 16)
-#define S3C64XX_GPD4_EINT_G3_4          (0x07 << 16)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
deleted file mode 100644
index f057adb627dd..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank E register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPECON                  (S3C64XX_GPE_BASE + 0x00)
-#define S3C64XX_GPEDAT                  (S3C64XX_GPE_BASE + 0x04)
-#define S3C64XX_GPEPUD                  (S3C64XX_GPE_BASE + 0x08)
-#define S3C64XX_GPECONSLP               (S3C64XX_GPE_BASE + 0x0c)
-#define S3C64XX_GPEPUDSLP               (S3C64XX_GPE_BASE + 0x10)
-#define S3C64XX_GPE_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPE_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPE_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPE0_PCM1_SCLK          (0x02 << 0)
-#define S3C64XX_GPE0_I2S1_CLK           (0x03 << 0)
-#define S3C64XX_GPE0_AC97_BITCLK        (0x04 << 0)
-#define S3C64XX_GPE1_PCM1_EXTCLK        (0x02 << 4)
-#define S3C64XX_GPE1_I2S1_CDCLK         (0x03 << 4)
-#define S3C64XX_GPE1_AC97_nRESET        (0x04 << 4)
-#define S3C64XX_GPE2_PCM1_FSYNC         (0x02 << 8)
-#define S3C64XX_GPE2_I2S1_LRCLK         (0x03 << 8)
-#define S3C64XX_GPE2_AC97_SYNC          (0x04 << 8)
-#define S3C64XX_GPE3_PCM1_SIN           (0x02 << 12)
-#define S3C64XX_GPE3_I2S1_DI            (0x03 << 12)
-#define S3C64XX_GPE3_AC97_SDI           (0x04 << 12)
-#define S3C64XX_GPE4_PCM1_SOUT          (0x02 << 16)
-#define S3C64XX_GPE4_I2S1_D0            (0x03 << 16)
-#define S3C64XX_GPE4_AC97_SDO           (0x04 << 16)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
deleted file mode 100644
index 62ab8f5e7835..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank F register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPFCON                  (S3C64XX_GPF_BASE + 0x00)
-#define S3C64XX_GPFDAT                  (S3C64XX_GPF_BASE + 0x04)
-#define S3C64XX_GPFPUD                  (S3C64XX_GPF_BASE + 0x08)
-#define S3C64XX_GPFCONSLP               (S3C64XX_GPF_BASE + 0x0c)
-#define S3C64XX_GPFPUDSLP               (S3C64XX_GPF_BASE + 0x10)
-#define S3C64XX_GPF_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPF_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPF_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPF0_CAMIF_CLK          (0x02 << 0)
-#define S3C64XX_GPF0_EINT_G4_0          (0x03 << 0)
-#define S3C64XX_GPF1_CAMIF_HREF         (0x02 << 2)
-#define S3C64XX_GPF1_EINT_G4_1          (0x03 << 2)
-#define S3C64XX_GPF2_CAMIF_PCLK         (0x02 << 4)
-#define S3C64XX_GPF2_EINT_G4_2          (0x03 << 4)
-#define S3C64XX_GPF3_CAMIF_nRST         (0x02 << 6)
-#define S3C64XX_GPF3_EINT_G4_3          (0x03 << 6)
-#define S3C64XX_GPF4_CAMIF_VSYNC        (0x02 << 8)
-#define S3C64XX_GPF4_EINT_G4_4          (0x03 << 8)
-#define S3C64XX_GPF5_CAMIF_YDATA0       (0x02 << 10)
-#define S3C64XX_GPF5_EINT_G4_5          (0x03 << 10)
-#define S3C64XX_GPF6_CAMIF_YDATA1       (0x02 << 12)
-#define S3C64XX_GPF6_EINT_G4_6          (0x03 << 12)
-#define S3C64XX_GPF7_CAMIF_YDATA2       (0x02 << 14)
-#define S3C64XX_GPF7_EINT_G4_7          (0x03 << 14)
-#define S3C64XX_GPF8_CAMIF_YDATA3       (0x02 << 16)
-#define S3C64XX_GPF8_EINT_G4_8          (0x03 << 16)
-#define S3C64XX_GPF9_CAMIF_YDATA4       (0x02 << 18)
-#define S3C64XX_GPF9_EINT_G4_9          (0x03 << 18)
-#define S3C64XX_GPF10_CAMIF_YDATA5      (0x02 << 20)
-#define S3C64XX_GPF10_EINT_G4_10        (0x03 << 20)
-#define S3C64XX_GPF11_CAMIF_YDATA6      (0x02 << 22)
-#define S3C64XX_GPF11_EINT_G4_11        (0x03 << 22)
-#define S3C64XX_GPF12_CAMIF_YDATA7      (0x02 << 24)
-#define S3C64XX_GPF12_EINT_G4_12        (0x03 << 24)
-#define S3C64XX_GPF13_PWM_ECLK          (0x02 << 26)
-#define S3C64XX_GPF13_EINT_G4_13        (0x03 << 26)
-#define S3C64XX_GPF14_PWM_TOUT0         (0x02 << 28)
-#define S3C64XX_GPF14_CLKOUT0           (0x03 << 28)
-#define S3C64XX_GPF15_PWM_TOUT1         (0x02 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
deleted file mode 100644
index b94954af1598..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank G register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPGCON                  (S3C64XX_GPG_BASE + 0x00)
-#define S3C64XX_GPGDAT                  (S3C64XX_GPG_BASE + 0x04)
-#define S3C64XX_GPGPUD                  (S3C64XX_GPG_BASE + 0x08)
-#define S3C64XX_GPGCONSLP               (S3C64XX_GPG_BASE + 0x0c)
-#define S3C64XX_GPGPUDSLP               (S3C64XX_GPG_BASE + 0x10)
-#define S3C64XX_GPG_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPG_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPG_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPG0_MMC0_CLK           (0x02 << 0)
-#define S3C64XX_GPG0_EINT_G5_0          (0x07 << 0)
-#define S3C64XX_GPG1_MMC0_CMD           (0x02 << 4)
-#define S3C64XX_GPG1_EINT_G5_1          (0x07 << 4)
-#define S3C64XX_GPG2_MMC0_DATA0         (0x02 << 8)
-#define S3C64XX_GPG2_EINT_G5_2          (0x07 << 8)
-#define S3C64XX_GPG3_MMC0_DATA1         (0x02 << 12)
-#define S3C64XX_GPG3_EINT_G5_3          (0x07 << 12)
-#define S3C64XX_GPG4_MMC0_DATA2         (0x02 << 16)
-#define S3C64XX_GPG4_EINT_G5_4          (0x07 << 16)
-#define S3C64XX_GPG5_MMC0_DATA3         (0x02 << 20)
-#define S3C64XX_GPG5_EINT_G5_5          (0x07 << 20)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
deleted file mode 100644
index 5d75aaad865e..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank H register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPHCON0                 (S3C64XX_GPH_BASE + 0x00)
-#define S3C64XX_GPHCON1                 (S3C64XX_GPH_BASE + 0x04)
-#define S3C64XX_GPHDAT                  (S3C64XX_GPH_BASE + 0x08)
-#define S3C64XX_GPHPUD                  (S3C64XX_GPH_BASE + 0x0c)
-#define S3C64XX_GPHCONSLP               (S3C64XX_GPH_BASE + 0x10)
-#define S3C64XX_GPHPUDSLP               (S3C64XX_GPH_BASE + 0x14)
-#define S3C64XX_GPH_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
-#define S3C64XX_GPH_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
-#define S3C64XX_GPH_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
-#define S3C64XX_GPH0_MMC1_CLK           (0x02 << 0)
-#define S3C64XX_GPH0_KP_COL0            (0x04 << 0)
-#define S3C64XX_GPH0_EINT_G6_0          (0x07 << 0)
-#define S3C64XX_GPH1_MMC1_CMD           (0x02 << 4)
-#define S3C64XX_GPH1_KP_COL1            (0x04 << 4)
-#define S3C64XX_GPH1_EINT_G6_1          (0x07 << 4)
-#define S3C64XX_GPH2_MMC1_DATA0         (0x02 << 8)
-#define S3C64XX_GPH2_KP_COL2            (0x04 << 8)
-#define S3C64XX_GPH2_EINT_G6_2          (0x07 << 8)
-#define S3C64XX_GPH3_MMC1_DATA1         (0x02 << 12)
-#define S3C64XX_GPH3_KP_COL3            (0x04 << 12)
-#define S3C64XX_GPH3_EINT_G6_3          (0x07 << 12)
-#define S3C64XX_GPH4_MMC1_DATA2         (0x02 << 16)
-#define S3C64XX_GPH4_KP_COL4            (0x04 << 16)
-#define S3C64XX_GPH4_EINT_G6_4          (0x07 << 16)
-#define S3C64XX_GPH5_MMC1_DATA3         (0x02 << 20)
-#define S3C64XX_GPH5_KP_COL5            (0x04 << 20)
-#define S3C64XX_GPH5_EINT_G6_5          (0x07 << 20)
-#define S3C64XX_GPH6_MMC1_DATA4         (0x02 << 24)
-#define S3C64XX_GPH6_MMC2_DATA0         (0x03 << 24)
-#define S3C64XX_GPH6_KP_COL6            (0x04 << 24)
-#define S3C64XX_GPH6_I2S_V40_BCLK       (0x05 << 24)
-#define S3C64XX_GPH6_ADDR_CF0           (0x06 << 24)
-#define S3C64XX_GPH6_EINT_G6_6          (0x07 << 24)
-#define S3C64XX_GPH7_MMC1_DATA5         (0x02 << 28)
-#define S3C64XX_GPH7_MMC2_DATA1         (0x03 << 28)
-#define S3C64XX_GPH7_KP_COL7            (0x04 << 28)
-#define S3C64XX_GPH7_I2S_V40_CDCLK      (0x05 << 28)
-#define S3C64XX_GPH7_ADDR_CF1           (0x06 << 28)
-#define S3C64XX_GPH7_EINT_G6_7          (0x07 << 28)
-#define S3C64XX_GPH8_MMC1_DATA6         (0x02 <<  0)
-#define S3C64XX_GPH8_MMC2_DATA2         (0x03 <<  0)
-#define S3C64XX_GPH8_I2S_V40_LRCLK      (0x05 <<  0)
-#define S3C64XX_GPH8_ADDR_CF2           (0x06 <<  0)
-#define S3C64XX_GPH8_EINT_G6_8          (0x07 <<  0)
-#define S3C64XX_GPH9_OUTPUT             (0x01 <<  4)
-#define S3C64XX_GPH9_MMC1_DATA7         (0x02 <<  4)
-#define S3C64XX_GPH9_MMC2_DATA3         (0x03 <<  4)
-#define S3C64XX_GPH9_I2S_V40_DI         (0x05 <<  4)
-#define S3C64XX_GPH9_EINT_G6_9          (0x07 <<  4)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
deleted file mode 100644
index 4ceaa6098bc7..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank I register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPICON                  (S3C64XX_GPI_BASE + 0x00)
-#define S3C64XX_GPIDAT                  (S3C64XX_GPI_BASE + 0x04)
-#define S3C64XX_GPIPUD                  (S3C64XX_GPI_BASE + 0x08)
-#define S3C64XX_GPICONSLP               (S3C64XX_GPI_BASE + 0x0c)
-#define S3C64XX_GPIPUDSLP               (S3C64XX_GPI_BASE + 0x10)
-#define S3C64XX_GPI_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPI_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPI_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPI0_VD0                (0x02 << 0)
-#define S3C64XX_GPI1_VD1                (0x02 << 2)
-#define S3C64XX_GPI2_VD2                (0x02 << 4)
-#define S3C64XX_GPI3_VD3                (0x02 << 6)
-#define S3C64XX_GPI4_VD4                (0x02 << 8)
-#define S3C64XX_GPI5_VD5                (0x02 << 10)
-#define S3C64XX_GPI6_VD6                (0x02 << 12)
-#define S3C64XX_GPI7_VD7                (0x02 << 14)
-#define S3C64XX_GPI8_VD8                (0x02 << 16)
-#define S3C64XX_GPI9_VD9                (0x02 << 18)
-#define S3C64XX_GPI10_VD10              (0x02 << 20)
-#define S3C64XX_GPI11_VD11              (0x02 << 22)
-#define S3C64XX_GPI12_VD12              (0x02 << 24)
-#define S3C64XX_GPI13_VD13              (0x02 << 26)
-#define S3C64XX_GPI14_VD14              (0x02 << 28)
-#define S3C64XX_GPI15_VD15              (0x02 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
deleted file mode 100644
index 6f25cd079a40..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank J register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPJCON                  (S3C64XX_GPJ_BASE + 0x00)
-#define S3C64XX_GPJDAT                  (S3C64XX_GPJ_BASE + 0x04)
-#define S3C64XX_GPJPUD                  (S3C64XX_GPJ_BASE + 0x08)
-#define S3C64XX_GPJCONSLP               (S3C64XX_GPJ_BASE + 0x0c)
-#define S3C64XX_GPJPUDSLP               (S3C64XX_GPJ_BASE + 0x10)
-#define S3C64XX_GPJ_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPJ_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPJ_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPJ0_VD16               (0x02 << 0)
-#define S3C64XX_GPJ1_VD17               (0x02 << 2)
-#define S3C64XX_GPJ2_VD18               (0x02 << 4)
-#define S3C64XX_GPJ3_VD19               (0x02 << 6)
-#define S3C64XX_GPJ4_VD20               (0x02 << 8)
-#define S3C64XX_GPJ5_VD21               (0x02 << 10)
-#define S3C64XX_GPJ6_VD22               (0x02 << 12)
-#define S3C64XX_GPJ7_VD23               (0x02 << 14)
-#define S3C64XX_GPJ8_LCD_HSYNC          (0x02 << 16)
-#define S3C64XX_GPJ9_LCD_VSYNC          (0x02 << 18)
-#define S3C64XX_GPJ10_LCD_VDEN          (0x02 << 20)
-#define S3C64XX_GPJ11_LCD_VCLK          (0x02 << 22)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
deleted file mode 100644
index d0aeda1cd9de..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank N register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPNCON                  (S3C64XX_GPN_BASE + 0x00)
-#define S3C64XX_GPNDAT                  (S3C64XX_GPN_BASE + 0x04)
-#define S3C64XX_GPNPUD                  (S3C64XX_GPN_BASE + 0x08)
-#define S3C64XX_GPN_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPN_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPN_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPN0_EINT0              (0x02 << 0)
-#define S3C64XX_GPN0_KP_ROW0            (0x03 << 0)
-#define S3C64XX_GPN1_EINT1              (0x02 << 2)
-#define S3C64XX_GPN1_KP_ROW1            (0x03 << 2)
-#define S3C64XX_GPN2_EINT2              (0x02 << 4)
-#define S3C64XX_GPN2_KP_ROW2            (0x03 << 4)
-#define S3C64XX_GPN3_EINT3              (0x02 << 6)
-#define S3C64XX_GPN3_KP_ROW3            (0x03 << 6)
-#define S3C64XX_GPN4_EINT4              (0x02 << 8)
-#define S3C64XX_GPN4_KP_ROW4            (0x03 << 8)
-#define S3C64XX_GPN5_EINT5              (0x02 << 10)
-#define S3C64XX_GPN5_KP_ROW5            (0x03 << 10)
-#define S3C64XX_GPN6_EINT6              (0x02 << 12)
-#define S3C64XX_GPN6_KP_ROW6            (0x03 << 12)
-#define S3C64XX_GPN7_EINT7              (0x02 << 14)
-#define S3C64XX_GPN7_KP_ROW7            (0x03 << 14)
-#define S3C64XX_GPN8_EINT8              (0x02 << 16)
-#define S3C64XX_GPN9_EINT9              (0x02 << 18)
-#define S3C64XX_GPN10_EINT10            (0x02 << 20)
-#define S3C64XX_GPN11_EINT11            (0x02 << 22)
-#define S3C64XX_GPN12_EINT12            (0x02 << 24)
-#define S3C64XX_GPN13_EINT13            (0x02 << 26)
-#define S3C64XX_GPN14_EINT14            (0x02 << 28)
-#define S3C64XX_GPN15_EINT15            (0x02 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
deleted file mode 100644
index 21868fa102d0..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank O register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPOCON                  (S3C64XX_GPO_BASE + 0x00)
-#define S3C64XX_GPODAT                  (S3C64XX_GPO_BASE + 0x04)
-#define S3C64XX_GPOPUD                  (S3C64XX_GPO_BASE + 0x08)
-#define S3C64XX_GPOCONSLP               (S3C64XX_GPO_BASE + 0x0c)
-#define S3C64XX_GPOPUDSLP               (S3C64XX_GPO_BASE + 0x10)
-#define S3C64XX_GPO_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPO_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPO_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPO0_MEM0_nCS2          (0x02 << 0)
-#define S3C64XX_GPO0_EINT_G7_0          (0x03 << 0)
-#define S3C64XX_GPO1_MEM0_nCS3          (0x02 << 2)
-#define S3C64XX_GPO1_EINT_G7_1          (0x03 << 2)
-#define S3C64XX_GPO2_MEM0_nCS4          (0x02 << 4)
-#define S3C64XX_GPO2_EINT_G7_2          (0x03 << 4)
-#define S3C64XX_GPO3_MEM0_nCS5          (0x02 << 6)
-#define S3C64XX_GPO3_EINT_G7_3          (0x03 << 6)
-#define S3C64XX_GPO4_EINT_G7_4          (0x03 << 8)
-#define S3C64XX_GPO5_EINT_G7_5          (0x03 << 10)
-#define S3C64XX_GPO6_MEM0_ADDR6         (0x02 << 12)
-#define S3C64XX_GPO6_EINT_G7_6          (0x03 << 12)
-#define S3C64XX_GPO7_MEM0_ADDR7         (0x02 << 14)
-#define S3C64XX_GPO7_EINT_G7_7          (0x03 << 14)
-#define S3C64XX_GPO8_MEM0_ADDR8         (0x02 << 16)
-#define S3C64XX_GPO8_EINT_G7_8          (0x03 << 16)
-#define S3C64XX_GPO9_MEM0_ADDR9         (0x02 << 18)
-#define S3C64XX_GPO9_EINT_G7_9          (0x03 << 18)
-#define S3C64XX_GPO10_MEM0_ADDR10       (0x02 << 20)
-#define S3C64XX_GPO10_EINT_G7_10        (0x03 << 20)
-#define S3C64XX_GPO11_MEM0_ADDR11       (0x02 << 22)
-#define S3C64XX_GPO11_EINT_G7_11        (0x03 << 22)
-#define S3C64XX_GPO12_MEM0_ADDR12       (0x02 << 24)
-#define S3C64XX_GPO12_EINT_G7_12        (0x03 << 24)
-#define S3C64XX_GPO13_MEM0_ADDR13       (0x02 << 26)
-#define S3C64XX_GPO13_EINT_G7_13        (0x03 << 26)
-#define S3C64XX_GPO14_MEM0_ADDR14       (0x02 << 28)
-#define S3C64XX_GPO14_EINT_G7_14        (0x03 << 28)
-#define S3C64XX_GPO15_MEM0_ADDR15       (0x02 << 30)
-#define S3C64XX_GPO15_EINT_G7_15        (0x03 << 30)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
deleted file mode 100644
index 46bcfb63b8de..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank P register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPPCON                  (S3C64XX_GPP_BASE + 0x00)
-#define S3C64XX_GPPDAT                  (S3C64XX_GPP_BASE + 0x04)
-#define S3C64XX_GPPPUD                  (S3C64XX_GPP_BASE + 0x08)
-#define S3C64XX_GPPCONSLP               (S3C64XX_GPP_BASE + 0x0c)
-#define S3C64XX_GPPPUDSLP               (S3C64XX_GPP_BASE + 0x10)
-#define S3C64XX_GPP_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPP_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPP_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPP0_MEM0_ADDRV         (0x02 << 0)
-#define S3C64XX_GPP0_EINT_G8_0          (0x03 << 0)
-#define S3C64XX_GPP1_MEM0_SMCLK         (0x02 << 2)
-#define S3C64XX_GPP1_EINT_G8_1          (0x03 << 2)
-#define S3C64XX_GPP2_MEM0_nWAIT         (0x02 << 4)
-#define S3C64XX_GPP2_EINT_G8_2          (0x03 << 4)
-#define S3C64XX_GPP3_MEM0_RDY0_ALE      (0x02 << 6)
-#define S3C64XX_GPP3_EINT_G8_3          (0x03 << 6)
-#define S3C64XX_GPP4_MEM0_RDY1_CLE      (0x02 << 8)
-#define S3C64XX_GPP4_EINT_G8_4          (0x03 << 8)
-#define S3C64XX_GPP5_MEM0_INTsm0_FWE    (0x02 << 10)
-#define S3C64XX_GPP5_EINT_G8_5          (0x03 << 10)
-#define S3C64XX_GPP6_MEM0_(null)        (0x02 << 12)
-#define S3C64XX_GPP6_EINT_G8_6          (0x03 << 12)
-#define S3C64XX_GPP7_MEM0_INTsm1_FRE    (0x02 << 14)
-#define S3C64XX_GPP7_EINT_G8_7          (0x03 << 14)
-#define S3C64XX_GPP8_MEM0_RPn_RnB       (0x02 << 16)
-#define S3C64XX_GPP8_EINT_G8_8          (0x03 << 16)
-#define S3C64XX_GPP9_MEM0_ATA_RESET     (0x02 << 18)
-#define S3C64XX_GPP9_EINT_G8_9          (0x03 << 18)
-#define S3C64XX_GPP10_MEM0_ATA_INPACK   (0x02 << 20)
-#define S3C64XX_GPP10_EINT_G8_10        (0x03 << 20)
-#define S3C64XX_GPP11_MEM0_ATA_REG      (0x02 << 22)
-#define S3C64XX_GPP11_EINT_G8_11        (0x03 << 22)
-#define S3C64XX_GPP12_MEM0_ATA_WE       (0x02 << 24)
-#define S3C64XX_GPP12_EINT_G8_12        (0x03 << 24)
-#define S3C64XX_GPP13_MEM0_ATA_OE       (0x02 << 26)
-#define S3C64XX_GPP13_EINT_G8_13        (0x03 << 26)
-#define S3C64XX_GPP14_MEM0_ATA_CD       (0x02 << 28)
-#define S3C64XX_GPP14_EINT_G8_14        (0x03 << 28)
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
deleted file mode 100644
index 1712223487b0..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * GPIO Bank Q register and configuration definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#define S3C64XX_GPQCON                  (S3C64XX_GPQ_BASE + 0x00)
-#define S3C64XX_GPQDAT                  (S3C64XX_GPQ_BASE + 0x04)
-#define S3C64XX_GPQPUD                  (S3C64XX_GPQ_BASE + 0x08)
-#define S3C64XX_GPQCONSLP               (S3C64XX_GPQ_BASE + 0x0c)
-#define S3C64XX_GPQPUDSLP               (S3C64XX_GPQ_BASE + 0x10)
-#define S3C64XX_GPQ_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
-#define S3C64XX_GPQ_INPUT(__gpio)       (0x0 << ((__gpio) * 2))
-#define S3C64XX_GPQ_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
-#define S3C64XX_GPQ0_MEM0_ADDR18_RAS    (0x02 << 0)
-#define S3C64XX_GPQ0_EINT_G9_0          (0x03 << 0)
-#define S3C64XX_GPQ1_MEM0_ADDR19_CAS    (0x02 << 2)
-#define S3C64XX_GPQ1_EINT_G9_1          (0x03 << 2)
-#define S3C64XX_GPQ2_EINT_G9_2          (0x03 << 4)
-#define S3C64XX_GPQ3_EINT_G9_3          (0x03 << 6)
-#define S3C64XX_GPQ4_EINT_G9_4          (0x03 << 8)
-#define S3C64XX_GPQ5_EINT_G9_5          (0x03 << 10)
-#define S3C64XX_GPQ6_EINT_G9_6          (0x03 << 12)
-#define S3C64XX_GPQ7_MEM0_ADDR17_WENDMC (0x02 << 14)
-#define S3C64XX_GPQ7_EINT_G9_7          (0x03 << 14)
-#define S3C64XX_GPQ8_MEM0_ADDR16_APDMC  (0x02 << 16)
-#define S3C64XX_GPQ8_EINT_G9_8          (0x03 << 16)
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 686a4f270b12..2c0353a80906 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -50,7 +50,6 @@
 #include <mach/hardware.h>
 #include <mach/regs-fb.h>
 #include <mach/map.h>
-#include <mach/gpio-bank-f.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 79412f735a8d..bc1c470b7de6 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -30,26 +30,18 @@
 #include <mach/regs-gpio-memport.h>
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
-#include <mach/gpio-bank-n.h>
 void s3c_pm_debug_smdkled(u32 set, u32 clear)
 {
        unsigned long flags;
-        u32 reg;
+        int i;
        local_irq_save(flags);
-        reg = __raw_readl(S3C64XX_GPNCON);
+        for (i = 0; i < 4; i++) {
-        reg &= ~(S3C64XX_GPN_CONMASK(12) | S3C64XX_GPN_CONMASK(13) |
+                if (clear & (1 << i))
-                 S3C64XX_GPN_CONMASK(14) | S3C64XX_GPN_CONMASK(15));
+                        gpio_set_value(S3C64XX_GPN(12 + i), 0);
-        reg |= S3C64XX_GPN_OUTPUT(12) | S3C64XX_GPN_OUTPUT(13) |
+                if (set & (1 << i))
-               S3C64XX_GPN_OUTPUT(14) | S3C64XX_GPN_OUTPUT(15);
+                        gpio_set_value(S3C64XX_GPN(12 + i), 1);
-        __raw_writel(reg, S3C64XX_GPNCON);
+        }
-        reg = __raw_readl(S3C64XX_GPNDAT);
-        reg &= ~(clear << 12);
-        reg |= set << 12;
-        __raw_writel(reg, S3C64XX_GPNDAT);
        local_irq_restore(flags);
 }
 #endif
@@ -187,6 +179,18 @@ static int s3c64xx_pm_init(void)
        pm_cpu_prep = s3c64xx_pm_prepare;
        pm_cpu_sleep = s3c64xx_cpu_suspend;
        pm_uart_udivslot = 1;
+#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
+        gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
+        gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
+        gpio_request(S3C64XX_GPN(14), "DEBUG_LED2");
+        gpio_request(S3C64XX_GPN(15), "DEBUG_LED3");
+        gpio_direction_output(S3C64XX_GPN(12), 0);
+        gpio_direction_output(S3C64XX_GPN(13), 0);
+        gpio_direction_output(S3C64XX_GPN(14), 0);
+        gpio_direction_output(S3C64XX_GPN(15), 0);
+#endif
        return 0;
 }
diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index 406192a43c6e..241af94a9e70 100644
--- a/arch/arm/mach-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -18,14 +18,11 @@
 struct platform_device; /* don't need the contents */
-#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
-        s3c_gpio_cfgpin(S3C64XX_GPB(5), S3C64XX_GPB5_I2C_SCL0);
+        s3c_gpio_cfgall_range(S3C64XX_GPB(5), 2,
-        s3c_gpio_cfgpin(S3C64XX_GPB(6), S3C64XX_GPB6_I2C_SDA0);
+                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(5), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(6), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index 1ee62c97cd7f..3d13a961986d 100644
--- a/arch/arm/mach-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -18,14 +18,11 @@
 struct platform_device; /* don't need the contents */
-#include <mach/gpio-bank-b.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
 void s3c_i2c1_cfg_gpio(struct platform_device *dev)
 {
-        s3c_gpio_cfgpin(S3C64XX_GPB(2), S3C64XX_GPB2_I2C_SCL1);
+        s3c_gpio_cfgall_range(S3C64XX_GPB(2), 2,
-        s3c_gpio_cfgpin(S3C64XX_GPB(3), S3C64XX_GPB3_I2C_SDA1);
+                              S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(2), S3C_GPIO_PULL_UP);
-        s3c_gpio_setpull(S3C64XX_GPB(3), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index afe5a762f46e..1f87732b2320 100644
--- a/arch/arm/mach-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -20,7 +20,6 @@
 #define S3C64XX_VA_GPIO (0x0)
 #include <mach/regs-gpio.h>
-#include <mach/gpio-bank-n.h>
 #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
@@ -68,6 +67,13 @@ ENTRY(s3c_cpu_resume)
        ldr     r2, =LL_UART            /* for debug */
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
+#define S3C64XX_GPNCON                  (S3C64XX_GPN_BASE + 0x00)
+#define S3C64XX_GPNDAT                  (S3C64XX_GPN_BASE + 0x04)
+#define S3C64XX_GPN_CONMASK(__gpio)     (0x3 << ((__gpio) * 2))
+#define S3C64XX_GPN_OUTPUT(__gpio)      (0x1 << ((__gpio) * 2))
        /* Initialise the GPIO state if we are debugging via the SMDK LEDs,
         * as the uboot version supplied resets these to inputs during the
         * resume checks.
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
deleted file mode 100644
index 33569e4007c4..000000000000
--- a/arch/arm/mach-s5p6442/Kconfig
+++ /dev/null
@@ -1,25 +0,0 @@
-# arch/arm/mach-s5p6442/Kconfig
-#
-# Copyright (c) 2010 Samsung Electronics Co., Ltd.
-#               http://www.samsung.com/
-#
-# Licensed under GPLv2
-# Configuration options for the S5P6442
-if ARCH_S5P6442
-config CPU_S5P6442
-        bool
-        select S3C_PL330_DMA
-        help
-          Enable S5P6442 CPU support
-config MACH_SMDK6442
-        bool "SMDK6442"
-        select CPU_S5P6442
-        select S3C_DEV_WDT
-        help
-          Machine support for Samsung SMDK6442
-endif
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
deleted file mode 100644
index 90a3d8373416..000000000000
--- a/arch/arm/mach-s5p6442/Makefile
+++ /dev/null
@@ -1,24 +0,0 @@
-# arch/arm/mach-s5p6442/Makefile
-#
-# Copyright (c) 2010 Samsung Electronics Co., Ltd.
-#               http://www.samsung.com/
-#
-# Licensed under GPLv2
-obj-y                           :=
-obj-m                           :=
-obj-n                           :=
-obj-                            :=
-# Core support for S5P6442 system
-obj-$(CONFIG_CPU_S5P6442)       += cpu.o init.o clock.o dma.o
-obj-$(CONFIG_CPU_S5P6442)       += setup-i2c0.o
-# machine support
-obj-$(CONFIG_MACH_SMDK6442)     += mach-smdk6442.o
-# device support
-obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot
deleted file mode 100644
index ff90aa13bd67..000000000000
--- a/arch/arm/mach-s5p6442/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-   zreladdr-y   := 0x20008000
-params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
deleted file mode 100644
index fbbc7bede685..000000000000
--- a/arch/arm/mach-s5p6442/clock.c
+++ /dev/null
@@ -1,420 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/clock.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <mach/map.h>
-#include <plat/cpu-freq.h>
-#include <mach/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-#include <plat/s5p-clock.h>
-#include <plat/clock-clksrc.h>
-#include <plat/s5p6442.h>
-static struct clksrc_clk clk_mout_apll = {
-        .clk    = {
-                .name           = "mout_apll",
-                .id             = -1,
-        },
-        .sources        = &clk_src_apll,
-        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
-};
-static struct clksrc_clk clk_mout_mpll = {
-        .clk = {
-                .name           = "mout_mpll",
-                .id             = -1,
-        },
-        .sources        = &clk_src_mpll,
-        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
-};
-static struct clksrc_clk clk_mout_epll = {
-        .clk    = {
-                .name           = "mout_epll",
-                .id             = -1,
-        },
-        .sources        = &clk_src_epll,
-        .reg_src        = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
-};
-/* Possible clock sources for ARM Mux */
-static struct clk *clk_src_arm_list[] = {
-        [1] = &clk_mout_apll.clk,
-        [2] = &clk_mout_mpll.clk,
-};
-static struct clksrc_sources clk_src_arm = {
-        .sources        = clk_src_arm_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_arm_list),
-};
-static struct clksrc_clk clk_mout_arm = {
-        .clk    = {
-                .name           = "mout_arm",
-                .id             = -1,
-        },
-        .sources        = &clk_src_arm,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
-};
-static struct clk clk_dout_a2m = {
-        .name           = "dout_a2m",
-        .id             = -1,
-        .parent         = &clk_mout_apll.clk,
-};
-/* Possible clock sources for D0 Mux */
-static struct clk *clk_src_d0_list[] = {
-        [1] = &clk_mout_mpll.clk,
-        [2] = &clk_dout_a2m,
-};
-static struct clksrc_sources clk_src_d0 = {
-        .sources        = clk_src_d0_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d0_list),
-};
-static struct clksrc_clk clk_mout_d0 = {
-        .clk = {
-                .name           = "mout_d0",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d0,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 },
-};
-static struct clk clk_dout_apll = {
-        .name           = "dout_apll",
-        .id             = -1,
-        .parent         = &clk_mout_arm.clk,
-};
-/* Possible clock sources for D0SYNC Mux */
-static struct clk *clk_src_d0sync_list[] = {
-        [1] = &clk_mout_d0.clk,
-        [2] = &clk_dout_apll,
-};
-static struct clksrc_sources clk_src_d0sync = {
-        .sources        = clk_src_d0sync_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d0sync_list),
-};
-static struct clksrc_clk clk_mout_d0sync = {
-        .clk    = {
-                .name           = "mout_d0sync",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d0sync,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
-};
-/* Possible clock sources for D1 Mux */
-static struct clk *clk_src_d1_list[] = {
-        [1] = &clk_mout_mpll.clk,
-        [2] = &clk_dout_a2m,
-};
-static struct clksrc_sources clk_src_d1 = {
-        .sources        = clk_src_d1_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d1_list),
-};
-static struct clksrc_clk clk_mout_d1 = {
-        .clk    = {
-                .name           = "mout_d1",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d1,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 },
-};
-/* Possible clock sources for D1SYNC Mux */
-static struct clk *clk_src_d1sync_list[] = {
-        [1] = &clk_mout_d1.clk,
-        [2] = &clk_dout_apll,
-};
-static struct clksrc_sources clk_src_d1sync = {
-        .sources        = clk_src_d1sync_list,
-        .nr_sources     = ARRAY_SIZE(clk_src_d1sync_list),
-};
-static struct clksrc_clk clk_mout_d1sync = {
-        .clk    = {
-                .name           = "mout_d1sync",
-                .id             = -1,
-        },
-        .sources        = &clk_src_d1sync,
-        .reg_src        = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
-};
-static struct clk clk_hclkd0 = {
-        .name           = "hclkd0",
-        .id             = -1,
-        .parent         = &clk_mout_d0sync.clk,
-};
-static struct clk clk_hclkd1 = {
-        .name           = "hclkd1",
-        .id             = -1,
-        .parent         = &clk_mout_d1sync.clk,
-};
-static struct clk clk_pclkd0 = {
-        .name           = "pclkd0",
-        .id             = -1,
-        .parent         = &clk_hclkd0,
-};
-static struct clk clk_pclkd1 = {
-        .name           = "pclkd1",
-        .id             = -1,
-        .parent         = &clk_hclkd1,
-};
-int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable)
-{
-        return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
-}
-int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
-{
-        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
-}
-static struct clksrc_clk clksrcs[] = {
-        {
-                .clk    = {
-                        .name           = "dout_a2m",
-                        .id             = -1,
-                        .parent         = &clk_mout_apll.clk,
-                },
-                .sources = &clk_src_apll,
-                .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
-        }, {
-                .clk    = {
-                        .name           = "dout_apll",
-                        .id             = -1,
-                        .parent         = &clk_mout_arm.clk,
-                },
-                .sources = &clk_src_arm,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
-        }, {
-                .clk    = {
-                        .name           = "hclkd1",
-                        .id             = -1,
-                        .parent         = &clk_mout_d1sync.clk,
-                },
-                .sources = &clk_src_d1sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "hclkd0",
-                        .id             = -1,
-                        .parent         = &clk_mout_d0sync.clk,
-                },
-                .sources = &clk_src_d0sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "pclkd0",
-                        .id             = -1,
-                        .parent         = &clk_hclkd0,
-                },
-                .sources = &clk_src_d0sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
-        }, {
-                .clk    = {
-                        .name           = "pclkd1",
-                        .id             = -1,
-                        .parent         = &clk_hclkd1,
-                },
-                .sources = &clk_src_d1sync,
-                .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
-                .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
-        }
-};
-/* Clock initialisation code */
-static struct clksrc_clk *init_parents[] = {
-        &clk_mout_apll,
-        &clk_mout_mpll,
-        &clk_mout_epll,
-        &clk_mout_arm,
-        &clk_mout_d0,
-        &clk_mout_d0sync,
-        &clk_mout_d1,
-        &clk_mout_d1sync,
-};
-void __init_or_cpufreq s5p6442_setup_clocks(void)
-{
-        struct clk *pclkd0_clk;
-        struct clk *pclkd1_clk;
-        unsigned long xtal;
-        unsigned long arm;
-        unsigned long hclkd0 = 0;
-        unsigned long hclkd1 = 0;
-        unsigned long pclkd0 = 0;
-        unsigned long pclkd1 = 0;
-        unsigned long apll;
-        unsigned long mpll;
-        unsigned long epll;
-        unsigned int ptr;
-        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
-        xtal = clk_get_rate(&clk_xtal);
-        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
-        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
-        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
-        epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
-        printk(KERN_INFO "S5P6442: PLL settings, A=%ld, M=%ld, E=%ld",
-                        apll, mpll, epll);
-        clk_fout_apll.rate = apll;
-        clk_fout_mpll.rate = mpll;
-        clk_fout_epll.rate = epll;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
-                s3c_set_clksrc(init_parents[ptr], true);
-        for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-                s3c_set_clksrc(&clksrcs[ptr], true);
-        arm = clk_get_rate(&clk_dout_apll);
-        hclkd0 = clk_get_rate(&clk_hclkd0);
-        hclkd1 = clk_get_rate(&clk_hclkd1);
-        pclkd0_clk = clk_get(NULL, "pclkd0");
-        BUG_ON(IS_ERR(pclkd0_clk));
-        pclkd0 = clk_get_rate(pclkd0_clk);
-        clk_put(pclkd0_clk);
-        pclkd1_clk = clk_get(NULL, "pclkd1");
-        BUG_ON(IS_ERR(pclkd1_clk));
-        pclkd1 = clk_get_rate(pclkd1_clk);
-        clk_put(pclkd1_clk);
-        printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n",
-                        hclkd0, hclkd1, pclkd0, pclkd1);
-        /* For backward compatibility */
-        clk_f.rate = arm;
-        clk_h.rate = hclkd1;
-        clk_p.rate = pclkd1;
-        clk_pclkd0.rate = pclkd0;
-        clk_pclkd1.rate = pclkd1;
-}
-static struct clk init_clocks_off[] = {
-        {
-                .name           = "pdma",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip0_ctrl,
-                .ctrlbit        = (1 << 3),
-        },
-};
-static struct clk init_clocks[] = {
-        {
-                .name           = "systimer",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<16),
-        }, {
-                .name           = "uart",
-                .id             = 0,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<17),
-        }, {
-                .name           = "uart",
-                .id             = 1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<18),
-        }, {
-                .name           = "uart",
-                .id             = 2,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<19),
-        }, {
-                .name           = "watchdog",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1 << 22),
-        }, {
-                .name           = "timers",
-                .id             = -1,
-                .parent         = &clk_pclkd1,
-                .enable         = s5p6442_clk_ip3_ctrl,
-                .ctrlbit        = (1<<23),
-        },
-};
-static struct clk *clks[] __initdata = {
-        &clk_ext,
-        &clk_epll,
-        &clk_mout_apll.clk,
-        &clk_mout_mpll.clk,
-        &clk_mout_epll.clk,
-        &clk_mout_d0.clk,
-        &clk_mout_d0sync.clk,
-        &clk_mout_d1.clk,
-        &clk_mout_d1sync.clk,
-        &clk_hclkd0,
-        &clk_pclkd0,
-        &clk_hclkd1,
-        &clk_pclkd1,
-};
-void __init s5p6442_register_clocks(void)
-{
-        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
-        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-        s3c_pwmclk_init();
-}
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
deleted file mode 100644
index 842af86bda6d..000000000000
--- a/arch/arm/mach-s5p6442/cpu.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/cpu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/proc-fns.h>
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/irq.h>
-#include <plat/regs-serial.h>
-#include <mach/regs-clock.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/s5p6442.h>
-/* Initial IO mappings */
-static struct map_desc s5p6442_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
-                .pfn            = __phys_to_pfn(S5P6442_PA_SYSTIMER),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO,
-                .pfn            = __phys_to_pfn(S5P6442_PA_GPIO),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC0,
-                .pfn            = __phys_to_pfn(S5P6442_PA_VIC0),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC1,
-                .pfn            = __phys_to_pfn(S5P6442_PA_VIC1),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC2,
-                .pfn            = __phys_to_pfn(S5P6442_PA_VIC2),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        }
-};
-static void s5p6442_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-        local_irq_enable();
-}
-/*
- * s5p6442_map_io
- *
- * register the standard cpu IO areas
- */
-void __init s5p6442_map_io(void)
-{
-        iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
-}
-void __init s5p6442_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-        s5p6442_register_clocks();
-        s5p6442_setup_clocks();
-}
-void __init s5p6442_init_irq(void)
-{
-        /* S5P6442 supports 3 VIC */
-        u32 vic[3];
-        /* VIC0, VIC1, and VIC2: some interrupt reserved */
-        vic[0] = 0x7fefffff;
-        vic[1] = 0X7f389c81;
-        vic[2] = 0X1bbbcfff;
-        s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-struct sysdev_class s5p6442_sysclass = {
-        .name   = "s5p6442-core",
-};
-static struct sys_device s5p6442_sysdev = {
-        .cls    = &s5p6442_sysclass,
-};
-static int __init s5p6442_core_init(void)
-{
-        return sysdev_class_register(&s5p6442_sysclass);
-}
-core_initcall(s5p6442_core_init);
-int __init s5p6442_init(void)
-{
-        printk(KERN_INFO "S5P6442: Initializing architecture\n");
-        /* set idle function */
-        pm_idle = s5p6442_idle;
-        return sysdev_register(&s5p6442_sysdev);
-}
diff --git a/arch/arm/mach-s5p6442/dev-audio.c b/arch/arm/mach-s5p6442/dev-audio.c
deleted file mode 100644
index 8719dc41fe32..000000000000
--- a/arch/arm/mach-s5p6442/dev-audio.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/dev-audio.c
- *
- * Copyright (c) 2010 Samsung Electronics Co. Ltd
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <plat/gpio-cfg.h>
-#include <plat/audio.h>
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/irqs.h>
-static int s5p6442_cfg_i2s(struct platform_device *pdev)
-{
-        unsigned int base;
-        /* configure GPIO for i2s port */
-        switch (pdev->id) {
-        case 1:
-                base = S5P6442_GPC1(0);
-                break;
-        case 0:
-                base = S5P6442_GPC0(0);
-                break;
-        default:
-                printk(KERN_ERR "Invalid Device %d\n", pdev->id);
-                return -EINVAL;
-        }
-        s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2));
-        return 0;
-}
-static const char *rclksrc_v35[] = {
-        [0] = "busclk",
-        [1] = "i2sclk",
-};
-static struct s3c_audio_pdata i2sv35_pdata = {
-        .cfg_gpio = s5p6442_cfg_i2s,
-        .type = {
-                .i2s = {
-                        .quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR,
-                        .src_clk = rclksrc_v35,
-                },
-        },
-};
-static struct resource s5p6442_iis0_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_I2S0,
-                .end   = S5P6442_PA_I2S0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_I2S0_TX,
-                .end   = DMACH_I2S0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_I2S0_RX,
-                .end   = DMACH_I2S0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = DMACH_I2S0S_TX,
-                .end = DMACH_I2S0S_TX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_iis0 = {
-        .name = "samsung-i2s",
-        .id = 0,
-        .num_resources    = ARRAY_SIZE(s5p6442_iis0_resource),
-        .resource         = s5p6442_iis0_resource,
-        .dev = {
-                .platform_data = &i2sv35_pdata,
-        },
-};
-static const char *rclksrc_v3[] = {
-        [0] = "iis",
-        [1] = "sclk_audio",
-};
-static struct s3c_audio_pdata i2sv3_pdata = {
-        .cfg_gpio = s5p6442_cfg_i2s,
-        .type = {
-                .i2s = {
-                        .src_clk = rclksrc_v3,
-                },
-        },
-};
-static struct resource s5p6442_iis1_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_I2S1,
-                .end   = S5P6442_PA_I2S1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_I2S1_TX,
-                .end   = DMACH_I2S1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_I2S1_RX,
-                .end   = DMACH_I2S1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_iis1 = {
-        .name             = "samsung-i2s",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s5p6442_iis1_resource),
-        .resource         = s5p6442_iis1_resource,
-        .dev = {
-                .platform_data = &i2sv3_pdata,
-        },
-};
-/* PCM Controller platform_devices */
-static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
-{
-        unsigned int base;
-        switch (pdev->id) {
-        case 0:
-                base = S5P6442_GPC0(0);
-                break;
-        case 1:
-                base = S5P6442_GPC1(0);
-                break;
-        default:
-                printk(KERN_DEBUG "Invalid PCM Controller number!");
-                return -EINVAL;
-        }
-        s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3));
-        return 0;
-}
-static struct s3c_audio_pdata s3c_pcm_pdata = {
-        .cfg_gpio = s5p6442_pcm_cfg_gpio,
-};
-static struct resource s5p6442_pcm0_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_PCM0,
-                .end   = S5P6442_PA_PCM0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM0_TX,
-                .end   = DMACH_PCM0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM0_RX,
-                .end   = DMACH_PCM0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_pcm0 = {
-        .name             = "samsung-pcm",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s5p6442_pcm0_resource),
-        .resource         = s5p6442_pcm0_resource,
-        .dev = {
-                .platform_data = &s3c_pcm_pdata,
-        },
-};
-static struct resource s5p6442_pcm1_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_PCM1,
-                .end   = S5P6442_PA_PCM1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_PCM1_TX,
-                .end   = DMACH_PCM1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_PCM1_RX,
-                .end   = DMACH_PCM1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-};
-struct platform_device s5p6442_device_pcm1 = {
-        .name             = "samsung-pcm",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s5p6442_pcm1_resource),
-        .resource         = s5p6442_pcm1_resource,
-        .dev = {
-                .platform_data = &s3c_pcm_pdata,
-        },
-};
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
deleted file mode 100644
index cce8c2470709..000000000000
--- a/arch/arm/mach-s5p6442/dev-spi.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/dev-spi.c
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/spi-clocks.h>
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-static char *spi_src_clks[] = {
-        [S5P6442_SPI_SRCCLK_PCLK] = "pclk",
-        [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
-};
-/* SPI Controller platform_devices */
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
-{
-        switch (pdev->id) {
-        case 0:
-                s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
-                s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
-                s3c_gpio_cfgall_range(S5P6442_GPB(2), 2,
-                                      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-                break;
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-        return 0;
-}
-static struct resource s5p6442_spi0_resource[] = {
-        [0] = {
-                .start = S5P6442_PA_SPI,
-                .end   = S5P6442_PA_SPI + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI0_TX,
-                .end   = DMACH_SPI0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI0_RX,
-                .end   = DMACH_SPI0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI0,
-                .end   = IRQ_SPI0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
-        .cfg_gpio = s5p6442_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x1ff,
-        .rx_lvl_offset = 15,
-};
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-struct platform_device s5p6442_device_spi = {
-        .name             = "s3c64xx-spi",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s5p6442_spi0_resource),
-        .resource         = s5p6442_spi0_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5p6442_spi0_pdata,
-        },
-};
-void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
-        struct s3c64xx_spi_info *pd;
-        /* Reject invalid configuration */
-        if (!num_cs || src_clk_nr < 0
-                        || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
-                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
-                return;
-        }
-        switch (cntrlr) {
-        case 0:
-                pd = &s5p6442_spi0_pdata;
-                break;
-        default:
-                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
-                                                        __func__, cntrlr);
-                return;
-        }
-        pd->num_cs = num_cs;
-        pd->src_clk_nr = src_clk_nr;
-        pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5p6442/dma.c b/arch/arm/mach-s5p6442/dma.c
deleted file mode 100644
index 7dfb13654f8a..000000000000
--- a/arch/arm/mach-s5p6442/dma.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <plat/devs.h>
-#include <plat/irqs.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <plat/s3c-pl330-pdata.h>
-static u64 dma_dmamask = DMA_BIT_MASK(32);
-static struct resource s5p6442_pdma_resource[] = {
-        [0] = {
-                .start  = S5P6442_PA_PDMA,
-                .end    = S5P6442_PA_PDMA + SZ_4K,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_PDMA,
-                .end    = IRQ_PDMA,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct s3c_pl330_platdata s5p6442_pdma_pdata = {
-        .peri = {
-                [0] = DMACH_UART0_RX,
-                [1] = DMACH_UART0_TX,
-                [2] = DMACH_UART1_RX,
-                [3] = DMACH_UART1_TX,
-                [4] = DMACH_UART2_RX,
-                [5] = DMACH_UART2_TX,
-                [6] = DMACH_MAX,
-                [7] = DMACH_MAX,
-                [8] = DMACH_MAX,
-                [9] = DMACH_I2S0_RX,
-                [10] = DMACH_I2S0_TX,
-                [11] = DMACH_I2S0S_TX,
-                [12] = DMACH_I2S1_RX,
-                [13] = DMACH_I2S1_TX,
-                [14] = DMACH_MAX,
-                [15] = DMACH_MAX,
-                [16] = DMACH_SPI0_RX,
-                [17] = DMACH_SPI0_TX,
-                [18] = DMACH_MAX,
-                [19] = DMACH_MAX,
-                [20] = DMACH_PCM0_RX,
-                [21] = DMACH_PCM0_TX,
-                [22] = DMACH_PCM1_RX,
-                [23] = DMACH_PCM1_TX,
-                [24] = DMACH_MAX,
-                [25] = DMACH_MAX,
-                [26] = DMACH_MAX,
-                [27] = DMACH_MSM_REQ0,
-                [28] = DMACH_MSM_REQ1,
-                [29] = DMACH_MSM_REQ2,
-                [30] = DMACH_MSM_REQ3,
-                [31] = DMACH_MAX,
-        },
-};
-static struct platform_device s5p6442_device_pdma = {
-        .name           = "s3c-pl330",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(s5p6442_pdma_resource),
-        .resource       = s5p6442_pdma_resource,
-        .dev            = {
-                .dma_mask = &dma_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &s5p6442_pdma_pdata,
-        },
-};
-static struct platform_device *s5p6442_dmacs[] __initdata = {
-        &s5p6442_device_pdma,
-};
-static int __init s5p6442_dma_init(void)
-{
-        platform_add_devices(s5p6442_dmacs, ARRAY_SIZE(s5p6442_dmacs));
-        return 0;
-}
-arch_initcall(s5p6442_dma_init);
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
deleted file mode 100644
index e2213205d780..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/debug-macro.S
+++ /dev/null
@@ -1,35 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* pull in the relevant register and map files. */
-#include <mach/map.h>
-#include <plat/regs-serial.h>
-        .macro addruart, rp, rv
-                ldr     \rp, = S3C_PA_UART
-                ldr     \rv, = S3C_VA_UART
-#if CONFIG_DEBUG_S3C_UART != 0
-                add     \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
-                add     \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
-#endif
-        .endm
-#define fifo_full fifo_full_s5pv210
-#define fifo_level fifo_level_s5pv210
-/* include the reset of the code which will do the work, we're only
- * compiling for a single cpu processor type so the default of s3c2440
- * will be fine with us.
- */
-#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/dma.h b/arch/arm/mach-s5p6442/include/mach/dma.h
deleted file mode 100644
index 81209eb1409b..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/dma.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __MACH_DMA_H
-#define __MACH_DMA_H
-/* This platform uses the common S3C DMA API driver for PL330 */
-#include <plat/s3c-dma-pl330.h>
-#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
deleted file mode 100644
index 6d574edbf1ae..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/entry-macro.S
+++ /dev/null
@@ -1,48 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Low-level IRQ helper macros for the Samsung S5P6442
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-        .macro  disable_fiq
-        .endm
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
-        .endm
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ check the vic0
-        mov     \irqnr, # S5P_IRQ_OFFSET + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        @ otherwise try vic2
-        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
-        .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
deleted file mode 100644
index b8715df2fdab..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/gpio.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-#define gpio_get_value  __gpio_get_value
-#define gpio_set_value  __gpio_set_value
-#define gpio_cansleep   __gpio_cansleep
-#define gpio_to_irq     __gpio_to_irq
-/* GPIO bank sizes */
-#define S5P6442_GPIO_A0_NR      (8)
-#define S5P6442_GPIO_A1_NR      (2)
-#define S5P6442_GPIO_B_NR       (4)
-#define S5P6442_GPIO_C0_NR      (5)
-#define S5P6442_GPIO_C1_NR      (5)
-#define S5P6442_GPIO_D0_NR      (2)
-#define S5P6442_GPIO_D1_NR      (6)
-#define S5P6442_GPIO_E0_NR      (8)
-#define S5P6442_GPIO_E1_NR      (5)
-#define S5P6442_GPIO_F0_NR      (8)
-#define S5P6442_GPIO_F1_NR      (8)
-#define S5P6442_GPIO_F2_NR      (8)
-#define S5P6442_GPIO_F3_NR      (6)
-#define S5P6442_GPIO_G0_NR      (7)
-#define S5P6442_GPIO_G1_NR      (7)
-#define S5P6442_GPIO_G2_NR      (7)
-#define S5P6442_GPIO_H0_NR      (8)
-#define S5P6442_GPIO_H1_NR      (8)
-#define S5P6442_GPIO_H2_NR      (8)
-#define S5P6442_GPIO_H3_NR      (8)
-#define S5P6442_GPIO_J0_NR      (8)
-#define S5P6442_GPIO_J1_NR      (6)
-#define S5P6442_GPIO_J2_NR      (8)
-#define S5P6442_GPIO_J3_NR      (8)
-#define S5P6442_GPIO_J4_NR      (5)
-/* GPIO bank numbers */
-/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
- * space for debugging purposes so that any accidental
- * change from one gpio bank to another can be caught.
-*/
-#define S5P6442_GPIO_NEXT(__gpio) \
-        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-enum s5p_gpio_number {
-        S5P6442_GPIO_A0_START   = 0,
-        S5P6442_GPIO_A1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
-        S5P6442_GPIO_B_START    = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
-        S5P6442_GPIO_C0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
-        S5P6442_GPIO_C1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
-        S5P6442_GPIO_D0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
-        S5P6442_GPIO_D1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
-        S5P6442_GPIO_E0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
-        S5P6442_GPIO_E1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
-        S5P6442_GPIO_F0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
-        S5P6442_GPIO_F1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
-        S5P6442_GPIO_F2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
-        S5P6442_GPIO_F3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
-        S5P6442_GPIO_G0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
-        S5P6442_GPIO_G1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
-        S5P6442_GPIO_G2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
-        S5P6442_GPIO_H0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
-        S5P6442_GPIO_H1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
-        S5P6442_GPIO_H2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
-        S5P6442_GPIO_H3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
-        S5P6442_GPIO_J0_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
-        S5P6442_GPIO_J1_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
-        S5P6442_GPIO_J2_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
-        S5P6442_GPIO_J3_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
-        S5P6442_GPIO_J4_START   = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
-};
-/* S5P6442 GPIO number definitions. */
-#define S5P6442_GPA0(_nr)       (S5P6442_GPIO_A0_START + (_nr))
-#define S5P6442_GPA1(_nr)       (S5P6442_GPIO_A1_START + (_nr))
-#define S5P6442_GPB(_nr)        (S5P6442_GPIO_B_START + (_nr))
-#define S5P6442_GPC0(_nr)       (S5P6442_GPIO_C0_START + (_nr))
-#define S5P6442_GPC1(_nr)       (S5P6442_GPIO_C1_START + (_nr))
-#define S5P6442_GPD0(_nr)       (S5P6442_GPIO_D0_START + (_nr))
-#define S5P6442_GPD1(_nr)       (S5P6442_GPIO_D1_START + (_nr))
-#define S5P6442_GPE0(_nr)       (S5P6442_GPIO_E0_START + (_nr))
-#define S5P6442_GPE1(_nr)       (S5P6442_GPIO_E1_START + (_nr))
-#define S5P6442_GPF0(_nr)       (S5P6442_GPIO_F0_START + (_nr))
-#define S5P6442_GPF1(_nr)       (S5P6442_GPIO_F1_START + (_nr))
-#define S5P6442_GPF2(_nr)       (S5P6442_GPIO_F2_START + (_nr))
-#define S5P6442_GPF3(_nr)       (S5P6442_GPIO_F3_START + (_nr))
-#define S5P6442_GPG0(_nr)       (S5P6442_GPIO_G0_START + (_nr))
-#define S5P6442_GPG1(_nr)       (S5P6442_GPIO_G1_START + (_nr))
-#define S5P6442_GPG2(_nr)       (S5P6442_GPIO_G2_START + (_nr))
-#define S5P6442_GPH0(_nr)       (S5P6442_GPIO_H0_START + (_nr))
-#define S5P6442_GPH1(_nr)       (S5P6442_GPIO_H1_START + (_nr))
-#define S5P6442_GPH2(_nr)       (S5P6442_GPIO_H2_START + (_nr))
-#define S5P6442_GPH3(_nr)       (S5P6442_GPIO_H3_START + (_nr))
-#define S5P6442_GPJ0(_nr)       (S5P6442_GPIO_J0_START + (_nr))
-#define S5P6442_GPJ1(_nr)       (S5P6442_GPIO_J1_START + (_nr))
-#define S5P6442_GPJ2(_nr)       (S5P6442_GPIO_J2_START + (_nr))
-#define S5P6442_GPJ3(_nr)       (S5P6442_GPIO_J3_START + (_nr))
-#define S5P6442_GPJ4(_nr)       (S5P6442_GPIO_J4_START + (_nr))
-/* the end of the S5P6442 specific gpios */
-#define S5P6442_GPIO_END        (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
-#define S3C_GPIO_END            S5P6442_GPIO_END
-/* define the number of gpios we need to the one after the GPJ4() range */
-#define ARCH_NR_GPIOS           (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) +     \
-                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-#include <asm-generic/gpio.h>
-#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
deleted file mode 100644
index 8cd7b67b49d4..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/hardware.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Hardware support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H __FILE__
-/* currently nothing here, placeholder */
-#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
deleted file mode 100644
index 5d2195ad0b67..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/io.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* arch/arm/mach-s5p6442/include/mach/io.h
- *
- * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S5P6442
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
deleted file mode 100644
index 3fbc6c3ad2da..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - IRQ definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H __FILE__
-#include <plat/irqs.h>
-/* VIC0 */
-#define IRQ_EINT16_31           S5P_IRQ_VIC0(16)
-#define IRQ_BATF                S5P_IRQ_VIC0(17)
-#define IRQ_MDMA                S5P_IRQ_VIC0(18)
-#define IRQ_PDMA                S5P_IRQ_VIC0(19)
-#define IRQ_TIMER0_VIC          S5P_IRQ_VIC0(21)
-#define IRQ_TIMER1_VIC          S5P_IRQ_VIC0(22)
-#define IRQ_TIMER2_VIC          S5P_IRQ_VIC0(23)
-#define IRQ_TIMER3_VIC          S5P_IRQ_VIC0(24)
-#define IRQ_TIMER4_VIC          S5P_IRQ_VIC0(25)
-#define IRQ_SYSTIMER            S5P_IRQ_VIC0(26)
-#define IRQ_WDT                 S5P_IRQ_VIC0(27)
-#define IRQ_RTC_ALARM           S5P_IRQ_VIC0(28)
-#define IRQ_RTC_TIC             S5P_IRQ_VIC0(29)
-#define IRQ_GPIOINT             S5P_IRQ_VIC0(30)
-/* VIC1 */
-#define IRQ_PMU                 S5P_IRQ_VIC1(0)
-#define IRQ_ONENAND             S5P_IRQ_VIC1(7)
-#define IRQ_UART0               S5P_IRQ_VIC1(10)
-#define IRQ_UART1               S5P_IRQ_VIC1(11)
-#define IRQ_UART2               S5P_IRQ_VIC1(12)
-#define IRQ_SPI0                S5P_IRQ_VIC1(15)
-#define IRQ_IIC                 S5P_IRQ_VIC1(19)
-#define IRQ_IIC1                S5P_IRQ_VIC1(20)
-#define IRQ_IIC2                S5P_IRQ_VIC1(21)
-#define IRQ_OTG                 S5P_IRQ_VIC1(24)
-#define IRQ_MSM                 S5P_IRQ_VIC1(25)
-#define IRQ_HSMMC0              S5P_IRQ_VIC1(26)
-#define IRQ_HSMMC1              S5P_IRQ_VIC1(27)
-#define IRQ_HSMMC2              S5P_IRQ_VIC1(28)
-#define IRQ_COMMRX              S5P_IRQ_VIC1(29)
-#define IRQ_COMMTX              S5P_IRQ_VIC1(30)
-/* VIC2 */
-#define IRQ_LCD0                S5P_IRQ_VIC2(0)
-#define IRQ_LCD1                S5P_IRQ_VIC2(1)
-#define IRQ_LCD2                S5P_IRQ_VIC2(2)
-#define IRQ_LCD3                S5P_IRQ_VIC2(3)
-#define IRQ_ROTATOR             S5P_IRQ_VIC2(4)
-#define IRQ_FIMC0               S5P_IRQ_VIC2(5)
-#define IRQ_FIMC1               S5P_IRQ_VIC2(6)
-#define IRQ_FIMC2               S5P_IRQ_VIC2(7)
-#define IRQ_JPEG                S5P_IRQ_VIC2(8)
-#define IRQ_3D                  S5P_IRQ_VIC2(10)
-#define IRQ_Mixer               S5P_IRQ_VIC2(11)
-#define IRQ_MFC                 S5P_IRQ_VIC2(14)
-#define IRQ_TVENC               S5P_IRQ_VIC2(15)
-#define IRQ_I2S0                S5P_IRQ_VIC2(16)
-#define IRQ_I2S1                S5P_IRQ_VIC2(17)
-#define IRQ_RP                  S5P_IRQ_VIC2(19)
-#define IRQ_PCM0                S5P_IRQ_VIC2(20)
-#define IRQ_PCM1                S5P_IRQ_VIC2(21)
-#define IRQ_ADC                 S5P_IRQ_VIC2(23)
-#define IRQ_PENDN               S5P_IRQ_VIC2(24)
-#define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
-#define IRQ_SSS_INT             S5P_IRQ_VIC2(27)
-#define IRQ_SSS_HASH            S5P_IRQ_VIC2(28)
-#define IRQ_VIC_END             S5P_IRQ_VIC2(31)
-#define S5P_IRQ_EINT_BASE       (IRQ_VIC_END + 1)
-#define S5P_EINT_BASE1          (S5P_IRQ_VIC0(0))
-#define S5P_EINT_BASE2          (S5P_IRQ_EINT_BASE)
-/* Set the default NR_IRQS */
-#define NR_IRQS                 (IRQ_EINT(31) + 1)
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
deleted file mode 100644
index 058dab4482a1..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/map.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MAP_H
-#define __ASM_ARCH_MAP_H __FILE__
-#include <plat/map-base.h>
-#include <plat/map-s5p.h>
-#define S5P6442_PA_SDRAM        0x20000000
-#define S5P6442_PA_I2S0         0xC0B00000
-#define S5P6442_PA_I2S1         0xF2200000
-#define S5P6442_PA_CHIPID       0xE0000000
-#define S5P6442_PA_SYSCON       0xE0100000
-#define S5P6442_PA_GPIO         0xE0200000
-#define S5P6442_PA_VIC0         0xE4000000
-#define S5P6442_PA_VIC1         0xE4100000
-#define S5P6442_PA_VIC2         0xE4200000
-#define S5P6442_PA_SROMC        0xE7000000
-#define S5P6442_PA_MDMA         0xE8000000
-#define S5P6442_PA_PDMA         0xE9000000
-#define S5P6442_PA_TIMER        0xEA000000
-#define S5P6442_PA_SYSTIMER     0xEA100000
-#define S5P6442_PA_WATCHDOG     0xEA200000
-#define S5P6442_PA_UART         0xEC000000
-#define S5P6442_PA_IIC0         0xEC100000
-#define S5P6442_PA_SPI          0xEC300000
-#define S5P6442_PA_PCM0         0xF2400000
-#define S5P6442_PA_PCM1         0xF2500000
-/* Compatibiltiy Defines */
-#define S3C_PA_IIC              S5P6442_PA_IIC0
-#define S3C_PA_WDT              S5P6442_PA_WATCHDOG
-#define S5P_PA_CHIPID           S5P6442_PA_CHIPID
-#define S5P_PA_SDRAM            S5P6442_PA_SDRAM
-#define S5P_PA_SROMC            S5P6442_PA_SROMC
-#define S5P_PA_SYSCON           S5P6442_PA_SYSCON
-#define S5P_PA_TIMER            S5P6442_PA_TIMER
-/* UART */
-#define S3C_PA_UART             S5P6442_PA_UART
-#define S5P_PA_UART(x)          (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S5P_PA_UART0            S5P_PA_UART(0)
-#define S5P_PA_UART1            S5P_PA_UART(1)
-#define S5P_PA_UART2            S5P_PA_UART(2)
-#define S5P_SZ_UART             SZ_256
-#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
deleted file mode 100644
index cfe259dded33..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Memory definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-#define PLAT_PHYS_OFFSET                UL(0x20000000)
-#define CONSISTENT_DMA_SIZE     SZ_8M
-#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
deleted file mode 100644
index 2724b37def31..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
- *
- * S5P6442 - pwm clock and timer support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_PWMCLK_H
-#define __ASM_ARCH_PWMCLK_H __FILE__
-/**
- * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
- * @tcfg: The timer TCFG1 register bits shifted down to 0.
- *
- * Return true if the given configuration from TCFG1 is a TCLK instead
- * any of the TDIV clocks.
- */
-static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
-{
-        return tcfg == S3C64XX_TCFG1_MUX_TCLK;
-}
-/**
- * tcfg_to_divisor() - convert tcfg1 setting to a divisor
- * @tcfg1: The tcfg1 setting, shifted down.
- *
- * Get the divisor value for the given tcfg1 setting. We assume the
- * caller has already checked to see if this is not a TCLK source.
- */
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
-        return 1 << tcfg1;
-}
-/**
- * pwm_tdiv_has_div1() - does the tdiv setting have a /1
- *
- * Return true if we have a /1 in the tdiv setting.
- */
-static inline unsigned int pwm_tdiv_has_div1(void)
-{
-        return 1;
-}
-/**
- * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
- * @div: The divisor to calculate the bit information for.
- *
- * Turn a divisor into the necessary bit field for TCFG1.
- */
-static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
-{
-        return ilog2(div);
-}
-#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
-#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
deleted file mode 100644
index 00828a336991..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/regs-clock.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - Clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_REGS_CLOCK_H
-#define __ASM_ARCH_REGS_CLOCK_H __FILE__
-#include <mach/map.h>
-#define S5P_CLKREG(x)           (S3C_VA_SYS + (x))
-#define S5P_APLL_LOCK           S5P_CLKREG(0x00)
-#define S5P_MPLL_LOCK           S5P_CLKREG(0x08)
-#define S5P_EPLL_LOCK           S5P_CLKREG(0x10)
-#define S5P_VPLL_LOCK           S5P_CLKREG(0x20)
-#define S5P_APLL_CON            S5P_CLKREG(0x100)
-#define S5P_MPLL_CON            S5P_CLKREG(0x108)
-#define S5P_EPLL_CON            S5P_CLKREG(0x110)
-#define S5P_VPLL_CON            S5P_CLKREG(0x120)
-#define S5P_CLK_SRC0            S5P_CLKREG(0x200)
-#define S5P_CLK_SRC1            S5P_CLKREG(0x204)
-#define S5P_CLK_SRC2            S5P_CLKREG(0x208)
-#define S5P_CLK_SRC3            S5P_CLKREG(0x20C)
-#define S5P_CLK_SRC4            S5P_CLKREG(0x210)
-#define S5P_CLK_SRC5            S5P_CLKREG(0x214)
-#define S5P_CLK_SRC6            S5P_CLKREG(0x218)
-#define S5P_CLK_SRC_MASK0       S5P_CLKREG(0x280)
-#define S5P_CLK_SRC_MASK1       S5P_CLKREG(0x284)
-#define S5P_CLK_DIV0            S5P_CLKREG(0x300)
-#define S5P_CLK_DIV1            S5P_CLKREG(0x304)
-#define S5P_CLK_DIV2            S5P_CLKREG(0x308)
-#define S5P_CLK_DIV3            S5P_CLKREG(0x30C)
-#define S5P_CLK_DIV4            S5P_CLKREG(0x310)
-#define S5P_CLK_DIV5            S5P_CLKREG(0x314)
-#define S5P_CLK_DIV6            S5P_CLKREG(0x318)
-#define S5P_CLKGATE_IP0         S5P_CLKREG(0x460)
-#define S5P_CLKGATE_IP3         S5P_CLKREG(0x46C)
-/* CLK_OUT */
-#define S5P_CLK_OUT_SHIFT       (12)
-#define S5P_CLK_OUT_MASK        (0x1F << S5P_CLK_OUT_SHIFT)
-#define S5P_CLK_OUT             S5P_CLKREG(0x500)
-#define S5P_CLK_DIV_STAT0       S5P_CLKREG(0x1000)
-#define S5P_CLK_DIV_STAT1       S5P_CLKREG(0x1004)
-#define S5P_CLK_MUX_STAT0       S5P_CLKREG(0x1100)
-#define S5P_CLK_MUX_STAT1       S5P_CLKREG(0x1104)
-#define S5P_MDNIE_SEL           S5P_CLKREG(0x7008)
-/* Register Bit definition */
-#define S5P_EPLL_EN                     (1<<31)
-#define S5P_EPLL_MASK                   0xffffffff
-#define S5P_EPLLVAL(_m, _p, _s)         ((_m) << 16 | ((_p) << 8) | ((_s)))
-/* CLKDIV0 */
-#define S5P_CLKDIV0_APLL_SHIFT          (0)
-#define S5P_CLKDIV0_APLL_MASK           (0x7 << S5P_CLKDIV0_APLL_SHIFT)
-#define S5P_CLKDIV0_A2M_SHIFT           (4)
-#define S5P_CLKDIV0_A2M_MASK            (0x7 << S5P_CLKDIV0_A2M_SHIFT)
-#define S5P_CLKDIV0_D0CLK_SHIFT         (16)
-#define S5P_CLKDIV0_D0CLK_MASK          (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
-#define S5P_CLKDIV0_P0CLK_SHIFT         (20)
-#define S5P_CLKDIV0_P0CLK_MASK          (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
-#define S5P_CLKDIV0_D1CLK_SHIFT         (24)
-#define S5P_CLKDIV0_D1CLK_MASK          (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
-#define S5P_CLKDIV0_P1CLK_SHIFT         (28)
-#define S5P_CLKDIV0_P1CLK_MASK          (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
-/* Clock MUX status Registers */
-#define S5P_CLK_MUX_STAT0_APLL_SHIFT    (0)
-#define S5P_CLK_MUX_STAT0_APLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_MPLL_SHIFT    (4)
-#define S5P_CLK_MUX_STAT0_MPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_EPLL_SHIFT    (8)
-#define S5P_CLK_MUX_STAT0_EPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_VPLL_SHIFT    (12)
-#define S5P_CLK_MUX_STAT0_VPLL_MASK     (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
-#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT  (16)
-#define S5P_CLK_MUX_STAT0_MUXARM_MASK   (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
-#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT   (20)
-#define S5P_CLK_MUX_STAT0_MUXD0_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
-#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT   (24)
-#define S5P_CLK_MUX_STAT0_MUXD1_MASK    (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
-#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT  (24)
-#define S5P_CLK_MUX_STAT1_D1SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
-#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT  (28)
-#define S5P_CLK_MUX_STAT1_D0SYNC_MASK   (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
-#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
deleted file mode 100644
index 73782b52a83b..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/regs-irq.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - IRQ register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_REGS_IRQ_H
-#define __ASM_ARCH_REGS_IRQ_H __FILE__
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
deleted file mode 100644
index 7fd88205a97c..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __S5P6442_PLAT_SPI_CLKS_H
-#define __S5P6442_PLAT_SPI_CLKS_H __FILE__
-#define S5P6442_SPI_SRCCLK_PCLK         0
-#define S5P6442_SPI_SRCCLK_SCLK         1
-#endif /* __S5P6442_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
deleted file mode 100644
index c30c1cc1b97e..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/system.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-#include <plat/system-reset.h>
-static void arch_idle(void)
-{
-        /* nothing here yet */
-}
-#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
deleted file mode 100644
index e1d4cabf8297..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/tick.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s3c6400/include/mach/tick.h
- *
- * S5P6442 - Timer tick support definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_TICK_H
-#define __ASM_ARCH_TICK_H __FILE__
-static inline u32 s3c24xx_ostimer_pending(void)
-{
-        u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
-        return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
-}
-#define TICK_MAX        (0xffffffff)
-#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
deleted file mode 100644
index ff8f2fcadeb7..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/timex.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* arch/arm/mach-s5p6442/include/mach/timex.h
- *
- * Copyright (c) 2003-2010 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S5P6442 - time parameters
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_TIMEX_H
-#define __ASM_ARCH_TIMEX_H
-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
- * a variable is useless. It seems as long as we make our timers an
- * exact multiple of HZ, any value that makes a 1->1 correspondence
- * for the time conversion functions to/from jiffies is acceptable.
-*/
-#define CLOCK_TICK_RATE 12000000
-#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
deleted file mode 100644
index 5ac7cbeeb987..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/uncompress.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5P6442 - uncompress code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-#include <mach/map.h>
-#include <plat/uncompress.h>
-static void arch_detect_cpu(void)
-{
-        /* we do not need to do any cpu detection here at the moment. */
-}
-#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
deleted file mode 100644
index 4aa55e55ac47..000000000000
--- a/arch/arm/mach-s5p6442/include/mach/vmalloc.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S5P6442 vmalloc definition
-*/
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-#define VMALLOC_END     0xF6000000UL
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c
deleted file mode 100644
index 1874bdb71e1d..000000000000
--- a/arch/arm/mach-s5p6442/init.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5p6442.h>
-#include <plat/regs-serial.h>
-static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
-        [0] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-/* uart registration process */
-void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->clocks = s5p6442_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
-                }
-        }
-        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
deleted file mode 100644
index eaf6b9c489ff..000000000000
--- a/arch/arm/mach-s5p6442/mach-smdk6442.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-#include <linux/i2c.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-#include <plat/regs-serial.h>
-#include <plat/s5p6442.h>
-#include <plat/devs.h>
-#include <plat/cpu.h>
-#include <plat/iic.h>
-/* Following are default values for UCON, ULCON and UFCON UART registers */
-#define SMDK6442_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
-                                 S3C2410_UCON_RXILEVEL |        \
-                                 S3C2410_UCON_TXIRQMODE |       \
-                                 S3C2410_UCON_RXIRQMODE |       \
-                                 S3C2410_UCON_RXFIFO_TOI |      \
-                                 S3C2443_UCON_RXERR_IRQEN)
-#define SMDK6442_ULCON_DEFAULT  S3C2410_LCON_CS8
-#define SMDK6442_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
-                                 S5PV210_UFCON_TXTRIG4 |        \
-                                 S5PV210_UFCON_RXTRIG4)
-static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
-        [0] = {
-                .hwport         = 0,
-                .flags          = 0,
-                .ucon           = SMDK6442_UCON_DEFAULT,
-                .ulcon          = SMDK6442_ULCON_DEFAULT,
-                .ufcon          = SMDK6442_UFCON_DEFAULT,
-        },
-        [1] = {
-                .hwport         = 1,
-                .flags          = 0,
-                .ucon           = SMDK6442_UCON_DEFAULT,
-                .ulcon          = SMDK6442_ULCON_DEFAULT,
-                .ufcon          = SMDK6442_UFCON_DEFAULT,
-        },
-        [2] = {
-                .hwport         = 2,
-                .flags          = 0,
-                .ucon           = SMDK6442_UCON_DEFAULT,
-                .ulcon          = SMDK6442_ULCON_DEFAULT,
-                .ufcon          = SMDK6442_UFCON_DEFAULT,
-        },
-};
-static struct platform_device *smdk6442_devices[] __initdata = {
-        &s3c_device_i2c0,
-        &samsung_asoc_dma,
-        &s5p6442_device_iis0,
-        &s3c_device_wdt,
-};
-static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = {
-        { I2C_BOARD_INFO("wm8580", 0x1b), },
-};
-static void __init smdk6442_map_io(void)
-{
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
-        s3c24xx_init_clocks(12000000);
-        s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
-}
-static void __init smdk6442_machine_init(void)
-{
-        s3c_i2c0_set_platdata(NULL);
-        i2c_register_board_info(0, smdk6442_i2c_devs0,
-                        ARRAY_SIZE(smdk6442_i2c_devs0));
-        platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
-}
-MACHINE_START(SMDK6442, "SMDK6442")
-        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
-        .boot_params    = S5P_PA_SDRAM + 0x100,
-        .init_irq       = s5p6442_init_irq,
-        .map_io         = smdk6442_map_io,
-        .init_machine   = smdk6442_machine_init,
-        .timer          = &s3c24xx_timer,
-MACHINE_END
diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c
deleted file mode 100644
index aad85656b0cc..000000000000
--- a/arch/arm/mach-s5p6442/setup-i2c0.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/setup-i2c0.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * I2C0 GPIO configuration.
- *
- * Based on plat-s3c64xx/setup-i2c0.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/gpio.h>
-struct platform_device; /* don't need the contents */
-#include <plat/gpio-cfg.h>
-#include <plat/iic.h>
-void s3c_i2c0_cfg_gpio(struct platform_device *dev)
-{
-        s3c_gpio_cfgall_range(S5P6442_GPD1(0), 2,
-                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-}
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 76f82ae44efb..751767279b3e 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -15,12 +15,14 @@
 #include <linux/mman.h>
 #include <linux/nodemask.h>
 #include <linux/initrd.h>
+#include <linux/of_fdt.h>
 #include <linux/highmem.h>
 #include <linux/gfp.h>
 #include <linux/memblock.h>
 #include <linux/sort.h>
 #include <asm/mach-types.h>
+#include <asm/prom.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
@@ -71,6 +73,14 @@ static int __init parse_tag_initrd2(const struct tag *tag)
 __tagtable(ATAG_INITRD2, parse_tag_initrd2);
+#ifdef CONFIG_OF_FLATTREE
+void __init early_init_dt_setup_initrd_arch(unsigned long start, unsigned long end)
+{
+        phys_initrd_start = start;
+        phys_initrd_size = end - start;
+}
+#endif /* CONFIG_OF_FLATTREE */
 /*
 * This keeps memory configuration data used by a couple memory
 * initialization functions, as well as show_mem() for the skipping
@@ -334,6 +344,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
 #endif
        arm_mm_memblock_reserve();
+        arm_dt_memblock_reserve();
        /* reserve any platform specific memblock areas */
        if (mdesc->reserve)
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 6751bcf7b888..e98f5c5c7879 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,7 +7,7 @@
 config PLAT_S5P
        bool
-        depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4)
+        depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4)
        default y
        select ARM_VIC if !ARCH_EXYNOS4
        select ARM_GIC if ARCH_EXYNOS4
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 5cf5e721e6ca..bbc2aa7449ca 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -21,7 +21,6 @@
 #include <plat/cpu.h>
 #include <plat/s5p6440.h>
-#include <plat/s5p6442.h>
 #include <plat/s5p6450.h>
 #include <plat/s5pc100.h>
 #include <plat/s5pv210.h>
@@ -30,7 +29,6 @@
 /* table of supported CPUs */
 static const char name_s5p6440[] = "S5P6440";
-static const char name_s5p6442[] = "S5P6442";
 static const char name_s5p6450[] = "S5P6450";
 static const char name_s5pc100[] = "S5PC100";
 static const char name_s5pv210[] = "S5PV210/S5PC110";
@@ -46,14 +44,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .init           = s5p64x0_init,
                .name           = name_s5p6440,
        }, {
-                .idcode         = 0x36442000,
-                .idmask         = 0xfffff000,
-                .map_io         = s5p6442_map_io,
-                .init_clocks    = s5p6442_init_clocks,
-                .init_uarts     = s5p6442_init_uarts,
-                .init           = s5p6442_init,
-                .name           = name_s5p6442,
-        }, {
                .idcode         = 0x36450000,
                .idmask         = 0xfffff000,
                .map_io         = s5p6450_map_io,
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
deleted file mode 100644
index 7b8801349c94..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5p6442.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* arch/arm/plat-s5p/include/plat/s5p6442.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5p6442 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/* Common init code for S5P6442 related SoCs */
-extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5p6442_register_clocks(void);
-extern void s5p6442_setup_clocks(void);
-#ifdef CONFIG_CPU_S5P6442
-extern  int s5p6442_init(void);
-extern void s5p6442_init_irq(void);
-extern void s5p6442_map_io(void);
-extern void s5p6442_init_clocks(int xtal);
-#define s5p6442_init_uarts s5p6442_common_init_uarts
-#else
-#define s5p6442_init_clocks NULL
-#define s5p6442_init_uarts NULL
-#define s5p6442_map_io NULL
-#define s5p6442_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 3aedac0034ba..c0a5741b23e6 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -86,7 +86,6 @@ extern struct sysdev_class s3c2443_sysclass;
 extern struct sysdev_class s3c6410_sysclass;
 extern struct sysdev_class s3c64xx_sysclass;
 extern struct sysdev_class s5p64x0_sysclass;
-extern struct sysdev_class s5p6442_sysclass;
 extern struct sysdev_class s5pv210_sysclass;
 extern struct sysdev_class exynos4_sysclass;
diff --git a/arch/arm/plat-samsung/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S
index dc6efd90e8ff..207e275362a8 100644
--- a/arch/arm/plat-samsung/include/plat/debug-macro.S
+++ b/arch/arm/plat-samsung/include/plat/debug-macro.S
@@ -11,7 +11,7 @@
 #include <plat/regs-serial.h>
-/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
+/* The S5PV210/S5PC110 implementations are as belows. */
        .macro fifo_level_s5pv210 rd, rx
                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 39818d8da420..b61b8ee7cc52 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -111,12 +111,6 @@ extern struct platform_device exynos4_device_spdif;
 extern struct platform_device exynos4_device_pd[];
 extern struct platform_device exynos4_device_ahci;
-extern struct platform_device s5p6442_device_pcm0;
-extern struct platform_device s5p6442_device_pcm1;
-extern struct platform_device s5p6442_device_iis0;
-extern struct platform_device s5p6442_device_iis1;
-extern struct platform_device s5p6442_device_spi;
 extern struct platform_device s5p6440_device_pcm;
 extern struct platform_device s5p6440_device_iis;
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 788837e99cb3..c151c5f94a87 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -194,7 +194,7 @@
 #define S3C64XX_UINTSP          0x34
 #define S3C64XX_UINTM           0x38
-/* Following are specific to S5PV210 and S5P6442 */
+/* Following are specific to S5PV210 */
 #define S5PV210_UCON_CLKMASK    (1<<10)
 #define S5PV210_UCON_PCLK       (0<<10)
 #define S5PV210_UCON_UCLK       (1<<10)
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index ff1a561b326e..0ffe34a21554 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -69,6 +69,5 @@ extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
-extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
 #endif /* __S3C64XX_PLAT_SPI_H */