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-rw-r--r--arch/arm/mach-omap2/devices.c42
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h9
3 files changed, 47 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index a2e915639b72..92009a4c6c86 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -397,7 +397,7 @@ static inline void omap_init_sha1_md5(void) { }
397 397
398/*-------------------------------------------------------------------------*/ 398/*-------------------------------------------------------------------------*/
399 399
400#ifdef CONFIG_ARCH_OMAP3 400#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
401 401
402#define MMCHS_SYSCONFIG 0x0010 402#define MMCHS_SYSCONFIG 0x0010
403#define MMCHS_SYSCONFIG_SWRESET (1 << 1) 403#define MMCHS_SYSCONFIG_SWRESET (1 << 1)
@@ -424,8 +424,8 @@ static struct platform_device dummy_pdev = {
424 **/ 424 **/
425static void __init omap_hsmmc_reset(void) 425static void __init omap_hsmmc_reset(void)
426{ 426{
427 u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC : 427 u32 i, nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
428 OMAP24XX_NR_MMC; 428 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
429 429
430 for (i = 0; i < nr_controllers; i++) { 430 for (i = 0; i < nr_controllers; i++) {
431 u32 v, base = 0; 431 u32 v, base = 0;
@@ -442,8 +442,21 @@ static void __init omap_hsmmc_reset(void)
442 case 2: 442 case 2:
443 base = OMAP3_MMC3_BASE; 443 base = OMAP3_MMC3_BASE;
444 break; 444 break;
445 case 3:
446 if (!cpu_is_omap44xx())
447 return;
448 base = OMAP4_MMC4_BASE;
449 break;
450 case 4:
451 if (!cpu_is_omap44xx())
452 return;
453 base = OMAP4_MMC5_BASE;
454 break;
445 } 455 }
446 456
457 if (cpu_is_omap44xx())
458 base += OMAP4_MMC_REG_OFFSET;
459
447 dummy_pdev.id = i; 460 dummy_pdev.id = i;
448 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); 461 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
449 iclk = clk_get(dev, "ick"); 462 iclk = clk_get(dev, "ick");
@@ -581,11 +594,23 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
581 irq = INT_24XX_MMC2_IRQ; 594 irq = INT_24XX_MMC2_IRQ;
582 break; 595 break;
583 case 2: 596 case 2:
584 if (!cpu_is_omap34xx()) 597 if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
585 return; 598 return;
586 base = OMAP3_MMC3_BASE; 599 base = OMAP3_MMC3_BASE;
587 irq = INT_34XX_MMC3_IRQ; 600 irq = INT_34XX_MMC3_IRQ;
588 break; 601 break;
602 case 3:
603 if (!cpu_is_omap44xx())
604 return;
605 base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
606 irq = INT_44XX_MMC4_IRQ;
607 break;
608 case 4:
609 if (!cpu_is_omap44xx())
610 return;
611 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
612 irq = INT_44XX_MMC5_IRQ;
613 break;
589 default: 614 default:
590 continue; 615 continue;
591 } 616 }
@@ -593,8 +618,15 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
593 if (cpu_is_omap2420()) { 618 if (cpu_is_omap2420()) {
594 size = OMAP2420_MMC_SIZE; 619 size = OMAP2420_MMC_SIZE;
595 name = "mmci-omap"; 620 name = "mmci-omap";
621 } else if (cpu_is_omap44xx()) {
622 if (i < 3) {
623 base += OMAP4_MMC_REG_OFFSET;
624 irq += IRQ_GIC_START;
625 }
626 size = OMAP4_HSMMC_SIZE;
627 name = "mmci-omap-hs";
596 } else { 628 } else {
597 size = HSMMC_SIZE; 629 size = OMAP3_HSMMC_SIZE;
598 name = "mmci-omap-hs"; 630 name = "mmci-omap-hs";
599 } 631 }
600 omap_mmc_add(name, i, base, size, irq, mmc_data[i]); 632 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index fb7cb7723990..28a165058b61 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -503,6 +503,7 @@
503#define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START) 503#define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
504#define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START) 504#define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
505#define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START) 505#define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START)
506#define INT_44XX_MMC5_IRQ (59 + IRQ_GIC_START)
506#define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START) 507#define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START)
507#define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START) 508#define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
508#define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START) 509#define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START)
@@ -511,6 +512,7 @@
511#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START) 512#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START)
512#define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START) 513#define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
513#define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START) 514#define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START)
515#define INT_44XX_MMC4_IRQ (96 + IRQ_GIC_START)
514 516
515 517
516/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and 518/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 939029742758..7229b9593301 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -25,11 +25,18 @@
25 25
26#define OMAP24XX_NR_MMC 2 26#define OMAP24XX_NR_MMC 2
27#define OMAP34XX_NR_MMC 3 27#define OMAP34XX_NR_MMC 3
28#define OMAP44XX_NR_MMC 5
28#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE 29#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
29#define HSMMC_SIZE 0x200 30#define OMAP3_HSMMC_SIZE 0x200
31#define OMAP4_HSMMC_SIZE 0x1000
30#define OMAP2_MMC1_BASE 0x4809c000 32#define OMAP2_MMC1_BASE 0x4809c000
31#define OMAP2_MMC2_BASE 0x480b4000 33#define OMAP2_MMC2_BASE 0x480b4000
32#define OMAP3_MMC3_BASE 0x480ad000 34#define OMAP3_MMC3_BASE 0x480ad000
35#define OMAP4_MMC4_BASE 0x480d1000
36#define OMAP4_MMC5_BASE 0x480d5000
37#define OMAP4_MMC_REG_OFFSET 0x100
38#define HSMMC5 (1 << 4)
39#define HSMMC4 (1 << 3)
33#define HSMMC3 (1 << 2) 40#define HSMMC3 (1 << 2)
34#define HSMMC2 (1 << 1) 41#define HSMMC2 (1 << 1)
35#define HSMMC1 (1 << 0) 42#define HSMMC1 (1 << 0)