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-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/compressed/Makefile34
-rw-r--r--arch/arm/boot/compressed/misc.c116
-rw-r--r--arch/arm/boot/compressed/piggy.gzip.S6
-rw-r--r--arch/arm/boot/compressed/piggy.lzo.S (renamed from arch/arm/boot/compressed/piggy.S)2
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c11
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c1
-rw-r--r--arch/arm/mach-davinci/cp_intc.c11
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c9
-rw-r--r--arch/arm/mach-davinci/dm365.c1
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c2
-rw-r--r--arch/arm/mach-mx2/mxt_td60.c24
-rw-r--r--arch/arm/mach-mx25/clock.c2
-rw-r--r--arch/arm/mach-mx25/devices.c19
-rw-r--r--arch/arm/mach-mx25/devices.h1
-rw-r--r--arch/arm/mach-mx25/mx25pdk.c46
-rw-r--r--arch/arm/mach-mx3/Kconfig3
-rw-r--r--arch/arm/mach-mx3/mm.c5
-rw-r--r--arch/arm/mach-mx3/mx31ads.c5
-rw-r--r--arch/arm/mach-mx3/mx31lite.c9
-rw-r--r--arch/arm/mach-mx3/mx31moboard-devboard.c2
-rw-r--r--arch/arm/mach-mx3/mx31moboard-marxbot.c2
-rw-r--r--arch/arm/mach-mx3/mx31moboard.c7
-rw-r--r--arch/arm/mach-mx3/mx31pdk.c5
-rw-r--r--arch/arm/mach-mx3/pcm037.c32
-rw-r--r--arch/arm/mach-omap1/clock_data.c10
-rw-r--r--arch/arm/mach-omap1/devices.c35
-rw-r--r--arch/arm/mach-omap1/mux.c8
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rwxr-xr-xarch/arm/mach-omap2/board-zoom-peripherals.c8
-rw-r--r--arch/arm/mach-omap2/clock2xxx.c57
-rw-r--r--arch/arm/mach-omap2/clock34xx.c1
-rw-r--r--arch/arm/mach-omap2/clock34xx_data.c6
-rw-r--r--arch/arm/mach-omap2/clockdomain.c4
-rw-r--r--arch/arm/mach-omap2/io.c19
-rw-r--r--arch/arm/mach-omap2/mux.c6
-rw-r--r--arch/arm/mach-omap2/opp2420_data.c38
-rw-r--r--arch/arm/mach-omap2/opp2430_data.c30
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
-rw-r--r--arch/arm/mach-omap2/serial.c12
-rw-r--r--arch/arm/mach-pxa/Kconfig2
-rw-r--r--arch/arm/mach-pxa/include/mach/zylonite.h7
-rw-r--r--arch/arm/mach-pxa/littleton.c6
-rw-r--r--arch/arm/mach-pxa/poodle.c2
-rw-r--r--arch/arm/mach-pxa/zeus.c36
-rw-r--r--arch/arm/mach-pxa/zylonite.c87
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c12
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa320.c4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/ts.h21
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c3
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c8
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c2
-rw-r--r--arch/arm/mach-w90x900/include/mach/system.h15
-rw-r--r--arch/arm/mach-w90x900/time.c64
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/tlb-v7.S1
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx25.h58
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h4
-rw-r--r--arch/arm/plat-omap/clock.c16
-rw-r--r--arch/arm/plat-omap/cpu-omap.c1
-rw-r--r--arch/arm/plat-omap/gpio.c63
-rw-r--r--arch/arm/plat-omap/include/plat/board.h1
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h2
-rw-r--r--arch/arm/plat-omap/include/plat/control.h2
-rw-r--r--arch/arm/plat-omap/include/plat/io.h36
-rw-r--r--arch/arm/plat-omap/include/plat/mux.h8
-rw-r--r--arch/arm/plat-omap/include/plat/omap7xx.h3
-rw-r--r--arch/arm/plat-omap/io.c12
-rw-r--r--arch/arm/plat-omap/iommu.c2
-rw-r--r--arch/arm/plat-omap/mcbsp.c20
-rw-r--r--arch/arm/plat-pxa/pwm.c8
-rw-r--r--arch/arm/plat-s3c/dev-nand.c4
-rw-r--r--arch/arm/plat-s3c/include/plat/devs.h1
-rw-r--r--arch/arm/plat-s3c24xx/devs.c18
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x.c1
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c10
77 files changed, 707 insertions, 433 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 233a222752c0..c2238cd474c7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -18,6 +18,8 @@ config ARM
18 select HAVE_KRETPROBES if (HAVE_KPROBES) 18 select HAVE_KRETPROBES if (HAVE_KPROBES)
19 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 19 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
20 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_GENERIC_DMA_COHERENT
21 select HAVE_KERNEL_GZIP
22 select HAVE_KERNEL_LZO
21 help 23 help
22 The ARM series is a line of low-power-consumption RISC chip designs 24 The ARM series is a line of low-power-consumption RISC chip designs
23 licensed by ARM Ltd and targeted at embedded applications and 25 licensed by ARM Ltd and targeted at embedded applications and
@@ -688,6 +690,7 @@ config ARCH_DAVINCI
688 select HAVE_IDE 690 select HAVE_IDE
689 select COMMON_CLKDEV 691 select COMMON_CLKDEV
690 select GENERIC_ALLOCATOR 692 select GENERIC_ALLOCATOR
693 select ARCH_HAS_HOLES_MEMORYMODEL
691 help 694 help
692 Support for TI's DaVinci platform. 695 Support for TI's DaVinci platform.
693 696
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index ce39dc540085..2d4d88ba73bf 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -63,8 +63,12 @@ endif
63 63
64SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ 64SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
65 65
66targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ 66suffix_$(CONFIG_KERNEL_GZIP) = gzip
67 head.o misc.o $(OBJS) 67suffix_$(CONFIG_KERNEL_LZO) = lzo
68
69targets := vmlinux vmlinux.lds \
70 piggy.$(suffix_y) piggy.$(suffix_y).o \
71 font.o font.c head.o misc.o $(OBJS)
68 72
69ifeq ($(CONFIG_FUNCTION_TRACER),y) 73ifeq ($(CONFIG_FUNCTION_TRACER),y)
70ORIG_CFLAGS := $(KBUILD_CFLAGS) 74ORIG_CFLAGS := $(KBUILD_CFLAGS)
@@ -87,22 +91,34 @@ endif
87ifneq ($(PARAMS_PHYS),) 91ifneq ($(PARAMS_PHYS),)
88LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS) 92LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS)
89endif 93endif
90LDFLAGS_vmlinux += -p --no-undefined -X \ 94# ?
91 $(shell $(CC) $(KBUILD_CFLAGS) --print-libgcc-file-name) -T 95LDFLAGS_vmlinux += -p
96# Report unresolved symbol references
97LDFLAGS_vmlinux += --no-undefined
98# Delete all temporary local symbols
99LDFLAGS_vmlinux += -X
100# Next argument is a linker script
101LDFLAGS_vmlinux += -T
102
103# For __aeabi_uidivmod
104lib1funcs = $(obj)/lib1funcs.o
105
106$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE
107 $(call cmd,shipped)
92 108
93# Don't allow any static data in misc.o, which 109# Don't allow any static data in misc.o, which
94# would otherwise mess up our GOT table 110# would otherwise mess up our GOT table
95CFLAGS_misc.o := -Dstatic= 111CFLAGS_misc.o := -Dstatic=
96 112
97$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.o \ 113$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
98 $(addprefix $(obj)/, $(OBJS)) FORCE 114 $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
99 $(call if_changed,ld) 115 $(call if_changed,ld)
100 @: 116 @:
101 117
102$(obj)/piggy.gz: $(obj)/../Image FORCE 118$(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE
103 $(call if_changed,gzip) 119 $(call if_changed,$(suffix_y))
104 120
105$(obj)/piggy.o: $(obj)/piggy.gz FORCE 121$(obj)/piggy.$(suffix_y).o: $(obj)/piggy.$(suffix_y) FORCE
106 122
107CFLAGS_font.o := -Dstatic= 123CFLAGS_font.o := -Dstatic=
108 124
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 17153b54613b..7e0fe4d42c7b 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -18,10 +18,15 @@
18 18
19unsigned int __machine_arch_type; 19unsigned int __machine_arch_type;
20 20
21#define _LINUX_STRING_H_
22
21#include <linux/compiler.h> /* for inline */ 23#include <linux/compiler.h> /* for inline */
22#include <linux/types.h> /* for size_t */ 24#include <linux/types.h> /* for size_t */
23#include <linux/stddef.h> /* for NULL */ 25#include <linux/stddef.h> /* for NULL */
24#include <asm/string.h> 26#include <asm/string.h>
27#include <linux/linkage.h>
28
29#include <asm/unaligned.h>
25 30
26#ifdef STANDALONE_DEBUG 31#ifdef STANDALONE_DEBUG
27#define putstr printf 32#define putstr printf
@@ -188,34 +193,8 @@ static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src,
188/* 193/*
189 * gzip delarations 194 * gzip delarations
190 */ 195 */
191#define OF(args) args
192#define STATIC static 196#define STATIC static
193 197
194typedef unsigned char uch;
195typedef unsigned short ush;
196typedef unsigned long ulg;
197
198#define WSIZE 0x8000 /* Window size must be at least 32k, */
199 /* and a power of two */
200
201static uch *inbuf; /* input buffer */
202static uch window[WSIZE]; /* Sliding window buffer */
203
204static unsigned insize; /* valid bytes in inbuf */
205static unsigned inptr; /* index of next byte to be processed in inbuf */
206static unsigned outcnt; /* bytes in output buffer */
207
208/* gzip flag byte */
209#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
210#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
211#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
212#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
213#define COMMENT 0x10 /* bit 4 set: file comment present */
214#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
215#define RESERVED 0xC0 /* bit 6,7: reserved */
216
217#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
218
219/* Diagnostic functions */ 198/* Diagnostic functions */
220#ifdef DEBUG 199#ifdef DEBUG
221# define Assert(cond,msg) {if(!(cond)) error(msg);} 200# define Assert(cond,msg) {if(!(cond)) error(msg);}
@@ -233,24 +212,20 @@ static unsigned outcnt; /* bytes in output buffer */
233# define Tracecv(c,x) 212# define Tracecv(c,x)
234#endif 213#endif
235 214
236static int fill_inbuf(void);
237static void flush_window(void);
238static void error(char *m); 215static void error(char *m);
239 216
240extern char input_data[]; 217extern char input_data[];
241extern char input_data_end[]; 218extern char input_data_end[];
242 219
243static uch *output_data; 220static unsigned char *output_data;
244static ulg output_ptr; 221static unsigned long output_ptr;
245static ulg bytes_out;
246 222
247static void error(char *m); 223static void error(char *m);
248 224
249static void putstr(const char *); 225static void putstr(const char *);
250 226
251extern int end; 227static unsigned long free_mem_ptr;
252static ulg free_mem_ptr; 228static unsigned long free_mem_end_ptr;
253static ulg free_mem_end_ptr;
254 229
255#ifdef STANDALONE_DEBUG 230#ifdef STANDALONE_DEBUG
256#define NO_INFLATE_MALLOC 231#define NO_INFLATE_MALLOC
@@ -258,46 +233,13 @@ static ulg free_mem_end_ptr;
258 233
259#define ARCH_HAS_DECOMP_WDOG 234#define ARCH_HAS_DECOMP_WDOG
260 235
261#include "../../../../lib/inflate.c" 236#ifdef CONFIG_KERNEL_GZIP
262 237#include "../../../../lib/decompress_inflate.c"
263/* =========================================================================== 238#endif
264 * Fill the input buffer. This is called only when the buffer is empty
265 * and at least one byte is really needed.
266 */
267int fill_inbuf(void)
268{
269 if (insize != 0)
270 error("ran out of input data");
271
272 inbuf = input_data;
273 insize = &input_data_end[0] - &input_data[0];
274
275 inptr = 1;
276 return inbuf[0];
277}
278 239
279/* =========================================================================== 240#ifdef CONFIG_KERNEL_LZO
280 * Write the output window window[0..outcnt-1] and update crc and bytes_out. 241#include "../../../../lib/decompress_unlzo.c"
281 * (Used for the decompressed data only.) 242#endif
282 */
283void flush_window(void)
284{
285 ulg c = crc;
286 unsigned n;
287 uch *in, *out, ch;
288
289 in = window;
290 out = &output_data[output_ptr];
291 for (n = 0; n < outcnt; n++) {
292 ch = *out++ = *in++;
293 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
294 }
295 crc = c;
296 bytes_out += (ulg)outcnt;
297 output_ptr += (ulg)outcnt;
298 outcnt = 0;
299 putstr(".");
300}
301 243
302#ifndef arch_error 244#ifndef arch_error
303#define arch_error(x) 245#define arch_error(x)
@@ -314,22 +256,33 @@ static void error(char *x)
314 while(1); /* Halt */ 256 while(1); /* Halt */
315} 257}
316 258
259asmlinkage void __div0(void)
260{
261 error("Attempting division by 0!");
262}
263
317#ifndef STANDALONE_DEBUG 264#ifndef STANDALONE_DEBUG
318 265
319ulg 266unsigned long
320decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p, 267decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
321 int arch_id) 268 unsigned long free_mem_ptr_end_p,
269 int arch_id)
322{ 270{
323 output_data = (uch *)output_start; /* Points to kernel start */ 271 unsigned char *tmp;
272
273 output_data = (unsigned char *)output_start;
324 free_mem_ptr = free_mem_ptr_p; 274 free_mem_ptr = free_mem_ptr_p;
325 free_mem_end_ptr = free_mem_ptr_end_p; 275 free_mem_end_ptr = free_mem_ptr_end_p;
326 __machine_arch_type = arch_id; 276 __machine_arch_type = arch_id;
327 277
328 arch_decomp_setup(); 278 arch_decomp_setup();
329 279
330 makecrc(); 280 tmp = (unsigned char *) (((unsigned long)input_data_end) - 4);
281 output_ptr = get_unaligned_le32(tmp);
282
331 putstr("Uncompressing Linux..."); 283 putstr("Uncompressing Linux...");
332 gunzip(); 284 decompress(input_data, input_data_end - input_data,
285 NULL, NULL, output_data, NULL, error);
333 putstr(" done, booting the kernel.\n"); 286 putstr(" done, booting the kernel.\n");
334 return output_ptr; 287 return output_ptr;
335} 288}
@@ -341,11 +294,10 @@ int main()
341{ 294{
342 output_data = output_buffer; 295 output_data = output_buffer;
343 296
344 makecrc();
345 putstr("Uncompressing Linux..."); 297 putstr("Uncompressing Linux...");
346 gunzip(); 298 decompress(input_data, input_data_end - input_data,
299 NULL, NULL, output_data, NULL, error);
347 putstr("done.\n"); 300 putstr("done.\n");
348 return 0; 301 return 0;
349} 302}
350#endif 303#endif
351
diff --git a/arch/arm/boot/compressed/piggy.gzip.S b/arch/arm/boot/compressed/piggy.gzip.S
new file mode 100644
index 000000000000..a68adf91a165
--- /dev/null
+++ b/arch/arm/boot/compressed/piggy.gzip.S
@@ -0,0 +1,6 @@
1 .section .piggydata,#alloc
2 .globl input_data
3input_data:
4 .incbin "arch/arm/boot/compressed/piggy.gzip"
5 .globl input_data_end
6input_data_end:
diff --git a/arch/arm/boot/compressed/piggy.S b/arch/arm/boot/compressed/piggy.lzo.S
index 54c951800ebd..a425ad95959a 100644
--- a/arch/arm/boot/compressed/piggy.S
+++ b/arch/arm/boot/compressed/piggy.lzo.S
@@ -1,6 +1,6 @@
1 .section .piggydata,#alloc 1 .section .piggydata,#alloc
2 .globl input_data 2 .globl input_data
3input_data: 3input_data:
4 .incbin "arch/arm/boot/compressed/piggy.gz" 4 .incbin "arch/arm/boot/compressed/piggy.lzo"
5 .globl input_data_end 5 .globl input_data_end
6input_data_end: 6input_data_end:
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index a9b650dcc172..077ecf4fecda 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -236,6 +236,7 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = {
236 236
237static struct vpfe_config vpfe_cfg = { 237static struct vpfe_config vpfe_cfg = {
238 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), 238 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
239 .i2c_adapter_id = 1,
239 .sub_devs = vpfe_sub_devs, 240 .sub_devs = vpfe_sub_devs,
240 .card_name = "DM355 EVM", 241 .card_name = "DM355 EVM",
241 .ccdc = "DM355 CCDC", 242 .ccdc = "DM355 CCDC",
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 289fe1b7d25a..b476395d2cd4 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -192,7 +192,11 @@ static struct davinci_i2c_platform_data i2c_pdata = {
192 .bus_delay = 0 /* usec */, 192 .bus_delay = 0 /* usec */,
193}; 193};
194 194
195#ifdef CONFIG_KEYBOARD_DAVINCI 195static int dm365evm_keyscan_enable(struct device *dev)
196{
197 return davinci_cfg_reg(DM365_KEYSCAN);
198}
199
196static unsigned short dm365evm_keymap[] = { 200static unsigned short dm365evm_keymap[] = {
197 KEY_KP2, 201 KEY_KP2,
198 KEY_LEFT, 202 KEY_LEFT,
@@ -214,6 +218,7 @@ static unsigned short dm365evm_keymap[] = {
214}; 218};
215 219
216static struct davinci_ks_platform_data dm365evm_ks_data = { 220static struct davinci_ks_platform_data dm365evm_ks_data = {
221 .device_enable = dm365evm_keyscan_enable,
217 .keymap = dm365evm_keymap, 222 .keymap = dm365evm_keymap,
218 .keymapsize = ARRAY_SIZE(dm365evm_keymap), 223 .keymapsize = ARRAY_SIZE(dm365evm_keymap),
219 .rep = 1, 224 .rep = 1,
@@ -222,7 +227,6 @@ static struct davinci_ks_platform_data dm365evm_ks_data = {
222 .interval = 0x2, 227 .interval = 0x2,
223 .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, 228 .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4,
224}; 229};
225#endif
226 230
227static int cpld_mmc_get_cd(int module) 231static int cpld_mmc_get_cd(int module)
228{ 232{
@@ -511,10 +515,7 @@ static __init void dm365_evm_init(void)
511 515
512 dm365_init_asp(&dm365_evm_snd_data); 516 dm365_init_asp(&dm365_evm_snd_data);
513 dm365_init_rtc(); 517 dm365_init_rtc();
514
515#ifdef CONFIG_KEYBOARD_DAVINCI
516 dm365_init_ks(&dm365evm_ks_data); 518 dm365_init_ks(&dm365evm_ks_data);
517#endif
518} 519}
519 520
520static __init void dm365_evm_irq_init(void) 521static __init void dm365_evm_irq_init(void)
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index fd0398bc6db3..e9612cf727b7 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -247,6 +247,7 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = {
247 247
248static struct vpfe_config vpfe_cfg = { 248static struct vpfe_config vpfe_cfg = {
249 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), 249 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
250 .i2c_adapter_id = 1,
250 .sub_devs = vpfe_sub_devs, 251 .sub_devs = vpfe_sub_devs,
251 .card_name = "DM6446 EVM", 252 .card_name = "DM6446 EVM",
252 .ccdc = "DM6446 CCDC", 253 .ccdc = "DM6446 CCDC",
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 52b287cf3a42..37311d1830eb 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -81,12 +81,23 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
81 return 0; 81 return 0;
82} 82}
83 83
84/*
85 * Faking this allows us to to work with suspend functions of
86 * generic drivers which call {enable|disable}_irq_wake for
87 * wake up interrupt sources (eg RTC on DA850).
88 */
89static int cp_intc_set_wake(unsigned int irq, unsigned int on)
90{
91 return 0;
92}
93
84static struct irq_chip cp_intc_irq_chip = { 94static struct irq_chip cp_intc_irq_chip = {
85 .name = "cp_intc", 95 .name = "cp_intc",
86 .ack = cp_intc_ack_irq, 96 .ack = cp_intc_ack_irq,
87 .mask = cp_intc_mask_irq, 97 .mask = cp_intc_mask_irq,
88 .unmask = cp_intc_unmask_irq, 98 .unmask = cp_intc_unmask_irq,
89 .set_type = cp_intc_set_irq_type, 99 .set_type = cp_intc_set_irq_type,
100 .set_wake = cp_intc_set_wake,
90}; 101};
91 102
92void __init cp_intc_init(void __iomem *base, unsigned short num_irq, 103void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index dd2d32c4ce86..a5105f03fd86 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -481,11 +481,18 @@ static struct platform_device da8xx_rtc_device = {
481 481
482int da8xx_register_rtc(void) 482int da8xx_register_rtc(void)
483{ 483{
484 int ret;
485
484 /* Unlock the rtc's registers */ 486 /* Unlock the rtc's registers */
485 __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); 487 __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c));
486 __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); 488 __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70));
487 489
488 return platform_device_register(&da8xx_rtc_device); 490 ret = platform_device_register(&da8xx_rtc_device);
491 if (!ret)
492 /* Atleast on DA850, RTC is a wakeup source */
493 device_init_wakeup(&da8xx_rtc_device.dev, true);
494
495 return ret;
489} 496}
490 497
491static struct resource da8xx_cpuidle_resources[] = { 498static struct resource da8xx_cpuidle_resources[] = {
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 2ec619ec1657..f53735cb922e 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -993,7 +993,6 @@ void __init dm365_init_asp(struct snd_platform_data *pdata)
993 993
994void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) 994void __init dm365_init_ks(struct davinci_ks_platform_data *pdata)
995{ 995{
996 davinci_cfg_reg(DM365_KEYSCAN);
997 dm365_ks_device.dev.platform_data = pdata; 996 dm365_ks_device.dev.platform_data = pdata;
998 platform_device_register(&dm365_ks_device); 997 platform_device_register(&dm365_ks_device);
999} 998}
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 8f49b2b12608..b22dec4abf78 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -24,8 +24,6 @@
24 24
25#include "common.h" 25#include "common.h"
26 26
27#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
28
29static unsigned long ttc_dkb_pin_config[] __initdata = { 27static unsigned long ttc_dkb_pin_config[] __initdata = {
30 /* UART2 */ 28 /* UART2 */
31 GPIO47_UART2_RXD, 29 GPIO47_UART2_RXD,
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c
index 03dbbdc98955..8bcc1a5b8829 100644
--- a/arch/arm/mach-mx2/mxt_td60.c
+++ b/arch/arm/mach-mx2/mxt_td60.c
@@ -58,21 +58,6 @@ static unsigned int mxt_td60_pins[] __initdata = {
58 PE9_PF_UART3_RXD, 58 PE9_PF_UART3_RXD,
59 PE10_PF_UART3_CTS, 59 PE10_PF_UART3_CTS,
60 PE11_PF_UART3_RTS, 60 PE11_PF_UART3_RTS,
61 /* UART3 */
62 PB26_AF_UART4_RTS,
63 PB28_AF_UART4_TXD,
64 PB29_AF_UART4_CTS,
65 PB31_AF_UART4_RXD,
66 /* UART4 */
67 PB18_AF_UART5_TXD,
68 PB19_AF_UART5_RXD,
69 PB20_AF_UART5_CTS,
70 PB21_AF_UART5_RTS,
71 /* UART5 */
72 PB10_AF_UART6_TXD,
73 PB12_AF_UART6_CTS,
74 PB11_AF_UART6_RXD,
75 PB13_AF_UART6_RTS,
76 /* FEC */ 61 /* FEC */
77 PD0_AIN_FEC_TXD0, 62 PD0_AIN_FEC_TXD0,
78 PD1_AIN_FEC_TXD1, 63 PD1_AIN_FEC_TXD1,
@@ -261,12 +246,6 @@ static struct imxuart_platform_data uart_pdata[] = {
261 .flags = IMXUART_HAVE_RTSCTS, 246 .flags = IMXUART_HAVE_RTSCTS,
262 }, { 247 }, {
263 .flags = IMXUART_HAVE_RTSCTS, 248 .flags = IMXUART_HAVE_RTSCTS,
264 }, {
265 .flags = IMXUART_HAVE_RTSCTS,
266 }, {
267 .flags = IMXUART_HAVE_RTSCTS,
268 }, {
269 .flags = IMXUART_HAVE_RTSCTS,
270 }, 249 },
271}; 250};
272 251
@@ -278,9 +257,6 @@ static void __init mxt_td60_board_init(void)
278 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); 257 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
279 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); 258 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
280 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); 259 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
281 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
282 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
283 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
284 mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); 260 mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info);
285 261
286 i2c_register_board_info(0, mxt_td60_i2c_devices, 262 i2c_register_board_info(0, mxt_td60_i2c_devices,
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index ef26951a5275..6e838b857712 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
173DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); 173DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
174DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); 174DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
175DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); 175DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
176DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
176 177
177#define _REGISTER_CLOCK(d, n, c) \ 178#define _REGISTER_CLOCK(d, n, c) \
178 { \ 179 { \
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
204 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) 205 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
205 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) 206 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
206 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) 207 _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
208 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
207}; 209};
208 210
209int __init mx25_clocks_init(unsigned long fref) 211int __init mx25_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 63511de3a559..9fdeea1c083b 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
419 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); 419 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
420} 420}
421 421
422static struct resource mx25_fec_resources[] = {
423 {
424 .start = MX25_FEC_BASE_ADDR,
425 .end = MX25_FEC_BASE_ADDR + 0xfff,
426 .flags = IORESOURCE_MEM,
427 },
428 {
429 .start = MX25_INT_FEC,
430 .end = MX25_INT_FEC,
431 .flags = IORESOURCE_IRQ,
432 },
433};
434
435struct platform_device mx25_fec_device = {
436 .name = "fec",
437 .id = 0,
438 .num_resources = ARRAY_SIZE(mx25_fec_resources),
439 .resource = mx25_fec_resources,
440};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe6bf88ad1dd..fe5420fcd11f 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
17extern struct platform_device mxc_i2c_device0; 17extern struct platform_device mxc_i2c_device0;
18extern struct platform_device mxc_i2c_device1; 18extern struct platform_device mxc_i2c_device1;
19extern struct platform_device mxc_i2c_device2; 19extern struct platform_device mxc_i2c_device2;
20extern struct platform_device mx25_fec_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index d23ae571c03f..921bc99ea231 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -18,10 +18,11 @@
18 18
19#include <linux/types.h> 19#include <linux/types.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/delay.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/irq.h> 23#include <linux/irq.h>
23#include <linux/gpio.h> 24#include <linux/gpio.h>
24#include <linux/smsc911x.h> 25#include <linux/fec.h>
25#include <linux/platform_device.h> 26#include <linux/platform_device.h>
26 27
27#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -35,16 +36,57 @@
35#include <mach/mx25.h> 36#include <mach/mx25.h>
36#include <mach/mxc_nand.h> 37#include <mach/mxc_nand.h>
37#include "devices.h" 38#include "devices.h"
38#include <mach/iomux-v3.h> 39#include <mach/iomux.h>
39 40
40static struct imxuart_platform_data uart_pdata = { 41static struct imxuart_platform_data uart_pdata = {
41 .flags = IMXUART_HAVE_RTSCTS, 42 .flags = IMXUART_HAVE_RTSCTS,
42}; 43};
43 44
45static struct pad_desc mx25pdk_pads[] = {
46 MX25_PAD_FEC_MDC__FEC_MDC,
47 MX25_PAD_FEC_MDIO__FEC_MDIO,
48 MX25_PAD_FEC_TDATA0__FEC_TDATA0,
49 MX25_PAD_FEC_TDATA1__FEC_TDATA1,
50 MX25_PAD_FEC_TX_EN__FEC_TX_EN,
51 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
52 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
53 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
54 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
55 MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
56 MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
57};
58
59static struct fec_platform_data mx25_fec_pdata = {
60 .phy = PHY_INTERFACE_MODE_RMII,
61};
62
63#define FEC_ENABLE_GPIO 35
64#define FEC_RESET_B_GPIO 104
65
66static void __init mx25pdk_fec_reset(void)
67{
68 gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
69 gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
70
71 gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */
72 gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
73 udelay(2);
74
75 /* turn on PHY power and lift reset */
76 gpio_set_value(FEC_ENABLE_GPIO, 1);
77 gpio_set_value(FEC_RESET_B_GPIO, 1);
78}
79
44static void __init mx25pdk_init(void) 80static void __init mx25pdk_init(void)
45{ 81{
82 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
83 ARRAY_SIZE(mx25pdk_pads));
84
46 mxc_register_device(&mxc_uart_device0, &uart_pdata); 85 mxc_register_device(&mxc_uart_device0, &uart_pdata);
47 mxc_register_device(&mxc_usbh2, NULL); 86 mxc_register_device(&mxc_usbh2, NULL);
87
88 mx25pdk_fec_reset();
89 mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
48} 90}
49 91
50static void __init mx25pdk_timer_init(void) 92static void __init mx25pdk_timer_init(void)
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig
index ea8ed109a7c2..28294416b0af 100644
--- a/arch/arm/mach-mx3/Kconfig
+++ b/arch/arm/mach-mx3/Kconfig
@@ -49,6 +49,7 @@ config MACH_PCM037_EET
49config MACH_MX31LITE 49config MACH_MX31LITE
50 bool "Support MX31 LITEKIT (LogicPD)" 50 bool "Support MX31 LITEKIT (LogicPD)"
51 select ARCH_MX31 51 select ARCH_MX31
52 select MXC_ULPI if USB_ULPI
52 help 53 help
53 Include support for MX31 LITEKIT platform. This includes specific 54 Include support for MX31 LITEKIT platform. This includes specific
54 configurations for the board and its peripherals. 55 configurations for the board and its peripherals.
@@ -63,7 +64,7 @@ config MACH_MX31_3DS
63config MACH_MX31MOBOARD 64config MACH_MX31MOBOARD
64 bool "Support mx31moboard platforms (EPFL Mobots group)" 65 bool "Support mx31moboard platforms (EPFL Mobots group)"
65 select ARCH_MX31 66 select ARCH_MX31
66 select MXC_ULPI 67 select MXC_ULPI if USB_ULPI
67 help 68 help
68 Include support for mx31moboard platform. This includes specific 69 Include support for mx31moboard platform. This includes specific
69 configurations for the board and its peripherals. 70 configurations for the board and its peripherals.
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index bedf5b8d976a..6858a4f9806c 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -65,6 +65,11 @@ static struct map_desc mxc_io_desc[] __initdata = {
65 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), 65 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
66 .length = AIPS2_SIZE, 66 .length = AIPS2_SIZE,
67 .type = MT_DEVICE_NONSHARED 67 .type = MT_DEVICE_NONSHARED
68 }, {
69 .virtual = SPBA0_BASE_ADDR_VIRT,
70 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
71 .length = SPBA0_SIZE,
72 .type = MT_DEVICE_NONSHARED
68 }, 73 },
69}; 74};
70 75
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 0497c152be18..3e7bafa2ddbb 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -494,11 +494,6 @@ static void mxc_init_i2c(void)
494 */ 494 */
495static struct map_desc mx31ads_io_desc[] __initdata = { 495static struct map_desc mx31ads_io_desc[] __initdata = {
496 { 496 {
497 .virtual = SPBA0_BASE_ADDR_VIRT,
498 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
499 .length = SPBA0_SIZE,
500 .type = MT_DEVICE_NONSHARED
501 }, {
502 .virtual = CS4_BASE_ADDR_VIRT, 497 .virtual = CS4_BASE_ADDR_VIRT,
503 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 498 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
504 .length = CS4_SIZE / 2, 499 .length = CS4_SIZE / 2,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index def6b6736594..789b20d1730f 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -135,6 +135,7 @@ static struct spi_board_info mc13783_spi_dev __initdata = {
135 * USB 135 * USB
136 */ 136 */
137 137
138#if defined(CONFIG_USB_ULPI)
138#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 139#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
139 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 140 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
140 141
@@ -180,6 +181,7 @@ static struct mxc_usbh_platform_data usbh2_pdata = {
180 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, 181 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
181 .flags = MXC_EHCI_POWER_PINS_ENABLED, 182 .flags = MXC_EHCI_POWER_PINS_ENABLED,
182}; 183};
184#endif
183 185
184/* 186/*
185 * NOR flash 187 * NOR flash
@@ -212,11 +214,6 @@ static struct platform_device physmap_flash_device = {
212 */ 214 */
213static struct map_desc mx31lite_io_desc[] __initdata = { 215static struct map_desc mx31lite_io_desc[] __initdata = {
214 { 216 {
215 .virtual = SPBA0_BASE_ADDR_VIRT,
216 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
217 .length = SPBA0_SIZE,
218 .type = MT_DEVICE_NONSHARED
219 }, {
220 .virtual = CS4_BASE_ADDR_VIRT, 217 .virtual = CS4_BASE_ADDR_VIRT,
221 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 218 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
222 .length = CS4_SIZE, 219 .length = CS4_SIZE,
@@ -261,11 +258,13 @@ static void __init mxc_board_init(void)
261 mxc_register_device(&mxc_spi_device1, &spi1_pdata); 258 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
262 spi_register_board_info(&mc13783_spi_dev, 1); 259 spi_register_board_info(&mc13783_spi_dev, 1);
263 260
261#if defined(CONFIG_USB_ULPI)
264 /* USB */ 262 /* USB */
265 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 263 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
266 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 264 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
267 265
268 mxc_register_device(&mxc_usbh2, &usbh2_pdata); 266 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
267#endif
269 268
270 /* SMSC9117 IRQ pin */ 269 /* SMSC9117 IRQ pin */
271 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); 270 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c
index 8fc624f141cb..438428eaf769 100644
--- a/arch/arm/mach-mx3/mx31moboard-devboard.c
+++ b/arch/arm/mach-mx3/mx31moboard-devboard.c
@@ -179,7 +179,7 @@ static int __init devboard_usbh1_init(void)
179 179
180 usbh1_pdata.otg = otg; 180 usbh1_pdata.otg = otg;
181 181
182 return mxc_register_device(&mx31_usbh1, &usbh1_pdata); 182 return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
183} 183}
184 184
185/* 185/*
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c
index 85184a35e674..1f44b9ccbb0f 100644
--- a/arch/arm/mach-mx3/mx31moboard-marxbot.c
+++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c
@@ -294,7 +294,7 @@ static int __init marxbot_usbh1_init(void)
294 294
295 usbh1_pdata.otg = otg; 295 usbh1_pdata.otg = otg;
296 296
297 return mxc_register_device(&mx31_usbh1, &usbh1_pdata); 297 return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
298} 298}
299 299
300/* 300/*
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c
index b70529145936..cfd605d078ec 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mx31moboard.c
@@ -346,6 +346,8 @@ static struct fsl_usb2_platform_data usb_pdata = {
346 .phy_mode = FSL_USB2_PHY_ULPI, 346 .phy_mode = FSL_USB2_PHY_ULPI,
347}; 347};
348 348
349#if defined(CONFIG_USB_ULPI)
350
349#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) 351#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
350 352
351static int moboard_usbh2_hw_init(struct platform_device *pdev) 353static int moboard_usbh2_hw_init(struct platform_device *pdev)
@@ -392,8 +394,11 @@ static int __init moboard_usbh2_init(void)
392 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 394 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
393 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 395 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
394 396
395 return mxc_register_device(&mx31_usbh2, &usbh2_pdata); 397 return mxc_register_device(&mxc_usbh2, &usbh2_pdata);
396} 398}
399#else
400static inline int moboard_usbh2_init(void) { return 0; }
401#endif
397 402
398 403
399static struct gpio_led mx31moboard_leds[] = { 404static struct gpio_led mx31moboard_leds[] = {
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
index 0f7a2f06bc2d..18715f1aa7eb 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -211,11 +211,6 @@ static int __init mx31pdk_init_expio(void)
211 */ 211 */
212static struct map_desc mx31pdk_io_desc[] __initdata = { 212static struct map_desc mx31pdk_io_desc[] __initdata = {
213 { 213 {
214 .virtual = SPBA0_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
216 .length = SPBA0_SIZE,
217 .type = MT_DEVICE_NONSHARED,
218 }, {
219 .virtual = CS5_BASE_ADDR_VIRT, 214 .virtual = CS5_BASE_ADDR_VIRT,
220 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 215 .pfn = __phys_to_pfn(CS5_BASE_ADDR),
221 .length = CS5_SIZE, 216 .length = CS5_SIZE,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 6cbaabedf386..5be396917c99 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -322,16 +322,25 @@ static int pcm037_camera_power(struct device *dev, int on)
322 return 0; 322 return 0;
323} 323}
324 324
325static struct i2c_board_info pcm037_i2c_2_devices[] = { 325static struct i2c_board_info pcm037_i2c_camera[] = {
326 { 326 {
327 I2C_BOARD_INFO("mt9t031", 0x5d), 327 I2C_BOARD_INFO("mt9t031", 0x5d),
328 }, {
329 I2C_BOARD_INFO("mt9v022", 0x48),
328 }, 330 },
329}; 331};
330 332
331static struct soc_camera_link iclink = { 333static struct soc_camera_link iclink_mt9v022 = {
334 .bus_id = 0, /* Must match with the camera ID */
335 .board_info = &pcm037_i2c_camera[1],
336 .i2c_adapter_id = 2,
337 .module_name = "mt9v022",
338};
339
340static struct soc_camera_link iclink_mt9t031 = {
332 .bus_id = 0, /* Must match with the camera ID */ 341 .bus_id = 0, /* Must match with the camera ID */
333 .power = pcm037_camera_power, 342 .power = pcm037_camera_power,
334 .board_info = &pcm037_i2c_2_devices[0], 343 .board_info = &pcm037_i2c_camera[0],
335 .i2c_adapter_id = 2, 344 .i2c_adapter_id = 2,
336 .module_name = "mt9t031", 345 .module_name = "mt9t031",
337}; 346};
@@ -345,11 +354,19 @@ static struct i2c_board_info pcm037_i2c_devices[] = {
345 } 354 }
346}; 355};
347 356
348static struct platform_device pcm037_camera = { 357static struct platform_device pcm037_mt9t031 = {
349 .name = "soc-camera-pdrv", 358 .name = "soc-camera-pdrv",
350 .id = 0, 359 .id = 0,
351 .dev = { 360 .dev = {
352 .platform_data = &iclink, 361 .platform_data = &iclink_mt9t031,
362 },
363};
364
365static struct platform_device pcm037_mt9v022 = {
366 .name = "soc-camera-pdrv",
367 .id = 1,
368 .dev = {
369 .platform_data = &iclink_mt9v022,
353 }, 370 },
354}; 371};
355 372
@@ -449,7 +466,8 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size)
449static struct platform_device *devices[] __initdata = { 466static struct platform_device *devices[] __initdata = {
450 &pcm037_flash, 467 &pcm037_flash,
451 &pcm037_sram_device, 468 &pcm037_sram_device,
452 &pcm037_camera, 469 &pcm037_mt9t031,
470 &pcm037_mt9v022,
453}; 471};
454 472
455static struct ipu_platform_data mx3_ipu_data = { 473static struct ipu_platform_data mx3_ipu_data = {
@@ -599,7 +617,7 @@ static void __init mxc_board_init(void)
599 if (!ret) 617 if (!ret)
600 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); 618 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
601 else 619 else
602 iclink.power = NULL; 620 iclink_mt9t031.power = NULL;
603 621
604 if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) 622 if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
605 mxc_register_device(&mx3_camera, &camera_pdata); 623 mxc_register_device(&mx3_camera, &camera_pdata);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index ab995a9c606c..65e7b5b85d83 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -599,7 +599,7 @@ static struct clk i2c_ick = {
599static struct omap_clk omap_clks[] = { 599static struct omap_clk omap_clks[] = {
600 /* non-ULPD clocks */ 600 /* non-ULPD clocks */
601 CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), 601 CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX),
602 CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), 602 CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX),
603 /* CK_GEN1 clocks */ 603 /* CK_GEN1 clocks */
604 CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), 604 CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
605 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), 605 CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
@@ -627,7 +627,7 @@ static struct omap_clk omap_clks[] = {
627 CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), 627 CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
628 CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), 628 CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310),
629 CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), 629 CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
630 CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310), 630 CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
631 CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), 631 CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
632 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), 632 CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
633 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), 633 CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
@@ -658,6 +658,10 @@ static struct omap_clk omap_clks[] = {
658 CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), 658 CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX),
659 CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), 659 CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
660 CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), 660 CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX),
661 CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX),
662 CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX),
663 CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX),
664 CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX),
661 CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), 665 CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
662 CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), 666 CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
663 CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), 667 CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
@@ -674,7 +678,7 @@ static struct omap_clk omap_clks[] = {
674 * init 678 * init
675 */ 679 */
676 680
677static struct clk_functions omap1_clk_functions __initdata = { 681static struct clk_functions omap1_clk_functions = {
678 .clk_enable = omap1_clk_enable, 682 .clk_enable = omap1_clk_enable,
679 .clk_disable = omap1_clk_disable, 683 .clk_disable = omap1_clk_disable,
680 .clk_round_rate = omap1_clk_round_rate, 684 .clk_round_rate = omap1_clk_round_rate,
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 23ded2d49600..a2d07aa75c9e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/spi/spi.h>
17 18
18#include <mach/hardware.h> 19#include <mach/hardware.h>
19#include <asm/mach/map.h> 20#include <asm/mach/map.h>
@@ -23,6 +24,7 @@
23#include <plat/mux.h> 24#include <plat/mux.h>
24#include <mach/gpio.h> 25#include <mach/gpio.h>
25#include <plat/mmc.h> 26#include <plat/mmc.h>
27#include <plat/omap7xx.h>
26 28
27/*-------------------------------------------------------------------------*/ 29/*-------------------------------------------------------------------------*/
28 30
@@ -196,6 +198,38 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
196 198
197/*-------------------------------------------------------------------------*/ 199/*-------------------------------------------------------------------------*/
198 200
201/* OMAP7xx SPI support */
202#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)
203
204struct platform_device omap_spi1 = {
205 .name = "omap1_spi100k",
206 .id = 1,
207};
208
209struct platform_device omap_spi2 = {
210 .name = "omap1_spi100k",
211 .id = 2,
212};
213
214static void omap_init_spi100k(void)
215{
216 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
217 if (omap_spi1.dev.platform_data)
218 platform_device_register(&omap_spi1);
219
220 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
221 if (omap_spi2.dev.platform_data)
222 platform_device_register(&omap_spi2);
223}
224
225#else
226static inline void omap_init_spi100k(void)
227{
228}
229#endif
230
231/*-------------------------------------------------------------------------*/
232
199#if defined(CONFIG_OMAP_STI) 233#if defined(CONFIG_OMAP_STI)
200 234
201#define OMAP1_STI_BASE 0xfffea000 235#define OMAP1_STI_BASE 0xfffea000
@@ -263,6 +297,7 @@ static int __init omap1_init_devices(void)
263 297
264 omap_init_mbox(); 298 omap_init_mbox();
265 omap_init_rtc(); 299 omap_init_rtc();
300 omap_init_spi100k();
266 omap_init_sti(); 301 omap_init_sti();
267 302
268 return 0; 303 return 0;
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 07212cc621ae..84341377232d 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -62,6 +62,14 @@ MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0)
62/* I2C interface */ 62/* I2C interface */
63MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) 63MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0)
64MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) 64MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0)
65
66/* SPI pins */
67MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0)
68MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0)
69MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0)
70MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0)
71MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0)
72MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0)
65}; 73};
66#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) 74#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins)
67#else 75#else
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 10eafa70a909..606bf04f51b6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -80,6 +80,7 @@ config MACH_OVERO
80config MACH_OMAP3EVM 80config MACH_OMAP3EVM
81 bool "OMAP 3530 EVM board" 81 bool "OMAP 3530 EVM board"
82 depends on ARCH_OMAP3 && ARCH_OMAP34XX 82 depends on ARCH_OMAP3 && ARCH_OMAP34XX
83 select OMAP_PACKAGE_CBB
83 84
84config MACH_OMAP3517EVM 85config MACH_OMAP3517EVM
85 bool "OMAP3517/ AM3517 EVM board" 86 bool "OMAP3517/ AM3517 EVM board"
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 8dd277c36661..1e3dfb652acc 100755
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -63,21 +63,21 @@ static int board_keymap[] = {
63 KEY(5, 1, KEY_H), 63 KEY(5, 1, KEY_H),
64 KEY(5, 2, KEY_J), 64 KEY(5, 2, KEY_J),
65 KEY(5, 3, KEY_F3), 65 KEY(5, 3, KEY_F3),
66 KEY(5, 4, KEY_UNKNOWN),
66 KEY(5, 5, KEY_VOLUMEDOWN), 67 KEY(5, 5, KEY_VOLUMEDOWN),
67 KEY(5, 6, KEY_M), 68 KEY(5, 6, KEY_M),
68 KEY(5, 7, KEY_ENTER), 69 KEY(5, 7, KEY_RIGHT),
69 KEY(6, 0, KEY_Q), 70 KEY(6, 0, KEY_Q),
70 KEY(6, 1, KEY_A), 71 KEY(6, 1, KEY_A),
71 KEY(6, 2, KEY_N), 72 KEY(6, 2, KEY_N),
72 KEY(6, 3, KEY_BACKSPACE), 73 KEY(6, 3, KEY_BACKSPACE),
73 KEY(6, 6, KEY_P), 74 KEY(6, 6, KEY_P),
74 KEY(6, 7, KEY_SELECT), 75 KEY(6, 7, KEY_UP),
75 KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ 76 KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */
76 KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ 77 KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */
77 KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ 78 KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */
78 KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ 79 KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */
79 KEY(7, 5, KEY_RIGHT), 80 KEY(7, 6, KEY_SELECT),
80 KEY(7, 6, KEY_UP),
81 KEY(7, 7, KEY_DOWN) 81 KEY(7, 7, KEY_DOWN)
82}; 82};
83 83
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index d0e3fb7f9298..5420356eb407 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -449,40 +449,78 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
449#ifdef CONFIG_CPU_FREQ 449#ifdef CONFIG_CPU_FREQ
450/* 450/*
451 * Walk PRCM rate table and fillout cpufreq freq_table 451 * Walk PRCM rate table and fillout cpufreq freq_table
452 * XXX This should be replaced by an OPP layer in the near future
452 */ 453 */
453static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; 454static struct cpufreq_frequency_table *freq_table;
454 455
455void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) 456void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
456{ 457{
457 struct prcm_config *prcm; 458 const struct prcm_config *prcm;
459 long sys_ck_rate;
458 int i = 0; 460 int i = 0;
461 int tbl_sz = 0;
462
463 sys_ck_rate = clk_get_rate(sclk);
459 464
460 for (prcm = rate_table; prcm->mpu_speed; prcm++) { 465 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
461 if (!(prcm->flags & cpu_mask)) 466 if (!(prcm->flags & cpu_mask))
462 continue; 467 continue;
463 if (prcm->xtal_speed != sys_ck.rate) 468 if (prcm->xtal_speed != sys_ck_rate)
464 continue; 469 continue;
465 470
466 /* don't put bypass rates in table */ 471 /* don't put bypass rates in table */
467 if (prcm->dpll_speed == prcm->xtal_speed) 472 if (prcm->dpll_speed == prcm->xtal_speed)
468 continue; 473 continue;
469 474
470 freq_table[i].index = i; 475 tbl_sz++;
471 freq_table[i].frequency = prcm->mpu_speed / 1000;
472 i++;
473 } 476 }
474 477
475 if (i == 0) { 478 /*
476 printk(KERN_WARNING "%s: failed to initialize frequency " 479 * XXX Ensure that we're doing what CPUFreq expects for this error
477 "table\n", __func__); 480 * case and the following one
481 */
482 if (tbl_sz == 0) {
483 pr_warning("%s: no matching entries in rate_table\n",
484 __func__);
485 return;
486 }
487
488 /* Include the CPUFREQ_TABLE_END terminator entry */
489 tbl_sz++;
490
491 freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
492 GFP_ATOMIC);
493 if (!freq_table) {
494 pr_err("%s: could not kzalloc frequency table\n", __func__);
478 return; 495 return;
479 } 496 }
480 497
498 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
499 if (!(prcm->flags & cpu_mask))
500 continue;
501 if (prcm->xtal_speed != sys_ck_rate)
502 continue;
503
504 /* don't put bypass rates in table */
505 if (prcm->dpll_speed == prcm->xtal_speed)
506 continue;
507
508 freq_table[i].index = i;
509 freq_table[i].frequency = prcm->mpu_speed / 1000;
510 i++;
511 }
512
481 freq_table[i].index = i; 513 freq_table[i].index = i;
482 freq_table[i].frequency = CPUFREQ_TABLE_END; 514 freq_table[i].frequency = CPUFREQ_TABLE_END;
483 515
484 *table = &freq_table[0]; 516 *table = &freq_table[0];
485} 517}
518
519void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
520{
521 kfree(freq_table);
522}
523
486#endif 524#endif
487 525
488struct clk_functions omap2_clk_functions = { 526struct clk_functions omap2_clk_functions = {
@@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = {
494 .clk_disable_unused = omap2_clk_disable_unused, 532 .clk_disable_unused = omap2_clk_disable_unused,
495#ifdef CONFIG_CPU_FREQ 533#ifdef CONFIG_CPU_FREQ
496 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, 534 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
535 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
497#endif 536#endif
498}; 537};
499 538
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index ded32364f32b..d4217b93e10b 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -34,7 +34,6 @@
34#include <asm/div64.h> 34#include <asm/div64.h>
35#include <asm/clkdev.h> 35#include <asm/clkdev.h>
36 36
37#include <plat/sdrc.h>
38#include "clock.h" 37#include "clock.h"
39#include "clock34xx.h" 38#include "clock34xx.h"
40#include "sdrc.h" 39#include "sdrc.h"
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
index 8bdcc9cc7f9a..c6031d74d6f6 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -776,6 +776,8 @@ static struct clk dpll4_m5_ck = {
776 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, 776 .clksel_mask = OMAP3430_CLKSEL_CAM_MASK,
777 .clksel = div16_dpll4_clksel, 777 .clksel = div16_dpll4_clksel,
778 .clkdm_name = "dpll4_clkdm", 778 .clkdm_name = "dpll4_clkdm",
779 .set_rate = &omap2_clksel_set_rate,
780 .round_rate = &omap2_clksel_round_rate,
779 .recalc = &omap2_clksel_recalc, 781 .recalc = &omap2_clksel_recalc,
780}; 782};
781 783
@@ -1500,6 +1502,7 @@ static struct clk uart2_fck = {
1500 .parent = &core_48m_fck, 1502 .parent = &core_48m_fck,
1501 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1503 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1502 .enable_bit = OMAP3430_EN_UART2_SHIFT, 1504 .enable_bit = OMAP3430_EN_UART2_SHIFT,
1505 .clkdm_name = "core_l4_clkdm",
1503 .recalc = &followparent_recalc, 1506 .recalc = &followparent_recalc,
1504}; 1507};
1505 1508
@@ -1509,6 +1512,7 @@ static struct clk uart1_fck = {
1509 .parent = &core_48m_fck, 1512 .parent = &core_48m_fck,
1510 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1513 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1511 .enable_bit = OMAP3430_EN_UART1_SHIFT, 1514 .enable_bit = OMAP3430_EN_UART1_SHIFT,
1515 .clkdm_name = "core_l4_clkdm",
1512 .recalc = &followparent_recalc, 1516 .recalc = &followparent_recalc,
1513}; 1517};
1514 1518
@@ -2745,7 +2749,7 @@ static struct clk mcbsp4_ick = {
2745}; 2749};
2746 2750
2747static const struct clksel mcbsp_234_clksel[] = { 2751static const struct clksel mcbsp_234_clksel[] = {
2748 { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates }, 2752 { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates },
2749 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, 2753 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
2750 { .parent = NULL } 2754 { .parent = NULL }
2751}; 2755};
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 1a45ed1e8ba1..dd285f001467 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
559 * downstream clocks for debugging purposes? 559 * downstream clocks for debugging purposes?
560 */ 560 */
561 561
562 if (!clkdm || !clk) 562 if (!clkdm || !clk || !clkdm->clktrctrl_mask)
563 return -EINVAL; 563 return -EINVAL;
564 564
565 if (atomic_inc_return(&clkdm->usecount) > 1) 565 if (atomic_inc_return(&clkdm->usecount) > 1)
@@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
610 * downstream clocks for debugging purposes? 610 * downstream clocks for debugging purposes?
611 */ 611 */
612 612
613 if (!clkdm || !clk) 613 if (!clkdm || !clk || !clkdm->clktrctrl_mask)
614 return -EINVAL; 614 return -EINVAL;
615 615
616#ifdef DEBUG 616#ifdef DEBUG
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a8749e8017b9..5a7996402c53 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -33,7 +33,6 @@
33#include <plat/sdrc.h> 33#include <plat/sdrc.h>
34#include <plat/gpmc.h> 34#include <plat/gpmc.h>
35#include <plat/serial.h> 35#include <plat/serial.h>
36#include <plat/mux.h>
37#include <plat/vram.h> 36#include <plat/vram.h>
38 37
39#include "clock.h" 38#include "clock.h"
@@ -73,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
73#ifdef CONFIG_ARCH_OMAP2420 72#ifdef CONFIG_ARCH_OMAP2420
74static struct map_desc omap242x_io_desc[] __initdata = { 73static struct map_desc omap242x_io_desc[] __initdata = {
75 { 74 {
76 .virtual = DSP_MEM_24XX_VIRT, 75 .virtual = DSP_MEM_2420_VIRT,
77 .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), 76 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
78 .length = DSP_MEM_24XX_SIZE, 77 .length = DSP_MEM_2420_SIZE,
79 .type = MT_DEVICE 78 .type = MT_DEVICE
80 }, 79 },
81 { 80 {
82 .virtual = DSP_IPI_24XX_VIRT, 81 .virtual = DSP_IPI_2420_VIRT,
83 .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), 82 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
84 .length = DSP_IPI_24XX_SIZE, 83 .length = DSP_IPI_2420_SIZE,
85 .type = MT_DEVICE 84 .type = MT_DEVICE
86 }, 85 },
87 { 86 {
88 .virtual = DSP_MMU_24XX_VIRT, 87 .virtual = DSP_MMU_2420_VIRT,
89 .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), 88 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
90 .length = DSP_MMU_24XX_SIZE, 89 .length = DSP_MMU_2420_SIZE,
91 .type = MT_DEVICE 90 .type = MT_DEVICE
92 }, 91 },
93}; 92};
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index e071b3fd1878..459ef23ab8a8 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -994,8 +994,10 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
994 } 994 }
995 995
996#ifdef CONFIG_OMAP_MUX 996#ifdef CONFIG_OMAP_MUX
997 omap_mux_package_fixup(package_subset, superset); 997 if (package_subset)
998 omap_mux_package_init_balls(package_balls, superset); 998 omap_mux_package_fixup(package_subset, superset);
999 if (package_balls)
1000 omap_mux_package_init_balls(package_balls, superset);
999 omap_mux_set_cmdline_signals(); 1001 omap_mux_set_cmdline_signals();
1000 omap_mux_set_board_signals(board_mux); 1002 omap_mux_set_board_signals(board_mux);
1001#endif 1003#endif
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c
index 126a9396b3a8..e6dda694fd5c 100644
--- a/arch/arm/mach-omap2/opp2420_data.c
+++ b/arch/arm/mach-omap2/opp2420_data.c
@@ -9,45 +9,47 @@
9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'. 9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
10 * These configurations are characterized by voltage and speed for clocks. 10 * These configurations are characterized by voltage and speed for clocks.
11 * The device is only validated for certain combinations. One way to express 11 * The device is only validated for certain combinations. One way to express
12 * these combinations is via the 'ratio's' which the clocks operate with 12 * these combinations is via the 'ratios' which the clocks operate with
13 * respect to each other. These ratio sets are for a given voltage/DPLL 13 * respect to each other. These ratio sets are for a given voltage/DPLL
14 * setting. All configurations can be described by a DPLL setting and a ratio 14 * setting. All configurations can be described by a DPLL setting and a ratio.
15 * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
16 *
17 * 2430 differs from 2420 in that there are no more phase synchronizers used.
18 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
19 * 2430 (iva2.1, NOdsp, mdm)
20 * 15 *
21 * XXX Missing voltage data. 16 * XXX Missing voltage data.
17 * XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810)
22 * 18 *
23 * THe format described in this file is deprecated. Once a reasonable 19 * THe format described in this file is deprecated. Once a reasonable
24 * OPP API exists, the data in this file should be converted to use it. 20 * OPP API exists, the data in this file should be converted to use it.
25 * 21 *
26 * This is technically part of the OMAP2xxx clock code. 22 * This is technically part of the OMAP2xxx clock code.
23 *
24 * Considerable work is still needed to fully support dynamic frequency
25 * changes on OMAP2xxx-series chips. Readers interested in such a
26 * project are encouraged to review the Maemo Diablo RX-34 and RX-44
27 * kernel source at:
28 * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
27 */ 29 */
28 30
29#include "opp2xxx.h" 31#include "opp2xxx.h"
30#include "sdrc.h" 32#include "sdrc.h"
31#include "clock.h" 33#include "clock.h"
32 34
33/*------------------------------------------------------------------------- 35/*
34 * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. 36 * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
35 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, 37 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
36 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, 38 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
37 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM 39 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
38 * 40 *
39 * Filling in table based on H4 boards and 2430-SDPs variants available. 41 * Filling in table based on H4 boards available. There are quite a
40 * There are quite a few more rates combinations which could be defined. 42 * few more rate combinations which could be defined.
41 * 43 *
42 * When multiple values are defined the start up will try and choose the 44 * When multiple values are defined the start up will try and choose
43 * fastest one. If a 'fast' value is defined, then automatically, the /2 45 * the fastest one. If a 'fast' value is defined, then automatically,
44 * one should be included as it can be used. Generally having more that 46 * the /2 one should be included as it can be used. Generally having
45 * one fast set does not make sense, as static timings need to be changed 47 * more than one fast set does not make sense, as static timings need
46 * to change the set. The exception is the bypass setting which is 48 * to be changed to change the set. The exception is the bypass
47 * availble for low power bypass. 49 * setting which is available for low power bypass.
48 * 50 *
49 * Note: This table needs to be sorted, fastest to slowest. 51 * Note: This table needs to be sorted, fastest to slowest.
50 *-------------------------------------------------------------------------*/ 52 **/
51const struct prcm_config omap2420_rate_table[] = { 53const struct prcm_config omap2420_rate_table[] = {
52 /* PRCM I - FAST */ 54 /* PRCM I - FAST */
53 {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ 55 {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c
index edb81672c844..1b9596ae201e 100644
--- a/arch/arm/mach-omap2/opp2430_data.c
+++ b/arch/arm/mach-omap2/opp2430_data.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * opp2420_data.c - old-style "OPP" table for OMAP2420 2 * opp2430_data.c - old-style "OPP" table for OMAP2430
3 * 3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc. 4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 * Copyright (C) 2004-2009 Nokia Corporation 5 * Copyright (C) 2004-2009 Nokia Corporation
@@ -9,16 +9,16 @@
9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'. 9 * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
10 * These configurations are characterized by voltage and speed for clocks. 10 * These configurations are characterized by voltage and speed for clocks.
11 * The device is only validated for certain combinations. One way to express 11 * The device is only validated for certain combinations. One way to express
12 * these combinations is via the 'ratio's' which the clocks operate with 12 * these combinations is via the 'ratios' which the clocks operate with
13 * respect to each other. These ratio sets are for a given voltage/DPLL 13 * respect to each other. These ratio sets are for a given voltage/DPLL
14 * setting. All configurations can be described by a DPLL setting and a ratio 14 * setting. All configurations can be described by a DPLL setting and a ratio.
15 * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
16 * 15 *
17 * 2430 differs from 2420 in that there are no more phase synchronizers used. 16 * 2430 differs from 2420 in that there are no more phase synchronizers used.
18 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs 17 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
19 * 2430 (iva2.1, NOdsp, mdm) 18 * 2430 (iva2.1, NOdsp, mdm)
20 * 19 *
21 * XXX Missing voltage data. 20 * XXX Missing voltage data.
21 * XXX Missing 19.2MHz sys_clk rate sets.
22 * 22 *
23 * THe format described in this file is deprecated. Once a reasonable 23 * THe format described in this file is deprecated. Once a reasonable
24 * OPP API exists, the data in this file should be converted to use it. 24 * OPP API exists, the data in this file should be converted to use it.
@@ -30,24 +30,24 @@
30#include "sdrc.h" 30#include "sdrc.h"
31#include "clock.h" 31#include "clock.h"
32 32
33/*------------------------------------------------------------------------- 33/*
34 * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. 34 * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
35 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, 35 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
36 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, 36 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
37 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM 37 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
38 * 38 *
39 * Filling in table based on H4 boards and 2430-SDPs variants available. 39 * Filling in table based on 2430-SDPs variants available. There are
40 * There are quite a few more rates combinations which could be defined. 40 * quite a few more rate combinations which could be defined.
41 * 41 *
42 * When multiple values are defined the start up will try and choose the 42 * When multiple values are defined the start up will try and choose
43 * fastest one. If a 'fast' value is defined, then automatically, the /2 43 * the fastest one. If a 'fast' value is defined, then automatically,
44 * one should be included as it can be used. Generally having more that 44 * the /2 one should be included as it can be used. Generally having
45 * one fast set does not make sense, as static timings need to be changed 45 * more than one fast set does not make sense, as static timings need
46 * to change the set. The exception is the bypass setting which is 46 * to be changed to change the set. The exception is the bypass
47 * availble for low power bypass. 47 * setting which is available for low power bypass.
48 * 48 *
49 * Note: This table needs to be sorted, fastest to slowest. 49 * Note: This table needs to be sorted, fastest to slowest.
50 *-------------------------------------------------------------------------*/ 50 */
51const struct prcm_config omap2430_rate_table[] = { 51const struct prcm_config omap2430_rate_table[] = {
52 /* PRCM #4 - ratio2 (ES2.1) - FAST */ 52 /* PRCM #4 - ratio2 (ES2.1) - FAST */
53 {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ 53 {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 81ed252a0f8a..c6cc809afb79 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -124,8 +124,8 @@ static void omap3_core_save_context(void)
124 control_padconf_off |= START_PADCONF_SAVE; 124 control_padconf_off |= START_PADCONF_SAVE;
125 omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); 125 omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
126 /* wait for the save to complete */ 126 /* wait for the save to complete */
127 while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) 127 while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
128 & PADCONF_SAVE_DONE) 128 & PADCONF_SAVE_DONE))
129 ; 129 ;
130 /* Save the Interrupt controller context */ 130 /* Save the Interrupt controller context */
131 omap_intc_save_context(); 131 omap_intc_save_context();
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 19805a7de06c..8c964bec8159 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -125,6 +125,13 @@ static struct plat_serial8250_port serial_platform_data3[] = {
125 } 125 }
126}; 126};
127#endif 127#endif
128static inline unsigned int __serial_read_reg(struct uart_port *up,
129 int offset)
130{
131 offset <<= up->regshift;
132 return (unsigned int)__raw_readb(up->membase + offset);
133}
134
128static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, 135static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
129 int offset) 136 int offset)
130{ 137{
@@ -583,11 +590,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset)
583{ 590{
584 if (UART_RX == offset) { 591 if (UART_RX == offset) {
585 unsigned int lsr; 592 unsigned int lsr;
586 lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR); 593 lsr = __serial_read_reg(up, UART_LSR);
587 if (!(lsr & UART_LSR_DR)) 594 if (!(lsr & UART_LSR_DR))
588 return -EPERM; 595 return -EPERM;
589 } 596 }
590 return serial_read_reg(omap_uart[up->line].p, offset); 597
598 return __serial_read_reg(up, offset);
591} 599}
592 600
593void __init omap_serial_early_init(void) 601void __init omap_serial_early_init(void)
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 8a0837ea0294..dee92182749b 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -37,6 +37,8 @@ config MACH_ZYLONITE320
37config MACH_LITTLETON 37config MACH_LITTLETON
38 bool "PXA3xx Form Factor Platform (aka Littleton)" 38 bool "PXA3xx Form Factor Platform (aka Littleton)"
39 select PXA3xx 39 select PXA3xx
40 select CPU_PXA300
41 select CPU_PXA310
40 select PXA_SSP 42 select PXA_SSP
41 43
42config MACH_TAVOREVB 44config MACH_TAVOREVB
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index bf6785adccf4..9edf645368d6 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -8,13 +8,6 @@
8/* the following variables are processor specific and initialized 8/* the following variables are processor specific and initialized
9 * by the corresponding zylonite_pxa3xx_init() 9 * by the corresponding zylonite_pxa3xx_init()
10 */ 10 */
11struct platform_mmc_slot {
12 int gpio_cd;
13 int gpio_wp;
14};
15
16extern struct platform_mmc_slot zylonite_mmc_slot[];
17
18extern int gpio_eth_irq; 11extern int gpio_eth_irq;
19extern int gpio_debug_led1; 12extern int gpio_debug_led1;
20extern int gpio_debug_led2; 13extern int gpio_debug_led2;
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index f28c1715b910..fa527b258d61 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -110,6 +110,12 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
110 GPIO7_MMC1_CLK, 110 GPIO7_MMC1_CLK,
111 GPIO8_MMC1_CMD, 111 GPIO8_MMC1_CMD,
112 GPIO15_GPIO, /* card detect */ 112 GPIO15_GPIO, /* card detect */
113
114 /* UART3 */
115 GPIO107_UART3_CTS,
116 GPIO108_UART3_RTS,
117 GPIO109_UART3_TXD,
118 GPIO110_UART3_RXD,
113}; 119};
114 120
115static struct resource smc91x_resources[] = { 121static struct resource smc91x_resources[] = {
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index e5eeb3a62d01..c2b938a4d5c9 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -293,7 +293,7 @@ static struct pxamci_platform_data poodle_mci_platform_data = {
293 .init = poodle_mci_init, 293 .init = poodle_mci_init,
294 .setpower = poodle_mci_setpower, 294 .setpower = poodle_mci_setpower,
295 .exit = poodle_mci_exit, 295 .exit = poodle_mci_exit,
296 .gpio_card_detect = POODLE_IRQ_GPIO_nSD_DETECT, 296 .gpio_card_detect = POODLE_GPIO_nSD_DETECT,
297 .gpio_card_ro = POODLE_GPIO_nSD_WP, 297 .gpio_card_ro = POODLE_GPIO_nSD_WP,
298 .gpio_power = -1, 298 .gpio_power = -1,
299}; 299};
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 5b986a8bd9e6..75f2a37f945d 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -25,6 +25,7 @@
25#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/i2c/pca953x.h> 27#include <linux/i2c/pca953x.h>
28#include <linux/apm-emulation.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -626,8 +627,27 @@ static void zeus_power_off(void)
626 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); 627 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
627} 628}
628 629
629int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio, 630#ifdef CONFIG_APM_EMULATION
630 unsigned ngpio, void *context) 631static void zeus_get_power_status(struct apm_power_info *info)
632{
633 /* Power supply is always present */
634 info->ac_line_status = APM_AC_ONLINE;
635 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
636 info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT;
637}
638
639static inline void zeus_setup_apm(void)
640{
641 apm_get_power_status = zeus_get_power_status;
642}
643#else
644static inline void zeus_setup_apm(void)
645{
646}
647#endif
648
649static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
650 unsigned ngpio, void *context)
631{ 651{
632 int i; 652 int i;
633 u8 pcb_info = 0; 653 u8 pcb_info = 0;
@@ -726,9 +746,18 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
726 GPIO99_GPIO, /* CF RDY */ 746 GPIO99_GPIO, /* CF RDY */
727}; 747};
728 748
749/*
750 * DM9k MSCx settings: SRAM, 16 bits
751 * 17 cycles delay first access
752 * 5 cycles delay next access
753 * 13 cycles recovery time
754 * faster device
755 */
756#define DM9K_MSC_VALUE 0xe4c9
757
729static void __init zeus_init(void) 758static void __init zeus_init(void)
730{ 759{
731 u16 dm9000_msc = 0xe279; 760 u16 dm9000_msc = DM9K_MSC_VALUE;
732 761
733 system_rev = __raw_readw(ZEUS_CPLD_VERSION); 762 system_rev = __raw_readw(ZEUS_CPLD_VERSION);
734 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); 763 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
@@ -738,6 +767,7 @@ static void __init zeus_init(void)
738 MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; 767 MSC1 = (MSC1 & 0xffff0000) | dm9000_msc;
739 768
740 pm_power_off = zeus_power_off; 769 pm_power_off = zeus_power_off;
770 zeus_setup_apm();
741 771
742 pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config)); 772 pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
743 773
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index b66e9e2d06e7..2b4043c04d0c 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -36,9 +36,6 @@
36#include "devices.h" 36#include "devices.h"
37#include "generic.h" 37#include "generic.h"
38 38
39#define MAX_SLOTS 3
40struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS];
41
42int gpio_eth_irq; 39int gpio_eth_irq;
43int gpio_debug_led1; 40int gpio_debug_led1;
44int gpio_debug_led2; 41int gpio_debug_led2;
@@ -220,84 +217,28 @@ static inline void zylonite_init_lcd(void) {}
220#endif 217#endif
221 218
222#if defined(CONFIG_MMC) 219#if defined(CONFIG_MMC)
223static int zylonite_mci_ro(struct device *dev)
224{
225 struct platform_device *pdev = to_platform_device(dev);
226
227 return gpio_get_value(zylonite_mmc_slot[pdev->id].gpio_wp);
228}
229
230static int zylonite_mci_init(struct device *dev,
231 irq_handler_t zylonite_detect_int,
232 void *data)
233{
234 struct platform_device *pdev = to_platform_device(dev);
235 int err, cd_irq, gpio_cd, gpio_wp;
236
237 cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd);
238 gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd;
239 gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp;
240
241 /*
242 * setup GPIO for Zylonite MMC controller
243 */
244 err = gpio_request(gpio_cd, "mmc card detect");
245 if (err)
246 goto err_request_cd;
247 gpio_direction_input(gpio_cd);
248
249 err = gpio_request(gpio_wp, "mmc write protect");
250 if (err)
251 goto err_request_wp;
252 gpio_direction_input(gpio_wp);
253
254 err = request_irq(cd_irq, zylonite_detect_int,
255 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
256 "MMC card detect", data);
257 if (err) {
258 printk(KERN_ERR "%s: MMC/SD/SDIO: "
259 "can't request card detect IRQ\n", __func__);
260 goto err_request_irq;
261 }
262
263 return 0;
264
265err_request_irq:
266 gpio_free(gpio_wp);
267err_request_wp:
268 gpio_free(gpio_cd);
269err_request_cd:
270 return err;
271}
272
273static void zylonite_mci_exit(struct device *dev, void *data)
274{
275 struct platform_device *pdev = to_platform_device(dev);
276 int cd_irq, gpio_cd, gpio_wp;
277
278 cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd);
279 gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd;
280 gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp;
281
282 free_irq(cd_irq, data);
283 gpio_free(gpio_cd);
284 gpio_free(gpio_wp);
285}
286
287static struct pxamci_platform_data zylonite_mci_platform_data = { 220static struct pxamci_platform_data zylonite_mci_platform_data = {
288 .detect_delay = 20, 221 .detect_delay = 20,
289 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 222 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
290 .init = zylonite_mci_init, 223 .gpio_card_detect = EXT_GPIO(0),
291 .exit = zylonite_mci_exit, 224 .gpio_card_ro = EXT_GPIO(2),
292 .get_ro = zylonite_mci_ro,
293 .gpio_card_detect = -1,
294 .gpio_card_ro = -1,
295 .gpio_power = -1, 225 .gpio_power = -1,
296}; 226};
297 227
298static struct pxamci_platform_data zylonite_mci2_platform_data = { 228static struct pxamci_platform_data zylonite_mci2_platform_data = {
299 .detect_delay = 20, 229 .detect_delay = 20,
300 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 230 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
231 .gpio_card_detect = EXT_GPIO(1),
232 .gpio_card_ro = EXT_GPIO(3),
233 .gpio_power = -1,
234};
235
236static struct pxamci_platform_data zylonite_mci3_platform_data = {
237 .detect_delay = 20,
238 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
239 .gpio_card_detect = EXT_GPIO(30),
240 .gpio_card_ro = EXT_GPIO(31),
241 .gpio_power = -1,
301}; 242};
302 243
303static void __init zylonite_init_mmc(void) 244static void __init zylonite_init_mmc(void)
@@ -305,7 +246,7 @@ static void __init zylonite_init_mmc(void)
305 pxa_set_mci_info(&zylonite_mci_platform_data); 246 pxa_set_mci_info(&zylonite_mci_platform_data);
306 pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); 247 pxa3xx_set_mci2_info(&zylonite_mci2_platform_data);
307 if (cpu_is_pxa310()) 248 if (cpu_is_pxa310())
308 pxa3xx_set_mci3_info(&zylonite_mci_platform_data); 249 pxa3xx_set_mci3_info(&zylonite_mci3_platform_data);
309} 250}
310#else 251#else
311static inline void zylonite_init_mmc(void) {} 252static inline void zylonite_init_mmc(void) {}
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 84095440a878..3aa73b3e33f2 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -129,8 +129,8 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
129 GPIO22_I2C_SDA, 129 GPIO22_I2C_SDA,
130 130
131 /* GPIO */ 131 /* GPIO */
132 GPIO18_GPIO, /* GPIO Expander #0 INT_N */ 132 GPIO18_GPIO | MFP_PULL_HIGH, /* GPIO Expander #0 INT_N */
133 GPIO19_GPIO, /* GPIO Expander #1 INT_N */ 133 GPIO19_GPIO | MFP_PULL_HIGH, /* GPIO Expander #1 INT_N */
134}; 134};
135 135
136static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { 136static mfp_cfg_t pxa300_mfp_cfg[] __initdata = {
@@ -258,10 +258,6 @@ void __init zylonite_pxa300_init(void)
258 /* detect LCD panel */ 258 /* detect LCD panel */
259 zylonite_detect_lcd_panel(); 259 zylonite_detect_lcd_panel();
260 260
261 /* MMC card detect & write protect for controller 0 */
262 zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0);
263 zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2);
264
265 /* WM9713 IRQ */ 261 /* WM9713 IRQ */
266 wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); 262 wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26);
267 263
@@ -276,10 +272,6 @@ void __init zylonite_pxa300_init(void)
276 if (cpu_is_pxa310()) { 272 if (cpu_is_pxa310()) {
277 pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); 273 pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg));
278 gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); 274 gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102);
279
280 /* MMC card detect & write protect for controller 2 */
281 zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30);
282 zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31);
283 } 275 }
284 276
285 /* GPIOs for Debug LEDs */ 277 /* GPIOs for Debug LEDs */
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 60d08f23f5e4..9942bac4cf7d 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -209,10 +209,6 @@ void __init zylonite_pxa320_init(void)
209 gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); 209 gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2);
210 gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); 210 gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2);
211 211
212 /* MMC card detect & write protect for controller 0 */
213 zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1);
214 zylonite_mmc_slot[0].gpio_wp = mfp_to_gpio(MFP_PIN_GPIO5);
215
216 /* WM9713 IRQ */ 212 /* WM9713 IRQ */
217 wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15); 213 wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15);
218 } 214 }
diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h b/arch/arm/mach-s3c2410/include/mach/ts.h
new file mode 100644
index 000000000000..dc361700d695
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/ts.h
@@ -0,0 +1,21 @@
1/* linux/include/asm/arch-s3c2410/ts.h
2 *
3 * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
10#ifndef __ASM_ARM_TS_H
11#define __ASM_ARM_TS_H
12
13struct s3c2410_ts_mach_info {
14 int delay;
15 int presc;
16 int oversampling_shift;
17};
18
19extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *);
20
21#endif /* __ASM_ARM_TS_H */
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 4c79ac8a6c33..97162fdd0590 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -279,6 +279,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = {
279 .name = "SmartMedia", 279 .name = "SmartMedia",
280 .nr_chips = 1, 280 .nr_chips = 1,
281 .nr_map = smartmedia_map, 281 .nr_map = smartmedia_map,
282 .options = NAND_SCAN_SILENT_NODEV,
282 .nr_partitions = ARRAY_SIZE(bast_default_nand_part), 283 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
283 .partitions = bast_default_nand_part, 284 .partitions = bast_default_nand_part,
284 }, 285 },
@@ -293,6 +294,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = {
293 .name = "chip1", 294 .name = "chip1",
294 .nr_chips = 1, 295 .nr_chips = 1,
295 .nr_map = chip1_map, 296 .nr_map = chip1_map,
297 .options = NAND_SCAN_SILENT_NODEV,
296 .nr_partitions = ARRAY_SIZE(bast_default_nand_part), 298 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
297 .partitions = bast_default_nand_part, 299 .partitions = bast_default_nand_part,
298 }, 300 },
@@ -300,6 +302,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = {
300 .name = "chip2", 302 .name = "chip2",
301 .nr_chips = 1, 303 .nr_chips = 1,
302 .nr_map = chip2_map, 304 .nr_map = chip2_map,
305 .options = NAND_SCAN_SILENT_NODEV,
303 .nr_partitions = ARRAY_SIZE(bast_default_nand_part), 306 .nr_partitions = ARRAY_SIZE(bast_default_nand_part),
304 .partitions = bast_default_nand_part, 307 .partitions = bast_default_nand_part,
305 } 308 }
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 49053254c98d..1e34abe1a19e 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -46,6 +46,7 @@
46#include <mach/h1940.h> 46#include <mach/h1940.h>
47#include <mach/h1940-latch.h> 47#include <mach/h1940-latch.h>
48#include <mach/fb.h> 48#include <mach/fb.h>
49#include <mach/ts.h>
49#include <plat/udc.h> 50#include <plat/udc.h>
50#include <plat/iic.h> 51#include <plat/iic.h>
51 52
@@ -140,6 +141,11 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = {
140 .vbus_pin_inverted = 1, 141 .vbus_pin_inverted = 1,
141}; 142};
142 143
144static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = {
145 .delay = 10000,
146 .presc = 49,
147 .oversampling_shift = 2,
148};
143 149
144/** 150/**
145 * Set lcd on or off 151 * Set lcd on or off
@@ -265,6 +271,7 @@ static struct platform_device h1940_lcd_powerdev = {
265}; 271};
266 272
267static struct platform_device *h1940_devices[] __initdata = { 273static struct platform_device *h1940_devices[] __initdata = {
274 &s3c_device_ts,
268 &s3c_device_usb, 275 &s3c_device_usb,
269 &s3c_device_lcd, 276 &s3c_device_lcd,
270 &s3c_device_wdt, 277 &s3c_device_wdt,
@@ -305,6 +312,7 @@ static void __init h1940_init(void)
305 312
306 s3c24xx_fb_set_platdata(&h1940_fb_info); 313 s3c24xx_fb_set_platdata(&h1940_fb_info);
307 s3c24xx_udc_set_platdata(&h1940_udc_cfg); 314 s3c24xx_udc_set_platdata(&h1940_udc_cfg);
315 s3c24xx_ts_set_platdata(&h1940_ts_cfg);
308 s3c_i2c0_set_platdata(NULL); 316 s3c_i2c0_set_platdata(NULL);
309 317
310 s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; 318 s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg;
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 015dfb2a80da..f35371db33f5 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -208,6 +208,7 @@ static struct s3c2410_nand_set __initdata osiris_nand_sets[] = {
208 .name = "External", 208 .name = "External",
209 .nr_chips = 1, 209 .nr_chips = 1,
210 .nr_map = external_map, 210 .nr_map = external_map,
211 .options = NAND_SCAN_SILENT_NODEV,
211 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 212 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
212 .partitions = osiris_default_nand_part, 213 .partitions = osiris_default_nand_part,
213 }, 214 },
@@ -222,6 +223,7 @@ static struct s3c2410_nand_set __initdata osiris_nand_sets[] = {
222 .name = "chip1", 223 .name = "chip1",
223 .nr_chips = 1, 224 .nr_chips = 1,
224 .nr_map = chip1_map, 225 .nr_map = chip1_map,
226 .options = NAND_SCAN_SILENT_NODEV,
225 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), 227 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
226 .partitions = osiris_default_nand_part, 228 .partitions = osiris_default_nand_part,
227 }, 229 },
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index 940640066857..ce228bdc66dd 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -15,7 +15,15 @@
15 * 15 *
16 */ 16 */
17 17
18#include <linux/io.h>
18#include <asm/proc-fns.h> 19#include <asm/proc-fns.h>
20#include <mach/map.h>
21#include <mach/regs-timer.h>
22
23#define WTCR (TMR_BA + 0x1C)
24#define WTCLK (1 << 10)
25#define WTE (1 << 7)
26#define WTRE (1 << 1)
19 27
20static void arch_idle(void) 28static void arch_idle(void)
21{ 29{
@@ -23,6 +31,11 @@ static void arch_idle(void)
23 31
24static void arch_reset(char mode, const char *cmd) 32static void arch_reset(char mode, const char *cmd)
25{ 33{
26 cpu_reset(0); 34 if (mode == 's') {
35 /* Jump into ROM at address 0 */
36 cpu_reset(0);
37 } else {
38 __raw_writel(WTE | WTRE | WTCLK, WTCR);
39 }
27} 40}
28 41
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index 4128af870b41..b80f769bc135 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -42,7 +42,10 @@
42#define TICKS_PER_SEC 100 42#define TICKS_PER_SEC 100
43#define PRESCALE 0x63 /* Divider = prescale + 1 */ 43#define PRESCALE 0x63 /* Divider = prescale + 1 */
44 44
45unsigned int timer0_load; 45#define TDR_SHIFT 24
46#define TDR_MASK ((1 << TDR_SHIFT) - 1)
47
48static unsigned int timer0_load;
46 49
47static void nuc900_clockevent_setmode(enum clock_event_mode mode, 50static void nuc900_clockevent_setmode(enum clock_event_mode mode,
48 struct clock_event_device *clk) 51 struct clock_event_device *clk)
@@ -88,7 +91,7 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
88static struct clock_event_device nuc900_clockevent_device = { 91static struct clock_event_device nuc900_clockevent_device = {
89 .name = "nuc900-timer0", 92 .name = "nuc900-timer0",
90 .shift = 32, 93 .shift = 32,
91 .features = CLOCK_EVT_MODE_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 94 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
92 .set_mode = nuc900_clockevent_setmode, 95 .set_mode = nuc900_clockevent_setmode,
93 .set_next_event = nuc900_clockevent_setnextevent, 96 .set_next_event = nuc900_clockevent_setnextevent,
94 .rating = 300, 97 .rating = 300,
@@ -112,8 +115,23 @@ static struct irqaction nuc900_timer0_irq = {
112 .handler = nuc900_timer0_interrupt, 115 .handler = nuc900_timer0_interrupt,
113}; 116};
114 117
115static void __init nuc900_clockevents_init(unsigned int rate) 118static void __init nuc900_clockevents_init(void)
116{ 119{
120 unsigned int rate;
121 struct clk *clk = clk_get(NULL, "timer0");
122
123 BUG_ON(IS_ERR(clk));
124
125 __raw_writel(0x00, REG_TCSR0);
126
127 clk_enable(clk);
128 rate = clk_get_rate(clk) / (PRESCALE + 1);
129
130 timer0_load = (rate / TICKS_PER_SEC);
131
132 __raw_writel(RESETINT, REG_TISR);
133 setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
134
117 nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC, 135 nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
118 nuc900_clockevent_device.shift); 136 nuc900_clockevent_device.shift);
119 nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff, 137 nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
@@ -127,26 +145,35 @@ static void __init nuc900_clockevents_init(unsigned int rate)
127 145
128static cycle_t nuc900_get_cycles(struct clocksource *cs) 146static cycle_t nuc900_get_cycles(struct clocksource *cs)
129{ 147{
130 return ~__raw_readl(REG_TDR1); 148 return (~__raw_readl(REG_TDR1)) & TDR_MASK;
131} 149}
132 150
133static struct clocksource clocksource_nuc900 = { 151static struct clocksource clocksource_nuc900 = {
134 .name = "nuc900-timer1", 152 .name = "nuc900-timer1",
135 .rating = 200, 153 .rating = 200,
136 .read = nuc900_get_cycles, 154 .read = nuc900_get_cycles,
137 .mask = CLOCKSOURCE_MASK(32), 155 .mask = CLOCKSOURCE_MASK(TDR_SHIFT),
138 .shift = 20, 156 .shift = 10,
139 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 157 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
140}; 158};
141 159
142static void __init nuc900_clocksource_init(unsigned int rate) 160static void __init nuc900_clocksource_init(void)
143{ 161{
144 unsigned int val; 162 unsigned int val;
163 unsigned int rate;
164 struct clk *clk = clk_get(NULL, "timer1");
165
166 BUG_ON(IS_ERR(clk));
167
168 __raw_writel(0x00, REG_TCSR1);
169
170 clk_enable(clk);
171 rate = clk_get_rate(clk) / (PRESCALE + 1);
145 172
146 __raw_writel(0xffffffff, REG_TICR1); 173 __raw_writel(0xffffffff, REG_TICR1);
147 174
148 val = __raw_readl(REG_TCSR1); 175 val = __raw_readl(REG_TCSR1);
149 val |= (COUNTEN | PERIOD); 176 val |= (COUNTEN | PERIOD | PRESCALE);
150 __raw_writel(val, REG_TCSR1); 177 __raw_writel(val, REG_TCSR1);
151 178
152 clocksource_nuc900.mult = 179 clocksource_nuc900.mult =
@@ -156,25 +183,8 @@ static void __init nuc900_clocksource_init(unsigned int rate)
156 183
157static void __init nuc900_timer_init(void) 184static void __init nuc900_timer_init(void)
158{ 185{
159 struct clk *ck_ext = clk_get(NULL, "ext"); 186 nuc900_clocksource_init();
160 unsigned int rate; 187 nuc900_clockevents_init();
161
162 BUG_ON(IS_ERR(ck_ext));
163
164 rate = clk_get_rate(ck_ext);
165 clk_put(ck_ext);
166 rate = rate / (PRESCALE + 0x01);
167
168 /* set a known state */
169 __raw_writel(0x00, REG_TCSR0);
170 __raw_writel(0x00, REG_TCSR1);
171 __raw_writel(RESETINT, REG_TISR);
172 timer0_load = (rate / TICKS_PER_SEC);
173
174 setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
175
176 nuc900_clocksource_init(rate);
177 nuc900_clockevents_init(rate);
178} 188}
179 189
180struct sys_timer nuc900_timer = { 190struct sys_timer nuc900_timer = {
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 52c40d155672..a04ffbbbe253 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -616,7 +616,7 @@ void __init mem_init(void)
616 "%dK data, %dK init, %luK highmem)\n", 616 "%dK data, %dK init, %luK highmem)\n",
617 nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10, 617 nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10,
618 datasize >> 10, initsize >> 10, 618 datasize >> 10, initsize >> 10,
619 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); 619 totalhigh_pages << (PAGE_SHIFT-10));
620 620
621 if (PAGE_SIZE >= 16384 && num_physpages <= 128) { 621 if (PAGE_SIZE >= 16384 && num_physpages <= 128) {
622 extern int sysctl_overcommit_memory; 622 extern int sysctl_overcommit_memory;
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index a26a605b73bd..0cb1848bd876 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -40,7 +40,6 @@ ENTRY(v7wbi_flush_user_tlb_range)
40 asid r3, r3 @ mask ASID 40 asid r3, r3 @ mask ASID
41 orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA 41 orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
42 mov r1, r1, lsl #PAGE_SHIFT 42 mov r1, r1, lsl #PAGE_SHIFT
43 vma_vm_flags r2, r2 @ get vma->vm_flags
441: 431:
45#ifdef CONFIG_SMP 44#ifdef CONFIG_SMP
46 mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) 45 mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 810c47f56e77..9af494f0ab3d 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -58,19 +58,19 @@
58 58
59#define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL) 59#define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
60#define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL) 60#define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
61#define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL) 61#define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL)
62 62
63#define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL) 63#define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL)
64#define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL) 64#define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL)
65#define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL) 65#define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL)
66 66
67#define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL) 67#define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL)
68#define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL) 68#define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL)
69#define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL) 69#define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL)
70 70
71#define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL) 71#define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL)
72#define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL) 72#define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL)
73#define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL) 73#define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL)
74 74
75#define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL) 75#define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL)
76#define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL) 76#define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL)
@@ -80,11 +80,11 @@
80 80
81#define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL) 81#define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL)
82#define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL) 82#define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL)
83#define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL) 83#define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL)
84 84
85#define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL) 85#define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL)
86#define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL) 86#define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL)
87#define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL) 87#define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL)
88 88
89#define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL) 89#define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL)
90#define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL) 90#define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL)
@@ -112,7 +112,7 @@
112#define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL) 112#define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL)
113#define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL) 113#define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL)
114 114
115#define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL) 115#define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL)
116#define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL) 116#define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL)
117 117
118#define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL) 118#define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL)
@@ -229,28 +229,28 @@
229#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) 229#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
230 230
231#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) 231#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL)
232#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL) 232#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
233 233
234#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) 234#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL)
235#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL) 235#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
236 236
237#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) 237#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL)
238#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL) 238#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
239 239
240#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) 240#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL)
241#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL) 241#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
242 242
243#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) 243#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL)
244#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL) 244#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
245 245
246#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) 246#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL)
247#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL) 247#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
248 248
249#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) 249#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL)
250#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL) 250#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
251 251
252#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) 252#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL)
253#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL) 253#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
254 254
255#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) 255#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
256#define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL) 256#define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL)
@@ -265,7 +265,7 @@
265#define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL) 265#define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL)
266 266
267#define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL) 267#define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL)
268#define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL) 268#define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL)
269 269
270#define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL) 270#define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL)
271#define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL) 271#define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL)
@@ -354,19 +354,19 @@
354#define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL) 354#define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL)
355 355
356#define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL) 356#define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL)
357#define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL) 357#define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL)
358#define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL) 358#define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL)
359 359
360#define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL) 360#define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL)
361#define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL) 361#define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL)
362#define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL) 362#define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL)
363 363
364#define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) 364#define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
365#define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL) 365#define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL)
366#define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL) 366#define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL)
367 367
368#define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) 368#define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
369#define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL) 369#define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL)
370#define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL) 370#define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL)
371 371
372#define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) 372#define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
@@ -377,11 +377,11 @@
377#define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL) 377#define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL)
378 378
379#define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) 379#define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
380#define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL) 380#define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL)
381#define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL) 381#define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL)
382 382
383#define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) 383#define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
384#define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL) 384#define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
385#define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL) 385#define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
386 386
387#define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE) 387#define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
@@ -410,7 +410,7 @@
410#define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE) 410#define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
411#define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL) 411#define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
412 412
413#define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL) 413#define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
414#define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL) 414#define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
415#define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL) 415#define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
416 416
@@ -418,23 +418,23 @@
418#define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL) 418#define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
419#define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL) 419#define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
420 420
421#define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL) 421#define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
422#define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL) 422#define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
423 423
424#define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL) 424#define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
425#define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL) 425#define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
426#define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL) 426#define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
427 427
428#define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL) 428#define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
429#define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL) 429#define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
430 430
431#define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) 431#define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
432#define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL) 432#define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
433 433
434#define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) 434#define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
435#define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL) 435#define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
436 436
437#define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) 437#define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
438#define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP) 438#define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
439#define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL) 439#define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
440 440
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 91e738144804..854e2dc58481 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -41,4 +41,8 @@
41#define UART1_BASE_ADDR 0x43f90000 41#define UART1_BASE_ADDR 0x43f90000
42#define UART2_BASE_ADDR 0x43f94000 42#define UART2_BASE_ADDR 0x43f94000
43 43
44#define MX25_FEC_BASE_ADDR 0x50038000
45
46#define MX25_INT_FEC 57
47
44#endif /* __MACH_MX25_H__ */ 48#endif /* __MACH_MX25_H__ */
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 89cafc937249..d9f8c844c385 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -36,10 +36,6 @@ static struct clk_functions *arch_clock;
36 * Standard clock functions defined in include/linux/clk.h 36 * Standard clock functions defined in include/linux/clk.h
37 *-------------------------------------------------------------------------*/ 37 *-------------------------------------------------------------------------*/
38 38
39/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
40 * clock framework is not up , it is defined here to avoid rework in
41 * every driver. Also dummy prcm reset function is added */
42
43int clk_enable(struct clk *clk) 39int clk_enable(struct clk *clk)
44{ 40{
45 unsigned long flags; 41 unsigned long flags;
@@ -305,7 +301,6 @@ void clk_enable_init_clocks(void)
305 clk_enable(clkp); 301 clk_enable(clkp);
306 } 302 }
307} 303}
308EXPORT_SYMBOL(clk_enable_init_clocks);
309 304
310/* 305/*
311 * Low level helpers 306 * Low level helpers
@@ -334,7 +329,16 @@ void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
334 arch_clock->clk_init_cpufreq_table(table); 329 arch_clock->clk_init_cpufreq_table(table);
335 spin_unlock_irqrestore(&clockfw_lock, flags); 330 spin_unlock_irqrestore(&clockfw_lock, flags);
336} 331}
337EXPORT_SYMBOL(clk_init_cpufreq_table); 332
333void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
334{
335 unsigned long flags;
336
337 spin_lock_irqsave(&clockfw_lock, flags);
338 if (arch_clock->clk_exit_cpufreq_table)
339 arch_clock->clk_exit_cpufreq_table(table);
340 spin_unlock_irqrestore(&clockfw_lock, flags);
341}
338#endif 342#endif
339 343
340/*-------------------------------------------------------------------------*/ 344/*-------------------------------------------------------------------------*/
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index f8ddbdd8b076..6d3d33360056 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -134,6 +134,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
134 134
135static int omap_cpu_exit(struct cpufreq_policy *policy) 135static int omap_cpu_exit(struct cpufreq_policy *policy)
136{ 136{
137 clk_exit_cpufreq_table(&freq_table);
137 clk_put(mpu_clk); 138 clk_put(mpu_clk);
138 return 0; 139 return 0;
139} 140}
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 04846811d0aa..d17620c50c28 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -192,6 +192,7 @@ struct gpio_bank {
192 u32 saved_risingdetect; 192 u32 saved_risingdetect;
193#endif 193#endif
194 u32 level_mask; 194 u32 level_mask;
195 u32 toggle_mask;
195 spinlock_t lock; 196 spinlock_t lock;
196 struct gpio_chip chip; 197 struct gpio_chip chip;
197 struct clk *dbck; 198 struct clk *dbck;
@@ -749,6 +750,44 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
749} 750}
750#endif 751#endif
751 752
753/*
754 * This only applies to chips that can't do both rising and falling edge
755 * detection at once. For all other chips, this function is a noop.
756 */
757static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
758{
759 void __iomem *reg = bank->base;
760 u32 l = 0;
761
762 switch (bank->method) {
763#ifdef CONFIG_ARCH_OMAP1
764 case METHOD_MPUIO:
765 reg += OMAP_MPUIO_GPIO_INT_EDGE;
766 break;
767#endif
768#ifdef CONFIG_ARCH_OMAP15XX
769 case METHOD_GPIO_1510:
770 reg += OMAP1510_GPIO_INT_CONTROL;
771 break;
772#endif
773#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
774 case METHOD_GPIO_7XX:
775 reg += OMAP7XX_GPIO_INT_CONTROL;
776 break;
777#endif
778 default:
779 return;
780 }
781
782 l = __raw_readl(reg);
783 if ((l >> gpio) & 1)
784 l &= ~(1 << gpio);
785 else
786 l |= 1 << gpio;
787
788 __raw_writel(l, reg);
789}
790
752static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) 791static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
753{ 792{
754 void __iomem *reg = bank->base; 793 void __iomem *reg = bank->base;
@@ -759,6 +798,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
759 case METHOD_MPUIO: 798 case METHOD_MPUIO:
760 reg += OMAP_MPUIO_GPIO_INT_EDGE; 799 reg += OMAP_MPUIO_GPIO_INT_EDGE;
761 l = __raw_readl(reg); 800 l = __raw_readl(reg);
801 if (trigger & IRQ_TYPE_EDGE_BOTH)
802 bank->toggle_mask |= 1 << gpio;
762 if (trigger & IRQ_TYPE_EDGE_RISING) 803 if (trigger & IRQ_TYPE_EDGE_RISING)
763 l |= 1 << gpio; 804 l |= 1 << gpio;
764 else if (trigger & IRQ_TYPE_EDGE_FALLING) 805 else if (trigger & IRQ_TYPE_EDGE_FALLING)
@@ -771,6 +812,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
771 case METHOD_GPIO_1510: 812 case METHOD_GPIO_1510:
772 reg += OMAP1510_GPIO_INT_CONTROL; 813 reg += OMAP1510_GPIO_INT_CONTROL;
773 l = __raw_readl(reg); 814 l = __raw_readl(reg);
815 if (trigger & IRQ_TYPE_EDGE_BOTH)
816 bank->toggle_mask |= 1 << gpio;
774 if (trigger & IRQ_TYPE_EDGE_RISING) 817 if (trigger & IRQ_TYPE_EDGE_RISING)
775 l |= 1 << gpio; 818 l |= 1 << gpio;
776 else if (trigger & IRQ_TYPE_EDGE_FALLING) 819 else if (trigger & IRQ_TYPE_EDGE_FALLING)
@@ -803,6 +846,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
803 case METHOD_GPIO_7XX: 846 case METHOD_GPIO_7XX:
804 reg += OMAP7XX_GPIO_INT_CONTROL; 847 reg += OMAP7XX_GPIO_INT_CONTROL;
805 l = __raw_readl(reg); 848 l = __raw_readl(reg);
849 if (trigger & IRQ_TYPE_EDGE_BOTH)
850 bank->toggle_mask |= 1 << gpio;
806 if (trigger & IRQ_TYPE_EDGE_RISING) 851 if (trigger & IRQ_TYPE_EDGE_RISING)
807 l |= 1 << gpio; 852 l |= 1 << gpio;
808 else if (trigger & IRQ_TYPE_EDGE_FALLING) 853 else if (trigger & IRQ_TYPE_EDGE_FALLING)
@@ -1072,7 +1117,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena
1072 */ 1117 */
1073static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) 1118static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
1074{ 1119{
1075 unsigned long flags; 1120 unsigned long uninitialized_var(flags);
1076 1121
1077 switch (bank->method) { 1122 switch (bank->method) {
1078#ifdef CONFIG_ARCH_OMAP16XX 1123#ifdef CONFIG_ARCH_OMAP16XX
@@ -1217,7 +1262,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1217{ 1262{
1218 void __iomem *isr_reg = NULL; 1263 void __iomem *isr_reg = NULL;
1219 u32 isr; 1264 u32 isr;
1220 unsigned int gpio_irq; 1265 unsigned int gpio_irq, gpio_index;
1221 struct gpio_bank *bank; 1266 struct gpio_bank *bank;
1222 u32 retrigger = 0; 1267 u32 retrigger = 0;
1223 int unmasked = 0; 1268 int unmasked = 0;
@@ -1284,9 +1329,23 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1284 1329
1285 gpio_irq = bank->virtual_irq_start; 1330 gpio_irq = bank->virtual_irq_start;
1286 for (; isr != 0; isr >>= 1, gpio_irq++) { 1331 for (; isr != 0; isr >>= 1, gpio_irq++) {
1332 gpio_index = get_gpio_index(irq_to_gpio(gpio_irq));
1333
1287 if (!(isr & 1)) 1334 if (!(isr & 1))
1288 continue; 1335 continue;
1289 1336
1337#ifdef CONFIG_ARCH_OMAP1
1338 /*
1339 * Some chips can't respond to both rising and falling
1340 * at the same time. If this irq was requested with
1341 * both flags, we need to flip the ICR data for the IRQ
1342 * to respond to the IRQ for the opposite direction.
1343 * This will be indicated in the bank toggle_mask.
1344 */
1345 if (bank->toggle_mask & (1 << gpio_index))
1346 _toggle_gpio_edge_triggering(bank, gpio_index);
1347#endif
1348
1290 generic_handle_irq(gpio_irq); 1349 generic_handle_irq(gpio_irq);
1291 } 1350 }
1292 } 1351 }
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h
index 376ce18216ff..5cd622039da0 100644
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -99,7 +99,6 @@ struct fb_info;
99struct omap_backlight_config { 99struct omap_backlight_config {
100 int default_intensity; 100 int default_intensity;
101 int (*set_power)(struct device *dev, int state); 101 int (*set_power)(struct device *dev, int state);
102 int (*check_fb)(struct fb_info *fb);
103}; 102};
104 103
105struct omap_fbmem_config { 104struct omap_fbmem_config {
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 309b6d1dccdb..94fe2a0ce40a 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -119,6 +119,7 @@ struct clk_functions {
119 void (*clk_disable_unused)(struct clk *clk); 119 void (*clk_disable_unused)(struct clk *clk);
120#ifdef CONFIG_CPU_FREQ 120#ifdef CONFIG_CPU_FREQ
121 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); 121 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
122 void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
122#endif 123#endif
123}; 124};
124 125
@@ -135,6 +136,7 @@ extern unsigned long followparent_recalc(struct clk *clk);
135extern void clk_enable_init_clocks(void); 136extern void clk_enable_init_clocks(void);
136#ifdef CONFIG_CPU_FREQ 137#ifdef CONFIG_CPU_FREQ
137extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); 138extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
139extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
138#endif 140#endif
139 141
140extern const struct clkops clkops_null; 142extern const struct clkops clkops_null;
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 2ae884378638..a745d62fad0d 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -147,7 +147,7 @@
147#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) 147#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
148#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) 148#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
149#define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ 149#define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \
150 + ((i) >> 1) * 4 + (!(i) & 1) * 2) 150 + ((i) >> 1) * 4 + (!((i) & 1)) * 2)
151#define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) 151#define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4)
152#define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) 152#define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8)
153#define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) 153#define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0)
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 7e5319f907d1..a3e7b471bcba 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -122,16 +122,21 @@
122#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) 122#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
123#define OMAP243X_SMS_SIZE SZ_1M 123#define OMAP243X_SMS_SIZE SZ_1M
124 124
125/* DSP */ 125/* 2420 IVA */
126#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 126#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
127#define DSP_MEM_24XX_VIRT 0xe0000000 127 /* 0x58000000 --> 0xfc100000 */
128#define DSP_MEM_24XX_SIZE 0x28000 128#define DSP_MEM_2420_VIRT 0xfc100000
129#define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ 129#define DSP_MEM_2420_SIZE 0x28000
130#define DSP_IPI_24XX_VIRT 0xe1000000 130#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
131#define DSP_IPI_24XX_SIZE SZ_4K 131 /* 0x59000000 --> 0xfc128000 */
132#define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ 132#define DSP_IPI_2420_VIRT 0xfc128000
133#define DSP_MMU_24XX_VIRT 0xe2000000 133#define DSP_IPI_2420_SIZE SZ_4K
134#define DSP_MMU_24XX_SIZE SZ_4K 134#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
135 /* 0x5a000000 --> 0xfc129000 */
136#define DSP_MMU_2420_VIRT 0xfc129000
137#define DSP_MMU_2420_SIZE SZ_4K
138
139/* 2430 IVA2.1 - currently unmapped */
135 140
136/* 141/*
137 * ---------------------------------------------------------------------------- 142 * ----------------------------------------------------------------------------
@@ -182,16 +187,7 @@
182#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) 187#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
183#define OMAP343X_SDRC_SIZE SZ_1M 188#define OMAP343X_SDRC_SIZE SZ_1M
184 189
185/* DSP */ 190/* 3430 IVA - currently unmapped */
186#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */
187#define DSP_MEM_34XX_VIRT 0xe0000000
188#define DSP_MEM_34XX_SIZE 0x28000
189#define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */
190#define DSP_IPI_34XX_VIRT 0xe1000000
191#define DSP_IPI_34XX_SIZE SZ_4K
192#define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */
193#define DSP_MMU_34XX_VIRT 0xe2000000
194#define DSP_MMU_34XX_SIZE SZ_4K
195 191
196/* 192/*
197 * ---------------------------------------------------------------------------- 193 * ----------------------------------------------------------------------------
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h
index 8f069cc80350..692c90e89ac3 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -183,6 +183,14 @@ enum omap7xx_index {
183 /* I2C */ 183 /* I2C */
184 I2C_7XX_SCL, 184 I2C_7XX_SCL,
185 I2C_7XX_SDA, 185 I2C_7XX_SDA,
186
187 /* SPI */
188 SPI_7XX_1,
189 SPI_7XX_2,
190 SPI_7XX_3,
191 SPI_7XX_4,
192 SPI_7XX_5,
193 SPI_7XX_6,
186}; 194};
187 195
188enum omap1xxx_index { 196enum omap1xxx_index {
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/plat-omap/include/plat/omap7xx.h
index 53f52414b0e9..48e4757e1e30 100644
--- a/arch/arm/plat-omap/include/plat/omap7xx.h
+++ b/arch/arm/plat-omap/include/plat/omap7xx.h
@@ -46,6 +46,9 @@
46#define OMAP7XX_DSPREG_SIZE SZ_128K 46#define OMAP7XX_DSPREG_SIZE SZ_128K
47#define OMAP7XX_DSPREG_START 0xE1000000 47#define OMAP7XX_DSPREG_START 0xE1000000
48 48
49#define OMAP7XX_SPI1_BASE 0xfffc0800
50#define OMAP7XX_SPI2_BASE 0xfffc1000
51
49/* 52/*
50 * ---------------------------------------------------------------------------- 53 * ----------------------------------------------------------------------------
51 * OMAP7XX specific configuration registers 54 * OMAP7XX specific configuration registers
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 11f5d7961c73..0cfd54f519c4 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
66 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); 66 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
67 } 67 }
68 if (cpu_is_omap2420()) { 68 if (cpu_is_omap2420()) {
69 if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) 69 if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
70 return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); 70 return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
71 if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) 71 if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
72 return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); 72 return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
73 if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) 73 if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
74 return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); 74 return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
75 } 75 }
76 if (cpu_is_omap2430()) { 76 if (cpu_is_omap2430()) {
77 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) 77 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index c0ff1e39d893..463d6386aff2 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -827,7 +827,7 @@ EXPORT_SYMBOL_GPL(iommu_get);
827 **/ 827 **/
828void iommu_put(struct iommu *obj) 828void iommu_put(struct iommu *obj)
829{ 829{
830 if (!obj && IS_ERR(obj)) 830 if (!obj || IS_ERR(obj))
831 return; 831 return;
832 832
833 mutex_lock(&obj->iommu_lock); 833 mutex_lock(&obj->iommu_lock);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 2cc1cc328bac..f75767278fc3 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -436,7 +436,7 @@ int omap_mcbsp_request(unsigned int id)
436 dev_err(mcbsp->dev, "Unable to request TX IRQ %d " 436 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
437 "for McBSP%d\n", mcbsp->tx_irq, 437 "for McBSP%d\n", mcbsp->tx_irq,
438 mcbsp->id); 438 mcbsp->id);
439 return err; 439 goto error;
440 } 440 }
441 441
442 init_completion(&mcbsp->rx_irq_completion); 442 init_completion(&mcbsp->rx_irq_completion);
@@ -446,12 +446,26 @@ int omap_mcbsp_request(unsigned int id)
446 dev_err(mcbsp->dev, "Unable to request RX IRQ %d " 446 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
447 "for McBSP%d\n", mcbsp->rx_irq, 447 "for McBSP%d\n", mcbsp->rx_irq,
448 mcbsp->id); 448 mcbsp->id);
449 free_irq(mcbsp->tx_irq, (void *)mcbsp); 449 goto tx_irq;
450 return err;
451 } 450 }
452 } 451 }
453 452
454 return 0; 453 return 0;
454tx_irq:
455 free_irq(mcbsp->tx_irq, (void *)mcbsp);
456error:
457 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
458 mcbsp->pdata->ops->free(id);
459
460 /* Do procedure specific to omap34xx arch, if applicable */
461 omap34xx_mcbsp_free(mcbsp);
462
463 clk_disable(mcbsp->fclk);
464 clk_disable(mcbsp->iclk);
465
466 mcbsp->free = 1;
467
468 return err;
455} 469}
456EXPORT_SYMBOL(omap_mcbsp_request); 470EXPORT_SYMBOL(omap_mcbsp_request);
457 471
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c
index a9eabdcfa163..51dc5c8106c0 100644
--- a/arch/arm/plat-pxa/pwm.c
+++ b/arch/arm/plat-pxa/pwm.c
@@ -204,14 +204,14 @@ static int __devinit pwm_probe(struct platform_device *pdev)
204 goto err_free_clk; 204 goto err_free_clk;
205 } 205 }
206 206
207 r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); 207 r = request_mem_region(r->start, resource_size(r), pdev->name);
208 if (r == NULL) { 208 if (r == NULL) {
209 dev_err(&pdev->dev, "failed to request memory resource\n"); 209 dev_err(&pdev->dev, "failed to request memory resource\n");
210 ret = -EBUSY; 210 ret = -EBUSY;
211 goto err_free_clk; 211 goto err_free_clk;
212 } 212 }
213 213
214 pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); 214 pwm->mmio_base = ioremap(r->start, resource_size(r));
215 if (pwm->mmio_base == NULL) { 215 if (pwm->mmio_base == NULL) {
216 dev_err(&pdev->dev, "failed to ioremap() registers\n"); 216 dev_err(&pdev->dev, "failed to ioremap() registers\n");
217 ret = -ENODEV; 217 ret = -ENODEV;
@@ -241,7 +241,7 @@ static int __devinit pwm_probe(struct platform_device *pdev)
241 return 0; 241 return 0;
242 242
243err_free_mem: 243err_free_mem:
244 release_mem_region(r->start, r->end - r->start + 1); 244 release_mem_region(r->start, resource_size(r));
245err_free_clk: 245err_free_clk:
246 clk_put(pwm->clk); 246 clk_put(pwm->clk);
247err_free: 247err_free:
@@ -271,7 +271,7 @@ static int __devexit pwm_remove(struct platform_device *pdev)
271 iounmap(pwm->mmio_base); 271 iounmap(pwm->mmio_base);
272 272
273 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 273 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
274 release_mem_region(r->start, r->end - r->start + 1); 274 release_mem_region(r->start, resource_size(r));
275 275
276 clk_put(pwm->clk); 276 clk_put(pwm->clk);
277 kfree(pwm); 277 kfree(pwm);
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-s3c/dev-nand.c
index e771e77dcd54..84808ccda70e 100644
--- a/arch/arm/plat-s3c/dev-nand.c
+++ b/arch/arm/plat-s3c/dev-nand.c
@@ -114,7 +114,7 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
114 114
115 for (i = 0; i < npd->nr_sets; i++) { 115 for (i = 0; i < npd->nr_sets; i++) {
116 ret = s3c_nand_copy_set(to); 116 ret = s3c_nand_copy_set(to);
117 if (!ret) { 117 if (ret) {
118 printk(KERN_ERR "%s: failed to copy set %d\n", 118 printk(KERN_ERR "%s: failed to copy set %d\n",
119 __func__, i); 119 __func__, i);
120 return; 120 return;
@@ -122,6 +122,8 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
122 to++; 122 to++;
123 } 123 }
124 } 124 }
125
126 s3c_device_nand.dev.platform_data = npd;
125} 127}
126 128
127EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); 129EXPORT_SYMBOL_GPL(s3c_nand_set_platdata);
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index 932cbbbb4273..c1c20b023917 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -31,6 +31,7 @@ extern struct platform_device s3c64xx_device_iisv4;
31extern struct platform_device s3c64xx_device_pcm0; 31extern struct platform_device s3c64xx_device_pcm0;
32extern struct platform_device s3c64xx_device_pcm1; 32extern struct platform_device s3c64xx_device_pcm1;
33 33
34extern struct platform_device s3c_device_ts;
34extern struct platform_device s3c_device_fb; 35extern struct platform_device s3c_device_fb;
35extern struct platform_device s3c_device_usb; 36extern struct platform_device s3c_device_usb;
36extern struct platform_device s3c_device_lcd; 37extern struct platform_device s3c_device_lcd;
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index f52a92ce8dda..7f686a31e672 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -37,6 +37,8 @@
37#include <plat/cpu.h> 37#include <plat/cpu.h>
38#include <plat/regs-spi.h> 38#include <plat/regs-spi.h>
39 39
40#include <mach/ts.h>
41
40/* Serial port registrations */ 42/* Serial port registrations */
41 43
42static struct resource s3c2410_uart0_resource[] = { 44static struct resource s3c2410_uart0_resource[] = {
@@ -182,6 +184,22 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
182 } 184 }
183} 185}
184 186
187/* Touchscreen */
188struct platform_device s3c_device_ts = {
189 .name = "s3c2410-ts",
190 .id = -1,
191};
192EXPORT_SYMBOL(s3c_device_ts);
193
194static struct s3c2410_ts_mach_info s3c2410ts_info;
195
196void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
197{
198 memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info));
199 s3c_device_ts.dev.platform_data = &s3c2410ts_info;
200}
201EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
202
185/* USB Device (Gadget)*/ 203/* USB Device (Gadget)*/
186 204
187static struct resource s3c_usbgadget_resource[] = { 205static struct resource s3c_usbgadget_resource[] = {
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c
index 1364317d421e..12623a474b54 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/plat-s3c24xx/s3c244x.c
@@ -70,6 +70,7 @@ void __init s3c244x_map_io(void)
70 s3c_device_sdi.name = "s3c2440-sdi"; 70 s3c_device_sdi.name = "s3c2440-sdi";
71 s3c_device_i2c0.name = "s3c2440-i2c"; 71 s3c_device_i2c0.name = "s3c2440-i2c";
72 s3c_device_nand.name = "s3c2440-nand"; 72 s3c_device_nand.name = "s3c2440-nand";
73 s3c_device_ts.name = "s3c2440-ts";
73 s3c_device_usbgadget.name = "s3c2440-usbgadget"; 74 s3c_device_usbgadget.name = "s3c2440-usbgadget";
74} 75}
75 76
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 6ffa21eb1b91..ffd56deb9e81 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -46,6 +46,7 @@ static struct clk clk_ext_xtal_mux = {
46#define clk_fin_epll clk_ext_xtal_mux 46#define clk_fin_epll clk_ext_xtal_mux
47 47
48#define clk_fout_mpll clk_mpll 48#define clk_fout_mpll clk_mpll
49#define clk_fout_epll clk_epll
49 50
50struct clk_sources { 51struct clk_sources {
51 unsigned int nr_sources; 52 unsigned int nr_sources;
@@ -88,11 +89,6 @@ static struct clksrc_clk clk_mout_apll = {
88 .sources = &clk_src_apll, 89 .sources = &clk_src_apll,
89}; 90};
90 91
91static struct clk clk_fout_epll = {
92 .name = "fout_epll",
93 .id = -1,
94};
95
96static struct clk *clk_src_epll_list[] = { 92static struct clk *clk_src_epll_list[] = {
97 [0] = &clk_fin_epll, 93 [0] = &clk_fin_epll,
98 [1] = &clk_fout_epll, 94 [1] = &clk_fout_epll,
@@ -715,7 +711,6 @@ static struct clk *clks[] __initdata = {
715 &clk_iis_cd1, 711 &clk_iis_cd1,
716 &clk_pcm_cd, 712 &clk_pcm_cd,
717 &clk_mout_epll.clk, 713 &clk_mout_epll.clk,
718 &clk_fout_epll,
719 &clk_mout_mpll.clk, 714 &clk_mout_mpll.clk,
720 &clk_dout_mpll, 715 &clk_dout_mpll,
721 &clk_mmc0.clk, 716 &clk_mmc0.clk,
@@ -760,7 +755,4 @@ void __init s3c6400_register_clocks(unsigned armclk_divlimit)
760 clkp->name, ret); 755 clkp->name, ret);
761 } 756 }
762 } 757 }
763
764 clk_mpll.parent = &clk_mout_mpll.clk;
765 clk_epll.parent = &clk_mout_epll.clk;
766} 758}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-19 08:45:24 -0500