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-rw-r--r--arch/arm64/Kconfig4
-rw-r--r--arch/arm64/boot/dts/apm-mustang.dts4
-rw-r--r--arch/arm64/boot/dts/apm-storm.dtsi36
-rw-r--r--arch/arm64/configs/defconfig15
-rw-r--r--arch/arm64/crypto/aes-glue.c12
-rw-r--r--arch/arm64/crypto/ghash-ce-core.S92
-rw-r--r--arch/arm64/crypto/ghash-ce-glue.c5
-rw-r--r--arch/arm64/include/asm/Kbuild1
-rw-r--r--arch/arm64/include/asm/dma-mapping.h2
-rw-r--r--arch/arm64/include/asm/memory.h2
-rw-r--r--arch/arm64/include/asm/pgtable.h4
-rw-r--r--arch/arm64/include/asm/ptrace.h4
-rw-r--r--arch/arm64/include/uapi/asm/posix_types.h10
-rw-r--r--arch/arm64/include/uapi/asm/sigcontext.h2
-rw-r--r--arch/arm64/kernel/efi-entry.S3
-rw-r--r--arch/arm64/kernel/efi-stub.c2
-rw-r--r--arch/arm64/kernel/entry-ftrace.S2
-rw-r--r--arch/arm64/kernel/entry.S1
-rw-r--r--arch/arm64/kernel/head.S3
-rw-r--r--arch/arm64/kernel/ptrace.c32
-rw-r--r--arch/arm64/mm/copypage.c2
-rw-r--r--arch/arm64/mm/flush.c3
-rw-r--r--arch/arm64/mm/init.c23
23 files changed, 172 insertions, 92 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7295419165e1..839f48c26ef0 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,8 +1,10 @@
1config ARM64 1config ARM64
2 def_bool y 2 def_bool y
3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
4 select ARCH_USE_CMPXCHG_LOCKREF 4 select ARCH_HAS_OPP
5 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
6 select ARCH_USE_CMPXCHG_LOCKREF
7 select ARCH_SUPPORTS_ATOMIC_RMW
6 select ARCH_WANT_OPTIONAL_GPIOLIB 8 select ARCH_WANT_OPTIONAL_GPIOLIB
7 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION 9 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
8 select ARCH_WANT_FRAME_POINTERS 10 select ARCH_WANT_FRAME_POINTERS
diff --git a/arch/arm64/boot/dts/apm-mustang.dts b/arch/arm64/boot/dts/apm-mustang.dts
index 1247ca1200b1..6541962f5d70 100644
--- a/arch/arm64/boot/dts/apm-mustang.dts
+++ b/arch/arm64/boot/dts/apm-mustang.dts
@@ -24,3 +24,7 @@
24 reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */ 24 reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
25 }; 25 };
26}; 26};
27
28&serial0 {
29 status = "ok";
30};
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index c5f0a47a1375..40aa96ce13c4 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -273,8 +273,9 @@
273 }; 273 };
274 274
275 serial0: serial@1c020000 { 275 serial0: serial@1c020000 {
276 status = "disabled";
276 device_type = "serial"; 277 device_type = "serial";
277 compatible = "ns16550"; 278 compatible = "ns16550a";
278 reg = <0 0x1c020000 0x0 0x1000>; 279 reg = <0 0x1c020000 0x0 0x1000>;
279 reg-shift = <2>; 280 reg-shift = <2>;
280 clock-frequency = <10000000>; /* Updated by bootloader */ 281 clock-frequency = <10000000>; /* Updated by bootloader */
@@ -282,6 +283,39 @@
282 interrupts = <0x0 0x4c 0x4>; 283 interrupts = <0x0 0x4c 0x4>;
283 }; 284 };
284 285
286 serial1: serial@1c021000 {
287 status = "disabled";
288 device_type = "serial";
289 compatible = "ns16550a";
290 reg = <0 0x1c021000 0x0 0x1000>;
291 reg-shift = <2>;
292 clock-frequency = <10000000>; /* Updated by bootloader */
293 interrupt-parent = <&gic>;
294 interrupts = <0x0 0x4d 0x4>;
295 };
296
297 serial2: serial@1c022000 {
298 status = "disabled";
299 device_type = "serial";
300 compatible = "ns16550a";
301 reg = <0 0x1c022000 0x0 0x1000>;
302 reg-shift = <2>;
303 clock-frequency = <10000000>; /* Updated by bootloader */
304 interrupt-parent = <&gic>;
305 interrupts = <0x0 0x4e 0x4>;
306 };
307
308 serial3: serial@1c023000 {
309 status = "disabled";
310 device_type = "serial";
311 compatible = "ns16550a";
312 reg = <0 0x1c023000 0x0 0x1000>;
313 reg-shift = <2>;
314 clock-frequency = <10000000>; /* Updated by bootloader */
315 interrupt-parent = <&gic>;
316 interrupts = <0x0 0x4f 0x4>;
317 };
318
285 phy1: phy@1f21a000 { 319 phy1: phy@1f21a000 {
286 compatible = "apm,xgene-phy"; 320 compatible = "apm,xgene-phy";
287 reg = <0x0 0x1f21a000 0x0 0x100>; 321 reg = <0x0 0x1f21a000 0x0 0x100>;
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 157e1d8d9a47..3421f316f5dc 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -6,9 +6,18 @@ CONFIG_NO_HZ_IDLE=y
6CONFIG_HIGH_RES_TIMERS=y 6CONFIG_HIGH_RES_TIMERS=y
7CONFIG_BSD_PROCESS_ACCT=y 7CONFIG_BSD_PROCESS_ACCT=y
8CONFIG_BSD_PROCESS_ACCT_V3=y 8CONFIG_BSD_PROCESS_ACCT_V3=y
9CONFIG_TASKSTATS=y
10CONFIG_TASK_DELAY_ACCT=y
11CONFIG_TASK_XACCT=y
12CONFIG_TASK_IO_ACCOUNTING=y
9CONFIG_IKCONFIG=y 13CONFIG_IKCONFIG=y
10CONFIG_IKCONFIG_PROC=y 14CONFIG_IKCONFIG_PROC=y
11CONFIG_LOG_BUF_SHIFT=14 15CONFIG_LOG_BUF_SHIFT=14
16CONFIG_RESOURCE_COUNTERS=y
17CONFIG_MEMCG=y
18CONFIG_MEMCG_SWAP=y
19CONFIG_MEMCG_KMEM=y
20CONFIG_CGROUP_HUGETLB=y
12# CONFIG_UTS_NS is not set 21# CONFIG_UTS_NS is not set
13# CONFIG_IPC_NS is not set 22# CONFIG_IPC_NS is not set
14# CONFIG_PID_NS is not set 23# CONFIG_PID_NS is not set
@@ -27,6 +36,7 @@ CONFIG_ARCH_VEXPRESS=y
27CONFIG_ARCH_XGENE=y 36CONFIG_ARCH_XGENE=y
28CONFIG_SMP=y 37CONFIG_SMP=y
29CONFIG_PREEMPT=y 38CONFIG_PREEMPT=y
39CONFIG_KSM=y
30CONFIG_TRANSPARENT_HUGEPAGE=y 40CONFIG_TRANSPARENT_HUGEPAGE=y
31CONFIG_CMA=y 41CONFIG_CMA=y
32CONFIG_CMDLINE="console=ttyAMA0" 42CONFIG_CMDLINE="console=ttyAMA0"
@@ -45,6 +55,7 @@ CONFIG_IP_PNP_BOOTP=y
45CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 55CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
46CONFIG_DEVTMPFS=y 56CONFIG_DEVTMPFS=y
47CONFIG_DMA_CMA=y 57CONFIG_DMA_CMA=y
58CONFIG_BLK_DEV_LOOP=y
48CONFIG_VIRTIO_BLK=y 59CONFIG_VIRTIO_BLK=y
49# CONFIG_SCSI_PROC_FS is not set 60# CONFIG_SCSI_PROC_FS is not set
50CONFIG_BLK_DEV_SD=y 61CONFIG_BLK_DEV_SD=y
@@ -53,6 +64,7 @@ CONFIG_ATA=y
53CONFIG_PATA_PLATFORM=y 64CONFIG_PATA_PLATFORM=y
54CONFIG_PATA_OF_PLATFORM=y 65CONFIG_PATA_OF_PLATFORM=y
55CONFIG_NETDEVICES=y 66CONFIG_NETDEVICES=y
67CONFIG_TUN=y
56CONFIG_SMC91X=y 68CONFIG_SMC91X=y
57CONFIG_SMSC911X=y 69CONFIG_SMSC911X=y
58# CONFIG_WLAN is not set 70# CONFIG_WLAN is not set
@@ -85,6 +97,8 @@ CONFIG_EXT3_FS=y
85# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 97# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
86# CONFIG_EXT3_FS_XATTR is not set 98# CONFIG_EXT3_FS_XATTR is not set
87CONFIG_EXT4_FS=y 99CONFIG_EXT4_FS=y
100CONFIG_FANOTIFY=y
101CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
88CONFIG_FUSE_FS=y 102CONFIG_FUSE_FS=y
89CONFIG_CUSE=y 103CONFIG_CUSE=y
90CONFIG_VFAT_FS=y 104CONFIG_VFAT_FS=y
@@ -104,6 +118,7 @@ CONFIG_DEBUG_KERNEL=y
104CONFIG_LOCKUP_DETECTOR=y 118CONFIG_LOCKUP_DETECTOR=y
105# CONFIG_SCHED_DEBUG is not set 119# CONFIG_SCHED_DEBUG is not set
106# CONFIG_FTRACE is not set 120# CONFIG_FTRACE is not set
121CONFIG_SECURITY=y
107CONFIG_CRYPTO_ANSI_CPRNG=y 122CONFIG_CRYPTO_ANSI_CPRNG=y
108CONFIG_ARM64_CRYPTO=y 123CONFIG_ARM64_CRYPTO=y
109CONFIG_CRYPTO_SHA1_ARM64_CE=y 124CONFIG_CRYPTO_SHA1_ARM64_CE=y
diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c
index 60f2f4c12256..79cd911ef88c 100644
--- a/arch/arm64/crypto/aes-glue.c
+++ b/arch/arm64/crypto/aes-glue.c
@@ -106,7 +106,7 @@ static int ecb_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
106 for (first = 1; (blocks = (walk.nbytes / AES_BLOCK_SIZE)); first = 0) { 106 for (first = 1; (blocks = (walk.nbytes / AES_BLOCK_SIZE)); first = 0) {
107 aes_ecb_encrypt(walk.dst.virt.addr, walk.src.virt.addr, 107 aes_ecb_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
108 (u8 *)ctx->key_enc, rounds, blocks, first); 108 (u8 *)ctx->key_enc, rounds, blocks, first);
109 err = blkcipher_walk_done(desc, &walk, 0); 109 err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
110 } 110 }
111 kernel_neon_end(); 111 kernel_neon_end();
112 return err; 112 return err;
@@ -128,7 +128,7 @@ static int ecb_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
128 for (first = 1; (blocks = (walk.nbytes / AES_BLOCK_SIZE)); first = 0) { 128 for (first = 1; (blocks = (walk.nbytes / AES_BLOCK_SIZE)); first = 0) {
129 aes_ecb_decrypt(walk.dst.virt.addr, walk.src.virt.addr, 129 aes_ecb_decrypt(walk.dst.virt.addr, walk.src.virt.addr,
130 (u8 *)ctx->key_dec, rounds, blocks, first); 130 (u8 *)ctx->key_dec, rounds, blocks, first);
131 err = blkcipher_walk_done(desc, &walk, 0); 131 err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
132 } 132 }
133 kernel_neon_end(); 133 kernel_neon_end();
134 return err; 134 return err;
@@ -151,7 +151,7 @@ static int cbc_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
151 aes_cbc_encrypt(walk.dst.virt.addr, walk.src.virt.addr, 151 aes_cbc_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
152 (u8 *)ctx->key_enc, rounds, blocks, walk.iv, 152 (u8 *)ctx->key_enc, rounds, blocks, walk.iv,
153 first); 153 first);
154 err = blkcipher_walk_done(desc, &walk, 0); 154 err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
155 } 155 }
156 kernel_neon_end(); 156 kernel_neon_end();
157 return err; 157 return err;
@@ -174,7 +174,7 @@ static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
174 aes_cbc_decrypt(walk.dst.virt.addr, walk.src.virt.addr, 174 aes_cbc_decrypt(walk.dst.virt.addr, walk.src.virt.addr,
175 (u8 *)ctx->key_dec, rounds, blocks, walk.iv, 175 (u8 *)ctx->key_dec, rounds, blocks, walk.iv,
176 first); 176 first);
177 err = blkcipher_walk_done(desc, &walk, 0); 177 err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
178 } 178 }
179 kernel_neon_end(); 179 kernel_neon_end();
180 return err; 180 return err;
@@ -243,7 +243,7 @@ static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
243 aes_xts_encrypt(walk.dst.virt.addr, walk.src.virt.addr, 243 aes_xts_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
244 (u8 *)ctx->key1.key_enc, rounds, blocks, 244 (u8 *)ctx->key1.key_enc, rounds, blocks,
245 (u8 *)ctx->key2.key_enc, walk.iv, first); 245 (u8 *)ctx->key2.key_enc, walk.iv, first);
246 err = blkcipher_walk_done(desc, &walk, 0); 246 err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
247 } 247 }
248 kernel_neon_end(); 248 kernel_neon_end();
249 249
@@ -267,7 +267,7 @@ static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
267 aes_xts_decrypt(walk.dst.virt.addr, walk.src.virt.addr, 267 aes_xts_decrypt(walk.dst.virt.addr, walk.src.virt.addr,
268 (u8 *)ctx->key1.key_dec, rounds, blocks, 268 (u8 *)ctx->key1.key_dec, rounds, blocks,
269 (u8 *)ctx->key2.key_enc, walk.iv, first); 269 (u8 *)ctx->key2.key_enc, walk.iv, first);
270 err = blkcipher_walk_done(desc, &walk, 0); 270 err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE);
271 } 271 }
272 kernel_neon_end(); 272 kernel_neon_end();
273 273
diff --git a/arch/arm64/crypto/ghash-ce-core.S b/arch/arm64/crypto/ghash-ce-core.S
index b9e6eaf41c9b..dc457015884e 100644
--- a/arch/arm64/crypto/ghash-ce-core.S
+++ b/arch/arm64/crypto/ghash-ce-core.S
@@ -3,14 +3,6 @@
3 * 3 *
4 * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> 4 * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
5 * 5 *
6 * Based on arch/x86/crypto/ghash-pmullni-intel_asm.S
7 *
8 * Copyright (c) 2009 Intel Corp.
9 * Author: Huang Ying <ying.huang@intel.com>
10 * Vinodh Gopal
11 * Erdinc Ozturk
12 * Deniz Karakoyunlu
13 *
14 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License version 2 as published 7 * under the terms of the GNU General Public License version 2 as published
16 * by the Free Software Foundation. 8 * by the Free Software Foundation.
@@ -19,13 +11,15 @@
19#include <linux/linkage.h> 11#include <linux/linkage.h>
20#include <asm/assembler.h> 12#include <asm/assembler.h>
21 13
22 DATA .req v0 14 SHASH .req v0
23 SHASH .req v1 15 SHASH2 .req v1
24 IN1 .req v2
25 T1 .req v2 16 T1 .req v2
26 T2 .req v3 17 T2 .req v3
27 T3 .req v4 18 MASK .req v4
28 VZR .req v5 19 XL .req v5
20 XM .req v6
21 XH .req v7
22 IN1 .req v7
29 23
30 .text 24 .text
31 .arch armv8-a+crypto 25 .arch armv8-a+crypto
@@ -35,61 +29,51 @@
35 * struct ghash_key const *k, const char *head) 29 * struct ghash_key const *k, const char *head)
36 */ 30 */
37ENTRY(pmull_ghash_update) 31ENTRY(pmull_ghash_update)
38 ld1 {DATA.16b}, [x1]
39 ld1 {SHASH.16b}, [x3] 32 ld1 {SHASH.16b}, [x3]
40 eor VZR.16b, VZR.16b, VZR.16b 33 ld1 {XL.16b}, [x1]
34 movi MASK.16b, #0xe1
35 ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
36 shl MASK.2d, MASK.2d, #57
37 eor SHASH2.16b, SHASH2.16b, SHASH.16b
41 38
42 /* do the head block first, if supplied */ 39 /* do the head block first, if supplied */
43 cbz x4, 0f 40 cbz x4, 0f
44 ld1 {IN1.2d}, [x4] 41 ld1 {T1.2d}, [x4]
45 b 1f 42 b 1f
46 43
470: ld1 {IN1.2d}, [x2], #16 440: ld1 {T1.2d}, [x2], #16
48 sub w0, w0, #1 45 sub w0, w0, #1
491: ext IN1.16b, IN1.16b, IN1.16b, #8
50CPU_LE( rev64 IN1.16b, IN1.16b )
51 eor DATA.16b, DATA.16b, IN1.16b
52 46
53 /* multiply DATA by SHASH in GF(2^128) */ 471: /* multiply XL by SHASH in GF(2^128) */
54 ext T2.16b, DATA.16b, DATA.16b, #8 48CPU_LE( rev64 T1.16b, T1.16b )
55 ext T3.16b, SHASH.16b, SHASH.16b, #8
56 eor T2.16b, T2.16b, DATA.16b
57 eor T3.16b, T3.16b, SHASH.16b
58 49
59 pmull2 T1.1q, SHASH.2d, DATA.2d // a1 * b1 50 ext T2.16b, XL.16b, XL.16b, #8
60 pmull DATA.1q, SHASH.1d, DATA.1d // a0 * b0 51 ext IN1.16b, T1.16b, T1.16b, #8
61 pmull T2.1q, T2.1d, T3.1d // (a1 + a0)(b1 + b0) 52 eor T1.16b, T1.16b, T2.16b
62 eor T2.16b, T2.16b, T1.16b // (a0 * b1) + (a1 * b0) 53 eor XL.16b, XL.16b, IN1.16b
63 eor T2.16b, T2.16b, DATA.16b
64 54
65 ext T3.16b, VZR.16b, T2.16b, #8 55 pmull2 XH.1q, SHASH.2d, XL.2d // a1 * b1
66 ext T2.16b, T2.16b, VZR.16b, #8 56 eor T1.16b, T1.16b, XL.16b
67 eor DATA.16b, DATA.16b, T3.16b 57 pmull XL.1q, SHASH.1d, XL.1d // a0 * b0
68 eor T1.16b, T1.16b, T2.16b // <T1:DATA> is result of 58 pmull XM.1q, SHASH2.1d, T1.1d // (a1 + a0)(b1 + b0)
69 // carry-less multiplication
70 59
71 /* first phase of the reduction */ 60 ext T1.16b, XL.16b, XH.16b, #8
72 shl T3.2d, DATA.2d, #1 61 eor T2.16b, XL.16b, XH.16b
73 eor T3.16b, T3.16b, DATA.16b 62 eor XM.16b, XM.16b, T1.16b
74 shl T3.2d, T3.2d, #5 63 eor XM.16b, XM.16b, T2.16b
75 eor T3.16b, T3.16b, DATA.16b 64 pmull T2.1q, XL.1d, MASK.1d
76 shl T3.2d, T3.2d, #57
77 ext T2.16b, VZR.16b, T3.16b, #8
78 ext T3.16b, T3.16b, VZR.16b, #8
79 eor DATA.16b, DATA.16b, T2.16b
80 eor T1.16b, T1.16b, T3.16b
81 65
82 /* second phase of the reduction */ 66 mov XH.d[0], XM.d[1]
83 ushr T2.2d, DATA.2d, #5 67 mov XM.d[1], XL.d[0]
84 eor T2.16b, T2.16b, DATA.16b 68
85 ushr T2.2d, T2.2d, #1 69 eor XL.16b, XM.16b, T2.16b
86 eor T2.16b, T2.16b, DATA.16b 70 ext T2.16b, XL.16b, XL.16b, #8
87 ushr T2.2d, T2.2d, #1 71 pmull XL.1q, XL.1d, MASK.1d
88 eor T1.16b, T1.16b, T2.16b 72 eor T2.16b, T2.16b, XH.16b
89 eor DATA.16b, DATA.16b, T1.16b 73 eor XL.16b, XL.16b, T2.16b
90 74
91 cbnz w0, 0b 75 cbnz w0, 0b
92 76
93 st1 {DATA.16b}, [x1] 77 st1 {XL.16b}, [x1]
94 ret 78 ret
95ENDPROC(pmull_ghash_update) 79ENDPROC(pmull_ghash_update)
diff --git a/arch/arm64/crypto/ghash-ce-glue.c b/arch/arm64/crypto/ghash-ce-glue.c
index b92baf3f68c7..833ec1e3f3e9 100644
--- a/arch/arm64/crypto/ghash-ce-glue.c
+++ b/arch/arm64/crypto/ghash-ce-glue.c
@@ -67,11 +67,12 @@ static int ghash_update(struct shash_desc *desc, const u8 *src,
67 blocks = len / GHASH_BLOCK_SIZE; 67 blocks = len / GHASH_BLOCK_SIZE;
68 len %= GHASH_BLOCK_SIZE; 68 len %= GHASH_BLOCK_SIZE;
69 69
70 kernel_neon_begin_partial(6); 70 kernel_neon_begin_partial(8);
71 pmull_ghash_update(blocks, ctx->digest, src, key, 71 pmull_ghash_update(blocks, ctx->digest, src, key,
72 partial ? ctx->buf : NULL); 72 partial ? ctx->buf : NULL);
73 kernel_neon_end(); 73 kernel_neon_end();
74 src += blocks * GHASH_BLOCK_SIZE; 74 src += blocks * GHASH_BLOCK_SIZE;
75 partial = 0;
75 } 76 }
76 if (len) 77 if (len)
77 memcpy(ctx->buf + partial, src, len); 78 memcpy(ctx->buf + partial, src, len);
@@ -88,7 +89,7 @@ static int ghash_final(struct shash_desc *desc, u8 *dst)
88 89
89 memset(ctx->buf + partial, 0, GHASH_BLOCK_SIZE - partial); 90 memset(ctx->buf + partial, 0, GHASH_BLOCK_SIZE - partial);
90 91
91 kernel_neon_begin_partial(6); 92 kernel_neon_begin_partial(8);
92 pmull_ghash_update(1, ctx->digest, ctx->buf, key, NULL); 93 pmull_ghash_update(1, ctx->digest, ctx->buf, key, NULL);
93 kernel_neon_end(); 94 kernel_neon_end();
94 } 95 }
diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild
index 42c7eecd2bb6..0b3fcf86e6ba 100644
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@ -30,7 +30,6 @@ generic-y += msgbuf.h
30generic-y += mutex.h 30generic-y += mutex.h
31generic-y += pci.h 31generic-y += pci.h
32generic-y += poll.h 32generic-y += poll.h
33generic-y += posix_types.h
34generic-y += preempt.h 33generic-y += preempt.h
35generic-y += resource.h 34generic-y += resource.h
36generic-y += rwsem.h 35generic-y += rwsem.h
diff --git a/arch/arm64/include/asm/dma-mapping.h b/arch/arm64/include/asm/dma-mapping.h
index 3a4572ec3273..dc82e52acdb3 100644
--- a/arch/arm64/include/asm/dma-mapping.h
+++ b/arch/arm64/include/asm/dma-mapping.h
@@ -26,8 +26,6 @@
26#include <xen/xen.h> 26#include <xen/xen.h>
27#include <asm/xen/hypervisor.h> 27#include <asm/xen/hypervisor.h>
28 28
29#define ARCH_HAS_DMA_GET_REQUIRED_MASK
30
31#define DMA_ERROR_CODE (~(dma_addr_t)0) 29#define DMA_ERROR_CODE (~(dma_addr_t)0)
32extern struct dma_map_ops *dma_ops; 30extern struct dma_map_ops *dma_ops;
33extern struct dma_map_ops coherent_swiotlb_dma_ops; 31extern struct dma_map_ops coherent_swiotlb_dma_ops;
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 993bce527b85..902eb708804a 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -56,6 +56,8 @@
56#define TASK_SIZE_32 UL(0x100000000) 56#define TASK_SIZE_32 UL(0x100000000)
57#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ 57#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
58 TASK_SIZE_32 : TASK_SIZE_64) 58 TASK_SIZE_32 : TASK_SIZE_64)
59#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
60 TASK_SIZE_32 : TASK_SIZE_64)
59#else 61#else
60#define TASK_SIZE TASK_SIZE_64 62#define TASK_SIZE TASK_SIZE_64
61#endif /* CONFIG_COMPAT */ 63#endif /* CONFIG_COMPAT */
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 598cc384fc1c..e0ccceb317d9 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -246,7 +246,7 @@ static inline pmd_t pte_pmd(pte_t pte)
246#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) 246#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
247#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd))) 247#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
248#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) 248#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
249#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) &= ~PMD_TYPE_MASK)) 249#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
250 250
251#define __HAVE_ARCH_PMD_WRITE 251#define __HAVE_ARCH_PMD_WRITE
252#define pmd_write(pmd) pte_write(pmd_pte(pmd)) 252#define pmd_write(pmd) pte_write(pmd_pte(pmd))
@@ -292,7 +292,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
292#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ 292#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
293 PMD_TYPE_SECT) 293 PMD_TYPE_SECT)
294 294
295#ifdef ARM64_64K_PAGES 295#ifdef CONFIG_ARM64_64K_PAGES
296#define pud_sect(pud) (0) 296#define pud_sect(pud) (0)
297#else 297#else
298#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \ 298#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index a429b5940be2..501000fadb6f 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -21,6 +21,10 @@
21 21
22#include <uapi/asm/ptrace.h> 22#include <uapi/asm/ptrace.h>
23 23
24/* Current Exception Level values, as contained in CurrentEL */
25#define CurrentEL_EL1 (1 << 2)
26#define CurrentEL_EL2 (2 << 2)
27
24/* AArch32-specific ptrace requests */ 28/* AArch32-specific ptrace requests */
25#define COMPAT_PTRACE_GETREGS 12 29#define COMPAT_PTRACE_GETREGS 12
26#define COMPAT_PTRACE_SETREGS 13 30#define COMPAT_PTRACE_SETREGS 13
diff --git a/arch/arm64/include/uapi/asm/posix_types.h b/arch/arm64/include/uapi/asm/posix_types.h
new file mode 100644
index 000000000000..7985ff60ca3f
--- /dev/null
+++ b/arch/arm64/include/uapi/asm/posix_types.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_POSIX_TYPES_H
2#define __ASM_POSIX_TYPES_H
3
4typedef unsigned short __kernel_old_uid_t;
5typedef unsigned short __kernel_old_gid_t;
6#define __kernel_old_uid_t __kernel_old_uid_t
7
8#include <asm-generic/posix_types.h>
9
10#endif /* __ASM_POSIX_TYPES_H */
diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h
index b72cf405b3fe..ee469be1ae1d 100644
--- a/arch/arm64/include/uapi/asm/sigcontext.h
+++ b/arch/arm64/include/uapi/asm/sigcontext.h
@@ -58,7 +58,7 @@ struct fpsimd_context {
58 58
59struct esr_context { 59struct esr_context {
60 struct _aarch64_ctx head; 60 struct _aarch64_ctx head;
61 u64 esr; 61 __u64 esr;
62}; 62};
63 63
64#endif /* _UAPI__ASM_SIGCONTEXT_H */ 64#endif /* _UAPI__ASM_SIGCONTEXT_H */
diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 66716c9b9e5f..619b1dd7bcde 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -78,8 +78,7 @@ ENTRY(efi_stub_entry)
78 78
79 /* Turn off Dcache and MMU */ 79 /* Turn off Dcache and MMU */
80 mrs x0, CurrentEL 80 mrs x0, CurrentEL
81 cmp x0, #PSR_MODE_EL2t 81 cmp x0, #CurrentEL_EL2
82 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
83 b.ne 1f 82 b.ne 1f
84 mrs x0, sctlr_el2 83 mrs x0, sctlr_el2
85 bic x0, x0, #1 << 0 // clear SCTLR.M 84 bic x0, x0, #1 << 0 // clear SCTLR.M
diff --git a/arch/arm64/kernel/efi-stub.c b/arch/arm64/kernel/efi-stub.c
index 60e98a639ac5..e786e6cdc400 100644
--- a/arch/arm64/kernel/efi-stub.c
+++ b/arch/arm64/kernel/efi-stub.c
@@ -12,8 +12,6 @@
12#include <linux/efi.h> 12#include <linux/efi.h>
13#include <linux/libfdt.h> 13#include <linux/libfdt.h>
14#include <asm/sections.h> 14#include <asm/sections.h>
15#include <generated/compile.h>
16#include <generated/utsrelease.h>
17 15
18/* 16/*
19 * AArch64 requires the DTB to be 8-byte aligned in the first 512MiB from 17 * AArch64 requires the DTB to be 8-byte aligned in the first 512MiB from
diff --git a/arch/arm64/kernel/entry-ftrace.S b/arch/arm64/kernel/entry-ftrace.S
index b051871f2965..aa5f9fcbf9ee 100644
--- a/arch/arm64/kernel/entry-ftrace.S
+++ b/arch/arm64/kernel/entry-ftrace.S
@@ -205,7 +205,7 @@ ENDPROC(ftrace_graph_caller)
205 * 205 *
206 * Run ftrace_return_to_handler() before going back to parent. 206 * Run ftrace_return_to_handler() before going back to parent.
207 * @fp is checked against the value passed by ftrace_graph_caller() 207 * @fp is checked against the value passed by ftrace_graph_caller()
208 * only when CONFIG_FUNCTION_GRAPH_FP_TEST is enabled. 208 * only when CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST is enabled.
209 */ 209 */
210ENTRY(return_to_handler) 210ENTRY(return_to_handler)
211 str x0, [sp, #-16]! 211 str x0, [sp, #-16]!
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index bf017f4ffb4f..9ce04ba6bcb0 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -279,7 +279,6 @@ el1_sp_pc:
279 */ 279 */
280 mrs x0, far_el1 280 mrs x0, far_el1
281 enable_dbg 281 enable_dbg
282 mov x1, x25
283 mov x2, sp 282 mov x2, sp
284 b do_sp_pc_abort 283 b do_sp_pc_abort
285el1_undef: 284el1_undef:
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index a96d3a6a63f6..a2c1195abb7f 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -270,8 +270,7 @@ ENDPROC(stext)
270 */ 270 */
271ENTRY(el2_setup) 271ENTRY(el2_setup)
272 mrs x0, CurrentEL 272 mrs x0, CurrentEL
273 cmp x0, #PSR_MODE_EL2t 273 cmp x0, #CurrentEL_EL2
274 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
275 b.ne 1f 274 b.ne 1f
276 mrs x0, sctlr_el2 275 mrs x0, sctlr_el2
277CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2 276CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index 3e926b9c0641..9fde010c945f 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -655,11 +655,16 @@ static int compat_gpr_get(struct task_struct *target,
655 reg = task_pt_regs(target)->regs[idx]; 655 reg = task_pt_regs(target)->regs[idx];
656 } 656 }
657 657
658 ret = copy_to_user(ubuf, &reg, sizeof(reg)); 658 if (kbuf) {
659 if (ret) 659 memcpy(kbuf, &reg, sizeof(reg));
660 break; 660 kbuf += sizeof(reg);
661 661 } else {
662 ubuf += sizeof(reg); 662 ret = copy_to_user(ubuf, &reg, sizeof(reg));
663 if (ret)
664 break;
665
666 ubuf += sizeof(reg);
667 }
663 } 668 }
664 669
665 return ret; 670 return ret;
@@ -689,11 +694,16 @@ static int compat_gpr_set(struct task_struct *target,
689 unsigned int idx = start + i; 694 unsigned int idx = start + i;
690 compat_ulong_t reg; 695 compat_ulong_t reg;
691 696
692 ret = copy_from_user(&reg, ubuf, sizeof(reg)); 697 if (kbuf) {
693 if (ret) 698 memcpy(&reg, kbuf, sizeof(reg));
694 return ret; 699 kbuf += sizeof(reg);
700 } else {
701 ret = copy_from_user(&reg, ubuf, sizeof(reg));
702 if (ret)
703 return ret;
695 704
696 ubuf += sizeof(reg); 705 ubuf += sizeof(reg);
706 }
697 707
698 switch (idx) { 708 switch (idx) {
699 case 15: 709 case 15:
@@ -827,6 +837,7 @@ static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
827 compat_ulong_t val) 837 compat_ulong_t val)
828{ 838{
829 int ret; 839 int ret;
840 mm_segment_t old_fs = get_fs();
830 841
831 if (off & 3 || off >= COMPAT_USER_SZ) 842 if (off & 3 || off >= COMPAT_USER_SZ)
832 return -EIO; 843 return -EIO;
@@ -834,10 +845,13 @@ static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
834 if (off >= sizeof(compat_elf_gregset_t)) 845 if (off >= sizeof(compat_elf_gregset_t))
835 return 0; 846 return 0;
836 847
848 set_fs(KERNEL_DS);
837 ret = copy_regset_from_user(tsk, &user_aarch32_view, 849 ret = copy_regset_from_user(tsk, &user_aarch32_view,
838 REGSET_COMPAT_GPR, off, 850 REGSET_COMPAT_GPR, off,
839 sizeof(compat_ulong_t), 851 sizeof(compat_ulong_t),
840 &val); 852 &val);
853 set_fs(old_fs);
854
841 return ret; 855 return ret;
842} 856}
843 857
diff --git a/arch/arm64/mm/copypage.c b/arch/arm64/mm/copypage.c
index 9aecbace4128..13bbc3be6f5a 100644
--- a/arch/arm64/mm/copypage.c
+++ b/arch/arm64/mm/copypage.c
@@ -27,8 +27,10 @@ void __cpu_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
27 copy_page(kto, kfrom); 27 copy_page(kto, kfrom);
28 __flush_dcache_area(kto, PAGE_SIZE); 28 __flush_dcache_area(kto, PAGE_SIZE);
29} 29}
30EXPORT_SYMBOL_GPL(__cpu_copy_user_page);
30 31
31void __cpu_clear_user_page(void *kaddr, unsigned long vaddr) 32void __cpu_clear_user_page(void *kaddr, unsigned long vaddr)
32{ 33{
33 clear_page(kaddr); 34 clear_page(kaddr);
34} 35}
36EXPORT_SYMBOL_GPL(__cpu_clear_user_page);
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index e4193e3adc7f..0d64089d28b5 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -79,7 +79,8 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
79 return; 79 return;
80 80
81 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) { 81 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
82 __flush_dcache_area(page_address(page), PAGE_SIZE); 82 __flush_dcache_area(page_address(page),
83 PAGE_SIZE << compound_order(page));
83 __flush_icache_all(); 84 __flush_icache_all();
84 } else if (icache_is_aivivt()) { 85 } else if (icache_is_aivivt()) {
85 __flush_icache_all(); 86 __flush_icache_all();
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 091d428d64ac..e90c5426fe14 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -60,6 +60,17 @@ static int __init early_initrd(char *p)
60early_param("initrd", early_initrd); 60early_param("initrd", early_initrd);
61#endif 61#endif
62 62
63/*
64 * Return the maximum physical address for ZONE_DMA (DMA_BIT_MASK(32)). It
65 * currently assumes that for memory starting above 4G, 32-bit devices will
66 * use a DMA offset.
67 */
68static phys_addr_t max_zone_dma_phys(void)
69{
70 phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32);
71 return min(offset + (1ULL << 32), memblock_end_of_DRAM());
72}
73
63static void __init zone_sizes_init(unsigned long min, unsigned long max) 74static void __init zone_sizes_init(unsigned long min, unsigned long max)
64{ 75{
65 struct memblock_region *reg; 76 struct memblock_region *reg;
@@ -70,9 +81,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
70 81
71 /* 4GB maximum for 32-bit only capable devices */ 82 /* 4GB maximum for 32-bit only capable devices */
72 if (IS_ENABLED(CONFIG_ZONE_DMA)) { 83 if (IS_ENABLED(CONFIG_ZONE_DMA)) {
73 unsigned long max_dma_phys = 84 max_dma = PFN_DOWN(max_zone_dma_phys());
74 (unsigned long)dma_to_phys(NULL, DMA_BIT_MASK(32) + 1);
75 max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT));
76 zone_size[ZONE_DMA] = max_dma - min; 85 zone_size[ZONE_DMA] = max_dma - min;
77 } 86 }
78 zone_size[ZONE_NORMAL] = max - max_dma; 87 zone_size[ZONE_NORMAL] = max - max_dma;
@@ -126,6 +135,8 @@ static void arm64_memory_present(void)
126 135
127void __init arm64_memblock_init(void) 136void __init arm64_memblock_init(void)
128{ 137{
138 phys_addr_t dma_phys_limit = 0;
139
129 /* Register the kernel text, kernel data and initrd with memblock */ 140 /* Register the kernel text, kernel data and initrd with memblock */
130 memblock_reserve(__pa(_text), _end - _text); 141 memblock_reserve(__pa(_text), _end - _text);
131#ifdef CONFIG_BLK_DEV_INITRD 142#ifdef CONFIG_BLK_DEV_INITRD
@@ -141,7 +152,11 @@ void __init arm64_memblock_init(void)
141 memblock_reserve(__pa(idmap_pg_dir), IDMAP_DIR_SIZE); 152 memblock_reserve(__pa(idmap_pg_dir), IDMAP_DIR_SIZE);
142 153
143 early_init_fdt_scan_reserved_mem(); 154 early_init_fdt_scan_reserved_mem();
144 dma_contiguous_reserve(0); 155
156 /* 4GB maximum for 32-bit only capable devices */
157 if (IS_ENABLED(CONFIG_ZONE_DMA))
158 dma_phys_limit = max_zone_dma_phys();
159 dma_contiguous_reserve(dma_phys_limit);
145 160
146 memblock_allow_resize(); 161 memblock_allow_resize();
147 memblock_dump_all(); 162 memblock_dump_all();
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 13:30:40 -0500