1 files changed, 20 insertions, 4 deletions

diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index c46f48b33c14..fda756875fa6 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -168,6 +168,14 @@ ENTRY(__flush_dcache_area)
 ENDPROC(__flush_dcache_area)
 
 /*
+ *      __inval_cache_range(start, end)
+ *      - start   - start address of region
+ *      - end     - end address of region
+ */
+ENTRY(__inval_cache_range)
+        /* FALLTHROUGH */
+
+/*
  *      __dma_inv_range(start, end)
  *      - start   - virtual start address of region
  *      - end     - virtual end address of region
@@ -175,14 +183,22 @@ ENDPROC(__flush_dcache_area)
 __dma_inv_range:
         dcache_line_size x2, x3
         sub     x3, x2, #1
-        bic     x0, x0, x3
+        tst     x1, x3                          // end cache line aligned?
         bic     x1, x1, x3
-1:      dc      ivac, x0                        // invalidate D / U line
-        add     x0, x0, x2
+        b.eq    1f
+        dc      civac, x1                       // clean & invalidate D / U line
+1:      tst     x0, x3                          // start cache line aligned?
+        bic     x0, x0, x3
+        b.eq    2f
+        dc      civac, x0                       // clean & invalidate D / U line
+        b       3f
+2:      dc      ivac, x0                        // invalidate D / U line
+3:      add     x0, x0, x2
         cmp     x0, x1
-        b.lo    1b
+        b.lo    2b
         dsb     sy
         ret
+ENDPROC(__inval_cache_range)
 ENDPROC(__dma_inv_range)
 
 /*