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-rw-r--r--arch/arm64/kvm/hyp.S12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 2c56012cb2d2..b0d1512acf08 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -630,9 +630,15 @@ ENTRY(__kvm_tlb_flush_vmid_ipa)
630 * whole of Stage-1. Weep... 630 * whole of Stage-1. Weep...
631 */ 631 */
632 tlbi ipas2e1is, x1 632 tlbi ipas2e1is, x1
633 dsb sy 633 /*
634 * We have to ensure completion of the invalidation at Stage-2,
635 * since a table walk on another CPU could refill a TLB with a
636 * complete (S1 + S2) walk based on the old Stage-2 mapping if
637 * the Stage-1 invalidation happened first.
638 */
639 dsb ish
634 tlbi vmalle1is 640 tlbi vmalle1is
635 dsb sy 641 dsb ish
636 isb 642 isb
637 643
638 msr vttbr_el2, xzr 644 msr vttbr_el2, xzr
@@ -643,7 +649,7 @@ ENTRY(__kvm_flush_vm_context)
643 dsb ishst 649 dsb ishst
644 tlbi alle1is 650 tlbi alle1is
645 ic ialluis 651 ic ialluis
646 dsb sy 652 dsb ish
647 ret 653 ret
648ENDPROC(__kvm_flush_vm_context) 654ENDPROC(__kvm_flush_vm_context)
649 655