diff options
Diffstat (limited to 'arch/arm64/kernel/hw_breakpoint.c')
-rw-r--r-- | arch/arm64/kernel/hw_breakpoint.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index 329218ca9ffb..ff516f6691e4 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c | |||
@@ -184,14 +184,14 @@ int arch_install_hw_breakpoint(struct perf_event *bp) | |||
184 | /* Breakpoint */ | 184 | /* Breakpoint */ |
185 | ctrl_reg = AARCH64_DBG_REG_BCR; | 185 | ctrl_reg = AARCH64_DBG_REG_BCR; |
186 | val_reg = AARCH64_DBG_REG_BVR; | 186 | val_reg = AARCH64_DBG_REG_BVR; |
187 | slots = __get_cpu_var(bp_on_reg); | 187 | slots = this_cpu_ptr(bp_on_reg); |
188 | max_slots = core_num_brps; | 188 | max_slots = core_num_brps; |
189 | reg_enable = !debug_info->bps_disabled; | 189 | reg_enable = !debug_info->bps_disabled; |
190 | } else { | 190 | } else { |
191 | /* Watchpoint */ | 191 | /* Watchpoint */ |
192 | ctrl_reg = AARCH64_DBG_REG_WCR; | 192 | ctrl_reg = AARCH64_DBG_REG_WCR; |
193 | val_reg = AARCH64_DBG_REG_WVR; | 193 | val_reg = AARCH64_DBG_REG_WVR; |
194 | slots = __get_cpu_var(wp_on_reg); | 194 | slots = this_cpu_ptr(wp_on_reg); |
195 | max_slots = core_num_wrps; | 195 | max_slots = core_num_wrps; |
196 | reg_enable = !debug_info->wps_disabled; | 196 | reg_enable = !debug_info->wps_disabled; |
197 | } | 197 | } |
@@ -230,12 +230,12 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp) | |||
230 | if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { | 230 | if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { |
231 | /* Breakpoint */ | 231 | /* Breakpoint */ |
232 | base = AARCH64_DBG_REG_BCR; | 232 | base = AARCH64_DBG_REG_BCR; |
233 | slots = __get_cpu_var(bp_on_reg); | 233 | slots = this_cpu_ptr(bp_on_reg); |
234 | max_slots = core_num_brps; | 234 | max_slots = core_num_brps; |
235 | } else { | 235 | } else { |
236 | /* Watchpoint */ | 236 | /* Watchpoint */ |
237 | base = AARCH64_DBG_REG_WCR; | 237 | base = AARCH64_DBG_REG_WCR; |
238 | slots = __get_cpu_var(wp_on_reg); | 238 | slots = this_cpu_ptr(wp_on_reg); |
239 | max_slots = core_num_wrps; | 239 | max_slots = core_num_wrps; |
240 | } | 240 | } |
241 | 241 | ||
@@ -505,11 +505,11 @@ static void toggle_bp_registers(int reg, enum debug_el el, int enable) | |||
505 | 505 | ||
506 | switch (reg) { | 506 | switch (reg) { |
507 | case AARCH64_DBG_REG_BCR: | 507 | case AARCH64_DBG_REG_BCR: |
508 | slots = __get_cpu_var(bp_on_reg); | 508 | slots = this_cpu_ptr(bp_on_reg); |
509 | max_slots = core_num_brps; | 509 | max_slots = core_num_brps; |
510 | break; | 510 | break; |
511 | case AARCH64_DBG_REG_WCR: | 511 | case AARCH64_DBG_REG_WCR: |
512 | slots = __get_cpu_var(wp_on_reg); | 512 | slots = this_cpu_ptr(wp_on_reg); |
513 | max_slots = core_num_wrps; | 513 | max_slots = core_num_wrps; |
514 | break; | 514 | break; |
515 | default: | 515 | default: |
@@ -546,7 +546,7 @@ static int breakpoint_handler(unsigned long unused, unsigned int esr, | |||
546 | struct debug_info *debug_info; | 546 | struct debug_info *debug_info; |
547 | struct arch_hw_breakpoint_ctrl ctrl; | 547 | struct arch_hw_breakpoint_ctrl ctrl; |
548 | 548 | ||
549 | slots = (struct perf_event **)__get_cpu_var(bp_on_reg); | 549 | slots = this_cpu_ptr(bp_on_reg); |
550 | addr = instruction_pointer(regs); | 550 | addr = instruction_pointer(regs); |
551 | debug_info = ¤t->thread.debug; | 551 | debug_info = ¤t->thread.debug; |
552 | 552 | ||
@@ -596,7 +596,7 @@ unlock: | |||
596 | user_enable_single_step(current); | 596 | user_enable_single_step(current); |
597 | } else { | 597 | } else { |
598 | toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL1, 0); | 598 | toggle_bp_registers(AARCH64_DBG_REG_BCR, DBG_ACTIVE_EL1, 0); |
599 | kernel_step = &__get_cpu_var(stepping_kernel_bp); | 599 | kernel_step = this_cpu_ptr(&stepping_kernel_bp); |
600 | 600 | ||
601 | if (*kernel_step != ARM_KERNEL_STEP_NONE) | 601 | if (*kernel_step != ARM_KERNEL_STEP_NONE) |
602 | return 0; | 602 | return 0; |
@@ -623,7 +623,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, | |||
623 | struct arch_hw_breakpoint *info; | 623 | struct arch_hw_breakpoint *info; |
624 | struct arch_hw_breakpoint_ctrl ctrl; | 624 | struct arch_hw_breakpoint_ctrl ctrl; |
625 | 625 | ||
626 | slots = (struct perf_event **)__get_cpu_var(wp_on_reg); | 626 | slots = this_cpu_ptr(wp_on_reg); |
627 | debug_info = ¤t->thread.debug; | 627 | debug_info = ¤t->thread.debug; |
628 | 628 | ||
629 | for (i = 0; i < core_num_wrps; ++i) { | 629 | for (i = 0; i < core_num_wrps; ++i) { |
@@ -698,7 +698,7 @@ unlock: | |||
698 | user_enable_single_step(current); | 698 | user_enable_single_step(current); |
699 | } else { | 699 | } else { |
700 | toggle_bp_registers(AARCH64_DBG_REG_WCR, DBG_ACTIVE_EL1, 0); | 700 | toggle_bp_registers(AARCH64_DBG_REG_WCR, DBG_ACTIVE_EL1, 0); |
701 | kernel_step = &__get_cpu_var(stepping_kernel_bp); | 701 | kernel_step = this_cpu_ptr(&stepping_kernel_bp); |
702 | 702 | ||
703 | if (*kernel_step != ARM_KERNEL_STEP_NONE) | 703 | if (*kernel_step != ARM_KERNEL_STEP_NONE) |
704 | return 0; | 704 | return 0; |
@@ -722,7 +722,7 @@ int reinstall_suspended_bps(struct pt_regs *regs) | |||
722 | struct debug_info *debug_info = ¤t->thread.debug; | 722 | struct debug_info *debug_info = ¤t->thread.debug; |
723 | int handled_exception = 0, *kernel_step; | 723 | int handled_exception = 0, *kernel_step; |
724 | 724 | ||
725 | kernel_step = &__get_cpu_var(stepping_kernel_bp); | 725 | kernel_step = this_cpu_ptr(&stepping_kernel_bp); |
726 | 726 | ||
727 | /* | 727 | /* |
728 | * Called from single-step exception handler. | 728 | * Called from single-step exception handler. |