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-rw-r--r--arch/arm64/include/asm/arch_timer.h133
-rw-r--r--arch/arm64/include/asm/arm_generic.h100
2 files changed, 133 insertions, 100 deletions
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
new file mode 100644
index 000000000000..91e2a6a6fcd4
--- /dev/null
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -0,0 +1,133 @@
1/*
2 * arch/arm64/include/asm/arch_timer.h
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#ifndef __ASM_ARCH_TIMER_H
20#define __ASM_ARCH_TIMER_H
21
22#include <asm/barrier.h>
23
24#include <linux/init.h>
25#include <linux/types.h>
26
27#include <clocksource/arm_arch_timer.h>
28
29static inline void arch_timer_reg_write(int access, int reg, u32 val)
30{
31 if (access == ARCH_TIMER_PHYS_ACCESS) {
32 switch (reg) {
33 case ARCH_TIMER_REG_CTRL:
34 asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
35 break;
36 case ARCH_TIMER_REG_TVAL:
37 asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
38 break;
39 default:
40 BUILD_BUG();
41 }
42 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
43 switch (reg) {
44 case ARCH_TIMER_REG_CTRL:
45 asm volatile("msr cntv_ctl_el0, %0" : : "r" (val));
46 break;
47 case ARCH_TIMER_REG_TVAL:
48 asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
49 break;
50 default:
51 BUILD_BUG();
52 }
53 } else {
54 BUILD_BUG();
55 }
56
57 isb();
58}
59
60static inline u32 arch_timer_reg_read(int access, int reg)
61{
62 u32 val;
63
64 if (access == ARCH_TIMER_PHYS_ACCESS) {
65 switch (reg) {
66 case ARCH_TIMER_REG_CTRL:
67 asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
68 break;
69 case ARCH_TIMER_REG_TVAL:
70 asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
71 break;
72 default:
73 BUILD_BUG();
74 }
75 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
76 switch (reg) {
77 case ARCH_TIMER_REG_CTRL:
78 asm volatile("mrs %0, cntv_ctl_el0" : "=r" (val));
79 break;
80 case ARCH_TIMER_REG_TVAL:
81 asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
82 break;
83 default:
84 BUILD_BUG();
85 }
86 } else {
87 BUILD_BUG();
88 }
89
90 return val;
91}
92
93static inline u32 arch_timer_get_cntfrq(void)
94{
95 u32 val;
96 asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
97 return val;
98}
99
100static inline void __cpuinit arch_counter_set_user_access(void)
101{
102 u32 cntkctl;
103
104 /* Disable user access to the timers and the physical counter. */
105 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
106 cntkctl &= ~((3 << 8) | (1 << 0));
107
108 /* Enable user access to the virtual counter and frequency. */
109 cntkctl |= (1 << 1);
110 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
111}
112
113static inline u64 arch_counter_get_cntpct(void)
114{
115 u64 cval;
116
117 isb();
118 asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
119
120 return cval;
121}
122
123static inline u64 arch_counter_get_cntvct(void)
124{
125 u64 cval;
126
127 isb();
128 asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
129
130 return cval;
131}
132
133#endif
diff --git a/arch/arm64/include/asm/arm_generic.h b/arch/arm64/include/asm/arm_generic.h
deleted file mode 100644
index df2aeb82f74e..000000000000
--- a/arch/arm64/include/asm/arm_generic.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * arch/arm64/include/asm/arm_generic.h
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#ifndef __ASM_ARM_GENERIC_H
20#define __ASM_ARM_GENERIC_H
21
22#include <linux/clocksource.h>
23
24#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
25#define ARCH_TIMER_CTRL_IMASK (1 << 1)
26#define ARCH_TIMER_CTRL_ISTATUS (1 << 2)
27
28#define ARCH_TIMER_REG_CTRL 0
29#define ARCH_TIMER_REG_FREQ 1
30#define ARCH_TIMER_REG_TVAL 2
31
32static inline void arch_timer_reg_write(int reg, u32 val)
33{
34 switch (reg) {
35 case ARCH_TIMER_REG_CTRL:
36 asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
37 break;
38 case ARCH_TIMER_REG_TVAL:
39 asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
40 break;
41 default:
42 BUILD_BUG();
43 }
44
45 isb();
46}
47
48static inline u32 arch_timer_reg_read(int reg)
49{
50 u32 val;
51
52 switch (reg) {
53 case ARCH_TIMER_REG_CTRL:
54 asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
55 break;
56 case ARCH_TIMER_REG_FREQ:
57 asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
58 break;
59 case ARCH_TIMER_REG_TVAL:
60 asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
61 break;
62 default:
63 BUILD_BUG();
64 }
65
66 return val;
67}
68
69static inline void __cpuinit arch_counter_enable_user_access(void)
70{
71 u32 cntkctl;
72
73 /* Disable user access to the timers and the physical counter. */
74 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
75 cntkctl &= ~((3 << 8) | (1 << 0));
76
77 /* Enable user access to the virtual counter and frequency. */
78 cntkctl |= (1 << 1);
79 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
80}
81
82static inline cycle_t arch_counter_get_cntpct(void)
83{
84 cycle_t cval;
85
86 asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
87
88 return cval;
89}
90
91static inline cycle_t arch_counter_get_cntvct(void)
92{
93 cycle_t cval;
94
95 asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
96
97 return cval;
98}
99
100#endif
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