diff options
Diffstat (limited to 'arch/arm64/include/asm/kvm_mmu.h')
-rw-r--r-- | arch/arm64/include/asm/kvm_mmu.h | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 7f1f9408ff66..7d29847a893b 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h | |||
@@ -106,7 +106,6 @@ static inline bool kvm_is_write_fault(unsigned long esr) | |||
106 | return true; | 106 | return true; |
107 | } | 107 | } |
108 | 108 | ||
109 | static inline void kvm_clean_dcache_area(void *addr, size_t size) {} | ||
110 | static inline void kvm_clean_pgd(pgd_t *pgd) {} | 109 | static inline void kvm_clean_pgd(pgd_t *pgd) {} |
111 | static inline void kvm_clean_pmd_entry(pmd_t *pmd) {} | 110 | static inline void kvm_clean_pmd_entry(pmd_t *pmd) {} |
112 | static inline void kvm_clean_pte(pte_t *pte) {} | 111 | static inline void kvm_clean_pte(pte_t *pte) {} |
@@ -122,11 +121,25 @@ static inline void kvm_set_s2pmd_writable(pmd_t *pmd) | |||
122 | pmd_val(*pmd) |= PMD_S2_RDWR; | 121 | pmd_val(*pmd) |= PMD_S2_RDWR; |
123 | } | 122 | } |
124 | 123 | ||
124 | #define kvm_pgd_addr_end(addr, end) pgd_addr_end(addr, end) | ||
125 | #define kvm_pud_addr_end(addr, end) pud_addr_end(addr, end) | ||
126 | #define kvm_pmd_addr_end(addr, end) pmd_addr_end(addr, end) | ||
127 | |||
125 | struct kvm; | 128 | struct kvm; |
126 | 129 | ||
127 | static inline void coherent_icache_guest_page(struct kvm *kvm, hva_t hva, | 130 | #define kvm_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l)) |
128 | unsigned long size) | 131 | |
132 | static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu) | ||
129 | { | 133 | { |
134 | return (vcpu_sys_reg(vcpu, SCTLR_EL1) & 0b101) == 0b101; | ||
135 | } | ||
136 | |||
137 | static inline void coherent_cache_guest_page(struct kvm_vcpu *vcpu, hva_t hva, | ||
138 | unsigned long size) | ||
139 | { | ||
140 | if (!vcpu_has_cache_enabled(vcpu)) | ||
141 | kvm_flush_dcache_to_poc((void *)hva, size); | ||
142 | |||
130 | if (!icache_is_aliasing()) { /* PIPT */ | 143 | if (!icache_is_aliasing()) { /* PIPT */ |
131 | flush_icache_range(hva, hva + size); | 144 | flush_icache_range(hva, hva + size); |
132 | } else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */ | 145 | } else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */ |
@@ -135,8 +148,9 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, hva_t hva, | |||
135 | } | 148 | } |
136 | } | 149 | } |
137 | 150 | ||
138 | #define kvm_flush_dcache_to_poc(a,l) __flush_dcache_area((a), (l)) | ||
139 | #define kvm_virt_to_phys(x) __virt_to_phys((unsigned long)(x)) | 151 | #define kvm_virt_to_phys(x) __virt_to_phys((unsigned long)(x)) |
140 | 152 | ||
153 | void stage2_flush_vm(struct kvm *kvm); | ||
154 | |||
141 | #endif /* __ASSEMBLY__ */ | 155 | #endif /* __ASSEMBLY__ */ |
142 | #endif /* __ARM64_KVM_MMU_H__ */ | 156 | #endif /* __ARM64_KVM_MMU_H__ */ |