diff options
Diffstat (limited to 'arch/arm64/include/asm/io.h')
-rw-r--r-- | arch/arm64/include/asm/io.h | 122 |
1 files changed, 25 insertions, 97 deletions
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 75825b63464d..949c406d4df4 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h | |||
@@ -36,26 +36,31 @@ | |||
36 | /* | 36 | /* |
37 | * Generic IO read/write. These perform native-endian accesses. | 37 | * Generic IO read/write. These perform native-endian accesses. |
38 | */ | 38 | */ |
39 | #define __raw_writeb __raw_writeb | ||
39 | static inline void __raw_writeb(u8 val, volatile void __iomem *addr) | 40 | static inline void __raw_writeb(u8 val, volatile void __iomem *addr) |
40 | { | 41 | { |
41 | asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr)); | 42 | asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr)); |
42 | } | 43 | } |
43 | 44 | ||
45 | #define __raw_writew __raw_writew | ||
44 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) | 46 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) |
45 | { | 47 | { |
46 | asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr)); | 48 | asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr)); |
47 | } | 49 | } |
48 | 50 | ||
51 | #define __raw_writel __raw_writel | ||
49 | static inline void __raw_writel(u32 val, volatile void __iomem *addr) | 52 | static inline void __raw_writel(u32 val, volatile void __iomem *addr) |
50 | { | 53 | { |
51 | asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr)); | 54 | asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr)); |
52 | } | 55 | } |
53 | 56 | ||
57 | #define __raw_writeq __raw_writeq | ||
54 | static inline void __raw_writeq(u64 val, volatile void __iomem *addr) | 58 | static inline void __raw_writeq(u64 val, volatile void __iomem *addr) |
55 | { | 59 | { |
56 | asm volatile("str %0, [%1]" : : "r" (val), "r" (addr)); | 60 | asm volatile("str %0, [%1]" : : "r" (val), "r" (addr)); |
57 | } | 61 | } |
58 | 62 | ||
63 | #define __raw_readb __raw_readb | ||
59 | static inline u8 __raw_readb(const volatile void __iomem *addr) | 64 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
60 | { | 65 | { |
61 | u8 val; | 66 | u8 val; |
@@ -66,6 +71,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr) | |||
66 | return val; | 71 | return val; |
67 | } | 72 | } |
68 | 73 | ||
74 | #define __raw_readw __raw_readw | ||
69 | static inline u16 __raw_readw(const volatile void __iomem *addr) | 75 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
70 | { | 76 | { |
71 | u16 val; | 77 | u16 val; |
@@ -77,6 +83,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) | |||
77 | return val; | 83 | return val; |
78 | } | 84 | } |
79 | 85 | ||
86 | #define __raw_readl __raw_readl | ||
80 | static inline u32 __raw_readl(const volatile void __iomem *addr) | 87 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
81 | { | 88 | { |
82 | u32 val; | 89 | u32 val; |
@@ -87,6 +94,7 @@ static inline u32 __raw_readl(const volatile void __iomem *addr) | |||
87 | return val; | 94 | return val; |
88 | } | 95 | } |
89 | 96 | ||
97 | #define __raw_readq __raw_readq | ||
90 | static inline u64 __raw_readq(const volatile void __iomem *addr) | 98 | static inline u64 __raw_readq(const volatile void __iomem *addr) |
91 | { | 99 | { |
92 | u64 val; | 100 | u64 val; |
@@ -140,94 +148,6 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) | |||
140 | #define IO_SPACE_LIMIT (SZ_32M - 1) | 148 | #define IO_SPACE_LIMIT (SZ_32M - 1) |
141 | #define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M)) | 149 | #define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M)) |
142 | 150 | ||
143 | static inline u8 inb(unsigned long addr) | ||
144 | { | ||
145 | return readb(addr + PCI_IOBASE); | ||
146 | } | ||
147 | |||
148 | static inline u16 inw(unsigned long addr) | ||
149 | { | ||
150 | return readw(addr + PCI_IOBASE); | ||
151 | } | ||
152 | |||
153 | static inline u32 inl(unsigned long addr) | ||
154 | { | ||
155 | return readl(addr + PCI_IOBASE); | ||
156 | } | ||
157 | |||
158 | static inline void outb(u8 b, unsigned long addr) | ||
159 | { | ||
160 | writeb(b, addr + PCI_IOBASE); | ||
161 | } | ||
162 | |||
163 | static inline void outw(u16 b, unsigned long addr) | ||
164 | { | ||
165 | writew(b, addr + PCI_IOBASE); | ||
166 | } | ||
167 | |||
168 | static inline void outl(u32 b, unsigned long addr) | ||
169 | { | ||
170 | writel(b, addr + PCI_IOBASE); | ||
171 | } | ||
172 | |||
173 | #define inb_p(addr) inb(addr) | ||
174 | #define inw_p(addr) inw(addr) | ||
175 | #define inl_p(addr) inl(addr) | ||
176 | |||
177 | #define outb_p(x, addr) outb((x), (addr)) | ||
178 | #define outw_p(x, addr) outw((x), (addr)) | ||
179 | #define outl_p(x, addr) outl((x), (addr)) | ||
180 | |||
181 | static inline void insb(unsigned long addr, void *buffer, int count) | ||
182 | { | ||
183 | u8 *buf = buffer; | ||
184 | while (count--) | ||
185 | *buf++ = __raw_readb(addr + PCI_IOBASE); | ||
186 | } | ||
187 | |||
188 | static inline void insw(unsigned long addr, void *buffer, int count) | ||
189 | { | ||
190 | u16 *buf = buffer; | ||
191 | while (count--) | ||
192 | *buf++ = __raw_readw(addr + PCI_IOBASE); | ||
193 | } | ||
194 | |||
195 | static inline void insl(unsigned long addr, void *buffer, int count) | ||
196 | { | ||
197 | u32 *buf = buffer; | ||
198 | while (count--) | ||
199 | *buf++ = __raw_readl(addr + PCI_IOBASE); | ||
200 | } | ||
201 | |||
202 | static inline void outsb(unsigned long addr, const void *buffer, int count) | ||
203 | { | ||
204 | const u8 *buf = buffer; | ||
205 | while (count--) | ||
206 | __raw_writeb(*buf++, addr + PCI_IOBASE); | ||
207 | } | ||
208 | |||
209 | static inline void outsw(unsigned long addr, const void *buffer, int count) | ||
210 | { | ||
211 | const u16 *buf = buffer; | ||
212 | while (count--) | ||
213 | __raw_writew(*buf++, addr + PCI_IOBASE); | ||
214 | } | ||
215 | |||
216 | static inline void outsl(unsigned long addr, const void *buffer, int count) | ||
217 | { | ||
218 | const u32 *buf = buffer; | ||
219 | while (count--) | ||
220 | __raw_writel(*buf++, addr + PCI_IOBASE); | ||
221 | } | ||
222 | |||
223 | #define insb_p(port,to,len) insb(port,to,len) | ||
224 | #define insw_p(port,to,len) insw(port,to,len) | ||
225 | #define insl_p(port,to,len) insl(port,to,len) | ||
226 | |||
227 | #define outsb_p(port,from,len) outsb(port,from,len) | ||
228 | #define outsw_p(port,from,len) outsw(port,from,len) | ||
229 | #define outsl_p(port,from,len) outsl(port,from,len) | ||
230 | |||
231 | /* | 151 | /* |
232 | * String version of I/O memory access operations. | 152 | * String version of I/O memory access operations. |
233 | */ | 153 | */ |
@@ -251,18 +171,14 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); | |||
251 | #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) | 171 | #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) |
252 | #define iounmap __iounmap | 172 | #define iounmap __iounmap |
253 | 173 | ||
254 | #define ARCH_HAS_IOREMAP_WC | ||
255 | #include <asm-generic/iomap.h> | ||
256 | |||
257 | /* | 174 | /* |
258 | * More restrictive address range checking than the default implementation | 175 | * io{read,write}{16,32}be() macros |
259 | * (PHYS_OFFSET and PHYS_MASK taken into account). | ||
260 | */ | 176 | */ |
261 | #define ARCH_HAS_VALID_PHYS_ADDR_RANGE | 177 | #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) |
262 | extern int valid_phys_addr_range(phys_addr_t addr, size_t size); | 178 | #define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; }) |
263 | extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); | ||
264 | 179 | ||
265 | extern int devmem_is_allowed(unsigned long pfn); | 180 | #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) |
181 | #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) | ||
266 | 182 | ||
267 | /* | 183 | /* |
268 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | 184 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
@@ -275,6 +191,18 @@ extern int devmem_is_allowed(unsigned long pfn); | |||
275 | */ | 191 | */ |
276 | #define xlate_dev_kmem_ptr(p) p | 192 | #define xlate_dev_kmem_ptr(p) p |
277 | 193 | ||
194 | #include <asm-generic/io.h> | ||
195 | |||
196 | /* | ||
197 | * More restrictive address range checking than the default implementation | ||
198 | * (PHYS_OFFSET and PHYS_MASK taken into account). | ||
199 | */ | ||
200 | #define ARCH_HAS_VALID_PHYS_ADDR_RANGE | ||
201 | extern int valid_phys_addr_range(phys_addr_t addr, size_t size); | ||
202 | extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); | ||
203 | |||
204 | extern int devmem_is_allowed(unsigned long pfn); | ||
205 | |||
278 | struct bio_vec; | 206 | struct bio_vec; |
279 | extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1, | 207 | extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1, |
280 | const struct bio_vec *vec2); | 208 | const struct bio_vec *vec2); |