2 files changed, 18 insertions, 17 deletions

diff --git a/arch/arm26/kernel/fiq.c b/arch/arm26/kernel/fiq.c
index 08a97c9498ff..a24272b61f30 100644
--- a/arch/arm26/kernel/fiq.c
+++ b/arch/arm26/kernel/fiq.c
@@ -104,14 +104,14 @@ void set_fiq_regs(struct pt_regs *regs)
 {
         register unsigned long tmp, tmp2;
         __asm__ volatile (
-        "mov    %0, pc
-        bic     %1, %0, #0x3
-        orr     %1, %1, %3
-        teqp    %1, #0          @ select FIQ mode
-        mov     r0, r0
-        ldmia   %2, {r8 - r14}
-        teqp    %0, #0          @ return to SVC mode
-        mov     r0, r0"
+        "mov    %0, pc                                  \n"
+        "bic    %1, %0, #0x3                            \n"
+        "orr    %1, %1, %3                              \n"
+        "teqp   %1, #0          @ select FIQ mode       \n"
+        "mov    r0, r0                                  \n"
+        "ldmia  %2, {r8 - r14}                          \n"
+        "teqp   %0, #0          @ return to SVC mode    \n"
+        "mov    r0, r0                                  "
         : "=&r" (tmp), "=&r" (tmp2)
         : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | MODE_FIQ26)
         /* These registers aren't modified by the above code in a way
@@ -125,14 +125,14 @@ void get_fiq_regs(struct pt_regs *regs)
 {
         register unsigned long tmp, tmp2;
         __asm__ volatile (
-        "mov    %0, pc
-        bic     %1, %0, #0x3
-        orr     %1, %1, %3
-        teqp    %1, #0          @ select FIQ mode
-        mov     r0, r0
-        stmia   %2, {r8 - r14}
-        teqp    %0, #0          @ return to SVC mode
-        mov     r0, r0"
+        "mov    %0, pc                                  \n"
+        "bic    %1, %0, #0x3                            \n"
+        "orr    %1, %1, %3                              \n"
+        "teqp   %1, #0          @ select FIQ mode       \n"
+        "mov    r0, r0                                  \n"
+        "stmia  %2, {r8 - r14}                          \n"
+        "teqp   %0, #0          @ return to SVC mode    \n"
+        "mov    r0, r0                                  "
         : "=&r" (tmp), "=&r" (tmp2)
         : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | MODE_FIQ26)
         /* These registers aren't modified by the above code in a way
diff --git a/arch/arm26/kernel/signal.c b/arch/arm26/kernel/signal.c
index ce2055bdc9ee..2a48c12100c0 100644
--- a/arch/arm26/kernel/signal.c
+++ b/arch/arm26/kernel/signal.c
@@ -480,6 +480,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
 {
         siginfo_t info;
         int signr;
+        struct k_sigaction ka;
 
         /*
          * We want the common case to go fast, which
@@ -493,7 +494,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
         if (current->ptrace & PT_SINGLESTEP)
                 ptrace_cancel_bpt(current);
         
-        signr = get_signal_to_deliver(&info, regs, NULL);
+        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
         if (signr > 0) {
                 handle_signal(signr, &info, oldset, regs, syscall);
                 if (current->ptrace & PT_SINGLESTEP)