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-rw-r--r--arch/arm/vfp/vfphw.S4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index de4ca1223c58..b7ed57e00cd4 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -102,7 +102,6 @@ vfp_support_entry:
102 VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading 102 VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading
103 @ nonexistant reg on rev0 103 @ nonexistant reg on rev0
104 VFPFSTMIA r4 @ save the working registers 104 VFPFSTMIA r4 @ save the working registers
105 add r4, r4, #8*16+4
106 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 105 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
107 @ and point r4 at the word at the 106 @ and point r4 at the word at the
108 @ start of the register dump 107 @ start of the register dump
@@ -111,10 +110,9 @@ no_old_VFP_process:
111 DBGSTR1 "load state %p", r10 110 DBGSTR1 "load state %p", r10
112 str r10, [r3] @ update the last_VFP_context pointer 111 str r10, [r3] @ update the last_VFP_context pointer
113 @ Load the saved state back into the VFP 112 @ Load the saved state back into the VFP
114 add r4, r10, #8*16+4
115 ldmia r4, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
116 VFPFLDMIA r10 @ reload the working registers while 113 VFPFLDMIA r10 @ reload the working registers while
117 @ FPEXC is in a safe state 114 @ FPEXC is in a safe state
115 ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
118 tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write? 116 tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write?
119 VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing 117 VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing
120 @ nonexistant reg on rev0 118 @ nonexistant reg on rev0