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-rw-r--r--arch/arm/plat-versatile/sched-clock.c51
1 files changed, 28 insertions, 23 deletions
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 9768cf7e83d7..3d6a4c292cab 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -18,36 +18,41 @@
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#include <linux/cnt32_to_63.h>
22#include <linux/io.h> 21#include <linux/io.h>
23#include <asm/div64.h> 22#include <linux/sched.h>
24 23
25#include <mach/hardware.h> 24#include <asm/sched_clock.h>
26#include <mach/platform.h> 25#include <plat/sched_clock.h>
27 26
28#ifdef VERSATILE_SYS_BASE 27static DEFINE_CLOCK_DATA(cd);
29#define REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_24MHz_OFFSET) 28static void __iomem *ctr;
30#endif
31
32#ifdef REALVIEW_SYS_BASE
33#define REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
34#endif
35 29
36/* 30/*
37 * This is the Realview and Versatile sched_clock implementation. This 31 * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
38 * has a resolution of 41.7ns, and a maximum value of about 35583 days. 32 * This gives a resolution of about 41ns and a wrap period of about 178s.
39 *
40 * The return value is guaranteed to be monotonic in that range as
41 * long as there is always less than 89 seconds between successive
42 * calls to this function.
43 */ 33 */
44unsigned long long sched_clock(void) 34#define SC_MULT 2796202667u
35#define SC_SHIFT 26
36
37unsigned long long notrace sched_clock(void)
45{ 38{
46 unsigned long long v = cnt32_to_63(readl(REFCOUNTER)); 39 if (ctr) {
40 u32 cyc = readl(ctr);
41 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
42 SC_MULT, SC_SHIFT);
43 } else
44 return 0;
45}
47 46
48 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */ 47static void notrace versatile_update_sched_clock(void)
49 v *= 125<<1; 48{
50 do_div(v, 3<<1); 49 u32 cyc = readl(ctr);
50 update_sched_clock(&cd, cyc, (u32)~0);
51}
51 52
52 return v; 53void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
54{
55 ctr = reg;
56 init_fixed_sched_clock(&cd, versatile_update_sched_clock,
57 32, rate, SC_MULT, SC_SHIFT);
53} 58}