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-rw-r--r--arch/arm/plat-spear/clock.c5
-rw-r--r--arch/arm/plat-spear/include/plat/clock.h1
-rw-r--r--arch/arm/plat-spear/time.c16
3 files changed, 8 insertions, 14 deletions
diff --git a/arch/arm/plat-spear/clock.c b/arch/arm/plat-spear/clock.c
index bdbd7ec9cb6b..6fa474cb398e 100644
--- a/arch/arm/plat-spear/clock.c
+++ b/arch/arm/plat-spear/clock.c
@@ -903,6 +903,11 @@ void recalc_root_clocks(void)
903 spin_unlock_irqrestore(&clocks_lock, flags); 903 spin_unlock_irqrestore(&clocks_lock, flags);
904} 904}
905 905
906void __init clk_init(void)
907{
908 recalc_root_clocks();
909}
910
906#ifdef CONFIG_DEBUG_FS 911#ifdef CONFIG_DEBUG_FS
907/* 912/*
908 * debugfs support to trace clock tree hierarchy and attributes 913 * debugfs support to trace clock tree hierarchy and attributes
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
index fcc0d0ad4a1f..0062bafef12d 100644
--- a/arch/arm/plat-spear/include/plat/clock.h
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -224,6 +224,7 @@ struct clcd_rate_tbl {
224}; 224};
225 225
226/* platform specific clock functions */ 226/* platform specific clock functions */
227void __init clk_init(void);
227void clk_register(struct clk_lookup *cl); 228void clk_register(struct clk_lookup *cl);
228void recalc_root_clocks(void); 229void recalc_root_clocks(void);
229 230
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index dbb6e4fff79d..0c77e4298675 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -70,19 +70,6 @@ static void clockevent_set_mode(enum clock_event_mode mode,
70static int clockevent_next_event(unsigned long evt, 70static int clockevent_next_event(unsigned long evt,
71 struct clock_event_device *clk_event_dev); 71 struct clock_event_device *clk_event_dev);
72 72
73static cycle_t clocksource_read_cycles(struct clocksource *cs)
74{
75 return (cycle_t) readw(gpt_base + COUNT(CLKSRC));
76}
77
78static struct clocksource clksrc = {
79 .name = "tmr1",
80 .rating = 200, /* its a pretty decent clock */
81 .read = clocksource_read_cycles,
82 .mask = 0xFFFF, /* 16 bits */
83 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
84};
85
86static void spear_clocksource_init(void) 73static void spear_clocksource_init(void)
87{ 74{
88 u32 tick_rate; 75 u32 tick_rate;
@@ -103,7 +90,8 @@ static void spear_clocksource_init(void)
103 writew(val, gpt_base + CR(CLKSRC)); 90 writew(val, gpt_base + CR(CLKSRC));
104 91
105 /* register the clocksource */ 92 /* register the clocksource */
106 clocksource_register_hz(&clksrc, tick_rate); 93 clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate,
94 200, 16, clocksource_mmio_readw_up);
107} 95}
108 96
109static struct clock_event_device clkevt = { 97static struct clock_event_device clkevt = {