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-rw-r--r--arch/arm/plat-spear/include/plat/clock.h2
-rw-r--r--arch/arm/plat-spear/shirq.c12
-rw-r--r--arch/arm/plat-spear/time.c16
3 files changed, 9 insertions, 21 deletions
diff --git a/arch/arm/plat-spear/include/plat/clock.h b/arch/arm/plat-spear/include/plat/clock.h
index e4cc7877b0be..0062bafef12d 100644
--- a/arch/arm/plat-spear/include/plat/clock.h
+++ b/arch/arm/plat-spear/include/plat/clock.h
@@ -89,7 +89,7 @@ struct rate_config {
89 * @sibling: node for list of clocks having same parents 89 * @sibling: node for list of clocks having same parents
90 * @private_data: clock specific private data 90 * @private_data: clock specific private data
91 * @node: list to maintain clocks linearly 91 * @node: list to maintain clocks linearly
92 * @cl: clocklook up assoicated with this clock 92 * @cl: clocklook up associated with this clock
93 * @dent: object for debugfs 93 * @dent: object for debugfs
94 */ 94 */
95struct clk { 95struct clk {
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 78189035e7f1..961fb7261243 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -68,7 +68,7 @@ static struct irq_chip shirq_chip = {
68static void shirq_handler(unsigned irq, struct irq_desc *desc) 68static void shirq_handler(unsigned irq, struct irq_desc *desc)
69{ 69{
70 u32 i, val, mask; 70 u32 i, val, mask;
71 struct spear_shirq *shirq = get_irq_data(irq); 71 struct spear_shirq *shirq = irq_get_handler_data(irq);
72 72
73 desc->irq_data.chip->irq_ack(&desc->irq_data); 73 desc->irq_data.chip->irq_ack(&desc->irq_data);
74 while ((val = readl(shirq->regs.base + shirq->regs.status_reg) & 74 while ((val = readl(shirq->regs.base + shirq->regs.status_reg) &
@@ -105,14 +105,14 @@ int spear_shirq_register(struct spear_shirq *shirq)
105 if (!shirq->dev_count) 105 if (!shirq->dev_count)
106 return -EINVAL; 106 return -EINVAL;
107 107
108 set_irq_chained_handler(shirq->irq, shirq_handler); 108 irq_set_chained_handler(shirq->irq, shirq_handler);
109 for (i = 0; i < shirq->dev_count; i++) { 109 for (i = 0; i < shirq->dev_count; i++) {
110 set_irq_chip(shirq->dev_config[i].virq, &shirq_chip); 110 irq_set_chip_and_handler(shirq->dev_config[i].virq,
111 set_irq_handler(shirq->dev_config[i].virq, handle_simple_irq); 111 &shirq_chip, handle_simple_irq);
112 set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID); 112 set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID);
113 set_irq_chip_data(shirq->dev_config[i].virq, shirq); 113 irq_set_chip_data(shirq->dev_config[i].virq, shirq);
114 } 114 }
115 115
116 set_irq_data(shirq->irq, shirq); 116 irq_set_handler_data(shirq->irq, shirq);
117 return 0; 117 return 0;
118} 118}
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index dbb6e4fff79d..0c77e4298675 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -70,19 +70,6 @@ static void clockevent_set_mode(enum clock_event_mode mode,
70static int clockevent_next_event(unsigned long evt, 70static int clockevent_next_event(unsigned long evt,
71 struct clock_event_device *clk_event_dev); 71 struct clock_event_device *clk_event_dev);
72 72
73static cycle_t clocksource_read_cycles(struct clocksource *cs)
74{
75 return (cycle_t) readw(gpt_base + COUNT(CLKSRC));
76}
77
78static struct clocksource clksrc = {
79 .name = "tmr1",
80 .rating = 200, /* its a pretty decent clock */
81 .read = clocksource_read_cycles,
82 .mask = 0xFFFF, /* 16 bits */
83 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
84};
85
86static void spear_clocksource_init(void) 73static void spear_clocksource_init(void)
87{ 74{
88 u32 tick_rate; 75 u32 tick_rate;
@@ -103,7 +90,8 @@ static void spear_clocksource_init(void)
103 writew(val, gpt_base + CR(CLKSRC)); 90 writew(val, gpt_base + CR(CLKSRC));
104 91
105 /* register the clocksource */ 92 /* register the clocksource */
106 clocksource_register_hz(&clksrc, tick_rate); 93 clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate,
94 200, 16, clocksource_mmio_readw_up);
107} 95}
108 96
109static struct clock_event_device clkevt = { 97static struct clock_event_device clkevt = {