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-rw-r--r--arch/arm/plat-spear/include/plat/debug-macro.S4
-rw-r--r--arch/arm/plat-spear/time.c47
2 files changed, 9 insertions, 42 deletions
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index 1670734b7e51..37fa593884ee 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -17,8 +17,8 @@
17 .macro addruart, rx 17 .macro addruart, rx
18 mrc p15, 0, \rx, c1, c0 18 mrc p15, 0, \rx, c1, c0
19 tst \rx, #1 @ MMU enabled? 19 tst \rx, #1 @ MMU enabled?
20 moveq \rx, =SPEAR_DBG_UART_BASE @ Physical base 20 moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base
21 movne \rx, =VA_SPEAR_DBG_UART_BASE @ Virtual base 21 movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base
22 .endm 22 .endm
23 23
24 .macro senduart, rd, rx 24 .macro senduart, rd, rx
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index a1025d38f383..ab211652e4ca 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -58,6 +58,11 @@
58 58
59#define INT_STATUS 0x1 59#define INT_STATUS 0x1
60 60
61/*
62 * Minimum clocksource/clockevent timer range in seconds
63 */
64#define SPEAR_MIN_RANGE 4
65
61static __iomem void *gpt_base; 66static __iomem void *gpt_base;
62static struct clk *gpt_clk; 67static struct clk *gpt_clk;
63 68
@@ -66,44 +71,6 @@ static void clockevent_set_mode(enum clock_event_mode mode,
66static int clockevent_next_event(unsigned long evt, 71static int clockevent_next_event(unsigned long evt,
67 struct clock_event_device *clk_event_dev); 72 struct clock_event_device *clk_event_dev);
68 73
69/*
70 * Following clocksource_set_clock and clockevent_set_clock picked
71 * from arch/mips/kernel/time.c
72 */
73
74void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
75{
76 u64 temp;
77 u32 shift;
78
79 /* Find a shift value */
80 for (shift = 32; shift > 0; shift--) {
81 temp = (u64) NSEC_PER_SEC << shift;
82 do_div(temp, clock);
83 if ((temp >> 32) == 0)
84 break;
85 }
86 cs->shift = shift;
87 cs->mult = (u32) temp;
88}
89
90void __init clockevent_set_clock(struct clock_event_device *cd,
91 unsigned int clock)
92{
93 u64 temp;
94 u32 shift;
95
96 /* Find a shift value */
97 for (shift = 32; shift > 0; shift--) {
98 temp = (u64) clock << shift;
99 do_div(temp, NSEC_PER_SEC);
100 if ((temp >> 32) == 0)
101 break;
102 }
103 cd->shift = shift;
104 cd->mult = (u32) temp;
105}
106
107static cycle_t clocksource_read_cycles(struct clocksource *cs) 74static cycle_t clocksource_read_cycles(struct clocksource *cs)
108{ 75{
109 return (cycle_t) readw(gpt_base + COUNT(CLKSRC)); 76 return (cycle_t) readw(gpt_base + COUNT(CLKSRC));
@@ -138,7 +105,7 @@ static void spear_clocksource_init(void)
138 val |= CTRL_ENABLE ; 105 val |= CTRL_ENABLE ;
139 writew(val, gpt_base + CR(CLKSRC)); 106 writew(val, gpt_base + CR(CLKSRC));
140 107
141 clocksource_set_clock(&clksrc, tick_rate); 108 clocksource_calc_mult_shift(&clksrc, tick_rate, SPEAR_MIN_RANGE);
142 109
143 /* register the clocksource */ 110 /* register the clocksource */
144 clocksource_register(&clksrc); 111 clocksource_register(&clksrc);
@@ -233,7 +200,7 @@ static void __init spear_clockevent_init(void)
233 tick_rate = clk_get_rate(gpt_clk); 200 tick_rate = clk_get_rate(gpt_clk);
234 tick_rate >>= CTRL_PRESCALER16; 201 tick_rate >>= CTRL_PRESCALER16;
235 202
236 clockevent_set_clock(&clkevt, tick_rate); 203 clockevents_calc_mult_shift(&clkevt, tick_rate, SPEAR_MIN_RANGE);
237 204
238 clkevt.max_delta_ns = clockevent_delta2ns(0xfff0, 205 clkevt.max_delta_ns = clockevent_delta2ns(0xfff0,
239 &clkevt); 206 &clkevt);