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-rw-r--r--arch/arm/plat-spear/time.c26
1 files changed, 10 insertions, 16 deletions
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 839c88df9994..dbb6e4fff79d 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/plat-spear/time.c 2 * arch/arm/plat-spear/time.c
3 * 3 *
4 * Copyright (C) 2009 ST Microelectronics 4 * Copyright (C) 2010 ST Microelectronics
5 * Shiraz Hashim<shiraz.hashim@st.com> 5 * Shiraz Hashim<shiraz.hashim@st.com>
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
@@ -20,10 +20,9 @@
20#include <linux/time.h> 20#include <linux/time.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23#include <mach/irqs.h>
24#include <mach/hardware.h>
25#include <mach/spear.h>
26#include <mach/generic.h> 23#include <mach/generic.h>
24#include <mach/hardware.h>
25#include <mach/irqs.h>
27 26
28/* 27/*
29 * We would use TIMER0 and TIMER1 as clockevent and clocksource. 28 * We would use TIMER0 and TIMER1 as clockevent and clocksource.
@@ -211,7 +210,7 @@ static void __init spear_clockevent_init(void)
211 210
212void __init spear_setup_timer(void) 211void __init spear_setup_timer(void)
213{ 212{
214 struct clk *pll3_clk; 213 int ret;
215 214
216 if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) { 215 if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) {
217 pr_err("%s:cannot get IO addr\n", __func__); 216 pr_err("%s:cannot get IO addr\n", __func__);
@@ -230,26 +229,21 @@ void __init spear_setup_timer(void)
230 goto err_iomap; 229 goto err_iomap;
231 } 230 }
232 231
233 pll3_clk = clk_get(NULL, "pll3_48m_clk"); 232 ret = clk_enable(gpt_clk);
234 if (!pll3_clk) { 233 if (ret < 0) {
235 pr_err("%s:couldn't get PLL3 as parent for gpt\n", __func__); 234 pr_err("%s:couldn't enable gpt clock\n", __func__);
236 goto err_iomap; 235 goto err_clk;
237 } 236 }
238 237
239 clk_set_parent(gpt_clk, pll3_clk);
240
241 spear_clockevent_init(); 238 spear_clockevent_init();
242 spear_clocksource_init(); 239 spear_clocksource_init();
243 240
244 return; 241 return;
245 242
243err_clk:
244 clk_put(gpt_clk);
246err_iomap: 245err_iomap:
247 iounmap(gpt_base); 246 iounmap(gpt_base);
248
249err_mem: 247err_mem:
250 release_mem_region(SPEAR_GPT0_BASE, SZ_1K); 248 release_mem_region(SPEAR_GPT0_BASE, SZ_1K);
251} 249}
252
253struct sys_timer spear_sys_timer = {
254 .init = spear_setup_timer,
255};