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-rw-r--r--arch/arm/plat-samsung/Kconfig12
-rw-r--r--arch/arm/plat-samsung/Makefile8
-rw-r--r--arch/arm/plat-samsung/adc.c8
-rw-r--r--arch/arm/plat-samsung/devs.c63
-rw-r--r--arch/arm/plat-samsung/dma-ops.c76
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h4
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-ops.h20
-rw-r--r--arch/arm/plat-samsung/include/plat/fb.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/pd.h30
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h39
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h2
-rw-r--r--arch/arm/plat-samsung/pd.c95
-rw-r--r--arch/arm/plat-samsung/pwm.c4
-rw-r--r--arch/arm/plat-samsung/s3c-dma-ops.c39
-rw-r--r--arch/arm/plat-samsung/s5p-clock.c1
18 files changed, 131 insertions, 276 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index a2fae4ea0936..7aca31c1df1f 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -78,6 +78,10 @@ config S5P_HRT
78 78
79# clock options 79# clock options
80 80
81config SAMSUNG_CLOCK
82 bool
83 default y if !COMMON_CLK
84
81config SAMSUNG_CLKSRC 85config SAMSUNG_CLKSRC
82 bool 86 bool
83 help 87 help
@@ -491,14 +495,6 @@ config S5P_SLEEP
491 Internal config node to apply common S5P sleep management code. 495 Internal config node to apply common S5P sleep management code.
492 Can be selected by S5P and newer SoCs with similar sleep procedure. 496 Can be selected by S5P and newer SoCs with similar sleep procedure.
493 497
494comment "Power Domain"
495
496config SAMSUNG_PD
497 bool "Samsung Power Domain"
498 depends on PM_RUNTIME
499 help
500 Say Y here if you want to control Power Domain by Runtime PM.
501
502config DEBUG_S3C_UART 498config DEBUG_S3C_UART
503 depends on PLAT_SAMSUNG 499 depends on PLAT_SAMSUNG
504 int 500 int
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 860b2db4db15..b78717496677 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -15,8 +15,8 @@ obj-y += init.o cpu.o
15obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o 15obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o
16obj-$(CONFIG_S5P_HRT) += s5p-time.o 16obj-$(CONFIG_S5P_HRT) += s5p-time.o
17 17
18obj-y += clock.o 18obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o
19obj-y += pwm-clock.o 19obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
20 20
21obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o 21obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
22obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o 22obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o
@@ -60,10 +60,6 @@ obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
60obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o 60obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o
61obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o 61obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o
62 62
63# PD support
64
65obj-$(CONFIG_SAMSUNG_PD) += pd.o
66
67# PWM support 63# PWM support
68 64
69obj-$(CONFIG_HAVE_PWM) += pwm.o 65obj-$(CONFIG_HAVE_PWM) += pwm.o
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 33ecd0c9f0c3..b1e05ccff3ac 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -157,11 +157,13 @@ int s3c_adc_start(struct s3c_adc_client *client,
157 return -EINVAL; 157 return -EINVAL;
158 } 158 }
159 159
160 if (client->is_ts && adc->ts_pend)
161 return -EAGAIN;
162
163 spin_lock_irqsave(&adc->lock, flags); 160 spin_lock_irqsave(&adc->lock, flags);
164 161
162 if (client->is_ts && adc->ts_pend) {
163 spin_unlock_irqrestore(&adc->lock, flags);
164 return -EAGAIN;
165 }
166
165 client->channel = channel; 167 client->channel = channel;
166 client->nr_samples = nr_samples; 168 client->nr_samples = nr_samples;
167 169
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 1d214cb9d770..74e31ce35538 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -126,7 +126,8 @@ struct platform_device s3c_device_adc = {
126#ifdef CONFIG_CPU_S3C2440 126#ifdef CONFIG_CPU_S3C2440
127static struct resource s3c_camif_resource[] = { 127static struct resource s3c_camif_resource[] = {
128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), 128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
129 [1] = DEFINE_RES_IRQ(IRQ_CAM), 129 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
130 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
130}; 131};
131 132
132struct platform_device s3c_device_camif = { 133struct platform_device s3c_device_camif = {
@@ -1512,7 +1513,7 @@ static struct resource s3c64xx_spi0_resource[] = {
1512}; 1513};
1513 1514
1514struct platform_device s3c64xx_device_spi0 = { 1515struct platform_device s3c64xx_device_spi0 = {
1515 .name = "s3c64xx-spi", 1516 .name = "s3c6410-spi",
1516 .id = 0, 1517 .id = 0,
1517 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), 1518 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1518 .resource = s3c64xx_spi0_resource, 1519 .resource = s3c64xx_spi0_resource,
@@ -1522,13 +1523,10 @@ struct platform_device s3c64xx_device_spi0 = {
1522 }, 1523 },
1523}; 1524};
1524 1525
1525void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, 1526void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1526 int src_clk_nr, int num_cs) 1527 int num_cs)
1527{ 1528{
1528 if (!pd) { 1529 struct s3c64xx_spi_info pd;
1529 pr_err("%s:Need to pass platform data\n", __func__);
1530 return;
1531 }
1532 1530
1533 /* Reject invalid configuration */ 1531 /* Reject invalid configuration */
1534 if (!num_cs || src_clk_nr < 0) { 1532 if (!num_cs || src_clk_nr < 0) {
@@ -1536,12 +1534,11 @@ void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1536 return; 1534 return;
1537 } 1535 }
1538 1536
1539 pd->num_cs = num_cs; 1537 pd.num_cs = num_cs;
1540 pd->src_clk_nr = src_clk_nr; 1538 pd.src_clk_nr = src_clk_nr;
1541 if (!pd->cfg_gpio) 1539 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1542 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1543 1540
1544 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0); 1541 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1545} 1542}
1546#endif /* CONFIG_S3C64XX_DEV_SPI0 */ 1543#endif /* CONFIG_S3C64XX_DEV_SPI0 */
1547 1544
@@ -1554,7 +1551,7 @@ static struct resource s3c64xx_spi1_resource[] = {
1554}; 1551};
1555 1552
1556struct platform_device s3c64xx_device_spi1 = { 1553struct platform_device s3c64xx_device_spi1 = {
1557 .name = "s3c64xx-spi", 1554 .name = "s3c6410-spi",
1558 .id = 1, 1555 .id = 1,
1559 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), 1556 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1560 .resource = s3c64xx_spi1_resource, 1557 .resource = s3c64xx_spi1_resource,
@@ -1564,26 +1561,20 @@ struct platform_device s3c64xx_device_spi1 = {
1564 }, 1561 },
1565}; 1562};
1566 1563
1567void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, 1564void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1568 int src_clk_nr, int num_cs) 1565 int num_cs)
1569{ 1566{
1570 if (!pd) {
1571 pr_err("%s:Need to pass platform data\n", __func__);
1572 return;
1573 }
1574
1575 /* Reject invalid configuration */ 1567 /* Reject invalid configuration */
1576 if (!num_cs || src_clk_nr < 0) { 1568 if (!num_cs || src_clk_nr < 0) {
1577 pr_err("%s: Invalid SPI configuration\n", __func__); 1569 pr_err("%s: Invalid SPI configuration\n", __func__);
1578 return; 1570 return;
1579 } 1571 }
1580 1572
1581 pd->num_cs = num_cs; 1573 pd.num_cs = num_cs;
1582 pd->src_clk_nr = src_clk_nr; 1574 pd.src_clk_nr = src_clk_nr;
1583 if (!pd->cfg_gpio) 1575 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1584 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1585 1576
1586 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1); 1577 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1587} 1578}
1588#endif /* CONFIG_S3C64XX_DEV_SPI1 */ 1579#endif /* CONFIG_S3C64XX_DEV_SPI1 */
1589 1580
@@ -1596,7 +1587,7 @@ static struct resource s3c64xx_spi2_resource[] = {
1596}; 1587};
1597 1588
1598struct platform_device s3c64xx_device_spi2 = { 1589struct platform_device s3c64xx_device_spi2 = {
1599 .name = "s3c64xx-spi", 1590 .name = "s3c6410-spi",
1600 .id = 2, 1591 .id = 2,
1601 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), 1592 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1602 .resource = s3c64xx_spi2_resource, 1593 .resource = s3c64xx_spi2_resource,
@@ -1606,13 +1597,10 @@ struct platform_device s3c64xx_device_spi2 = {
1606 }, 1597 },
1607}; 1598};
1608 1599
1609void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, 1600void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1610 int src_clk_nr, int num_cs) 1601 int num_cs)
1611{ 1602{
1612 if (!pd) { 1603 struct s3c64xx_spi_info pd;
1613 pr_err("%s:Need to pass platform data\n", __func__);
1614 return;
1615 }
1616 1604
1617 /* Reject invalid configuration */ 1605 /* Reject invalid configuration */
1618 if (!num_cs || src_clk_nr < 0) { 1606 if (!num_cs || src_clk_nr < 0) {
@@ -1620,11 +1608,10 @@ void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1620 return; 1608 return;
1621 } 1609 }
1622 1610
1623 pd->num_cs = num_cs; 1611 pd.num_cs = num_cs;
1624 pd->src_clk_nr = src_clk_nr; 1612 pd.src_clk_nr = src_clk_nr;
1625 if (!pd->cfg_gpio) 1613 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1626 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1627 1614
1628 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2); 1615 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1629} 1616}
1630#endif /* CONFIG_S3C64XX_DEV_SPI2 */ 1617#endif /* CONFIG_S3C64XX_DEV_SPI2 */
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index eb9f4f534006..c38d75489240 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -19,72 +19,79 @@
19#include <mach/dma.h> 19#include <mach/dma.h>
20 20
21static unsigned samsung_dmadev_request(enum dma_ch dma_ch, 21static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
22 struct samsung_dma_info *info) 22 struct samsung_dma_req *param)
23{ 23{
24 struct dma_chan *chan;
25 dma_cap_mask_t mask; 24 dma_cap_mask_t mask;
26 struct dma_slave_config slave_config;
27 void *filter_param; 25 void *filter_param;
28 26
29 dma_cap_zero(mask); 27 dma_cap_zero(mask);
30 dma_cap_set(info->cap, mask); 28 dma_cap_set(param->cap, mask);
31 29
32 /* 30 /*
33 * If a dma channel property of a device node from device tree is 31 * If a dma channel property of a device node from device tree is
34 * specified, use that as the fliter parameter. 32 * specified, use that as the fliter parameter.
35 */ 33 */
36 filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop : 34 filter_param = (dma_ch == DMACH_DT_PROP) ?
37 (void *)dma_ch; 35 (void *)param->dt_dmach_prop : (void *)dma_ch;
38 chan = dma_request_channel(mask, pl330_filter, filter_param); 36 return (unsigned)dma_request_channel(mask, pl330_filter, filter_param);
37}
38
39static int samsung_dmadev_release(unsigned ch, void *param)
40{
41 dma_release_channel((struct dma_chan *)ch);
39 42
40 if (info->direction == DMA_DEV_TO_MEM) { 43 return 0;
44}
45
46static int samsung_dmadev_config(unsigned ch,
47 struct samsung_dma_config *param)
48{
49 struct dma_chan *chan = (struct dma_chan *)ch;
50 struct dma_slave_config slave_config;
51
52 if (param->direction == DMA_DEV_TO_MEM) {
41 memset(&slave_config, 0, sizeof(struct dma_slave_config)); 53 memset(&slave_config, 0, sizeof(struct dma_slave_config));
42 slave_config.direction = info->direction; 54 slave_config.direction = param->direction;
43 slave_config.src_addr = info->fifo; 55 slave_config.src_addr = param->fifo;
44 slave_config.src_addr_width = info->width; 56 slave_config.src_addr_width = param->width;
45 slave_config.src_maxburst = 1; 57 slave_config.src_maxburst = 1;
46 dmaengine_slave_config(chan, &slave_config); 58 dmaengine_slave_config(chan, &slave_config);
47 } else if (info->direction == DMA_MEM_TO_DEV) { 59 } else if (param->direction == DMA_MEM_TO_DEV) {
48 memset(&slave_config, 0, sizeof(struct dma_slave_config)); 60 memset(&slave_config, 0, sizeof(struct dma_slave_config));
49 slave_config.direction = info->direction; 61 slave_config.direction = param->direction;
50 slave_config.dst_addr = info->fifo; 62 slave_config.dst_addr = param->fifo;
51 slave_config.dst_addr_width = info->width; 63 slave_config.dst_addr_width = param->width;
52 slave_config.dst_maxburst = 1; 64 slave_config.dst_maxburst = 1;
53 dmaengine_slave_config(chan, &slave_config); 65 dmaengine_slave_config(chan, &slave_config);
66 } else {
67 pr_warn("unsupported direction\n");
68 return -EINVAL;
54 } 69 }
55 70
56 return (unsigned)chan;
57}
58
59static int samsung_dmadev_release(unsigned ch,
60 struct s3c2410_dma_client *client)
61{
62 dma_release_channel((struct dma_chan *)ch);
63
64 return 0; 71 return 0;
65} 72}
66 73
67static int samsung_dmadev_prepare(unsigned ch, 74static int samsung_dmadev_prepare(unsigned ch,
68 struct samsung_dma_prep_info *info) 75 struct samsung_dma_prep *param)
69{ 76{
70 struct scatterlist sg; 77 struct scatterlist sg;
71 struct dma_chan *chan = (struct dma_chan *)ch; 78 struct dma_chan *chan = (struct dma_chan *)ch;
72 struct dma_async_tx_descriptor *desc; 79 struct dma_async_tx_descriptor *desc;
73 80
74 switch (info->cap) { 81 switch (param->cap) {
75 case DMA_SLAVE: 82 case DMA_SLAVE:
76 sg_init_table(&sg, 1); 83 sg_init_table(&sg, 1);
77 sg_dma_len(&sg) = info->len; 84 sg_dma_len(&sg) = param->len;
78 sg_set_page(&sg, pfn_to_page(PFN_DOWN(info->buf)), 85 sg_set_page(&sg, pfn_to_page(PFN_DOWN(param->buf)),
79 info->len, offset_in_page(info->buf)); 86 param->len, offset_in_page(param->buf));
80 sg_dma_address(&sg) = info->buf; 87 sg_dma_address(&sg) = param->buf;
81 88
82 desc = dmaengine_prep_slave_sg(chan, 89 desc = dmaengine_prep_slave_sg(chan,
83 &sg, 1, info->direction, DMA_PREP_INTERRUPT); 90 &sg, 1, param->direction, DMA_PREP_INTERRUPT);
84 break; 91 break;
85 case DMA_CYCLIC: 92 case DMA_CYCLIC:
86 desc = dmaengine_prep_dma_cyclic(chan, 93 desc = dmaengine_prep_dma_cyclic(chan, param->buf,
87 info->buf, info->len, info->period, info->direction); 94 param->len, param->period, param->direction);
88 break; 95 break;
89 default: 96 default:
90 dev_err(&chan->dev->device, "unsupported format\n"); 97 dev_err(&chan->dev->device, "unsupported format\n");
@@ -96,8 +103,8 @@ static int samsung_dmadev_prepare(unsigned ch,
96 return -EFAULT; 103 return -EFAULT;
97 } 104 }
98 105
99 desc->callback = info->fp; 106 desc->callback = param->fp;
100 desc->callback_param = info->fp_param; 107 desc->callback_param = param->fp_param;
101 108
102 dmaengine_submit((struct dma_async_tx_descriptor *)desc); 109 dmaengine_submit((struct dma_async_tx_descriptor *)desc);
103 110
@@ -119,6 +126,7 @@ static inline int samsung_dmadev_flush(unsigned ch)
119static struct samsung_dma_ops dmadev_ops = { 126static struct samsung_dma_ops dmadev_ops = {
120 .request = samsung_dmadev_request, 127 .request = samsung_dmadev_request,
121 .release = samsung_dmadev_release, 128 .release = samsung_dmadev_release,
129 .config = samsung_dmadev_config,
122 .prepare = samsung_dmadev_prepare, 130 .prepare = samsung_dmadev_prepare,
123 .trigger = samsung_dmadev_trigger, 131 .trigger = samsung_dmadev_trigger,
124 .started = NULL, 132 .started = NULL,
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 0721293fad63..ace4451b7651 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -132,6 +132,10 @@ IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
132 132
133#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 133#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
134 134
135#ifndef KHZ
136#define KHZ (1000)
137#endif
138
135#ifndef MHZ 139#ifndef MHZ
136#define MHZ (1000*1000) 140#define MHZ (1000*1000)
137#endif 141#endif
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 61ca2f356c52..5da4b4f38f40 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -131,7 +131,6 @@ extern struct platform_device exynos4_device_ohci;
131extern struct platform_device exynos4_device_pcm0; 131extern struct platform_device exynos4_device_pcm0;
132extern struct platform_device exynos4_device_pcm1; 132extern struct platform_device exynos4_device_pcm1;
133extern struct platform_device exynos4_device_pcm2; 133extern struct platform_device exynos4_device_pcm2;
134extern struct platform_device exynos4_device_pd[];
135extern struct platform_device exynos4_device_spdif; 134extern struct platform_device exynos4_device_spdif;
136 135
137extern struct platform_device exynos_device_drm; 136extern struct platform_device exynos_device_drm;
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 71a6827c7706..f5144cdd3001 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -16,7 +16,13 @@
16#include <linux/dmaengine.h> 16#include <linux/dmaengine.h>
17#include <mach/dma.h> 17#include <mach/dma.h>
18 18
19struct samsung_dma_prep_info { 19struct samsung_dma_req {
20 enum dma_transaction_type cap;
21 struct property *dt_dmach_prop;
22 struct s3c2410_dma_client *client;
23};
24
25struct samsung_dma_prep {
20 enum dma_transaction_type cap; 26 enum dma_transaction_type cap;
21 enum dma_transfer_direction direction; 27 enum dma_transfer_direction direction;
22 dma_addr_t buf; 28 dma_addr_t buf;
@@ -26,19 +32,17 @@ struct samsung_dma_prep_info {
26 void *fp_param; 32 void *fp_param;
27}; 33};
28 34
29struct samsung_dma_info { 35struct samsung_dma_config {
30 enum dma_transaction_type cap;
31 enum dma_transfer_direction direction; 36 enum dma_transfer_direction direction;
32 enum dma_slave_buswidth width; 37 enum dma_slave_buswidth width;
33 dma_addr_t fifo; 38 dma_addr_t fifo;
34 struct s3c2410_dma_client *client;
35 struct property *dt_dmach_prop;
36}; 39};
37 40
38struct samsung_dma_ops { 41struct samsung_dma_ops {
39 unsigned (*request)(enum dma_ch ch, struct samsung_dma_info *info); 42 unsigned (*request)(enum dma_ch ch, struct samsung_dma_req *param);
40 int (*release)(unsigned ch, struct s3c2410_dma_client *client); 43 int (*release)(unsigned ch, void *param);
41 int (*prepare)(unsigned ch, struct samsung_dma_prep_info *info); 44 int (*config)(unsigned ch, struct samsung_dma_config *param);
45 int (*prepare)(unsigned ch, struct samsung_dma_prep *param);
42 int (*trigger)(unsigned ch); 46 int (*trigger)(unsigned ch);
43 int (*started)(unsigned ch); 47 int (*started)(unsigned ch);
44 int (*flush)(unsigned ch); 48 int (*flush)(unsigned ch);
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index 536002ff2ab8..b885322717a1 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -43,7 +43,6 @@ struct s3c_fb_pd_win {
43 * @setup_gpio: Setup the external GPIO pins to the right state to transfer 43 * @setup_gpio: Setup the external GPIO pins to the right state to transfer
44 * the data from the display system to the connected display 44 * the data from the display system to the connected display
45 * device. 45 * device.
46 * @default_win: default window layer number to be used for UI layer.
47 * @vidcon0: The base vidcon0 values to control the panel data format. 46 * @vidcon0: The base vidcon0 values to control the panel data format.
48 * @vidcon1: The base vidcon1 values to control the panel data output. 47 * @vidcon1: The base vidcon1 values to control the panel data output.
49 * @vtiming: Video timing when connected to a RGB type panel. 48 * @vtiming: Video timing when connected to a RGB type panel.
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index df8155b9d4d1..08740eed050c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -24,7 +24,7 @@
24#ifndef __PLAT_GPIO_CFG_H 24#ifndef __PLAT_GPIO_CFG_H
25#define __PLAT_GPIO_CFG_H __FILE__ 25#define __PLAT_GPIO_CFG_H __FILE__
26 26
27#include<linux/types.h> 27#include <linux/types.h>
28 28
29typedef unsigned int __bitwise__ samsung_gpio_pull_t; 29typedef unsigned int __bitwise__ samsung_gpio_pull_t;
30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t; 30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
index 7d048759b772..c0c70a895ca8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG 22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23 23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) 24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000) 25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
26 26
27#define S3C2410_PA_UART (0x50000000) 27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART 28#define S3C24XX_PA_UART S3C2410_PA_UART
diff --git a/arch/arm/plat-samsung/include/plat/pd.h b/arch/arm/plat-samsung/include/plat/pd.h
deleted file mode 100644
index abb4bc32716a..000000000000
--- a/arch/arm/plat-samsung/include/plat/pd.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/pd.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#ifndef __ASM_PLAT_SAMSUNG_PD_H
12#define __ASM_PLAT_SAMSUNG_PD_H __FILE__
13
14struct samsung_pd_info {
15 int (*enable)(struct device *dev);
16 int (*disable)(struct device *dev);
17 void __iomem *base;
18};
19
20enum exynos4_pd_block {
21 PD_MFC,
22 PD_G3D,
23 PD_LCD0,
24 PD_LCD1,
25 PD_TV,
26 PD_CAM,
27 PD_GPS
28};
29
30#endif /* __ASM_PLAT_SAMSUNG_PD_H */
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index fa95e9a00972..ceba18d23a5a 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -18,7 +18,6 @@ struct platform_device;
18 * @fb_delay: Slave specific feedback delay. 18 * @fb_delay: Slave specific feedback delay.
19 * Refer to FB_CLK_SEL register definition in SPI chapter. 19 * Refer to FB_CLK_SEL register definition in SPI chapter.
20 * @line: Custom 'identity' of the CS line. 20 * @line: Custom 'identity' of the CS line.
21 * @set_level: CS line control.
22 * 21 *
23 * This is per SPI-Slave Chipselect information. 22 * This is per SPI-Slave Chipselect information.
24 * Allocate and initialize one in machine init code and make the 23 * Allocate and initialize one in machine init code and make the
@@ -27,57 +26,41 @@ struct platform_device;
27struct s3c64xx_spi_csinfo { 26struct s3c64xx_spi_csinfo {
28 u8 fb_delay; 27 u8 fb_delay;
29 unsigned line; 28 unsigned line;
30 void (*set_level)(unsigned line_id, int lvl);
31}; 29};
32 30
33/** 31/**
34 * struct s3c64xx_spi_info - SPI Controller defining structure 32 * struct s3c64xx_spi_info - SPI Controller defining structure
35 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. 33 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
36 * @clk_from_cmu: If the SPI clock/prescalar control block is present
37 * by the platform's clock-management-unit and not in SPI controller.
38 * @num_cs: Number of CS this controller emulates. 34 * @num_cs: Number of CS this controller emulates.
39 * @cfg_gpio: Configure pins for this SPI controller. 35 * @cfg_gpio: Configure pins for this SPI controller.
40 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
41 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
42 * @high_speed: If the controller supports HIGH_SPEED_EN bit
43 * @tx_st_done: Depends on tx fifo_lvl field
44 */ 36 */
45struct s3c64xx_spi_info { 37struct s3c64xx_spi_info {
46 int src_clk_nr; 38 int src_clk_nr;
47 bool clk_from_cmu;
48
49 int num_cs; 39 int num_cs;
50 40 int (*cfg_gpio)(void);
51 int (*cfg_gpio)(struct platform_device *pdev);
52
53 /* Following two fields are for future compatibility */
54 int fifo_lvl_mask;
55 int rx_lvl_offset;
56 int high_speed;
57 int tx_st_done;
58}; 41};
59 42
60/** 43/**
61 * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board 44 * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
62 * initialization code. 45 * initialization code.
63 * @pd: SPI platform data to set. 46 * @cfg_gpio: Pointer to gpio setup function.
64 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. 47 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
65 * @num_cs: Number of elements in the 'cs' array. 48 * @num_cs: Number of elements in the 'cs' array.
66 * 49 *
67 * Call this from machine init code for each SPI Controller that 50 * Call this from machine init code for each SPI Controller that
68 * has some chips attached to it. 51 * has some chips attached to it.
69 */ 52 */
70extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, 53extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
71 int src_clk_nr, int num_cs); 54 int num_cs);
72extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, 55extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
73 int src_clk_nr, int num_cs); 56 int num_cs);
74extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, 57extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
75 int src_clk_nr, int num_cs); 58 int num_cs);
76 59
77/* defined by architecture to configure gpio */ 60/* defined by architecture to configure gpio */
78extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev); 61extern int s3c64xx_spi0_cfg_gpio(void);
79extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev); 62extern int s3c64xx_spi1_cfg_gpio(void);
80extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev); 63extern int s3c64xx_spi2_cfg_gpio(void);
81 64
82extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; 65extern struct s3c64xx_spi_info s3c64xx_spi0_pdata;
83extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; 66extern struct s3c64xx_spi_info s3c64xx_spi1_pdata;
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index f19aff19205c..bc4db9b04e36 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -25,7 +25,7 @@ static inline void arch_wdt_reset(void)
25 25
26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ 26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
27 27
28 if (s3c2410_wdtclk) 28 if (!IS_ERR(s3c2410_wdtclk))
29 clk_enable(s3c2410_wdtclk); 29 clk_enable(s3c2410_wdtclk);
30 30
31 /* put initial values into count and data */ 31 /* put initial values into count and data */
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c
deleted file mode 100644
index 312b510d86b7..000000000000
--- a/arch/arm/plat-samsung/pd.c
+++ /dev/null
@@ -1,95 +0,0 @@
1/* linux/arch/arm/plat-samsung/pd.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Samsung Power domain support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/export.h>
15#include <linux/platform_device.h>
16#include <linux/err.h>
17#include <linux/pm_runtime.h>
18
19#include <plat/pd.h>
20
21static int samsung_pd_probe(struct platform_device *pdev)
22{
23 struct samsung_pd_info *pdata = pdev->dev.platform_data;
24 struct device *dev = &pdev->dev;
25
26 if (!pdata) {
27 dev_err(dev, "no device data specified\n");
28 return -ENOENT;
29 }
30
31 pm_runtime_set_active(dev);
32 pm_runtime_enable(dev);
33
34 dev_info(dev, "power domain registered\n");
35 return 0;
36}
37
38static int __devexit samsung_pd_remove(struct platform_device *pdev)
39{
40 struct device *dev = &pdev->dev;
41
42 pm_runtime_disable(dev);
43 return 0;
44}
45
46static int samsung_pd_runtime_suspend(struct device *dev)
47{
48 struct samsung_pd_info *pdata = dev->platform_data;
49 int ret = 0;
50
51 if (pdata->disable)
52 ret = pdata->disable(dev);
53
54 dev_dbg(dev, "suspended\n");
55 return ret;
56}
57
58static int samsung_pd_runtime_resume(struct device *dev)
59{
60 struct samsung_pd_info *pdata = dev->platform_data;
61 int ret = 0;
62
63 if (pdata->enable)
64 ret = pdata->enable(dev);
65
66 dev_dbg(dev, "resumed\n");
67 return ret;
68}
69
70static const struct dev_pm_ops samsung_pd_pm_ops = {
71 .runtime_suspend = samsung_pd_runtime_suspend,
72 .runtime_resume = samsung_pd_runtime_resume,
73};
74
75static struct platform_driver samsung_pd_driver = {
76 .driver = {
77 .name = "samsung-pd",
78 .owner = THIS_MODULE,
79 .pm = &samsung_pd_pm_ops,
80 },
81 .probe = samsung_pd_probe,
82 .remove = __devexit_p(samsung_pd_remove),
83};
84
85static int __init samsung_pd_init(void)
86{
87 int ret;
88
89 ret = platform_driver_register(&samsung_pd_driver);
90 if (ret)
91 printk(KERN_ERR "%s: failed to add PD driver\n", __func__);
92
93 return ret;
94}
95arch_initcall(samsung_pd_init);
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index c559d8438c70..d3583050fb05 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -36,7 +36,6 @@ struct pwm_device {
36 unsigned int duty_ns; 36 unsigned int duty_ns;
37 37
38 unsigned char tcon_base; 38 unsigned char tcon_base;
39 unsigned char running;
40 unsigned char use_count; 39 unsigned char use_count;
41 unsigned char pwm_id; 40 unsigned char pwm_id;
42}; 41};
@@ -116,7 +115,6 @@ int pwm_enable(struct pwm_device *pwm)
116 115
117 local_irq_restore(flags); 116 local_irq_restore(flags);
118 117
119 pwm->running = 1;
120 return 0; 118 return 0;
121} 119}
122 120
@@ -134,8 +132,6 @@ void pwm_disable(struct pwm_device *pwm)
134 __raw_writel(tcon, S3C2410_TCON); 132 __raw_writel(tcon, S3C2410_TCON);
135 133
136 local_irq_restore(flags); 134 local_irq_restore(flags);
137
138 pwm->running = 0;
139} 135}
140 136
141EXPORT_SYMBOL(pwm_disable); 137EXPORT_SYMBOL(pwm_disable);
diff --git a/arch/arm/plat-samsung/s3c-dma-ops.c b/arch/arm/plat-samsung/s3c-dma-ops.c
index 781494912827..f99448c48d30 100644
--- a/arch/arm/plat-samsung/s3c-dma-ops.c
+++ b/arch/arm/plat-samsung/s3c-dma-ops.c
@@ -36,30 +36,26 @@ static void s3c_dma_cb(struct s3c2410_dma_chan *channel, void *param,
36} 36}
37 37
38static unsigned s3c_dma_request(enum dma_ch dma_ch, 38static unsigned s3c_dma_request(enum dma_ch dma_ch,
39 struct samsung_dma_info *info) 39 struct samsung_dma_req *param)
40{ 40{
41 struct cb_data *data; 41 struct cb_data *data;
42 42
43 if (s3c2410_dma_request(dma_ch, info->client, NULL) < 0) { 43 if (s3c2410_dma_request(dma_ch, param->client, NULL) < 0) {
44 s3c2410_dma_free(dma_ch, info->client); 44 s3c2410_dma_free(dma_ch, param->client);
45 return 0; 45 return 0;
46 } 46 }
47 47
48 if (param->cap == DMA_CYCLIC)
49 s3c2410_dma_setflags(dma_ch, S3C2410_DMAF_CIRCULAR);
50
48 data = kzalloc(sizeof(struct cb_data), GFP_KERNEL); 51 data = kzalloc(sizeof(struct cb_data), GFP_KERNEL);
49 data->ch = dma_ch; 52 data->ch = dma_ch;
50 list_add_tail(&data->node, &dma_list); 53 list_add_tail(&data->node, &dma_list);
51 54
52 s3c2410_dma_devconfig(dma_ch, info->direction, info->fifo);
53
54 if (info->cap == DMA_CYCLIC)
55 s3c2410_dma_setflags(dma_ch, S3C2410_DMAF_CIRCULAR);
56
57 s3c2410_dma_config(dma_ch, info->width);
58
59 return (unsigned)dma_ch; 55 return (unsigned)dma_ch;
60} 56}
61 57
62static int s3c_dma_release(unsigned ch, struct s3c2410_dma_client *client) 58static int s3c_dma_release(unsigned ch, void *param)
63{ 59{
64 struct cb_data *data; 60 struct cb_data *data;
65 61
@@ -68,16 +64,24 @@ static int s3c_dma_release(unsigned ch, struct s3c2410_dma_client *client)
68 break; 64 break;
69 list_del(&data->node); 65 list_del(&data->node);
70 66
71 s3c2410_dma_free(ch, client); 67 s3c2410_dma_free(ch, param);
72 kfree(data); 68 kfree(data);
73 69
74 return 0; 70 return 0;
75} 71}
76 72
77static int s3c_dma_prepare(unsigned ch, struct samsung_dma_prep_info *info) 73static int s3c_dma_config(unsigned ch, struct samsung_dma_config *param)
74{
75 s3c2410_dma_devconfig(ch, param->direction, param->fifo);
76 s3c2410_dma_config(ch, param->width);
77
78 return 0;
79}
80
81static int s3c_dma_prepare(unsigned ch, struct samsung_dma_prep *param)
78{ 82{
79 struct cb_data *data; 83 struct cb_data *data;
80 int len = (info->cap == DMA_CYCLIC) ? info->period : info->len; 84 int len = (param->cap == DMA_CYCLIC) ? param->period : param->len;
81 85
82 list_for_each_entry(data, &dma_list, node) 86 list_for_each_entry(data, &dma_list, node)
83 if (data->ch == ch) 87 if (data->ch == ch)
@@ -85,11 +89,11 @@ static int s3c_dma_prepare(unsigned ch, struct samsung_dma_prep_info *info)
85 89
86 if (!data->fp) { 90 if (!data->fp) {
87 s3c2410_dma_set_buffdone_fn(ch, s3c_dma_cb); 91 s3c2410_dma_set_buffdone_fn(ch, s3c_dma_cb);
88 data->fp = info->fp; 92 data->fp = param->fp;
89 data->fp_param = info->fp_param; 93 data->fp_param = param->fp_param;
90 } 94 }
91 95
92 s3c2410_dma_enqueue(ch, (void *)data, info->buf, len); 96 s3c2410_dma_enqueue(ch, (void *)data, param->buf, len);
93 97
94 return 0; 98 return 0;
95} 99}
@@ -117,6 +121,7 @@ static inline int s3c_dma_stop(unsigned ch)
117static struct samsung_dma_ops s3c_dma_ops = { 121static struct samsung_dma_ops s3c_dma_ops = {
118 .request = s3c_dma_request, 122 .request = s3c_dma_request,
119 .release = s3c_dma_release, 123 .release = s3c_dma_release,
124 .config = s3c_dma_config,
120 .prepare = s3c_dma_prepare, 125 .prepare = s3c_dma_prepare,
121 .trigger = s3c_dma_trigger, 126 .trigger = s3c_dma_trigger,
122 .started = s3c_dma_started, 127 .started = s3c_dma_started,
diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-samsung/s5p-clock.c
index 031a61899bef..48a159911037 100644
--- a/arch/arm/plat-samsung/s5p-clock.c
+++ b/arch/arm/plat-samsung/s5p-clock.c
@@ -37,6 +37,7 @@ struct clk clk_ext_xtal_mux = {
37struct clk clk_xusbxti = { 37struct clk clk_xusbxti = {
38 .name = "xusbxti", 38 .name = "xusbxti",
39 .id = -1, 39 .id = -1,
40 .rate = 24000000,
40}; 41};
41 42
42struct clk s5p_clk_27m = { 43struct clk s5p_clk_27m = {