diff options
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r-- | arch/arm/plat-samsung/Kconfig | 16 | ||||
-rw-r--r-- | arch/arm/plat-samsung/devs.c | 127 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/devs.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 24 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 31 |
5 files changed, 158 insertions, 48 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 313eb26cfa62..160eea15a6ef 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -226,11 +226,23 @@ config SAMSUNG_DEV_IDE | |||
226 | help | 226 | help |
227 | Compile in platform device definitions for IDE | 227 | Compile in platform device definitions for IDE |
228 | 228 | ||
229 | config S3C64XX_DEV_SPI | 229 | config S3C64XX_DEV_SPI0 |
230 | bool | 230 | bool |
231 | help | 231 | help |
232 | Compile in platform device definitions for S3C64XX's type | 232 | Compile in platform device definitions for S3C64XX's type |
233 | SPI controllers. | 233 | SPI controller 0 |
234 | |||
235 | config S3C64XX_DEV_SPI1 | ||
236 | bool | ||
237 | help | ||
238 | Compile in platform device definitions for S3C64XX's type | ||
239 | SPI controller 1 | ||
240 | |||
241 | config S3C64XX_DEV_SPI2 | ||
242 | bool | ||
243 | help | ||
244 | Compile in platform device definitions for S3C64XX's type | ||
245 | SPI controller 2 | ||
234 | 246 | ||
235 | config SAMSUNG_DEV_TS | 247 | config SAMSUNG_DEV_TS |
236 | bool | 248 | bool |
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 92b4c025d37a..32a6e394db24 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -62,6 +62,7 @@ | |||
62 | #include <plat/regs-iic.h> | 62 | #include <plat/regs-iic.h> |
63 | #include <plat/regs-serial.h> | 63 | #include <plat/regs-serial.h> |
64 | #include <plat/regs-spi.h> | 64 | #include <plat/regs-spi.h> |
65 | #include <plat/s3c64xx-spi.h> | ||
65 | 66 | ||
66 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | 67 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); |
67 | 68 | ||
@@ -1462,3 +1463,129 @@ struct platform_device s3c_device_wdt = { | |||
1462 | .resource = s3c_wdt_resource, | 1463 | .resource = s3c_wdt_resource, |
1463 | }; | 1464 | }; |
1464 | #endif /* CONFIG_S3C_DEV_WDT */ | 1465 | #endif /* CONFIG_S3C_DEV_WDT */ |
1466 | |||
1467 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | ||
1468 | static struct resource s3c64xx_spi0_resource[] = { | ||
1469 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | ||
1470 | [1] = DEFINE_RES_DMA(DMACH_SPI0_TX), | ||
1471 | [2] = DEFINE_RES_DMA(DMACH_SPI0_RX), | ||
1472 | [3] = DEFINE_RES_IRQ(IRQ_SPI0), | ||
1473 | }; | ||
1474 | |||
1475 | struct platform_device s3c64xx_device_spi0 = { | ||
1476 | .name = "s3c64xx-spi", | ||
1477 | .id = 0, | ||
1478 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | ||
1479 | .resource = s3c64xx_spi0_resource, | ||
1480 | .dev = { | ||
1481 | .dma_mask = &samsung_device_dma_mask, | ||
1482 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1483 | }, | ||
1484 | }; | ||
1485 | |||
1486 | void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, | ||
1487 | int src_clk_nr, int num_cs) | ||
1488 | { | ||
1489 | if (!pd) { | ||
1490 | pr_err("%s:Need to pass platform data\n", __func__); | ||
1491 | return; | ||
1492 | } | ||
1493 | |||
1494 | /* Reject invalid configuration */ | ||
1495 | if (!num_cs || src_clk_nr < 0) { | ||
1496 | pr_err("%s: Invalid SPI configuration\n", __func__); | ||
1497 | return; | ||
1498 | } | ||
1499 | |||
1500 | pd->num_cs = num_cs; | ||
1501 | pd->src_clk_nr = src_clk_nr; | ||
1502 | if (!pd->cfg_gpio) | ||
1503 | pd->cfg_gpio = s3c64xx_spi0_cfg_gpio; | ||
1504 | |||
1505 | s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0); | ||
1506 | } | ||
1507 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | ||
1508 | |||
1509 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | ||
1510 | static struct resource s3c64xx_spi1_resource[] = { | ||
1511 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | ||
1512 | [1] = DEFINE_RES_DMA(DMACH_SPI1_TX), | ||
1513 | [2] = DEFINE_RES_DMA(DMACH_SPI1_RX), | ||
1514 | [3] = DEFINE_RES_IRQ(IRQ_SPI1), | ||
1515 | }; | ||
1516 | |||
1517 | struct platform_device s3c64xx_device_spi1 = { | ||
1518 | .name = "s3c64xx-spi", | ||
1519 | .id = 1, | ||
1520 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | ||
1521 | .resource = s3c64xx_spi1_resource, | ||
1522 | .dev = { | ||
1523 | .dma_mask = &samsung_device_dma_mask, | ||
1524 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1525 | }, | ||
1526 | }; | ||
1527 | |||
1528 | void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, | ||
1529 | int src_clk_nr, int num_cs) | ||
1530 | { | ||
1531 | if (!pd) { | ||
1532 | pr_err("%s:Need to pass platform data\n", __func__); | ||
1533 | return; | ||
1534 | } | ||
1535 | |||
1536 | /* Reject invalid configuration */ | ||
1537 | if (!num_cs || src_clk_nr < 0) { | ||
1538 | pr_err("%s: Invalid SPI configuration\n", __func__); | ||
1539 | return; | ||
1540 | } | ||
1541 | |||
1542 | pd->num_cs = num_cs; | ||
1543 | pd->src_clk_nr = src_clk_nr; | ||
1544 | if (!pd->cfg_gpio) | ||
1545 | pd->cfg_gpio = s3c64xx_spi1_cfg_gpio; | ||
1546 | |||
1547 | s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1); | ||
1548 | } | ||
1549 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | ||
1550 | |||
1551 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | ||
1552 | static struct resource s3c64xx_spi2_resource[] = { | ||
1553 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | ||
1554 | [1] = DEFINE_RES_DMA(DMACH_SPI2_TX), | ||
1555 | [2] = DEFINE_RES_DMA(DMACH_SPI2_RX), | ||
1556 | [3] = DEFINE_RES_IRQ(IRQ_SPI2), | ||
1557 | }; | ||
1558 | |||
1559 | struct platform_device s3c64xx_device_spi2 = { | ||
1560 | .name = "s3c64xx-spi", | ||
1561 | .id = 2, | ||
1562 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | ||
1563 | .resource = s3c64xx_spi2_resource, | ||
1564 | .dev = { | ||
1565 | .dma_mask = &samsung_device_dma_mask, | ||
1566 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1567 | }, | ||
1568 | }; | ||
1569 | |||
1570 | void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, | ||
1571 | int src_clk_nr, int num_cs) | ||
1572 | { | ||
1573 | if (!pd) { | ||
1574 | pr_err("%s:Need to pass platform data\n", __func__); | ||
1575 | return; | ||
1576 | } | ||
1577 | |||
1578 | /* Reject invalid configuration */ | ||
1579 | if (!num_cs || src_clk_nr < 0) { | ||
1580 | pr_err("%s: Invalid SPI configuration\n", __func__); | ||
1581 | return; | ||
1582 | } | ||
1583 | |||
1584 | pd->num_cs = num_cs; | ||
1585 | pd->src_clk_nr = src_clk_nr; | ||
1586 | if (!pd->cfg_gpio) | ||
1587 | pd->cfg_gpio = s3c64xx_spi2_cfg_gpio; | ||
1588 | |||
1589 | s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2); | ||
1590 | } | ||
1591 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index ab633c9c2aec..83b1e31696d9 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -39,6 +39,7 @@ extern struct platform_device s3c64xx_device_pcm0; | |||
39 | extern struct platform_device s3c64xx_device_pcm1; | 39 | extern struct platform_device s3c64xx_device_pcm1; |
40 | extern struct platform_device s3c64xx_device_spi0; | 40 | extern struct platform_device s3c64xx_device_spi0; |
41 | extern struct platform_device s3c64xx_device_spi1; | 41 | extern struct platform_device s3c64xx_device_spi1; |
42 | extern struct platform_device s3c64xx_device_spi2; | ||
42 | 43 | ||
43 | extern struct platform_device s3c_device_adc; | 44 | extern struct platform_device s3c_device_adc; |
44 | extern struct platform_device s3c_device_cfcon; | 45 | extern struct platform_device s3c_device_cfcon; |
@@ -98,8 +99,6 @@ extern struct platform_device s5p6450_device_iis1; | |||
98 | extern struct platform_device s5p6450_device_iis2; | 99 | extern struct platform_device s5p6450_device_iis2; |
99 | extern struct platform_device s5p6450_device_pcm0; | 100 | extern struct platform_device s5p6450_device_pcm0; |
100 | 101 | ||
101 | extern struct platform_device s5p64x0_device_spi0; | ||
102 | extern struct platform_device s5p64x0_device_spi1; | ||
103 | 102 | ||
104 | extern struct platform_device s5pc100_device_ac97; | 103 | extern struct platform_device s5pc100_device_ac97; |
105 | extern struct platform_device s5pc100_device_iis0; | 104 | extern struct platform_device s5pc100_device_iis0; |
@@ -108,9 +107,6 @@ extern struct platform_device s5pc100_device_iis2; | |||
108 | extern struct platform_device s5pc100_device_pcm0; | 107 | extern struct platform_device s5pc100_device_pcm0; |
109 | extern struct platform_device s5pc100_device_pcm1; | 108 | extern struct platform_device s5pc100_device_pcm1; |
110 | extern struct platform_device s5pc100_device_spdif; | 109 | extern struct platform_device s5pc100_device_spdif; |
111 | extern struct platform_device s5pc100_device_spi0; | ||
112 | extern struct platform_device s5pc100_device_spi1; | ||
113 | extern struct platform_device s5pc100_device_spi2; | ||
114 | 110 | ||
115 | extern struct platform_device s5pv210_device_ac97; | 111 | extern struct platform_device s5pv210_device_ac97; |
116 | extern struct platform_device s5pv210_device_iis0; | 112 | extern struct platform_device s5pv210_device_iis0; |
@@ -120,8 +116,6 @@ extern struct platform_device s5pv210_device_pcm0; | |||
120 | extern struct platform_device s5pv210_device_pcm1; | 116 | extern struct platform_device s5pv210_device_pcm1; |
121 | extern struct platform_device s5pv210_device_pcm2; | 117 | extern struct platform_device s5pv210_device_pcm2; |
122 | extern struct platform_device s5pv210_device_spdif; | 118 | extern struct platform_device s5pv210_device_spdif; |
123 | extern struct platform_device s5pv210_device_spi0; | ||
124 | extern struct platform_device s5pv210_device_spi1; | ||
125 | 119 | ||
126 | extern struct platform_device exynos4_device_ac97; | 120 | extern struct platform_device exynos4_device_ac97; |
127 | extern struct platform_device exynos4_device_ahci; | 121 | extern struct platform_device exynos4_device_ahci; |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index 4c16fa3621bb..aea68b60ef98 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo { | |||
31 | /** | 31 | /** |
32 | * struct s3c64xx_spi_info - SPI Controller defining structure | 32 | * struct s3c64xx_spi_info - SPI Controller defining structure |
33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | 33 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. |
34 | * @src_clk_name: Platform name of the corresponding clock. | ||
35 | * @clk_from_cmu: If the SPI clock/prescalar control block is present | 34 | * @clk_from_cmu: If the SPI clock/prescalar control block is present |
36 | * by the platform's clock-management-unit and not in SPI controller. | 35 | * by the platform's clock-management-unit and not in SPI controller. |
37 | * @num_cs: Number of CS this controller emulates. | 36 | * @num_cs: Number of CS this controller emulates. |
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo { | |||
43 | */ | 42 | */ |
44 | struct s3c64xx_spi_info { | 43 | struct s3c64xx_spi_info { |
45 | int src_clk_nr; | 44 | int src_clk_nr; |
46 | char *src_clk_name; | ||
47 | bool clk_from_cmu; | 45 | bool clk_from_cmu; |
48 | 46 | ||
49 | int num_cs; | 47 | int num_cs; |
@@ -58,18 +56,28 @@ struct s3c64xx_spi_info { | |||
58 | }; | 56 | }; |
59 | 57 | ||
60 | /** | 58 | /** |
61 | * s3c64xx_spi_set_info - SPI Controller configure callback by the board | 59 | * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board |
62 | * initialization code. | 60 | * initialization code. |
63 | * @cntrlr: SPI controller number the configuration is for. | 61 | * @pd: SPI platform data to set. |
64 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. | 62 | * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. |
65 | * @num_cs: Number of elements in the 'cs' array. | 63 | * @num_cs: Number of elements in the 'cs' array. |
66 | * | 64 | * |
67 | * Call this from machine init code for each SPI Controller that | 65 | * Call this from machine init code for each SPI Controller that |
68 | * has some chips attached to it. | 66 | * has some chips attached to it. |
69 | */ | 67 | */ |
70 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 68 | extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd, |
71 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 69 | int src_clk_nr, int num_cs); |
72 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 70 | extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd, |
73 | extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 71 | int src_clk_nr, int num_cs); |
72 | extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd, | ||
73 | int src_clk_nr, int num_cs); | ||
74 | 74 | ||
75 | /* defined by architecture to configure gpio */ | ||
76 | extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev); | ||
77 | extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev); | ||
78 | extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev); | ||
79 | |||
80 | extern struct s3c64xx_spi_info s3c64xx_spi0_pdata; | ||
81 | extern struct s3c64xx_spi_info s3c64xx_spi1_pdata; | ||
82 | extern struct s3c64xx_spi_info s3c64xx_spi2_pdata; | ||
75 | #endif /* __S3C64XX_PLAT_SPI_H */ | 83 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index e7b3c752e919..dcff7dd1ae8a 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata { | |||
66 | enum cd_types cd_type; | 66 | enum cd_types cd_type; |
67 | enum clk_types clk_type; | 67 | enum clk_types clk_type; |
68 | 68 | ||
69 | char **clocks; /* set of clock sources */ | ||
70 | |||
71 | int ext_cd_gpio; | 69 | int ext_cd_gpio; |
72 | bool ext_cd_gpio_invert; | 70 | bool ext_cd_gpio_invert; |
73 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, | 71 | int (*ext_cd_init)(void (*notify_func)(struct platform_device *, |
@@ -129,12 +127,9 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); | |||
129 | /* S3C2416 SDHCI setup */ | 127 | /* S3C2416 SDHCI setup */ |
130 | 128 | ||
131 | #ifdef CONFIG_S3C2416_SETUP_SDHCI | 129 | #ifdef CONFIG_S3C2416_SETUP_SDHCI |
132 | extern char *s3c2416_hsmmc_clksrcs[4]; | ||
133 | |||
134 | static inline void s3c2416_default_sdhci0(void) | 130 | static inline void s3c2416_default_sdhci0(void) |
135 | { | 131 | { |
136 | #ifdef CONFIG_S3C_DEV_HSMMC | 132 | #ifdef CONFIG_S3C_DEV_HSMMC |
137 | s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
138 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; | 133 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; |
139 | #endif /* CONFIG_S3C_DEV_HSMMC */ | 134 | #endif /* CONFIG_S3C_DEV_HSMMC */ |
140 | } | 135 | } |
@@ -142,7 +137,6 @@ static inline void s3c2416_default_sdhci0(void) | |||
142 | static inline void s3c2416_default_sdhci1(void) | 137 | static inline void s3c2416_default_sdhci1(void) |
143 | { | 138 | { |
144 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 139 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
145 | s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; | ||
146 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; | 140 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; |
147 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | 141 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ |
148 | } | 142 | } |
@@ -155,12 +149,9 @@ static inline void s3c2416_default_sdhci1(void) { } | |||
155 | /* S3C64XX SDHCI setup */ | 149 | /* S3C64XX SDHCI setup */ |
156 | 150 | ||
157 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI | 151 | #ifdef CONFIG_S3C64XX_SETUP_SDHCI |
158 | extern char *s3c64xx_hsmmc_clksrcs[4]; | ||
159 | |||
160 | static inline void s3c6400_default_sdhci0(void) | 152 | static inline void s3c6400_default_sdhci0(void) |
161 | { | 153 | { |
162 | #ifdef CONFIG_S3C_DEV_HSMMC | 154 | #ifdef CONFIG_S3C_DEV_HSMMC |
163 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
164 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 155 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
165 | #endif | 156 | #endif |
166 | } | 157 | } |
@@ -168,7 +159,6 @@ static inline void s3c6400_default_sdhci0(void) | |||
168 | static inline void s3c6400_default_sdhci1(void) | 159 | static inline void s3c6400_default_sdhci1(void) |
169 | { | 160 | { |
170 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 161 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
171 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
172 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 162 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
173 | #endif | 163 | #endif |
174 | } | 164 | } |
@@ -176,7 +166,6 @@ static inline void s3c6400_default_sdhci1(void) | |||
176 | static inline void s3c6400_default_sdhci2(void) | 166 | static inline void s3c6400_default_sdhci2(void) |
177 | { | 167 | { |
178 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 168 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
179 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
180 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 169 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
181 | #endif | 170 | #endif |
182 | } | 171 | } |
@@ -184,7 +173,6 @@ static inline void s3c6400_default_sdhci2(void) | |||
184 | static inline void s3c6410_default_sdhci0(void) | 173 | static inline void s3c6410_default_sdhci0(void) |
185 | { | 174 | { |
186 | #ifdef CONFIG_S3C_DEV_HSMMC | 175 | #ifdef CONFIG_S3C_DEV_HSMMC |
187 | s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
188 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; | 176 | s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; |
189 | #endif | 177 | #endif |
190 | } | 178 | } |
@@ -192,7 +180,6 @@ static inline void s3c6410_default_sdhci0(void) | |||
192 | static inline void s3c6410_default_sdhci1(void) | 180 | static inline void s3c6410_default_sdhci1(void) |
193 | { | 181 | { |
194 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 182 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
195 | s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
196 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; | 183 | s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; |
197 | #endif | 184 | #endif |
198 | } | 185 | } |
@@ -200,7 +187,6 @@ static inline void s3c6410_default_sdhci1(void) | |||
200 | static inline void s3c6410_default_sdhci2(void) | 187 | static inline void s3c6410_default_sdhci2(void) |
201 | { | 188 | { |
202 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 189 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
203 | s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; | ||
204 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; | 190 | s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; |
205 | #endif | 191 | #endif |
206 | } | 192 | } |
@@ -218,12 +204,9 @@ static inline void s3c6400_default_sdhci2(void) { } | |||
218 | /* S5PC100 SDHCI setup */ | 204 | /* S5PC100 SDHCI setup */ |
219 | 205 | ||
220 | #ifdef CONFIG_S5PC100_SETUP_SDHCI | 206 | #ifdef CONFIG_S5PC100_SETUP_SDHCI |
221 | extern char *s5pc100_hsmmc_clksrcs[4]; | ||
222 | |||
223 | static inline void s5pc100_default_sdhci0(void) | 207 | static inline void s5pc100_default_sdhci0(void) |
224 | { | 208 | { |
225 | #ifdef CONFIG_S3C_DEV_HSMMC | 209 | #ifdef CONFIG_S3C_DEV_HSMMC |
226 | s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
227 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; | 210 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; |
228 | #endif | 211 | #endif |
229 | } | 212 | } |
@@ -231,7 +214,6 @@ static inline void s5pc100_default_sdhci0(void) | |||
231 | static inline void s5pc100_default_sdhci1(void) | 214 | static inline void s5pc100_default_sdhci1(void) |
232 | { | 215 | { |
233 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 216 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
234 | s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
235 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; | 217 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; |
236 | #endif | 218 | #endif |
237 | } | 219 | } |
@@ -239,7 +221,6 @@ static inline void s5pc100_default_sdhci1(void) | |||
239 | static inline void s5pc100_default_sdhci2(void) | 221 | static inline void s5pc100_default_sdhci2(void) |
240 | { | 222 | { |
241 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 223 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
242 | s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; | ||
243 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; | 224 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; |
244 | #endif | 225 | #endif |
245 | } | 226 | } |
@@ -254,12 +235,9 @@ static inline void s5pc100_default_sdhci2(void) { } | |||
254 | /* S5PV210 SDHCI setup */ | 235 | /* S5PV210 SDHCI setup */ |
255 | 236 | ||
256 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | 237 | #ifdef CONFIG_S5PV210_SETUP_SDHCI |
257 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
258 | |||
259 | static inline void s5pv210_default_sdhci0(void) | 238 | static inline void s5pv210_default_sdhci0(void) |
260 | { | 239 | { |
261 | #ifdef CONFIG_S3C_DEV_HSMMC | 240 | #ifdef CONFIG_S3C_DEV_HSMMC |
262 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
263 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | 241 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; |
264 | #endif | 242 | #endif |
265 | } | 243 | } |
@@ -267,7 +245,6 @@ static inline void s5pv210_default_sdhci0(void) | |||
267 | static inline void s5pv210_default_sdhci1(void) | 245 | static inline void s5pv210_default_sdhci1(void) |
268 | { | 246 | { |
269 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 247 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
270 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
271 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | 248 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; |
272 | #endif | 249 | #endif |
273 | } | 250 | } |
@@ -275,7 +252,6 @@ static inline void s5pv210_default_sdhci1(void) | |||
275 | static inline void s5pv210_default_sdhci2(void) | 252 | static inline void s5pv210_default_sdhci2(void) |
276 | { | 253 | { |
277 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 254 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
278 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
279 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | 255 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; |
280 | #endif | 256 | #endif |
281 | } | 257 | } |
@@ -283,7 +259,6 @@ static inline void s5pv210_default_sdhci2(void) | |||
283 | static inline void s5pv210_default_sdhci3(void) | 259 | static inline void s5pv210_default_sdhci3(void) |
284 | { | 260 | { |
285 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 261 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
286 | s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
287 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; | 262 | s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; |
288 | #endif | 263 | #endif |
289 | } | 264 | } |
@@ -298,12 +273,9 @@ static inline void s5pv210_default_sdhci3(void) { } | |||
298 | 273 | ||
299 | /* EXYNOS4 SDHCI setup */ | 274 | /* EXYNOS4 SDHCI setup */ |
300 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI | 275 | #ifdef CONFIG_EXYNOS4_SETUP_SDHCI |
301 | extern char *exynos4_hsmmc_clksrcs[4]; | ||
302 | |||
303 | static inline void exynos4_default_sdhci0(void) | 276 | static inline void exynos4_default_sdhci0(void) |
304 | { | 277 | { |
305 | #ifdef CONFIG_S3C_DEV_HSMMC | 278 | #ifdef CONFIG_S3C_DEV_HSMMC |
306 | s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
307 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; | 279 | s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; |
308 | #endif | 280 | #endif |
309 | } | 281 | } |
@@ -311,7 +283,6 @@ static inline void exynos4_default_sdhci0(void) | |||
311 | static inline void exynos4_default_sdhci1(void) | 283 | static inline void exynos4_default_sdhci1(void) |
312 | { | 284 | { |
313 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 285 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
314 | s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
315 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; | 286 | s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; |
316 | #endif | 287 | #endif |
317 | } | 288 | } |
@@ -319,7 +290,6 @@ static inline void exynos4_default_sdhci1(void) | |||
319 | static inline void exynos4_default_sdhci2(void) | 290 | static inline void exynos4_default_sdhci2(void) |
320 | { | 291 | { |
321 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 292 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
322 | s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
323 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; | 293 | s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; |
324 | #endif | 294 | #endif |
325 | } | 295 | } |
@@ -327,7 +297,6 @@ static inline void exynos4_default_sdhci2(void) | |||
327 | static inline void exynos4_default_sdhci3(void) | 297 | static inline void exynos4_default_sdhci3(void) |
328 | { | 298 | { |
329 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 299 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
330 | s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; | ||
331 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; | 300 | s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; |
332 | #endif | 301 | #endif |
333 | } | 302 | } |