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-rw-r--r--arch/arm/plat-samsung/Kconfig38
-rw-r--r--arch/arm/plat-samsung/Makefile7
-rw-r--r--arch/arm/plat-samsung/clock.c15
-rw-r--r--arch/arm/plat-samsung/dev-adc.c46
-rw-r--r--arch/arm/plat-samsung/dev-fb.c1
-rw-r--r--arch/arm/plat-samsung/dev-hwmon.c42
-rw-r--r--arch/arm/plat-samsung/dev-rtc.c43
-rw-r--r--arch/arm/plat-samsung/dev-ts.c61
-rw-r--r--arch/arm/plat-samsung/gpio-config.c159
-rw-r--r--arch/arm/plat-samsung/gpio.c15
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h4
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h16
-rw-r--r--arch/arm/plat-samsung/include/plat/dma.h4
-rw-r--r--arch/arm/plat-samsung/include/plat/fb.h7
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h58
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h41
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h19
-rw-r--r--arch/arm/plat-samsung/include/plat/hwmon.h10
-rw-r--r--arch/arm/plat-samsung/include/plat/pll6553x.h51
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h78
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h32
-rw-r--r--arch/arm/plat-samsung/include/plat/ts.h25
-rw-r--r--arch/arm/plat-samsung/pm-gpio.c4
-rw-r--r--arch/arm/plat-samsung/s3c-pl330.c1224
25 files changed, 1977 insertions, 25 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index d552c65fa1b0..229919e9744c 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -90,12 +90,6 @@ config S3C_GPIO_CFG_S3C64XX
90 Internal configuration to enable S3C64XX style GPIO configuration 90 Internal configuration to enable S3C64XX style GPIO configuration
91 functions. 91 functions.
92 92
93config S5P_GPIO_CFG_S5PC1XX
94 bool
95 help
96 Internal configuration to enable S5PC1XX style GPIO configuration
97 functions.
98
99config S3C_GPIO_PULL_UPDOWN 93config S3C_GPIO_PULL_UPDOWN
100 bool 94 bool
101 help 95 help
@@ -111,6 +105,12 @@ config S3C_GPIO_PULL_UP
111 help 105 help
112 Internal configuration to enable the correct GPIO pull helper 106 Internal configuration to enable the correct GPIO pull helper
113 107
108config S5P_GPIO_DRVSTR
109 bool
110 help
111 Internal configuration to get and set correct GPIO driver strength
112 helper
113
114config SAMSUNG_GPIO_EXTRA 114config SAMSUNG_GPIO_EXTRA
115 int "Number of additional GPIO pins" 115 int "Number of additional GPIO pins"
116 default 0 116 default 0
@@ -160,6 +160,11 @@ config S3C_DEV_HSMMC2
160 help 160 help
161 Compile in platform device definitions for HSMMC channel 2 161 Compile in platform device definitions for HSMMC channel 2
162 162
163config S3C_DEV_HWMON
164 bool
165 help
166 Compile in platform device definitions for HWMON
167
163config S3C_DEV_I2C1 168config S3C_DEV_I2C1
164 bool 169 bool
165 help 170 help
@@ -185,12 +190,27 @@ config S3C_DEV_NAND
185 help 190 help
186 Compile in platform device definition for NAND controller 191 Compile in platform device definition for NAND controller
187 192
193config S3C_DEV_RTC
194 bool
195 help
196 Complie in platform device definition for RTC
197
198config SAMSUNG_DEV_ADC
199 bool
200 help
201 Compile in platform device definition for ADC controller
202
188config S3C64XX_DEV_SPI 203config S3C64XX_DEV_SPI
189 bool 204 bool
190 help 205 help
191 Compile in platform device definitions for S3C64XX's type 206 Compile in platform device definitions for S3C64XX's type
192 SPI controllers. 207 SPI controllers.
193 208
209config SAMSUNG_DEV_TS
210 bool
211 help
212 Common in platform device definitions for touchscreen device
213
194# DMA 214# DMA
195 215
196config S3C_DMA 216config S3C_DMA
@@ -198,6 +218,12 @@ config S3C_DMA
198 help 218 help
199 Internal configuration for S3C DMA core 219 Internal configuration for S3C DMA core
200 220
221config S3C_PL330_DMA
222 bool
223 select PL330
224 help
225 S3C DMA API Driver for PL330 DMAC.
226
201comment "Power management" 227comment "Power management"
202 228
203config SAMSUNG_PM_DEBUG 229config SAMSUNG_PM_DEBUG
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 22c89d08f6e5..48288499a3b9 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_S3C_ADC) += adc.o
33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o 33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o 35obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
36obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o
36obj-y += dev-i2c0.o 37obj-y += dev-i2c0.o
37obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 38obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
38obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 39obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
@@ -40,11 +41,17 @@ obj-y += dev-uart.o
40obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o 41obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
41obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o 42obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
42obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o 43obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
44obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o
45
46obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o
47obj-$(CONFIG_SAMSUNG_DEV_TS) += dev-ts.o
43 48
44# DMA support 49# DMA support
45 50
46obj-$(CONFIG_S3C_DMA) += dma.o 51obj-$(CONFIG_S3C_DMA) += dma.o
47 52
53obj-$(CONFIG_S3C_PL330_DMA) += s3c-pl330.o
54
48# PM support 55# PM support
49 56
50obj-$(CONFIG_PM) += pm.o 57obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 1b25c9d8c403..8bf79f3efdfb 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -376,6 +376,21 @@ void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
376 } 376 }
377} 377}
378 378
379/**
380 * s3c_disable_clocks() - disable an array of clocks
381 * @clkp: Pointer to the first clock in the array.
382 * @nr_clks: Number of clocks to register.
383 *
384 * for internal use only at initialisation time. disable the clocks in the
385 * @clkp array.
386 */
387
388void __init s3c_disable_clocks(struct clk *clkp, int nr_clks)
389{
390 for (; nr_clks > 0; nr_clks--, clkp++)
391 (clkp->enable)(clkp, 0);
392}
393
379/* initalise all the clocks */ 394/* initalise all the clocks */
380 395
381int __init s3c24xx_register_baseclocks(unsigned long xtal) 396int __init s3c24xx_register_baseclocks(unsigned long xtal)
diff --git a/arch/arm/plat-samsung/dev-adc.c b/arch/arm/plat-samsung/dev-adc.c
new file mode 100644
index 000000000000..9d903d4095ed
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-adc.c
@@ -0,0 +1,46 @@
1/* linux/arch/arm/plat-samsung/dev-adc.c
2 *
3 * Copyright 2010 Maurus Cuelenaere
4 *
5 * S3C64xx series device definition for ADC device
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18
19#include <plat/adc.h>
20#include <plat/devs.h>
21#include <plat/cpu.h>
22
23static struct resource s3c_adc_resource[] = {
24 [0] = {
25 .start = SAMSUNG_PA_ADC,
26 .end = SAMSUNG_PA_ADC + SZ_256 - 1,
27 .flags = IORESOURCE_MEM,
28 },
29 [1] = {
30 .start = IRQ_TC,
31 .end = IRQ_TC,
32 .flags = IORESOURCE_IRQ,
33 },
34 [2] = {
35 .start = IRQ_ADC,
36 .end = IRQ_ADC,
37 .flags = IORESOURCE_IRQ,
38 },
39};
40
41struct platform_device s3c_device_adc = {
42 .name = "samsung-adc",
43 .id = -1,
44 .num_resources = ARRAY_SIZE(s3c_adc_resource),
45 .resource = s3c_adc_resource,
46};
diff --git a/arch/arm/plat-samsung/dev-fb.c b/arch/arm/plat-samsung/dev-fb.c
index 002a15f313f3..bf60204c6297 100644
--- a/arch/arm/plat-samsung/dev-fb.c
+++ b/arch/arm/plat-samsung/dev-fb.c
@@ -19,7 +19,6 @@
19 19
20#include <mach/irqs.h> 20#include <mach/irqs.h>
21#include <mach/map.h> 21#include <mach/map.h>
22#include <mach/regs-fb.h>
23 22
24#include <plat/fb.h> 23#include <plat/fb.h>
25#include <plat/devs.h> 24#include <plat/devs.h>
diff --git a/arch/arm/plat-samsung/dev-hwmon.c b/arch/arm/plat-samsung/dev-hwmon.c
new file mode 100644
index 000000000000..b3ffb9587250
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-hwmon.c
@@ -0,0 +1,42 @@
1/* linux/arch/arm/plat-samsung/dev-hwmon.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Adapted for HWMON by Maurus Cuelenaere
8 *
9 * Samsung series device definition for HWMON
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <plat/devs.h>
20#include <plat/hwmon.h>
21
22struct platform_device s3c_device_hwmon = {
23 .name = "s3c-hwmon",
24 .id = -1,
25 .dev.parent = &s3c_device_adc.dev,
26};
27
28void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
29{
30 struct s3c_hwmon_pdata *npd;
31
32 if (!pd) {
33 printk(KERN_ERR "%s: no platform data\n", __func__);
34 return;
35 }
36
37 npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL);
38 if (!npd)
39 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
40
41 s3c_device_hwmon.dev.platform_data = npd;
42}
diff --git a/arch/arm/plat-samsung/dev-rtc.c b/arch/arm/plat-samsung/dev-rtc.c
new file mode 100644
index 000000000000..bf4e2267333c
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-rtc.c
@@ -0,0 +1,43 @@
1/* linux/arch/arm/plat-samsung/dev-rtc.c
2 *
3 * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/kernel.h>
11#include <linux/string.h>
12#include <linux/platform_device.h>
13
14#include <mach/irqs.h>
15#include <mach/map.h>
16
17#include <plat/devs.h>
18
19static struct resource s3c_rtc_resource[] = {
20 [0] = {
21 .start = S3C_PA_RTC,
22 .end = S3C_PA_RTC + 0xff,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_RTC_ALARM,
27 .end = IRQ_RTC_ALARM,
28 .flags = IORESOURCE_IRQ,
29 },
30 [2] = {
31 .start = IRQ_RTC_TIC,
32 .end = IRQ_RTC_TIC,
33 .flags = IORESOURCE_IRQ
34 }
35};
36
37struct platform_device s3c_device_rtc = {
38 .name = "s3c64xx-rtc",
39 .id = -1,
40 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
41 .resource = s3c_rtc_resource,
42};
43EXPORT_SYMBOL(s3c_device_rtc);
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c
new file mode 100644
index 000000000000..236ef8427d7d
--- /dev/null
+++ b/arch/arm/plat-samsung/dev-ts.c
@@ -0,0 +1,61 @@
1/* linux/arch/arm/mach-s3c64xx/dev-ts.c
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
6 *
7 * Adapted by Maurus Cuelenaere for s3c64xx
8 *
9 * S3C64XX series device definition for touchscreen device
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/string.h>
18#include <linux/platform_device.h>
19
20#include <mach/irqs.h>
21#include <mach/map.h>
22
23#include <plat/devs.h>
24#include <plat/ts.h>
25
26static struct resource s3c_ts_resource[] = {
27 [0] = {
28 .start = SAMSUNG_PA_ADC,
29 .end = SAMSUNG_PA_ADC + SZ_256 - 1,
30 .flags = IORESOURCE_MEM,
31 },
32 [1] = {
33 .start = IRQ_TC,
34 .end = IRQ_TC,
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39struct platform_device s3c_device_ts = {
40 .name = "s3c64xx-ts",
41 .id = -1,
42 .num_resources = ARRAY_SIZE(s3c_ts_resource),
43 .resource = s3c_ts_resource,
44};
45
46void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
47{
48 struct s3c2410_ts_mach_info *npd;
49
50 if (!pd) {
51 printk(KERN_ERR "%s: no platform data\n", __func__);
52 return;
53 }
54
55 npd = kmemdup(pd, sizeof(struct s3c2410_ts_mach_info), GFP_KERNEL);
56 if (!npd)
57 printk(KERN_ERR "%s: no memory for platform data\n", __func__);
58
59 s3c_device_ts.dev.platform_data = npd;
60}
61EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 44a84e896546..57b68a50f45e 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -1,7 +1,7 @@
1/* linux/arch/arm/plat-s3c/gpio-config.c 1/* linux/arch/arm/plat-s3c/gpio-config.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008-2010 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
@@ -33,14 +33,34 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
33 33
34 offset = pin - chip->chip.base; 34 offset = pin - chip->chip.base;
35 35
36 local_irq_save(flags); 36 s3c_gpio_lock(chip, flags);
37 ret = s3c_gpio_do_setcfg(chip, offset, config); 37 ret = s3c_gpio_do_setcfg(chip, offset, config);
38 local_irq_restore(flags); 38 s3c_gpio_unlock(chip, flags);
39 39
40 return ret; 40 return ret;
41} 41}
42EXPORT_SYMBOL(s3c_gpio_cfgpin); 42EXPORT_SYMBOL(s3c_gpio_cfgpin);
43 43
44unsigned s3c_gpio_getcfg(unsigned int pin)
45{
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
47 unsigned long flags;
48 unsigned ret = 0;
49 int offset;
50
51 if (chip) {
52 offset = pin - chip->chip.base;
53
54 s3c_gpio_lock(chip, flags);
55 ret = s3c_gpio_do_getcfg(chip, offset);
56 s3c_gpio_unlock(chip, flags);
57 }
58
59 return ret;
60}
61EXPORT_SYMBOL(s3c_gpio_getcfg);
62
63
44int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) 64int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
45{ 65{
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); 66 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
@@ -52,17 +72,17 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
52 72
53 offset = pin - chip->chip.base; 73 offset = pin - chip->chip.base;
54 74
55 local_irq_save(flags); 75 s3c_gpio_lock(chip, flags);
56 ret = s3c_gpio_do_setpull(chip, offset, pull); 76 ret = s3c_gpio_do_setpull(chip, offset, pull);
57 local_irq_restore(flags); 77 s3c_gpio_unlock(chip, flags);
58 78
59 return ret; 79 return ret;
60} 80}
61EXPORT_SYMBOL(s3c_gpio_setpull); 81EXPORT_SYMBOL(s3c_gpio_setpull);
62 82
63#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX 83#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
64int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip, 84int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
65 unsigned int off, unsigned int cfg) 85 unsigned int off, unsigned int cfg)
66{ 86{
67 void __iomem *reg = chip->base; 87 void __iomem *reg = chip->base;
68 unsigned int shift = off; 88 unsigned int shift = off;
@@ -87,6 +107,19 @@ int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
87 return 0; 107 return 0;
88} 108}
89 109
110unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
111 unsigned int off)
112{
113 u32 con;
114
115 con = __raw_readl(chip->base);
116 con >>= off;
117 con &= 1;
118 con++;
119
120 return S3C_GPIO_SFN(con);
121}
122
90int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, 123int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
91 unsigned int off, unsigned int cfg) 124 unsigned int off, unsigned int cfg)
92{ 125{
@@ -109,6 +142,19 @@ int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
109 142
110 return 0; 143 return 0;
111} 144}
145
146unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
147 unsigned int off)
148{
149 u32 con;
150
151 con = __raw_readl(chip->base);
152 con >>= off * 2;
153 con &= 3;
154
155 /* this conversion works for IN and OUT as well as special mode */
156 return S3C_GPIO_SPECIAL(con);
157}
112#endif 158#endif
113 159
114#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX 160#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
@@ -134,6 +180,25 @@ int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
134 180
135 return 0; 181 return 0;
136} 182}
183
184unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
185 unsigned int off)
186{
187 void __iomem *reg = chip->base;
188 unsigned int shift = (off & 7) * 4;
189 u32 con;
190
191 if (off < 8 && chip->chip.ngpio > 8)
192 reg -= 4;
193
194 con = __raw_readl(reg);
195 con >>= shift;
196 con &= 0xf;
197
198 /* this conversion works for IN and OUT as well as special mode */
199 return S3C_GPIO_SPECIAL(con);
200}
201
137#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */ 202#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
138 203
139#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN 204#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
@@ -164,3 +229,83 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
164 return (__force s3c_gpio_pull_t)pup; 229 return (__force s3c_gpio_pull_t)pup;
165} 230}
166#endif 231#endif
232
233#ifdef CONFIG_S3C_GPIO_PULL_UP
234int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
235 unsigned int off, s3c_gpio_pull_t pull)
236{
237 void __iomem *reg = chip->base + 0x08;
238 u32 pup = __raw_readl(reg);
239
240 pup = __raw_readl(reg);
241
242 if (pup == S3C_GPIO_PULL_UP)
243 pup &= ~(1 << off);
244 else if (pup == S3C_GPIO_PULL_NONE)
245 pup |= (1 << off);
246 else
247 return -EINVAL;
248
249 __raw_writel(pup, reg);
250 return 0;
251}
252
253s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
254 unsigned int off)
255{
256 void __iomem *reg = chip->base + 0x08;
257 u32 pup = __raw_readl(reg);
258
259 pup &= (1 << off);
260 return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP;
261}
262#endif /* CONFIG_S3C_GPIO_PULL_UP */
263
264#ifdef CONFIG_S5P_GPIO_DRVSTR
265s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
266{
267 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
268 unsigned int off;
269 void __iomem *reg;
270 int shift;
271 u32 drvstr;
272
273 if (!chip)
274 return -EINVAL;
275
276 off = chip->chip.base - pin;
277 shift = off * 2;
278 reg = chip->base + 0x0C;
279
280 drvstr = __raw_readl(reg);
281 drvstr = 0xffff & (0x3 << shift);
282 drvstr = drvstr >> shift;
283
284 return (__force s5p_gpio_drvstr_t)drvstr;
285}
286EXPORT_SYMBOL(s5p_gpio_get_drvstr);
287
288int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
289{
290 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
291 unsigned int off;
292 void __iomem *reg;
293 int shift;
294 u32 tmp;
295
296 if (!chip)
297 return -EINVAL;
298
299 off = chip->chip.base - pin;
300 shift = off * 2;
301 reg = chip->base + 0x0C;
302
303 tmp = __raw_readl(reg);
304 tmp |= drvstr << shift;
305
306 __raw_writel(tmp, reg);
307
308 return 0;
309}
310EXPORT_SYMBOL(s5p_gpio_set_drvstr);
311#endif /* CONFIG_S5P_GPIO_DRVSTR */
diff --git a/arch/arm/plat-samsung/gpio.c b/arch/arm/plat-samsung/gpio.c
index 28d2ab8a08db..b83a83351cea 100644
--- a/arch/arm/plat-samsung/gpio.c
+++ b/arch/arm/plat-samsung/gpio.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/spinlock.h>
18 19
19#include <plat/gpio-core.h> 20#include <plat/gpio-core.h>
20 21
@@ -52,14 +53,14 @@ static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
52 unsigned long flags; 53 unsigned long flags;
53 unsigned long con; 54 unsigned long con;
54 55
55 local_irq_save(flags); 56 s3c_gpio_lock(ourchip, flags);
56 57
57 con = __raw_readl(base + 0x00); 58 con = __raw_readl(base + 0x00);
58 con &= ~(3 << (offset * 2)); 59 con &= ~(3 << (offset * 2));
59 60
60 __raw_writel(con, base + 0x00); 61 __raw_writel(con, base + 0x00);
61 62
62 local_irq_restore(flags); 63 s3c_gpio_unlock(ourchip, flags);
63 return 0; 64 return 0;
64} 65}
65 66
@@ -72,7 +73,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
72 unsigned long dat; 73 unsigned long dat;
73 unsigned long con; 74 unsigned long con;
74 75
75 local_irq_save(flags); 76 s3c_gpio_lock(ourchip, flags);
76 77
77 dat = __raw_readl(base + 0x04); 78 dat = __raw_readl(base + 0x04);
78 dat &= ~(1 << offset); 79 dat &= ~(1 << offset);
@@ -87,7 +88,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
87 __raw_writel(con, base + 0x00); 88 __raw_writel(con, base + 0x00);
88 __raw_writel(dat, base + 0x04); 89 __raw_writel(dat, base + 0x04);
89 90
90 local_irq_restore(flags); 91 s3c_gpio_unlock(ourchip, flags);
91 return 0; 92 return 0;
92} 93}
93 94
@@ -99,7 +100,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
99 unsigned long flags; 100 unsigned long flags;
100 unsigned long dat; 101 unsigned long dat;
101 102
102 local_irq_save(flags); 103 s3c_gpio_lock(ourchip, flags);
103 104
104 dat = __raw_readl(base + 0x04); 105 dat = __raw_readl(base + 0x04);
105 dat &= ~(1 << offset); 106 dat &= ~(1 << offset);
@@ -107,7 +108,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
107 dat |= 1 << offset; 108 dat |= 1 << offset;
108 __raw_writel(dat, base + 0x04); 109 __raw_writel(dat, base + 0x04);
109 110
110 local_irq_restore(flags); 111 s3c_gpio_unlock(ourchip, flags);
111} 112}
112 113
113static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) 114static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
@@ -131,6 +132,8 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
131 BUG_ON(!gc->label); 132 BUG_ON(!gc->label);
132 BUG_ON(!gc->ngpio); 133 BUG_ON(!gc->ngpio);
133 134
135 spin_lock_init(&chip->lock);
136
134 if (!gc->direction_input) 137 if (!gc->direction_input)
135 gc->direction_input = s3c_gpiolib_input; 138 gc->direction_input = s3c_gpiolib_input;
136 if (!gc->direction_output) 139 if (!gc->direction_output)
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 60b62692ac7a..0fbcd0effd8e 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -74,6 +74,7 @@ extern struct clk clk_ext;
74extern struct clk clk_h2; 74extern struct clk clk_h2;
75extern struct clk clk_27m; 75extern struct clk clk_27m;
76extern struct clk clk_48m; 76extern struct clk clk_48m;
77extern struct clk clk_xusbxti;
77 78
78extern int clk_default_setrate(struct clk *clk, unsigned long rate); 79extern int clk_default_setrate(struct clk *clk, unsigned long rate);
79extern struct clk_ops clk_ops_def_setrate; 80extern struct clk_ops clk_ops_def_setrate;
@@ -91,6 +92,7 @@ extern int s3c24xx_register_clock(struct clk *clk);
91extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); 92extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
92 93
93extern void s3c_register_clocks(struct clk *clk, int nr_clks); 94extern void s3c_register_clocks(struct clk *clk, int nr_clks);
95extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
94 96
95extern int s3c24xx_register_baseclocks(unsigned long xtal); 97extern int s3c24xx_register_baseclocks(unsigned long xtal);
96 98
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index d316b4a579f4..6412933d6fbb 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -73,11 +73,15 @@ extern struct sys_timer s3c24xx_timer;
73extern struct sysdev_class s3c2410_sysclass; 73extern struct sysdev_class s3c2410_sysclass;
74extern struct sysdev_class s3c2410a_sysclass; 74extern struct sysdev_class s3c2410a_sysclass;
75extern struct sysdev_class s3c2412_sysclass; 75extern struct sysdev_class s3c2412_sysclass;
76extern struct sysdev_class s3c2416_sysclass;
76extern struct sysdev_class s3c2440_sysclass; 77extern struct sysdev_class s3c2440_sysclass;
77extern struct sysdev_class s3c2442_sysclass; 78extern struct sysdev_class s3c2442_sysclass;
78extern struct sysdev_class s3c2443_sysclass; 79extern struct sysdev_class s3c2443_sysclass;
79extern struct sysdev_class s3c6410_sysclass; 80extern struct sysdev_class s3c6410_sysclass;
80extern struct sysdev_class s3c64xx_sysclass; 81extern struct sysdev_class s3c64xx_sysclass;
82extern struct sysdev_class s5p6440_sysclass;
83extern struct sysdev_class s5p6442_sysclass;
84extern struct sysdev_class s5pv210_sysclass;
81 85
82extern void (*s5pc1xx_idle)(void); 86extern void (*s5pc1xx_idle)(void);
83 87
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 796d24258313..ef69e56b2885 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -64,6 +64,22 @@ extern struct platform_device s3c_device_nand;
64extern struct platform_device s3c_device_usbgadget; 64extern struct platform_device s3c_device_usbgadget;
65extern struct platform_device s3c_device_usb_hsotg; 65extern struct platform_device s3c_device_usb_hsotg;
66 66
67extern struct platform_device s5pv210_device_ac97;
68extern struct platform_device s5pv210_device_pcm0;
69extern struct platform_device s5pv210_device_pcm1;
70extern struct platform_device s5pv210_device_pcm2;
71extern struct platform_device s5pv210_device_iis0;
72extern struct platform_device s5pv210_device_iis1;
73extern struct platform_device s5pv210_device_iis2;
74
75extern struct platform_device s5p6442_device_pcm0;
76extern struct platform_device s5p6442_device_pcm1;
77extern struct platform_device s5p6442_device_iis0;
78extern struct platform_device s5p6442_device_iis1;
79
80extern struct platform_device s5p6440_device_pcm;
81extern struct platform_device s5p6440_device_iis;
82
67/* s3c2440 specific devices */ 83/* s3c2440 specific devices */
68 84
69#ifdef CONFIG_CPU_S3C2440 85#ifdef CONFIG_CPU_S3C2440
diff --git a/arch/arm/plat-samsung/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index 7584d751ed51..2e8f8c6560d7 100644
--- a/arch/arm/plat-samsung/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -110,8 +110,8 @@ extern int s3c2410_dma_config(unsigned int channel, int xferunit);
110 * configure the device we're talking to 110 * configure the device we're talking to
111*/ 111*/
112 112
113extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, 113extern int s3c2410_dma_devconfig(unsigned int channel,
114 unsigned long devaddr); 114 enum s3c2410_dmasrc source, unsigned long devaddr);
115 115
116/* s3c2410_dma_getposition 116/* s3c2410_dma_getposition
117 * 117 *
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index ffc01a76b7ce..1f85649d8c18 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -15,6 +15,13 @@
15#ifndef __PLAT_S3C_FB_H 15#ifndef __PLAT_S3C_FB_H
16#define __PLAT_S3C_FB_H __FILE__ 16#define __PLAT_S3C_FB_H __FILE__
17 17
18/* S3C_FB_MAX_WIN
19 * Set to the maximum number of windows that any of the supported hardware
20 * can use. Since the platform data uses this for an array size, having it
21 * set to the maximum of any version of the hardware can do is safe.
22 */
23#define S3C_FB_MAX_WIN (5)
24
18/** 25/**
19 * struct s3c_fb_pd_win - per window setup data 26 * struct s3c_fb_pd_win - per window setup data
20 * @win_mode: The display parameters to initialise (not for window 0) 27 * @win_mode: The display parameters to initialise (not for window 0)
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index dda19da037ad..3e21c75feefa 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -30,6 +30,12 @@ static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip,
30 return (chip->config->set_config)(chip, off, config); 30 return (chip->config->set_config)(chip, off, config);
31} 31}
32 32
33static inline unsigned s3c_gpio_do_getcfg(struct s3c_gpio_chip *chip,
34 unsigned int off)
35{
36 return (chip->config->get_config)(chip, off);
37}
38
33static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, 39static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip,
34 unsigned int off, s3c_gpio_pull_t pull) 40 unsigned int off, s3c_gpio_pull_t pull)
35{ 41{
@@ -53,6 +59,18 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
53 unsigned int off, unsigned int cfg); 59 unsigned int off, unsigned int cfg);
54 60
55/** 61/**
62 * s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read.
63 * @chip: The gpio chip that is being configured.
64 * @off: The offset for the GPIO being configured.
65 *
66 * The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg
67 * could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the
68 * S3C_GPIO_SPECIAL() macro.
69 */
70unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
71 unsigned int off);
72
73/**
56 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) 74 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
57 * @chip: The gpio chip that is being configured. 75 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured. 76 * @off: The offset for the GPIO being configured.
@@ -65,6 +83,21 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
65extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, 83extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
66 unsigned int off, unsigned int cfg); 84 unsigned int off, unsigned int cfg);
67 85
86
87/**
88 * s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A)
89 * @chip: The gpio chip that is being configured.
90 * @off: The offset for the GPIO being configured.
91 *
92 * The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable
93 * GPIO configuration value.
94 *
95 * @sa s3c_gpio_getcfg_s3c24xx
96 * @sa s3c_gpio_getcfg_s3c64xx_4bit
97 */
98extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
99 unsigned int off);
100
68/** 101/**
69 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. 102 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
70 * @chip: The gpio chip that is being configured. 103 * @chip: The gpio chip that is being configured.
@@ -85,6 +118,20 @@ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
85 unsigned int off, unsigned int cfg); 118 unsigned int off, unsigned int cfg);
86 119
87 120
121/**
122 * s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read.
123 * @chip: The gpio chip that is being configured.
124 * @off: The offset for the GPIO being configured.
125 *
126 * The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration
127 * register setting into a value the software can use, such as could be passed
128 * to s3c_gpio_setcfg_s3c64xx_4bit().
129 *
130 * @sa s3c_gpio_getcfg_s3c24xx
131 */
132extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
133 unsigned int off);
134
88/* Pull-{up,down} resistor controls. 135/* Pull-{up,down} resistor controls.
89 * 136 *
90 * S3C2410,S3C2440,S3C24A0 = Pull-UP, 137 * S3C2410,S3C2440,S3C24A0 = Pull-UP,
@@ -146,6 +193,17 @@ extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
146 unsigned int off); 193 unsigned int off);
147 194
148/** 195/**
196 * s3c_gpio_getpull_1up() - Get configuration for choice of up or none
197 * @chip: The gpio chip that the GPIO pin belongs to
198 * @off: The offset to the pin to get the configuration of.
199 *
200 * This helper function reads the state of the pull-up resistor for the
201 * given GPIO in the same case as s3c_gpio_setpull_1up.
202*/
203extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
204 unsigned int off);
205
206/**
149 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. 207 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443.
150 * @chip: The gpio chip that is being configured. 208 * @chip: The gpio chip that is being configured.
151 * @off: The offset for the GPIO being configured. 209 * @off: The offset for the GPIO being configured.
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 29cd6a86cade..34efdd2b032c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -25,6 +25,7 @@
25#define __PLAT_GPIO_CFG_H __FILE__ 25#define __PLAT_GPIO_CFG_H __FILE__
26 26
27typedef unsigned int __bitwise__ s3c_gpio_pull_t; 27typedef unsigned int __bitwise__ s3c_gpio_pull_t;
28typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
28 29
29/* forward declaration if gpio-core.h hasn't been included */ 30/* forward declaration if gpio-core.h hasn't been included */
30struct s3c_gpio_chip; 31struct s3c_gpio_chip;
@@ -77,6 +78,17 @@ struct s3c_gpio_cfg {
77 */ 78 */
78extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); 79extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
79 80
81/**
82 * s3c_gpio_getcfg - Read the current function for a GPIO pin
83 * @pin: The pin to read the configuration value for.
84 *
85 * Read the configuration state of the given @pin, returning a value that
86 * could be passed back to s3c_gpio_cfgpin().
87 *
88 * @sa s3c_gpio_cfgpin
89 */
90extern unsigned s3c_gpio_getcfg(unsigned int pin);
91
80/* Define values for the pull-{up,down} available for each gpio pin. 92/* Define values for the pull-{up,down} available for each gpio pin.
81 * 93 *
82 * These values control the state of the weak pull-{up,down} resistors 94 * These values control the state of the weak pull-{up,down} resistors
@@ -107,4 +119,33 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
107*/ 119*/
108extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); 120extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
109 121
122/* Define values for the drvstr available for each gpio pin.
123 *
124 * These values control the value of the output signal driver strength,
125 * configurable on most pins on the S5C series.
126 */
127#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00)
128#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01)
129#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10)
130#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11)
131
132/**
133 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
134 * @pin: The pin number to get the settings for
135 *
136 * Read the driver streght value for the specified pin.
137*/
138extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
139
140/**
141 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
142 * @pin: The pin number to configure the driver streght value
143 * @drvstr: The new value of the driver strength
144 *
145 * This function sets the driver strength value for the specified pin.
146 * It will return 0 if successfull, or a negative error code if the pin
147 * cannot support the requested setting.
148*/
149extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
150
110#endif /* __PLAT_GPIO_CFG_H */ 151#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index 49ff406a7066..e358c7da8480 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -44,16 +44,26 @@ struct s3c_gpio_cfg;
44 * @chip: The chip structure to be exported via gpiolib. 44 * @chip: The chip structure to be exported via gpiolib.
45 * @base: The base pointer to the gpio configuration registers. 45 * @base: The base pointer to the gpio configuration registers.
46 * @config: special function and pull-resistor control information. 46 * @config: special function and pull-resistor control information.
47 * @lock: Lock for exclusive access to this gpio bank.
47 * @pm_save: Save information for suspend/resume support. 48 * @pm_save: Save information for suspend/resume support.
48 * 49 *
49 * This wrapper provides the necessary information for the Samsung 50 * This wrapper provides the necessary information for the Samsung
50 * specific gpios being registered with gpiolib. 51 * specific gpios being registered with gpiolib.
52 *
53 * The lock protects each gpio bank from multiple access of the shared
54 * configuration registers, or from reading of data whilst another thread
55 * is writing to the register set.
56 *
57 * Each chip has its own lock to avoid any contention between different
58 * CPU cores trying to get one lock for different GPIO banks, where each
59 * bank of GPIO has its own register space and configuration registers.
51 */ 60 */
52struct s3c_gpio_chip { 61struct s3c_gpio_chip {
53 struct gpio_chip chip; 62 struct gpio_chip chip;
54 struct s3c_gpio_cfg *config; 63 struct s3c_gpio_cfg *config;
55 struct s3c_gpio_pm *pm; 64 struct s3c_gpio_pm *pm;
56 void __iomem *base; 65 void __iomem *base;
66 spinlock_t lock;
57#ifdef CONFIG_PM 67#ifdef CONFIG_PM
58 u32 pm_save[4]; 68 u32 pm_save[4];
59#endif 69#endif
@@ -97,7 +107,7 @@ extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
97 * others = Special functions (dependant on bank) 107 * others = Special functions (dependant on bank)
98 * 108 *
99 * Note, since the code to deal with the case where there are two control 109 * Note, since the code to deal with the case where there are two control
100 * registers instead of one, we do not have a seperate set of function 110 * registers instead of one, we do not have a separate set of function
101 * (samsung_gpiolib_add_4bit2_chips)for each case. 111 * (samsung_gpiolib_add_4bit2_chips)for each case.
102 */ 112 */
103extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip, 113extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip,
@@ -108,6 +118,9 @@ extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip,
108extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); 118extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip);
109extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); 119extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
110 120
121/* exported for core SoC support to change */
122extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
123
111#ifdef CONFIG_S3C_GPIO_TRACK 124#ifdef CONFIG_S3C_GPIO_TRACK
112extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; 125extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
113 126
@@ -135,3 +148,7 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit;
135#define __gpio_pm(x) NULL 148#define __gpio_pm(x) NULL
136 149
137#endif /* CONFIG_PM */ 150#endif /* CONFIG_PM */
151
152/* locking wrappers to deal with multiple access to the same gpio bank */
153#define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
154#define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
diff --git a/arch/arm/plat-samsung/include/plat/hwmon.h b/arch/arm/plat-samsung/include/plat/hwmon.h
index 1ba88ea0aa31..c167e4429bc7 100644
--- a/arch/arm/plat-samsung/include/plat/hwmon.h
+++ b/arch/arm/plat-samsung/include/plat/hwmon.h
@@ -37,5 +37,15 @@ struct s3c_hwmon_pdata {
37 struct s3c_hwmon_chcfg *in[8]; 37 struct s3c_hwmon_chcfg *in[8];
38}; 38};
39 39
40/**
41 * s3c_hwmon_set_platdata - Set platform data for S3C HWMON device
42 * @pd: Platform data to register to device.
43 *
44 * Register the given platform data for use with the S3C HWMON device.
45 * The call will copy the platform data, so the board definitions can
46 * make the structure itself __initdata.
47 */
48extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
49
40#endif /* __ASM_ARCH_ADC_HWMON_H */ 50#endif /* __ASM_ARCH_ADC_HWMON_H */
41 51
diff --git a/arch/arm/plat-samsung/include/plat/pll6553x.h b/arch/arm/plat-samsung/include/plat/pll6553x.h
new file mode 100644
index 000000000000..b8b7e1d884f8
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/pll6553x.h
@@ -0,0 +1,51 @@
1/* arch/arm/plat-samsung/include/plat/pll6553x.h
2 * partially from arch/arm/mach-s3c64xx/include/mach/pll.h
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * Samsung PLL6553x PLL code
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16/* S3C6400 and compatible (S3C2416, etc.) EPLL code */
17
18#define PLL6553X_MDIV_MASK ((1 << (23-16)) - 1)
19#define PLL6553X_PDIV_MASK ((1 << (13-8)) - 1)
20#define PLL6553X_SDIV_MASK ((1 << (2-0)) - 1)
21#define PLL6553X_MDIV_SHIFT (16)
22#define PLL6553X_PDIV_SHIFT (8)
23#define PLL6553X_SDIV_SHIFT (0)
24#define PLL6553X_KDIV_MASK (0xffff)
25
26static inline unsigned long s3c_get_pll6553x(unsigned long baseclk,
27 u32 pll0, u32 pll1)
28{
29 unsigned long result;
30 u32 mdiv, pdiv, sdiv, kdiv;
31 u64 tmp;
32
33 mdiv = (pll0 >> PLL6553X_MDIV_SHIFT) & PLL6553X_MDIV_MASK;
34 pdiv = (pll0 >> PLL6553X_PDIV_SHIFT) & PLL6553X_PDIV_MASK;
35 sdiv = (pll0 >> PLL6553X_SDIV_SHIFT) & PLL6553X_SDIV_MASK;
36 kdiv = pll1 & PLL6553X_KDIV_MASK;
37
38 /* We need to multiple baseclk by mdiv (the integer part) and kdiv
39 * which is in 2^16ths, so shift mdiv up (does not overflow) and
40 * add kdiv before multiplying. The use of tmp is to avoid any
41 * overflows before shifting bac down into result when multipling
42 * by the mdiv and kdiv pair.
43 */
44
45 tmp = baseclk;
46 tmp *= (mdiv << 16) + kdiv;
47 do_div(tmp, (pdiv << sdiv));
48 result = tmp >> 16;
49
50 return result;
51}
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
new file mode 100644
index 000000000000..5fe6721b57f7
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
@@ -0,0 +1,78 @@
1/*
2 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
3 * Jaswinder Singh <jassi.brar@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#ifndef __S3C_DMA_PL330_H_
12#define __S3C_DMA_PL330_H_
13
14#define S3C2410_DMAF_AUTOSTART (1 << 0)
15#define S3C2410_DMAF_CIRCULAR (1 << 1)
16
17/*
18 * PL330 can assign any channel to communicate with
19 * any of the peripherals attched to the DMAC.
20 * For the sake of consistency across client drivers,
21 * We keep the channel names unchanged and only add
22 * missing peripherals are added.
23 * Order is not important since S3C PL330 API driver
24 * use these just as IDs.
25 */
26enum dma_ch {
27 DMACH_UART0_RX,
28 DMACH_UART0_TX,
29 DMACH_UART1_RX,
30 DMACH_UART1_TX,
31 DMACH_UART2_RX,
32 DMACH_UART2_TX,
33 DMACH_UART3_RX,
34 DMACH_UART3_TX,
35 DMACH_IRDA,
36 DMACH_I2S0_RX,
37 DMACH_I2S0_TX,
38 DMACH_I2S0S_TX,
39 DMACH_I2S1_RX,
40 DMACH_I2S1_TX,
41 DMACH_I2S2_RX,
42 DMACH_I2S2_TX,
43 DMACH_SPI0_RX,
44 DMACH_SPI0_TX,
45 DMACH_SPI1_RX,
46 DMACH_SPI1_TX,
47 DMACH_SPI2_RX,
48 DMACH_SPI2_TX,
49 DMACH_AC97_MICIN,
50 DMACH_AC97_PCMIN,
51 DMACH_AC97_PCMOUT,
52 DMACH_EXTERNAL,
53 DMACH_PWM,
54 DMACH_SPDIF,
55 DMACH_HSI_RX,
56 DMACH_HSI_TX,
57 DMACH_PCM0_TX,
58 DMACH_PCM0_RX,
59 DMACH_PCM1_TX,
60 DMACH_PCM1_RX,
61 DMACH_PCM2_TX,
62 DMACH_PCM2_RX,
63 DMACH_MSM_REQ3,
64 DMACH_MSM_REQ2,
65 DMACH_MSM_REQ1,
66 DMACH_MSM_REQ0,
67 /* END Marker, also used to denote a reserved channel */
68 DMACH_MAX,
69};
70
71static inline bool s3c_dma_has_circular(void)
72{
73 return true;
74}
75
76#include <plat/dma.h>
77
78#endif /* __S3C_DMA_PL330_H_ */
diff --git a/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h b/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h
new file mode 100644
index 000000000000..bf5e2a9d408d
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h
@@ -0,0 +1,32 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c-pl330-pdata.h
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __S3C_PL330_PDATA_H
13#define __S3C_PL330_PDATA_H
14
15#include <plat/s3c-dma-pl330.h>
16
17/*
18 * Every PL330 DMAC has max 32 peripheral interfaces,
19 * of which some may be not be really used in your
20 * DMAC's configuration.
21 * Populate this array of 32 peri i/fs with relevant
22 * channel IDs for used peri i/f and DMACH_MAX for
23 * those unused.
24 *
25 * The platforms just need to provide this info
26 * to the S3C DMA API driver for PL330.
27 */
28struct s3c_pl330_platdata {
29 enum dma_ch peri[32];
30};
31
32#endif /* __S3C_PL330_PDATA_H */
diff --git a/arch/arm/plat-samsung/include/plat/ts.h b/arch/arm/plat-samsung/include/plat/ts.h
new file mode 100644
index 000000000000..26fdb22e0fc2
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/ts.h
@@ -0,0 +1,25 @@
1/* arch/arm/plat-samsung/include/plat/ts.h
2 *
3 * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
10#ifndef __ASM_ARM_TS_H
11#define __ASM_ARM_TS_H
12
13struct s3c2410_ts_mach_info {
14 int delay;
15 int presc;
16 int oversampling_shift;
17 void (*cfg_gpio)(struct platform_device *dev);
18};
19
20extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *);
21
22/* defined by architecture to configure gpio */
23extern void s3c24xx_ts_cfg_gpio(struct platform_device *dev);
24
25#endif /* __ASM_ARM_TS_H */
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index 69a4c7f02e25..d50ab9d2af53 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -329,7 +329,7 @@ void s3c_pm_save_gpios(void)
329 struct s3c_gpio_chip *ourchip; 329 struct s3c_gpio_chip *ourchip;
330 unsigned int gpio_nr; 330 unsigned int gpio_nr;
331 331
332 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { 332 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
333 ourchip = s3c_gpiolib_getchip(gpio_nr); 333 ourchip = s3c_gpiolib_getchip(gpio_nr);
334 if (!ourchip) 334 if (!ourchip)
335 continue; 335 continue;
@@ -367,7 +367,7 @@ void s3c_pm_restore_gpios(void)
367 struct s3c_gpio_chip *ourchip; 367 struct s3c_gpio_chip *ourchip;
368 unsigned int gpio_nr; 368 unsigned int gpio_nr;
369 369
370 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { 370 for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) {
371 ourchip = s3c_gpiolib_getchip(gpio_nr); 371 ourchip = s3c_gpiolib_getchip(gpio_nr);
372 if (!ourchip) 372 if (!ourchip)
373 continue; 373 continue;
diff --git a/arch/arm/plat-samsung/s3c-pl330.c b/arch/arm/plat-samsung/s3c-pl330.c
new file mode 100644
index 000000000000..a91305a60aed
--- /dev/null
+++ b/arch/arm/plat-samsung/s3c-pl330.c
@@ -0,0 +1,1224 @@
1/* linux/arch/arm/plat-samsung/s3c-pl330.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18
19#include <asm/hardware/pl330.h>
20
21#include <plat/s3c-pl330-pdata.h>
22
23/**
24 * struct s3c_pl330_dmac - Logical representation of a PL330 DMAC.
25 * @busy_chan: Number of channels currently busy.
26 * @peri: List of IDs of peripherals this DMAC can work with.
27 * @node: To attach to the global list of DMACs.
28 * @pi: PL330 configuration info for the DMAC.
29 * @kmcache: Pool to quickly allocate xfers for all channels in the dmac.
30 */
31struct s3c_pl330_dmac {
32 unsigned busy_chan;
33 enum dma_ch *peri;
34 struct list_head node;
35 struct pl330_info *pi;
36 struct kmem_cache *kmcache;
37};
38
39/**
40 * struct s3c_pl330_xfer - A request submitted by S3C DMA clients.
41 * @token: Xfer ID provided by the client.
42 * @node: To attach to the list of xfers on a channel.
43 * @px: Xfer for PL330 core.
44 * @chan: Owner channel of this xfer.
45 */
46struct s3c_pl330_xfer {
47 void *token;
48 struct list_head node;
49 struct pl330_xfer px;
50 struct s3c_pl330_chan *chan;
51};
52
53/**
54 * struct s3c_pl330_chan - Logical channel to communicate with
55 * a Physical peripheral.
56 * @pl330_chan_id: Token of a hardware channel thread of PL330 DMAC.
57 * NULL if the channel is available to be acquired.
58 * @id: ID of the peripheral that this channel can communicate with.
59 * @options: Options specified by the client.
60 * @sdaddr: Address provided via s3c2410_dma_devconfig.
61 * @node: To attach to the global list of channels.
62 * @lrq: Pointer to the last submitted pl330_req to PL330 core.
63 * @xfer_list: To manage list of xfers enqueued.
64 * @req: Two requests to communicate with the PL330 engine.
65 * @callback_fn: Callback function to the client.
66 * @rqcfg: Channel configuration for the xfers.
67 * @xfer_head: Pointer to the xfer to be next excecuted.
68 * @dmac: Pointer to the DMAC that manages this channel, NULL if the
69 * channel is available to be acquired.
70 * @client: Client of this channel. NULL if the
71 * channel is available to be acquired.
72 */
73struct s3c_pl330_chan {
74 void *pl330_chan_id;
75 enum dma_ch id;
76 unsigned int options;
77 unsigned long sdaddr;
78 struct list_head node;
79 struct pl330_req *lrq;
80 struct list_head xfer_list;
81 struct pl330_req req[2];
82 s3c2410_dma_cbfn_t callback_fn;
83 struct pl330_reqcfg rqcfg;
84 struct s3c_pl330_xfer *xfer_head;
85 struct s3c_pl330_dmac *dmac;
86 struct s3c2410_dma_client *client;
87};
88
89/* All DMACs in the platform */
90static LIST_HEAD(dmac_list);
91
92/* All channels to peripherals in the platform */
93static LIST_HEAD(chan_list);
94
95/*
96 * Since we add resources(DMACs and Channels) to the global pool,
97 * we need to guard access to the resources using a global lock
98 */
99static DEFINE_SPINLOCK(res_lock);
100
101/* Returns the channel with ID 'id' in the chan_list */
102static struct s3c_pl330_chan *id_to_chan(const enum dma_ch id)
103{
104 struct s3c_pl330_chan *ch;
105
106 list_for_each_entry(ch, &chan_list, node)
107 if (ch->id == id)
108 return ch;
109
110 return NULL;
111}
112
113/* Allocate a new channel with ID 'id' and add to chan_list */
114static void chan_add(const enum dma_ch id)
115{
116 struct s3c_pl330_chan *ch = id_to_chan(id);
117
118 /* Return if the channel already exists */
119 if (ch)
120 return;
121
122 ch = kmalloc(sizeof(*ch), GFP_KERNEL);
123 /* Return silently to work with other channels */
124 if (!ch)
125 return;
126
127 ch->id = id;
128 ch->dmac = NULL;
129
130 list_add_tail(&ch->node, &chan_list);
131}
132
133/* If the channel is not yet acquired by any client */
134static bool chan_free(struct s3c_pl330_chan *ch)
135{
136 if (!ch)
137 return false;
138
139 /* Channel points to some DMAC only when it's acquired */
140 return ch->dmac ? false : true;
141}
142
143/*
144 * Returns 0 is peripheral i/f is invalid or not present on the dmac.
145 * Index + 1, otherwise.
146 */
147static unsigned iface_of_dmac(struct s3c_pl330_dmac *dmac, enum dma_ch ch_id)
148{
149 enum dma_ch *id = dmac->peri;
150 int i;
151
152 /* Discount invalid markers */
153 if (ch_id == DMACH_MAX)
154 return 0;
155
156 for (i = 0; i < PL330_MAX_PERI; i++)
157 if (id[i] == ch_id)
158 return i + 1;
159
160 return 0;
161}
162
163/* If all channel threads of the DMAC are busy */
164static inline bool dmac_busy(struct s3c_pl330_dmac *dmac)
165{
166 struct pl330_info *pi = dmac->pi;
167
168 return (dmac->busy_chan < pi->pcfg.num_chan) ? false : true;
169}
170
171/*
172 * Returns the number of free channels that
173 * can be handled by this dmac only.
174 */
175static unsigned ch_onlyby_dmac(struct s3c_pl330_dmac *dmac)
176{
177 enum dma_ch *id = dmac->peri;
178 struct s3c_pl330_dmac *d;
179 struct s3c_pl330_chan *ch;
180 unsigned found, count = 0;
181 enum dma_ch p;
182 int i;
183
184 for (i = 0; i < PL330_MAX_PERI; i++) {
185 p = id[i];
186 ch = id_to_chan(p);
187
188 if (p == DMACH_MAX || !chan_free(ch))
189 continue;
190
191 found = 0;
192 list_for_each_entry(d, &dmac_list, node) {
193 if (d != dmac && iface_of_dmac(d, ch->id)) {
194 found = 1;
195 break;
196 }
197 }
198 if (!found)
199 count++;
200 }
201
202 return count;
203}
204
205/*
206 * Measure of suitability of 'dmac' handling 'ch'
207 *
208 * 0 indicates 'dmac' can not handle 'ch' either
209 * because it is not supported by the hardware or
210 * because all dmac channels are currently busy.
211 *
212 * >0 vlaue indicates 'dmac' has the capability.
213 * The bigger the value the more suitable the dmac.
214 */
215#define MAX_SUIT UINT_MAX
216#define MIN_SUIT 0
217
218static unsigned suitablility(struct s3c_pl330_dmac *dmac,
219 struct s3c_pl330_chan *ch)
220{
221 struct pl330_info *pi = dmac->pi;
222 enum dma_ch *id = dmac->peri;
223 struct s3c_pl330_dmac *d;
224 unsigned s;
225 int i;
226
227 s = MIN_SUIT;
228 /* If all the DMAC channel threads are busy */
229 if (dmac_busy(dmac))
230 return s;
231
232 for (i = 0; i < PL330_MAX_PERI; i++)
233 if (id[i] == ch->id)
234 break;
235
236 /* If the 'dmac' can't talk to 'ch' */
237 if (i == PL330_MAX_PERI)
238 return s;
239
240 s = MAX_SUIT;
241 list_for_each_entry(d, &dmac_list, node) {
242 /*
243 * If some other dmac can talk to this
244 * peri and has some channel free.
245 */
246 if (d != dmac && iface_of_dmac(d, ch->id) && !dmac_busy(d)) {
247 s = 0;
248 break;
249 }
250 }
251 if (s)
252 return s;
253
254 s = 100;
255
256 /* Good if free chans are more, bad otherwise */
257 s += (pi->pcfg.num_chan - dmac->busy_chan) - ch_onlyby_dmac(dmac);
258
259 return s;
260}
261
262/* More than one DMAC may have capability to transfer data with the
263 * peripheral. This function assigns most suitable DMAC to manage the
264 * channel and hence communicate with the peripheral.
265 */
266static struct s3c_pl330_dmac *map_chan_to_dmac(struct s3c_pl330_chan *ch)
267{
268 struct s3c_pl330_dmac *d, *dmac = NULL;
269 unsigned sn, sl = MIN_SUIT;
270
271 list_for_each_entry(d, &dmac_list, node) {
272 sn = suitablility(d, ch);
273
274 if (sn == MAX_SUIT)
275 return d;
276
277 if (sn > sl)
278 dmac = d;
279 }
280
281 return dmac;
282}
283
284/* Acquire the channel for peripheral 'id' */
285static struct s3c_pl330_chan *chan_acquire(const enum dma_ch id)
286{
287 struct s3c_pl330_chan *ch = id_to_chan(id);
288 struct s3c_pl330_dmac *dmac;
289
290 /* If the channel doesn't exist or is already acquired */
291 if (!ch || !chan_free(ch)) {
292 ch = NULL;
293 goto acq_exit;
294 }
295
296 dmac = map_chan_to_dmac(ch);
297 /* If couldn't map */
298 if (!dmac) {
299 ch = NULL;
300 goto acq_exit;
301 }
302
303 dmac->busy_chan++;
304 ch->dmac = dmac;
305
306acq_exit:
307 return ch;
308}
309
310/* Delete xfer from the queue */
311static inline void del_from_queue(struct s3c_pl330_xfer *xfer)
312{
313 struct s3c_pl330_xfer *t;
314 struct s3c_pl330_chan *ch;
315 int found;
316
317 if (!xfer)
318 return;
319
320 ch = xfer->chan;
321
322 /* Make sure xfer is in the queue */
323 found = 0;
324 list_for_each_entry(t, &ch->xfer_list, node)
325 if (t == xfer) {
326 found = 1;
327 break;
328 }
329
330 if (!found)
331 return;
332
333 /* If xfer is last entry in the queue */
334 if (xfer->node.next == &ch->xfer_list)
335 t = list_entry(ch->xfer_list.next,
336 struct s3c_pl330_xfer, node);
337 else
338 t = list_entry(xfer->node.next,
339 struct s3c_pl330_xfer, node);
340
341 /* If there was only one node left */
342 if (t == xfer)
343 ch->xfer_head = NULL;
344 else if (ch->xfer_head == xfer)
345 ch->xfer_head = t;
346
347 list_del(&xfer->node);
348}
349
350/* Provides pointer to the next xfer in the queue.
351 * If CIRCULAR option is set, the list is left intact,
352 * otherwise the xfer is removed from the list.
353 * Forced delete 'pluck' can be set to override the CIRCULAR option.
354 */
355static struct s3c_pl330_xfer *get_from_queue(struct s3c_pl330_chan *ch,
356 int pluck)
357{
358 struct s3c_pl330_xfer *xfer = ch->xfer_head;
359
360 if (!xfer)
361 return NULL;
362
363 /* If xfer is last entry in the queue */
364 if (xfer->node.next == &ch->xfer_list)
365 ch->xfer_head = list_entry(ch->xfer_list.next,
366 struct s3c_pl330_xfer, node);
367 else
368 ch->xfer_head = list_entry(xfer->node.next,
369 struct s3c_pl330_xfer, node);
370
371 if (pluck || !(ch->options & S3C2410_DMAF_CIRCULAR))
372 del_from_queue(xfer);
373
374 return xfer;
375}
376
377static inline void add_to_queue(struct s3c_pl330_chan *ch,
378 struct s3c_pl330_xfer *xfer, int front)
379{
380 struct pl330_xfer *xt;
381
382 /* If queue empty */
383 if (ch->xfer_head == NULL)
384 ch->xfer_head = xfer;
385
386 xt = &ch->xfer_head->px;
387 /* If the head already submitted (CIRCULAR head) */
388 if (ch->options & S3C2410_DMAF_CIRCULAR &&
389 (xt == ch->req[0].x || xt == ch->req[1].x))
390 ch->xfer_head = xfer;
391
392 /* If this is a resubmission, it should go at the head */
393 if (front) {
394 ch->xfer_head = xfer;
395 list_add(&xfer->node, &ch->xfer_list);
396 } else {
397 list_add_tail(&xfer->node, &ch->xfer_list);
398 }
399}
400
401static inline void _finish_off(struct s3c_pl330_xfer *xfer,
402 enum s3c2410_dma_buffresult res, int ffree)
403{
404 struct s3c_pl330_chan *ch;
405
406 if (!xfer)
407 return;
408
409 ch = xfer->chan;
410
411 /* Do callback */
412 if (ch->callback_fn)
413 ch->callback_fn(NULL, xfer->token, xfer->px.bytes, res);
414
415 /* Force Free or if buffer is not needed anymore */
416 if (ffree || !(ch->options & S3C2410_DMAF_CIRCULAR))
417 kmem_cache_free(ch->dmac->kmcache, xfer);
418}
419
420static inline int s3c_pl330_submit(struct s3c_pl330_chan *ch,
421 struct pl330_req *r)
422{
423 struct s3c_pl330_xfer *xfer;
424 int ret = 0;
425
426 /* If already submitted */
427 if (r->x)
428 return 0;
429
430 xfer = get_from_queue(ch, 0);
431 if (xfer) {
432 r->x = &xfer->px;
433
434 /* Use max bandwidth for M<->M xfers */
435 if (r->rqtype == MEMTOMEM) {
436 struct pl330_info *pi = xfer->chan->dmac->pi;
437 int burst = 1 << ch->rqcfg.brst_size;
438 u32 bytes = r->x->bytes;
439 int bl;
440
441 bl = pi->pcfg.data_bus_width / 8;
442 bl *= pi->pcfg.data_buf_dep;
443 bl /= burst;
444
445 /* src/dst_burst_len can't be more than 16 */
446 if (bl > 16)
447 bl = 16;
448
449 while (bl > 1) {
450 if (!(bytes % (bl * burst)))
451 break;
452 bl--;
453 }
454
455 ch->rqcfg.brst_len = bl;
456 } else {
457 ch->rqcfg.brst_len = 1;
458 }
459
460 ret = pl330_submit_req(ch->pl330_chan_id, r);
461
462 /* If submission was successful */
463 if (!ret) {
464 ch->lrq = r; /* latest submitted req */
465 return 0;
466 }
467
468 r->x = NULL;
469
470 /* If both of the PL330 ping-pong buffers filled */
471 if (ret == -EAGAIN) {
472 dev_err(ch->dmac->pi->dev, "%s:%d!\n",
473 __func__, __LINE__);
474 /* Queue back again */
475 add_to_queue(ch, xfer, 1);
476 ret = 0;
477 } else {
478 dev_err(ch->dmac->pi->dev, "%s:%d!\n",
479 __func__, __LINE__);
480 _finish_off(xfer, S3C2410_RES_ERR, 0);
481 }
482 }
483
484 return ret;
485}
486
487static void s3c_pl330_rq(struct s3c_pl330_chan *ch,
488 struct pl330_req *r, enum pl330_op_err err)
489{
490 unsigned long flags;
491 struct s3c_pl330_xfer *xfer;
492 struct pl330_xfer *xl = r->x;
493 enum s3c2410_dma_buffresult res;
494
495 spin_lock_irqsave(&res_lock, flags);
496
497 r->x = NULL;
498
499 s3c_pl330_submit(ch, r);
500
501 spin_unlock_irqrestore(&res_lock, flags);
502
503 /* Map result to S3C DMA API */
504 if (err == PL330_ERR_NONE)
505 res = S3C2410_RES_OK;
506 else if (err == PL330_ERR_ABORT)
507 res = S3C2410_RES_ABORT;
508 else
509 res = S3C2410_RES_ERR;
510
511 /* If last request had some xfer */
512 if (xl) {
513 xfer = container_of(xl, struct s3c_pl330_xfer, px);
514 _finish_off(xfer, res, 0);
515 } else {
516 dev_info(ch->dmac->pi->dev, "%s:%d No Xfer?!\n",
517 __func__, __LINE__);
518 }
519}
520
521static void s3c_pl330_rq0(void *token, enum pl330_op_err err)
522{
523 struct pl330_req *r = token;
524 struct s3c_pl330_chan *ch = container_of(r,
525 struct s3c_pl330_chan, req[0]);
526 s3c_pl330_rq(ch, r, err);
527}
528
529static void s3c_pl330_rq1(void *token, enum pl330_op_err err)
530{
531 struct pl330_req *r = token;
532 struct s3c_pl330_chan *ch = container_of(r,
533 struct s3c_pl330_chan, req[1]);
534 s3c_pl330_rq(ch, r, err);
535}
536
537/* Release an acquired channel */
538static void chan_release(struct s3c_pl330_chan *ch)
539{
540 struct s3c_pl330_dmac *dmac;
541
542 if (chan_free(ch))
543 return;
544
545 dmac = ch->dmac;
546 ch->dmac = NULL;
547 dmac->busy_chan--;
548}
549
550int s3c2410_dma_ctrl(enum dma_ch id, enum s3c2410_chan_op op)
551{
552 struct s3c_pl330_xfer *xfer;
553 enum pl330_chan_op pl330op;
554 struct s3c_pl330_chan *ch;
555 unsigned long flags;
556 int idx, ret;
557
558 spin_lock_irqsave(&res_lock, flags);
559
560 ch = id_to_chan(id);
561
562 if (!ch || chan_free(ch)) {
563 ret = -EINVAL;
564 goto ctrl_exit;
565 }
566
567 switch (op) {
568 case S3C2410_DMAOP_START:
569 /* Make sure both reqs are enqueued */
570 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
571 s3c_pl330_submit(ch, &ch->req[idx]);
572 s3c_pl330_submit(ch, &ch->req[1 - idx]);
573 pl330op = PL330_OP_START;
574 break;
575
576 case S3C2410_DMAOP_STOP:
577 pl330op = PL330_OP_ABORT;
578 break;
579
580 case S3C2410_DMAOP_FLUSH:
581 pl330op = PL330_OP_FLUSH;
582 break;
583
584 case S3C2410_DMAOP_PAUSE:
585 case S3C2410_DMAOP_RESUME:
586 case S3C2410_DMAOP_TIMEOUT:
587 case S3C2410_DMAOP_STARTED:
588 spin_unlock_irqrestore(&res_lock, flags);
589 return 0;
590
591 default:
592 spin_unlock_irqrestore(&res_lock, flags);
593 return -EINVAL;
594 }
595
596 ret = pl330_chan_ctrl(ch->pl330_chan_id, pl330op);
597
598 if (pl330op == PL330_OP_START) {
599 spin_unlock_irqrestore(&res_lock, flags);
600 return ret;
601 }
602
603 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
604
605 /* Abort the current xfer */
606 if (ch->req[idx].x) {
607 xfer = container_of(ch->req[idx].x,
608 struct s3c_pl330_xfer, px);
609
610 /* Drop xfer during FLUSH */
611 if (pl330op == PL330_OP_FLUSH)
612 del_from_queue(xfer);
613
614 ch->req[idx].x = NULL;
615
616 spin_unlock_irqrestore(&res_lock, flags);
617 _finish_off(xfer, S3C2410_RES_ABORT,
618 pl330op == PL330_OP_FLUSH ? 1 : 0);
619 spin_lock_irqsave(&res_lock, flags);
620 }
621
622 /* Flush the whole queue */
623 if (pl330op == PL330_OP_FLUSH) {
624
625 if (ch->req[1 - idx].x) {
626 xfer = container_of(ch->req[1 - idx].x,
627 struct s3c_pl330_xfer, px);
628
629 del_from_queue(xfer);
630
631 ch->req[1 - idx].x = NULL;
632
633 spin_unlock_irqrestore(&res_lock, flags);
634 _finish_off(xfer, S3C2410_RES_ABORT, 1);
635 spin_lock_irqsave(&res_lock, flags);
636 }
637
638 /* Finish off the remaining in the queue */
639 xfer = ch->xfer_head;
640 while (xfer) {
641
642 del_from_queue(xfer);
643
644 spin_unlock_irqrestore(&res_lock, flags);
645 _finish_off(xfer, S3C2410_RES_ABORT, 1);
646 spin_lock_irqsave(&res_lock, flags);
647
648 xfer = ch->xfer_head;
649 }
650 }
651
652ctrl_exit:
653 spin_unlock_irqrestore(&res_lock, flags);
654
655 return ret;
656}
657EXPORT_SYMBOL(s3c2410_dma_ctrl);
658
659int s3c2410_dma_enqueue(enum dma_ch id, void *token,
660 dma_addr_t addr, int size)
661{
662 struct s3c_pl330_chan *ch;
663 struct s3c_pl330_xfer *xfer;
664 unsigned long flags;
665 int idx, ret = 0;
666
667 spin_lock_irqsave(&res_lock, flags);
668
669 ch = id_to_chan(id);
670
671 /* Error if invalid or free channel */
672 if (!ch || chan_free(ch)) {
673 ret = -EINVAL;
674 goto enq_exit;
675 }
676
677 /* Error if size is unaligned */
678 if (ch->rqcfg.brst_size && size % (1 << ch->rqcfg.brst_size)) {
679 ret = -EINVAL;
680 goto enq_exit;
681 }
682
683 xfer = kmem_cache_alloc(ch->dmac->kmcache, GFP_ATOMIC);
684 if (!xfer) {
685 ret = -ENOMEM;
686 goto enq_exit;
687 }
688
689 xfer->token = token;
690 xfer->chan = ch;
691 xfer->px.bytes = size;
692 xfer->px.next = NULL; /* Single request */
693
694 /* For S3C DMA API, direction is always fixed for all xfers */
695 if (ch->req[0].rqtype == MEMTODEV) {
696 xfer->px.src_addr = addr;
697 xfer->px.dst_addr = ch->sdaddr;
698 } else {
699 xfer->px.src_addr = ch->sdaddr;
700 xfer->px.dst_addr = addr;
701 }
702
703 add_to_queue(ch, xfer, 0);
704
705 /* Try submitting on either request */
706 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
707
708 if (!ch->req[idx].x)
709 s3c_pl330_submit(ch, &ch->req[idx]);
710 else
711 s3c_pl330_submit(ch, &ch->req[1 - idx]);
712
713 spin_unlock_irqrestore(&res_lock, flags);
714
715 if (ch->options & S3C2410_DMAF_AUTOSTART)
716 s3c2410_dma_ctrl(id, S3C2410_DMAOP_START);
717
718 return 0;
719
720enq_exit:
721 spin_unlock_irqrestore(&res_lock, flags);
722
723 return ret;
724}
725EXPORT_SYMBOL(s3c2410_dma_enqueue);
726
727int s3c2410_dma_request(enum dma_ch id,
728 struct s3c2410_dma_client *client,
729 void *dev)
730{
731 struct s3c_pl330_dmac *dmac;
732 struct s3c_pl330_chan *ch;
733 unsigned long flags;
734 int ret = 0;
735
736 spin_lock_irqsave(&res_lock, flags);
737
738 ch = chan_acquire(id);
739 if (!ch) {
740 ret = -EBUSY;
741 goto req_exit;
742 }
743
744 dmac = ch->dmac;
745
746 ch->pl330_chan_id = pl330_request_channel(dmac->pi);
747 if (!ch->pl330_chan_id) {
748 chan_release(ch);
749 ret = -EBUSY;
750 goto req_exit;
751 }
752
753 ch->client = client;
754 ch->options = 0; /* Clear any option */
755 ch->callback_fn = NULL; /* Clear any callback */
756 ch->lrq = NULL;
757
758 ch->rqcfg.brst_size = 2; /* Default word size */
759 ch->rqcfg.swap = SWAP_NO;
760 ch->rqcfg.scctl = SCCTRL0; /* Noncacheable and nonbufferable */
761 ch->rqcfg.dcctl = DCCTRL0; /* Noncacheable and nonbufferable */
762 ch->rqcfg.privileged = 0;
763 ch->rqcfg.insnaccess = 0;
764
765 /* Set invalid direction */
766 ch->req[0].rqtype = DEVTODEV;
767 ch->req[1].rqtype = ch->req[0].rqtype;
768
769 ch->req[0].cfg = &ch->rqcfg;
770 ch->req[1].cfg = ch->req[0].cfg;
771
772 ch->req[0].peri = iface_of_dmac(dmac, id) - 1; /* Original index */
773 ch->req[1].peri = ch->req[0].peri;
774
775 ch->req[0].token = &ch->req[0];
776 ch->req[0].xfer_cb = s3c_pl330_rq0;
777 ch->req[1].token = &ch->req[1];
778 ch->req[1].xfer_cb = s3c_pl330_rq1;
779
780 ch->req[0].x = NULL;
781 ch->req[1].x = NULL;
782
783 /* Reset xfer list */
784 INIT_LIST_HEAD(&ch->xfer_list);
785 ch->xfer_head = NULL;
786
787req_exit:
788 spin_unlock_irqrestore(&res_lock, flags);
789
790 return ret;
791}
792EXPORT_SYMBOL(s3c2410_dma_request);
793
794int s3c2410_dma_free(enum dma_ch id, struct s3c2410_dma_client *client)
795{
796 struct s3c_pl330_chan *ch;
797 struct s3c_pl330_xfer *xfer;
798 unsigned long flags;
799 int ret = 0;
800 unsigned idx;
801
802 spin_lock_irqsave(&res_lock, flags);
803
804 ch = id_to_chan(id);
805
806 if (!ch || chan_free(ch))
807 goto free_exit;
808
809 /* Refuse if someone else wanted to free the channel */
810 if (ch->client != client) {
811 ret = -EBUSY;
812 goto free_exit;
813 }
814
815 /* Stop any active xfer, Flushe the queue and do callbacks */
816 pl330_chan_ctrl(ch->pl330_chan_id, PL330_OP_FLUSH);
817
818 /* Abort the submitted requests */
819 idx = (ch->lrq == &ch->req[0]) ? 1 : 0;
820
821 if (ch->req[idx].x) {
822 xfer = container_of(ch->req[idx].x,
823 struct s3c_pl330_xfer, px);
824
825 ch->req[idx].x = NULL;
826 del_from_queue(xfer);
827
828 spin_unlock_irqrestore(&res_lock, flags);
829 _finish_off(xfer, S3C2410_RES_ABORT, 1);
830 spin_lock_irqsave(&res_lock, flags);
831 }
832
833 if (ch->req[1 - idx].x) {
834 xfer = container_of(ch->req[1 - idx].x,
835 struct s3c_pl330_xfer, px);
836
837 ch->req[1 - idx].x = NULL;
838 del_from_queue(xfer);
839
840 spin_unlock_irqrestore(&res_lock, flags);
841 _finish_off(xfer, S3C2410_RES_ABORT, 1);
842 spin_lock_irqsave(&res_lock, flags);
843 }
844
845 /* Pluck and Abort the queued requests in order */
846 do {
847 xfer = get_from_queue(ch, 1);
848
849 spin_unlock_irqrestore(&res_lock, flags);
850 _finish_off(xfer, S3C2410_RES_ABORT, 1);
851 spin_lock_irqsave(&res_lock, flags);
852 } while (xfer);
853
854 ch->client = NULL;
855
856 pl330_release_channel(ch->pl330_chan_id);
857
858 ch->pl330_chan_id = NULL;
859
860 chan_release(ch);
861
862free_exit:
863 spin_unlock_irqrestore(&res_lock, flags);
864
865 return ret;
866}
867EXPORT_SYMBOL(s3c2410_dma_free);
868
869int s3c2410_dma_config(enum dma_ch id, int xferunit)
870{
871 struct s3c_pl330_chan *ch;
872 struct pl330_info *pi;
873 unsigned long flags;
874 int i, dbwidth, ret = 0;
875
876 spin_lock_irqsave(&res_lock, flags);
877
878 ch = id_to_chan(id);
879
880 if (!ch || chan_free(ch)) {
881 ret = -EINVAL;
882 goto cfg_exit;
883 }
884
885 pi = ch->dmac->pi;
886 dbwidth = pi->pcfg.data_bus_width / 8;
887
888 /* Max size of xfer can be pcfg.data_bus_width */
889 if (xferunit > dbwidth) {
890 ret = -EINVAL;
891 goto cfg_exit;
892 }
893
894 i = 0;
895 while (xferunit != (1 << i))
896 i++;
897
898 /* If valid value */
899 if (xferunit == (1 << i))
900 ch->rqcfg.brst_size = i;
901 else
902 ret = -EINVAL;
903
904cfg_exit:
905 spin_unlock_irqrestore(&res_lock, flags);
906
907 return ret;
908}
909EXPORT_SYMBOL(s3c2410_dma_config);
910
911/* Options that are supported by this driver */
912#define S3C_PL330_FLAGS (S3C2410_DMAF_CIRCULAR | S3C2410_DMAF_AUTOSTART)
913
914int s3c2410_dma_setflags(enum dma_ch id, unsigned int options)
915{
916 struct s3c_pl330_chan *ch;
917 unsigned long flags;
918 int ret = 0;
919
920 spin_lock_irqsave(&res_lock, flags);
921
922 ch = id_to_chan(id);
923
924 if (!ch || chan_free(ch) || options & ~(S3C_PL330_FLAGS))
925 ret = -EINVAL;
926 else
927 ch->options = options;
928
929 spin_unlock_irqrestore(&res_lock, flags);
930
931 return 0;
932}
933EXPORT_SYMBOL(s3c2410_dma_setflags);
934
935int s3c2410_dma_set_buffdone_fn(enum dma_ch id, s3c2410_dma_cbfn_t rtn)
936{
937 struct s3c_pl330_chan *ch;
938 unsigned long flags;
939 int ret = 0;
940
941 spin_lock_irqsave(&res_lock, flags);
942
943 ch = id_to_chan(id);
944
945 if (!ch || chan_free(ch))
946 ret = -EINVAL;
947 else
948 ch->callback_fn = rtn;
949
950 spin_unlock_irqrestore(&res_lock, flags);
951
952 return ret;
953}
954EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn);
955
956int s3c2410_dma_devconfig(enum dma_ch id, enum s3c2410_dmasrc source,
957 unsigned long address)
958{
959 struct s3c_pl330_chan *ch;
960 unsigned long flags;
961 int ret = 0;
962
963 spin_lock_irqsave(&res_lock, flags);
964
965 ch = id_to_chan(id);
966
967 if (!ch || chan_free(ch)) {
968 ret = -EINVAL;
969 goto devcfg_exit;
970 }
971
972 switch (source) {
973 case S3C2410_DMASRC_HW: /* P->M */
974 ch->req[0].rqtype = DEVTOMEM;
975 ch->req[1].rqtype = DEVTOMEM;
976 ch->rqcfg.src_inc = 0;
977 ch->rqcfg.dst_inc = 1;
978 break;
979 case S3C2410_DMASRC_MEM: /* M->P */
980 ch->req[0].rqtype = MEMTODEV;
981 ch->req[1].rqtype = MEMTODEV;
982 ch->rqcfg.src_inc = 1;
983 ch->rqcfg.dst_inc = 0;
984 break;
985 default:
986 ret = -EINVAL;
987 goto devcfg_exit;
988 }
989
990 ch->sdaddr = address;
991
992devcfg_exit:
993 spin_unlock_irqrestore(&res_lock, flags);
994
995 return ret;
996}
997EXPORT_SYMBOL(s3c2410_dma_devconfig);
998
999int s3c2410_dma_getposition(enum dma_ch id, dma_addr_t *src, dma_addr_t *dst)
1000{
1001 struct s3c_pl330_chan *ch = id_to_chan(id);
1002 struct pl330_chanstatus status;
1003 int ret;
1004
1005 if (!ch || chan_free(ch))
1006 return -EINVAL;
1007
1008 ret = pl330_chan_status(ch->pl330_chan_id, &status);
1009 if (ret < 0)
1010 return ret;
1011
1012 *src = status.src_addr;
1013 *dst = status.dst_addr;
1014
1015 return 0;
1016}
1017EXPORT_SYMBOL(s3c2410_dma_getposition);
1018
1019static irqreturn_t pl330_irq_handler(int irq, void *data)
1020{
1021 if (pl330_update(data))
1022 return IRQ_HANDLED;
1023 else
1024 return IRQ_NONE;
1025}
1026
1027static int pl330_probe(struct platform_device *pdev)
1028{
1029 struct s3c_pl330_dmac *s3c_pl330_dmac;
1030 struct s3c_pl330_platdata *pl330pd;
1031 struct pl330_info *pl330_info;
1032 struct resource *res;
1033 int i, ret, irq;
1034
1035 pl330pd = pdev->dev.platform_data;
1036
1037 /* Can't do without the list of _32_ peripherals */
1038 if (!pl330pd || !pl330pd->peri) {
1039 dev_err(&pdev->dev, "platform data missing!\n");
1040 return -ENODEV;
1041 }
1042
1043 pl330_info = kzalloc(sizeof(*pl330_info), GFP_KERNEL);
1044 if (!pl330_info)
1045 return -ENOMEM;
1046
1047 pl330_info->pl330_data = NULL;
1048 pl330_info->dev = &pdev->dev;
1049
1050 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1051 if (!res) {
1052 ret = -ENODEV;
1053 goto probe_err1;
1054 }
1055
1056 request_mem_region(res->start, resource_size(res), pdev->name);
1057
1058 pl330_info->base = ioremap(res->start, resource_size(res));
1059 if (!pl330_info->base) {
1060 ret = -ENXIO;
1061 goto probe_err2;
1062 }
1063
1064 irq = platform_get_irq(pdev, 0);
1065 if (irq < 0) {
1066 ret = irq;
1067 goto probe_err3;
1068 }
1069
1070 ret = request_irq(irq, pl330_irq_handler, 0,
1071 dev_name(&pdev->dev), pl330_info);
1072 if (ret)
1073 goto probe_err4;
1074
1075 ret = pl330_add(pl330_info);
1076 if (ret)
1077 goto probe_err5;
1078
1079 /* Allocate a new DMAC */
1080 s3c_pl330_dmac = kmalloc(sizeof(*s3c_pl330_dmac), GFP_KERNEL);
1081 if (!s3c_pl330_dmac) {
1082 ret = -ENOMEM;
1083 goto probe_err6;
1084 }
1085
1086 /* Hook the info */
1087 s3c_pl330_dmac->pi = pl330_info;
1088
1089 /* No busy channels */
1090 s3c_pl330_dmac->busy_chan = 0;
1091
1092 s3c_pl330_dmac->kmcache = kmem_cache_create(dev_name(&pdev->dev),
1093 sizeof(struct s3c_pl330_xfer), 0, 0, NULL);
1094
1095 if (!s3c_pl330_dmac->kmcache) {
1096 ret = -ENOMEM;
1097 goto probe_err7;
1098 }
1099
1100 /* Get the list of peripherals */
1101 s3c_pl330_dmac->peri = pl330pd->peri;
1102
1103 /* Attach to the list of DMACs */
1104 list_add_tail(&s3c_pl330_dmac->node, &dmac_list);
1105
1106 /* Create a channel for each peripheral in the DMAC
1107 * that is, if it doesn't already exist
1108 */
1109 for (i = 0; i < PL330_MAX_PERI; i++)
1110 if (s3c_pl330_dmac->peri[i] != DMACH_MAX)
1111 chan_add(s3c_pl330_dmac->peri[i]);
1112
1113 printk(KERN_INFO
1114 "Loaded driver for PL330 DMAC-%d %s\n", pdev->id, pdev->name);
1115 printk(KERN_INFO
1116 "\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n",
1117 pl330_info->pcfg.data_buf_dep,
1118 pl330_info->pcfg.data_bus_width / 8, pl330_info->pcfg.num_chan,
1119 pl330_info->pcfg.num_peri, pl330_info->pcfg.num_events);
1120
1121 return 0;
1122
1123probe_err7:
1124 kfree(s3c_pl330_dmac);
1125probe_err6:
1126 pl330_del(pl330_info);
1127probe_err5:
1128 free_irq(irq, pl330_info);
1129probe_err4:
1130probe_err3:
1131 iounmap(pl330_info->base);
1132probe_err2:
1133 release_mem_region(res->start, resource_size(res));
1134probe_err1:
1135 kfree(pl330_info);
1136
1137 return ret;
1138}
1139
1140static int pl330_remove(struct platform_device *pdev)
1141{
1142 struct s3c_pl330_dmac *dmac, *d;
1143 struct s3c_pl330_chan *ch;
1144 unsigned long flags;
1145 int del, found;
1146
1147 if (!pdev->dev.platform_data)
1148 return -EINVAL;
1149
1150 spin_lock_irqsave(&res_lock, flags);
1151
1152 found = 0;
1153 list_for_each_entry(d, &dmac_list, node)
1154 if (d->pi->dev == &pdev->dev) {
1155 found = 1;
1156 break;
1157 }
1158
1159 if (!found) {
1160 spin_unlock_irqrestore(&res_lock, flags);
1161 return 0;
1162 }
1163
1164 dmac = d;
1165
1166 /* Remove all Channels that are managed only by this DMAC */
1167 list_for_each_entry(ch, &chan_list, node) {
1168
1169 /* Only channels that are handled by this DMAC */
1170 if (iface_of_dmac(dmac, ch->id))
1171 del = 1;
1172 else
1173 continue;
1174
1175 /* Don't remove if some other DMAC has it too */
1176 list_for_each_entry(d, &dmac_list, node)
1177 if (d != dmac && iface_of_dmac(d, ch->id)) {
1178 del = 0;
1179 break;
1180 }
1181
1182 if (del) {
1183 spin_unlock_irqrestore(&res_lock, flags);
1184 s3c2410_dma_free(ch->id, ch->client);
1185 spin_lock_irqsave(&res_lock, flags);
1186 list_del(&ch->node);
1187 kfree(ch);
1188 }
1189 }
1190
1191 /* Remove the DMAC */
1192 list_del(&dmac->node);
1193 kfree(dmac);
1194
1195 spin_unlock_irqrestore(&res_lock, flags);
1196
1197 return 0;
1198}
1199
1200static struct platform_driver pl330_driver = {
1201 .driver = {
1202 .owner = THIS_MODULE,
1203 .name = "s3c-pl330",
1204 },
1205 .probe = pl330_probe,
1206 .remove = pl330_remove,
1207};
1208
1209static int __init pl330_init(void)
1210{
1211 return platform_driver_register(&pl330_driver);
1212}
1213module_init(pl330_init);
1214
1215static void __exit pl330_exit(void)
1216{
1217 platform_driver_unregister(&pl330_driver);
1218 return;
1219}
1220module_exit(pl330_exit);
1221
1222MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>");
1223MODULE_DESCRIPTION("Driver for PL330 DMA Controller");
1224MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-02 00:22:29 -0500