diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-serial.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 25f0c364f61a..133fa97fbc82 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -71,6 +71,7 @@ | |||
71 | #define S3C2410_LCON_IRM (1<<6) | 71 | #define S3C2410_LCON_IRM (1<<6) |
72 | 72 | ||
73 | #define S3C2440_UCON_CLKMASK (3<<10) | 73 | #define S3C2440_UCON_CLKMASK (3<<10) |
74 | #define S3C2440_UCON_CLKSHIFT (10) | ||
74 | #define S3C2440_UCON_PCLK (0<<10) | 75 | #define S3C2440_UCON_PCLK (0<<10) |
75 | #define S3C2440_UCON_UCLK (1<<10) | 76 | #define S3C2440_UCON_UCLK (1<<10) |
76 | #define S3C2440_UCON_PCLK2 (2<<10) | 77 | #define S3C2440_UCON_PCLK2 (2<<10) |
@@ -78,6 +79,7 @@ | |||
78 | #define S3C2443_UCON_EPLL (3<<10) | 79 | #define S3C2443_UCON_EPLL (3<<10) |
79 | 80 | ||
80 | #define S3C6400_UCON_CLKMASK (3<<10) | 81 | #define S3C6400_UCON_CLKMASK (3<<10) |
82 | #define S3C6400_UCON_CLKSHIFT (10) | ||
81 | #define S3C6400_UCON_PCLK (0<<10) | 83 | #define S3C6400_UCON_PCLK (0<<10) |
82 | #define S3C6400_UCON_PCLK2 (2<<10) | 84 | #define S3C6400_UCON_PCLK2 (2<<10) |
83 | #define S3C6400_UCON_UCLK0 (1<<10) | 85 | #define S3C6400_UCON_UCLK0 (1<<10) |
@@ -90,11 +92,14 @@ | |||
90 | #define S3C2440_UCON_DIVSHIFT (12) | 92 | #define S3C2440_UCON_DIVSHIFT (12) |
91 | 93 | ||
92 | #define S3C2412_UCON_CLKMASK (3<<10) | 94 | #define S3C2412_UCON_CLKMASK (3<<10) |
95 | #define S3C2412_UCON_CLKSHIFT (10) | ||
93 | #define S3C2412_UCON_UCLK (1<<10) | 96 | #define S3C2412_UCON_UCLK (1<<10) |
94 | #define S3C2412_UCON_USYSCLK (3<<10) | 97 | #define S3C2412_UCON_USYSCLK (3<<10) |
95 | #define S3C2412_UCON_PCLK (0<<10) | 98 | #define S3C2412_UCON_PCLK (0<<10) |
96 | #define S3C2412_UCON_PCLK2 (2<<10) | 99 | #define S3C2412_UCON_PCLK2 (2<<10) |
97 | 100 | ||
101 | #define S3C2410_UCON_CLKMASK (1 << 10) | ||
102 | #define S3C2410_UCON_CLKSHIFT (10) | ||
98 | #define S3C2410_UCON_UCLK (1<<10) | 103 | #define S3C2410_UCON_UCLK (1<<10) |
99 | #define S3C2410_UCON_SBREAK (1<<4) | 104 | #define S3C2410_UCON_SBREAK (1<<4) |
100 | 105 | ||
@@ -193,6 +198,7 @@ | |||
193 | 198 | ||
194 | /* Following are specific to S5PV210 */ | 199 | /* Following are specific to S5PV210 */ |
195 | #define S5PV210_UCON_CLKMASK (1<<10) | 200 | #define S5PV210_UCON_CLKMASK (1<<10) |
201 | #define S5PV210_UCON_CLKSHIFT (10) | ||
196 | #define S5PV210_UCON_PCLK (0<<10) | 202 | #define S5PV210_UCON_PCLK (0<<10) |
197 | #define S5PV210_UCON_UCLK (1<<10) | 203 | #define S5PV210_UCON_UCLK (1<<10) |
198 | 204 | ||
@@ -221,7 +227,6 @@ | |||
221 | #define S5PV210_UFSTAT_RXMASK (255<<0) | 227 | #define S5PV210_UFSTAT_RXMASK (255<<0) |
222 | #define S5PV210_UFSTAT_RXSHIFT (0) | 228 | #define S5PV210_UFSTAT_RXSHIFT (0) |
223 | 229 | ||
224 | #define NO_NEED_CHECK_CLKSRC 1 | ||
225 | #define S3C2410_UCON_CLKSEL0 (1 << 0) | 230 | #define S3C2410_UCON_CLKSEL0 (1 << 0) |
226 | #define S3C2410_UCON_CLKSEL1 (1 << 1) | 231 | #define S3C2410_UCON_CLKSEL1 (1 << 1) |
227 | #define S3C2410_UCON_CLKSEL2 (1 << 2) | 232 | #define S3C2410_UCON_CLKSEL2 (1 << 2) |