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-rw-r--r--arch/arm/plat-s5p/Kconfig25
-rw-r--r--arch/arm/plat-s5p/Makefile19
-rw-r--r--arch/arm/plat-s5p/clock.c149
-rw-r--r--arch/arm/plat-s5p/cpu.c113
-rw-r--r--arch/arm/plat-s5p/dev-uart.c139
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h90
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h34
-rw-r--r--arch/arm/plat-s5p/include/plat/pll.h83
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p-clock.h40
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6440.h37
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6442.h33
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pv210.h33
-rw-r--r--arch/arm/plat-s5p/irq.c72
-rw-r--r--arch/arm/plat-s5p/setup-i2c0.c25
14 files changed, 892 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
new file mode 100644
index 000000000000..d400a6a20fe4
--- /dev/null
+++ b/arch/arm/plat-s5p/Kconfig
@@ -0,0 +1,25 @@
1# arch/arm/plat-s5p/Kconfig
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8config PLAT_S5P
9 bool
10 depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210)
11 default y
12 select ARM_VIC
13 select NO_IOPORT
14 select ARCH_REQUIRE_GPIOLIB
15 select S3C_GPIO_TRACK
16 select SAMSUNG_GPIOLIB_4BIT
17 select S3C_GPIO_CFG_S3C64XX
18 select S3C_GPIO_PULL_UPDOWN
19 select S3C_GPIO_CFG_S3C24XX
20 select PLAT_SAMSUNG
21 select SAMSUNG_CLKSRC
22 select SAMSUNG_IRQ_VIC_TIMER
23 select SAMSUNG_IRQ_UART
24 help
25 Base platform code for Samsung's S5P series SoC.
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
new file mode 100644
index 000000000000..a7c54b332d27
--- /dev/null
+++ b/arch/arm/plat-s5p/Makefile
@@ -0,0 +1,19 @@
1# arch/arm/plat-s5p/Makefile
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n := dummy.o
11obj- :=
12
13# Core files
14
15obj-y += dev-uart.o
16obj-y += cpu.o
17obj-y += clock.o
18obj-y += irq.o
19obj-y += setup-i2c0.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
new file mode 100644
index 000000000000..aa96e335073b
--- /dev/null
+++ b/arch/arm/plat-s5p/clock.c
@@ -0,0 +1,149 @@
1/* linux/arch/arm/plat-s5p/clock.c
2 *
3 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Common clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/sysdev.h>
21#include <linux/io.h>
22#include <asm/div64.h>
23
24#include <plat/clock.h>
25#include <plat/clock-clksrc.h>
26#include <plat/s5p-clock.h>
27
28/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
29 * clk_ext_xtal_mux.
30*/
31struct clk clk_ext_xtal_mux = {
32 .name = "ext_xtal",
33 .id = -1,
34};
35
36static struct clk s5p_clk_27m = {
37 .name = "clk_27m",
38 .id = -1,
39 .rate = 27000000,
40};
41
42/* 48MHz USB Phy clock output */
43struct clk clk_48m = {
44 .name = "clk_48m",
45 .id = -1,
46 .rate = 48000000,
47};
48
49/* APLL clock output
50 * No need .ctrlbit, this is always on
51*/
52struct clk clk_fout_apll = {
53 .name = "fout_apll",
54 .id = -1,
55};
56
57/* MPLL clock output
58 * No need .ctrlbit, this is always on
59*/
60struct clk clk_fout_mpll = {
61 .name = "fout_mpll",
62 .id = -1,
63};
64
65/* EPLL clock output */
66struct clk clk_fout_epll = {
67 .name = "fout_epll",
68 .id = -1,
69 .ctrlbit = (1 << 31),
70};
71
72/* ARM clock */
73struct clk clk_arm = {
74 .name = "armclk",
75 .id = -1,
76 .rate = 0,
77 .ctrlbit = 0,
78};
79
80/* Possible clock sources for APLL Mux */
81static struct clk *clk_src_apll_list[] = {
82 [0] = &clk_fin_apll,
83 [1] = &clk_fout_apll,
84};
85
86struct clksrc_sources clk_src_apll = {
87 .sources = clk_src_apll_list,
88 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
89};
90
91/* Possible clock sources for MPLL Mux */
92static struct clk *clk_src_mpll_list[] = {
93 [0] = &clk_fin_mpll,
94 [1] = &clk_fout_mpll,
95};
96
97struct clksrc_sources clk_src_mpll = {
98 .sources = clk_src_mpll_list,
99 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
100};
101
102/* Possible clock sources for EPLL Mux */
103static struct clk *clk_src_epll_list[] = {
104 [0] = &clk_fin_epll,
105 [1] = &clk_fout_epll,
106};
107
108struct clksrc_sources clk_src_epll = {
109 .sources = clk_src_epll_list,
110 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
111};
112
113struct clk clk_vpll = {
114 .name = "vpll",
115 .id = -1,
116};
117
118int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
119{
120 unsigned int ctrlbit = clk->ctrlbit;
121 u32 con;
122
123 con = __raw_readl(reg);
124 con = enable ? (con | ctrlbit) : (con & ~ctrlbit);
125 __raw_writel(con, reg);
126 return 0;
127}
128
129static struct clk *s5p_clks[] __initdata = {
130 &clk_ext_xtal_mux,
131 &clk_48m,
132 &s5p_clk_27m,
133 &clk_fout_apll,
134 &clk_fout_mpll,
135 &clk_fout_epll,
136 &clk_arm,
137 &clk_vpll,
138};
139
140void __init s5p_register_clocks(unsigned long xtal_freq)
141{
142 int ret;
143
144 clk_ext_xtal_mux.rate = xtal_freq;
145
146 ret = s3c24xx_register_clocks(s5p_clks, ARRAY_SIZE(s5p_clks));
147 if (ret > 0)
148 printk(KERN_ERR "Failed to register s5p clocks\n");
149}
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
new file mode 100644
index 000000000000..f92e5de3a755
--- /dev/null
+++ b/arch/arm/plat-s5p/cpu.c
@@ -0,0 +1,113 @@
1/* linux/arch/arm/plat-s5p/cpu.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P CPU Support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <mach/map.h>
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <mach/regs-clock.h>
19#include <plat/cpu.h>
20#include <plat/s5p6440.h>
21#include <plat/s5p6442.h>
22#include <plat/s5pv210.h>
23
24/* table of supported CPUs */
25
26static const char name_s5p6440[] = "S5P6440";
27static const char name_s5p6442[] = "S5P6442";
28static const char name_s5pv210[] = "S5PV210/S5PC110";
29
30static struct cpu_table cpu_ids[] __initdata = {
31 {
32 .idcode = 0x56440100,
33 .idmask = 0xffffff00,
34 .map_io = s5p6440_map_io,
35 .init_clocks = s5p6440_init_clocks,
36 .init_uarts = s5p6440_init_uarts,
37 .init = s5p6440_init,
38 .name = name_s5p6440,
39 }, {
40 .idcode = 0x36442000,
41 .idmask = 0xffffff00,
42 .map_io = s5p6442_map_io,
43 .init_clocks = s5p6442_init_clocks,
44 .init_uarts = s5p6442_init_uarts,
45 .init = s5p6442_init,
46 .name = name_s5p6442,
47 }, {
48 .idcode = 0x43110000,
49 .idmask = 0xfffff000,
50 .map_io = s5pv210_map_io,
51 .init_clocks = s5pv210_init_clocks,
52 .init_uarts = s5pv210_init_uarts,
53 .init = s5pv210_init,
54 .name = name_s5pv210,
55 },
56};
57
58/* minimal IO mapping */
59
60static struct map_desc s5p_iodesc[] __initdata = {
61 {
62 .virtual = (unsigned long)S5P_VA_CHIPID,
63 .pfn = __phys_to_pfn(S5P_PA_CHIPID),
64 .length = SZ_4K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = (unsigned long)S3C_VA_SYS,
68 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
69 .length = SZ_64K,
70 .type = MT_DEVICE,
71 }, {
72 .virtual = (unsigned long)S3C_VA_UART,
73 .pfn = __phys_to_pfn(S3C_PA_UART),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = (unsigned long)VA_VIC0,
78 .pfn = __phys_to_pfn(S5P_PA_VIC0),
79 .length = SZ_16K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)VA_VIC1,
83 .pfn = __phys_to_pfn(S5P_PA_VIC1),
84 .length = SZ_16K,
85 .type = MT_DEVICE,
86 }, {
87 .virtual = (unsigned long)S3C_VA_TIMER,
88 .pfn = __phys_to_pfn(S5P_PA_TIMER),
89 .length = SZ_16K,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (unsigned long)S5P_VA_GPIO,
93 .pfn = __phys_to_pfn(S5P_PA_GPIO),
94 .length = SZ_4K,
95 .type = MT_DEVICE,
96 },
97};
98
99/* read cpu identification code */
100
101void __init s5p_init_io(struct map_desc *mach_desc,
102 int size, void __iomem *cpuid_addr)
103{
104 unsigned long idcode;
105
106 /* initialize the io descriptors we need for initialization */
107 iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
108 if (mach_desc)
109 iotable_init(mach_desc, size);
110
111 idcode = __raw_readl(cpuid_addr);
112 s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
113}
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
new file mode 100644
index 000000000000..a89331ef4ae1
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -0,0 +1,139 @@
1/* linux/arch/arm/plat-s5p/dev-uart.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Base S5P UART resource and device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/platform_device.h>
18
19#include <asm/mach/arch.h>
20#include <asm/mach/irq.h>
21#include <mach/hardware.h>
22#include <mach/map.h>
23
24#include <plat/devs.h>
25
26 /* Serial port registrations */
27
28static struct resource s5p_uart0_resource[] = {
29 [0] = {
30 .start = S5P_PA_UART0,
31 .end = S5P_PA_UART0 + S5P_SZ_UART,
32 .flags = IORESOURCE_MEM,
33 },
34 [1] = {
35 .start = IRQ_S5P_UART_RX0,
36 .end = IRQ_S5P_UART_RX0,
37 .flags = IORESOURCE_IRQ,
38 },
39 [2] = {
40 .start = IRQ_S5P_UART_TX0,
41 .end = IRQ_S5P_UART_TX0,
42 .flags = IORESOURCE_IRQ,
43 },
44 [3] = {
45 .start = IRQ_S5P_UART_ERR0,
46 .end = IRQ_S5P_UART_ERR0,
47 .flags = IORESOURCE_IRQ,
48 }
49};
50
51static struct resource s5p_uart1_resource[] = {
52 [0] = {
53 .start = S5P_PA_UART1,
54 .end = S5P_PA_UART1 + S5P_SZ_UART,
55 .flags = IORESOURCE_MEM,
56 },
57 [1] = {
58 .start = IRQ_S5P_UART_RX1,
59 .end = IRQ_S5P_UART_RX1,
60 .flags = IORESOURCE_IRQ,
61 },
62 [2] = {
63 .start = IRQ_S5P_UART_TX1,
64 .end = IRQ_S5P_UART_TX1,
65 .flags = IORESOURCE_IRQ,
66 },
67 [3] = {
68 .start = IRQ_S5P_UART_ERR1,
69 .end = IRQ_S5P_UART_ERR1,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct resource s5p_uart2_resource[] = {
75 [0] = {
76 .start = S5P_PA_UART2,
77 .end = S5P_PA_UART2 + S5P_SZ_UART,
78 .flags = IORESOURCE_MEM,
79 },
80 [1] = {
81 .start = IRQ_S5P_UART_RX2,
82 .end = IRQ_S5P_UART_RX2,
83 .flags = IORESOURCE_IRQ,
84 },
85 [2] = {
86 .start = IRQ_S5P_UART_TX2,
87 .end = IRQ_S5P_UART_TX2,
88 .flags = IORESOURCE_IRQ,
89 },
90 [3] = {
91 .start = IRQ_S5P_UART_ERR2,
92 .end = IRQ_S5P_UART_ERR2,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct resource s5p_uart3_resource[] = {
98#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
99 [0] = {
100 .start = S5P_PA_UART3,
101 .end = S5P_PA_UART3 + S5P_SZ_UART,
102 .flags = IORESOURCE_MEM,
103 },
104 [1] = {
105 .start = IRQ_S5P_UART_RX3,
106 .end = IRQ_S5P_UART_RX3,
107 .flags = IORESOURCE_IRQ,
108 },
109 [2] = {
110 .start = IRQ_S5P_UART_TX3,
111 .end = IRQ_S5P_UART_TX3,
112 .flags = IORESOURCE_IRQ,
113 },
114 [3] = {
115 .start = IRQ_S5P_UART_ERR3,
116 .end = IRQ_S5P_UART_ERR3,
117 .flags = IORESOURCE_IRQ,
118 },
119#endif
120};
121
122struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
123 [0] = {
124 .resources = s5p_uart0_resource,
125 .nr_resources = ARRAY_SIZE(s5p_uart0_resource),
126 },
127 [1] = {
128 .resources = s5p_uart1_resource,
129 .nr_resources = ARRAY_SIZE(s5p_uart1_resource),
130 },
131 [2] = {
132 .resources = s5p_uart2_resource,
133 .nr_resources = ARRAY_SIZE(s5p_uart2_resource),
134 },
135 [3] = {
136 .resources = s5p_uart3_resource,
137 .nr_resources = ARRAY_SIZE(s5p_uart3_resource),
138 },
139};
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
new file mode 100644
index 000000000000..42e757f2e40c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -0,0 +1,90 @@
1/* linux/arch/arm/plat-s5p/include/plat/irqs.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P Common IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_IRQS_H
14#define __ASM_PLAT_S5P_IRQS_H __FILE__
15
16/* we keep the first set of CPU IRQs out of the range of
17 * the ISA space, so that the PC104 has them to itself
18 * and we don't end up having to do horrible things to the
19 * standard ISA drivers....
20 *
21 * note, since we're using the VICs, our start must be a
22 * mulitple of 32 to allow the common code to work
23 */
24
25#define S5P_IRQ_OFFSET (32)
26
27#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
28
29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32)
31#define S5P_VIC2_BASE S5P_IRQ(64)
32#define S5P_VIC3_BASE S5P_IRQ(96)
33
34#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
35
36#define IRQ_VIC0_BASE S5P_VIC0_BASE
37#define IRQ_VIC1_BASE S5P_VIC1_BASE
38#define IRQ_VIC2_BASE S5P_VIC2_BASE
39
40/* UART interrupts, each UART has 4 intterupts per channel so
41 * use the space between the ISA and S3C main interrupts. Note, these
42 * are not in the same order as the S3C24XX series! */
43
44#define IRQ_S5P_UART_BASE0 (16)
45#define IRQ_S5P_UART_BASE1 (20)
46#define IRQ_S5P_UART_BASE2 (24)
47#define IRQ_S5P_UART_BASE3 (28)
48
49#define UART_IRQ_RXD (0)
50#define UART_IRQ_ERR (1)
51#define UART_IRQ_TXD (2)
52
53#define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
54#define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
55#define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)
56
57#define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
58#define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
59#define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)
60
61#define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
62#define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
63#define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)
64
65#define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
66#define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
67#define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)
68
69/* S3C compatibilty defines */
70#define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0
71#define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1
72#define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2
73#define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3
74
75/* VIC based IRQs */
76
77#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
78#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
81
82#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x))
83
84#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
85#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
86#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
87#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
88#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
89
90#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
new file mode 100644
index 000000000000..14828521f70c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -0,0 +1,34 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S5P_H
14#define __ASM_PLAT_MAP_S5P_H __FILE__
15
16#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
17#define S5P_VA_GPIO S3C_ADDR(0x00500000)
18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
19#define S5P_VA_SROMC S3C_ADDR(0x01100000)
20
21#define S5P_VA_UART0 (S3C_VA_UART + 0x0)
22#define S5P_VA_UART1 (S3C_VA_UART + 0x400)
23#define S5P_VA_UART2 (S3C_VA_UART + 0x800)
24#define S5P_VA_UART3 (S3C_VA_UART + 0xC00)
25
26#define S3C_UART_OFFSET (0x400)
27
28#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
29#define VA_VIC0 VA_VIC(0)
30#define VA_VIC1 VA_VIC(1)
31#define VA_VIC2 VA_VIC(2)
32#define VA_VIC3 VA_VIC(3)
33
34#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
new file mode 100644
index 000000000000..d48325bb29e2
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -0,0 +1,83 @@
1/* arch/arm/plat-s5p/include/plat/pll.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P PLL code
7 *
8 * Based on arch/arm/plat-s3c64xx/include/plat/pll.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#define PLL45XX_MDIV_MASK (0x3FF)
16#define PLL45XX_PDIV_MASK (0x3F)
17#define PLL45XX_SDIV_MASK (0x7)
18#define PLL45XX_MDIV_SHIFT (16)
19#define PLL45XX_PDIV_SHIFT (8)
20#define PLL45XX_SDIV_SHIFT (0)
21
22#include <asm/div64.h>
23
24enum pll45xx_type_t {
25 pll_4500,
26 pll_4502,
27 pll_4508
28};
29
30static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
31 enum pll45xx_type_t pll_type)
32{
33 u32 mdiv, pdiv, sdiv;
34 u64 fvco = baseclk;
35
36 mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
37 pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
38 sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
39
40 if (pll_type == pll_4508)
41 sdiv = sdiv - 1;
42
43 fvco *= mdiv;
44 do_div(fvco, (pdiv << sdiv));
45
46 return (unsigned long)fvco;
47}
48
49#define PLL90XX_MDIV_MASK (0xFF)
50#define PLL90XX_PDIV_MASK (0x3F)
51#define PLL90XX_SDIV_MASK (0x7)
52#define PLL90XX_KDIV_MASK (0xffff)
53#define PLL90XX_MDIV_SHIFT (16)
54#define PLL90XX_PDIV_SHIFT (8)
55#define PLL90XX_SDIV_SHIFT (0)
56#define PLL90XX_KDIV_SHIFT (0)
57
58static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
59 u32 pll_con, u32 pll_conk)
60{
61 unsigned long result;
62 u32 mdiv, pdiv, sdiv, kdiv;
63 u64 tmp;
64
65 mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
66 pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
67 sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
68 kdiv = pll_conk & PLL90XX_KDIV_MASK;
69
70 /* We need to multiple baseclk by mdiv (the integer part) and kdiv
71 * which is in 2^16ths, so shift mdiv up (does not overflow) and
72 * add kdiv before multiplying. The use of tmp is to avoid any
73 * overflows before shifting bac down into result when multipling
74 * by the mdiv and kdiv pair.
75 */
76
77 tmp = baseclk;
78 tmp *= (mdiv << 16) + kdiv;
79 do_div(tmp, (pdiv << sdiv));
80 result = tmp >> 16;
81
82 return result;
83}
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
new file mode 100644
index 000000000000..56fb8b414d41
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -0,0 +1,40 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
2 *
3 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_CLOCK_H
14#define __ASM_PLAT_S5P_CLOCK_H __FILE__
15
16#include <linux/clk.h>
17
18#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
19
20#define clk_fin_apll clk_ext_xtal_mux
21#define clk_fin_mpll clk_ext_xtal_mux
22#define clk_fin_epll clk_ext_xtal_mux
23#define clk_fin_vpll clk_ext_xtal_mux
24
25extern struct clk clk_ext_xtal_mux;
26extern struct clk clk_48m;
27extern struct clk clk_fout_apll;
28extern struct clk clk_fout_mpll;
29extern struct clk clk_fout_epll;
30extern struct clk clk_arm;
31extern struct clk clk_vpll;
32
33extern struct clksrc_sources clk_src_apll;
34extern struct clksrc_sources clk_src_mpll;
35extern struct clksrc_sources clk_src_epll;
36
37extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable);
38extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
39
40#endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
new file mode 100644
index 000000000000..a4cd75afeb3b
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6440.h
@@ -0,0 +1,37 @@
1/* arch/arm/plat-s5p/include/plat/s5p6440.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 /* Common init code for S5P6440 related SoCs */
14
15extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5p6440_register_clocks(void);
17extern void s5p6440_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5P6440
20
21extern int s5p6440_init(void);
22extern void s5p6440_init_irq(void);
23extern void s5p6440_map_io(void);
24extern void s5p6440_init_clocks(int xtal);
25
26#define s5p6440_init_uarts s5p6440_common_init_uarts
27
28#else
29#define s5p6440_init_clocks NULL
30#define s5p6440_init_uarts NULL
31#define s5p6440_map_io NULL
32#define s5p6440_init NULL
33#endif
34
35/* S5P6440 timer */
36
37extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
new file mode 100644
index 000000000000..7b8801349c94
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6442.h
@@ -0,0 +1,33 @@
1/* arch/arm/plat-s5p/include/plat/s5p6442.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5P6442 related SoCs */
14
15extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5p6442_register_clocks(void);
17extern void s5p6442_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5P6442
20
21extern int s5p6442_init(void);
22extern void s5p6442_init_irq(void);
23extern void s5p6442_map_io(void);
24extern void s5p6442_init_clocks(int xtal);
25
26#define s5p6442_init_uarts s5p6442_common_init_uarts
27
28#else
29#define s5p6442_init_clocks NULL
30#define s5p6442_init_uarts NULL
31#define s5p6442_map_io NULL
32#define s5p6442_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h
new file mode 100644
index 000000000000..6c93a0c78100
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv210.h
@@ -0,0 +1,33 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv210 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV210 related SoCs */
14
15extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv210_register_clocks(void);
17extern void s5pv210_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV210
20
21extern int s5pv210_init(void);
22extern void s5pv210_init_irq(void);
23extern void s5pv210_map_io(void);
24extern void s5pv210_init_clocks(int xtal);
25
26#define s5pv210_init_uarts s5pv210_common_init_uarts
27
28#else
29#define s5pv210_init_clocks NULL
30#define s5pv210_init_uarts NULL
31#define s5pv210_map_io NULL
32#define s5pv210_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
new file mode 100644
index 000000000000..25e1eb6de59e
--- /dev/null
+++ b/arch/arm/plat-s5p/irq.c
@@ -0,0 +1,72 @@
1/* arch/arm/plat-s5p/irq.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Interrupt handling
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17
18#include <asm/hardware/vic.h>
19
20#include <linux/serial_core.h>
21#include <mach/map.h>
22#include <plat/regs-timer.h>
23#include <plat/regs-serial.h>
24#include <plat/cpu.h>
25#include <plat/irq-vic-timer.h>
26#include <plat/irq-uart.h>
27
28/*
29 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
30 * are consecutive when looking up the interrupt in the demux routines.
31 */
32static struct s3c_uart_irq uart_irqs[] = {
33 [0] = {
34 .regs = S5P_VA_UART0,
35 .base_irq = IRQ_S5P_UART_BASE0,
36 .parent_irq = IRQ_UART0,
37 },
38 [1] = {
39 .regs = S5P_VA_UART1,
40 .base_irq = IRQ_S5P_UART_BASE1,
41 .parent_irq = IRQ_UART1,
42 },
43 [2] = {
44 .regs = S5P_VA_UART2,
45 .base_irq = IRQ_S5P_UART_BASE2,
46 .parent_irq = IRQ_UART2,
47 },
48#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
49 [3] = {
50 .regs = S5P_VA_UART3,
51 .base_irq = IRQ_S5P_UART_BASE3,
52 .parent_irq = IRQ_UART3,
53 },
54#endif
55};
56
57void __init s5p_init_irq(u32 *vic, u32 num_vic)
58{
59 int irq;
60
61 /* initialize the VICs */
62 for (irq = 0; irq < num_vic; irq++)
63 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
64
65 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
66 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
67 s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2);
68 s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3);
69 s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4);
70
71 s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
72}
diff --git a/arch/arm/plat-s5p/setup-i2c0.c b/arch/arm/plat-s5p/setup-i2c0.c
new file mode 100644
index 000000000000..67a66e02a97a
--- /dev/null
+++ b/arch/arm/plat-s5p/setup-i2c0.c
@@ -0,0 +1,25 @@
1/* linux/arch/arm/plat-s5p/setup-i2c0.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * I2C0 GPIO configuration.
7 *
8 * Based on plat-s3c64xx/setup-i2c0.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <plat/iic.h>
21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{
24 /* Will be populated later */
25}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-31 22:28:43 -0500