diff options
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r-- | arch/arm/plat-s5p/Kconfig | 10 | ||||
-rw-r--r-- | arch/arm/plat-s5p/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/plat-s5p/cpu.c | 5 | ||||
-rw-r--r-- | arch/arm/plat-s5p/dev-csis0.c | 34 | ||||
-rw-r--r-- | arch/arm/plat-s5p/dev-csis1.c | 34 | ||||
-rw-r--r-- | arch/arm/plat-s5p/include/plat/csis.h | 28 | ||||
-rw-r--r-- | arch/arm/plat-s5p/include/plat/map-s5p.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-s5p/include/plat/regs-srom.h | 54 |
8 files changed, 168 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 65dbfa8e0a86..6a161f317a79 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
@@ -56,3 +56,13 @@ config S5P_DEV_ONENAND | |||
56 | bool | 56 | bool |
57 | help | 57 | help |
58 | Compile in platform device definition for OneNAND controller | 58 | Compile in platform device definition for OneNAND controller |
59 | |||
60 | config S5P_DEV_CSIS0 | ||
61 | bool | ||
62 | help | ||
63 | Compile in platform device definitions for MIPI-CSIS channel 0 | ||
64 | |||
65 | config S5P_DEV_CSIS1 | ||
66 | bool | ||
67 | help | ||
68 | Compile in platform device definitions for MIPI-CSIS channel 1 | ||
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index de65238a7aef..2b7317378103 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
@@ -28,3 +28,5 @@ obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o | |||
28 | obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o | 28 | obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o |
29 | obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o | 29 | obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o |
30 | obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o | 30 | obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o |
31 | obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o | ||
32 | obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o | ||
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index 74f7f5a5446c..047d31c1bbd8 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -108,6 +108,11 @@ static struct map_desc s5p_iodesc[] __initdata = { | |||
108 | .pfn = __phys_to_pfn(S3C_PA_WDT), | 108 | .pfn = __phys_to_pfn(S3C_PA_WDT), |
109 | .length = SZ_4K, | 109 | .length = SZ_4K, |
110 | .type = MT_DEVICE, | 110 | .type = MT_DEVICE, |
111 | }, { | ||
112 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
113 | .pfn = __phys_to_pfn(S5P_PA_SROMC), | ||
114 | .length = SZ_4K, | ||
115 | .type = MT_DEVICE, | ||
111 | }, | 116 | }, |
112 | }; | 117 | }; |
113 | 118 | ||
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c new file mode 100644 index 000000000000..dfab1c85f54f --- /dev/null +++ b/arch/arm/plat-s5p/dev-csis0.c | |||
@@ -0,0 +1,34 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics | ||
3 | * | ||
4 | * S5P series device definition for MIPI-CSIS channel 0 | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <mach/map.h> | ||
15 | |||
16 | static struct resource s5p_mipi_csis0_resource[] = { | ||
17 | [0] = { | ||
18 | .start = S5P_PA_MIPI_CSIS0, | ||
19 | .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1, | ||
20 | .flags = IORESOURCE_MEM, | ||
21 | }, | ||
22 | [1] = { | ||
23 | .start = IRQ_MIPI_CSIS0, | ||
24 | .end = IRQ_MIPI_CSIS0, | ||
25 | .flags = IORESOURCE_IRQ, | ||
26 | } | ||
27 | }; | ||
28 | |||
29 | struct platform_device s5p_device_mipi_csis0 = { | ||
30 | .name = "s5p-mipi-csis", | ||
31 | .id = 0, | ||
32 | .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), | ||
33 | .resource = s5p_mipi_csis0_resource, | ||
34 | }; | ||
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c new file mode 100644 index 000000000000..e3053f27fbbf --- /dev/null +++ b/arch/arm/plat-s5p/dev-csis1.c | |||
@@ -0,0 +1,34 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics | ||
3 | * | ||
4 | * S5P series device definition for MIPI-CSIS channel 1 | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <mach/map.h> | ||
15 | |||
16 | static struct resource s5p_mipi_csis1_resource[] = { | ||
17 | [0] = { | ||
18 | .start = S5P_PA_MIPI_CSIS1, | ||
19 | .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1, | ||
20 | .flags = IORESOURCE_MEM, | ||
21 | }, | ||
22 | [1] = { | ||
23 | .start = IRQ_MIPI_CSIS1, | ||
24 | .end = IRQ_MIPI_CSIS1, | ||
25 | .flags = IORESOURCE_IRQ, | ||
26 | }, | ||
27 | }; | ||
28 | |||
29 | struct platform_device s5p_device_mipi_csis1 = { | ||
30 | .name = "s5p-mipi-csis", | ||
31 | .id = 1, | ||
32 | .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), | ||
33 | .resource = s5p_mipi_csis1_resource, | ||
34 | }; | ||
diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/csis.h new file mode 100644 index 000000000000..51e308c7981d --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/csis.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Samsung Electronics | ||
3 | * | ||
4 | * S5P series MIPI CSI slave device support | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef PLAT_S5P_CSIS_H_ | ||
12 | #define PLAT_S5P_CSIS_H_ __FILE__ | ||
13 | |||
14 | /** | ||
15 | * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS | ||
16 | * @clk_rate: bus clock frequency | ||
17 | * @lanes: number of data lanes used | ||
18 | * @alignment: data alignment in bits | ||
19 | * @hs_settle: HS-RX settle time | ||
20 | */ | ||
21 | struct s5p_platform_mipi_csis { | ||
22 | unsigned long clk_rate; | ||
23 | u8 lanes; | ||
24 | u8 alignment; | ||
25 | u8 hs_settle; | ||
26 | }; | ||
27 | |||
28 | #endif /* PLAT_S5P_CSIS_H_ */ | ||
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h index fef353d44513..d973d39666a3 100644 --- a/arch/arm/plat-s5p/include/plat/map-s5p.h +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h | |||
@@ -15,6 +15,7 @@ | |||
15 | 15 | ||
16 | #define S5P_VA_CHIPID S3C_ADDR(0x02000000) | 16 | #define S5P_VA_CHIPID S3C_ADDR(0x02000000) |
17 | #define S5P_VA_CMU S3C_ADDR(0x02100000) | 17 | #define S5P_VA_CMU S3C_ADDR(0x02100000) |
18 | #define S5P_VA_PMU S3C_ADDR(0x02180000) | ||
18 | #define S5P_VA_GPIO S3C_ADDR(0x02200000) | 19 | #define S5P_VA_GPIO S3C_ADDR(0x02200000) |
19 | #define S5P_VA_GPIO1 S5P_VA_GPIO | 20 | #define S5P_VA_GPIO1 S5P_VA_GPIO |
20 | #define S5P_VA_GPIO2 S3C_ADDR(0x02240000) | 21 | #define S5P_VA_GPIO2 S3C_ADDR(0x02240000) |
diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-s5p/include/plat/regs-srom.h new file mode 100644 index 000000000000..f121ab5e76cb --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/regs-srom.h | |||
@@ -0,0 +1,54 @@ | |||
1 | /* linux/arch/arm/plat-s5p/include/plat/regs-srom.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P SROMC register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_PLAT_S5P_REGS_SROM_H | ||
14 | #define __ASM_PLAT_S5P_REGS_SROM_H __FILE__ | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | |||
18 | #define S5P_SROMREG(x) (S5P_VA_SROMC + (x)) | ||
19 | |||
20 | #define S5P_SROM_BW S5P_SROMREG(0x0) | ||
21 | #define S5P_SROM_BC0 S5P_SROMREG(0x4) | ||
22 | #define S5P_SROM_BC1 S5P_SROMREG(0x8) | ||
23 | #define S5P_SROM_BC2 S5P_SROMREG(0xc) | ||
24 | #define S5P_SROM_BC3 S5P_SROMREG(0x10) | ||
25 | #define S5P_SROM_BC4 S5P_SROMREG(0x14) | ||
26 | #define S5P_SROM_BC5 S5P_SROMREG(0x18) | ||
27 | |||
28 | /* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ | ||
29 | |||
30 | #define S5P_SROM_BW__DATAWIDTH__SHIFT 0 | ||
31 | #define S5P_SROM_BW__ADDRMODE__SHIFT 1 | ||
32 | #define S5P_SROM_BW__WAITENABLE__SHIFT 2 | ||
33 | #define S5P_SROM_BW__BYTEENABLE__SHIFT 3 | ||
34 | |||
35 | #define S5P_SROM_BW__CS_MASK 0xf | ||
36 | |||
37 | #define S5P_SROM_BW__NCS0__SHIFT 0 | ||
38 | #define S5P_SROM_BW__NCS1__SHIFT 4 | ||
39 | #define S5P_SROM_BW__NCS2__SHIFT 8 | ||
40 | #define S5P_SROM_BW__NCS3__SHIFT 12 | ||
41 | #define S5P_SROM_BW__NCS4__SHIFT 16 | ||
42 | #define S5P_SROM_BW__NCS5__SHIFT 20 | ||
43 | |||
44 | /* applies to same to BCS0 - BCS3 */ | ||
45 | |||
46 | #define S5P_SROM_BCX__PMC__SHIFT 0 | ||
47 | #define S5P_SROM_BCX__TACP__SHIFT 4 | ||
48 | #define S5P_SROM_BCX__TCAH__SHIFT 8 | ||
49 | #define S5P_SROM_BCX__TCOH__SHIFT 12 | ||
50 | #define S5P_SROM_BCX__TACC__SHIFT 16 | ||
51 | #define S5P_SROM_BCX__TCOS__SHIFT 24 | ||
52 | #define S5P_SROM_BCX__TACS__SHIFT 28 | ||
53 | |||
54 | #endif /* __ASM_PLAT_S5P_REGS_SROM_H */ | ||