diff options
Diffstat (limited to 'arch/arm/plat-s5p/cpu.c')
| -rw-r--r-- | arch/arm/plat-s5p/cpu.c | 144 |
1 files changed, 0 insertions, 144 deletions
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c deleted file mode 100644 index a56959e83516..000000000000 --- a/arch/arm/plat-s5p/cpu.c +++ /dev/null | |||
| @@ -1,144 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5p/cpu.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * S5P CPU Support | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | |||
| 16 | #include <asm/mach/arch.h> | ||
| 17 | #include <asm/mach/map.h> | ||
| 18 | |||
| 19 | #include <mach/map.h> | ||
| 20 | #include <mach/regs-clock.h> | ||
| 21 | |||
| 22 | #include <plat/cpu.h> | ||
| 23 | #include <plat/s5p6440.h> | ||
| 24 | #include <plat/s5p6450.h> | ||
| 25 | #include <plat/s5pc100.h> | ||
| 26 | #include <plat/s5pv210.h> | ||
| 27 | #include <plat/exynos4.h> | ||
| 28 | |||
| 29 | /* table of supported CPUs */ | ||
| 30 | |||
| 31 | static const char name_s5p6440[] = "S5P6440"; | ||
| 32 | static const char name_s5p6450[] = "S5P6450"; | ||
| 33 | static const char name_s5pc100[] = "S5PC100"; | ||
| 34 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | ||
| 35 | static const char name_exynos4210[] = "EXYNOS4210"; | ||
| 36 | static const char name_exynos4212[] = "EXYNOS4212"; | ||
| 37 | static const char name_exynos4412[] = "EXYNOS4412"; | ||
| 38 | |||
| 39 | static struct cpu_table cpu_ids[] __initdata = { | ||
| 40 | { | ||
| 41 | .idcode = S5P6440_CPU_ID, | ||
| 42 | .idmask = S5P64XX_CPU_MASK, | ||
| 43 | .map_io = s5p6440_map_io, | ||
| 44 | .init_clocks = s5p6440_init_clocks, | ||
| 45 | .init_uarts = s5p6440_init_uarts, | ||
| 46 | .init = s5p64x0_init, | ||
| 47 | .name = name_s5p6440, | ||
| 48 | }, { | ||
| 49 | .idcode = S5P6450_CPU_ID, | ||
| 50 | .idmask = S5P64XX_CPU_MASK, | ||
| 51 | .map_io = s5p6450_map_io, | ||
| 52 | .init_clocks = s5p6450_init_clocks, | ||
| 53 | .init_uarts = s5p6450_init_uarts, | ||
| 54 | .init = s5p64x0_init, | ||
| 55 | .name = name_s5p6450, | ||
| 56 | }, { | ||
| 57 | .idcode = S5PC100_CPU_ID, | ||
| 58 | .idmask = S5PC100_CPU_MASK, | ||
| 59 | .map_io = s5pc100_map_io, | ||
| 60 | .init_clocks = s5pc100_init_clocks, | ||
| 61 | .init_uarts = s5pc100_init_uarts, | ||
| 62 | .init = s5pc100_init, | ||
| 63 | .name = name_s5pc100, | ||
| 64 | }, { | ||
| 65 | .idcode = S5PV210_CPU_ID, | ||
| 66 | .idmask = S5PV210_CPU_MASK, | ||
| 67 | .map_io = s5pv210_map_io, | ||
| 68 | .init_clocks = s5pv210_init_clocks, | ||
| 69 | .init_uarts = s5pv210_init_uarts, | ||
| 70 | .init = s5pv210_init, | ||
| 71 | .name = name_s5pv210, | ||
| 72 | }, { | ||
| 73 | .idcode = EXYNOS4210_CPU_ID, | ||
| 74 | .idmask = EXYNOS4_CPU_MASK, | ||
| 75 | .map_io = exynos4_map_io, | ||
| 76 | .init_clocks = exynos4_init_clocks, | ||
| 77 | .init_uarts = exynos4_init_uarts, | ||
| 78 | .init = exynos_init, | ||
| 79 | .name = name_exynos4210, | ||
| 80 | }, { | ||
| 81 | .idcode = EXYNOS4212_CPU_ID, | ||
| 82 | .idmask = EXYNOS4_CPU_MASK, | ||
| 83 | .map_io = exynos4_map_io, | ||
| 84 | .init_clocks = exynos4_init_clocks, | ||
| 85 | .init_uarts = exynos4_init_uarts, | ||
| 86 | .init = exynos_init, | ||
| 87 | .name = name_exynos4212, | ||
| 88 | }, { | ||
| 89 | .idcode = EXYNOS4412_CPU_ID, | ||
| 90 | .idmask = EXYNOS4_CPU_MASK, | ||
| 91 | .map_io = exynos4_map_io, | ||
| 92 | .init_clocks = exynos4_init_clocks, | ||
| 93 | .init_uarts = exynos4_init_uarts, | ||
| 94 | .init = exynos_init, | ||
| 95 | .name = name_exynos4412, | ||
| 96 | }, | ||
| 97 | }; | ||
| 98 | |||
| 99 | /* minimal IO mapping */ | ||
| 100 | |||
| 101 | static struct map_desc s5p_iodesc[] __initdata = { | ||
| 102 | { | ||
| 103 | .virtual = (unsigned long)S5P_VA_CHIPID, | ||
| 104 | .pfn = __phys_to_pfn(S5P_PA_CHIPID), | ||
| 105 | .length = SZ_4K, | ||
| 106 | .type = MT_DEVICE, | ||
| 107 | }, { | ||
| 108 | .virtual = (unsigned long)S3C_VA_SYS, | ||
| 109 | .pfn = __phys_to_pfn(S5P_PA_SYSCON), | ||
| 110 | .length = SZ_64K, | ||
| 111 | .type = MT_DEVICE, | ||
| 112 | }, { | ||
| 113 | .virtual = (unsigned long)S3C_VA_TIMER, | ||
| 114 | .pfn = __phys_to_pfn(S5P_PA_TIMER), | ||
| 115 | .length = SZ_16K, | ||
| 116 | .type = MT_DEVICE, | ||
| 117 | }, { | ||
| 118 | .virtual = (unsigned long)S3C_VA_WATCHDOG, | ||
| 119 | .pfn = __phys_to_pfn(S3C_PA_WDT), | ||
| 120 | .length = SZ_4K, | ||
| 121 | .type = MT_DEVICE, | ||
| 122 | }, { | ||
| 123 | .virtual = (unsigned long)S5P_VA_SROMC, | ||
| 124 | .pfn = __phys_to_pfn(S5P_PA_SROMC), | ||
| 125 | .length = SZ_4K, | ||
| 126 | .type = MT_DEVICE, | ||
| 127 | }, | ||
| 128 | }; | ||
| 129 | |||
| 130 | /* read cpu identification code */ | ||
| 131 | |||
| 132 | void __init s5p_init_io(struct map_desc *mach_desc, | ||
| 133 | int size, void __iomem *cpuid_addr) | ||
| 134 | { | ||
| 135 | /* initialize the io descriptors we need for initialization */ | ||
| 136 | iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc)); | ||
| 137 | if (mach_desc) | ||
| 138 | iotable_init(mach_desc, size); | ||
| 139 | |||
| 140 | /* detect cpu id and rev. */ | ||
| 141 | s5p_init_cpu(cpuid_addr); | ||
| 142 | |||
| 143 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
| 144 | } | ||