diff options
Diffstat (limited to 'arch/arm/plat-s3c')
-rw-r--r-- | arch/arm/plat-s3c/Kconfig | 27 | ||||
-rw-r--r-- | arch/arm/plat-s3c/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c/gpio-config.c | 163 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h | 176 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/gpio-cfg.h | 110 | ||||
-rw-r--r-- | arch/arm/plat-s3c/include/plat/gpio-core.h | 9 |
6 files changed, 484 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index 77fc38f51874..45e62cba595c 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig | |||
@@ -120,6 +120,33 @@ config S3C_GPIO_TRACK | |||
120 | Internal configuration option to enable the s3c specific gpio | 120 | Internal configuration option to enable the s3c specific gpio |
121 | chip tracking if the platform requires it. | 121 | chip tracking if the platform requires it. |
122 | 122 | ||
123 | config S3C_GPIO_PULL_UPDOWN | ||
124 | bool | ||
125 | help | ||
126 | Internal configuration to enable the correct GPIO pull helper | ||
127 | |||
128 | config S3C_GPIO_PULL_DOWN | ||
129 | bool | ||
130 | help | ||
131 | Internal configuration to enable the correct GPIO pull helper | ||
132 | |||
133 | config S3C_GPIO_PULL_UP | ||
134 | bool | ||
135 | help | ||
136 | Internal configuration to enable the correct GPIO pull helper | ||
137 | |||
138 | config S3C_GPIO_CFG_S3C24XX | ||
139 | bool | ||
140 | help | ||
141 | Internal configuration to enable S3C24XX style GPIO configuration | ||
142 | functions. | ||
143 | |||
144 | config S3C_GPIO_CFG_S3C64XX | ||
145 | bool | ||
146 | help | ||
147 | Internal configuration to enable S3C64XX style GPIO configuration | ||
148 | functions. | ||
149 | |||
123 | # device definitions to compile in | 150 | # device definitions to compile in |
124 | 151 | ||
125 | config S3C_DEV_HSMMC | 152 | config S3C_DEV_HSMMC |
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile index 4d0299aef7ca..68a3451a2d9d 100644 --- a/arch/arm/plat-s3c/Makefile +++ b/arch/arm/plat-s3c/Makefile | |||
@@ -16,6 +16,7 @@ obj-y += time.o | |||
16 | obj-y += clock.o | 16 | obj-y += clock.o |
17 | obj-y += pwm-clock.o | 17 | obj-y += pwm-clock.o |
18 | obj-y += gpio.o | 18 | obj-y += gpio.o |
19 | obj-y += gpio-config.o | ||
19 | 20 | ||
20 | # devices | 21 | # devices |
21 | 22 | ||
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-s3c/gpio-config.c new file mode 100644 index 000000000000..7642b975a998 --- /dev/null +++ b/arch/arm/plat-s3c/gpio-config.c | |||
@@ -0,0 +1,163 @@ | |||
1 | /* linux/arch/arm/plat-s3c/gpio-config.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C series GPIO configuration core | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/gpio.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | #include <mach/gpio-core.h> | ||
20 | #include <plat/gpio-cfg.h> | ||
21 | #include <plat/gpio-cfg-helpers.h> | ||
22 | |||
23 | int s3c_gpio_cfgpin(unsigned int pin, unsigned int config) | ||
24 | { | ||
25 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
26 | unsigned long flags; | ||
27 | int offset; | ||
28 | int ret; | ||
29 | |||
30 | if (!chip) | ||
31 | return -EINVAL; | ||
32 | |||
33 | offset = pin - chip->chip.base; | ||
34 | |||
35 | local_irq_save(flags); | ||
36 | ret = s3c_gpio_do_setcfg(chip, offset, config); | ||
37 | local_irq_restore(flags); | ||
38 | |||
39 | return ret; | ||
40 | } | ||
41 | |||
42 | int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) | ||
43 | { | ||
44 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | ||
45 | unsigned long flags; | ||
46 | int offset, ret; | ||
47 | |||
48 | if (!chip) | ||
49 | return -EINVAL; | ||
50 | |||
51 | offset = pin - chip->chip.base; | ||
52 | |||
53 | local_irq_save(flags); | ||
54 | ret = s3c_gpio_do_setpull(chip, offset, pull); | ||
55 | local_irq_restore(flags); | ||
56 | |||
57 | return ret; | ||
58 | } | ||
59 | |||
60 | #ifdef CONFIG_S3C_GPIO_CFG_S3C24XX | ||
61 | int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip, | ||
62 | unsigned int off, unsigned int cfg) | ||
63 | { | ||
64 | void __iomem *reg = chip->base; | ||
65 | unsigned int shift = off; | ||
66 | u32 con; | ||
67 | |||
68 | if (s3c_gpio_is_cfg_special(cfg)) { | ||
69 | cfg &= 0xf; | ||
70 | |||
71 | /* Map output to 0, and SFN2 to 1 */ | ||
72 | cfg -= 1; | ||
73 | if (cfg > 1) | ||
74 | return -EINVAL; | ||
75 | |||
76 | cfg <<= shift; | ||
77 | } | ||
78 | |||
79 | con = __raw_readl(reg); | ||
80 | con &= ~(0x1 << shift); | ||
81 | con |= cfg; | ||
82 | __raw_writel(con, reg); | ||
83 | |||
84 | return 0; | ||
85 | } | ||
86 | |||
87 | int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, | ||
88 | unsigned int off, unsigned int cfg) | ||
89 | { | ||
90 | void __iomem *reg = chip->base; | ||
91 | unsigned int shift = off * 2; | ||
92 | u32 con; | ||
93 | |||
94 | if (s3c_gpio_is_cfg_special(cfg)) { | ||
95 | cfg &= 0xf; | ||
96 | if (cfg > 3) | ||
97 | return -EINVAL; | ||
98 | |||
99 | cfg <<= shift; | ||
100 | } | ||
101 | |||
102 | con = __raw_readl(reg); | ||
103 | con &= ~(0x3 << shift); | ||
104 | con |= cfg; | ||
105 | __raw_writel(con, reg); | ||
106 | |||
107 | return 0; | ||
108 | } | ||
109 | #endif | ||
110 | |||
111 | #ifdef CONFIG_S3C_GPIO_CFG_S3C64XX | ||
112 | int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | ||
113 | unsigned int off, unsigned int cfg) | ||
114 | { | ||
115 | void __iomem *reg = chip->base; | ||
116 | unsigned int shift = (off & 7) * 4; | ||
117 | u32 con; | ||
118 | |||
119 | if (off < 8 && chip->chip.ngpio >= 8) | ||
120 | reg -= 4; | ||
121 | |||
122 | if (s3c_gpio_is_cfg_special(cfg)) { | ||
123 | cfg &= 0xf; | ||
124 | cfg <<= shift; | ||
125 | } | ||
126 | |||
127 | con = __raw_readl(reg); | ||
128 | con &= ~(0xf << shift); | ||
129 | con |= cfg; | ||
130 | __raw_writel(con, reg); | ||
131 | |||
132 | return 0; | ||
133 | } | ||
134 | #endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */ | ||
135 | |||
136 | #ifdef CONFIG_S3C_GPIO_PULL_UPDOWN | ||
137 | int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip, | ||
138 | unsigned int off, s3c_gpio_pull_t pull) | ||
139 | { | ||
140 | void __iomem *reg = chip->base + 0x08; | ||
141 | int shift = off * 2; | ||
142 | u32 pup; | ||
143 | |||
144 | pup = __raw_readl(reg); | ||
145 | pup &= ~(3 << shift); | ||
146 | pup |= pull << shift; | ||
147 | __raw_writel(pup, reg); | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, | ||
153 | unsigned int off) | ||
154 | { | ||
155 | void __iomem *reg = chip->base + 0x08; | ||
156 | int shift = off * 2; | ||
157 | u32 pup = __raw_readl(reg); | ||
158 | |||
159 | pup >>= shift; | ||
160 | pup &= 0x3; | ||
161 | return (__force s3c_gpio_pull_t)pup; | ||
162 | } | ||
163 | #endif | ||
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h new file mode 100644 index 000000000000..652e2bbdaa20 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h | |||
@@ -0,0 +1,176 @@ | |||
1 | /* linux/arch/arm/plat-s3c/include/plat/gpio-cfg-helper.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C Platform - GPIO pin configuration helper definitions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /* This is meant for core cpu support, machine or other driver files | ||
16 | * should not be including this header. | ||
17 | */ | ||
18 | |||
19 | #ifndef __PLAT_GPIO_CFG_HELPERS_H | ||
20 | #define __PLAT_GPIO_CFG_HELPERS_H __FILE__ | ||
21 | |||
22 | /* As a note, all gpio configuration functions are entered exclusively, either | ||
23 | * with the relevant lock held or the system prevented from doing anything else | ||
24 | * by disabling interrupts. | ||
25 | */ | ||
26 | |||
27 | static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip, | ||
28 | unsigned int off, unsigned int config) | ||
29 | { | ||
30 | return (chip->config->set_config)(chip, off, config); | ||
31 | } | ||
32 | |||
33 | static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, | ||
34 | unsigned int off, s3c_gpio_pull_t pull) | ||
35 | { | ||
36 | return (chip->config->set_pull)(chip, off, pull); | ||
37 | } | ||
38 | |||
39 | /** | ||
40 | * s3c_gpio_setcfg_s3c24xx - S3C24XX style GPIO configuration. | ||
41 | * @chip: The gpio chip that is being configured. | ||
42 | * @off: The offset for the GPIO being configured. | ||
43 | * @cfg: The configuration value to set. | ||
44 | * | ||
45 | * This helper deal with the GPIO cases where the control register | ||
46 | * has two bits of configuration per gpio, which have the following | ||
47 | * functions: | ||
48 | * 00 = input | ||
49 | * 01 = output | ||
50 | * 1x = special function | ||
51 | */ | ||
52 | extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, | ||
53 | unsigned int off, unsigned int cfg); | ||
54 | |||
55 | /** | ||
56 | * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) | ||
57 | * @chip: The gpio chip that is being configured. | ||
58 | * @off: The offset for the GPIO being configured. | ||
59 | * @cfg: The configuration value to set. | ||
60 | * | ||
61 | * This helper deal with the GPIO cases where the control register | ||
62 | * has one bit of configuration for the gpio, where setting the bit | ||
63 | * means the pin is in special function mode and unset means output. | ||
64 | */ | ||
65 | extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, | ||
66 | unsigned int off, unsigned int cfg); | ||
67 | |||
68 | /** | ||
69 | * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. | ||
70 | * @chip: The gpio chip that is being configured. | ||
71 | * @off: The offset for the GPIO being configured. | ||
72 | * @cfg: The configuration value to set. | ||
73 | * | ||
74 | * This helper deal with the GPIO cases where the control register has 4 bits | ||
75 | * of control per GPIO, generally in the form of: | ||
76 | * 0000 = Input | ||
77 | * 0001 = Output | ||
78 | * others = Special functions (dependant on bank) | ||
79 | * | ||
80 | * Note, since the code to deal with the case where there are two control | ||
81 | * registers instead of one, we do not have a seperate set of functions for | ||
82 | * each case. | ||
83 | */ | ||
84 | extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, | ||
85 | unsigned int off, unsigned int cfg); | ||
86 | |||
87 | |||
88 | /* Pull-{up,down} resistor controls. | ||
89 | * | ||
90 | * S3C2410,S3C2440,S3C24A0 = Pull-UP, | ||
91 | * S3C2412,S3C2413 = Pull-Down | ||
92 | * S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef] | ||
93 | * S3C2443 = Pull-Both [not same as S3C6400] | ||
94 | */ | ||
95 | |||
96 | /** | ||
97 | * s3c_gpio_setpull_1up() - Pull configuration for choice of up or none. | ||
98 | * @chip: The gpio chip that is being configured. | ||
99 | * @off: The offset for the GPIO being configured. | ||
100 | * @param: pull: The pull mode being requested. | ||
101 | * | ||
102 | * This is a helper function for the case where we have GPIOs with one | ||
103 | * bit configuring the presence of a pull-up resistor. | ||
104 | */ | ||
105 | extern int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, | ||
106 | unsigned int off, s3c_gpio_pull_t pull); | ||
107 | |||
108 | /** | ||
109 | * s3c_gpio_setpull_1down() - Pull configuration for choice of down or none | ||
110 | * @chip: The gpio chip that is being configured | ||
111 | * @off: The offset for the GPIO being configured | ||
112 | * @param: pull: The pull mode being requested | ||
113 | * | ||
114 | * This is a helper function for the case where we have GPIOs with one | ||
115 | * bit configuring the presence of a pull-down resistor. | ||
116 | */ | ||
117 | extern int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip, | ||
118 | unsigned int off, s3c_gpio_pull_t pull); | ||
119 | |||
120 | /** | ||
121 | * s3c_gpio_setpull_upown() - Pull configuration for choice of up, down or none | ||
122 | * @chip: The gpio chip that is being configured. | ||
123 | * @off: The offset for the GPIO being configured. | ||
124 | * @param: pull: The pull mode being requested. | ||
125 | * | ||
126 | * This is a helper function for the case where we have GPIOs with two | ||
127 | * bits configuring the presence of a pull resistor, in the following | ||
128 | * order: | ||
129 | * 00 = No pull resistor connected | ||
130 | * 01 = Pull-up resistor connected | ||
131 | * 10 = Pull-down resistor connected | ||
132 | */ | ||
133 | extern int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip, | ||
134 | unsigned int off, s3c_gpio_pull_t pull); | ||
135 | |||
136 | |||
137 | /** | ||
138 | * s3c_gpio_getpull_updown() - Get configuration for choice of up, down or none | ||
139 | * @chip: The gpio chip that the GPIO pin belongs to | ||
140 | * @off: The offset to the pin to get the configuration of. | ||
141 | * | ||
142 | * This helper function reads the state of the pull-{up,down} resistor for the | ||
143 | * given GPIO in the same case as s3c_gpio_setpull_upown. | ||
144 | */ | ||
145 | extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, | ||
146 | unsigned int off); | ||
147 | |||
148 | /** | ||
149 | * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. | ||
150 | * @chip: The gpio chip that is being configured. | ||
151 | * @off: The offset for the GPIO being configured. | ||
152 | * @param: pull: The pull mode being requested. | ||
153 | * | ||
154 | * This is a helper function for the case where we have GPIOs with two | ||
155 | * bits configuring the presence of a pull resistor, in the following | ||
156 | * order: | ||
157 | * 00 = Pull-up resistor connected | ||
158 | * 10 = Pull-down resistor connected | ||
159 | * x1 = No pull up resistor | ||
160 | */ | ||
161 | extern int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip, | ||
162 | unsigned int off, s3c_gpio_pull_t pull); | ||
163 | |||
164 | /** | ||
165 | * s3c_gpio_getpull_s3c2443() - Get configuration for s3c2443 pull resistors | ||
166 | * @chip: The gpio chip that the GPIO pin belongs to. | ||
167 | * @off: The offset to the pin to get the configuration of. | ||
168 | * | ||
169 | * This helper function reads the state of the pull-{up,down} resistor for the | ||
170 | * given GPIO in the same case as s3c_gpio_setpull_upown. | ||
171 | */ | ||
172 | extern s3c_gpio_pull_t s3c_gpio_getpull_s3c24xx(struct s3c_gpio_chip *chip, | ||
173 | unsigned int off); | ||
174 | |||
175 | #endif /* __PLAT_GPIO_CFG_HELPERS_H */ | ||
176 | |||
diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg.h b/arch/arm/plat-s3c/include/plat/gpio-cfg.h new file mode 100644 index 000000000000..29cd6a86cade --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/gpio-cfg.h | |||
@@ -0,0 +1,110 @@ | |||
1 | /* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * S3C Platform - GPIO pin configuration | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /* This file contains the necessary definitions to get the basic gpio | ||
16 | * pin configuration done such as setting a pin to input or output or | ||
17 | * changing the pull-{up,down} configurations. | ||
18 | */ | ||
19 | |||
20 | /* Note, this interface is being added to the s3c64xx arch first and will | ||
21 | * be added to the s3c24xx systems later. | ||
22 | */ | ||
23 | |||
24 | #ifndef __PLAT_GPIO_CFG_H | ||
25 | #define __PLAT_GPIO_CFG_H __FILE__ | ||
26 | |||
27 | typedef unsigned int __bitwise__ s3c_gpio_pull_t; | ||
28 | |||
29 | /* forward declaration if gpio-core.h hasn't been included */ | ||
30 | struct s3c_gpio_chip; | ||
31 | |||
32 | /** | ||
33 | * struct s3c_gpio_cfg GPIO configuration | ||
34 | * @cfg_eint: Configuration setting when used for external interrupt source | ||
35 | * @get_pull: Read the current pull configuration for the GPIO | ||
36 | * @set_pull: Set the current pull configuraiton for the GPIO | ||
37 | * @set_config: Set the current configuration for the GPIO | ||
38 | * @get_config: Read the current configuration for the GPIO | ||
39 | * | ||
40 | * Each chip can have more than one type of GPIO bank available and some | ||
41 | * have different capabilites even when they have the same control register | ||
42 | * layouts. Provide an point to vector control routine and provide any | ||
43 | * per-bank configuration information that other systems such as the | ||
44 | * external interrupt code will need. | ||
45 | */ | ||
46 | struct s3c_gpio_cfg { | ||
47 | unsigned int cfg_eint; | ||
48 | |||
49 | s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs); | ||
50 | int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs, | ||
51 | s3c_gpio_pull_t pull); | ||
52 | |||
53 | unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs); | ||
54 | int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs, | ||
55 | unsigned config); | ||
56 | }; | ||
57 | |||
58 | #define S3C_GPIO_SPECIAL_MARK (0xfffffff0) | ||
59 | #define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x)) | ||
60 | |||
61 | /* Defines for generic pin configurations */ | ||
62 | #define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0)) | ||
63 | #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1)) | ||
64 | #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x)) | ||
65 | |||
66 | #define s3c_gpio_is_cfg_special(_cfg) \ | ||
67 | (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK) | ||
68 | |||
69 | /** | ||
70 | * s3c_gpio_cfgpin() - Change the GPIO function of a pin. | ||
71 | * @pin pin The pin number to configure. | ||
72 | * @pin to The configuration for the pin's function. | ||
73 | * | ||
74 | * Configure which function is actually connected to the external | ||
75 | * pin, such as an gpio input, output or some form of special function | ||
76 | * connected to an internal peripheral block. | ||
77 | */ | ||
78 | extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); | ||
79 | |||
80 | /* Define values for the pull-{up,down} available for each gpio pin. | ||
81 | * | ||
82 | * These values control the state of the weak pull-{up,down} resistors | ||
83 | * available on most pins on the S3C series. Not all chips support both | ||
84 | * up or down settings, and it may be dependant on the chip that is being | ||
85 | * used to whether the particular mode is available. | ||
86 | */ | ||
87 | #define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) | ||
88 | #define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01) | ||
89 | #define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02) | ||
90 | |||
91 | /** | ||
92 | * s3c_gpio_setpull() - set the state of a gpio pin pull resistor | ||
93 | * @pin: The pin number to configure the pull resistor. | ||
94 | * @pull: The configuration for the pull resistor. | ||
95 | * | ||
96 | * This function sets the state of the pull-{up,down} resistor for the | ||
97 | * specified pin. It will return 0 if successfull, or a negative error | ||
98 | * code if the pin cannot support the requested pull setting. | ||
99 | */ | ||
100 | extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); | ||
101 | |||
102 | /** | ||
103 | * s3c_gpio_getpull() - get the pull resistor state of a gpio pin | ||
104 | * @pin: The pin number to get the settings for | ||
105 | * | ||
106 | * Read the pull resistor value for the specified pin. | ||
107 | */ | ||
108 | extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); | ||
109 | |||
110 | #endif /* __PLAT_GPIO_CFG_H */ | ||
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-s3c/include/plat/gpio-core.h index ad68b32a7f9d..2fc60a580ac8 100644 --- a/arch/arm/plat-s3c/include/plat/gpio-core.h +++ b/arch/arm/plat-s3c/include/plat/gpio-core.h | |||
@@ -20,16 +20,20 @@ | |||
20 | * specific code. | 20 | * specific code. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | struct s3c_gpio_cfg; | ||
24 | |||
23 | /** | 25 | /** |
24 | * struct s3c_gpio_chip - wrapper for specific implementation of gpio | 26 | * struct s3c_gpio_chip - wrapper for specific implementation of gpio |
25 | * @chip: The chip structure to be exported via gpiolib. | 27 | * @chip: The chip structure to be exported via gpiolib. |
26 | * @base: The base pointer to the gpio configuration registers. | 28 | * @base: The base pointer to the gpio configuration registers. |
29 | * @config: special function and pull-resistor control information. | ||
27 | * | 30 | * |
28 | * This wrapper provides the necessary information for the Samsung | 31 | * This wrapper provides the necessary information for the Samsung |
29 | * specific gpios being registered with gpiolib. | 32 | * specific gpios being registered with gpiolib. |
30 | */ | 33 | */ |
31 | struct s3c_gpio_chip { | 34 | struct s3c_gpio_chip { |
32 | struct gpio_chip chip; | 35 | struct gpio_chip chip; |
36 | struct s3c_gpio_cfg *config; | ||
33 | void __iomem *base; | 37 | void __iomem *base; |
34 | }; | 38 | }; |
35 | 39 | ||
@@ -48,7 +52,6 @@ static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc) | |||
48 | */ | 52 | */ |
49 | extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); | 53 | extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); |
50 | 54 | ||
51 | |||
52 | /* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios | 55 | /* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios |
53 | * for use with the configuration calls, and other parts of the s3c gpiolib | 56 | * for use with the configuration calls, and other parts of the s3c gpiolib |
54 | * support code. | 57 | * support code. |
@@ -65,8 +68,10 @@ extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; | |||
65 | 68 | ||
66 | static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip) | 69 | static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip) |
67 | { | 70 | { |
68 | return s3c_gpios[chip]; | 71 | return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL; |
69 | } | 72 | } |
70 | #else | 73 | #else |
74 | /* machine specific code should provide s3c_gpiolib_getchip */ | ||
75 | |||
71 | static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } | 76 | static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } |
72 | #endif | 77 | #endif |