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-rw-r--r--arch/arm/plat-s3c/Kconfig11
-rw-r--r--arch/arm/plat-s3c/Makefile1
-rw-r--r--arch/arm/plat-s3c/clock.c4
-rw-r--r--arch/arm/plat-s3c/dev-hsmmc2.c69
-rw-r--r--arch/arm/plat-s3c/dev-i2c0.c2
-rw-r--r--arch/arm/plat-s3c/dev-i2c1.c2
-rw-r--r--arch/arm/plat-s3c/dev-nand.c97
-rw-r--r--arch/arm/plat-s3c/dma.c2
-rw-r--r--arch/arm/plat-s3c/include/plat/audio-simtec.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/cpu-freq.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/cpu.h6
-rw-r--r--arch/arm/plat-s3c/include/plat/dma.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/fb.h7
-rw-r--r--arch/arm/plat-s3c/include/plat/iic.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/nand.h8
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-fb-v4.h235
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-nand.h4
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-serial.h2
-rw-r--r--arch/arm/plat-s3c/include/plat/sdhci.h78
-rw-r--r--arch/arm/plat-s3c/pm-check.c2
-rw-r--r--arch/arm/plat-s3c/pm.c2
21 files changed, 526 insertions, 14 deletions
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index 8931c5f0e46b..e139a72c2149 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -159,6 +159,12 @@ config S3C_GPIO_CFG_S3C64XX
159 Internal configuration to enable S3C64XX style GPIO configuration 159 Internal configuration to enable S3C64XX style GPIO configuration
160 functions. 160 functions.
161 161
162config S5P_GPIO_CFG_S5PC1XX
163 bool
164 help
165 Internal configuration to enable S5PC1XX style GPIO configuration
166 functions.
167
162# DMA 168# DMA
163 169
164config S3C_DMA 170config S3C_DMA
@@ -178,6 +184,11 @@ config S3C_DEV_HSMMC1
178 help 184 help
179 Compile in platform device definitions for HSMMC channel 1 185 Compile in platform device definitions for HSMMC channel 1
180 186
187config S3C_DEV_HSMMC2
188 bool
189 help
190 Compile in platform device definitions for HSMMC channel 2
191
181config S3C_DEV_I2C1 192config S3C_DEV_I2C1
182 bool 193 bool
183 help 194 help
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index 3c09109e9e84..50444da98425 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_HAVE_PWM) += pwm.o
36 36
37obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o 37obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
38obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 38obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
39obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
39obj-y += dev-i2c0.o 40obj-y += dev-i2c0.o
40obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 41obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
41obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 42obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c
index 4d01ef1a25dd..619cfa82dcab 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-s3c/clock.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c24xx/clock.c 1/* linux/arch/arm/plat-s3c24xx/clock.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C24XX Core clock control support 6 * S3C24XX Core clock control support
@@ -337,7 +337,7 @@ int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
337 337
338int __init s3c24xx_register_baseclocks(unsigned long xtal) 338int __init s3c24xx_register_baseclocks(unsigned long xtal)
339{ 339{
340 printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n"); 340 printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
341 341
342 clk_xtal.rate = xtal; 342 clk_xtal.rate = xtal;
343 343
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-s3c/dev-hsmmc2.c
new file mode 100644
index 000000000000..824580bc0e06
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-hsmmc2.c
@@ -0,0 +1,69 @@
1/* linux/arch/arm/plat-s3c/dev-hsmmc2.c
2 *
3 * Copyright (c) 2009 Samsung Electronics
4 * Copyright (c) 2009 Maurus Cuelenaere
5 *
6 * Based on arch/arm/plat-s3c/dev-hsmmc1.c
7 * original file Copyright (c) 2008 Simtec Electronics
8 *
9 * S3C series device definition for hsmmc device 2
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/mmc/host.h>
19
20#include <mach/map.h>
21#include <plat/sdhci.h>
22#include <plat/devs.h>
23
24#define S3C_SZ_HSMMC (0x1000)
25
26static struct resource s3c_hsmmc2_resource[] = {
27 [0] = {
28 .start = S3C_PA_HSMMC2,
29 .end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1,
30 .flags = IORESOURCE_MEM,
31 },
32 [1] = {
33 .start = IRQ_HSMMC2,
34 .end = IRQ_HSMMC2,
35 .flags = IORESOURCE_IRQ,
36 }
37};
38
39static u64 s3c_device_hsmmc2_dmamask = 0xffffffffUL;
40
41struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
42 .max_width = 4,
43 .host_caps = (MMC_CAP_4_BIT_DATA |
44 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
45};
46
47struct platform_device s3c_device_hsmmc2 = {
48 .name = "s3c-sdhci",
49 .id = 2,
50 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
51 .resource = s3c_hsmmc2_resource,
52 .dev = {
53 .dma_mask = &s3c_device_hsmmc2_dmamask,
54 .coherent_dma_mask = 0xffffffffUL,
55 .platform_data = &s3c_hsmmc2_def_platdata,
56 },
57};
58
59void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
60{
61 struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata;
62
63 set->max_width = pd->max_width;
64
65 if (pd->cfg_gpio)
66 set->cfg_gpio = pd->cfg_gpio;
67 if (pd->cfg_card)
68 set->cfg_card = pd->cfg_card;
69}
diff --git a/arch/arm/plat-s3c/dev-i2c0.c b/arch/arm/plat-s3c/dev-i2c0.c
index 428372868fbb..4c761529b949 100644
--- a/arch/arm/plat-s3c/dev-i2c0.c
+++ b/arch/arm/plat-s3c/dev-i2c0.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c/dev-i2c0.c 1/* linux/arch/arm/plat-s3c/dev-i2c0.c
2 * 2 *
3 * Copyright 2008,2009 Simtec Electronics 3 * Copyright 2008-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 5 * http://armlinux.simtec.co.uk/
6 * 6 *
diff --git a/arch/arm/plat-s3c/dev-i2c1.c b/arch/arm/plat-s3c/dev-i2c1.c
index 8349c462788c..d44f79110506 100644
--- a/arch/arm/plat-s3c/dev-i2c1.c
+++ b/arch/arm/plat-s3c/dev-i2c1.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c/dev-i2c1.c 1/* linux/arch/arm/plat-s3c/dev-i2c1.c
2 * 2 *
3 * Copyright 2008,2009 Simtec Electronics 3 * Copyright 2008-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 5 * http://armlinux.simtec.co.uk/
6 * 6 *
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-s3c/dev-nand.c
index 4e5323732434..e771e77dcd54 100644
--- a/arch/arm/plat-s3c/dev-nand.c
+++ b/arch/arm/plat-s3c/dev-nand.c
@@ -9,8 +9,12 @@
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11 11
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14
12#include <mach/map.h> 15#include <mach/map.h>
13#include <plat/devs.h> 16#include <plat/devs.h>
17#include <plat/nand.h>
14 18
15static struct resource s3c_nand_resource[] = { 19static struct resource s3c_nand_resource[] = {
16 [0] = { 20 [0] = {
@@ -28,3 +32,96 @@ struct platform_device s3c_device_nand = {
28}; 32};
29 33
30EXPORT_SYMBOL(s3c_device_nand); 34EXPORT_SYMBOL(s3c_device_nand);
35
36/**
37 * s3c_nand_copy_set() - copy nand set data
38 * @set: The new structure, directly copied from the old.
39 *
40 * Copy all the fields from the NAND set field from what is probably __initdata
41 * to new kernel memory. The code returns 0 if the copy happened correctly or
42 * an error code for the calling function to display.
43 *
44 * Note, we currently do not try and look to see if we've already copied the
45 * data in a previous set.
46 */
47static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
48{
49 void *ptr;
50 int size;
51
52 size = sizeof(struct mtd_partition) * set->nr_partitions;
53 if (size) {
54 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
55 set->partitions = ptr;
56
57 if (!ptr)
58 return -ENOMEM;
59 }
60
61 size = sizeof(int) * set->nr_chips;
62 if (size) {
63 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
64 set->nr_map = ptr;
65
66 if (!ptr)
67 return -ENOMEM;
68 }
69
70 if (set->ecc_layout) {
71 ptr = kmemdup(set->ecc_layout,
72 sizeof(struct nand_ecclayout), GFP_KERNEL);
73 set->ecc_layout = ptr;
74
75 if (!ptr)
76 return -ENOMEM;
77 }
78
79 return 0;
80}
81
82void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
83{
84 struct s3c2410_platform_nand *npd;
85 int size;
86 int ret;
87
88 /* note, if we get a failure in allocation, we simply drop out of the
89 * function. If there is so little memory available at initialisation
90 * time then there is little chance the system is going to run.
91 */
92
93 npd = kmemdup(nand, sizeof(struct s3c2410_platform_nand), GFP_KERNEL);
94 if (!npd) {
95 printk(KERN_ERR "%s: failed copying platform data\n", __func__);
96 return;
97 }
98
99 /* now see if we need to copy any of the nand set data */
100
101 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
102 if (size) {
103 struct s3c2410_nand_set *from = npd->sets;
104 struct s3c2410_nand_set *to;
105 int i;
106
107 to = kmemdup(from, size, GFP_KERNEL);
108 npd->sets = to; /* set, even if we failed */
109
110 if (!to) {
111 printk(KERN_ERR "%s: no memory for sets\n", __func__);
112 return;
113 }
114
115 for (i = 0; i < npd->nr_sets; i++) {
116 ret = s3c_nand_copy_set(to);
117 if (!ret) {
118 printk(KERN_ERR "%s: failed to copy set %d\n",
119 __func__, i);
120 return;
121 }
122 to++;
123 }
124 }
125}
126
127EXPORT_SYMBOL_GPL(s3c_nand_set_platdata);
diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-s3c/dma.c
index c9db75c06af5..a995850cd9d5 100644
--- a/arch/arm/plat-s3c/dma.c
+++ b/arch/arm/plat-s3c/dma.c
@@ -1,6 +1,6 @@
1/* linux/arch/arm/plat-s3c/dma.c 1/* linux/arch/arm/plat-s3c/dma.c
2 * 2 *
3 * Copyright (c) 2003-2005,2006,2009 Simtec Electronics 3 * Copyright (c) 2003-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/ 5 * http://armlinux.simtec.co.uk/
6 * 6 *
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c/include/plat/audio-simtec.h
index 0f440b9168db..53a93656d5db 100644
--- a/arch/arm/plat-s3c/include/plat/audio-simtec.h
+++ b/arch/arm/plat-s3c/include/plat/audio-simtec.h
@@ -33,5 +33,5 @@ struct s3c24xx_audio_simtec_pdata {
33 void (*startup)(void); 33 void (*startup)(void);
34}; 34};
35 35
36extern int simtec_audio_add(const char *codec_name, 36extern int simtec_audio_add(const char *codec_name, bool has_lr_routing,
37 struct s3c24xx_audio_simtec_pdata *pdata); 37 struct s3c24xx_audio_simtec_pdata *pdata);
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h
index 7b982b7f28cd..94eb06a2ea5c 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h
@@ -1,6 +1,6 @@
1/* arch/arm/plat-s3c/include/plat/cpu-freq.h 1/* arch/arm/plat-s3c/include/plat/cpu-freq.h
2 * 2 *
3 * Copyright (c) 2006,2007 Simtec Electronics 3 * Copyright (c) 2006-2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h
index fbc3d498e02e..d1131ca11e97 100644
--- a/arch/arm/plat-s3c/include/plat/cpu.h
+++ b/arch/arm/plat-s3c/include/plat/cpu.h
@@ -12,6 +12,9 @@
12 12
13/* todo - fix when rmk changes iodescs to use `void __iomem *` */ 13/* todo - fix when rmk changes iodescs to use `void __iomem *` */
14 14
15#ifndef __SAMSUNG_PLAT_CPU_H
16#define __SAMSUNG_PLAT_CPU_H
17
15#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 18#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
16 19
17#ifndef MHZ 20#ifndef MHZ
@@ -73,3 +76,6 @@ extern struct sysdev_class s3c2443_sysclass;
73extern struct sysdev_class s3c6410_sysclass; 76extern struct sysdev_class s3c6410_sysclass;
74extern struct sysdev_class s3c64xx_sysclass; 77extern struct sysdev_class s3c64xx_sysclass;
75 78
79extern void (*s5pc1xx_idle)(void);
80
81#endif
diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-s3c/include/plat/dma.h
index 34dba98f08e1..e429d10be3ad 100644
--- a/arch/arm/plat-s3c/include/plat/dma.h
+++ b/arch/arm/plat-s3c/include/plat/dma.h
@@ -1,6 +1,6 @@
1/* arch/arm/plat-s3c/include/plat/dma.h 1/* arch/arm/plat-s3c/include/plat/dma.h
2 * 2 *
3 * Copyright (C) 2003,2004,2006 Simtec Electronics 3 * Copyright (C) 2003-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C DMA support 6 * Samsung S3C DMA support
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-s3c/include/plat/fb.h
index 214ff561b0dd..f8db87930f8b 100644
--- a/arch/arm/plat-s3c/include/plat/fb.h
+++ b/arch/arm/plat-s3c/include/plat/fb.h
@@ -70,4 +70,11 @@ extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
70 */ 70 */
71extern void s3c64xx_fb_gpio_setup_24bpp(void); 71extern void s3c64xx_fb_gpio_setup_24bpp(void);
72 72
73/**
74 * s5pc100_fb_gpio_setup_24bpp() - S5PC100 setup function for 24bpp LCD
75 *
76 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
77 */
78extern void s5pc100_fb_gpio_setup_24bpp(void);
79
73#endif /* __PLAT_S3C_FB_H */ 80#endif /* __PLAT_S3C_FB_H */
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-s3c/include/plat/iic.h
index 67450f115748..3083df00dee6 100644
--- a/arch/arm/plat-s3c/include/plat/iic.h
+++ b/arch/arm/plat-s3c/include/plat/iic.h
@@ -1,6 +1,6 @@
1/* arch/arm/plat-s3c/include/plat/iic.h 1/* arch/arm/plat-s3c/include/plat/iic.h
2 * 2 *
3 * Copyright 2004,2009 Simtec Electronics 3 * Copyright 2004-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * S3C - I2C Controller platform_device info 6 * S3C - I2C Controller platform_device info
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h
index 18f958801e64..065985978413 100644
--- a/arch/arm/plat-s3c/include/plat/nand.h
+++ b/arch/arm/plat-s3c/include/plat/nand.h
@@ -55,3 +55,11 @@ struct s3c2410_platform_nand {
55 int chip); 55 int chip);
56}; 56};
57 57
58/**
59 * s3c_nand_set_platdata() - register NAND platform data.
60 * @nand: The NAND platform data to register with s3c_device_nand.
61 *
62 * This function copies the given NAND platform data, @nand and registers
63 * it with the s3c_device_nand. This allows @nand to be __initdata.
64*/
65extern void s3c_nand_set_platdata(struct s3c2410_platform_nand *nand);
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-s3c/include/plat/regs-fb-v4.h
new file mode 100644
index 000000000000..a60ed0d06c94
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-fb-v4.h
@@ -0,0 +1,235 @@
1/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - new-style framebuffer register definitions
9 *
10 * This is the register set for the new style framebuffer interface
11 * found from the S3C2443 onwards and specifically the S3C64XX series
12 * S3C6400 and S3C6410.
13 *
14 * The file contains the cpu specific items which change between whichever
15 * architecture is selected. See <plat/regs-fb.h> for the core definitions
16 * that are the same.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21*/
22
23/* include the core definitions here, in case we really do need to
24 * override them at a later date.
25*/
26
27#include <plat/regs-fb.h>
28
29#define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */
30#define VIDCON1_FSTATUS_EVEN (1 << 15)
31
32/* Video timing controls */
33#define VIDTCON0 (0x10)
34#define VIDTCON1 (0x14)
35#define VIDTCON2 (0x18)
36
37/* Window position controls */
38
39#define WINCON(_win) (0x20 + ((_win) * 4))
40
41/* OSD1 and OSD4 do not have register D */
42
43#define VIDOSD_A(_win) (0x40 + ((_win) * 16))
44#define VIDOSD_B(_win) (0x44 + ((_win) * 16))
45#define VIDOSD_C(_win) (0x48 + ((_win) * 16))
46#define VIDOSD_D(_win) (0x4C + ((_win) * 16))
47
48
49#define VIDINTCON0 (0x130)
50
51#define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4))
52
53/* WINCONx */
54
55#define WINCONx_CSCWIDTH_MASK (0x3 << 26)
56#define WINCONx_CSCWIDTH_SHIFT (26)
57#define WINCONx_CSCWIDTH_WIDE (0x0 << 26)
58#define WINCONx_CSCWIDTH_NARROW (0x3 << 26)
59
60#define WINCONx_ENLOCAL (1 << 22)
61#define WINCONx_BUFSTATUS (1 << 21)
62#define WINCONx_BUFSEL (1 << 20)
63#define WINCONx_BUFAUTOEN (1 << 19)
64#define WINCONx_YCbCr (1 << 13)
65
66#define WINCON1_LOCALSEL_CAMIF (1 << 23)
67
68#define WINCON2_LOCALSEL_CAMIF (1 << 23)
69#define WINCON2_BLD_PIX (1 << 6)
70
71#define WINCON2_ALPHA_SEL (1 << 1)
72#define WINCON2_BPPMODE_MASK (0xf << 2)
73#define WINCON2_BPPMODE_SHIFT (2)
74#define WINCON2_BPPMODE_1BPP (0x0 << 2)
75#define WINCON2_BPPMODE_2BPP (0x1 << 2)
76#define WINCON2_BPPMODE_4BPP (0x2 << 2)
77#define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2)
78#define WINCON2_BPPMODE_16BPP_565 (0x5 << 2)
79#define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2)
80#define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2)
81#define WINCON2_BPPMODE_18BPP_666 (0x8 << 2)
82#define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2)
83#define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2)
84#define WINCON2_BPPMODE_24BPP_888 (0xb << 2)
85#define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2)
86#define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2)
87#define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2)
88
89#define WINCON3_BLD_PIX (1 << 6)
90
91#define WINCON3_ALPHA_SEL (1 << 1)
92#define WINCON3_BPPMODE_MASK (0xf << 2)
93#define WINCON3_BPPMODE_SHIFT (2)
94#define WINCON3_BPPMODE_1BPP (0x0 << 2)
95#define WINCON3_BPPMODE_2BPP (0x1 << 2)
96#define WINCON3_BPPMODE_4BPP (0x2 << 2)
97#define WINCON3_BPPMODE_16BPP_565 (0x5 << 2)
98#define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2)
99#define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2)
100#define WINCON3_BPPMODE_18BPP_666 (0x8 << 2)
101#define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2)
102#define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2)
103#define WINCON3_BPPMODE_24BPP_888 (0xb << 2)
104#define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2)
105#define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2)
106#define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2)
107
108#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5)
109#define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5)
110#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5)
111
112#define DITHMODE (0x170)
113#define WINxMAP(_win) (0x180 + ((_win) * 4))
114
115
116#define DITHMODE_R_POS_MASK (0x3 << 5)
117#define DITHMODE_R_POS_SHIFT (5)
118#define DITHMODE_R_POS_8BIT (0x0 << 5)
119#define DITHMODE_R_POS_6BIT (0x1 << 5)
120#define DITHMODE_R_POS_5BIT (0x2 << 5)
121
122#define DITHMODE_G_POS_MASK (0x3 << 3)
123#define DITHMODE_G_POS_SHIFT (3)
124#define DITHMODE_G_POS_8BIT (0x0 << 3)
125#define DITHMODE_G_POS_6BIT (0x1 << 3)
126#define DITHMODE_G_POS_5BIT (0x2 << 3)
127
128#define DITHMODE_B_POS_MASK (0x3 << 1)
129#define DITHMODE_B_POS_SHIFT (1)
130#define DITHMODE_B_POS_8BIT (0x0 << 1)
131#define DITHMODE_B_POS_6BIT (0x1 << 1)
132#define DITHMODE_B_POS_5BIT (0x2 << 1)
133
134#define DITHMODE_DITH_EN (1 << 0)
135
136#define WPALCON (0x1A0)
137
138/* Palette control */
139/* Note for S5PC100: you can still use those macros on WPALCON (aka WPALCON_L),
140 * but make sure that WPALCON_H W2PAL-W4PAL entries are zeroed out */
141#define WPALCON_W4PAL_16BPP_A555 (1 << 8)
142#define WPALCON_W3PAL_16BPP_A555 (1 << 7)
143#define WPALCON_W2PAL_16BPP_A555 (1 << 6)
144
145
146/* system specific implementation code for palette sizes, and other
147 * information that changes depending on which architecture is being
148 * compiled.
149*/
150
151/* return true if window _win has OSD register D */
152#define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0)
153
154static inline unsigned int s3c_fb_win_pal_size(unsigned int win)
155{
156 if (win < 2)
157 return 256;
158 if (win < 4)
159 return 16;
160 if (win == 4)
161 return 4;
162
163 BUG(); /* shouldn't get here */
164}
165
166static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp)
167{
168 /* all windows can do 1/2 bpp */
169
170 if ((bpp == 25 || bpp == 19) && win == 0)
171 return 0; /* win 0 does not have 19 or 25bpp modes */
172
173 if (bpp == 4 && win == 4)
174 return 0;
175
176 if (bpp == 8 && (win >= 3))
177 return 0; /* win 3/4 cannot do 8bpp in any mode */
178
179 return 1;
180}
181
182static inline int s3c_fb_pal_is16(unsigned int window)
183{
184 return window > 1;
185}
186
187struct s3c_fb_palette {
188 struct fb_bitfield r;
189 struct fb_bitfield g;
190 struct fb_bitfield b;
191 struct fb_bitfield a;
192};
193
194static inline void s3c_fb_init_palette(unsigned int window,
195 struct s3c_fb_palette *palette)
196{
197 if (window < 2) {
198 /* Windows 0/1 are 8/8/8 or A/8/8/8 */
199 palette->r.offset = 16;
200 palette->r.length = 8;
201 palette->g.offset = 8;
202 palette->g.length = 8;
203 palette->b.offset = 0;
204 palette->b.length = 8;
205 } else {
206 /* currently we assume RGB 5/6/5 */
207 palette->r.offset = 11;
208 palette->r.length = 5;
209 palette->g.offset = 5;
210 palette->g.length = 6;
211 palette->b.offset = 0;
212 palette->b.length = 5;
213 }
214}
215
216/* Notes on per-window bpp settings
217 *
218 * Value Win0 Win1 Win2 Win3 Win 4
219 * 0000 1(P) 1(P) 1(P) 1(P) 1(P)
220 * 0001 2(P) 2(P) 2(P) 2(P) 2(P)
221 * 0010 4(P) 4(P) 4(P) 4(P) -none-
222 * 0011 8(P) 8(P) -none- -none- -none-
223 * 0100 -none- 8(A232) 8(A232) -none- -none-
224 * 0101 16(565) 16(565) 16(565) 16(565) 16(565)
225 * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555)
226 * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555)
227 * 1000 18(666) 18(666) 18(666) 18(666) 18(666)
228 * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665)
229 * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666)
230 * 1011 24(888) 24(888) 24(888) 24(888) 24(888)
231 * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887)
232 * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888)
233 * 1110 -none- -none- -none- -none- -none-
234 * 1111 -none- -none- -none- -none- -none-
235*/
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-s3c/include/plat/regs-nand.h
index b2caa4bca270..238efea7b9e4 100644
--- a/arch/arm/plat-s3c/include/plat/regs-nand.h
+++ b/arch/arm/plat-s3c/include/plat/regs-nand.h
@@ -1,7 +1,7 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-nand.h 1/* arch/arm/mach-s3c2410/include/mach/regs-nand.h
2 * 2 *
3 * Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk> 3 * Copyright (c) 2004-2005 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/ 4 * http://www.simtec.co.uk/products/SWLINUX/
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h
index 66af75a5cdd1..85d8904e7f24 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-s3c/include/plat/regs-serial.h
@@ -6,7 +6,7 @@
6 * 6 *
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com) 7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
8 * 8 *
9 * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk) 9 * Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk)
10 * 10 *
11 * Adapted from: 11 * Adapted from:
12 * 12 *
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-s3c/include/plat/sdhci.h
index f615308ccdfb..53198673b6bd 100644
--- a/arch/arm/plat-s3c/include/plat/sdhci.h
+++ b/arch/arm/plat-s3c/include/plat/sdhci.h
@@ -57,6 +57,7 @@ struct s3c_sdhci_platdata {
57 */ 57 */
58extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); 58extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
59extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); 59extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
60extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
60 61
61/* Default platform data, exported so that per-cpu initialisation can 62/* Default platform data, exported so that per-cpu initialisation can
62 * set the correct one when there are more than one cpu type selected. 63 * set the correct one when there are more than one cpu type selected.
@@ -64,11 +65,16 @@ extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
64 65
65extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; 66extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
66extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; 67extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
68extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
67 69
68/* Helper function availablity */ 70/* Helper function availablity */
69 71
70extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 72extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
71extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 73extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
74extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
75extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
76extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
77extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
72 78
73/* S3C6400 SDHCI setup */ 79/* S3C6400 SDHCI setup */
74 80
@@ -103,6 +109,17 @@ static inline void s3c6400_default_sdhci1(void)
103static inline void s3c6400_default_sdhci1(void) { } 109static inline void s3c6400_default_sdhci1(void) { }
104#endif /* CONFIG_S3C_DEV_HSMMC1 */ 110#endif /* CONFIG_S3C_DEV_HSMMC1 */
105 111
112#ifdef CONFIG_S3C_DEV_HSMMC2
113static inline void s3c6400_default_sdhci2(void)
114{
115 s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
118}
119#else
120static inline void s3c6400_default_sdhci2(void) { }
121#endif /* CONFIG_S3C_DEV_HSMMC2 */
122
106#else 123#else
107static inline void s3c6400_default_sdhci0(void) { } 124static inline void s3c6400_default_sdhci0(void) { }
108static inline void s3c6400_default_sdhci1(void) { } 125static inline void s3c6400_default_sdhci1(void) { }
@@ -140,9 +157,70 @@ static inline void s3c6410_default_sdhci1(void)
140static inline void s3c6410_default_sdhci1(void) { } 157static inline void s3c6410_default_sdhci1(void) { }
141#endif /* CONFIG_S3C_DEV_HSMMC1 */ 158#endif /* CONFIG_S3C_DEV_HSMMC1 */
142 159
160#ifdef CONFIG_S3C_DEV_HSMMC2
161static inline void s3c6410_default_sdhci2(void)
162{
163 s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
164 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
165 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
166}
167#else
168static inline void s3c6410_default_sdhci2(void) { }
169#endif /* CONFIG_S3C_DEV_HSMMC2 */
170
143#else 171#else
144static inline void s3c6410_default_sdhci0(void) { } 172static inline void s3c6410_default_sdhci0(void) { }
145static inline void s3c6410_default_sdhci1(void) { } 173static inline void s3c6410_default_sdhci1(void) { }
146#endif /* CONFIG_S3C6410_SETUP_SDHCI */ 174#endif /* CONFIG_S3C6410_SETUP_SDHCI */
147 175
176/* S5PC100 SDHCI setup */
177
178#ifdef CONFIG_S5PC100_SETUP_SDHCI
179extern char *s5pc100_hsmmc_clksrcs[4];
180
181extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
182 void __iomem *r,
183 struct mmc_ios *ios,
184 struct mmc_card *card);
185
186#ifdef CONFIG_S3C_DEV_HSMMC
187static inline void s5pc100_default_sdhci0(void)
188{
189 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
190 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
191 s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
192}
193#else
194static inline void s5pc100_default_sdhci0(void) { }
195#endif /* CONFIG_S3C_DEV_HSMMC */
196
197#ifdef CONFIG_S3C_DEV_HSMMC1
198static inline void s5pc100_default_sdhci1(void)
199{
200 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
201 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
202 s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
203}
204#else
205static inline void s5pc100_default_sdhci1(void) { }
206#endif /* CONFIG_S3C_DEV_HSMMC1 */
207
208#ifdef CONFIG_S3C_DEV_HSMMC2
209static inline void s5pc100_default_sdhci2(void)
210{
211 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
212 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
213 s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
214}
215#else
216static inline void s5pc100_default_sdhci2(void) { }
217#endif /* CONFIG_S3C_DEV_HSMMC1 */
218
219
220#else
221static inline void s5pc100_default_sdhci0(void) { }
222static inline void s5pc100_default_sdhci1(void) { }
223static inline void s5pc100_default_sdhci2(void) { }
224#endif /* CONFIG_S5PC100_SETUP_SDHCI */
225
148#endif /* __PLAT_S3C_SDHCI_H */ 226#endif /* __PLAT_S3C_SDHCI_H */
diff --git a/arch/arm/plat-s3c/pm-check.c b/arch/arm/plat-s3c/pm-check.c
index 39f2555564da..8eb1f439861c 100644
--- a/arch/arm/plat-s3c/pm-check.c
+++ b/arch/arm/plat-s3c/pm-check.c
@@ -1,7 +1,7 @@
1/* linux/arch/arm/plat-s3c/pm-check.c 1/* linux/arch/arm/plat-s3c/pm-check.c
2 * originally in linux/arch/arm/plat-s3c24xx/pm.c 2 * originally in linux/arch/arm/plat-s3c24xx/pm.c
3 * 3 *
4 * Copyright (c) 2004,2006,2008 Simtec Electronics 4 * Copyright (c) 2004-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk 5 * http://armlinux.simtec.co.uk
6 * Ben Dooks <ben@simtec.co.uk> 6 * Ben Dooks <ben@simtec.co.uk>
7 * 7 *
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c
index 8d97db2c7a0d..767470601e5c 100644
--- a/arch/arm/plat-s3c/pm.c
+++ b/arch/arm/plat-s3c/pm.c
@@ -1,7 +1,7 @@
1/* linux/arch/arm/plat-s3c/pm.c 1/* linux/arch/arm/plat-s3c/pm.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2004,2006,2008 Simtec Electronics 4 * Copyright 2004-2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 14:18:13 -0500