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-rw-r--r--arch/arm/plat-s3c/Kconfig5
-rw-r--r--arch/arm/plat-s3c/Makefile6
-rw-r--r--arch/arm/plat-s3c/dev-audio.c68
-rw-r--r--arch/arm/plat-s3c/dev-nand.c30
-rw-r--r--arch/arm/plat-s3c/include/plat/adc.h8
-rw-r--r--arch/arm/plat-s3c/include/plat/cpu-freq.h87
-rw-r--r--arch/arm/plat-s3c/include/plat/cpu.h1
-rw-r--r--arch/arm/plat-s3c/include/plat/devs.h3
-rw-r--r--arch/arm/plat-s3c/include/plat/hwmon.h41
-rw-r--r--arch/arm/plat-s3c/include/plat/map-base.h8
-rw-r--r--arch/arm/plat-s3c/pwm.c406
11 files changed, 573 insertions, 90 deletions
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index 935c7558469b..8931c5f0e46b 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -198,4 +198,9 @@ config S3C_DEV_USB_HSOTG
198 help 198 help
199 Compile in platform device definition for USB high-speed OtG 199 Compile in platform device definition for USB high-speed OtG
200 200
201config S3C_DEV_NAND
202 bool
203 help
204 Compile in platform device definition for NAND controller
205
201endif 206endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index 0761766b1833..3c09109e9e84 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -28,13 +28,17 @@ obj-$(CONFIG_PM) += pm.o
28obj-$(CONFIG_PM) += pm-gpio.o 28obj-$(CONFIG_PM) += pm-gpio.o
29obj-$(CONFIG_S3C2410_PM_CHECK) += pm-check.o 29obj-$(CONFIG_S3C2410_PM_CHECK) += pm-check.o
30 30
31# PWM support
32
33obj-$(CONFIG_HAVE_PWM) += pwm.o
34
31# devices 35# devices
32 36
33obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o 37obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 38obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
35obj-y += dev-i2c0.o 39obj-y += dev-i2c0.o
36obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 40obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
37obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += dev-audio.o
38obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 41obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
39obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o 42obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
40obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o 43obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
44obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
diff --git a/arch/arm/plat-s3c/dev-audio.c b/arch/arm/plat-s3c/dev-audio.c
deleted file mode 100644
index 1322beb40dd7..000000000000
--- a/arch/arm/plat-s3c/dev-audio.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/* linux/arch/arm/plat-s3c/dev-audio.c
2 *
3 * Copyright 2009 Wolfson Microelectronics
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18
19#include <plat/devs.h>
20
21
22static struct resource s3c64xx_iis0_resource[] = {
23 [0] = {
24 .start = S3C64XX_PA_IIS0,
25 .end = S3C64XX_PA_IIS0 + 0x100 - 1,
26 .flags = IORESOURCE_MEM,
27 },
28};
29
30struct platform_device s3c64xx_device_iis0 = {
31 .name = "s3c64xx-iis",
32 .id = 0,
33 .num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
34 .resource = s3c64xx_iis0_resource,
35};
36EXPORT_SYMBOL(s3c64xx_device_iis0);
37
38static struct resource s3c64xx_iis1_resource[] = {
39 [0] = {
40 .start = S3C64XX_PA_IIS1,
41 .end = S3C64XX_PA_IIS1 + 0x100 - 1,
42 .flags = IORESOURCE_MEM,
43 },
44};
45
46struct platform_device s3c64xx_device_iis1 = {
47 .name = "s3c64xx-iis",
48 .id = 1,
49 .num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
50 .resource = s3c64xx_iis1_resource,
51};
52EXPORT_SYMBOL(s3c64xx_device_iis1);
53
54static struct resource s3c64xx_iisv4_resource[] = {
55 [0] = {
56 .start = S3C64XX_PA_IISV4,
57 .end = S3C64XX_PA_IISV4 + 0x100 - 1,
58 .flags = IORESOURCE_MEM,
59 },
60};
61
62struct platform_device s3c64xx_device_iisv4 = {
63 .name = "s3c64xx-iis-v4",
64 .id = -1,
65 .num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
66 .resource = s3c64xx_iisv4_resource,
67};
68EXPORT_SYMBOL(s3c64xx_device_iisv4);
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-s3c/dev-nand.c
new file mode 100644
index 000000000000..4e5323732434
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-nand.c
@@ -0,0 +1,30 @@
1/*
2 * S3C series device definition for nand device
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7*/
8
9#include <linux/kernel.h>
10#include <linux/platform_device.h>
11
12#include <mach/map.h>
13#include <plat/devs.h>
14
15static struct resource s3c_nand_resource[] = {
16 [0] = {
17 .start = S3C_PA_NAND,
18 .end = S3C_PA_NAND + SZ_1M,
19 .flags = IORESOURCE_MEM,
20 }
21};
22
23struct platform_device s3c_device_nand = {
24 .name = "s3c2410-nand",
25 .id = -1,
26 .num_resources = ARRAY_SIZE(s3c_nand_resource),
27 .resource = s3c_nand_resource,
28};
29
30EXPORT_SYMBOL(s3c_device_nand);
diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-s3c/include/plat/adc.h
index d847bd476b6c..5f3b1cd53b90 100644
--- a/arch/arm/plat-s3c/include/plat/adc.h
+++ b/arch/arm/plat-s3c/include/plat/adc.h
@@ -19,10 +19,14 @@ struct s3c_adc_client;
19extern int s3c_adc_start(struct s3c_adc_client *client, 19extern int s3c_adc_start(struct s3c_adc_client *client,
20 unsigned int channel, unsigned int nr_samples); 20 unsigned int channel, unsigned int nr_samples);
21 21
22extern int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch);
23
22extern struct s3c_adc_client * 24extern struct s3c_adc_client *
23 s3c_adc_register(struct platform_device *pdev, 25 s3c_adc_register(struct platform_device *pdev,
24 void (*select)(unsigned selected), 26 void (*select)(struct s3c_adc_client *client,
25 void (*conv)(unsigned d0, unsigned d1, 27 unsigned selected),
28 void (*conv)(struct s3c_adc_client *client,
29 unsigned d0, unsigned d1,
26 unsigned *samples_left), 30 unsigned *samples_left),
27 unsigned int is_ts); 31 unsigned int is_ts);
28 32
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h
index c86a13307e90..7b982b7f28cd 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h
@@ -17,6 +17,21 @@ struct s3c_cpufreq_info;
17struct s3c_cpufreq_board; 17struct s3c_cpufreq_board;
18struct s3c_iotimings; 18struct s3c_iotimings;
19 19
20/**
21 * struct s3c_freq - frequency information (mainly for core drivers)
22 * @fclk: The FCLK frequency in Hz.
23 * @armclk: The ARMCLK frequency in Hz.
24 * @hclk_tns: HCLK cycle time in 10ths of nano-seconds.
25 * @hclk: The HCLK frequency in Hz.
26 * @pclk: The PCLK frequency in Hz.
27 *
28 * This contains the frequency information about the current configuration
29 * mainly for the core drivers to ensure we do not end up passing about
30 * a large number of parameters.
31 *
32 * The @hclk_tns field is a useful cache for the parts of the drivers that
33 * need to calculate IO timings and suchlike.
34 */
20struct s3c_freq { 35struct s3c_freq {
21 unsigned long fclk; 36 unsigned long fclk;
22 unsigned long armclk; 37 unsigned long armclk;
@@ -25,48 +40,84 @@ struct s3c_freq {
25 unsigned long pclk; 40 unsigned long pclk;
26}; 41};
27 42
28/* wrapper 'struct cpufreq_freqs' so that any drivers receiving the 43/**
44 * struct s3c_cpufreq_freqs - s3c cpufreq notification information.
45 * @freqs: The cpufreq setting information.
46 * @old: The old clock settings.
47 * @new: The new clock settings.
48 * @pll_changing: Set if the PLL is changing.
49 *
50 * Wrapper 'struct cpufreq_freqs' so that any drivers receiving the
29 * notification can use this information that is not provided by just 51 * notification can use this information that is not provided by just
30 * having the core frequency alone. 52 * having the core frequency alone.
53 *
54 * The pll_changing flag is used to indicate if the PLL itself is
55 * being set during this change. This is important as the clocks
56 * will temporarily be set to the XTAL clock during this time, so
57 * drivers may want to close down their output during this time.
58 *
59 * Note, this is not being used by any current drivers and therefore
60 * may be removed in the future.
31 */ 61 */
32
33struct s3c_cpufreq_freqs { 62struct s3c_cpufreq_freqs {
34 struct cpufreq_freqs freqs; 63 struct cpufreq_freqs freqs;
35 struct s3c_freq old; 64 struct s3c_freq old;
36 struct s3c_freq new; 65 struct s3c_freq new;
66
67 unsigned int pll_changing:1;
37}; 68};
38 69
39#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) 70#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs)
40 71
72/**
73 * struct s3c_clkdivs - clock divisor information
74 * @p_divisor: Divisor from FCLK to PCLK.
75 * @h_divisor: Divisor from FCLK to HCLK.
76 * @arm_divisor: Divisor from FCLK to ARMCLK (not all CPUs).
77 * @dvs: Non-zero if using DVS mode for ARMCLK.
78 *
79 * Divisor settings for the core clocks.
80 */
41struct s3c_clkdivs { 81struct s3c_clkdivs {
42 int p_divisor; /* fclk / pclk */ 82 int p_divisor;
43 int h_divisor; /* fclk / hclk */ 83 int h_divisor;
44 int arm_divisor; /* not all cpus have this. */ 84 int arm_divisor;
45 unsigned char dvs; /* using dvs mode to arm. */ 85 unsigned char dvs;
46}; 86};
47 87
48#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) 88#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s))
49 89
90/**
91 * struct s3c_pllval - PLL value entry.
92 * @freq: The frequency for this entry in Hz.
93 * @pll_reg: The PLL register setting for this PLL value.
94 */
50struct s3c_pllval { 95struct s3c_pllval {
51 unsigned long freq; 96 unsigned long freq;
52 unsigned long pll_reg; 97 unsigned long pll_reg;
53}; 98};
54 99
55struct s3c_cpufreq_config { 100/**
56 struct s3c_freq freq; 101 * struct s3c_cpufreq_board - per-board cpu frequency informatin
57 struct s3c_pllval pll; 102 * @refresh: The SDRAM refresh period in nanoseconds.
58 struct s3c_clkdivs divs; 103 * @auto_io: Set if the IO timing settings should be generated from the
59 struct s3c_cpufreq_info *info; /* for core, not drivers */ 104 * initialisation time hardware registers.
60 struct s3c_cpufreq_board *board; 105 * @need_io: Set if the board has external IO on any of the chipselect
61}; 106 * lines that will require the hardware timing registers to be
62 107 * updated on a clock change.
63/* s3c_cpufreq_board 108 * @max: The maxium frequency limits for the system. Any field that
109 * is left at zero will use the CPU's settings.
110 *
111 * This contains the board specific settings that affect how the CPU
112 * drivers chose settings. These include the memory refresh and IO
113 * timing information.
64 * 114 *
65 * per-board configuraton information, such as memory refresh and 115 * Registration depends on the driver being used, the ARMCLK only
66 * how to initialise IO timings. 116 * implementation does not currently need this but the older style
117 * driver requires this to be available.
67 */ 118 */
68struct s3c_cpufreq_board { 119struct s3c_cpufreq_board {
69 unsigned int refresh; /* refresh period in ns */ 120 unsigned int refresh;
70 unsigned int auto_io:1; /* automatically init io timings. */ 121 unsigned int auto_io:1; /* automatically init io timings. */
71 unsigned int need_io:1; /* set if needs io timing support. */ 122 unsigned int need_io:1; /* set if needs io timing support. */
72 123
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h
index be541cbba070..fbc3d498e02e 100644
--- a/arch/arm/plat-s3c/include/plat/cpu.h
+++ b/arch/arm/plat-s3c/include/plat/cpu.h
@@ -65,6 +65,7 @@ extern struct sys_timer s3c24xx_timer;
65/* system device classes */ 65/* system device classes */
66 66
67extern struct sysdev_class s3c2410_sysclass; 67extern struct sysdev_class s3c2410_sysclass;
68extern struct sysdev_class s3c2410a_sysclass;
68extern struct sysdev_class s3c2412_sysclass; 69extern struct sysdev_class s3c2412_sysclass;
69extern struct sysdev_class s3c2440_sysclass; 70extern struct sysdev_class s3c2440_sysclass;
70extern struct sysdev_class s3c2442_sysclass; 71extern struct sysdev_class s3c2442_sysclass;
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index 2e170827e0b0..0f540ea1e999 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -46,6 +46,8 @@ extern struct platform_device s3c_device_hsmmc2;
46extern struct platform_device s3c_device_spi0; 46extern struct platform_device s3c_device_spi0;
47extern struct platform_device s3c_device_spi1; 47extern struct platform_device s3c_device_spi1;
48 48
49extern struct platform_device s3c_device_hwmon;
50
49extern struct platform_device s3c_device_nand; 51extern struct platform_device s3c_device_nand;
50 52
51extern struct platform_device s3c_device_usbgadget; 53extern struct platform_device s3c_device_usbgadget;
@@ -56,5 +58,6 @@ extern struct platform_device s3c_device_usb_hsotg;
56#ifdef CONFIG_CPU_S3C2440 58#ifdef CONFIG_CPU_S3C2440
57 59
58extern struct platform_device s3c_device_camif; 60extern struct platform_device s3c_device_camif;
61extern struct platform_device s3c_device_ac97;
59 62
60#endif 63#endif
diff --git a/arch/arm/plat-s3c/include/plat/hwmon.h b/arch/arm/plat-s3c/include/plat/hwmon.h
new file mode 100644
index 000000000000..1ba88ea0aa31
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/hwmon.h
@@ -0,0 +1,41 @@
1/* linux/arch/arm/plat-s3c/include/plat/hwmon.h
2 *
3 * Copyright 2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C - HWMon interface for ADC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_ARCH_ADC_HWMON_H
15#define __ASM_ARCH_ADC_HWMON_H __FILE__
16
17/**
18 * s3c_hwmon_chcfg - channel configuration
19 * @name: The name to give this channel.
20 * @mult: Multiply the ADC value read by this.
21 * @div: Divide the value from the ADC by this.
22 *
23 * The value read from the ADC is converted to a value that
24 * hwmon expects (mV) by result = (value_read * @mult) / @div.
25 */
26struct s3c_hwmon_chcfg {
27 const char *name;
28 unsigned int mult;
29 unsigned int div;
30};
31
32/**
33 * s3c_hwmon_pdata - HWMON platform data
34 * @in: One configuration for each possible channel used.
35 */
36struct s3c_hwmon_pdata {
37 struct s3c_hwmon_chcfg *in[8];
38};
39
40#endif /* __ASM_ARCH_ADC_HWMON_H */
41
diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-s3c/include/plat/map-base.h
index b84289d32a54..250be311c85b 100644
--- a/arch/arm/plat-s3c/include/plat/map-base.h
+++ b/arch/arm/plat-s3c/include/plat/map-base.h
@@ -32,9 +32,15 @@
32 32
33#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */ 33#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
34#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */ 34#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
35#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */ 35#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
36#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ 36#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
37#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ 37#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
38#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ 38#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
39 39
40/* This is used for the CPU specific mappings that may be needed, so that
41 * they do not need to directly used S3C_ADDR() and thus make it easier to
42 * modify the space for mapping.
43 */
44#define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
45
40#endif /* __ASM_PLAT_MAP_H */ 46#endif /* __ASM_PLAT_MAP_H */
diff --git a/arch/arm/plat-s3c/pwm.c b/arch/arm/plat-s3c/pwm.c
new file mode 100644
index 000000000000..f3d37ac5595b
--- /dev/null
+++ b/arch/arm/plat-s3c/pwm.c
@@ -0,0 +1,406 @@
1/* arch/arm/plat-s3c/pwm.c
2 *
3 * Copyright (c) 2007 Ben Dooks
4 * Copyright (c) 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
6 *
7 * S3C series PWM device core
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12*/
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/pwm.h>
21
22#include <mach/irqs.h>
23#include <mach/map.h>
24
25#include <plat/devs.h>
26#include <plat/regs-timer.h>
27
28struct pwm_device {
29 struct list_head list;
30 struct platform_device *pdev;
31
32 struct clk *clk_div;
33 struct clk *clk;
34 const char *label;
35
36 unsigned int period_ns;
37 unsigned int duty_ns;
38
39 unsigned char tcon_base;
40 unsigned char running;
41 unsigned char use_count;
42 unsigned char pwm_id;
43};
44
45#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
46
47static struct clk *clk_scaler[2];
48
49/* Standard setup for a timer block. */
50
51#define TIMER_RESOURCE_SIZE (1)
52
53#define TIMER_RESOURCE(_tmr, _irq) \
54 (struct resource [TIMER_RESOURCE_SIZE]) { \
55 [0] = { \
56 .start = _irq, \
57 .end = _irq, \
58 .flags = IORESOURCE_IRQ \
59 } \
60 }
61
62#define DEFINE_S3C_TIMER(_tmr_no, _irq) \
63 .name = "s3c24xx-pwm", \
64 .id = _tmr_no, \
65 .num_resources = TIMER_RESOURCE_SIZE, \
66 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
67
68/* since we already have an static mapping for the timer, we do not
69 * bother setting any IO resource for the base.
70 */
71
72struct platform_device s3c_device_timer[] = {
73 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
74 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
75 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
76 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
77 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
78};
79
80static inline int pwm_is_tdiv(struct pwm_device *pwm)
81{
82 return clk_get_parent(pwm->clk) == pwm->clk_div;
83}
84
85static DEFINE_MUTEX(pwm_lock);
86static LIST_HEAD(pwm_list);
87
88struct pwm_device *pwm_request(int pwm_id, const char *label)
89{
90 struct pwm_device *pwm;
91 int found = 0;
92
93 mutex_lock(&pwm_lock);
94
95 list_for_each_entry(pwm, &pwm_list, list) {
96 if (pwm->pwm_id == pwm_id) {
97 found = 1;
98 break;
99 }
100 }
101
102 if (found) {
103 if (pwm->use_count == 0) {
104 pwm->use_count = 1;
105 pwm->label = label;
106 } else
107 pwm = ERR_PTR(-EBUSY);
108 } else
109 pwm = ERR_PTR(-ENOENT);
110
111 mutex_unlock(&pwm_lock);
112 return pwm;
113}
114
115EXPORT_SYMBOL(pwm_request);
116
117
118void pwm_free(struct pwm_device *pwm)
119{
120 mutex_lock(&pwm_lock);
121
122 if (pwm->use_count) {
123 pwm->use_count--;
124 pwm->label = NULL;
125 } else
126 printk(KERN_ERR "PWM%d device already freed\n", pwm->pwm_id);
127
128 mutex_unlock(&pwm_lock);
129}
130
131EXPORT_SYMBOL(pwm_free);
132
133#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
134#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
135#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
136#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
137
138int pwm_enable(struct pwm_device *pwm)
139{
140 unsigned long flags;
141 unsigned long tcon;
142
143 local_irq_save(flags);
144
145 tcon = __raw_readl(S3C2410_TCON);
146 tcon |= pwm_tcon_start(pwm);
147 __raw_writel(tcon, S3C2410_TCON);
148
149 local_irq_restore(flags);
150
151 pwm->running = 1;
152 return 0;
153}
154
155EXPORT_SYMBOL(pwm_enable);
156
157void pwm_disable(struct pwm_device *pwm)
158{
159 unsigned long flags;
160 unsigned long tcon;
161
162 local_irq_save(flags);
163
164 tcon = __raw_readl(S3C2410_TCON);
165 tcon &= ~pwm_tcon_start(pwm);
166 __raw_writel(tcon, S3C2410_TCON);
167
168 local_irq_restore(flags);
169
170 pwm->running = 0;
171}
172
173EXPORT_SYMBOL(pwm_disable);
174
175static unsigned long pwm_calc_tin(struct pwm_device *pwm, unsigned long freq)
176{
177 unsigned long tin_parent_rate;
178 unsigned int div;
179
180 tin_parent_rate = clk_get_rate(clk_get_parent(pwm->clk_div));
181 pwm_dbg(pwm, "tin parent at %lu\n", tin_parent_rate);
182
183 for (div = 2; div <= 16; div *= 2) {
184 if ((tin_parent_rate / (div << 16)) < freq)
185 return tin_parent_rate / div;
186 }
187
188 return tin_parent_rate / 16;
189}
190
191#define NS_IN_HZ (1000000000UL)
192
193int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
194{
195 unsigned long tin_rate;
196 unsigned long tin_ns;
197 unsigned long period;
198 unsigned long flags;
199 unsigned long tcon;
200 unsigned long tcnt;
201 long tcmp;
202
203 /* We currently avoid using 64bit arithmetic by using the
204 * fact that anything faster than 1Hz is easily representable
205 * by 32bits. */
206
207 if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
208 return -ERANGE;
209
210 if (duty_ns > period_ns)
211 return -EINVAL;
212
213 if (period_ns == pwm->period_ns &&
214 duty_ns == pwm->duty_ns)
215 return 0;
216
217 /* The TCMP and TCNT can be read without a lock, they're not
218 * shared between the timers. */
219
220 tcmp = __raw_readl(S3C2410_TCMPB(pwm->pwm_id));
221 tcnt = __raw_readl(S3C2410_TCNTB(pwm->pwm_id));
222
223 period = NS_IN_HZ / period_ns;
224
225 pwm_dbg(pwm, "duty_ns=%d, period_ns=%d (%lu)\n",
226 duty_ns, period_ns, period);
227
228 /* Check to see if we are changing the clock rate of the PWM */
229
230 if (pwm->period_ns != period_ns) {
231 if (pwm_is_tdiv(pwm)) {
232 tin_rate = pwm_calc_tin(pwm, period);
233 clk_set_rate(pwm->clk_div, tin_rate);
234 } else
235 tin_rate = clk_get_rate(pwm->clk);
236
237 pwm->period_ns = period_ns;
238
239 pwm_dbg(pwm, "tin_rate=%lu\n", tin_rate);
240
241 tin_ns = NS_IN_HZ / tin_rate;
242 tcnt = period_ns / tin_ns;
243 } else
244 tin_ns = NS_IN_HZ / clk_get_rate(pwm->clk);
245
246 /* Note, counters count down */
247
248 tcmp = duty_ns / tin_ns;
249 tcmp = tcnt - tcmp;
250
251 pwm_dbg(pwm, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
252
253 if (tcmp < 0)
254 tcmp = 0;
255
256 /* Update the PWM register block. */
257
258 local_irq_save(flags);
259
260 __raw_writel(tcmp, S3C2410_TCMPB(pwm->pwm_id));
261 __raw_writel(tcnt, S3C2410_TCNTB(pwm->pwm_id));
262
263 tcon = __raw_readl(S3C2410_TCON);
264 tcon |= pwm_tcon_manulupdate(pwm);
265 tcon |= pwm_tcon_autoreload(pwm);
266 __raw_writel(tcon, S3C2410_TCON);
267
268 tcon &= ~pwm_tcon_manulupdate(pwm);
269 __raw_writel(tcon, S3C2410_TCON);
270
271 local_irq_restore(flags);
272
273 return 0;
274}
275
276EXPORT_SYMBOL(pwm_config);
277
278static int pwm_register(struct pwm_device *pwm)
279{
280 pwm->duty_ns = -1;
281 pwm->period_ns = -1;
282
283 mutex_lock(&pwm_lock);
284 list_add_tail(&pwm->list, &pwm_list);
285 mutex_unlock(&pwm_lock);
286
287 return 0;
288}
289
290static int s3c_pwm_probe(struct platform_device *pdev)
291{
292 struct device *dev = &pdev->dev;
293 struct pwm_device *pwm;
294 unsigned long flags;
295 unsigned long tcon;
296 unsigned int id = pdev->id;
297 int ret;
298
299 if (id == 4) {
300 dev_err(dev, "TIMER4 is currently not supported\n");
301 return -ENXIO;
302 }
303
304 pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
305 if (pwm == NULL) {
306 dev_err(dev, "failed to allocate pwm_device\n");
307 return -ENOMEM;
308 }
309
310 pwm->pdev = pdev;
311 pwm->pwm_id = id;
312
313 /* calculate base of control bits in TCON */
314 pwm->tcon_base = id == 0 ? 0 : (id * 4) + 4;
315
316 pwm->clk = clk_get(dev, "pwm-tin");
317 if (IS_ERR(pwm->clk)) {
318 dev_err(dev, "failed to get pwm tin clk\n");
319 ret = PTR_ERR(pwm->clk);
320 goto err_alloc;
321 }
322
323 pwm->clk_div = clk_get(dev, "pwm-tdiv");
324 if (IS_ERR(pwm->clk_div)) {
325 dev_err(dev, "failed to get pwm tdiv clk\n");
326 ret = PTR_ERR(pwm->clk_div);
327 goto err_clk_tin;
328 }
329
330 local_irq_save(flags);
331
332 tcon = __raw_readl(S3C2410_TCON);
333 tcon |= pwm_tcon_invert(pwm);
334 __raw_writel(tcon, S3C2410_TCON);
335
336 local_irq_restore(flags);
337
338
339 ret = pwm_register(pwm);
340 if (ret) {
341 dev_err(dev, "failed to register pwm\n");
342 goto err_clk_tdiv;
343 }
344
345 pwm_dbg(pwm, "config bits %02x\n",
346 (__raw_readl(S3C2410_TCON) >> pwm->tcon_base) & 0x0f);
347
348 dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
349 clk_get_rate(pwm->clk),
350 clk_get_rate(pwm->clk_div),
351 pwm_is_tdiv(pwm) ? "div" : "ext", pwm->tcon_base);
352
353 platform_set_drvdata(pdev, pwm);
354 return 0;
355
356 err_clk_tdiv:
357 clk_put(pwm->clk_div);
358
359 err_clk_tin:
360 clk_put(pwm->clk);
361
362 err_alloc:
363 kfree(pwm);
364 return ret;
365}
366
367static int s3c_pwm_remove(struct platform_device *pdev)
368{
369 struct pwm_device *pwm = platform_get_drvdata(pdev);
370
371 clk_put(pwm->clk_div);
372 clk_put(pwm->clk);
373 kfree(pwm);
374
375 return 0;
376}
377
378static struct platform_driver s3c_pwm_driver = {
379 .driver = {
380 .name = "s3c24xx-pwm",
381 .owner = THIS_MODULE,
382 },
383 .probe = s3c_pwm_probe,
384 .remove = __devexit_p(s3c_pwm_remove),
385};
386
387static int __init pwm_init(void)
388{
389 int ret;
390
391 clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
392 clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
393
394 if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
395 printk(KERN_ERR "%s: failed to get scaler clocks\n", __func__);
396 return -EINVAL;
397 }
398
399 ret = platform_driver_register(&s3c_pwm_driver);
400 if (ret)
401 printk(KERN_ERR "%s: failed to add pwm driver\n", __func__);
402
403 return ret;
404}
405
406arch_initcall(pwm_init);