diff options
Diffstat (limited to 'arch/arm/plat-s3c64xx')
-rw-r--r-- | arch/arm/plat-s3c64xx/dma.c | 34 |
1 files changed, 13 insertions, 21 deletions
diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/plat-s3c64xx/dma.c index 6fa706f0f42a..5a08a86419dd 100644 --- a/arch/arm/plat-s3c64xx/dma.c +++ b/arch/arm/plat-s3c64xx/dma.c | |||
@@ -565,26 +565,11 @@ int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client) | |||
565 | 565 | ||
566 | EXPORT_SYMBOL(s3c2410_dma_free); | 566 | EXPORT_SYMBOL(s3c2410_dma_free); |
567 | 567 | ||
568 | |||
569 | static void s3c64xx_dma_tcirq(struct s3c64xx_dmac *dmac, int offs) | ||
570 | { | ||
571 | struct s3c2410_dma_chan *chan = dmac->channels + offs; | ||
572 | |||
573 | /* note, we currently do not bother to work out which buffer | ||
574 | * or buffers have been completed since the last tc-irq. */ | ||
575 | |||
576 | if (chan->callback_fn) | ||
577 | (chan->callback_fn)(chan, chan->curr->pw, 0, S3C2410_RES_OK); | ||
578 | } | ||
579 | |||
580 | static void s3c64xx_dma_errirq(struct s3c64xx_dmac *dmac, int offs) | ||
581 | { | ||
582 | printk(KERN_DEBUG "%s: offs %d\n", __func__, offs); | ||
583 | } | ||
584 | |||
585 | static irqreturn_t s3c64xx_dma_irq(int irq, void *pw) | 568 | static irqreturn_t s3c64xx_dma_irq(int irq, void *pw) |
586 | { | 569 | { |
587 | struct s3c64xx_dmac *dmac = pw; | 570 | struct s3c64xx_dmac *dmac = pw; |
571 | struct s3c2410_dma_chan *chan; | ||
572 | enum s3c2410_dma_buffresult res; | ||
588 | u32 tcstat, errstat; | 573 | u32 tcstat, errstat; |
589 | u32 bit; | 574 | u32 bit; |
590 | int offs; | 575 | int offs; |
@@ -593,15 +578,22 @@ static irqreturn_t s3c64xx_dma_irq(int irq, void *pw) | |||
593 | errstat = readl(dmac->regs + PL080_ERR_STATUS); | 578 | errstat = readl(dmac->regs + PL080_ERR_STATUS); |
594 | 579 | ||
595 | for (offs = 0, bit = 1; offs < 8; offs++, bit <<= 1) { | 580 | for (offs = 0, bit = 1; offs < 8; offs++, bit <<= 1) { |
581 | |||
582 | if (!(errstat & bit) && !(tcstat & bit)) | ||
583 | continue; | ||
584 | |||
585 | chan = dmac->channels + offs; | ||
586 | res = S3C2410_RES_ERR; | ||
587 | |||
596 | if (tcstat & bit) { | 588 | if (tcstat & bit) { |
597 | writel(bit, dmac->regs + PL080_TC_CLEAR); | 589 | writel(bit, dmac->regs + PL080_TC_CLEAR); |
598 | s3c64xx_dma_tcirq(dmac, offs); | 590 | res = S3C2410_RES_OK; |
599 | } | 591 | } |
600 | 592 | ||
601 | if (errstat & bit) { | 593 | if (errstat & bit) |
602 | s3c64xx_dma_errirq(dmac, offs); | ||
603 | writel(bit, dmac->regs + PL080_ERR_CLEAR); | 594 | writel(bit, dmac->regs + PL080_ERR_CLEAR); |
604 | } | 595 | |
596 | s3c64xx_dma_bufffdone(chan, chan->curr, res); | ||
605 | } | 597 | } |
606 | 598 | ||
607 | return IRQ_HANDLED; | 599 | return IRQ_HANDLED; |