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Diffstat (limited to 'arch/arm/plat-s3c64xx/s3c6400-clock.c')
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index febac1950d8e..9745852261e0 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -302,8 +302,8 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
302 return -EINVAL; 302 return -EINVAL;
303 303
304 val = __raw_readl(reg); 304 val = __raw_readl(reg);
305 val &= ~(0xf << sclk->shift); 305 val &= ~(0xf << sclk->divider_shift);
306 val |= (div - 1) << sclk->shift; 306 val |= (div - 1) << sclk->divider_shift;
307 __raw_writel(val, reg); 307 __raw_writel(val, reg);
308 308
309 return 0; 309 return 0;
@@ -328,6 +328,8 @@ static int s3c64xx_setparent_clksrc(struct clk *clk, struct clk *parent)
328 clksrc |= src_nr << sclk->shift; 328 clksrc |= src_nr << sclk->shift;
329 329
330 __raw_writel(clksrc, S3C_CLK_SRC); 330 __raw_writel(clksrc, S3C_CLK_SRC);
331
332 clk->parent = parent;
331 return 0; 333 return 0;
332 } 334 }
333 335
@@ -343,7 +345,7 @@ static unsigned long s3c64xx_roundrate_clksrc(struct clk *clk,
343 if (rate > parent_rate) 345 if (rate > parent_rate)
344 rate = parent_rate; 346 rate = parent_rate;
345 else { 347 else {
346 div = rate / parent_rate; 348 div = parent_rate / rate;
347 349
348 if (div == 0) 350 if (div == 0)
349 div = 1; 351 div = 1;