diff options
Diffstat (limited to 'arch/arm/plat-s3c64xx/clock.c')
-rw-r--r-- | arch/arm/plat-s3c64xx/clock.c | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c index 7a36e899360d..2989c3a2e94d 100644 --- a/arch/arm/plat-s3c64xx/clock.c +++ b/arch/arm/plat-s3c64xx/clock.c | |||
@@ -141,6 +141,18 @@ static struct clk init_clocks_disable[] = { | |||
141 | .enable = s3c64xx_pclk_ctrl, | 141 | .enable = s3c64xx_pclk_ctrl, |
142 | .ctrlbit = S3C_CLKCON_PCLK_SPI1, | 142 | .ctrlbit = S3C_CLKCON_PCLK_SPI1, |
143 | }, { | 143 | }, { |
144 | .name = "spi_48m", | ||
145 | .id = 0, | ||
146 | .parent = &clk_48m, | ||
147 | .enable = s3c64xx_sclk_ctrl, | ||
148 | .ctrlbit = S3C_CLKCON_SCLK_SPI0_48, | ||
149 | }, { | ||
150 | .name = "spi_48m", | ||
151 | .id = 1, | ||
152 | .parent = &clk_48m, | ||
153 | .enable = s3c64xx_sclk_ctrl, | ||
154 | .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, | ||
155 | }, { | ||
144 | .name = "48m", | 156 | .name = "48m", |
145 | .id = 0, | 157 | .id = 0, |
146 | .parent = &clk_48m, | 158 | .parent = &clk_48m, |
@@ -274,15 +286,7 @@ void __init s3c64xx_register_clocks(void) | |||
274 | int ptr; | 286 | int ptr; |
275 | 287 | ||
276 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 288 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
277 | 289 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | |
278 | clkp = init_clocks; | ||
279 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { | ||
280 | ret = s3c24xx_register_clock(clkp); | ||
281 | if (ret < 0) { | ||
282 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
283 | clkp->name, ret); | ||
284 | } | ||
285 | } | ||
286 | 290 | ||
287 | clkp = init_clocks_disable; | 291 | clkp = init_clocks_disable; |
288 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 292 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { |